LTC3630A [Linear]
High Efficiency, 76V 500mA Synchronous Step-Down Converter; 高效率， 76V 500mA同步降压转换器
| 型号： | LTC3630A |
| 厂家： | 
Linear |
| 描述： | High Efficiency, 76V 500mA Synchronous Step-Down Converter |
| 文件： | 总24页 (文件大小：346K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3630A
High Efficiency, 76V
500mA Synchronous
Step-Down Converter
FeaTures
DescripTion
The LTC®3630A is a high efficiency step-down DC/DC
converter with internal high side and synchronous power
switches that draws only 12μA typical DC supply current
while maintaining a regulated output voltage at no load.
n
Wide Operating Input Voltage Range: 4V to 76V
n
Synchronous Operation for Highest Efficiency
n
Internal High Side and Low Side Power MOSFETs
n
No Compensation Required
n
Adjustable 50mA to 500mA Maximum Output Current
The LTC3630A can supply up to 500mA load current and
features a programmable peak current limit that provides
a simple method for optimizing efficiency and for reduc-
ing output ripple and component size. The LTC3630A’s
combination of Burst Mode® operation, integrated power
switches, low quiescent current, and programmable peak
current limit provides high efficiency over a broad range
of load currents.
n
Low Dropout Operation: 100% Duty Cycle
Low Quiescent Current: 12µA
Wide Output Range: 0.8V to V
n
n
IN
n
n
n
n
n
n
0.8V 1% Feedback Voltage Reference
Precise RUN Pin Threshold
Internal and External Soft-Start
Programmable 1.8V, 3.3V, 5V or Adjustable Output
Few External Components Required
Low Profile (0.75mm) 3mm × 5mm DFN and
Thermally-Enhanced MSE16 Packages
With its wide input range of 4V to 76V, the LTC3630A is
a robust converter suited for regulating a wide variety of
power sources. A feedback comparator output enables
multiple LTC3630As to be paralleled in higher current
applications.
applicaTions
n
Industrial Control Supplies
The LTC3630A is available in the thermally-enhanced
3mm × 5mm DFN and the MSE16 packages.
n
Medical Devices
n
Portable Instruments
Automotive
Avionics
n
PARAMETER
LTC3630A
76V
LTC3630
65V
n
Maximum Operating V
IN
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks
and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
Absolute Maximum V
80V
70V
IN
Typical applicaTion
Efficiency and Power Loss vs Load Current
100
12.5V to 76V Input to 12V Output, 500mA Step-Down Converter
90
80
70
60
50
40
30
20
10
0
22µH
V
OUT
V
EFFICIENCY
IN
12V
V
SW
LTC3630A
IN
1000
100
10
12.5V TO 76V
500mA
2.2µF
22µF
200k
147k
RUN
V
FB
POWER LOSS
I
SS
SET
V
PRG1
V
PRG2
FBO
OVLO
GND
3630a TA01a
1
0.1
1
10
100
1000
LOAD CURRENT (mA)
3630a TA01b
3630af
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For more information www.linear.com/LTC3630A
LTC3630A
absoluTe MaxiMuM raTings (Note 1)
V Supply Voltage..................................... –0.3V to 80V
Operating Junction Temperature Range (Notes 2, 3, 4)
LTC3630AE, LTC3630AI .................... –40°C to 125°C
LTC3630AH ....................................... –40°C to 150°C
LTC3630AMP..................................... –55°C to 150°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
IN
RUN Voltage................................................. –0.3V to 6V
SS, FBO, I
FB PRG1 PRG2
Voltages................................. –0.3V to 6V
SET
, V
V , V
Voltages ......................... –0.3V to 6V
MSOP ...............................................................300°C
pin conFiguraTion
TOP VIEW
SW
NC
1
2
3
4
5
6
7
8
16 GND
15 NC
TOP VIEW
1
3
SW
16 GND
14 GND
12 FBO
V
14 GND
13 NC
IN
V
IN
NC
17
GND
17
GND
5
6
7
8
RUN
PRG2
PRG1
GND
RUN
12 FBO
V
V
11
I
SET
10 SS
V
V
11
I
SET
PRG2
9
V
FB
10 SS
PRG1
GND
MSE PACKAGE
VARIATION: MSE16 (12)
16-LEAD PLASTIC MSOP
9
V
FB
DHC PACKAGE
T
= 150°C, θ = 45°C/W, θ = 10°C/W
JA JC
JMAX
16-LEAD (5mm × 3mm) PLASTIC DFN
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
(NOTE 6)
T
= 150°C, θ = 43°C/W, θ = 5°C/W
JA JC
JMAX
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
orDer inForMaTion
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
3630A
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3630AEMSE#PBF
LTC3630AIMSE#PBF
LTC3630AHMSE#PBF
LTC3630AMPMSE#PBF
LTC3630AEDHC#PBF
LTC3630AIDHC#PBF
LTC3630AHDHC#PBF
LTC3630AMPDHC#PBF
LTC3630AEMSE#TRPBF
LTC3630AIMSE#TRPBF
LTC3630AHMSE#TRPBF
LTC3630AMPMSE#TRPBF
LTC3630AEDHC#TRPBF
LTC3630AIDHC#TRPBF
LTC3630AHDHC#TRPBF
LTC3630AMPDHC#TRPBF
16-Lead Plastic MSOP
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–55°C to 150°C
–40°C to 125°C
–40°C to 125°C
–40°C to 150°C
–55°C to 150°C
3630A
16-Lead Plastic MSOP
3630A
16-Lead Plastic MSOP
3630A
16-Lead Plastic MSOP
3630A
16-Lead (5mm × 3mm) Plastic DFN
16-Lead (5mm × 3mm) Plastic DFN
16-Lead (5mm × 3mm) Plastic DFN
16-Lead (5mm × 3mm) Plastic DFN
3630A
3630A
3630A
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping
container.Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
3630af
2
For more information www.linear.com/LTC3630A
LTC3630A
elecTrical characTerisTics The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 12V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input Supply (V )
IN
V
V
Input Voltage Operating Range
Output Voltage Operating Range
4
76
V
V
IN
(Note 7)
0.8
V
IN
OUT
l
l
UVLO
V
IN
Undervoltage Lockout
V
V
Rising
Falling
3.45
3.30
3.65
3.5
150
3.85
3.70
V
V
mV
IN
IN
Hysteresis
I
DC Supply Current (Note 5)
Active Mode
Q
165
12
5
µA
µA
µA
Sleep Mode
No Load
RUN
Shutdown Mode
V
= 0V
V
RUN Pin Threshold Voltage
RUN Rising
RUN Falling
Hysteresis
1.17
1.06
1.21
1.10
110
1.25
1.14
V
V
mV
RUN
Output Supply (V
)
FB
V
Feedback Comparator Threshold Voltage
(Adjustable Output)
V
Rising, V
= V
= 0V
FB(ADJ)
FB
PRG1
PRG2
l
l
LTC3630AE, LTC3630AI
LTC3630AH, LTC3630AMP
0.792
0.788
0.800
0.800
0.808
0.812
V
V
l
V
Feedback Comparator Hysteresis
(Adjustable Output)
V
V
Falling, V
= V = 0V
PRG2
2.5
5
7
mV
FBH
FB
PRG1
I
Feedback Pin Current
= 1V, V
= 0V, V = 0V
PRG2
–10
0
10
nA
FB
FB
PRG1
l
l
V
Feedback Comparator Threshold Voltages
(Fixed Output)
V
FB
V
FB
Rising, V
Falling, V
= SS, V
= SS, V
= 0V
= 0V
4.940
4.910
5.015
4.985
5.090
5.060
V
V
FB(FIXED)
PRG1
PRG1
PRG2
PRG2
l
l
V
V
Rising, V
Falling, V
= 0V, V
= 0V, V
= SS
= SS
3.260
3.240
3.310
3.290
3.360
3.340
V
V
FB
FB
PRG1
PRG1
PRG2
PRG2
l
l
V
V
Rising, V
Falling, V
= V
= V
= SS
= SS
1.780
1.770
1.810
1.8
1.840
1.83
V
V
FB
FB
PRG1
PRG1
PRG2
PRG2
Feedback Voltage Line Regulation
Peak Current Comparator Threshold
V
= 4V to 76V
0.001
%/V
∆V
IN
LINEREG
Operation
l
l
l
I
I
Floating
1
0.45
0.09
1.2
0.6
0.12
1.4
0.75
0.15
A
A
A
PEAK
SET
100k Resistor from I to GND
SET
I
Shorted to GND
SET
R
Power Switch On-Resistance
Top Switch
Bottom Switch
ON
I
SW
I
SW
= –200mA
= 200mA
1.00
0.53
Ω
Ω
I
I
t
Switch Pin Leakage Current
Soft-Start Pin Pull-Up Current
Internal Soft-Start Time
RUN = Open, V = 65V, SW = 0V
0.1
5
1
6
μA
μA
ms
LSW
SS
IN
V
SS
< 2.5V
3
SS Pin Floating
0.8
INT(SS)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
High junction temperatures degrade operating lifetimes; operating lifetime
is derated for junction temperatures greater than 125°C. Note that the
maximum ambient temperature consistent with these specifications is
determined by specific operating conditions in conjunction with board
layout, the rated package thermal impedance and other environmental
factors.
Note 2: The LTC3630A is tested under pulsed load conditions such that
T ≈ T . The LTC3630AE is guaranteed to meet performance specifications
J
A
from 0°C to 85°C. Specifications over the –40°C to 125°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC3630AI is guaranteed
over the –40°C to 125°C operating junction temperature range, the
LTC3630AH is guaranteed over the –40°C to 150°C operating junction
temperature range and the LTC3630AMP is tested and guaranteed over the
–55°C to 150°C operating junction temperature range.
Note 3: The junction temperature (T , in °C) is calculated from the ambient
J
temperature (T , in °C) and power dissipation (P , in Watts) according to
A
D
the formula:
T = T + (P • θ )
JA
J
A
D
where θ is 43°C/W for the DFN or 45°C/W for the MSOP.
JA
3630af
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For more information www.linear.com/LTC3630A
LTC3630A
elecTrical characTerisTics
Note that the maximum ambient temperature consistent with these
specifications is determined by specific operating conditions in
conjunction with board layout, the rated package thermal impedance and
other environmental factors.
Note 5: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency. See Applications Information.
Note 6: For application concerned with pin creepage and clearance
distances at high voltages, the MSOP package should be used. See
Applications Information.
Note 4: This IC includes over temperature protection that is intended to
protect the device during momentary overload conditions. The maximum
rated junction temperature will be exceeded when this protection is active.
Continuous operation above the specified absolute maximum operating
junction temperature may impair device reliability or permanently damage
the device. The overtemperature protection level is not production tested.
Note 7: At very high input voltages, the minimum output voltage that can
be maintained is limited to V – 65V if the load current is less than 5mA.
IN
Refer to the High Input Voltage Considerations in the Operation section.
Typical perForMance characTerisTics
Load Step Transient Response
Soft-Start Waveform
Short-Circuit Response
OUTPUT
VOLTAGE
2V/DIV
OUTPUT
VOLTAGE
50mV/DIV
OUTPUT
VOLTAGE
2V/DIV
LOAD
CURRENT
200mA/DIV
INDUCTOR
CURRENT
500mA/DIV
INDUCTOR
CURRENT
500mA/DIV
3630a G01
3630a G02
3630a G03
C
= 100µF
1ms/DIV
V
V
= 12V
OUT
FIGURE 13 CIRCUIT
500µs/DIV
V
V
= 12V
OUT
FIGURE 13 CIRCUIT
200µs/DIV
OUT
IN
IN
FIGURE 13 CIRCUIT
= 5V
= 5V
Efficiency and Power Loss
vs Load Current, VOUT = 5V
Efficiency and Power Loss
Efficiency and Power Loss
vs Load Current, VOUT = 3.3V
vs Load Current, VOUT = 1.8V
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
V
= 1.8V
OUT
FIGURE 13 CIRCUIT
EFFICIENCY
EFFICIENCY
1000
100
10
1000
100
10
1000
100
10
EFFICIENCY
POWER LOSS
POWER LOSS
POWER LOSS
V
= 5V
V
= 3.3V
OUT
FIGURE 13 CIRCUIT
OUT
FIGURE 13 CIRCUIT
1
1
1
V
IN
V
IN
= 12V
= 70V
V
V
= 12V
= 68V
V
IN
V
IN
= 12V
= 67V
IN
IN
0.1
1000
0.1
1000
0.1
1000
0.1
1
10
100
0.1
1
10
100
0.1
1
10
100
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3630a G04
3630a G05
3630a G06
3630af
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For more information www.linear.com/LTC3630A
LTC3630A
Typical perForMance characTerisTics
Efficiency vs Input Voltage
Line Regulation vs Input Voltage
Load Regulation vs Load Current
95
90
85
80
0.05
0.04
0.03
0.02
0.01
0
5.04
5.03
5.02
5.01
FIGURE 13 CIRCUIT
V
= 5V
V
V
= 12V
= 5V
OUT
IN
OUT
I
= 500mA
FIGURE 13 CIRCUIT
LOAD
FIGURE 13 CIRCUIT
75
70
5.00
4.99
–0.01
–0.02
–0.03
–0.04
–0.05
65
60
55
4.98
4.97
4.96
I
I
I
I
= 500mA
= 100mA
= 10mA
= 1mA
LOAD
LOAD
LOAD
LOAD
20
30
50
100
200
LOAD CURRENT (mA)
400
10
60
70
0
500
40
5
15
35
45
55
65
75
300
25
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
3630a G07
3630a G09
3630a G08
Feedback Comparator Trip
Voltage vs Temperature
Feedback Comparator Hysteresis
vs Temperature
Peak Current Trip Threshold
vs Temperature and ISET
5.5
5.4
5.3
5.2
5.1
5.0
4.9
4.8
4.7
4.6
4.5
1400
1200
1000
800
600
400
200
0
0.804
0.802
0.800
0.798
V
= 12V
V
= 12V
V
= 12V
IN
IN
IN
I
OPEN
SET
R
= 100kΩ
ISET
I
= GND
65
SET
0.796
–55
5
35
65
95 125 155
–55 –25
95
155
–55 –25
5
35
65
95 125 155
–25
5
35
125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3630a G11
3630a G12
3630a G10
Peak Current Trip Threshold
vs RISET
Peak Current Trip Threshold
vs Input Voltage
Quiescent VIN Supply Current
vs Input Voltage
1400
1200
16
14
12
10
1400
1200
V
= 12V
I
= OPEN
IN
SET
SLEEP
1000
800
600
400
200
1000
800
600
400
200
0
8
6
I
= 100k
= 0V
SET
SHUTDOWN
4
2
0
I
SET
0
40
INPUT VOLTAGE (V)
60 70
0
10 20 30
50
25
35
45
55
5
15
65
75
50
100
R
150
(kΩ)
250
0
200
V
VOLTAGE (V)
IN
ISET
3630a G14
3630a G15
3630a G13
3630af
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For more information www.linear.com/LTC3630A
LTC3630A
Typical perForMance characTerisTics
Quiescent VIN Supply Current
vs Temperature
Switch On-Resistance
vs Input Voltage
Switch On-Resistance
vs Temperature
20
16
12
8
1.6
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
V
= 12V
V
= 12V
IN
IN
1.4
1.2
TOP
SLEEP
1.0
0.8
0.6
0.4
0.2
TOP
BOTTOM
SHUTDOWN
BOTTOM
4
0
0
–25
5
65
95 125 155
–55
35
–55 –25
5
35
65
95 125 155
0
20 30 40 50 60 70
INPUT VOLTAGE (V)
10
TEMPERATURE (°C)
TEMPERATURE (°C)
3630a G18
3630a G16
3630a G17
Switch Leakage Current
vs Temperature
RUN Comparator Threshold
Voltage vs Temperature
Operating Waveforms
1.30
1.25
1.20
1.15
14
12
10
8
V
= 65V
SWITCH
VOLTAGE
50V/DIV
IN
RISING
OUTPUT
VOLTAGE
50mV/DIV
6
4
INDUCTOR
CURRENT
500mA/DIV
SW = 65V
2
FALLING
1.10
1.05
1.00
0
–2
–4
–6
3630a G21
V
V
= 76V
= 5V
10µs/DIV
IN
OUT
SW = 0V
I
= 400mA
LOAD
FIGURE 13 CIRCUIT
65
TEMPERATURE (°C)
125 155
–55 –25
5
35
95
–25
5
65
95 125 155
–55
35
TEMPERATURE (°C)
3630a G20
3630a G19
3630af
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For more information www.linear.com/LTC3630A
LTC3630A
pin FuncTions
SW (Pin 1): Switch Node Connection to Inductor. This
pin connects to the drains of the internal power MOSFET
switches.
SS (Pin 10): Soft-Start Control Input. A capacitor to
ground at this pin sets the output voltage ramp time. A
50µA current initially charges the soft-start capacitor until
switching begins, at which time the current is reduced to
its nominal value of 5µA. The output voltage ramp time
from zero to its regulated value is 1ms for every 16.5nF
of capacitance from SS to GND. If left floating, the ramp
time defaults to an internal 0.8ms soft-start.
NC (Pins 2, 4, 13, 15 DHC Package Only): No Internal
Connection. Leave these pins open.
V
(Pin 3): Main Input Supply Pin. A ceramic bypass
IN
capacitor should be tied between this pin and GND.
RUN (Pin 5): Run Control Input. A voltage on this pin
above 1.21V enables normal operation. Forcing this pin
below0.7VshutsdowntheLTC3630A,reducingquiescent
current to approximately 5µA. Optionally, connect to the
input supply through a resistor divider to set the under-
voltage lockout. An internal 2M resistor and 2µA current
source pulls this pin up to an internal 5V reference. See
Applications Information.
I
(Pin 11): Peak Current Set Input and Voltage Output
SET
Ripple Filter. A resistor from this pin to ground sets the
peak current comparator threshold. Leave floating for the
maximum peak current (1.2A typical) or short to ground
for minimum peak current (0.12A typical). The maximum
outputcurrentisone-halfthepeakcurrent.The5µAcurrent
that is sourced out of this pin when switching, is reduced
to 1µA in sleep. Optionally, a capacitor can be placed from
this pin to GND to trade off efficiency for light load output
voltage ripple. See Applications Information.
V
, V
(Pins 6, 7): Output Voltage Selection. Short
PRG2 PRG1
both pins to ground for an external resistive divider pro-
grammable output voltage. Short V to SS and short
FBO (Pin 12): Feedback Comparator Output. Connect
PRG1
V
to ground for a 5V output voltage. Short V
to
to the V pins of additional LTC3630As to combine the
PRG2
PRG1
FB
ground and short V
to SS for a 3.3V output voltage.
output current. The typical pull-up current is 20µA. The
typical pull- down impedance is 70Ω. See Applications
Information.
PRG2
Short both pins to SS for a 1.8V output voltage.
GND (Pins 8, 14, 16, Exposed Pad Pin 17): Ground. The
exposedbacksidepadmustbesolderedtothePCBground
plane for optimal thermal performance.
V
(Pin 9): Output Voltage Feedback. When configured
FB
for an adjustable output voltage, connect to an external
resistive divider to divide the output voltage down for
comparison to the 0.8V reference. For the fixed output
configuration,directlyconnectthispintotheoutputsupply.
3630af
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For more information www.linear.com/LTC3630A
LTC3630A
block DiagraM
1.3V
V
IN
ACTIVE: 5µA
SLEEP: 1µA
V
3
IN
+
I
SET
11
C
IN
PEAK CURRENT
COMPARATOR
+
–
5V
SLEEP, ACTIVE: 2µA
SHUTDOWN: 0µA
2M
RUN
5
+
LOGIC
AND
L1
1.21V
–
SW
SHOOT-
1
V
OUT
THROUGH
PREVENTION
C
OUT
GND
16
+
–
5V
REVERSE CURRENT
COMPARATOR
20µA
FEEDBACK
COMPARATOR
VOLTAGE
5V
REFERENCE
FBO
START-UP: 50µA
NORMAL: 5µA
0.800V
+
+
–
12
SS
70Ω
10
R1
V
FB
9
7
6
14
8
V
V
PRG1
PRG2
R2
GND
GND
V
V
V
R1
R2
PRG2
PRG1
OUT
17
GND GND ADJUSTABLE 1.0M
∞
IMPLEMENT DIVIDER
EXTERNALLY FOR
ADJUSTABLE VERSION
GND
SS
SS
SS
GND
SS
5V FIXED 4.2M 800k
3.3V FIXED 2.5M 800k
1.8V FIXED 1.0M 800k
3630a BD
3630af
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For more information www.linear.com/LTC3630A
LTC3630A
(Refer to Block Diagram)
operaTion
The LTC3630A is a synchronous step-down DC/DC con-
verter with internal power switches that uses Burst Mode
control. The low quiescent current and high switching
frequency results in high efficiency across a wide range
of load currents. Burst Mode operation functions by using
short“burst”cyclestoswitchtheinductorcurrentthrough
the internal power MOSFETs, followed by a sleep cycle
where the power switches are off and the load current is
supplied by the output capacitor. During the sleep cycle,
the LTC3630A draws only 12µA of supply current. At light
loads, the burst cycles are a small percentage of the total
cycle time which minimizes the average supply current,
greatly improving efficiency. Figure 1 shows an example
of Burst Mode operation. The switching frequency and the
number of switching cycles during Burst Mode operation
are dependent on the inductor value, peak current, load
current, input voltage and output voltage.
reducing the V pin supply current to only 12µA. As the
IN
load current discharges the output capacitor, the voltage
on the V pin decreases. When this voltage falls 5mV
FB
below the 800mV reference, the feedback comparator
trips and enables burst cycles.
At the beginning of the burst cycle, the internal high side
power switch (P-channel MOSFET) is turned on and the
inductor current begins to ramp up. The inductor current
increases until either the current exceeds the peak cur-
rent comparator threshold or the voltage on the V pin
FB
exceeds 800mV, at which time the high side power switch
is turned off and the low side power switch (N-channel
MOSFET)turnson. Theinductorcurrentrampsdownuntil
the reverse current comparator trips, signaling that the
current is close to zero. If the voltage on the V pin is
FB
still less than the 800mV reference, the high side power
switch is turned on again and another cycle commences.
The average current during a burst cycle will normally be
greaterthantheaverageloadcurrent.Forthisarchitecture,
the maximum average output current is equal to half of
the peak current.
SLEEP
CYCLE
SWITCHING
FREQUENCY
BURST
CYCLE
INDUCTOR
CURRENT
The hysteretic nature of this control architecture results
in a switching frequency that is a function of the input
voltage, output voltage, and inductor value. This behavior
provides inherent short-circuit protection. If the output is
shorted to ground, the inductor current will decay very
slowly during a single switching cycle. Since the high side
switchturnsononlywhentheinductorcurrentisnearzero,
the LTC3630A inherently switches at a lower frequency
during start-up or short-circuit conditions.
BURST
FREQUENCY
OUTPUT
VOLTAGE
∆V
3630a F01
OUT
Figure 1. Burst Mode Operation
Main Control Loop
Start-Up and Shutdown
The LTC3630A uses the V
connect internal feedback resistors to the V pin. This
and V
control pins to
PRG2
PRG1
If the voltage on the RUN pin is less than 0.7V, the
LTC3630A enters a shutdown mode in which all internal
circuitry is disabled, reducing the DC supply current to
5µA. When the voltage on the RUN pin exceeds 1.21V,
normal operation of the main control loop is enabled. The
RUN pin comparator has 110mV of internal hysteresis,
and therefore must fall below 1.1V to stop switching and
disable the main control loop.
FB
enables fixed outputs of 1.8V, 3.3V or 5V without increas-
ing component count, input supply current or exposure to
noise on the sensitive input to the feedback comparator.
External feedback resistors (adjustable mode) can still
be used by connecting both V
and V
to ground.
PRG1
PRG2
In adjustable mode the feedback comparator monitors
the voltage on the V pin and compares it to an inter-
nal 800mV reference. If this voltage is greater than the
reference,thecomparatoractivatesasleepmodeinwhich
thepowerswitchesandcurrentcomparatorsaredisabled,
FB
An internal 0.8ms soft-start function limits the ramp rate
oftheoutputvoltageonstart-uptopreventexcessiveinput
supply droop. If a longer ramp time and consequently less
3630af
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For more information www.linear.com/LTC3630A
LTC3630A
(Refer to Block Diagram)
operaTion
supply droop is desired, a capacitor can be placed from
the SS pin to ground. The 5µA current that is sourced
out of this pin will create a smooth voltage ramp on the
capacitor. If this ramp rate is slower than the internal
0.8ms soft-start, then the output voltage will be limited
by the ramp rate on the SS pin instead. The internal and
external soft-start functions are reset on start-up and after
an undervoltage event on the input supply.
which can be greater than 1A. The power dissipation of
the LTC3630A can increase dramatically during dropout
operation especially at input voltages less than 10V. The
increased power dissipation is due to higher potential
output current and increased P-channel MOSFET on-
resistance. See the Thermal Considerations section of the
Applications Information for a detailed example.
Input Voltage and Overtemperature Protection
The peak inductor current is not limited by the internal or
external soft-start functions; however, placing a capacitor
When using the LTC3630A, care must be taken not to
exceed any of the ratings specified in the Absolute Maxi-
mum Ratings section. As an added safeguard, however,
theLTC3630Aincorporatesanovertemperatureshutdown
feature.Ifthejunctiontemperaturereachesapproximately
180°C, the LTC3630A will enter thermal shutdown mode.
Both power switches will be turned off and the SW node
will become high impedance. After the part has cooled
below 160°C, it will restart. The overtemperature level is
not production tested.
from the I pin to ground does provide this capability.
SET
Peak Inductor Current Programming
The peak current comparator nominally limits the peak
inductor current to 1.2A. This peak inductor current can
be adjusted by placing a resistor from the I
pin to
SET
ground. The 5µA current sourced out of this pin through
the resistor generates a voltage that adjusts the peak cur-
rent comparator threshold.
TheLTC3630Acanprovideaprogrammableundervoltage
lockout which can also serve as a precise input voltage
During sleep mode, the current sourced out of the I pin
SET
isreducedto1µA.TheI currentisincreasedbackto5µA
SET
monitor by using a resistive divider from V to GND with
IN
on the first switching cycle after exiting sleep mode. The
the tap connected to the RUN pin. Switching is enabled
when the RUN pin voltage exceeds 1.21V and is disabled
when dropping below 1.1V. Pulling the RUN pin below
700mV forces a low quiescent current shutdown (5µA).
Furthermore, if the input voltage falls below 3.5V typi-
cal (3.7V maximum), an internal undervoltage detector
disables switching.
I
current reduction in sleep mode, along with adding
SET
a filtering capacitor, C , from the I
pin to ground,
ISET
SET
provides a method of reducing light load output voltage
ripple at the expense of lower efficiency and slightly de-
graded load step transient response.
For applications requiring higher output current, the
LTC3630A provides a feedback comparator output pin
(FBO) for combining the output current of multiple
LTC3630As. By connecting the FBO pin of a “master”
When switching is disabled, the LTC3630A can safely
sustain input voltages up to the absolute maximum rating
of 80V. Input supply undervoltage events trigger a soft-
start reset, which results in a graceful recovery from an
input supply transient.
LTC3630AtotheV pinofoneormore“slave”LTC3630As,
FB
the output currents can be combined to source much
more than 500mA.
High Input Voltage Considerations
Dropout Operation
When operating with an input voltage to output voltage
differential of more than 65V, a minimum output load
current of 5mA is required to maintain a well-regulated
output voltage under all operating conditions, including
shutdownmode.Ifthis5mAminimumloadisnotavailable,
then the minimum output voltage that can be maintained
When the input supply decreases toward the output sup-
ply, the duty cycle increases to maintain regulation. The
P-channel MOSFET top switch in the LTC3630A allows
the duty cycle to increase all the way to 100%. At 100%
duty cycle, the P-channel MOSFET stays on continu-
ously, providing output current equal to the peak current,
by the LTC3630A is limited to V – 65V.
IN
3630af
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For more information www.linear.com/LTC3630A
LTC3630A
applicaTions inForMaTion
The basic LTC3630A application circuit is shown on the
frontpageofthedatasheet. Externalcomponentselection
is determined by the maximum load current requirement
andbeginswiththeselectionofthepeakcurrentprogram-
between efficiency and light load output voltage ripple, as
described in the C
Selection section of the Applica-
ISET
tions Information. For maximum efficiency, minimize the
capacitance on the I pin and place the R resistor
SET
ISET
as close to the pin as possible.
ming resistor, R . The inductor value L can then be
ISET
determined, followed by capacitors C and C
.
IN
OUT
Thetypicalpeakcurrentisinternallylimitedtobewithinthe
range of 120mA to 1.2A. Shorting the I pin to ground
SET
Peak Current Resistor Selection
programs the current limit to 120mA, and leaving it float
sets the current limit to the maximum value of 1.2A. When
selecting this resistor value, be aware that the maximum
average output current for this architecture is limited to
halfofthepeakcurrent.Therefore,besuretoselectavalue
that sets the peak current with enough margin to provide
adequate load current under all conditions. Selecting the
peak current to be 2.2 times greater than the maximum
load current is a good starting point for most applications.
The peak current comparator has a guaranteed maximum
current limit of 1A (1.2A typical), which guarantees a
maximum average current of 500mA. For applications
that demand less current, the peak current threshold can
be reduced to as little as 100mA (120mA typical). This
lower peak current allows the use of lower value, smaller
components(inputcapacitor,outputcapacitor,andinduc-
tor), resulting in lower input supply ripple and a smaller
overall DC/DC converter.
Inductor Selection
The threshold can be easily programmed using a resis-
The inductor, input voltage, output voltage, and peak
current determine the switching frequency during a burst
cycle of the LTC3630A. For a given input voltage, output
voltage, and peak current, the inductor value sets the
switching frequency during a burst cycle when the output
is in regulation. Generally, switching between 50kHz and
250kHz yields high efficiency, and 200kHz is a good first
choice for many applications. The inductor value can be
determined by the following equation:
tor (R ) between the I pin and ground. The voltage
ISET
SET
pin by R
generated on the I
and the internal 5µA
SET
ISET
current source sets the peak current. The voltage on the
I
pin is internally limited within the range of 0.1V to
SET
1.0V. Thevalueofresistorforaparticularpeakcurrentcan
be selected by using Figure 2 or the following equation:
6
R
ISET
= I
• 0.2 • 10
PEAK
where 100mA < I
< 1A.
PEAK
VOUT
f •I
V
V
The internal 5μA current source is reduced to 1μA in sleep
mode to maximize efficiency and to facilitate a trade-off
OUT
L =
• 1–
PEAK
IN
220
200
180
160
140
120
100
80
The variation in switching frequency during a burst cycle
withinputvoltageandinductanceisshowninFigure3. For
lower values of I
, multiply the frequency in Figure 3
PEAK
by 1.2A/I
.
PEAK
An additional constraint on the inductor value is the
LTC3630A’s 150ns minimum on-time of the high side
switch.Therefore,inordertokeepthecurrentintheinductor
60
40
20
0
50
150 200 250 300 350 400 450 500
100
MAXIMUM LOAD CURRENT (mA)
3630a F02
Figure 2. RISET Selection
3630af
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LTC3630A
applicaTions inForMaTion
600
1000
100
10
V
= 3.3V
OUT
L = 4.2µH
I
OPEN
SET
500
400
300
200
100
0
L = 10µH
L = 22µH
L = 47µH
L = 100µH
20 30 40 50
0
10
60 70
100
1000
V
INPUT VOLTAGE (V)
PEAK INDUCTOR CURRENT (mA)
IN
3630a F03
3630a F04
Figure 4. Recommended Inductor Values for Maximum Efficiency
Figure 3. Switching Frequency for VOUT = 3.3V
well-controlled, the inductor value must be chosen so that
it is larger than a minimum value which can be computed
as follows:
Inductor Core Selection
Once the value for L is known, the type of inductor must
be selected. High efficiency converters generally cannot
affordthecorelossfoundinlowcostpowderedironcores,
forcing the use of the more expensive ferrite cores. Actual
core loss is independent of core size for a fixed inductor
value but is very dependent of the inductance selected.
As the inductance increases, core losses decrease. Un-
fortunately, increased inductance requires more turns of
wire and therefore copper losses will increase.
V
IN(MAX) • tON(MIN)
L >
•1.2
IPEAK
whereV
isthemaximuminputsupplyvoltagewhen
IN(MAX)
switching is enabled, t
is 150ns, I
is the peak
ON(MIN)
PEAK
current, and the factor of 1.2 accounts for typical inductor
tolerance and variation over temperature. Inductor values
that violate the above equation will cause the peak current
toovershootandpermanentdamagetothepartmayoccur.
Ferrite designs have very low core losses and are pre-
ferred at high switching frequencies, so design goals
can concentrate on copper loss and preventing satura-
tion. Ferrite core material saturates “hard,” which means
that inductance collapses abruptly when the peak design
current is exceeded. This results in an abrupt increase in
inductor ripple current and consequently output voltage
ripple. Do not allow the core to saturate!
Although the above equation provides the minimum in-
ductor value, higher efficiency is generally achieved with
a larger inductor value, which produces a lower switching
frequency. Theinductorvaluechosen should also belarge
enoughtokeeptheinductorcurrentfromgoingverynega-
tivewhichismoreofaconcernathigherV
(>~12V).For
OUT
agiveninductortype,however,asinductanceisincreased,
DC resistance (DCR) also increases. Higher DCR trans-
lates into higher copper losses and lower current rating,
both of which place an upper limit on the inductance. The
recommended range of inductor values for small surface
mount inductors as a function of peak current is shown
inFigure4.Thevaluesinthisrangeareagoodcompromise
between the trade-offs discussed above. For applications
where board area is not a limiting factor, inductors with
largercorescanbeused,whichextendstherecommended
range of Figure 4 to larger values.
Different core materials and shapes will change the size/
currentandprice/currentrelationshipofaninductor.Toroid
or shielded pot cores in ferrite or permalloy materials are
small and do not radiate energy but generally cost more
than powdered iron core inductors with similar charac-
teristics. The choice of which style inductor to use mainly
depends on the price versus size requirements and any
radiated field/EMI requirements. New designs for surface
mount inductors are available from Coiltronics, Coilcraft,
TDK, Toko, and Sumida.
3630af
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For more information www.linear.com/LTC3630A
LTC3630A
applicaTions inForMaTion
C and C
Selection
Theoutputrippleisamaximumatnoloadandapproaches
IN
OUT
lower limit of V /160 at full load. Choose the output
OUT
The input capacitor, C , is needed to filter the trapezoidal
IN
capacitor C
to limit the output voltage ripple ∆V
OUT
OUT
current at the source of the top high side MOSFET. C
IN
using the following equation:
should be sized to provide the energy required to charge
–6
the inductor without causing a large decrease in input
I
• 2 • 10
PEAK
C
≥
OUT
voltage (∆V ). The relationship between C and ∆V
IN
IN
IN
V
OUT
∆V
–
OUT
is given by:
160
2
L •IPEAK
The value of the output capacitor must be large enough
to accept the energy stored in the inductor without a large
change in output voltage during a single switching cycle.
CIN >
2 • V • ∆V
IN
IN
It is recommended to use a larger value for C than calcu-
IN
Setting this voltage step equal to 1% of the output voltage,
the output capacitor must be:
lated by the above equation since capacitance decreases
with applied voltage. In general, a 4.7µF X7R ceramic
capacitor is a good choice for C in most LTC3630A
IN
2
I
applications.
PEAK
C
> 50 • L •
OUT
V
OUT
To minimize large ripple voltage, a low ESR input capaci-
tor sized for the maximum RMS current should be used.
RMS current is given by:
Typically, a capacitor that satisfies the voltage ripple re-
quirementisadequatetofiltertheinductorripple. To avoid
overheating, the output capacitor must also be sized to
handle the ripple current generated by the inductor. The
worst-case ripple current in the output capacitor is given
VOUT
V
IN
V
IN
VOUT
IRMS =IOUT(MAX)
•
•
– 1
by I
= I /2. Multiple capacitors placed in parallel
PEAK
RMS
This formula has a maximum at V = 2V , where I =
RMS
IN
OUT
maybeneededtomeettheESRandRMScurrenthandling
requirements.
I
/2.Thissimpleworst-caseconditioniscommonlyused
OUT
fordesignbecauseevensignificantdeviationsdonotoffer
muchrelief.Notethatripplecurrentratingsfromcapacitor
manufacturers are often based only on 2000 hours of life
which makes it advisable to further derate the capacitor,
or choose a capacitor rated at a higher temperature than
required.Severalcapacitorsmayalsobeparalleledtomeet
size or height requirements in the design.
Dry tantalum, special polymer, aluminum electrolytic,
and ceramic capacitors are all available in surface mount
packages. Special polymer capacitors offer very low ESR
but have lower capacitance density than other types.
Tantalum capacitors have the highest capacitance density
but it is important only to use types that have been surge
tested for use in switching power supplies. Aluminum
electrolytic capacitors have significantly higher ESR but
can be used in cost-sensitive applications provided that
consideration is given to ripple current ratings and long-
termreliability.CeramiccapacitorshaveexcellentlowESR
characteristics but can have high voltage coefficient and
audible piezoelectric effects. The high quality factor (Q)
of ceramic capacitors in series with trace inductance can
also lead to significant input voltage ringing.
The output capacitor, C , filters the inductor’s ripple
OUT
current and stores energy to satisfy the load current when
the LTC3630A is in sleep. The output ripple has a lower
limit of V /160 due to the 5mV typical hysteresis of the
OUT
feedback comparator. The time delay of the comparator
adds an additional ripple voltage that is a function of
the load current. During this delay time, the LTC3630A
continues to switch and supply current to the output. The
output ripple can be approximated by:
IPEAK
2
4 •10–6 VOUT
∆VOUT
≈
–I
LOAD
•
+
COUT
160
3630af
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LTC3630A
applicaTions inForMaTion
Ceramic Capacitors and Audible Noise
voltage, connect V
to SS and V
to GND. For 3.3V,
PRG1
to GND and V
PRG2
connect V
to SS. For 1.8V, connect
PRG1
PRG2
Higher value, lower cost ceramic capacitors are now be-
coming available in smaller case sizes. Their high ripple
current, high voltage rating, and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input and
thepowerissuppliedbyawalladapterthroughlongwires,
a load step at the output can induce ringing at the input,
both V
and V
to SS. For any of the fixed output
PRG1
PRG2
voltage options, directly connect the V pin to V
.
FB
OUT
For the adjustable output mode (V
the output voltage is set by an external resistive divider
according to the following equation:
= 0V, V
= 0V),
PRG1
PRG2
R1
R2
VOUT = 0.8V • 1+
V . At best, this ringing can couple to the output and be
IN
mistaken as loop instability. At worst, a sudden inrush
The resistive divider allows the V pin to sense a fraction
FB
of current through the long wires can potentially cause
of the output voltage as shown in Figure 6. The output
a voltage spike at V large enough to damage the part.
IN
voltage can range from 0.8V to V . Be careful to keep the
IN
divider resistors very close to the V pin to minimize the
For application with inductive source impedance, such as
alongwire,anelectrolyticcapacitororaceramiccapacitor
with a series resistor may be required in parallel with C
to dampen the ringing of the input supply. Figure 5 shows
this circuit and the typical values required to dampen the
ringing.
FB
trace length and noise pick-up on the sensitive V signal.
FB
IN
To minimize the no-load supply current, resistor values in
the megohm range may be used; however, large resistor
values should be used with caution. The feedback divider
is the only load current when in shutdown. If PCB leakage
currenttotheoutputnodeorswitchnodeexceedstheload
current, the output voltage will be pulled up. In normal
operation, this is generally a minor concern since the load
current is much greater than the leakage.
Ceramic capacitors are also piezoelectric sensitive. The
LTC3630A’s burst frequency depends on the load current,
and in some applications at light load the LTC3630A can
excite the ceramic capacitor at audio frequencies, gen-
erating audible noise. If the noise is unacceptable, use
a high performance tantalum or electrolytic capacitor at
the output.
To avoid excessively large values of R1 in high output volt-
age applications (V
≥ 10V), a combination of external
OUT
and internal resistors can be used to set the output volt-
age. This has an additional benefit of increasing the noise
Output Voltage Programming
immunity on the V pin. Figure 7 shows the LTC3630A
FB
The LTC3630A has three fixed output voltage modes that
with the V pin configured for a 5V fixed output with an
FB
can be selected with the V
and V
pins and an
external divider to generate a higher output voltage. The
internal 5M resistance appears in parallel with R2, and
the value of R2 must be adjusted accordingly. R2 should
be chosen to be less than 200k to keep the output volt-
age variation less than 1% due to the tolerance of the
LTC3630A’s internal resistor.
PRG1
PRG2
adjustable mode. The fixed output modes use an internal
feedback divider which enables higher efficiency, higher
noise immunity, and lower output voltage ripple for 5V,
3.3V and 1.8V applications. To select the fixed 5V output
L
LTC3630A
IN
V
OUT
V
IN
R1
LIN
CIN
R=
0.8V
3630a F05
V
FB
C
IN
LTC3630A
R2
4 • C
IN
V
V
PRG1
PRG2
3630a F06
Figure 5. Series RC to Reduce VIN Ringing
Figure 6. Setting the Output Voltage with External Resistors
3630af
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LTC3630A
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V
OUT
application circuit. To keep the variation of the rising V
IN
UVLO threshold to less than 5% due to the internal pull-
up circuitry, the following equations should be used to
calculate R3 and R4:
R1
LTC3630A
V
5V
FB
4.2M
R2
0.8V
RisingV UVLOThreshold
IN
800k
R3 ≤
40µA
SS
PRG1
PRG2
V
V
R3 •1.21V
R4 =
3630a F07
RisingV UVLOThreshold– 1.21V+R3 • 4µA
IN
Figure 7. Setting the Output Voltage with
External and Internal Resistors
The falling UVLO threshold will be about 10% lower than
therisingV UVLOthresholdduetothe110mVhysteresis
IN
RUN Pin and External Input Undervoltage Lockout
of the RUN comparator.
The RUN pin has two different threshold voltage levels.
Pulling the RUN pin below 0.7V puts the LTC3630A into a
low quiescent current shutdown mode (I ~ 5µA). When
theRUNpinisgreaterthan1.21V,thecontrollerisenabled.
Figure 8 shows examples of configurations for driving the
RUN pin from logic.
For applications that do not require a precise UVLO, the
RUNpincanbeleftfloating.Inthisconfiguration,theUVLO
Q
threshold is limited to the internal V UVLO thresholds as
IN
shown in the Electrical Characteristics table.
Be aware that the RUN pin cannot be allowed to exceed
its absolute maximum rating of 6V. To keep the voltage
on the RUN pin from exceeding 6V, the following relation
should be satisfied:
The RUN pin can alternatively be configured as a precise
undervoltage (UVLO) lockout on the V supply with a
IN
resistive divider from V to ground. A simple resistive
IN
V
< 4.5 • Rising V UVLO Threshold
IN
divider can be used as shown in Figure 9 to meet specific
IN(MAX)
V voltage requirements.
IN
To support a V
greater than 4.5x the external UVLO
IN(MAX)
threshold, an external 4.7V Zener diode should be used
in parallel with R4. See Figure 11.
The current that flows through the R3-R4 divider will
directly add to the shutdown, sleep, and active current
of the LTC3630A, and care should be taken to minimize
the impact of this current on the overall efficiency of the
Soft-Start
Soft-start is implemented by ramping the effective refer-
ence voltage from 0V to 0.8V. To increase the duration of
soft-start, place a capacitor from the SS pin to ground.
An internal 5µA pull-up current will charge this capacitor.
The value of the soft-start capacitor can be calculated by
the following equation:
SUPPLY
LTC3630A
RUN
LTC3630A
RUN
3630a F08
Figure 8. RUN Pin Interface to Logic
5µA
CSS = Soft-Start Time •
0.35V
5V
LTC3630A
V
The minimum soft-start time is limited to the internal soft-
start timer of 0.8ms. When the LTC3630A detects a fault
condition(inputsupplyundervoltageorovertemperature)
or when the RUN pin falls below 1.1V, the SS pin is quickly
pulled to ground and the internal soft-start timer is reset.
This ensures an orderly restart when using an external
IN
SLEEP, ACTIVE: 2µA
SHUTDOWN: 0µA
2M
R3
R4
RUN
3630a F09
Figure 9. Adjustable UV Lockout
soft-start capacitor.
3630af
15
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L1
V
5V
1A
OUT
Note that the soft-start capacitor may not be the limiting
factor in the output voltage ramp. The maximum output
current, which is equal to half the peak current, must
charge the output capacitor from 0V to its regulated value.
For small peak currents or large output capacitors, this
ramptimecanbesignificant.Therefore,theoutputvoltage
V
SW
LTC3630A
(MASTER)
V
IN
IN
C
OUT
C
IN
R3
R4
V
FB
RUN
SS
C
SS
V
PRG1
V
PRG2
I
FBO
SET
ramp time from 0V to the regulated V
to a minimum of:
value is limited
OUT
V
V
FB
IN
LTC3630A
2 •COUT
IPEAK
(SLAVE)
L2
Ramp Time ≥
VOUT
SW
SS
RUN
V
V
PRG1
PRG2
C
Selection
ISET
I
FBO
SET
3630a F10
Once the peak current resistor, R , and inductor are se-
ISET
lectedtomeettheloadcurrentandfrequencyrequirements,
Figure 10. 5V, 1A Regulator
an optional capacitor, C , can be added in parallel with
ISET
R
ISET
. This will boost efficiency at mid-loads and reduce
by the master, the SS pin of the slave should have minimal
capacitanceandtheRUNpinoftheslaveshouldbefloating.
Furthermore, slaves should be configured for a 1.8V fixed
theoutputvoltagerippledependencyonloadcurrentatthe
expenseofslightlydegradedloadsteptransientresponse.
output (V
= V = SS) to set the V pin threshold at
PRG2 FB
The peak inductor current is controlled by the voltage on
PRG1
1.8V. The inductors L1 and L2 do not necessarily have to
be the same, but should both meet the criteria described
above in the Inductor Selection section.
the I
pin. Current out of the I
pin is 5µA while the
SET
SET
LTC3630Aisswitchingandisreducedto1µAduringsleep
mode. The I current will return to 5µA on the first cycle
SET
after sleep mode. Placing a parallel RC from the I pin to
SET
Efficiency Considerations
ground filters the I voltage as the LTC3630A enters and
SET
exits sleep mode which in turn will affect the output volt-
Theefficiencyofaswitchingregulatorisequaltotheoutput
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
ageripple, efficiencyandloadsteptransientperformance.
In general, when R
is greater than 120k a C
ca-
ISET
ISET
pacitor in the 100pF to 200pF range will improve most
performance parameters. When R
the capacitance on the I pin should be minimized.
is less than 100k,
ISET
SET
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Higher Current Applications
For applications that require more than 500mA, the
LTC3630A provides a feedback comparator output pin
(FBO) for driving additional LTC3630As. When the FBO
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of
2
the losses: V operating current and I R losses. The V
pin of a “master” LTC3630A is connected to the V pin
IN
IN
FB
operating current dominates the efficiency loss at very
of one or more “slave” LTC3630As, the master controls
2
low load currents whereas the I R loss dominates the
the burst cycle of the slaves.
efficiency loss at medium to high load currents.
Figure 10 shows an example of a 5V, 1A regulator using
two LTC3630As. The master is configured for a 5V fixed
output with external soft-start and the V UVLO level is
set by the RUN pin. Since the slaves are directly controlled
1. The V operating current comprises two components:
IN
The DC supply current as given in the electrical charac-
IN
teristics and the internal MOSFET gate charge currents.
3630af
16
For more information www.linear.com/LTC3630A
LTC3630A
applicaTions inForMaTion
The gate charge current results from switching the gate
capacitance of the internal power MOSFET switches.
Each time the gate is switched from high to low to
is the thermal resistance from the junction of the die to
the ambient temperature.
The junction temperature is given by:
T = T + T
high again, a packet of charge, ∆Q, moves from V to
IN
ground. The resulting ∆Q/dt is the current out of V
J
A
R
IN
that is typically larger than the DC bias current.
Generally, the worst-case power dissipation is in dropout
atlowinputvoltage.Indropout,theLTC3630Acanprovide
a DC current as high as the full 1.2A peak current to the
output. At low input voltage, this current flows through a
higher resistance MOSFET, which dissipates more power.
2
2. I R losses are calculated from the resistances of the
internal switches, R and external inductor R . When
SW
L
switching, the average output current flowing through
the inductor is “chopped” between the high side PMOS
switch and the low side NMOS switch. Thus, the series
resistance looking back into the switch pin is a function
As an example, consider the LTC3630A in dropout at an
input voltage of 5V, a load current of 500mA and an ambi-
ent temperature of 85°C. From the Typical Performance
of the top and bottom switch R
values and the
DS(ON)
duty cycle (DC = V /V ) as follows:
OUT IN
graphs of Switch On-Resistance, the R
of the top
DS(ON)
switch at V = 5V and 100°C is approximately 1.9Ω.
R
SW
= (R )DC + (R ) • (1 – DC)
DS(ON)TOP DS(ON)BOT
IN
Therefore, the power dissipated by the part is:
The R
for both the top and bottom MOSFETs can
DS(ON)
2
2
P = (I
) • R
= (500mA) • 1.9Ω = 0.475W
be obtained from the Typical Performance Characteris-
D
LOAD
DS(ON)
2
tics curves. Thus, to obtain the I R losses, simply add
For the MSOP package the θ is 45°C/W. Thus, the junc-
JA
R
to R and multiply the result by the square of the
SW
L
tion temperature of the regulator is:
average output current:
45°C
W
2
2
TJ = 85°C+0.475W •
= 106.4°C
I R Loss = I (R + R )
O
SW
L
Other losses, including C and C
ESR dissipative
OUT
IN
which is below the maximum junction temperature of
150°C.
losses and inductor core losses, generally account for
less than 2% of the total power loss.
Note that the while the LTC3630A is in dropout, it can
provide output current that is equal to the peak current
of the part. This can increase the chip power dissipation
dramatically and may cause the internal overtemperature
protection circuitry to trigger at 180°C and shut down
the LTC3630A.
Thermal Considerations
In most applications, the LTC3630A does not dissipate
much heat due to its high efficiency. But, in applications
where the LTC3630A is running at high ambient tempera-
ture with low supply voltage and high duty cycles, such
as dropout, the heat dissipated may exceed the maximum
junction temperature of the part.
Design Example
As a design example, consider using the LTC3630A in an
To prevent the LTC3630A from exceeding the maximum
junctiontemperature,theuserwillneedtodosomethermal
analysis. The goal of the thermal analysis is to determine
whetherthepowerdissipatedexceedsthemaximumjunc-
tion temperature of the part. The temperature rise from
ambient to junction is given by:
application with the following specifications: V = 24V,
IN
V
= 80V, V
= 3.3V, I
= 500mA, f = 200kHz.
Furthermore, assume for this example that switching
IN(MAX)
OUT
OUT
should start when V is greater than 12V.
IN
First, calculate the inductor value that gives the required
switching frequency:
T = P • θ
JA
R
D
3.3V
200kHz •1.2A
3.3V
24V
L =
• 1–
≅ 10µH
where P is the power dissipated by the regulator and θ
D
JA
3630af
17
For more information www.linear.com/LTC3630A
LTC3630A
applicaTions inForMaTion
Next, verify that this value meets the L
For this input voltage and peak current, the minimum
inductor value is:
requirement.
MIN
12V
40µA
R3 = 200kwhichis ≤
200k •1.21V
12V – 1.21V+200k • 4µA
24V •150ns
R4 =
= 20.9k
LMIN
=
≅ 3µH
1.2A
Choose standard values for R3 = 200k, R4 = 21k. Note
Therefore, the minimum inductor requirement is satisfied
and the 10μH inductor value may be used.
that the V falling threshold will be 10% less than the
IN
rising threshold or 11V.
Next,C andC
areselected.Forthisdesign,C should
IN
IN
OUT
SincethemaximumV ismorethan4.5xtheUVLOthresh-
be sized for a current rating of at least:
IN
old, a 4.7V Zener diode in parallel with R4 is required to
keep the maximum voltage on the RUN pin less than the
absolute maximum of 6V.
3.3V
24V
24V
3.3V
IRMS = 500mA •
•
– 1≅ 175mARMS
The I pin should be left open in this example to select
The value of C is selected to keep the input from droop-
SET
IN
maximum peak current (1.2A typical). Figure 11 shows a
ing less than 240mV (1%):
complete schematic for this design example.
10µH•1.2A2
2 • 24V • 240mV
CIN >
≅ 2.2µF
10µH
V
OUT
V
IN
3.3V
V
SW
LTC3630A
IN
24V
500mA
200k
C
will be selected based on a value large enough to
OUT
V
FB
RUN
FBO
satisfy the output voltage ripple requirement. For a 50mV
output ripple, the value of the output capacitor can be
calculated from:
SS
47µF
2.2µF
4.7V
V
V
PRG2
21k
PRG1
I
SET
GND
10µH•1.2A2
2 • 3.3V • 50mV
3630a F11
COUT
>
≅ 47µF
Figure 11. 24V to 3.3V, 500mA Regulator at 200kHz
C
also needs an ESR that will satisfy the output voltage
OUT
ripple requirement. The required ESR can be calculated
from:
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3630A. Check the following in your layout:
50mV
ESR <
≅ 40mΩ
1.2A
1. Largeswitchedcurrentsflowinthepowerswitchesand
input capacitor. The loop formed by these components
should be as small as possible. A ground plane is rec-
ommended to minimize ground impedance.
A 47µF ceramic capacitor has significantly less ESR than
40mΩ.
Since an output voltage of 3.3V is one of the standard
output configurations, the LTC3630A can be configured
2. Connect the (+) terminal of the input capacitor, C , as
by connecting V
to ground and V
to the SS pin.
IN
PRG1
PRG2
close as possible to the V pin. This capacitor provides
IN
TheundervoltagelockoutrequirementonV canbesatis-
IN
the AC current into the internal power MOSFETs.
fied with a resistive divider from V to the RUN pin (refer
IN
3. Keep the switching node, SW, away from all sensitive
smallsignalnodes.Therapidtransitionsontheswitching
node can couple to high impedance nodes, in particular
to Figure 9). Calculate R3 and R4 as follows:
V , and create increased output ripple.
FB
3630af
18
For more information www.linear.com/LTC3630A
LTC3630A
applicaTions inForMaTion
4. Flood all unused area on all layers with copper except
for the area under the inductor. Flooding with copper
will reduce the temperature rise of power components.
DHCpackage may not provide sufficient PC board trace
clearance between high and low voltage pins in some
higher voltage applications. In applications where clear-
ance is required, the MSE16 package should be used. The
MSE16packagehasremovedpinsbetweenalltheadjacent
high voltage and low voltage pins, providing 0.657mm
clearance which will be sufficient for most applications.
For more information, refer to the printed circuit board
design standards described in IPC-2221 (www.ipc.org).
You can connect the copper areas to any DC net (V ,
IN
V
, GND, or any other DC rail in your system).
OUT
Pin Clearance/Creepage Considerations
The LTC3630A is available in two packages (MSE16
and DHC) both with identical functionality. However, the
0.2mm (minimum space) between pins and paddle on the
L1
L1
V
IN
V
33µH
V
V
SW
OUT
IN
OUT
5V
V
IN
V
SW
LTC3630A
IN
5V TO 76V
R3
R4
R1
R2
C
C
OUT
IN
500mA
100µF
4.7µF
V
FB
RUN
RUN
V
FB
×2
LTC3630A
R
C
ISET
I
SET
SS
C
R
ISET
ISET
I
SET
100pF
220k
ISET
C
IN
C
OUT
FBO
V
V
PRG1
PRG2
GND
C
SS
3630a F13
FBO
SS
V
PRG2
V
PRG1
C
: TDK C5750X7R2A-475M
OUT
IN
C
: 2 × AVX 1812D107MAT
L1: SUMIDA CDRH105RNP-330N
Figure 13. 5V to 76V Input to 5V Output,
High Efficiency, 500mA Regulator
GND
L1
V
OUT
C
IN
C
OUT
V
IN
GND
VIAS TO GROUND PLANE
3630a F12
OUTLINE OF LOCAL GROUND PLANE
Figure 12. Example PCB Layout
3630af
19
For more information www.linear.com/LTC3630A
LTC3630A
Typical applicaTions
4V to 24V Input to 3.3V Output,
Efficiency and Power Loss vs Load Current
250mA Regulator with External Soft-Start, Small Size
100
V
= 12V
IN
L1
90
80
70
60
50
40
30
20
10
0
10µH
EFFICIENCY
V
OUT
V
IN
1000
100
10
3.3V
V
SW
LTC3630A
IN
4V TO 24V
C
C
OUT
IN
250mA
2.2µF
10µF
V
FB
RUN
I
SET
SS
R
ISET
C
SS
100k
FBO
V
PRG2
V
PRG1
100nF
POWER LOSS
3630a TA02a
GND
1
C
C
: MURATA GRM42-2X7R225K25D500
IN
0.1
: KEMET C1206C206K9PAC
OUT
0.1
1
10
100
L1: VISHAY IHLP2020BZ-100M-11
LOAD CURRENT (mA)
3630a TA02b
4V to 63V Input to –12V Output, Positive-to-Negative Converter
Maximum Load Current vs Input Voltage
500
L1
22µH
V
= –12V
OUT
V
IN
V
SW
LTC3630A
RUN
IN
4V TO 63V
R1
400
300
C
IN
200k
4.7µF
V
FB
C
OUT
R2
147k
I
SS
SET
22µF
FBO
V
V
PRG1
PRG2
200
100
0
GND
V
OUT
–12V
3630a TA03a
C
C
: KEMET C1210C475K5RAC
IN
OUT
: TDK C4532X7R1C226M
L1: WÜRTH 744-711-422-0
5
10 15 20 25 30 35 40 45 50 55 60
INPUT VOLTAGE (V)
3630a TA03b
3630af
20
For more information www.linear.com/LTC3630A
LTC3630A
Typical applicaTions
5V to 76V Input to 5V Output,150mA Regulator
with 20kHz Minimum Burst Frequency
Burst Frequency vs Load Current
L1
60
50
40
30
20
10
0
33µH
V
V
= 12V
OUT
IN
V
IN
V
SW
LTC3630A
RUN
5V
IN
5V TO 76V
C
C
OUT
150mA
IN
2.2µF
10µF
V
FB
30.1Ω
SS
I
SET
V
V
PRG2 PRG1
FBO
R
ISET
IN
OUT
60.4k
GND
20kHz LIMIT
LTC6994-1
+
V
976k
NO LIMIT
1
SET
DIV
C
C
: TDK C3225X7R2AA225M
: AVX 12063D106KAT
IN
OUT
196k
100k
GND
L1: COOPER BUSSMAN SD25-330
0
10
100
3630a TA04
LOAD CURRENT (mA)
3630a TA04b
24.5V to 76V Input to 24V Output with 150mA Input Current Limit
Maximum Input and Load Current vs Input Voltage
L1
22µH
500
V
V
IN
OUT
V
SW
LTC3630A
IN
24.5V TO 76V
24V
C
IN
C
OUT
22µF
R1
200k
400
2.2µF
MAXIMUM LOAD CURRENT
R3
806k
RUN
V
FB
R2
53.6k
I
SS
300
200
SET
R4
7.5k
V
V
FBO
PRG1
PRG2
GND
3630a TA05
MAXIMUM INPUT CURRENT
100
C
C
: TDK C3225X7R2A225M
IN
: TAIYO YUDEN EMK316BJ226ML-T
OUT
0
L1:TDK SLF10145T-220M1R9
25 30 35 40 45 50 55 60 65 70 75
INPUT VOLTAGE (V)
3630a TA05b
VOUT
2
R4
R3+R4
INPUT CURRENT LIMIT ≈
•
V
2
R4
R3+R4
IN
MAXIMUM LOAD CURRENT ≈
•
3630af
21
For more information www.linear.com/LTC3630A
LTC3630A
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MSE Package
Variation: MSE16 (12)
16-Lead Plastic MSOP with 4 Pins Removed
Exposed Die Pad
(Reference LTC DWG # 05-08-1871 Rev C)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
1
8
0.35
REF
5.23
(.206)
MIN
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102
(.065 ±.004)
3.20 – 3.45
(.126 – .136)
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
DETAIL “B”
16
9
0.305 ±0.038
0.50
NO MEASUREMENT PURPOSE
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
(.0120 ±.0015)
(.0197)
1.0
(.039)
BSC
TYP
BSC
0.280 ±0.076
(.011 ±.003)
16 14 121110
9
RECOMMENDED SOLDER PAD LAYOUT
REF
DETAIL “A”
0.254
(.010)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
0° – 6° TYP
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
1
3 5 6 7 8
1.0
DETAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
(.039)
BSC
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE16(12)) 0911 REV C
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
3630af
22
For more information www.linear.com/LTC3630A
LTC3630A
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DHC Package
16-Lead Plastic DFN (5mm × 3mm)
(Reference LTC DWG # 05-08-1706 Rev Ø)
0.65 ±0.05
3.50 ±0.05
1.65 ±0.05
2.20 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
4.40 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
TYP
0.40 ±0.10
5.00 ±0.10
(2 SIDES)
9
16
R = 0.20
TYP
3.00 ±0.10
(2 SIDES)
1.65 ±0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PIN 1
NOTCH
(DHC16) DFN 1103
8
1
0.25 ±0.05
0.75 ±0.05
0.200 REF
0.50 BSC
4.40 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3630af
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
23
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC3630A
Typical applicaTion
4V to 76V Input to 3.3V Output, 500mA Step-Down Converter
L1
10µH
V
OUT
V
IN
3.3V
V
SW
LTC3630A
RUN
IN
4V TO 76V
C
IN
C
500mA
OUT
2.2µF
47µF
V
FB
SS
V
PRG1
V
PRG2
FBO
I
SET
GND
3630a TA06
C
C
: TDK CGA6N3X7R2A225K
IN
: MURATA GCM32ER70J476KE19L
OUT
L1: COILCRAFT MSS1038T-103
relaTeD parTs
PART NUMBER DESCRIPTION
COMMENTS
V : 4V to 65V, V
LTC3630
LTC3642
LTC3631
LTC3632
LTC3103
LTC3104
LT3970
65V 500mA Synchronous Step-Down
DC/DC Converter
= 0.8V, I = 12µA, I = 5µA,
OUT(MIN) Q SD
IN
3mm × 5mm DFN-8, MSOP-16E
45V (Transient to 60V) 50mA Synchronous Step-Down
DC/DC Converter
V : 4.5V to 45V, V = 0.8V, I = 12µA, I = 3µA,
IN
OUT(MIN)
Q
SD
3mm × 3mm DFN-8, MSOP-8
45V (Transient to 60V) 100mA Synchronous Step-Down
DC/DC Converter
V : 4.5V to 45V, V = 0.8V, I = 12µA, I = 3µA,
IN
OUT(MIN)
Q
SD
3mm × 3mm DFN-8, MSOP-8
50V (Transient to 60V) 20mA Synchronous Step-Down
DC/DC Converter
V : 4.5V to 50V, V = 0.8V, I = 12µA, I = 3µA,
IN
OUT(MIN)
Q
SD
3mm × 3mm DFN-8, MSOP-8
15V, 300mA Synchronous Step-Down DC/DC Converter
with Ultralow Quiescent Current
V : 2.5V to 15V, V = 0.6V, I = 1.8µA, I = 1µA,
IN
OUT(MIN)
Q
SD
3mm × 3mm DFN-10, MSOP-10E
15V, 300mA Synchronous Step-Down DC/DC Converter
with Ultralow Quiescent Current and 10mA LDO
V : 2.5V to 15V, V = 0.6V, I = 2.6µA, I = 1µA,
IN
OUT(MIN)
Q
SD
4mm × 3mm DFN-14, MSOP-16E
40V, 350mA, 2.2MHz High Efficiency Micropower Step-Down V : 4.2V to 40V, V
= 1.21V, I = 2.5µA, I < 1µA,
IN
OUT(MIN)
Q
SD
DC/DC Converter with I = 2.5µA
3mm × 2mm DFN-10, MSOP-10
62V, 350mA, 2.2MHz High Efficiency Micropower Step-Down V : 4.2V to 62V, V = 1.21V, I = 2.5µA, I < 1µA,
IN OUT(MIN)
Q
LT3990
Q
SD
DC/DC Converter with I = 2.5µA
3mm × 3mm DFN-10, MSOP-16E
Q
LT3971
38V, 1.2A, 2.2MHz High Efficiency Micropower Step-Down
V : 4.3V to 38V, V = 1.19V, I = 2.8µA, I < 1µA,
IN
OUT(MIN)
Q
SD
DC/DC Converter with I = 2.8µA
3mm × 3mm DFN-10, MSOP-10E
Q
LT3991
55V, 1.2A, 2.2MHz High Efficiency Micropower Step-Down
V : 4.3V to 55V, V = 1.19V, I = 2.8µA, I < 1µA,
IN
OUT(MIN)
Q
SD
DC/DC Converter with I = 2.8µA
3mm × 3mm DFN-10, MSOP-10E
Q
LT3682
36V, 60V
, 1A, 2.2MHz High Efficiency Micropower
MAX
V : 3.6V to 36V, V = 0.8V, I = 75µA, I < 1µA,
IN
OUT(MIN)
Q
SD
Step-Down DC/DC Converter
3mm × 3mm DFN-12
LTC3891
Low I , 60V Synchronous Step-Down Controller
V : 4V to 60V, V
= 0.8V, I = 50µA, I = 14µA,
OUT(MIN) Q SD
Q
IN
3mm × 4mm QFN-20, TSSOP-20E
3630af
LT 0513 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
24
●
●
LINEAR TECHNOLOGY CORPORATION 2013
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTC3630A
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