LTC3636-1_技术文档

LTC3636/LTC3636-1

Dual Channel 6A, 20V

Monolithic Synchronous

Step-Down Regulator

FEATURES

DESCRIPTION

TheLTC^®3636/LTC3636-1isahighefﬁciency,dual-channel

monolithicsynchronousbuckregulatorusingacontrolled

on-time current mode architecture, with phase lockable

switchingfrequency.Theoperatingsupplyvoltagerangeis

from 3.1V to 20V, making it suitable for lithium-ion battery

stacks as well as point of load power supply applications

from a 12V or 5V input.

n

Wide V Range: 3.1V to 20V

IN

n

Wide V

Range:

OUT

0.6V to 5V (LTC3636)

1.8V to 12V (LTC3636-1)

n

Output Current per Channel: 6A

High Efﬁciency: Up to 95%

Die Temperature Monitor

Adjustable Switching Frequency: 500kHz to 4MHz

External Frequency Synchronization

Current Mode Operation for Excellent Line and

Load Transient Response

Theoperatingfrequencyisprogrammablefrom500kHzto

4MHz with an external resistor and may be synchronized

to an external clock signal. The high frequency capability

allows the use of small surface mount inductors and

capacitors. The unique constant frequency/controlled

on-time architecture is ideal for high step-down ratio ap-

plications that operate at high frequency while demanding

fast transient response.

n

0.6V Reference Allows Low Output Voltages

User Selectable Burst Mode^®Operation or Forced

Continuous Operation

n

Output Voltage Tracking and Soft-Start Capability

Short-Circuit Protected

Overvoltage Input and Overtemperature Protection

Power Good Status Outputs

Low Proﬁle 4mm × 5mm 28-Lead QFN Package

The LTC3636/LTC3636-1 can select between forced con-

tinuous mode and high efﬁciency Burst Mode operation.

The LTC3636 and LTC3636-1 differ in their output voltage

sense range.

All registered trademarks and trademarks are the property of their respective owners. Protected

by U.S. Patents including 5481178, 5847554, 6580258, 6304066, 6476589, 6774611.

APPLICATIONS

n

Distributed Power Systems

n

Battery-Powered Instruments

n

Point-of-Load Power Supplies

TYPICAL APPLICATION

ꢛ

ꢜꢂ

ꢃꢓꢛ ꢅꢌ ꢄꢓꢛ

Efﬁciency vs Load Current

ꢞꢝꢕꢖ

ꢠꢄ

ꢛ

ꢜꢂꢃ

ꢜꢂꢄ

ꢀꢁꢁ

ꢀꢁꢂꢃ

ꢀꢁꢂꢄ

ꢜꢂꢅꢛ

ꢇꢇ

f

ꢀ ꢁꢂꢃꢄ

ꢀ ꢁꢂꢃ

ꢀꢁ

ꢜꢅꢘꢃ

ꢜꢅꢘꢄ

ꢀꢅ

ꢀꢁ

ꢀꢀ

ꢀꢁ

ꢀ6

ꢀ3

ꢀꢁ

ꢞꢔꢝꢕꢖ

ꢀ

ꢎꢅꢇ3636ꢏ

ꢎꢅꢇ3636ꢐꢃ

ꢅꢑꢌꢂ

ꢑꢌꢍꢡꢏꢉꢢꢂꢇ

ꢅꢀꢆꢇꢈꢉꢉꢃ

ꢊꢋꢌꢌꢍꢃ

ꢅꢀꢆꢇꢈꢉꢉꢄ

ꢊꢋꢌꢌꢍꢄ

ꢒꢌꢌꢉꢅꢄ

ꢒꢌꢌꢉꢅꢃ

ꢓꢔꢃꢕꢖ

ꢓꢔꢗ6ꢕꢘ

ꢛ

ꢌꢁꢅꢃ

3ꢔ3ꢛ ꢆꢅ 6ꢆ

ꢌꢁꢅꢄ

ꢗꢛ ꢆꢅ 6ꢆ

ꢉꢚꢄ

ꢉꢚꢃ

ꢞꢝꢕꢖ

ꢄꢄꢟꢖ

ꢞꢝꢕꢖ

ꢄꢄꢟꢖ

ꢝ3ꢔꢄꢙ

ꢃꢓꢙ

ꢞꢗꢔ3ꢙ

ꢀ

ꢀ ꢁꢂ

ꢀ 3ꢁ3ꢂ

ꢀꢁꢂ

ꢛ

ꢖꢒꢄ

ꢛ

ꢋꢂꢍ

ꢖꢒꢃ

ꢀ

ꢀꢁ6 ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂ

3

3ꢀ6 ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂ 6ꢀꢁ

ꢃꢓꢙ

ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ

3636 ꢅꢆꢓꢃꢣ

3636 ꢀꢁꢂꢃb

3636fb

1

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

ABSOLUTE MAXIMUM RATINGS

PIN CONFIGURATION

(Note 1)

ꢃꢄꢅ ꢆꢇꢈꢉ

V

, V ................................................... –0.3V to 22V

IN1 IN2

PGOOD1, PGOOD2..................................... –0.3V to 22V

BOOST1-SW1, BOOST2-SW2................... –0.3V to 3.6V

TRACKSS1, TRACKSS2 ............................ –0.3V to 3.6V

ꢔꢕ ꢔꢟ ꢔ6 ꢔꢛ ꢔꢙ ꢔ3

ꢇꢃꢠꢁ

ꢑꢊꢒꢁ

ꢁ

ꢔ

3

ꢙ

ꢛ

6

ꢟ

ꢕ

ꢔꢔ

ꢔꢁ

ꢔꢂ

ꢁꢀ

ꢁꢕ

ꢁꢟ

ꢁ6

ꢁꢛ

ꢆ

ꢇꢒꢁ

33

ITH1, ITH2, RT, MODE/SYNC........–0.3V to INTV + 0.3V

CC

ꢝꢉꢁꢃ

ꢇꢒꢁ

V

, V , TMON. ......................–0.3V to INTV + 0.3V

FB1 FB2

CC

ꢡꢄꢌꢈꢢꢝꢣꢒꢎ

ꢑꢃ

ꢝꢉꢁ

ꢐꢒꢌ

ꢝꢉꢔ

3ꢂ

RUN1, RUN2.............................................. –0.3V to 22V

ꢐꢒꢌꢃ

3ꢔ

ꢐꢒꢌꢃ

Operating Junction Temperature Range

ꢇꢒꢃꢆ

ꢎꢎ

ꢔꢀ

ꢇꢒꢃꢆ

(Notes 3, 4)............................................ –40°C to 125°C

Storage Temperature Range................... –65°C to 150°C

ꢃꢡꢄꢒ

ꢑꢊꢒꢔ

ꢇꢃꢠꢔ

ꢎꢎꢃ

3ꢁ

3ꢙ

ꢐꢒꢌꢃ

ꢆ

ꢇꢒꢔ

ꢝꢉꢔꢃ

ꢆ

ꢇꢒꢔ

ꢀ

ꢁꢂ ꢁꢁ ꢁꢔ ꢁ3 ꢁꢙ

ꢊꢋꢌ ꢅꢍꢎꢏꢍꢐꢈ

ꢆꢍꢑꢇꢍꢃꢇꢄꢒꢓ ꢍꢍ

ꢔꢕꢖꢗꢈꢍꢌ ꢘꢙꢚꢚ × ꢛꢚꢚꢜ ꢅꢗꢍꢝꢃꢇꢎ ꢞꢋꢒ

= 125°C, θ = 21°C/W, θ = 7°C/W

T

JMAX

JA

JC

θ

JA

DERIVED FROM 6-LAYER PCB DC2335 DEMO BOARD

http://www.linear.com/product/LTC3636#orderinfo

ORDER INFORMATION

LEAD FREE FINISH

LTC3636IUFD#PBF

LTC3636EUFD#PBF

LTC3636IUFD-1#PBF

LTC3636EUFD-1#PBF

TAPE AND REEL

PART MARKING*

3636

PACKAGE DESCRIPTION

TEMPERATURE RANGE

–40°C to 125°C

LTC3636IUFD#TRPBF

LTC3636EUFD#TRPBF

LTC3636IUFD-1#TRPBF

LTC3636EUFD-1#TRPBF

28-Lead (4mm × 5mm) Plastic QFN

3636

–40°C to 125°C

36361

–40°C to 125°C

36361

–40°C to 125°C

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges. *The temperature grade is identiﬁed by a label on the shipping container.

Consult LTC Marketing for information on non-standard lead based ﬁnish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through

designated sales channels with #TRMPBF sufﬁx.

Selection Table

PART NUMBER

LTC3636

V

SENSE RANGE

OUT

0.6V to 5V

LTC3636-1

1.8V to 12V

3636fb

2

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the speciﬁed operating

junction temperature range, otherwise speciﬁcations are at T_J= 25°C (Note 2). V_IN1= V_IN2= 12V unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

l

V

Supply Range

3.1

20

V

IN1

l

V

Supply Range

3.1

1.5

20

V

IN1

IN2

3.1V < V < 20V

IN1

Output Voltage Range (Note 4)

LTC3636

LTC3636-1

0.6

1.8

5

12

V

I

Input DC Supply Current (V + V

)

IN2

Q

IN1

Both Channels Active (Note 5)

Sleep Current

MODE = 0V

1.3

600

13

mA

µA

MODE = INTV , V , V

> 0.6

CC FB1 FB2

Shutdown

RUN1 = RUN2 = 0V

l

V

Feedback Reference Voltage

0.594

0.6

0.002

0.05

0.606

V

%/V

%

FB

∆V

Reference Voltage Line Regulation

Output Voltage Load Regulation

Feedback Pin Input Current

Error Ampliﬁer Transconductance

Minimum On Time

V = 3.1V to 20V

IN

LINE_REG

LOAD_REG

ITH = 0.8V to 1.6V

I

30

35

nA

FB

g

ITH = 1.2V

1.8

mS

ns

m(EA)

t

LTC3636

LTC3636-1

30

ON

t

f

Minimum Off Time

Oscillator Frequency

100

ns

OFF

V

= INTV

CC

1.4

1.7

3.4

2

4

2.6

2.3

4.6

MHz

OSC

RT

RT = 162k

RT = 80.6k

I

Valley Switch Current Limit

ITH = 1.8V

6

6.6

7.2

A

LIM

Negative Valley Switch Current Limit

–4.2

R

Top Switch On-Resistance

Bottom Switch On-Resistance

32

18

mΩ

DS(ON)

I

Switch Leakage Current

V

= 20V, V = 0V

RUN

0.01

1.5

1

µA

V

SW(LKG)

IN

Internal Temperature Monitor

T = 25°C

A

Internal Temperature Monitor Slope (Note 6)

Overvoltage Lockout Threshold

200

°C/V

V

Rising

Falling

22.5

21.5

V

VIN-OV

IN

20.3

3.1

22.5

3.5

INTV Voltage

3.6V < V < 20V, 0mA Load

3.3

1.3

V

CC

IN

INTV Load Regulation

0mA to 50mA Load, V = 4V to 20V

%

CC

IN

INTV Undervoltage Lockout Threshold

INTV Rising, V = INTV

CC

2.7

2.55

2.9

V

CC

IN

INTV Falling, V = INTV

CC

IN

CC

l

RUN Threshold Rising

RUN Threshold Falling

1.16

0.96

1.22

1.01

1.28

1.06

V

RUN Leakage Current

0

3

µA

PGOOD Good-to-Bad Threshold

V

Rising

Falling

8

–8

10

–10

%

FB

PGOOD Bad-to-Good Threshold

V

Rising

Falling

–3

3

–5

5

%

FB

3636fb

3

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

ELECTRICAL CHARACTERISTICS ^Thel denotes the speciﬁcations which apply over the speciﬁed operating

junction temperature range, otherwise speciﬁcations are at T_J= 25°C (Note 2). V_IN1= V_IN2= 12V unless otherwise noted.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

25

MAX

UNITS

Ω

R

PGOOD Pull-Down Resistance

Power Good Filter Time

Internal Soft-Start Time

10mA Load

PGOOD

SS

t

20

40

µs

10% to 90% Rise Time

TRACKSS = 0.3V

1000

0.3

1500

µs

V

During Tracking

0.28

0.315

V

FB

I

TRACKSS Pull-Up Current

1.4

µA

TRACKSS

V

MODE/SYNC Threshold Voltage

MODE V

1

V

MODE/SYNC

IH

IL

0.4

SYNC Threshold Voltage

MODE/SYNC Input Current

SYNC V

0.95

V

IH

I

MODE = 0V

MODE = INTV

1.5

–1.5

µA

MODE

CC

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

power dissipation (P , in Watts) according to the formula:

D

T = T + (P • θ ), where θ (in °C/W) is the package thermal

J

A

D

JA

impedance.

Note 3: This IC includes overtemperature protection that is intended

Note 2: The LTC3636 is tested under pulsed load conditions such

to protect the device during momentary overload conditions. Junction

temperature will exceed 125°C when overtemperature protection is active.

Continuous operation above the speciﬁed maximum operating junction

temperature may impair device reliability.

Note 4: Output voltages outside the speciﬁed range are not optimized for

controlled on-time operation. Refer to the Applications Information section

for further discussions related to the output voltage range.

Note 5: Dynamic supply current is higher due to the internal gate charge

being delivered at the switching frequency.

Note 6: Guaranteed by design.

that T ≈ T . The LTC3636E is guaranteed to meet speciﬁcations from

J

A

0°C to 85°C junction temperature. Speciﬁcations over the –40°C to

125°C operating junction temperature range are assured by design,

characterization and correlation with statistical process controls. The

LTC3636I is guaranteed over the –40°C to 125°C operating junction

temperature range. Note that the maximum ambient temperature

consistent with these speciﬁcations is determined by speciﬁc operating

conditions in conjunction with board layout, the rated package thermal

impedance and other environmental factors. The junction temperature

(T , in °C) is calculated from the ambient temperature (T , in °C) and

J

A

3636fb

4

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

TYPICAL PERFORMANCE CHARACTERISTICS ^T_J^{= 25°C, V}_IN1= V_IN2= 12V, f_SW= 1MHz, L = 0.55µH

unless otherwise noted.

Efﬁciency vs Load Current

Burst Mode Operation

Forced Continuous Mode

Operation

Efﬁciency vs Load Current

ꢀꢁꢁ

ꢀꢁ

6ꢀ

ꢀꢁ

3ꢀ

ꢀꢁ

ꢀ

ꢀꢁꢁ

ꢀꢁ

ꢀꢀ

ꢀꢁ

ꢀ6

ꢀ3

ꢀꢁ

ꢀꢁꢁ

ꢀꢁ

6ꢀ

ꢀꢁ

3ꢀ

ꢀꢁ

ꢀ

ꢀꢁꢂꢃꢄ ꢅꢆꢇꢈ ꢉꢊꢋꢌꢍꢎꢏꢉꢐ

ꢀ

ꢀꢁꢂ

ꢀ ꢁꢂꢃꢄ

ꢀ

ꢀ ꢁꢂꢃꢄ

ꢀꢁꢂ

ꢀꢁꢂꢃꢄꢅ

ꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ

ꢋꢁꢅꢄ

ꢀ ꢁ ꢂꢃꢄ

ꢀ

ꢀ ꢁꢂ

ꢀ

ꢀ ꢁꢂ

ꢀ

ꢀ ꢁꢂ

ꢀꢁ

ꢀꢁꢂ

ꢀꢁ

ꢀ ꢁꢂ

ꢀ

ꢀ 3ꢁ3ꢂ

ꢀ ꢁꢂ

ꢀꢁꢂ

ꢀ ꢁꢂꢃ

ꢀ 3ꢁ3ꢂ

ꢀꢁꢀꢀꢂ

ꢀꢁꢀꢂ

ꢀꢁꢂ

ꢀ

ꢀꢁ

6

ꢀ

ꢀꢁ6 ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂ

3

3ꢀ6 ꢀꢁꢂ ꢀꢁꢂ ꢀꢁꢂ 6ꢀꢁ

ꢀꢁꢀꢀꢂ

ꢀꢁꢀꢂ

ꢀꢁꢂ

ꢀ

ꢀꢁ

ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ

3636 ꢀꢁꢂ

3636 ꢀꢁ3

Efﬁciency vs Load Current

Burst Mode Operation

Efﬁciency vs Input Voltage

Burst Mode Operation

Reference Voltage

vs Temperature

ꢀꢁꢁ

ꢀꢁ

6ꢀ

ꢀꢁ

3ꢀ

ꢀꢁ

ꢀ

ꢀꢁꢁ

ꢀꢁ

6ꢀ

ꢀꢀ

ꢀꢁ

ꢀꢁ6ꢀ6

ꢀꢁ6ꢀꢂ

ꢀꢁ6ꢀꢀ

ꢀꢁꢂꢃꢄ

ꢀꢁꢂꢃ6

ꢀꢁꢂꢃꢄ

ꢀ

ꢀ ꢁꢂꢃꢄ

ꢀ

ꢀ ꢁꢂꢃꢄ

ꢀꢁꢂ

ꢀ

ꢀ ꢁꢂ

ꢀ ꢁꢂꢃ

ꢀꢁ

ꢀ

ꢅ ꢆꢇꢈꢃ

ꢅ ꢆꢇꢇꢈꢃ

ꢅ ꢆꢃ

ꢁꢂꢃꢄ

ꢀ

ꢅ 6ꢃ

ꢀꢁꢀꢀꢂ

ꢀꢁꢀꢂ

ꢀꢁꢂ

ꢀ

6

ꢀ

ꢀꢁ ꢀꢁ ꢀꢁ ꢀ6 ꢀꢁ ꢀꢁ

ꢀꢁꢂꢃꢄ ꢅꢆꢇꢄꢈꢉꢊ ꢋꢅꢌ

ꢀꢁꢂ ꢀꢁꢂ

ꢀ

ꢀꢁ

ꢀꢁ ꢀꢁꢁ ꢀꢁꢂ

ꢀꢁꢂꢃ ꢄꢅꢆꢆꢇꢈꢉ ꢊꢂꢋ

ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ

3636 ꢀꢁꢂ

3636 ꢀꢁ6

Oscillator Frequency

vs Temperature

Oscillator Internal Set Frequency

vs Temperature

Load Regulation

ꢀꢁꢂ

ꢀꢁꢀ

ꢀꢁꢂ

ꢀꢁ6

ꢀꢁꢂ

ꢀꢁ6

ꢀꢁ

ꢀ

ꢀ ꢁꢂꢃꢄ

ꢀꢀ

ꢀ

ꢀꢁꢂ

ꢀ ꢁꢂꢃꢄ

ꢀ ꢂ 3ꢃꢄꢅ

ꢁ

ꢀꢁꢂ

ꢀ

6

ꢀ

ꢀꢁ

ꢀ6

ꢀꢁ

ꢀꢁꢂ

ꢀꢁꢂꢃꢄ ꢅꢆꢇꢈ ꢉꢊꢋꢌꢍꢎꢏꢉꢐ

ꢀꢁꢂꢃꢄꢅ ꢃꢁꢆꢇꢈꢆꢉꢁꢉꢊ

ꢀꢁꢂꢃ

ꢀꢁꢂ ꢀꢁꢂ

ꢀ

ꢀꢁ

ꢀꢁ ꢀꢁꢁ ꢀꢁꢂ

ꢀ

3

ꢀ

ꢀꢁꢂ ꢀꢁꢂ

ꢀ

ꢀꢁ

ꢀꢁ ꢀꢁꢁ ꢀꢁꢂ

ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ

ꢀ

ꢀꢁꢂ

ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ

ꢀꢁꢂꢃ

3636 ꢀꢁꢂ

ꢀ3ꢁꢂꢀꢃ ꢄꢃꢁ

3636 ꢀꢁꢂ

3636fb

5

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

TYPICAL PERFORMANCE CHARACTERISTICS ^T_J^{= 25°C, V}_IN1= V_IN2= 12V, f_SW= 1MHz, L = 0.55µH

unless otherwise noted.

Internal MOSFET R_DS(ON)

vs Temperature

Temperature Monitor vs

Temperature

Quiescent Current vs V_IN

Burst Mode Operation

6ꢀ

ꢀꢁ

3ꢀ

ꢀꢁ

ꢀ

ꢀꢁꢂ

ꢀꢁ6

ꢀꢁꢂ

ꢀꢁ3

ꢀꢁꢂ

ꢀꢁꢀ

ꢀꢁꢁ

6ꢀꢀ

ꢀꢁꢁ

3ꢀꢀ

ꢀꢁꢁ

ꢀ

ꢀꢁꢂꢃ

ꢀꢁꢂꢃꢄ

ꢀꢁꢂ ꢃꢄꢅꢀꢆꢇ

ꢀꢁꢂꢂꢁꢃ ꢄꢅꢆꢂꢇꢈ

ꢀꢁꢂ ꢀꢁꢂ

ꢀ

ꢀꢁ

ꢀꢁ ꢀꢁꢁ ꢀꢁꢂ

ꢀꢁꢂ ꢀꢁꢂ

ꢀ

ꢀꢁ

ꢀꢁ ꢀꢁꢁ ꢀꢁꢂ

ꢀ

6

ꢀ

ꢀꢁ ꢀꢁ ꢀꢁ ꢀ6 ꢀꢁ ꢀꢁ

ꢀꢁꢂ

ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ

ꢀ

ꢀꢁ

3636 ꢀꢁꢂ

3636 ꢀꢁꢁ

3636 ꢀꢁꢂ

Valley Current Limit

vs Temperature

TRACKSS Pull-Up Current

vs Temperature

Switch Leakage vs Temperature

ꢀ6

ꢀꢁ

ꢀ

ꢀꢁ6

ꢀꢁꢂ

6ꢀꢁ

ꢀꢁ6

ꢀꢁꢂ

ꢀꢁ6

ꢀꢁꢂ

ꢀꢁ6

ꢀꢁꢂꢃ ꢄꢅꢂꢆꢇꢈ

ꢀꢁꢂꢃꢄꢅꢆꢂꢆꢇꢀ ꢀꢈꢉꢊꢃꢄ

6

ꢀ

ꢀꢁꢂ ꢀꢁꢂ

ꢀ

ꢀꢁ ꢀꢁ ꢀꢁ ꢀꢁꢁ ꢀꢁꢂ ꢀꢁꢂ

ꢀꢁꢂ ꢀꢁꢂ

ꢀ

ꢀꢁ

ꢀꢁ ꢀꢁꢁ ꢀꢁꢂ

ꢀꢁꢂ ꢀꢁꢂ

ꢀ

ꢀꢁ

ꢀꢁ ꢀꢁꢁ ꢀꢁꢂ

ꢀꢁꢂꢃꢁꢄꢅꢀꢆꢄꢁ ꢇꢈꢉꢊ

3636 ꢀꢁ3

3636 ꢀꢁꢂ

Shutdown Current vs V_IN

Burst Mode Operation

ꢀꢀ

ꢀꢁ

ꢀ6

ꢀꢁ

ꢀ

ꢀꢁ

ꢀꢁꢂꢃꢄꢅꢂ

ꢀ

ꢀꢁꢂ

ꢀꢁꢂꢃꢄꢅꢆꢃ

ꢀ

ꢀꢁꢂꢃꢄꢅ

3636 ꢀꢁꢂ

ꢀꢁꢂꢃꢄꢅꢆ

6

ꢀ

ꢀꢁꢂꢃ

ꢀ ꢁꢂꢃꢄ

ꢀ ꢁꢂꢂꢃꢄ

ꢀꢁꢂ

ꢀ

6

ꢀ

ꢀꢁ ꢀꢁ ꢀꢁ ꢀ6 ꢀꢁ ꢀꢁ

ꢀꢁꢂ

ꢀ

ꢀꢁ

3636 ꢀꢁ6

3636fb

6

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

TYPICAL PERFORMANCE CHARACTERISTICS ^T_J^{= 25°C, V}_IN1= V_IN2= 12V, f_SW= 1MHz, L = 0.55µH

unless otherwise noted.

Start-Up (Burst Mode Operation)

Load Step (Internal Compensation)

Load Step

ꢆ

V

ꢌꢍꢎ

ꢎꢏꢐ

OUT

ꢃꢑꢒꢑꢎꢏꢓꢁꢔꢅ

ꢌꢈꢈꢕꢆꢄꢅꢀꢆ

AC-COUPLED

100mV/DIV

ꢂꢆꢄꢅꢀꢆ

ꢆ

ꢏꢍꢐ

ꢑꢆꢄꢅꢀꢆ

ꢀ

I

ꢁ

L

ꢀ

ꢁ

ꢂꢃꢄꢅꢀꢆ

5A/DIV

ꢂꢃꢄꢅꢀꢆ

3636 ꢋꢌꢍ

3636 ꢋꢂꢈ

3636 G18

ꢇꢈꢉꢊꢄꢅꢀꢆ

ꢇꢈꢈꢉꢊꢄꢅꢀꢆ

20µs/DIV

ꢆ

ꢀ

ꢖ ꢌꢗꢘꢆ

ꢆ

ꢀ

ꢒ ꢑꢓꢔꢆ

ꢒ ꢑꢈꢈꢕꢃ

V

I

= 1.8V

ꢎꢏꢐ

ꢁꢎꢃꢅ

ꢏꢍꢐ

ꢁꢏꢃꢅ

OUT

LOAD

ꢖ ꢙꢈꢈꢕꢃ ꢚꢛ 6ꢃ

= 400mA to 6A

= 330pF

ꢀꢐꢜ ꢖ ꢀꢝꢐꢆ

C

ꢑꢑ

COMP

ꢑ ꢖ 33ꢟꢞ

R

= 13kΩ

ꢞ

ꢎꢏꢐ

COMP

ꢑ

ꢖ ꢙꢠꢉꢞ ꢡꢇ

C = 33pF

F

OUT

C

= 47µF ×2

Start-Up into Prebiased Output

(Burst Mode Operation)

Start-Up (Forced Continuous Mode)

ꢍꢎꢏ

ꢂꢆꢄꢅꢀꢆ

ꢌꢍꢎ

ꢂꢆꢄꢅꢀꢆ

ꢆ

ꢐꢎꢑ

ꢆ

ꢏꢍꢐ

ꢑ ꢒꢓꢔꢆ

ꢒꢆꢄꢅꢀꢆ

ꢌꢆꢄꢅꢀꢆ

ꢀ

ꢁ

ꢀ

ꢁ

ꢂꢃꢄꢅꢀꢆ

3636 ꢋꢂꢂ

3636 ꢋꢂꢌ

ꢇꢈꢈꢉꢊꢄꢅꢀꢆ

ꢀ

ꢑ ꢈꢕꢃ

ꢆ

ꢁꢐꢃꢅ

ꢒ ꢌꢓꢔꢆ

ꢒ ꢌꢈꢈꢕꢃ

ꢁꢏꢃꢅ

ꢐꢎꢑ

ꢀ

Start-Up into Prebiased Output

(Forced Continuous Mode)

Short-Circuit and Soft-Start

ꢍꢎꢏ

ꢌꢆꢄꢅꢀꢆ

ꢀ

ꢀꢁꢂꢃꢄꢅꢆ

ꢆ

ꢐꢎꢑ

ꢒ ꢓꢔꢕꢆ

ꢓꢆꢄꢅꢀꢆ

ꢀ

ꢀꢁ

ꢀꢁꢂꢃꢄꢁ

ꢀ

ꢀꢁꢂ

ꢁ

ꢀꢁꢂꢃꢄꢁ

ꢂꢃꢄꢅꢀꢆ

3636 ꢋꢌ3

ꢇꢈꢈꢉꢊꢄꢅꢀꢆ

3636 ꢀꢁꢂ

ꢀꢁꢁꢂꢃꢄꢅꢆꢇ

ꢀ

ꢒ ꢈꢖꢃ

ꢁꢐꢃꢅ

ꢀ

ꢄ ꢅꢆꢇꢀ

ꢁꢂꢃ

3636fb

7

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

PIN FUNCTIONS

ITH1 (Pin 1): Channel 1 Error Ampliﬁer Output and

Switching Regulator Compensation Pin. Connect this pin

to appropriate external components to compensate the

regulator loop frequency response. Connect this pin to

ITH2 (Pin 8): Channel 2 Error Ampliﬁer Output and

Switching Regulator Compensation Pin. Connect this pin

to appropriate external components to compensate the

regulator loop frequency response. Connect this pin to

INTV to use the default internal compensation.

CC

RUN1 (Pin 2): Channel 1 Regulator Enable Pin. Enables

channel 1 operation by tying RUN above 1.25V. Tying it

below1Vplacesthepartintoshutdown.Donotﬂoatthispin.

V

(Pin 9): Channel 2 Output Feedback Voltage Pin.

FB2

Input to the error ampliﬁer that compares the feedback

voltagetotheinternal0.6Vreferencevoltage. Connectthis

pin to a resistor divider network to program the desired

output voltage.

MODE/SYNC (Pin 3): Mode Select and External Synchro-

nization Input. Tie this pin to ground to force continuous

synchronous operation. Floating this pin or tying it to

PGOOD2 (Pin 10): Channel 2 Open-Drain Power Good

INTV enables high efﬁciency Burst Mode operation at

Output Pin. PGOOD2 is pulled to ground when the voltage

CC

light loads. Drive this pin with a clock to synchronize the

LTC3636/LTC3636-1 switching frequency. An internal

phase-locked loop will force the bottom power NMOS’s

turn on signal to be synchronized with the rising edge of

the CLKIN signal. When this pin is driven with a clock,

forced continuous mode is automatically selected.

on the V pin is not within 8ꢀ (typical) of the internal

FB2

0.6V reference. PGOOD2 becomes high impedance once

the V pin returns to within 5ꢀ (typical) of the internal

FB2

reference.

TRACKSS2 (Pin 11): Output Tracking and Soft-Start Input

Pin for Channel 2. Forcing a voltage below 0.6V on this pin

bypassestheinternalreferenceinputtotheerrorampliﬁer.

TheLTC3636/LTC3636-1willservotheFBpintotheTRACK

voltage. Above 0.6V, the tracking function stops and the

internal reference resumes control of the error ampliﬁer.

RT (Pin 4): Oscillator Frequency Program Pin. Connect an

external resistor (between 80k to 640k) from this pin to

GND in order to program the frequency from 500kHz to

4MHz. When RT is tied to INTV , the switching frequency

CC

will default to 2MHz.

An internal 1.4μA pull up current from INTV allows a

CC

soft-start function to be implemented by connecting a

INTV (Pin 5): Internal 3.3V Regulator Output. The inter-

CC

capacitor between this pin and PGND.

nal power drivers and control circuits are powered from

this voltage. Decouple this pin to power ground with a

minimum of 4.7µF low ESR ceramic capacitor.

GND(Pins12,18,19,25):PowerandSignalGround.These

pins must be tied together and soldered to PCB ground.

TMON (Pin 6): Temperature Monitor Output. A voltage

proportional to the measured on-die temperature will ap-

pear at this pin. The voltage-to-temperature scaling factor

is 200°K/V. See the Applications Information section for

detailed information on the TMON function. Tie this pin to

SW2 (Pins 13, 17): Channel 2 Switch Node Connection

to External Inductor. Voltage swing of SW is from a diode

voltage drop below ground to V .

IN

BOOST2 (Pin 14): Boosted Floating Driver supply for

Channel 2. The (+) terminal of the bootstrap capacitor

connects to this pin while the (–) terminal connects to

the SW pin. The normal operational voltage swing of this

INTV to disable the temperature monitor circuit.

CC

RUN2 (Pin 7): Channel 2 Regulator Enable Pin. Enables

channel 2 operation by tying RUN above 1.22V. Tying it

below1Vplacesthepartintoshutdown.Donotﬂoatthispin.

pin ranges from a diode voltage drop below INTV up

CC

to V +INTV .

IN

CC

3636fb

8

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

PIN FUNCTIONS

V

(Pins 15, 16): Power Supply Input for Channel 2.

PGOOD1 (Pin 27): Channel 1 Open-Drain Power Good

IN2

This input is capable of operating from a separate supply

Output Pin. PGOOD1 is pulled to ground when the voltage

voltage than V

.

on the V pin is not within 8ꢀ (typical) of the internal

IN1

FB1

0.6V reference. PGOOD1 becomes high impedance once

SW1 (Pins 20, 24): Channel 1 Switch Node Connection

the V pin returns to within 5ꢀ (typical) of the internal

FB1

to External Inductor. Voltage swing of SW is from a diode

reference.

voltage drop below ground to V .

IN

V

(Pin 28): Channel 1 Output Feedback Voltage Pin.

FB1

V

(Pins 21, 22): Power Supply Input for Channel 1.

IN1

Input to the error ampliﬁer that compares the feedback

voltagetotheinternal0.6Vreferencevoltage. Connectthis

pin to a resistor divider network to program the desired

output voltage.

Input voltage to the on chip power MOSFETs on channel 1.

The internal LDO for INTV is powered off of this pin.

CC

BOOST1 (Pin 23): Boosted Floating Driver Supply for

Channel 1. The (+) terminal of the bootstrap capacitor

connects to this pin while the (–) terminal connects to

the SW pin. The normal operational voltage swing of this

pin ranges from a diode voltage drop below INTV up

to V + INTV .

INTV

(Pin 29): Additional INTV pin. Not required to

CC

CCT

be connected to INTV pin for operation.

CC

GNDT (Pins 30, 31, 32): Power Ground. Additional power

ground pins for improved thermal dissipation when con-

nected to the GND pins. Not required to be connected to

GND pins for operation.

CC

IN

CC

TRACKSS1 (Pin 26): Output Tracking and Soft-Start Input

Pin for Channel 1. Forcing a voltage below 0.6V on this pin

bypassestheinternalreferenceinputtotheerrorampliﬁer.

TheLTC3636/LTC3636-1willservotheFBpintotheTRACK

voltage. Above 0.6V, the tracking function stops and the

internal reference resumes control of the error ampliﬁer.

SWT1T ( Pin 33): Additional SW1 pin. Not required to be

connected to SW1 pins 20 and 24 for operation.

SWT2T (Pins 34): Additional SW2 pin. Not required to be

connected to SW2 pins 13 and 17 for operation.

An internal 1.4μA pull up current from INTV allows a

CC

soft-start function to be implemented by connecting a

capacitor between this pin and PGND.

3636fb

9

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

BLOCK DIAGRAM

ꢆ

ꢏꢎ

ꢐꢑꢎ

ꢈꢁꢌꢌꢂ

ꢂ

ꢏꢎ

ꢂ

ꢍꢎ

ꢘꢙ

ꢖ ꢗ ꢈ

ꢂ

+

ꢐꢑꢎ

–

ꢝꢋꢀꢞ

ꢂ

ꢏꢎ

ꢏꢎꢅꢂ

ꢆꢆ

ꢀꢁ6ꢂ ꢃꢄꢅꢆ3636ꢇ

ꢈꢁꢉꢂ ꢃꢄꢅꢆ3636ꢊꢈꢇ

ꢋꢂ ꢃꢄꢅꢆ3636ꢇ

ꢈꢌꢂ ꢃꢄꢅꢆ3636ꢊꢈꢇ

ꢐꢑꢎ

ꢏ

ꢍꢎ

ꢏ

ꢂ

ꢂꢍꢎ

ꢍꢎ

ꢍꢘꢆꢈ

ꢐ

ꢘ

ꢚ

ꢍꢎ

ꢗ

ꢆꢍꢎꢅꢐꢍꢄꢄꢜꢐ

ꢍꢎ

ꢏ

ꢏꢍꢎ

ꢦ

ꢟꢍꢍꢘꢅ

ꢘꢙ

ꢘꢙꢏꢅꢆꢒ

ꢄꢍꢔꢏꢆ

ꢅꢔ

ꢖꢎꢕ

ꢛꢈ

ꢛꢌ

ꢆ

ꢟꢍꢍꢘꢅ

ꢄꢈ

ꢖꢎꢅꢏꢊ

ꢘꢒꢍꢍꢅ

ꢅꢒꢐꢍꢑꢔꢒ

ꢆ

ꢍꢑꢅ

ꢟꢔ

ꢡ

ꢏ

ꢐꢜꢂ

ꢆꢛꢓ

ꢔꢎꢕ

+

–

ꢐꢌ

ꢐꢈ

ꢆꢍꢛꢓ

ꢘꢜꢄꢜꢆꢅ

ꢘꢜꢎꢘꢜ

ꢢ

ꢘꢜꢎꢘꢜ

ꢏꢅꢒ

ꢠꢟ

ꢐ

ꢆ

ꢏꢕꢜꢖꢄ ꢕꢏꢍꢕꢜꢘ

ꢆ

ꢀꢁ6ꢂ

ꢐꢜꢠ

ꢆꢈ

–

ꢜꢖ

ꢀꢁ6ꢝꢉꢂ

–

+

ꢏꢎꢅꢜꢐꢎꢖꢄ

ꢘꢍꢠꢅꢊꢘꢅꢖꢐꢅ

ꢀꢂ

ꢓꢔꢍꢍꢕ

ꢏꢎꢅꢂ

ꢆꢆ

ꢈꢁꢝꢣꢖ

ꢅꢐꢖꢆꢧꢘꢘ

ꢅꢐꢖꢆꢧ

–

+

–

+

FC BURST

ꢑꢂ

ꢘꢘ

ꢛꢍꢕꢜ

ꢘꢜꢄꢜꢆꢅ

ꢆ

ꢘꢘ

ꢀꢁꢋꢋꢌꢂ

ꢀꢁꢝꢉꢂ ꢖꢅ ꢘꢅꢖꢐꢅꢊꢑꢓ

ꢀꢁꢈꢀꢂ ꢖꢠꢅꢜꢐ ꢘꢅꢖꢐꢅꢊꢑꢓ

ꢆꢒꢖꢎꢎꢜꢄ ꢈ

ꢐꢅ

ꢍꢘꢆꢈ

ꢍꢘꢆ

ꢓꢄꢄꢊꢘꢤꢎꢆ

ꢛꢍꢕꢜꢨꢘꢤꢎꢆ

ꢏꢎꢅꢂ

ꢍꢘꢆ

ꢆꢆ

3ꢁ3ꢂ

ꢐꢜꢔ

ꢐ

ꢐꢅ

ꢂ

ꢏꢎꢈ

ꢆ

ꢂꢆꢆ

ꢓꢒꢖꢘꢜ

ꢈꢉꢀꢥꢆ

ꢅꢛꢍꢎ

ꢅ

ꢈꢂꢨꢌꢀꢀꢞ

ꢩ

ꢍꢘꢆꢌ

ꢆꢒꢖꢎꢎꢜꢄ ꢌ ꢃꢘꢖꢛꢜ ꢖꢘ ꢆꢒꢖꢎꢎꢜꢄ ꢈꢇ

3636 ꢟꢕ

3636fb

10

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

OPERATION

The LTC3636/LTC3636-1 is a dual-channel, current mode

monolithic step down regulator capable of providing 6A

of output current from each channel. Its unique controlled

on-time architecture allows extremely low step-down

ratios while maintaining a constant switching frequency.

Both channels share the same clock and run 180° out of

phase. Each channel is enabled by raising the voltage on

the RUN pin above 1.22V nominally.

ing in discontinuous operation and increased efﬁciency.

Both power MOSFETs will remain off until the ITH voltage

rises above the zero current level to initiate another cycle.

During this time, the output capacitor supplies the load

current and the part is placed into a low current sleep

mode. Discontinuous mode operation is disabled by tying

the MODE/SYNC pin to ground, which forces continuous

synchronous operation regardless of output load current.

“Power Good” Status Output

Main Control Loop

The PGOOD open-drain output will be pulled low if the

regulatoroutputexitsa 8ꢀwindowaroundtheregulation

point. This condition is released once regulation within a

5ꢀ window is achieved. To prevent unwanted PGOOD

In normal operation, the internal top power MOSFET is

turned on for a ﬁxed interval determined by a ﬁxed one-

shot timer (“ON” signal in Block Diagram). When the top

powerMOSFETturnsoff,thebottompowerMOSFETturns

glitches during transients or dynamic V

changes, the

on until the current comparator I

trips, thus restarting

OUT

CMP

LTC3636/LTC3636-1 PGOOD falling edge includes a ﬁlter

time of approximately 40µs.

the one shot timer and initiating the next cycle. Inductor

current is measured by sensing the voltage drop across

the SW and GND nodes of the bottom power MOSFET. The

voltage on the ITH pin sets the comparator threshold cor-

responding to inductor valley current. The error ampliﬁer

EA adjusts this ITH voltage by comparing an internal 0.6V

V Overvoltage Protection

IN

In order to protect the internal power MOSFET devices

against transient input voltage spikes, the LTC3636/

referencetothefeedbacksignalV derivedfromtheoutput

LTC3636-1 constantly monitors each V pin for an

FB

IN

voltage. If the load current increases, it causes a drop in

the feedback voltage relative to the internal reference. The

ITH voltage then rises until the average inductor current

matches that of the load current.

overvoltage condition. When V rises above 22.5V, the

IN

regulator suspends operation by shutting off both power

MOSFETs on the corresponding channel. Once V drops

IN

below 21.5V, the regulator immediately resumes normal

operation. The regulator executes its soft-start function

when exiting an overvoltage condition.

The operating frequency is determined by the value of the

RT resistor, which programs the current for the internal

oscillator.Aninternalphase-lockedloopservostheswitch-

ing regulator on-time to track the internal oscillator edge

and force a constant switching frequency. A clock signal

can be applied to the MODE/SYNC pin to synchronize the

switching frequency to an external source. The regulator

defaults to forced continuous operation once the clock

signal is applied.

Overcurrent and Short-Circuit Protection

The LTC3636 protects itself against output overcurrent

and short-circuits by sensing the inductor valley current.

Whenthecurrentlimitisreached, theoutputbeginstofall,

resulting in decreased on-time of the top power MOSFET.

If the short is prolonged enough for the on-time to reach

its minimum, the off-time will lengthen, lowering the

switching frequency and preventing excess current from

Atlightloadcurrents,theinductorcurrentcandroptozero

and become negative. In Burst Mode operation, a current

being drawn from V . After the overcurrent or short is

IN

reversal comparator (I ) detects the negative inductor

REV

removed, the regulator executes its soft-start function to

prevent the output voltage from overshooting.

current and shuts off the bottom power MOSFET, result-

3636fb

11

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

APPLICATIONS INFORMATION

and temperature variations than an external resistor

(seeTypicalPerformanceCharacteristics)andisbestused

for applications where switching frequency accuracy is

not critical.

AgeneralLTC3636/LTC3636-1applicationcircuitisshown

on the ﬁrst page of this data sheet. External component

selection is largely driven by the load requirement and

switchingfrequency.Componentselectiontypicallybegins

with the selection of the inductor L and resistor R . Once

T

Dual-Phase Single V

Operation

the inductor is chosen, the input capacitor, C , and the

OUT

IN

outputcapacitor, C , canbeselected. Next, thefeedback

OUT

For output loads that demand more than 6A of current,

the two channels can be conﬁgured in parallel as a single

output to provide more output current. During dual-

phase operation, it is recommended to set the switching

frequency above 800kHz to ensure stability over a wide

input voltage range.

resistors are selected to set the desired output voltage.

Finally,theremainingoptionalexternalcomponentscanbe

selectedforfunctionssuchasexternalloopcompensation,

tracking/soft-start, input UVLO, and PGOOD.

Programming Switching Frequency

Withdual-phaseoperation,thetwochannelsoftheLTC3636

are operated 180 degrees out of phase. This effectively

interleaves the current pulses coming from the switches,

greatly reducing the overlap time when they add together.

The result is a signiﬁcant reduction in total RMS input cur-

rent,whichinturnallowslessexpensiveinputcapacitorsto

be used and reduces the voltage noise on the supply line.

Selectionoftheswitchingfrequencyisatrade-offbetween

efﬁciency and component size. High frequency operation

allows the use of smaller inductor and capacitor values.

Operation at lower frequencies improves efﬁciency by

reducing internal gate charge losses but requires larger

inductance values and/or capacitance to maintain low

output ripple voltage.

The two channels in parallel will inherently share current

well, because the LTC3636 is a current mode controlled

regulator. Good current sharing balances the thermals on

the design.

Connecting a resistor from the RT pin to GND programs

the switching frequency (f) between 500kHz and 4MHz

according to the following formula:

11

3.2E

R

=

RT

f

Inductor Selection

where R is in Ω and f is in Hz.

RT

Foragiveninputandoutputvoltage,theinductorvalueand

operatingfrequencydeterminetheinductorripplecurrent.

More speciﬁcally, the inductor ripple current decreases

with higher inductor value or higher operating frequency

according to the following equation:

When RT is tied to INTV , the switching frequency will

CC

default to approximately 2MHz, as set by an internal re-

sistor. This internal resistor is more sensitive to process

6000

⎛

⎞

⎛

⎜

⎝

⎞

⎟

⎠

V

OUT

ΔI =

1–

5000

4000

3000

2000

1000

⎜

⎟

L

f • L

V

IN

⎝

⎠

Where∆I =inductorripplecurrent,f=operatingfrequency

L

L=inductorvalueandV istheinputpowersupplyvoltage

IN

applied to the V inputs. A trade-off between component

IN

size, efﬁciency and operating frequency can be seen from

this equation. Accepting larger values of ∆I allows the

L

useoflowervalueinductorsbutresultsingreaterinductor

0

100 200 300 400 500 600 700

R RESISTOR (kΩ)

T

3636 F01

Figure 1. Switching Frequency vs R_T

3636fb

12

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

APPLICATIONS INFORMATION

core loss, greater ESR loss in the output capacitor, and

larger output voltage ripple. Generally, highest efﬁciency

operation is obtained at low operating frequency with

small ripple current.

Table 1. Inductor Selection Table

INDUCTANCE DCR

MAX

CURRENT

(A)

DIMENSIONS

(mm)

HEIGHT

(mm)

(µH) (mΩ)

Würth Electronik WE-HC 744312 Series

0.25

0.47

0.72

1.0

2.5

3.4

7.5

18

16

12

11

9

7 × 7.7

5.2 × 5.5

7.4 × 6.7

6.4 × 6.6

5.2 × 5

3.8

A reasonable starting point is to choose a ripple current

of 2.4A which is about 40ꢀ of I

. Exceeding 60ꢀ

OUT(MAX)

9.5

10.5

of I

is not recommended. Note that the largest

OUT(MAX)

1.5

ripple current occurs at the highest V . To guarantee that

IN

Vishay IHLP-2020BZ-01 Series

ripple current does not exceed a speciﬁed maximum, the

0.22

0.33

0.47

0.68

1

5.2

8.2

8.8

12.4

20

15

12

2

inductance should be chosen according to:

11.5

10

⎛

⎞ ⎛

⎞

V

OUT

7

⎜

⎟ ⎜

⎟

L =

1–

⎜

⎟ ⎜

⎟

Toko FDVE0603 Series

f • ΔI

V

IN(MAX)

L(MAX)

⎝

⎠ ⎝

⎠

0.33

0.47

0.68

0.75

1

2.7

3.7

6

6.2

8.5

15.9

15.6

10.4

10.9

9.5

3.0

3

Once the value for L is known, the type of inductor must

be selected. Actual core loss is independent of core size

for a ﬁxed inductor value, but is very dependent on the

inductance selected. As the inductance increases, core

losses decrease. Unfortunately, increased inductance

requires more turns of wire, leading to increased DCR

and copper loss.

Coilcraft XAL6030 Series

0.20

0.33

0.56

0.82

1.0

3.04

5.18

8

11.8

13.25

17.2

15.4

13.8

11.5

9.6

TDK SMP5030 Series

Ferrite designs exhibit very low core loss and are pre-

ferred at high switching frequencies, so design goals

can concentrate on copper loss and preventing satura-

tion. Ferrite core material saturates “hard”, which means

that inductance collapses abruptly when the peak design

current is exceeded. This results in an abrupt increase in

inductor ripple current, so it is important to ensure that

the core will not saturate.

0.2

0.35

0.75

1

2.31

4.29

9.35

11.44

21

14.9

9.7

3

8.5

C and C

Selection

IN

OUT

The input capacitance, C , is needed to ﬁlter the trapezoi-

IN

dal wave current at the drain of the top power MOSFET.

To prevent large voltage transients from occurring, a low

ESRinputcapacitorsizedforthemaximumRMScurrentis

recommended. The maximum RMS current is given by:

Differentcorematerialsandshapeswillchangethesize/cur-

rent and price/current relationship of an inductor. Toroid

or shielded pot cores in ferrite or permalloy materials are

small and don’t radiate much energy, but generally cost

more than powdered iron core inductors with similar

characteristics. The choice of which style inductor to use

mainly depends on the price versus size requirements

and any radiated ﬁeld/EMI requirements. Table 1 gives a

sampling of available surface mount inductors.

V

V − V

(

)

IN

OUT

I

= I

OUT(MAX)

RMS

V

IN

This formula has a maximum at V = 2V , where

IN

OUT

I

≅ I /2. This simple worst case condition is com-

RMS

OUT

monlyusedfordesignbecauseevensigniﬁcantdeviations

do not offer much relief. Note that ripple current ratings

from capacitor manufacturers are often based on only

2000 hours of life which makes it advisable to further de-

rate the capacitor, or choose a capacitor rated at a higher

temperature than required.

3636fb

13

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

APPLICATIONS INFORMATION

Several capacitors may also be paralleled to meet size or

height requirements in the design. For low input voltage

applications, sufﬁcient bulk input capacitance is needed

to minimize transient effects during output load changes.

Even though the LTC3636/LTC3636-1 design includes an

overvoltage protection circuit, care must always be taken

toensureinputvoltagetransientsdonotposeanovervolt-

age hazard to the part.

ratingandlowESRmakethemidealforswitchingregulator

applications. However, due to the self-resonant and high-

Q characteristics of some types of ceramic capacitors,

care must be taken when these capacitors are used at

the input. When a ceramic capacitor is used at the input

and the power is supplied by a wall adapter through long

wires, a load step at the output can induce ringing at the

V input. Atbest, thisringingcancoupletotheoutputand

IN

be mistaken as loop instability. At worst, a sudden inrush

The selection of C

is determined by the effective series

OUT

of current through the long wires can potentially cause a

resistance(ESR)thatisrequiredtominimizevoltageripple

and load step transients as well as the amount of bulk

capacitance that is necessary to ensure that the control

loop is stable. Loop stability can be checked by viewing

voltage spike at V large enough to damage the part. For

IN

a more detailed discussion, refer to Application Note 88.

When choosing the input and output ceramic capacitors,

choose the X5R and X7R dielectric formulations. These

dielectrics have the best temperature and voltage charac-

teristics of all the ceramics for a given value and size.

the load transient response. The output ripple, ∆V , is

approximated by:

OUT

⎛

⎞

⎟

⎠

1

ΔV

< ΔI ESR +

⎜

OUT

L

INTV Regulator Bypass Capacitor

8 • f • C

CC

⎝

OUT

An internal low dropout (LDO) regulator draws power

When using low-ESR ceramic capacitors, it is more useful

tochoosetheoutputcapacitorvaluetofulﬁllachargestor-

age requirement. During a load step, the output capacitor

mustinstantaneouslysupplythecurrenttosupporttheload

until the feedback loop raises the switch current enough

to support the load. The time required for the feedback

looptorespondisdependentonthecompensationandthe

output capacitor size. Typically, 3 to 4 cycles are required

to respond to a load step, but only in the ﬁrst cycle does

from the V input and produces the 3.3V supply that

IN1

powers the internal bias circuitry and drives the gate of

the internal MOSFET switches. The INTV pin connects

CC

to the output of this regulator and must have a minimum

of 4.7μF ceramic decoupling capacitance to ground. The

decouplingcapacitorshouldhavelowimpedanceelectrical

connections to the INTV and GND pins to provide the

CC

transient currents required by the LTC3636/LTC3636-1.

High input voltage and high switching frequency will

increase die temperature because of the higher power

dissipation across the LDO. Connecting any external load

the output drop linearly. The output droop, V

, is

DROOP

usually about 3 times the linear drop of the ﬁrst cycle.

Thus, a good place to start is with the output capacitor

of approximately:

to the INTV pin is not recommended since it may impact

CC

LTC3636/LTC3636-1 operation while increasing power

dissipation and die temperature.

3 • ΔI

OUT

C

≈

OUT

f • V

DROOP

Boost Capacitor

Thoughthisequationprovidesagoodapproximation,more

capacitance may be required depending on the duty cycle

The LTC3636/LTC3636-1 uses a “bootstrap” circuit to

create a voltage rail above the applied input voltage V .

IN

and load step requirements. The actual V

should be

DROOP

Speciﬁcally,aboostcapacitor,C

,ischargedtoavolt-

age approximately equal to INTV each time the bottom

BOOST

veriﬁed by applying a load step to the output.

CC

power MOSFET is turned on. The charge on this capaci-

tor is then used to supply the required transient current

during the remainder of the switching cycle. When the

top MOSFET is turned on, the BOOST pin voltage will be

Using Ceramic Input and Output Capacitors

Higher values, lower cost ceramic capacitors are available

in small case sizes. Their high ripple current, high voltage

3636fb

14

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

APPLICATIONS INFORMATION

equal to approximately V + 3.3V. For most applications,

wherefistheswitchingfrequency, t

isthenonoverlap

DEAD

IN

a 0.1µF ceramic capacitor closely connected between the

time, or “dead time” (typically 5ns) and t

is the

OFF(MIN)

BOOST and SW pins will provide adequate performance.

minimumoff-time.Ifthemaximumdutycycleissurpassed,

due to a dropping input voltage for example, the output

will drop out of regulation. The minimum input voltage to

avoid this dropout condition is:

Output Voltage Programming

Each regulator’s output voltage is set by an external resis-

tive divider according to the following equation:

V

OUT

V

=

IN(MIN)

1− f • t

+ 2 • t

DEAD

⎛

⎞

(

)

OFF(MIN)

R2

R1

V

= 0.6V 1+

⎜

⎟

OUT

⎝

⎠

Conversely, the minimum on-time is the smallest dura-

tion of time in which the top power MOSFET can be in

its “on” state. This time is typically 30ns. In continuous

mode operation, the minimum on-time limit imposes a

minimum duty cycle of:

The desired output voltage is set by appropriate selection

of resistors R1 and R2 as shown in Figure 2. Choosing

large values for R1 and R2 will result in improved zero-

load efﬁciency but may lead to undesirable noise coupling

or phase margin reduction due to stray capacitances

DC

= f • t

(

ON(MIN)

)

(MIN)

at the V node. Care should be taken to route the V

FB

trace away from any noise source, such as the SW trace.

where t

is the minimum on-time. As the equation

ON(MIN)

To improve the frequency response of the main control

shows, reducing the operating frequency will alleviate the

minimum duty cycle constraint.

loop, a feedforward capacitor, C , may be used as shown

F

in Figure 2.

In the rare cases where the minimum duty cycle is

surpassed, the output voltage will still remain in regula-

tion, but the switching frequency will decrease from its

programmed value. This constraint may not be of critical

importance in most cases, so high switching frequencies

may be used in the design without any fear of severe

consequences. As the sections on Inductor and Capacitor

selection show, high switching frequencies allow the use

of smaller board components, thus reducing the footprint

of the application circuit.

ꢇ

ꢈꢉꢊ

ꢂꢃ

ꢂꢄ

ꢅ

ꢀ

ꢀꢁ

ꢏꢊꢅ3636ꢐ

ꢏꢊꢅ3636ꢑꢄ

ꢋꢌꢍꢎ

3636 ꢀꢆꢃ

Figure 2. Setting the Output Voltage

If the output voltage is outside the V sense range (0.6V

ON

– 5V for the LTC3636, 1.8V – 12V for the LTC3636-1), the

output voltage will stay in regulation, but the switching

frequency may deviate from the programmed frequency.

Internal/External Loop Compensation

The LTC3636/LTC3636-1 provides the option to use a

ﬁxed internal loop compensation network to reduce both

the required external component count and design time.

The internal loop compensation network can be selected

Minimum Off-Time/On-Time Considerations

The minimum off-time is the smallest amount of time that

the LTC3636/LTC3636-1 can turn on the bottom power

MOSFET, trip the current comparator and turn the power

MOSFET back off. This time is typically 100ns. For the

controlled on-time architecture, the minimum off-time

limit imposes a maximum duty cycle of:

by connecting the ITH pin to the INTV pin. To ensure

CC

stabilityitisrecommendedthatinternalcompensationonly

be used with applications with f > 1MHz. Alternatively,

SW

the user may choose speciﬁc external loop compensation

components to optimize the main control loop transient

responseasdesired.Externalloopcompensationischosen

by simply connecting the desired network to the ITH pin.

DC

= 1– f • t

+ 2 • t

DEAD

OFF(MIN)

(

)

(MAX)

3636fb

15

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

APPLICATIONS INFORMATION

Suggestedcompensationcomponentvaluesareshownin

Figure 3. For a 2MHz application, an R-C network of 220pF

and 13kΩ provides a good starting point. The bandwidth

of the loop increases with decreasing C. If R is increased

by the same factor that C is decreased, the zero frequency

will be kept the same, thereby keeping the phase the same

in the most critical frequency range of the feedback loop.

A 10pF bypass capacitor on the ITH pin is recommended

for the purposes of ﬁltering out high frequency coupling

from stray board capacitance. In addition, a feedforward

produce output voltage and ITH pin waveforms that will

give a sense of the overall loop stability without breaking

the feedback loop.

Switching regulators take several cycles to respond to a

step in load current. When a load step occurs, V

im-

OUT

•ESR,where

mediatelyshiftsbyanamountequalto∆I

LOAD

ESR is the effective series resistance of C . ∆I

also

OUT

LOAD

begins to charge or discharge C

generating a feedback

OUT

error signal used by the regulator to return V

to its

can

OUT

steady-state value. During this recovery time, V

OUT

capacitor C can be added to improve the high frequency

F

be monitored for overshoot or ringing that would indicate

a stability problem.

response, as previously shown in Figure 2. Capacitor C

F

provides phase lead by creating a high frequency zero

When observing the response of V

to a load step, the

with R2 which improves the phase margin.

OUT

initialoutputvoltagestepmaynotbewithinthebandwidth

of the feedback loop, so the standard second order over-

shoot/DCratiocannotbeusedtodeterminephasemargin.

Theoutputvoltagesettlingbehaviorisrelatedtothestability

of the closed-loop system and will demonstrate the actual

overall supply performance. For a detailed explanation of

optimizing the compensation components, including a

review of control loop theory, refer to Linear Technology

Application Note 76.

ꢀꢁꢂ

ꢃ

ꢄꢅꢆꢇ

ꢓꢁꢄ3636ꢔ

ꢓꢁꢄ3636ꢕꢈ

ꢈ3ꢉ

ꢄ

ꢎꢏꢇ

ꢄ

ꢄꢅꢆꢇ

ꢊꢊꢋꢌꢍ

ꢐꢑꢒ

3636 ꢍꢋ3

Figure 3. Compensation Component

Checking Transient Response

The regulator loop response can be checked by observing

theresponseofthesystemtoaloadstep.Whenconﬁgured

for external compensation, the availability of the ITH pin

not only allows optimization of the control loop behavior

butalsoprovidesaDC-coupledandACﬁlteredclosedloop

response test point. The DC step, rise time, and settling

behavioratthistestpointreﬂecttheclosedloopresponse.

Assuming a predominantly second order system, phase

margin and/or damping factor can be estimated using the

percentage of overshoot seen at this pin.

In some applications, a more severe transient can be

caused by switching in loads with large (>10µF) input

capacitors. The discharged input capacitors are effec-

tively put in parallel with C , causing a rapid drop in

OUT

V

. No regulator can deliver enough current to prevent

OUT

this problem, if the switch connecting the load has low

resistance and is driven quickly. The solution is to limit

the turn-on speed of the load switch driver. A hot swap

controller is designed speciﬁcally for this purpose and

usuallyincorporatescurrentlimiting,short-circuitprotec-

tion, and soft starting.

The ITH external components shown in Figure 3 circuit

will provide an adequate starting point for most applica-

tions. The series R-C ﬁlter sets the dominant pole-zero

loop compensation. The values can be modiﬁed slightly

(from 0.5 to 2 times their suggested values) to optimize

transient response once the ﬁnal PC layout is done and

the particular output capacitor type and value have been

determined. The output capacitors need to be selected

because their various types and values determine the

loop gain and phase. An output current pulse of 20ꢀ to

100ꢀ of full load current having a rise time of ~1µs will

On-Die Temperature Monitor

The LTC3636/LTC3636-1 produces a voltage at the TMON

pinproportionaltothemeasuredjunctiontemperature.The

junction temperature-to-voltage scaling factor is 200°K/V.

Thus,toobtainthejunctiontemperatureindegreesKelvin,

simply multiply the voltage provided at the TMON pin by

the scaling factor. To obtain the junction temperature in

degrees Celsius, subtract 273 from the value obtained in

degrees Kelvin.

3636fb

16

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

APPLICATIONS INFORMATION

pin. When TRACKSS is above 0.6V, tracking is disabled

and the feedback voltage will regulate to the internal

reference voltage.

The temperature monitor function uses a chopping tech-

niquetoachievehighprecision.Asaresult,asmallperiodic

ripple may be seen at the TMON pin, the average of which

is the measured value of interest. The ripple frequency

will be the operating frequency divided by 32. If required,

a 1µF or greater capacitor to GND may be placed on the

output to reduce the magnitude of the ripple.

The voltage at the TRACKSS pin may be driven from an

external source, or alternatively, the user may leverage

the internal 1.4µA pull-up current source to implement

a soft-start function by connecting an external capacitor

(C ) from the TRACKSS pin to ground. The relationship

SS

MODE/SYNC Operation

between output rise time and TRACKSS capacitance is

The MODE/SYNC pin is a multipurpose pin allowing both

mode selection and operating frequency synchroniza-

given by:

t

= 430000Ω • C

SS

tion. Floating this pin or connecting it to INTV enables

CC

A default internal soft-start ramp forces a minimum soft-

start time of 1000µs by overriding the TRACKSS pin input

during this time period. Hence, capacitance values less

than approximately 2200pF will not signiﬁcantly affect

soft-start behavior.

Burst Mode operation for superior efﬁciency at low load

currents at the expense of slightly higher output voltage

ripple. When the MODE/SYNC pin is tied to ground, forced

continuousmodeoperationisselected,creatingthelowest

ﬁxed output ripple at the expense of light load efﬁciency.

WhendrivingtheTRACKSSpinfromanothersource, each

channel’s output can be set up to either coincidentally or

ratiometrically track another supply’s output, as shown

The LTC3636/LTC3636-1 will detect the presence of the

external clock signal on the MODE/SYNC pin and syn-

chronize the internal oscillator to the phase and frequency

of the incoming clock. The presence of an external clock

will place both regulators into forced continuous mode

operation.

in Figure 4. In the following discussions, V

refers to

OUT1

the LTC3636/LTC3636-1 output 1 as a master channel and

V

refers to output 2 as a slave channel. In practice,

OUT2

either channel can be used as the master.

Output Voltage Tracking and Soft-Start

To implement the coincident tracking in Figure 4a, con-

The LTC3636/LTC3636-1 allows the user to control the

output voltage ramp rate by means of the TRACKSS pin.

From 0 to 0.6V, the TRACKSS voltage will override the

internal 0.6V reference input to the error ampliﬁer, thus

regulating the feedback voltage to that of the TRACKSS

nect an additional resistive divider to V

and connect

OUT1

its midpoint to the TRACKSS pin of the slave channel.

The ratio of this divider should be the same as that of the

slave channel’s feedback divider shown in Figure 5a. In

this tracking mode, V

must be set higher than V

.

OUT1

OUT2

ꢄ

ꢀ

ꢅꢆꢀꢇ

ꢁꢂꢃꢄ

ꢄ

ꢀ

ꢅꢆꢀꢈ

ꢁꢂꢃꢅ

3636 ꢉꢊꢋb

ꢀꢁꢂꢃ

ꢃꢆꢇꢈ

3636 ꢍꢎꢏꢐ

(4a) Coincident Tracking

(4b) Ratiometric Tracking

Figure 4. Two Different Modes of Output Voltage Tracking

3636fb

17

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

APPLICATIONS INFORMATION

ꢄ

ꢅꢆꢇꢁ

ꢄ

ꢅꢆꢇꢁ

ꢄ

ꢅꢆꢇꢃ

ꢄ

ꢅꢆꢇꢃ

ꢀ3

ꢀꢂ

ꢀꢁ

ꢀꢃ

ꢀ3

ꢀꢁ

ꢀꢃ

ꢀ3

ꢀꢂ

ꢇꢅ

ꢇꢀꢍꢎꢏꢐꢐꢃ

ꢊꢋꢌ

ꢇꢅ

ꢇꢀꢍꢎꢏꢐꢐꢃ

ꢊꢋꢌ

ꢇꢅ

ꢈꢉꢁ

ꢊꢋꢌ

ꢇꢅ

ꢈꢉꢃ

ꢊꢋꢌ

ꢇꢅ

ꢈꢉꢃ

ꢊꢋꢌ

ꢇꢅ

ꢄ

ꢈꢉꢁ

ꢊꢋꢌ

ꢀꢂ

3636 ꢈꢑꢒ

(5a) Coincident Tracking Setup

(5b) Ratiometric Tracking Setup

Figure 5. Setup for Coincident and Ratiometric Tracking

ꢊꢂꢋꢌꢊꢇꢅ ꢂꢉꢆꢀꢉꢆ

To implement the ratiometric tracking, the feedback pin of

the master channel should connect to the TRACKSS pin of

the slave channel (as in Figure 5b). By selecting different

resistors, the LTC3636/LTC3636-1 can achieve different

modes of tracking including the two in Figure 4.

ꢀꢁꢂꢂꢃ

ꢄꢂꢅꢆꢇꢁꢈ

Uponstart-up,theregulatordefaultstoBurstModeopera-

ꢐꢏꢎ ꢐꢑꢎ

ꢍꢎ

ꢑꢎ

ꢏꢎ

ꢂꢉꢆꢀꢉꢆ ꢄꢂꢅꢆꢇꢁꢈ

tion until the output exceeds 80ꢀ of its ﬁnal value (V

>

FB

3636 ꢒꢍ6

0.48V).Oncetheoutputreachesthisvoltage,theoperating

mode of the regulator switches to the mode selected by

the MODE/SYNC pin as described above. During normal

operation, if the output drops below 10ꢀ of its ﬁnal value

(as it may when tracking down, for instance), the regula-

tor will automatically switch to Burst Mode operation to

prevent inductor saturation and improve TRACKSS pin

accuracy.

Figure 6. PGOOD Pin Behavior

Efﬁciency Considerations

The percent efﬁciency of a switching regulator is equal to

the output power divided by the input power times 100ꢀ.

It is often useful to analyze individual losses to determine

what is limiting the efﬁciency and which change would

produce the most improvement. Percent efﬁciency can

be expressed as:

Output Power Good

The PGOOD output of the LTC3636/LTC3636-1 is driven

by a 25Ω (typical) open-drain pull-down device. This

device will be turned off once the output voltage is within

5ꢀ (typical) of the target regulation point, allowing the

voltage at PGOOD to rise via an external pull-up resistor. If

theoutputvoltageexitsan8ꢀ(typical)regulationwindow

around the target regulation point, the open-drain output

will pull down with 20Ω output resistance to ground,

thus dropping the PGOOD pin voltage. This behavior is

described in Figure 6.

ꢀ Efﬁciency = 100ꢀ – (L1 + L2 + L3 +…)

where L1, L2, etc. are the individual losses as a percent-

age of input power.

Although all dissipative elements in the circuit produce

losses, three main sources usually account for most of

the losses in LTC3636/LTC3636-1 circuits: 1) I R losses,

2)switchinglossesandquiescentpowerloss3)transition

losses and other losses.

2

1. I R losses are calculated from the DC resistances of the

internal switches, R , and external inductor, R . In con-

A ﬁlter time of 40µs (typical) acts to prevent unwanted

SW

L

tinuous mode, the average output current ﬂows through

inductor L but is “chopped” between the internal top and

bottompowerMOSFETs.Thus,theseriesresistancelook-

ing into the SW pin is a function of both top and bottom

PGOOD output changes during V

transient events.

OUT

As a result, the output voltage must be within the target

regulation window of 5ꢀ for 40µs before the PGOOD pin

pulls high. Conversely, the output voltage must exit the

8ꢀ regulation window for 40µs before the PGOOD pin

pulls to ground.

MOSFET R

and the duty cycle (DC) as follows:

DS(ON)

R

SW

= (R )(DC) + (R )(1 – DC)

DS(ON)TOP DS(ON)BOT

3636fb

18

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

APPLICATIONS INFORMATION

TheR

forboththetopandbottomMOSFETscanbe

In a majority of applications, the LTC3636/LTC3636-1

does not dissipate much heat due to its high efﬁciency

and low thermal resistance of its QFN package. However,

in applications where the LTC3636/LTC3636-1 is running

at high ambient temperature, high input supply voltage,

high switching frequency, and maximum output current

load, the heat dissipated may exceed the maximum junc-

tion temperature of the part. If the junction temperature

reaches approximately 160°C, both power switches will

be turned off until temperature returns to 150°C.

DS(ON)

obtained from the Typical Performance Characteristics

2

curves. Thus to obtain I R losses:

2

I R losses = I

(R + R )

SW L

OUT

2. The internal LDO draws power from the V input to

IN

regulate the INTV rail. The total power loss here is

CC

the sum of the switching losses and quiescent current

losses from the control circuitry.

Each time a power MOSFET gate is switched from low

to high to low again, a packet of charge dQ moves

To prevent the LTC3636/LTC3636-1 from exceeding the

maximum junction temperature of 125°C, the user will

need to do some thermal analysis. The goal of the thermal

analysis is to determine whether the power dissipated

exceeds the maximum junction temperature of the part.

The temperature rise is given by:

from V to ground. The resulting dQ/dt is a current

IN

out of INTV that is typically much larger than the DC

CC

control bias current. In continuous mode, I

=

GATECHG

f(Q + Q ), where Q and Q are the gate charges of

T

B

T

B

the internal top and bottom power MOSFETs and f is

the switching frequency. For estimation purposes, the

T

RISE

= P • θ

D JA

gate charges (Q + Q ) on each LTC3636/LTC3636-1

T

B

As an example, consider the case when one of the regula-

tors is used in an application where V = 12V, I = 6A,

regulator channel are approximately 7.5nC.

IN

OUT

To calculate the total power loss from the LDO load,

simply add the gate charge current and quiescent cur-

rent and multiply by the voltage applied to V :

frequency = 1MHz, V

= 1.8V. From the R

graphs

OUT

DS(ON)

intheTypicalPerformanceCharacteristicssection,thetop

switch on-resistance is nominally 36mΩ and the bottom

switch on-resistance is nominally 19mΩ at 50°C ambient.

IN

P

LDO

= (I

+ I ) • V

GATECHG Q IN

The equivalent power MOSFET resistance R is:

SW

3. Other “hidden” losses such as transition loss, cop-

per trace resistances, and internal load currents can

account for additional efﬁciency degradations in the

overall power system. Transition loss arises from the

brief amount of time the top power MOSFET spends

in the saturated region during switch node transitions.

The LTC3636/LTC3636-1 internal power devices switch

quickly enough that these losses are not signiﬁcant

compared to other sources.

1.8V

12V

10.2V

12V

R

•

+R

•

= 21.6mΩ

DS(ON)

BOT

TOP

From the previous section’s discussion on gate drive, we

estimate the total gate drive current through the LDO to be

1MHz • 7.5nC = 7.5mA, and I of one channel is 0.65mA

Q

(see Electrical Characteristics). Therefore, the total power

dissipated by a single regulator is:

2

P = I

• R + V • (I

+ I )

GATECHG Q

D

OUT

SW

IN

Other losses, including diode conduction losses during

dead-time and inductor core losses, generally account

for less than 2ꢀ total additional loss.

2

P = (6A) • (0.0216Ω) + (12V) • (7.5mA + 0.65mA)

D

= 0.874W

Running two regulators under the same conditions would

result in a power dissipation of 1.748W. The QFN 5mm

× 4mm package junction-to-ambient thermal resistance,

Thermal Considerations

The LTC3636/LTC3636-1 requires the ground pins to be

well soldered to the PC board to provide good thermal

contact. This gives the QFN package exceptional thermal

properties, which is necessary to prevent excessive self-

heating of the part in normal operation.

θ ,isaround21°C/W.Therefore,thejunctiontemperature

JA

of the regulator operating in a 50°C ambient temperature

is approximately:

T = 1.748W • 21°C/W + 50°C = 87°C

J

3636fb

19

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

APPLICATIONS INFORMATION

which is below the maximum junction temperature of

125°C. With higher ambient temperatures, a heat sink or

cooling fan should be considered to drop the junction-to-

ambient thermal resistance.

2) The output capacitor, C , and inductor L should be

OUT

closely connected to minimize loss. The (–) plate of

C

should be closely connected to both GND and

OUT

the (–) plate of C .

IN

Remembering that the above junction temperature is

3) The resistive divider, (e.g. R1 to R4 in Figure 8) must be

obtained from an R

at 50°C, we might recalculate

connected between the (+) plate of C

and a ground

DS(ON)

OUT

the junction temperature based on a higher R

since

line terminated near GND. The feedback signal V

DS(ON)

FB

it increases with temperature. Redoing the calculation

should be routed away from noisy components and

traces, such as the SW line, and its trace length should

be minimized. Keep R1 and R2 close to the IC.

assuming that R increased 15ꢀ at 87°C yields a new

SW

junction temperature of 92°C. If the application calls for a

higher ambient temperature and/or higher load currents,

care should be taken to reduce the temperature rise of the

part by using a heat sink or air ﬂow.

4) Keep sensitive components away from the SW pin. The

R resistor,thecompensationcomponents,thefeedback

T

resistors, and the INTV bypass capacitor should all

CC

Figure 7 is a temperature derating curve based on the

DC2335 demo board (QFN package). It can be used to

estimate the maximum allowable ambient temperature

for given DC load currents in order to avoid exceeding

the maximum operating junction temperature of 125°C.

be routed away from the SW trace and the inductor L.

5) A ground plane is preferred.

6) Flood all unused areas on all layers with copper in order

to reduce the temperature rise of power components.

Thesecopperareasshouldbeconnectedtotheexposed

backside of the package (GND).

ꢀꢁꢂ

6ꢀꢁ

ꢀꢁꢂ

Refer to Figure 9 for board layout examples.

Design Example

ꢀ

ꢀ ꢁꢂꢃ

ꢀꢁ

As a design example, consider using the LTC3636/

LTC3636-1 in an application with the following speciﬁ-

ꢀ ꢁꢂꢃꢄ

ꢀꢁꢂꢃ

ꢀ ꢁꢂꢃꢄ

3ꢀꢁ

ꢀꢁꢂ

ꢀ

ꢀ 3ꢁ3ꢂ

f

ꢀꢁ

cations: V

OUT(MAX)

= 13.2V, V

OUT(MIN)

= 1.8V, V

= 3.3V,

IN(MAX)

= 6A, I

OUT1

OUT2

ꢀꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈꢅ

ꢀꢁꢂ ꢃꢄꢅꢆ ꢇ 6ꢅ

I

= 10mA, f = 2MHz, V

~

DROOP

(5ꢀ • V ). The following discussion will use equations

OUT

from the previous sections.

ꢀ

ꢀꢁ

ꢀꢁꢁ

ꢀꢁꢂ

ꢀꢁꢂꢃꢀꢄꢀ ꢁꢅꢅꢆꢇꢁꢈꢅꢉ ꢁꢀꢈꢃꢉꢊꢋ ꢋꢉꢀꢌꢉꢍꢁꢋꢄꢍꢉ ꢎꢏꢐꢑ

3636 ꢀꢁꢂ

Because efﬁciency is important at both high and low load

current, Burst Mode operation will be utilized.

Figure 7. Temperature Derating Curve for DC2335 Demo Circuit

First, the correct R resistor value for 2MHz switching fre-

T

Board Layout Considerations

quency must be chosen. Based on the equation discussed

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of the

LTC3636/LTC3636-1. Check the following in your layout:

earlier, R should be 160k; the closest standard value is

T

162k. RT can be tied to INTV if switching frequency

CC

accuracy is not critical.

1) Do the input capacitors connect to the V and GND

IN

Next, determine the channel 1 inductor value for about

pins as close as possible? These capacitors provide

the AC current to the internal power MOSFETs and their

drivers.

40ꢀ ripple current at maximum V :

IN

⎛

⎜

⎝

⎞ ⎛

⎟ ⎜

⎠ ⎝

⎞

⎟

⎠

1.8V

L1=

1−

= 0.32µH

2MHz • 2.4A

13.2V

3636fb

20

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

APPLICATIONS INFORMATION

A standard value of 0.33µH should work well here. Solv-

ing the same equation for channel 2 results in a 0.47µH

inductor.

Solving this equation for channel 2 results in an RMS

input current of 2.8A. Decoupling each V input with

IN

a 47µF ceramic capacitor should be adequate for most

applications.

C

will be selected based on the charge storage require-

OUT

ment. For a V

of 90mV for a 6A load step:

Lastly, the feedback resistors must be chosen. Picking

R1 and R3 to be 13.7k, R2 and R4 are calculated to be:

DROOP

3 • ΔI

3 • (6A)

OUT

C

≈

=

= 100µF

OUT1

⎛

⎜

⎝

⎞

1.8V

0.6V

f • V

(2MHz)(90mV)

DROOP

R2 = (13.7k) •

– 1 = 27.4k

⎟

⎠

Two 47µF ceramic capacitor should be used for channel 1.

Solving the same equation for channel 2 (using 5ꢀ of

⎛

⎜

⎝

⎞

3.3V

0.6V

R4 = (13.7k) •

– 1 = 61.9k

⎟

V

for V

) results in 55µF of capacitance (47µF is

OUT

DROOP

⎠

the closest standard value).

The ﬁnal circuit is shown in Figure 8.

C should be sized for a maximum current rating of:

IN

1.8V 13.2V − 1.8V

(

)

I

= 6A

= 2.1A

RMS

13.2V

ꢚ

ꢛꢂ

ꢃꢄꢚ

ꢇ

ꢜꢝꢗꢓ

ꢟꢄ

ꢛꢂ

ꢚ

ꢛꢂꢄ

ꢚ

ꢛꢂꢃ

ꢀꢁꢂꢃ

ꢀꢁꢂꢄ

ꢛꢂꢅꢚ

ꢇꢇ

ꢇꢄ

ꢜꢖꢝꢗꢓ

ꢑꢌꢍꢤꢏꢉꢢꢂꢇ

ꢛꢅꢘꢃ

ꢛꢅꢘꢄ

ꢀ

ꢇꢌꢑꢊꢃ

ꢇꢌꢑꢊꢄ

ꢃꢔꢖꢠꢞ

ꢇ

ꢒꢢꢊꢄ

ꢃꢔꢣꢓ

ꢇ

ꢒꢢꢊꢃ

ꢃꢔꢣꢓ

ꢃꢃꢞ

ꢎꢅꢇ3636ꢏ

ꢎꢅꢇ3636ꢐꢃ

ꢇ

ꢇꢌꢑꢊꢄ

ꢄꢄꢔꢣꢓ

ꢇꢌꢑꢊꢃ

33ꢔꢣꢓ

ꢅꢑꢌꢂ

ꢀꢅ

ꢀꢠ

ꢃ6ꢄꢞ

ꢅꢀꢆꢇꢈꢉꢉꢄ

ꢊꢋꢌꢌꢍꢄ

ꢒꢌꢌꢉꢅꢄ

ꢅꢀꢆꢇꢈꢉꢉꢃ

ꢊꢋꢌꢌꢍꢃ

ꢒꢌꢌꢉꢅꢃ

ꢎꢄ

ꢔꢖ6ꢕꢗꢘ

ꢎꢃ

ꢔꢖ33ꢗꢘ

ꢔꢖꢃꢗꢓ

ꢚ

ꢌꢁꢅꢃ

ꢌꢁꢅꢄ

ꢉꢙꢄ

ꢉꢙꢃ

3ꢖ3ꢚ ꢆꢅ 6ꢆ

ꢃꢖꢕꢚ ꢆꢅ 6ꢆ

ꢇ

ꢓꢃ

33ꢣꢓ

ꢓꢄ

ꢀꢜ

ꢀꢄ

ꢄꢄꢣꢓ

ꢇ

6ꢃꢖꢡꢞ

ꢄꢝꢖꢜꢞ

ꢌꢁꢅꢃ

ꢜꢝꢗꢓ

ꢟꢄ

ꢇ

ꢌꢁꢅꢄ

ꢚ

ꢓꢒꢃ

ꢓꢒꢄ

ꢋꢂꢍ

ꢜꢝꢗꢓ

ꢀ3

ꢃ3ꢖꢝꢞ

ꢀꢃ

ꢃ3ꢖꢝꢞ

3636 ꢓꢔꢕ

Figure 8. Design Example Circuit

3636fb

21

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

APPLICATIONS INFORMATION

V

OUT1

ꢃ

ꢔ

ꢈꢋꢇꢃ

ꢅꢍꢆꢇ

ꢑꢇ

ꢏꢃ

ꢄꢅꢆꢀ

ꢇꢈ

ꢀꢁꢃ

GND

ꢈꢉꢊꢀ ꢆꢅ ꢋꢌꢅꢍꢎꢏ

ꢐꢑꢊꢎꢒ

ꢄꢅꢆꢀ ꢇꢈ ꢉꢊꢈꢋꢌꢍ

ꢎꢏꢆꢌꢐ

ꢀꢁꢇ

ꢀꢁꢃ

ꢃ

ꢄꢅꢅꢀꢆꢇ

ꢃ

ꢔ

ꢉꢎ

ꢅꢌ

ꢈꢉꢊꢀ ꢆꢅ ꢋꢌꢅꢍꢎꢏ

ꢐꢑꢊꢎꢒ

ꢄꢅꢆꢀ ꢇꢈ ꢉꢊꢈꢋꢌꢍ

ꢎꢏꢆꢌꢐ

V

IN

ꢃ

ꢔ

ꢄꢔꢔ

ꢈꢃꢃ

ꢉꢎ

ꢅꢌ

ꢃ

ꢄꢅꢅꢀꢆꢂ

ꢀꢁꢂ

ꢄꢅꢆꢀ

ꢇꢈ

ꢀꢁꢂ

GND

ꢈꢉꢊꢀ ꢆꢅ ꢋꢌꢅꢍꢎꢏ

ꢐꢑꢊꢎꢒ

ꢄꢅꢆꢀ ꢇꢈ ꢉꢊꢈꢋꢌꢍ

ꢎꢏꢆꢌꢐ

ꢑꢂ

ꢏꢂ

ꢃ

ꢔ

ꢈꢋꢇꢂ

ꢅꢍꢆꢂ

V

OUT2

3636 ꢓꢔꢕꢖ

3636 ꢑꢒꢓb

Figure 9a. Example of Power Component Layout for

QFN Package

Figure 9b. Alternate Layout with GNDT Pins Connected to GND

V

OUT1

ꢕ

ꢈꢋꢇꢃ

ꢏꢃ

ꢄꢅꢆꢀ

ꢇꢈ

ꢀꢁꢃ

GND

ꢄꢅꢆꢀ ꢇꢈ ꢉꢊꢈꢋꢌꢍ

ꢎꢏꢆꢌꢐ

ꢀꢁꢃ

ꢕ

ꢅꢌ

ꢄꢅꢆꢀ ꢇꢈ

V

IN

ꢉꢊꢈꢋꢌꢍ

ꢎꢏꢆꢌꢐ

ꢕ

ꢄꢕꢕ

ꢅꢌ

ꢀꢁꢂ

ꢄꢅꢆꢀ

ꢇꢈ

ꢀꢁꢂ

GND

ꢄꢅꢆꢀ ꢇꢈ ꢉꢊꢈꢋꢌꢍ

ꢎꢏꢆꢌꢐ

ꢏꢂ

ꢕ

ꢈꢋꢇꢂ

V

OUT2

3636 ꢑꢒꢓꢔ

Figure 9c. Alternate Layout with Pins 29 to 34 Unconnected

3636fb

22

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

TYPICAL APPLICATIONS

1.8V/2.5V 3MHz Buck Regulator

ꢔ

ꢕꢂ

ꢃꢄꢔ

ꢇꢃ

ꢛꢜꢐꢑ

ꢞꢄ

ꢔ

ꢕꢂꢄ

ꢔ

ꢕꢂꢃ

ꢀꢁꢂꢃ

ꢀꢁꢂꢄ

ꢕꢅꢒꢄ

ꢕꢂꢅꢔ

ꢇꢇ

ꢇꢄ

ꢛꢏꢜꢐꢑ

ꢕꢅꢒꢃ

ꢀ

ꢇꢋꢖꢡꢄ

ꢃꢄꢏꢃꢟ

ꢇꢋꢖꢡꢃ

ꢇ

ꢊꢙꢡꢄ

ꢃꢎꢢꢑ

ꢇ

ꢊꢙꢡꢃ

ꢃꢎꢢꢑ

ꢃꢃꢏꢚꢟ

ꢆꢅꢇ3636ꢈ

ꢆꢅꢇ3636ꢉꢃ

ꢇ

ꢇꢋꢖꢡꢄ

ꢄꢄꢎꢢꢑ

ꢇꢋꢖꢡꢃ

ꢄꢄꢎꢢꢑ

ꢀꢅ

ꢖꢋꢗꢘꢈꢌꢙꢂꢇ

ꢀꢚ

ꢃꢎꢜꢟ

ꢊꢋꢋꢌꢅꢄ

ꢌꢓꢄ

ꢊꢋꢋꢌꢅꢃ

ꢌꢓꢃ

ꢆꢄ

ꢎꢏ33ꢐꢒ

ꢆꢃ

ꢎꢏꢄꢄꢐꢒ

ꢎꢏꢃꢐꢑ

ꢔ

ꢋꢁꢅꢃ

ꢋꢁꢅꢄ

ꢄꢏꢚꢔ ꢍꢅ 6ꢍ

ꢃꢏꢝꢔ ꢍꢅ 6ꢍ

ꢇ

ꢑꢃ

33ꢢꢑ

ꢑꢄ

ꢀꢛ

ꢛꢜꢏꢚꢟ

ꢀꢄ

ꢄꢄꢢꢑ

ꢄꢜꢏꢛꢟ

ꢇ

ꢋꢁꢅꢃ

ꢋꢁꢅꢄ

ꢔ

ꢑꢊꢃ

ꢑꢊꢄ

ꢛꢜꢐꢑ

ꢠꢂꢗ

ꢀ3

ꢃꢚꢟ

ꢀꢃ

ꢃ3ꢏꢜꢟ

3636 ꢅꢍꢎꢄ

3.3V/1.8V Sequenced Regulator with 8V Input UVLO (V_OUT1Enabled After V_OUT2

)

ꢙ

ꢚꢂ

ꢕꢙ ꢉꢆ ꢈꢑꢙ

ꢀ6

ꢃꢑꢑꢗ

ꢋꢃ

ꢛꢞꢓꢔ

ꢟꢈ

ꢙ

ꢚꢂꢃ

ꢚꢂꢈ

ꢀꢞ

ꢈꢃꢜꢗ

ꢀꢁꢂꢃ

ꢚꢂꢉꢙ

ꢋꢋ

ꢋꢈ

ꢛꢒꢞꢓꢔ

ꢄꢅꢆꢆꢇꢈ

ꢀꢁꢂꢈ

ꢠꢆꢇꢡꢌꢏꢢꢂꢋ

ꢀꢉ

ꢀꢜ

ꢃ6ꢈꢗ

ꢀꢕ

ꢛꢑꢒꢈꢗ

ꢚꢉꢖꢈ

ꢚꢉꢖꢃ

ꢊꢉꢋ3636ꢌ

ꢊꢉꢋ3636ꢍꢃ

ꢀ

ꢋꢆꢠꢄꢃ

ꢋꢆꢠꢄꢈ

ꢃꢑꢒꢜꢗ

ꢋ

ꢎꢢꢄꢃ

ꢃꢑꢣꢔ

ꢃꢃꢗ

ꢎꢢꢄꢈ

ꢃꢑꢣꢔ

ꢋ

ꢋꢆꢠꢄꢈ

ꢈꢈꢑꢣꢔ

ꢋꢆꢠꢄꢃ

33ꢑꢣꢔ

ꢎꢆꢆꢏꢉꢈ

ꢏꢘꢈ

ꢎꢆꢆꢏꢉꢃ

ꢏꢘꢃ

ꢊꢈ

ꢊꢃ

ꢑꢒ33ꢓꢖ

ꢑꢒꢃꢓꢔ

ꢑꢒ6ꢕꢓꢖ

ꢙ

ꢆꢁꢉꢃ

ꢆꢁꢉꢈ

3ꢒ3ꢙ ꢐꢉ 6ꢐ

ꢃꢒꢕꢙ ꢐꢉ 6ꢐ

ꢋ

ꢔꢈ

ꢔꢃ

ꢀꢛ

ꢀꢈ

ꢈꢈꢣꢔ

33ꢣꢔ

ꢋ

ꢆꢁꢉꢃ

ꢛꢞꢓꢔ

ꢟꢈ

ꢜꢛꢒꢝꢗ

ꢈꢛꢒ3ꢗ

ꢋ

ꢆꢁꢉꢈ

ꢙ

ꢛꢞꢓꢔ

ꢔꢎꢈ

ꢔꢎꢃ

ꢅꢂꢇ

ꢀ3

ꢀꢃ

ꢃꢈꢒꢃꢗ

3636 ꢉꢐꢑ3

3636fb

23

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

TYPICAL APPLICATIONS

1.2V/1.8V Buck Regulator with Coincident Tracking and 6V Input UVLO

ꢓ

ꢔꢂ

6ꢓ ꢅꢉ ꢄꢌꢓ

ꢇꢃ

ꢀꢕ

ꢓ

ꢔꢂꢃ

ꢔꢂꢄ

ꢍꢕꢏꢐ

ꢖꢄ

ꢃꢙꢍꢗ

ꢀꢁꢂꢃ

ꢀꢁꢂꢄ

ꢔꢂꢅꢓ

ꢇꢇ

ꢇꢄ

ꢍꢎꢕꢏꢐ

ꢝꢉꢞꢟꢠꢊꢡꢂꢇ

ꢀꢅ

ꢀꢘ

ꢍꢌꢎꢄꢗ

ꢀꢙ

ꢃꢚ6ꢗ

ꢔꢅꢑꢄ

ꢔꢅꢑꢃ

ꢀ

ꢇꢉꢝꢣꢃ

ꢇꢉꢝꢣꢄ

ꢃꢘꢎꢕꢗ

ꢃꢙꢗ

ꢆꢅꢇ3636

ꢇ

ꢇꢉꢝꢣꢄ

ꢃꢤꢐ

ꢇꢉꢝꢣꢃ

ꢃꢤꢐ

ꢈꢉꢉꢊꢅꢄ

ꢊꢒꢄ

ꢈꢉꢉꢊꢅꢃ

ꢊꢒꢃ

ꢆꢄ

ꢌꢎ33ꢏꢑ

ꢆꢃ

ꢌꢎꢍꢕꢏꢑ

ꢌꢎꢃꢏꢐ

ꢓ

ꢉꢁꢅꢃ

ꢃꢎꢘꢓ ꢋꢅ 6ꢋ

ꢉꢁꢅꢄ

ꢃꢎꢄꢓ ꢋꢅ 6ꢋ

ꢇ

ꢍꢕꢏꢐ

ꢖꢄ

ꢇ

ꢍꢕꢏꢐ

ꢖꢄ

ꢉꢁꢅꢄ

ꢉꢁꢅꢃ

ꢀꢄ

ꢀꢍ

ꢃꢌꢗ

ꢃꢙꢗ

ꢅꢀꢋꢇꢛꢊꢊꢄ

ꢇ

ꢐꢃ

6ꢄꢜꢐ

ꢐꢄ

ꢀ6

ꢍꢎꢚꢚꢗ

ꢘꢄꢜꢐ

ꢓ

ꢐꢈꢃ

ꢐꢈꢄ

ꢢꢂꢞ

ꢀ3

ꢃꢌꢗ

ꢀꢃ

ꢃꢌꢗ

3636 ꢅꢋꢌꢍ

3636fb

24

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

TYPICAL APPLICATIONS

Dual Output Regulator from Multiple Input Supplies (Powers V_IN1Before V_IN2

)

ꢄꢃꢗ

ꢋꢁꢅꢃ

ꢏꢗ

ꢝꢞꢋꢖꢟꢀꢌ ꢗ

ꢠ

ꢝꢞꢋꢖꢟꢀꢌ ꢗ

ꢠ

ꢋꢁꢅꢄ

ꢙꢛꢑꢒ

ꢛꢓꢛꢕ

ꢄꢎꢎꢕ

ꢃꢛꢙꢕ

ꢄꢎꢎꢕ

ꢗ

ꢘꢂꢄ

ꢘꢂꢃ

ꢀꢁꢂꢃ

ꢀꢁꢂꢄ

ꢆꢅꢇ3636ꢈ

ꢆꢅꢇ3636ꢉꢄ

ꢀꢅ

ꢘꢂꢅꢗ

ꢇꢇ

ꢀꢏ

ꢄ6ꢃꢕ

ꢇꢃ

ꢙꢐꢛꢑꢒ

ꢡꢋꢢꢟꢈꢌꢣꢂꢇ

ꢘꢅꢔꢄ

ꢘꢅꢔꢃ

ꢀ

ꢇꢋꢡꢞꢄ

ꢇꢋꢡꢞꢃ

ꢄꢎꢐꢏꢕ

ꢇ

ꢄꢄꢕ

ꢊꢣꢞꢃ

ꢊꢣꢞꢄ

ꢄꢎꢥꢒ

ꢇ

ꢇꢋꢡꢞꢃ

ꢃꢃꢎꢥꢒ

ꢇꢋꢡꢞꢄ

33ꢎꢥꢒ

ꢊꢋꢋꢌꢅꢃ

ꢌꢖꢃ

ꢊꢋꢋꢌꢅꢄ

ꢌꢖꢄ

ꢆꢃ

ꢎꢐ6ꢓꢑꢔ

ꢆꢄ

ꢎꢐ33ꢑꢔ

ꢎꢐꢄꢑꢒ

ꢗ

ꢋꢁꢅꢄ

ꢋꢁꢅꢃ

3ꢐ3ꢗ ꢍꢅ 6ꢍ

ꢄꢐꢓꢗ ꢍꢅ 6ꢍ

ꢇ

ꢒꢄ

33ꢥꢒ

ꢀꢙ

ꢏꢙꢐꢚꢕ

ꢀꢃ

ꢒꢃ

ꢃꢃꢥꢒ

ꢃꢙꢐ3ꢕ

ꢇ

ꢋꢁꢅꢄ

ꢙꢛꢑꢒ

ꢜꢃ

ꢇ

ꢋꢁꢅꢃ

ꢗ

ꢒꢊꢄ

ꢒꢊꢃ

ꢙꢛꢑꢒ

ꢤꢂꢢ

ꢀ3

ꢄꢃꢐꢄꢕ

ꢀꢄ

ꢄꢃꢐꢄꢕ

3636 ꢅꢍꢎꢏ

3636fb

25

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/product/LTC3636#packaging for the most recent package drawings.

UFD Package

28-Lead Plastic QFN (4mm × 5mm)

ꢡꢈꢢfꢢꢣꢢꢤꢥꢢ ꢓꢂꢏ ꢇꢊꢌ ꢦ ꢜꢝꢧꢜꢨꢧꢅꢝ3ꢨ ꢈꢢꢩ ꢉꢪ

Exposed Pad Variation AA

ꢜꢆꢠꢜ ꢜꢆꢜꢝ

ꢜꢆꢜꢠꢝ

ꢜꢆꢔ3

ꢜꢆꢔꢨ

ꢖꢆꢝꢜ ꢜꢆꢜꢝ

ꢜꢆꢅꢝꢝ

ꢜꢆꢜꢬꢝ

ꢜꢆ3ꢜ

ꢜꢆꢔꢝ

ꢜꢆꢅꢝꢝ

ꢜꢆꢨ6

ꢜꢆꢜꢬꢝ

ꢜꢆ3ꢜ

ꢜꢆꢖꢠ

3ꢆꢅꢜ ꢜꢆꢜꢝ

ꢔꢆꢝꢜ ꢈꢃꢗ

ꢜꢆꢝ3

ꢜꢆꢝ6

ꢜꢆꢔꢝ

ꢅꢆꢜꢝ

ꢜꢆꢔꢝ

ꢅꢆꢜꢝ

ꢐꢉꢏꢑꢉꢌꢃ ꢁꢒꢂꢓꢋꢀꢃ

ꢜꢆꢔꢝ

ꢜꢆꢜꢝ

ꢜꢆꢝꢜ ꢙꢍꢏ

3ꢆꢝꢜ ꢈꢃꢗ

ꢖꢆꢅꢜ ꢜꢆꢜꢝ

ꢝꢆꢝꢜ ꢜꢆꢜꢝ

ꢈꢃꢏꢁꢕꢕꢃꢀꢇꢃꢇ ꢍꢁꢓꢇꢃꢈ ꢐꢉꢇ ꢐꢋꢂꢏꢚ ꢉꢀꢇ ꢇꢋꢕꢃꢀꢍꢋꢁꢀꢍ

ꢉꢐꢐꢓꢟ ꢍꢁꢓꢇꢃꢈ ꢕꢉꢍꢑ ꢂꢁ ꢉꢈꢃꢉꢍ ꢂꢚꢉꢂ ꢉꢈꢃ ꢀꢁꢂ ꢍꢁꢓꢇꢃꢈꢃꢇ

ꢜꢆꢠꢝ ꢜꢆꢜꢝ

ꢔꢆꢝꢜ ꢈꢃꢗ

ꢜꢆꢝꢜ ꢜꢆꢅꢜ

ꢖꢆꢜꢜ ꢜꢆꢅꢜ

ꢔ3

ꢔꢨ

ꢐꢋꢀ ꢅ ꢋꢇ

ꢜꢆꢅꢔ × ꢖꢝꢫ

ꢅ

ꢔꢔ

ꢜꢆꢝ6

ꢜꢆꢔꢝ

ꢜꢆꢅꢝꢝ

ꢜꢆꢜꢬꢝ

ꢜꢆꢔꢝ

ꢐꢋꢀ ꢅ

ꢂꢁꢐ ꢕꢉꢈꢑ

ꢡꢀꢁꢂꢃ ꢝꢪ

ꢅꢆꢜꢝ

ꢜꢆꢝ3

3ꢆꢝꢜ ꢈꢃꢗ

ꢜꢆꢜꢠꢝ

ꢜꢆꢔꢝ

ꢝꢆꢜꢜ ꢜꢆꢅꢜ

ꢜꢆꢔ3

ꢜꢆ3ꢜ

ꢜꢆꢖꢠ

ꢜꢆꢝ6

ꢜꢆꢔꢝ

ꢜꢆꢜꢝ

ꢜꢆꢔꢨ

ꢜꢆꢜꢬꢝ

ꢜꢆꢨ6

ꢜꢆꢅꢝꢝ

ꢜꢆꢔꢝ

ꢨ

ꢅꢝ

ꢡꢒꢇꢏꢔꢨꢪ ꢱꢗꢀ ꢜꢨꢅ6 ꢈꢃꢭ ꢉ

ꢅꢖ

ꢈ ꢯ ꢜꢆꢅꢅꢜ

ꢂꢟꢐ

ꢬ

ꢜꢆꢔꢜꢜ ꢈꢃꢗ

ꢜꢆꢜꢜ ꢰ ꢜꢆꢜꢝ

ꢜꢆꢝꢜ ꢙꢍꢏ

ꢙꢁꢂꢂꢁꢕ ꢭꢋꢃꢊꢮꢃꢘꢐꢁꢍꢃꢇ ꢐꢉꢇ

ꢀꢁꢂꢃꢄ

ꢅꢆ ꢇꢈꢉꢊꢋꢀꢌ ꢋꢍ ꢀꢁꢂ ꢉ ꢎꢃꢇꢃꢏ ꢐꢉꢏꢑꢉꢌꢃ ꢁꢒꢂꢓꢋꢀꢃ

ꢔꢆ ꢇꢈꢉꢊꢋꢀꢌ ꢀꢁꢂ ꢂꢁ ꢍꢏꢉꢓꢃ

3ꢆ ꢉꢓꢓ ꢇꢋꢕꢃꢀꢍꢋꢁꢀꢍ ꢉꢈꢃ ꢋꢀ ꢕꢋꢓꢓꢋꢕꢃꢂꢃꢈꢍ

ꢖꢆ ꢇꢋꢕꢃꢀꢍꢋꢁꢀꢍ ꢁꢗ ꢃꢘꢐꢁꢍꢃꢇ ꢐꢉꢇ ꢁꢀ ꢙꢁꢂꢂꢁꢕ ꢁꢗ ꢐꢉꢏꢑꢉꢌꢃ ꢇꢁ ꢀꢁꢂ ꢋꢀꢏꢓꢒꢇꢃ

ꢕꢁꢓꢇ ꢗꢓꢉꢍꢚꢆ ꢕꢁꢓꢇ ꢗꢓꢉꢍꢚꢛ ꢋꢗ ꢐꢈꢃꢍꢃꢀꢂꢛ ꢍꢚꢉꢓꢓ ꢀꢁꢂ ꢃꢘꢏꢃꢃꢇ ꢜꢆꢅꢝꢞꢞ ꢁꢀ ꢉꢀꢟ ꢍꢋꢇꢃ

ꢝꢆ ꢍꢚꢉꢇꢃꢇ ꢉꢈꢃꢉ ꢋꢍ ꢁꢀꢓꢟ ꢉ ꢈꢃꢗꢃꢈꢃꢀꢏꢃ ꢗꢁꢈ ꢐꢋꢀ ꢅ ꢓꢁꢏꢉꢂꢋꢁꢀ

ꢁꢀ ꢂꢚꢃ ꢂꢁꢐ ꢉꢀꢇ ꢙꢁꢂꢂꢁꢕ ꢁꢗ ꢐꢉꢏꢑꢉꢌꢃ

3636fb

26

For more information www.linear.com/LTC3636

LTC3636/LTC3636-1

REVISION HISTORY

REV

DATE DESCRIPTION

PAGE NUMBER

A

07/17 Revised thermal resistance values in Pin Conﬁguration

Revised Thermal Considerations section

02/18 Clariﬁed Minimum On-Time

2

19, 20

3

B

3636fb

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

27

For more information www.linear.com/LTC3636

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

LTC3636/LTC3636-1

TYPICAL APPLICATION

12A 1MHz 2-Phase Buck Regulator

ꢀ

ꢁꢂ

3ꢖꢃꢀ ꢅꢊ ꢄꢑꢀ

ꢀ

ꢔꢊꢊꢎꢅꢃ

ꢎꢞꢃ

ꢁꢂꢃ

ꢆꢃ

ꢗꢛꢚꢓ

ꢜꢄ

ꢑꢖꢃꢚꢓ

ꢁꢂꢄ

ꢑꢖꢙ6ꢚꢈ

ꢀ

ꢊꢝꢅ

ꢒꢝꢂꢃ

ꢒꢝꢂꢄ

ꢃꢖꢙꢀ ꢐꢅ ꢃꢄꢐ

ꢆ

ꢊꢝꢅ

ꢗꢛꢚꢓ

ꢜꢗ

ꢔꢊꢊꢎꢅꢄ

ꢎꢞꢄ

ꢁꢂꢅꢀ

ꢆꢆ

ꢆꢄ

ꢗꢖꢛꢚꢓ

6ꢠꢡꢓ

ꢇꢅꢆ3636

ꢁꢅꢈꢃ

ꢁꢅꢈꢄ

ꢄꢕꢖꢗꢘ

ꢃꢕꢖ6ꢘ

ꢗꢖꢙ3ꢘ

ꢄꢖꢄꢢꢓ

6ꢠꢡꢓ

ꢀ

ꢓꢔꢃ

ꢓꢔꢄ

ꢒꢅ

ꢉꢊꢋꢌꢍꢎꢏꢂꢆ

3ꢄꢗꢘ

ꢟꢂꢋ

3636 ꢅꢐꢑ6

RELATED PARTS

PART NUMBER DESCRIPTION

COMMENTS

LTC3633/

LTC3633A

15V/20V, Dual 3A (I ), 4MHz Synchronous Step-

95ꢀ Efﬁciency, V : 3.6V to 15V, V

= 0.6V, I = 500µA, I < 13µA,

OUT(MIN) Q SD

OUT

IN

Down DC/DC Converter

4mm × 5mm QFN-28, TSSOP-28E

LTC3605/

LTC3605A

15V/20V, 5A (I ), 4MHz, Synchronous Step-Down 95ꢀ Efﬁciency, V : 4V to 15V, V

= 0.6V, I = 2mA, I < 15µA,

OUT(MIN) Q SD

OUT

IN

DC/DC Converter

4mm × 4mm QFN-24

LTC3603

LTC3601

LTC3604

LTC3626

LTC7124

LTC3622

15V, 2.5A (I ), 3MHz, Synchronous Step-Down

95ꢀ Efﬁciency, V : 4.5V to 15V, V

= 0.6V, I = 75µA, I < 1µA,

Q SD

OUT

IN

OUT(MIN)

DC/DC Converter

4mm × 4mm QFN-20, MSOP-16E

15V, 1.5A (I ), 4MHz, Synchronous Step-Down

95ꢀ Efﬁciency, V : 4.5V to 15V, V

= 0.6V, I = 300µA, I < 1µA,

Q SD

OUT

IN

DC/DC Converter

4mm × 4mm QFN-20, MSOP-16E

15V, 2.5A (I ), 4MHz, Synchronous Step-Down

95ꢀ Efﬁciency, V : 3.6V to 15V, V

= 0.6V, I = 300µA, I < 15µA,

Q SD

OUT

IN

DC/DC Converter

3mm × 3mm QFN-16, MSOP-16E

20V, 2.5A Synchronous Monolithic Step-Down

Regulator with Current and Temperature Monitoring 3mm × 4mm QFN-20

95ꢀ Efﬁciency, V : 3.6V to 20V, V

= 0.6V, I = 300μA, I < 15μA,

Q SD

IN

17V, Dual 3.5A Synchronous Step-Down Regulator

with Ultralow Quiescent Current

95ꢀ Efﬁciency, V : 3.1V to 17V, V

= 0.6V, I < 8µA (Both Channels

Q

IN

Enabled), I < 1µA, 3mm × 5mm QFN-24 Package

SD

17V, Dual 1A Synchronous Step-Down Regulator

with Ultralow Quiescent Current

95ꢀ Efﬁciency, V : 2.7V to 17V, V

= 0.6V, I < 5µA (Both Channels

OUT(MIN) Q

IN

Enabled), I < 1µA, 3mm × 4mm DFN-14 and MSOP-16 Packages

SD

3636fb

LT 0218 • PRINTED IN USA

www.linear.com/LTC3636

28

 LINEAR TECHNOLOGY CORPORATION 2017

For more information www.linear.com/LTC3636


型号：	LTC3636-1
厂家：	Linear
描述：	Dual Channel 6A, 20V Monolithic Synchronous Step-Down Regulator
文件：	总28页 (文件大小：927K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC3636-1 [Linear]

相关型号：

SI9130DB

SI9135LG-T1

SI9135LG-T1-E3

SI9135_11

SI9136_11

SI9130CG-T1-E3

SI9130LG-T1-E3

SI9130_11

SI9137

SI9137DB

SI9137LG

SI9122E