LTC3646-1_15 [Linear]
40V, 1A Synchronous Step-Down Converter;
| 型号： | LTC3646-1_15 |
| 厂家： | 
Linear |
| 描述： | 40V, 1A Synchronous Step-Down Converter |
| 文件： | 总28页 (文件大小：448K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3646/LTC3646-1
40V, 1A Synchronous
Step-Down Converter
FEATURES
DESCRIPTION
The LTC®3646 is a high efficiency, step-down DC/DC
converter with internal high side and synchronous power
FETs. It draws only 140µA typical DC supply current in
Burst Mode operation at no load while maintaining output
voltage regulation.
n
Wide Input Voltage Range: 4.0V to 40V
n
1A Guaranteed Output Current
n
High Efficiency: Up to 95%
n
Wide Output Voltage Range
LTC3646: 2.0V to 30V
LTC3646-1: 0.6V to 15V
The LTC3646 can supply up to a 1A load, and its combina-
tion of Burst Mode operation, integrated power switches
and low quiescent current provides high efficiency over a
broad range of load currents. Alternatively, it can be used
inforcedcontinuousmodeforripplesensitiveapplications.
n
1% Accurate Reference Voltage
n
Internal or External Compensation
n
Switching Frequency Adjustable and Synchronizable:
200kHz to 3MHz
Selectable High Efficiency Burst Mode® Operation or
n
The LTC3646 has a wide 4.0V to 40V input range and its
patented controlled on-time architecture and 0.6V refer-
ence voltage allow for large step-down ratios without
the risk of output overvoltage. The frequency may be set
between 200kHz and 3.0MHz with a program resistor or
synchronized to an external clock.
Forced Continuous Mode
14 Lead 3mm × 4mm DFN or Thermally Enhanced
16-Lead MSOP Packages
n
APPLICATIONS
n
Point of Load Power Supplies
The internal soft-start, short-circuit protection and volt-
age rating make the LTC3646 a robust part ideal for high
voltage applications.
n
Intermediate Bus Power
n
Automotive Applications
L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks
and Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents, including 6580258, 5481178,
5994885, 6304066, 5847554, 6476589, 6774611.
TYPICAL APPLICATION
Efficiency Curve
100
90
80
70
60
50
40
30
20
10
0
1.0
0.8
0.6
0.4
0.2
0
V
IN
BOOST
SW
V
= 12V
PVIN
SVIN
RUN
INTV
IN
V
= 5V
40V MAX
OUT
f = 1MHz
0.1µF
3.3µH
LTC3646
V
OUT
= 3.3V
V
5V
1A
OUT
CC
10µF
MODE/SYNC
ITH
RT
V
ON
SWITCH
CONTROL
EXTV
CC
V
= 5V
OUT
412k
4.7µF
V
= 3.3V
OUT
+
–
15µF
V
FB
0.6V
SGND
PGND
0.001
0.01
0.1
1
56.2k
LOAD CURRENT (A)
3646 TA01b
3646 TA01a
36461fb
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For more information www.linear.com/LTC3646
LTC3646/LTC3646-1
ABSOLUTE MAXIMUM RATINGS
PVIN, SVIN Supply Voltage........................ –0.3V to 45V
SW Voltage (DC)........................... –0.3V to PVIN + 0.3V
BOOST – SW Voltage................................... –0.3V to 6V
(Notes 1, 7)
EXTV Voltage ........................................... –0.3V to 6V
CC
RUN Voltage............................................... –0.3V to 45V
PGOOD.......................................–0.3V to INTV + 0.3V
CC
V
Voltage................................................ –0.3V to 33V
Operating Junction Temperature Range
ON
MODE/SYNC, RT, ITH,
FB
(Notes 2, 7)............................................ –40°C to 150°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec) MSE ..........300°C
V
Voltage ................................–0.3V to INTV + 0.3V
CC
INTV Voltage ............................................ –0.3V to 6V
CC
PIN CONFIGURATION
TOP VIEW
TOP VIEW
SGND
1
2
3
4
5
6
7
14 SVIN
13 RUN
12 EXTV
11 INTV
1
2
3
4
5
6
7
8
SGND
16 SVIN
15 RUN
14 EXTV
V
FB
V
FB
ITH
RT
ITH
RT
CC
CC
CC
15
17
PGND
13 INTV
PGND
CC
V
12 BOOST
11 SW
ON
V
ON
10 BOOST
PGOOD
MODE/SYNC
NC
10 PVIN
PGOOD
9
8
SW
9
PVIN
MODE/SYNC
PVIN
MSE PACKAGE
16-LEAD PLASTIC MSOP
DE PACKAGE
T
= 150°C, θ = 38°C/W
JA
EXPOSED PAD (PIN 17) IS PGND, MUST BE SOLDERED TO PCB
JMAX
14-LEAD (4mm × 3mm) PLASTIC DFN
T
JMAX
= 150°C, θ = 43°C/W
JA
EXPOSED PAD (PIN 15) IS PGND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC3646EDE#PBF
LTC3646IDE#PBF
TAPE AND REEL
PART MARKING
3646
PACKAGE DESCRIPTION
14-Lead (4mm × 3mm) Plastic DFN
TEMPERATURE RANGE
–40°C to 85°C
LTC3646EDE#TRPBF
LTC3646IDE#TRPBF
LTC3646HDE#TRPBF
LTC3646EMSE#TRPBF
LTC3646IMSE#TRPBF
LTC3646HMSE#TRPBF
LTC3646EDE-1#TRPBF
LTC3646IDE-1#TRPBF
LTC3646HDE-1#TRPBF
3646
14-Lead (4mm × 3mm) Plastic DFN
14-Lead (4mm × 3mm) Plastic DFN
16-Lead Plastic MSOP
–40°C to 125°C
–40°C to 150°C
–40°C to 85°C
–40°C to 125°C
–40°C to 150°C
–40°C to 85°C
–40°C to 125°C
–40°C to 150°C
–40°C to 85°C
–40°C to 125°C
–40°C to 150°C
LTC3646HDE#PBF
LTC3646EMSE#PBF
LTC3646IMSE#PBF
LTC3646HMSE#PBF
LTC3646EDE-1#PBF
LTC3646IDE-1#PBF
LTC3646HDE-1#PBF
LTC3646EMSE-1#PBF
LTC3646IMSE-1#PBF
LTC3646HMSE-1#PBF
3646
3646
3646
16-Lead Plastic MSOP
3646
16-Lead Plastic MSOP
36461
36461
36461
14-Lead (4mm × 3mm) Plastic DFN
14-Lead (4mm × 3mm) Plastic DFN
14-Lead (4mm × 3mm) Plastic DFN
16-Lead Plastic MSOP
LTC3646EMSE-1#TRPBF 36461
LTC3646IMSE-1#TRPBF 36461
LTC3646HMSE-1#TRPBF 36461
16-Lead Plastic MSOP
16-Lead Plastic MSOP
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
36461fb
2
For more information www.linear.com/LTC3646
LTC3646/LTC3646-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2), PVIN = SVIN = 12V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Input Supply (PVIN, SVIN)
l
V
V
Input Voltage Operating Range
Input Supply Overvoltage Lockout
4.0
40
V
IN
l
l
V
Rising
IN
43.5
2.0
46
V
V
IN(OV)
Hysteresis (V Falling)
2.5
2.9
3.5
IN
V
Input Supply Undervoltage Lockout
DC Supply Current (Note 3)
V
Falling
IN
3.2
3.35
250
V
mV
IN(UV)
Hysteresis (V Rising)
IN
I
Q
Forced Continuous
620
140
8
875
190
µA
µA
µA
Sleep Mode
Shutdown Mode
V
= 0V
RUN
Main Control Loop
V
Output Voltage Range (Note 4)
LTC3646
LTC3646-1
2.0
0.6
30
15
V
V
OUT
V
Feedback Reference Voltage
–40°C < T < 85°C
0.594
0.591
0.6
0.6
0.606
0.609
V
V
FB
A
l
l
Feedback Voltage Line Regulation
Feedback Voltage Load Regulation
Feedback Input Current
V
= 4.0V to 40V, I = 1.5V
0.05
0.12
20
%/V
%
IN
TH
I
= 1.0V to 1.8V
= 0.6V
TH
V
0
nA
µS
ns
ns
A
FB
g
Error Amplifier Transconductance
Minimum On-Time
External Comp
300
30
m(EA)
ON(MIN)
OFF(MIN)
LIM
t
t
I
V
= 40V, R = 30k, V = 2V
IN
RT
ON
Minimum Off-Time
80
l
Valley Switch Current Limit
Internal Oscillator Frequency
0.9
1.2
1.5
V
= V
1.6
2.25
0.2
1.5
3.0
2.95
0.27
1.75
3.45
MHz
MHz
MHz
MHz
RT
INTVCC
R
R
R
= 450kΩ
= 60kΩ
= 30kΩ
0.19
1.25
2.55
RT
RT
RT
External Clock Frequency Range
0.2
3.0
MHz
R
Top Switch On-Resistance (Note 5)
Bottom Switch On-Resistance (Note 5)
V
IN
V
IN
= 5.5V
= 5.5V
200
120
mΩ
mΩ
DS(ON)
Switch Leakage
V
IN
V
IN
= V = 40V, V = 0V
RUN
1
1
µA
µA
SW
= 40V, V = 0V, V
= 0V
SW
RUN
Internal V Regulator
CC
l
V
INTV Voltage
I
I
= 5mA
4.8
5.0
0.5
3.0
0.3
4.5
200
5.2
V
%
V
INTVCC
CC
INTVCC
INTV Load Regulation (Note 6)
= 0mA to 5mA
CC
INTVCC
INTV Undervoltage Lockout
INTV Falling
CC
CC
INTV UVLO Hysteresis
V
CC
EXTV Switchover Voltage
EXTV Rising
4.25
4.65
V
CC
CC
EXTV Hysteresis
mV
CC
Operation
V
RUN
RUN Pin Threshold
RUN Rising
RUN Falling
Hysteresis
1.17
1.06
1.21
1.10
110
1.26
1.14
V
V
mV
RUN Pin Leakage Current
RUN = 1.3V
0
1
µA
V
V
PGOOD Overvoltage Threshold
FB Rising
FB Falling
5.0
3.5
7.5
5
10
%V
%V
PGOOD(UT)
PGOOD(LT)
PGOOD
FB
FB
PGOOD Undervoltage Threshold
PGOOD Filter Time
FB Falling
FB Rising
–5.0
–3.5
–7.5
–5
–10
%V
%V
FB
FB
t
RT = INTV
15
30
µs
CC
36461fb
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For more information www.linear.com/LTC3646
LTC3646/LTC3646-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2), PVIN = SVIN = 12V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
= 10mA
MIN
TYP
MAX
UNITS
Ω
R
PGOOD
PGOOD Pull-Down Resistance
PGOOD Leakage
I
63
PGOOD
V
= V
1.0
µA
PGOOD
INTVCC
t
Internal Soft-Start Time
Mode Threshold Voltage
250
500
µs
SS
l
l
l
l
V
Mode V
Mode V
1.2
1.2
V
V
V
V
MODE/SYNC
IH
IL
0.3
SYNC Threshold Voltage
SYNC
SYNC
IH
IL
0.3
2
MODE/SYNC Input Current
1
µA
V
l
Internal ITH Voltage Threshold
INTV – 0.3V
CC
V
ON
Pin Input Impedance
LTC3646
LTC3646-1
520
600
kΩ
kΩ
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 3: Dynamic supply current is higher due to gate charging being
delivered at the switch frequency.
Note 4: Limits to V
are a subject to PVIN, SVIN, t
, t
,
OUT
ON(MIN) OFF(MIN)
and frequency constraints. See the Applications Information section for a
further discussion. These items are tested with appropriate combinations
Note 2: The LTC3646 is tested under pulsed load conditions such that
T ≈ T . The LTC3646E is guaranteed to meet specifications from
of V , V and frequency.
J
A
IN ON
0°C to 85°C junction temperature. Specifications over the –40°C to
125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LTC3646I is guaranteed over the –40°C to 125°C operating junction
temperature range and the LTC3646H is guaranteed over the –40°C to
150°C operating junction temperature range. High junction temperatures
derate operating lifetimes; operating lifetime is derated for junction
temperatures greater than 125°C. Note that the maximum ambient
Note 5: R
is guaranteed by correlation to wafer level measurements.
DS(ON)
Note 6: Maximum allowed current draw when used as a regulated output
is 5mA. This supply is only intended to provide additional DC load current
as needed and not to regulate large transient or AC behavior as such
waveforms may impact LTC3646 operation.
Note 7: This IC includes overtemperature protection intended to protect
the device during momentary overload conditions. The maximum junction
temperature may be exceeded when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may result in device degradation or failure.
temperature consistent with these specifications is determined by specific
operating conditions in conjunction with board layout, the rated package
thermal impedance and other environmental factors.
36461fb
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For more information www.linear.com/LTC3646
LTC3646/LTC3646-1
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, SVIN/PVIN = 12V, fO = 1MHz unless otherwise noted.
Efficiency vs Load Current,
Burst Mode Operation
Efficiency vs Load Current,
Forced Continuous Mode Operation
Efficiency vs Load Current
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
100
V
O
= 1.8V
V
O
= 1.8V
OUT
OUT
Burst Mode OPERATION
f
= 1.5MHz
f = 1.5MHz
90
80
70
60
50
FORCED CONTINUOUS
40
OPERATION
30
20
V
V
V
= 5V
= 8V
= 12V
V
V
V
= 5V
= 8V
= 12V
IN
IN
IN
IN
IN
IN
V
OUT
V
OUT
= 5V
= 3.3V
10
0
0.001
0.01
0.1
1
0.001
0.01
0.1
1
0.001
0.01
0.1
1
LOAD CURRENT (A)
LOAD CURRENT (A)
LOAD CURRENT (A)
36461 G01
36461 G02
36461 G03
Efficiency vs Input Voltage,
Burst Mode Operation
Reference Voltage
vs Temperature
RDS(ON) vs Temperature
100
95
90
85
80
75
70
608
606
604
602
600
598
596
594
592
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
LOAD = 500mA
LOAD = 1A
MAIN SWITCH
LOAD = 100mA
SYNCHRONOUS SWITCH
65 L = 6.8µH
V
= 3.3V
OUT
60
0
5
10 15 20 25 30 35 40
INPUT VOLTAGE (V)
36461 G04
–50 –30 –10 10 30 50 70 90 110 130 150
–50 –30 –10 10 30 50 70 90 110 130 150
TEMPERATURE (°C)
TEMPERATURE (°C)
36461 G05
36461 G06
Switch Pin Leakage
vs Temperature and Supply
Oscillator Internal Set Frequency
vs Temperature
Oscillator Externally Set Frequency
vs Temperature
1.8
1.7
1.6
1.5
1.4
1.3
1.2
20
18
16
14
12
10
8
2.50
2.45
2.40
2.35
2.30
2.25
2.20
2.15
2.10
2.05
2.00
R
= 60k
V
= V
INTVCC
V
DS
V
DS
V
DS
V
DS
= 12V, MAIN SWITCH
RT
RT
= 12V, SYNCHRONOUS SWITCH
= 40V, MAIN SWITCH
= 40V, SYNCHRONOUS SWITCH
6
4
2
0
–40 –20
0
20 40 60 80 100 120 140
TEMPERATURE (°C)
36461 G09
–50 –30 –10 10 30 50 70 90 110 130 150
–40 –20
0
20 40 60 80 100 120 140
TEMPERATURE (°C)
TEMPERATURE (°C)
36461 G07
36461 G08
36461fb
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For more information www.linear.com/LTC3646
LTC3646/LTC3646-1
TYPICAL PERFORMANCE CHARACTERISTICS
TA = 25°C, SVIN/PVIN = 12V, fO = 1MHz unless otherwise noted.
No Load Quiescent Current vs
Temperature, Burst Mode Operation
Bottom Switch Current Limit
vs Temperature
Load Regulation
1.6
1.2
0.8
0.4
0
1.5
1.4
1.3
1.2
1.1
1.0
200
180
160
140
120
100
V
= 5V
OUT
FORCED CONTINUOUS
Burst Mode OPERATION
–0.4
0
0.2
0.4
0.6
0.8
1
–40 –20
0
20 40 60 80 100 120 140
TEMPERATURE (°C)
36461 G11
–40 –20
0
20 40 60 80 100 120 140
TEMPERATURE (°C)
36461 G10
LOAD CURRENT (A)
36461 G12
Start-Up from Shutdown,
Forced Continuous Mode
Output Voltage vs Time,
Burst Mode Operation
Start-Up from Shutdown,
Burst Mode Operation
SW
10V/DIV
RUN
5V/DIV
RUN
5V/DIV
I
I
I
L
L
L
250mA/DIV
250mA/DIV
250mA/DIV
V
V
V
OUT
5V/DIV
OUT
OUT
20mV/DIV
5V/DIV
AC-COUPLED
36461 G13
36461 G14
36461 G15
2µs/DIV
100µs/DIV
100µs/DIV
V
V
= 12V
I
= 25mA
I
= 25mA
LOAD
IN
LOAD
= 5V
OUT
LOAD
I
= 20mA
Load Step,
Forced Continuous Operation
IQ Shutdown vs Supply and
Temperature
Load Step, Burst Mode Operation
60
50
40
30
20
10
0
V
V
= 40V
= 12V
IN
IN
I
I
LOAD
LOAD
1A/DIV
1A/DIV
I
I
L
L
1A/DIV
1A/DIV
V
V
OUT
OUT
AC-COUPLED
100mV/DIV
AC-COUPLED
100mV/DIV
36461 G17
36461 G16
10µs/DIV
40µs/DIV
V
= 1.2V
V
= 1.2V
OUT
OUT
50mA to 1A STEP
= 2.25MHz
50mA to 1A STEP
= 2.25MHz
f
R
C
f
R
C
O
O
–40 –20
0
20 40 60 80 100 120 140
TEMPERATURE (°C)
36461 G18
= 200kΩ
= 33pF
= 200kΩ
= 33pF
COMP
COMP
COMP
COMP
C = 10pF
C
C = 10pF
C
F
OUT
F
OUT
= 15µF
= 15µF
36461fb
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For more information www.linear.com/LTC3646
LTC3646/LTC3646-1
PIN FUNCTIONS (DFN/MSOP)
SGND (Pin 1/Pin 1): Analog Ground Pin. This pin should
have a low noise connection to the reference ground.
PVIN (Pin 8/Pins 9, 10): Supply Pin for the Power Switch.
This pin connects directly to top switch. Closely decouple
thispintoPGNDwitha10µForgreater,lowESRcapacitor.
V
FB
(Pin 2/Pin 2): Output Voltage Feedback Pin. Input to
theerroramplifierthatcomparesthefeedbackvoltagewith
the internal 0.6V reference. Connect this pin to a resistor
divider network to program the desired output voltage.
SW (Pin 9/Pin 11): Switch Node Output Pin. Connect this
pin to the switch side of the external inductor and boost
capacitor.
ITH (Pin 3/Pin 3): Error Amplifier Output and Switching
RegulatorCompensationPoint. Connectthispintoappro-
priate external components to compensate the regulator
BOOST (Pin 10/Pin 12): Boosted Supply Pin. A boosted
voltage is generated at this pin by connecting a capacitor
between this pin and the SW pin. The normal operation
loop frequency response. Connect this pin to INTV to
voltage swing of this pin ranges from INTV to PVIN
CC
CC
use the default internal compensation.
+ INTV . When necessary, connect the cathode of an
CC
external boost diode to this pin. See the Boost Capacitor
RT (Pin 4/Pin 4): Oscillator Frequency Program Pin. Con-
nect an external resistor between 450k and 30k from this
pin to SGND to program the switching frequency from
and Diode section.
INTV (Pin 11/Pin 13): Internal 5.0V Regulator Output
CC
200kHz to 3.0MHz. When RT is connected to INTV , the
Pin. This pin should be decoupled to PGND with a 4.7µF or
greater low ESR capacitor. When necessary, connect the
anode of an external boost diode to this pin. The internal
regulator is disabled when the RUN pin is low.
CC
switching frequency will be 2.25MHz. Do not float RT.
V
(Pin 5/Pin 5): On-Time Voltage Input Pin. This pin
ON
provides information about the output voltage (V ) to
OUT
the on-time control loop. Connect this pin to the regulated
output to make the on-time proportional to the output
voltage.
EXTV (Pin 12/Pin 14): Use this input pin to power the
CC
chip’s low voltage control circuitry if a high efficiency
supply between 4.5V and 6.0V is available. Otherwise,
connect this pin to SGND. See the Applications Informa-
tion section for further information.
PGOOD (Pin 6/Pin 6): Power Good Output Pin. PGOOD
is pulled to ground when the voltage at the V pin is not
FB
within7.5%(typical)oftheinternal0.6Vreference.PGOOD
RUN (Pin 13/Pin 15): Regulator Enable Pin. Enables chip
becomes high impedance once the voltage at the V pin
operation by applying a voltage greater than V
.
FB
RUN
returns to within 5% of the internal reference.
SVIN (Pin 14/Pin 16): Power Supply Input for Internal
Circuitry. Closely decouple this pin to SGND with a greater
than1µFlowESRcapacitor.SVINpinvoltageshouldequal
PVIN in order to correctly calculate on the on time and
maintain constant frequency operation.
MODE/SYNC (Pin 7/Pin 7): Mode Selection and External
Clock Input Pin. This pin forces the LTC3646 into forced
continuous operation when tied to ground, and high ef-
ficiency Burst Mode operation when tied to INTV . When
CC
driven with an external clock, the LTC3646 will adjust the
top switch on-time to match the switching frequency to
the applied clock frequency and the part will operate in
forcedcontinuousmode. Duringstart-uporexternalclock
synchronization, the operating mode will be as described
in the Applications Information section.
PGND (Exposed Pad Pin 15/Exposed Pad Pin 17): Power
Ground Pin. The exposed pad must be well soldered to
the PCB ground to provide a low impedance electrical
connection to ground and rated thermal performance.
36461fb
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For more information www.linear.com/LTC3646
LTC3646/LTC3646-1
FUNCTIONAL BLOCK DIAGRAM
C
C
PVIN
SVIN
SVIN
EXTV
PVIN
CC
+
–
RUN
1.21V
4.5V
+
–
INTV
CC
5V REG
MODE/SYNC
RT
C
VCC
OSCILLATOR
BOOST
SW
R
TG
RT
C
BOOST
L1
V
ON
V
OUT
CONTROL
LOGIC
ON-TIME CONTROLLER
VON
C
OUT
R
ON
tON
=
S
Q
VIN • fO
BG
I
REV
+
–
+
–
PGND
I
CMP
ITH
+
–
SENSE
SENSE
R
COMP
0.555V
0.645V
+
–
PGOOD
UV
C
COMP
+
–
EA
–
+
+
–
OV
INTV – 0.3V
CC
R1
R2
V
FB
0.6V
REF
SOFT-START
SGND
3646 BD
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LTC3646/LTC3646-1
OPERATION
then shuts off the bottom power MOSFET and places the
part into a low quiescent current sleep state, resulting in
discontinuous operation and increased efficiency at low
load currents. Both power MOSFETs will remain off with
the part in sleep and the output capacitor supplying the
loadcurrentuntiltheITHvoltagerisessufficientlytoinitiate
anothercycle.Discontinuousoperationisdisabledbytying
the MODE/SYNC pin to ground, placing the LTC3646 into
forced continuous mode. During forced continuous mode
operation, synchronous operation occurs regardless of
the output load current, and the inductor current trough
levels are allowed to become negative.
TheLTC3646andLTC3646-1arecurrentmode,monolithic,
synchronous, step-down regulators capable of 40V input
operation,andextremelyhighstepdownratioswhilemain-
taining constant frequency. (Both will be referred to as the
LTC3646 except as specifically noted.) Part operation is
enabledbyraisingthevoltageoftheRUNpinabove1.21V.
Main Control Loop
In normal operation a switching cycle is initiated by a
signal from the inductor valley current comparator (I
CMP
in the Block Diagram). The top power MOSFET is turned
on, and a timer is simultaneously started in the on-time
controller.Theon-timecontrollercomputesthecorrecton
The operating frequency is determined by the value of the
time (subject to t
) based on the desired switching
R
RT
resistor, which programs the current for the internal
ON(MIN)
frequencyf ,andstep-downratioV /V ,accordingtothe
oscillator.Aninternalphase-lockedloopadjuststheswitch-
ing regulator on-time so that the switching frequency
O
ON IN
formula shown in the Block Diagram. In a typical applica-
tion,theV pinshouldbeconnectedtotheoutputvoltage,
matches the programmed frequency, subject to t and
ON
ON
V
. When the timer expires, the top power MOSFET is
t
timeconstraintsshownintheElectricalCharacteristics
OUT
OFF
turned off and the bottom power MOSFET is turned on
until the current comparator (I ) trips, restarting the
table. Alternatively, the RT pin can be connected to the
INTV pin which causes the internal oscillator to run at
CMP
CC
timer and initiating the next cycle. The inductor current
is monitored by sensing the voltage drop across the SW
and PGND nodes of the bottom power MOSFET. The volt-
the default frequency of 2.25MHz.
A clock signal can be applied to the MODE/SYNC pin to
synchronizetheswitchingfrequencytoanexternalsource.
Whenoperatinginthisconfiguration, connectaresistorto
the RT pin with a value corresponding to the applied clock
frequency. With an external clock supplied to the MODE/
SYNCpin, thepartwilloperateinforcedcontinuousmode.
age at the ITH node sets the I
comparator threshold
CMP
corresponding to the inductor valley current. The error
amplifier (EA) adjusts the ITH voltage by comparing an
internal 0.6V reference voltage to the feedback signal,
V , derived from the output voltage. If, for example, the
FB
load current increases, the output voltage will decrease
relative to the 0.6V reference. The ITH voltage will rise
until the average inductor current increases to match the
load current.
Power Good Status Output
The PGOOD open-drain output will be pulled low if the
regulator output exits the V
regulation point. This condition is released once regula-
tion within the specified window is achieved. To prevent
unwanted PGOOD glitches during transients or dynamic
window around the
PGOOD
At low load currents, the inductor current can drop to
zero or become negative. If the LTC3646 is configured for
Burst Mode operation, this inductor current condition is
V
changes, the LTC3646 PGOOD falling edge includes
OUT
detected by the current reversal comparator (I ) which
REV
a filter time of approximately 70 clock cycles.
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OPERATION
SVIN/PVIN Overvoltage Protection
Short-Circuit Protection
In order to protect the internal power MOSFET devices
againsttransientvoltagespikes,theLTC3646continuously
monitors the SVIN pin for an overvoltage condition. When
TheLTC3646isdesignedtowithstandoutputshortcircuits.
In this situation the part will source I
(approximately
LIM
1.2A) plus half the inductor current ripple. Since V
is
OUT
SVIN rises above V
, the regulator suspends opera-
at or near 0V, the on-time will shorten and the off-time
will lengthen considerably, resulting in a lower switching
frequency.
IN(OV)
tion by shutting off both power MOSFETs and resetting
the soft-start level. Once V drops to below the specified
IN
rangeofV
,theregulatorimmediatelyrestartsnormal
IN(OV)
operation.
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APPLICATIONS INFORMATION
A generalLTC3646application circuitisshown on the first
page of this data sheet. External component selection is
largely driven by the load requirement and begins with the
selection of the inductor L. Once the inductor is chosen,
Connecting the RT pin to INTV will assert the internal
CC
default f = 2.25MHz; however, this switching frequency
O
willbemoresensitivetoprocessandtemperaturevariations
than using a resistor on RT (see the Typical Performance
Characteristics section).
the input capacitor, C , the output capacitor, C , the
IN
OUT
internal regulator capacitor, C , and the boost capaci-
VCC
Inductor Selection
tor, C
, can be selected. Next, the feedback resistors
BOOST
are selected to set the desired output voltage. Finally, the
remainingoptionalexternalcomponentscanbeselectedfor
functions such as external loop compensation, externally
programmed oscillator frequency and PGOOD.
Foragiveninputandoutputvoltage,theinductorvalueand
operatingfrequencydeterminetheinductorripplecurrent.
More specifically, the inductor ripple current decreases
with higher inductor value or higher operating frequency
according to the following equation:
Operating Frequency
VOUT
VOUT
Selectionoftheoperatingfrequencyisatrade-offbetween
efficiency and component size. High frequency operation
allows the use of smaller inductor and capacitor values.
Operation at lower frequencies improves efficiency by
reducing internal gate charge losses but requires larger
inductance values and/or capacitance to maintain low
∆I =
1−
L
f •L
V
IN
O
where ΔI = inductor ripple current (A), f = operating
L
O
frequency (Hz) and L = inductor value (H). A trade-off be-
tweencomponentsize,efficiencyandoperatingfrequency
can be seen from this equation. Accepting larger values of
output ripple voltage. The operating frequency, f , of the
O
ΔI allows the use of lower value inductors but results in
L
LTC3646 is determined by an external resistor that is con-
nected between the RT pin and ground. The value of the
resistor sets the ramp current that is used to charge and
discharge an internal timing capacitor within the oscillator
and can be calculated by using the following equation:
greater core loss in the inductor, greater ESR loss in the
output capacitor, and larger output ripple. Generally, the
highest efficiency operation is obtained at low operating
frequency with small ripple current.
The inductor value should be chosen to give a peak-to-
9E10
fO
RRT
=
peakripplecurrentofbetween30%and40%ofI
,
OUT(MAX)
where I
equals the maximum average output
OUT(MAX)
current. Note that the largest ripple current occurs at
where R is in Ω and f is in Hz.
RT
O
the highest V . To guarantee the ripple current does not
IN
exceed a specified maximum, the inductance should be
3000
chosen according to:
2500
2000
1500
1000
500
VOUT
VOUT
L =
1−
f • ∆I
V
L
IN
O
Once the value for L is known, the type of inductor must
be selected. Actual core loss is independent of core size
for a fixed inductor value, but is very dependent on the
inductanceselected.Astheinductanceincreases,coreloss
decreases. Unfortunately, increased inductance requires
more turns of wire leading to increased copper loss.
0
0
100
200
300
(kΩ)
400
500
R
RT
3646 F01
Figure 1
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APPLICATIONS INFORMATION
Ferritedesignsexhibitverylowcorelossandarepreferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core materials saturate “hard,” meaning the inductance
collapses abruptly when the peak design current is
exceeded. This collapse will result in an abrupt increase
in inductor ripple current, so it is important to ensure the
core will not saturate.
ESR input capacitor sized for the maximum RMS current
is recommended. The maximum RMS current is given by:
VOUT V − V
(
)
IN
OUT
IRMS = IOUT(MAX)
V
IN
This formula has a maximum at V = 2V , where I
RMS
IN
OUT
= I /2. This simple worst-case condition is commonly
OUT
used for design because even significant deviations do
not offer much relief. Note that ripple current ratings from
capacitor manufacturers are often based on only 2000
hours of life which makes it advisable to further derate
the capacitor or choose a capacitor rated at a higher
temperature than required.
Different core materials and shapes will change the size/
current and price/current relationship of an inductor.
Toroidal or shielded pot cores in ferrite or permalloy
materials are small and don’t radiate much energy but
generally cost more than powdered iron core inductors
with similar characteristics. The choice of which style
inductor to use mainly depends on the price versus size
requirements and any radiated field/EMI requirements.
New designs for surface mount inductors are available
from Toko, Vishay, NEC/Tokin, Cooper, Coilcraft, TDK and
Würth Electronik. Table 1 gives a sampling of available
surface mount inductors.
Several capacitors may be paralleled to meet the require-
ments of the design. For low input voltage applications
sufficient bulk input capacitance is needed to minimize
transient effects during output load changes. Even though
the LTC3646 design includes an overvoltage protection
circuit, care must always be taken to ensure input voltage
transients do not pose an overvoltage hazard to the part.
Table 1. Inductor Selection
The selection of C
is primarily determined by the effec-
OUT
INDUCTANCE
(µH)
DCR MAX CURRENT DIMENSIONS HEIGHT
tive series resistance (ESR) that is required to minimize
voltage ripple and load step transients. The output ripple,
(mΩ)
(A)
(mm)
(mm)
Würth Elektronik, TPC MH, L, LH Series
ΔV , is determined by:
3.3 (MH)
3.9 (L)
6.2 (LH)
35
55
45
1.8
2.1
1.7
4.8 × 4.8
5.8 × 5.8
5.8 × 5.8
2.8
1.8
2.8
OUT
1
∆VOUT < ∆I ESR+
L
Sumida, CDRH3d23/HP Series
8 • fO •COUT
1.2
3.3
40
70
3.5
2.2
3.92 × 3.92
3.92 × 3.92
2.5
2.5
When using low-ESR ceramic capacitors, it is more useful
tochoosetheoutputcapacitorvaluetofulfillachargestor-
age requirement. During a load step, the output capacitor
mustinstantaneouslysupplythecurrenttosupporttheload
until the feedback loop raises the switch current enough
to support the load. The time required for the feedback
looptorespondisdependentonthecompensationandthe
output capacitor size. Typically, 3 to 4 cycles are required
to respond to a load step, but only in the first cycle does
TDK, SLF10145 Series
22
33
59
82
2.1
1.6
10.1 × 10.1
10.1 × 10.1
4.5
4.5
Coilcraft MSS7341 Series
10
15
32
47
1.64
1.36
7.3 × 7.3
7.3 × 7.3
4.1
4.1
C and C
IN
Selection
OUT
The input capacitance, C , is needed to filter the trapezoi-
dal wave current at the drain of the top power MOSFET.
To prevent large voltage transients from occurring a low
IN
the output drop linearly. The output droop, V
, is
DROOP
usually about 3 times the linear drop of the first cycle.
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APPLICATIONS INFORMATION
Thus, a good place to start is with the output capacitor
size of approximately:
this supply is intended only to supply additional DC load
currents as desired; it is not intended to regulate large
transient or AC behavior as this may impact LTC3646
operation.
3 • ∆IOUT
fO • VDROOP
COUT
≈
Alternatively, if a suitable supply is available or can be
generated, the power required to operate the low voltage
circuitry of the LTC3646 can be supplied through the
EXTV pin. When the voltage on the EXTV pin is be-
Thoughthisequationprovidesagoodapproximation,more
capacitance may be required depending on the duty cycle
and load step requirements. The actual V
should be
CC
CC
DROOP
low 4.5V, the chip power is supplied by the internal LDO.
verified by applying a load step to the output.
As shown in the Block Diagram, when EXTV is above
CC
Using Ceramic Input and Output Capacitors
4.5V, the internal LDO is shut off, and an internal switch
is closed between the EXTV and INTV pins. Connect
CC
CC
Higher value, lower cost ceramic capacitors are now
available in small case sizes. Their high voltage rating
and low ESR make them ideal for switching regulator ap-
plications. However, due to the self-resonant and high-Q
characteristics of some types of ceramic capacitors, care
must be taken when these capacitors are used at the input
and output. When a ceramic capacitor is used at the input,
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
EXTV to SGND if an external supply meeting these con-
CC
straints is not available.If the voltage on the EXTV pin is
CC
efficiently generated, this will result in the highest overall
system efficiency and the least amount of heat generated
by the LTC3646. This effectively decreased the no-load
quiescent current by a factor of V /V . This topic is
OUT IN
further discussed in the Thermal Considerations section.
Boost Capacitor and Diode
V input. Atbest, thisringingcancoupletotheoutputand
IN
Theboostcapacitor,C
,isusedtocreateavoltagerail
be mistaken as loop instability. At worst, a sudden inrush
BOOST
above the applied input voltage V . Specifically, the boost
of current through the long wires can potentially cause a
IN
capacitor is charged to a voltage equal to approximately
voltage spike at V large enough to damage the part. For
IN
INTV each time the bottom power MOSFET is turned
a more detailed discussion, refer to Application Note 88.
CC
on. The charge on this capacitor is then used to supply
the required transient current during the remainder of the
switching cycle. When the top MOSFET is turned on, the
When choosing the input and output ceramic capacitors
choose the X5R or X7R dielectric formulations. These
dielectrics provide the best temperature and voltage
characteristics for a given value and size.
BOOST pin voltage will be equal to approximately V
+
IN
INTV . For most applications a 0.1μF ceramic capacitor
CC
will provide adequate performance.
INTV Regulator and EXTV
CC
CC
An internal switch is used to charge the boost capacitor
when the synchronous MOSFET is turned on. An external
Schottky diode can be connected between BOOST and
An internal low dropout (LDO) regulator produces a 5V
supplyvoltageusedtopowermuchoftheinternalLTC3646
circuitry including the power MOSFET gate drivers. The
INTV in parallel with this switch in order to improve
CC
INTV pin connects to the output of this regulator and
CC
the capacitor refresh. For best performance and sufficient
should have 4.7μF of decoupling capacitance to ground.
design margin an external diode must be used in circuits
The decoupling capacitor should have low impedance
where V
is programmed to be above 12V or the IC
OUT
electrical connections to the INTV and PGND pins to
CC
operates at a die temperature above 85°C. Forward cur-
rents through this diode are small, on the order of 10mA
to 20mA, but the diode chosen must have low reverse
leakage current at the expected voltage and temperature.
provide the transient currents required by the LTC3646.
The user may draw a maximum load current of 5mA from
this pin but must take into account the increased power
dissipationanddietemperaturethatresults. Furthermore,
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APPLICATIONS INFORMATION
The design example on the back page uses a DFLS1200
based on its low reverse leakage over the voltage and
temperature ratings of the LTC3646.
Minimum Off-Time/On-Time Considerations
The minimum off-time is the smallest amount of time that
the LTC3646 can turn on the bottom power MOSFET, trip
the current comparator and turn off the power MOSFET.
This time is typically 80ns. For the controlled on-time
current mode control architecture, the minimum off-time
limit imposes a maximum duty cycle of:
Output Voltage Programming
The LTC3646 will adjust the output voltage such that V
equals the reference voltage of 0.6V according to:
FB
R1
R2
= 1 – (f • t
)
DC
(MAX)
O
OFF(MIN)
VOUT = 0.6V 1+
where f is the switching frequency and t
is the
O
OFF(MIN)
minimumoff-time.Ifthemaximumdutycycleissurpassed,
due to a dropping input voltage for example, the output
will drop out of regulation. The minimum input voltage to
avoid this dropout condition is:
The desired output voltage is set by the appropriate selec-
tionofresistorsR1andR2asshowninFigure2. Choosing
largevaluesforR1andR2willresultinimprovedefficiency
but may lead to undesired noise coupling or phase margin
reduction due to stray capacitance at the V node. Care
VOUT
FB
VIN(MIN)
=
should be taken to route the FB line away from any noise
source, such as the SW line.
1− f • t
O
OFF(MIN)
Whenprogrammingoutputvoltagesabove12V,aSchottky
If there is concern about operating near the minimum
off-time limits, consider reducing the frequency to add
margin to the design.
diode connected between BOOST and INTV is needed
CC
(see the Boost Capacitor and Diode section.)
To improve the frequency response of the main control
Conversely, the minimum on-time is the smallest dura-
tion of time in which the top power MOSFET can be in
its “on” state. This time is typically 30ns. In continuous
mode operation, the minimum on-time limit imposes a
minimum duty cycle of:
loop a feedforward capacitor, C , may be used as shown
F
in Figure 2.
V
OUT
R1
C
F
DC
= (f • t
)
V
FB
(MIN)
O
ON(MIN)
R2
LTC3646
SGND
where t
is the minimum on-time. As the equation
ON(MIN)
shows, reducing the operating frequency will alleviate the
minimumdutycycleconstraint.Intherarecaseswherethe
minimum duty cycle is surpassed, the output voltage will
still remain in regulation, but the switching frequency will
decreasefromitsprogrammedvalue.Thisisanacceptable
result in many applications, so this constraint may not be
of critical importance in some cases, and high switching
frequencies may be used in the design without any fear
of severe consequences. As the sections on Inductor and
CapacitorSelectionshow,highswitchingfrequenciesallow
the use of smaller board components, thus reducing the
footprint of the application circuit.
3646 F02
Figure 2. Optional Feedforward Capacitor
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Minimum on-time can be affected by the output load cur-
rent and the trough current level. During the transition
between the top switch turn-off and the synchronous
switch turn-on, the inductor current discharges the SW
pin capacitance. When the inductor trough current level
is low, or reversing in forced continuous operation, the
minimum on-time can increase by approximately 20nS.
ITH
R
COMP
LTC3646
C
BYP
C
COMP
SGND
3634 F03
Figure 3. Compensation and Filtering Components
Output Voltage Limits
The Block Diagram shows that a sample of the output
|H(s)|
voltage (taken through the V pin) is used to servo the
ON
–2
correct on-time for a given application duty cycle and
frequency. This circuit limits the range of V
over which
OUT
the LTC3646 will be able to adjust the on-time in order to
match the selected frequency at a given duty cycle. The
valid output range for the LTC3646 is 2.0V to 30V. For
output voltage below 2.0V, use the LTC3646-1 which has
a valid output range of between 0.6V and 15V.
–1
ƒ
P
0dB
LOG (ƒ)
ƒ
ƒ
C
Z
3646 F04
It is important to note that the LTC3646 will maintain
output voltage regulation if these limits are exceeded,
Figure 4. Bode Plot of Regulator Loop
but the t
limit may be reached resulting in the
ON(MIN)
part switching at a frequency lower than the programmed
switching frequency.
The first step is to choose the crossover frequency f .
C
Higher crossover frequencies will result in a faster loop
transient response; however, in order to avoid higher
order loop dynamics from the switching power stage, it is
Choosing Compensation Components
Loop compensation is a complicated subject and Applica-
tion Note 76 is recommended reading for a full discussion
on maximizing loop bandwidth in a current mode switch-
ing regulator. This section will provide a quick method on
choosingpropercomponentstocompensatetheLTC3646
regulators.
recommended that f not exceed one-tenth the switching
C
frequency (f ).
O
Once f is chosen, the value of R
that sets this cross-
COMP
C
overfrequencycanbecalculatedbythefollowingequation:
2π • fC •COUT
VOUT
RCOMP
=
Figure 3 shows the recommended components to be con-
nected to the ITH pin, and Figure 4 shows an approximate
bode plot of the buck regulator loop using these compo-
nents. It is assumed that the major poles in the system
(the output capacitor pole and the error amplifier output
pole) are located at a frequency lower than the crossover
frequency.
gm(EA) • gm(MOD)
V
FB
where g
is the error amplifier transconductance
m(EA)
(see the Electrical Characteristics section), and g
m(MOD)
is the modulator transconductance (the transfer function
from ITH voltage to current comparator threshold). For
–1
the LTC3646, this transconductance is nominally 1Ω at
room temperature.
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APPLICATIONS INFORMATION
Once R
is determined, C
can be chosen to set
applications. The series R-C filter sets the pole-zero loop
compensation. The values can be modified from their
suggested values once the final PC layout is done, and the
particular switching frequency, output capacitor type and
value have been chosen. The output capacitors need to be
selectedbecausetheirvarioustypesandvaluesdetermine
the loop feedback factor gain and phase. An output cur-
rent pulse of 20% to 100% of full load current with a rise
time of 1μs to 10μs will produce output voltage and ITH
pin waveforms that will give a sense of the overall loop
stability without breaking the feedback loop.
COMP
COMP
the zero frequency (f ):
Z
1
fZ
=
2π •CCOMP •RCOMP
For maximum phase margin, f should be chosen to be
Z
less than one-tenth of f .
C
Since the ITH node is sensitive to noise coupling, a small
bypass capacitor (C ) may be used to filter out board
BYP
noise. However, this cap contributes a pole at f and may
P
introduce some phase loss at the crossover frequency:
When observing the response of V
to a load step, the
OUT
1
initialoutputvoltagestepmaynotbewithinthebandwidth
of the feedback loop. As a result, the standard second
order overshoot/DC ratio cannot be used to estimate
phase margin. The output voltage settling behavior is
related to the stability of the closed-loop system and
fP =
2π •CBYP•RCOMP
For best results, f should be set high enough such that
P
phase margin is not significantly affected.
If necessary, a capacitor C (as shown in Figure 2) may
.
will demonstrate the actual overall supply performance
F
be used to add some phase lead.
For a detailed explanation of optimizing the compensation
components, including a review of control loop theory,
refer to Application Note 76. As shown in Figure 2 a feed-
Though better load transient response can generally be
achieved with external compensation, at switching fre-
quencies above 1MHz, component count can be reduced
forward capacitor, C , may be added across feedback
F
resistor R1 to improve the high frequency response of
by connecting the ITH pin to INTV enabling internal
CC
the system. Capacitor C provides phase lead by creating
F
compensation. When using internal compensation, a
reasonable starting point for the minimum amount of
output capacitance necessary for stability can be found
a high frequency zero with R1.
In some applications severe transients can be caused by
switchinginloadswithlarge(>10μF)inputcapacitors.The
discharged input capacitors are effectively put in parallel
as the greater of 15µF or C
defined by the equation:
OUT
–5
C
OUT
> 3 • 10 /V
OUT
with C , causing a rapid drop in V . No regulator can
OUT
OUT
deliver enough current to prevent this output droop if the
switchconnectingtheloadhaslowresistanceandisdriven
quickly. The solution is to limit the turn-on speed of the
load switch driver. A Hot Swap™ controller is designed
specifically for this purpose and usually incorporates cur-
rentlimit,short-circuitprotectionandsoft-startfunctions.
Checking Transient Response
The regulator loop response can be checked by observing
theresponseofthesystemtoaloadstep.Whenconfigured
for external compensation, the availability of the ITH pin
not only allows optimization of the control loop behavior
butalsoprovidesaDC-coupledandAC-filteredclosed-loop
response test point. The DC step, rise time, and settling
behavior at this test point reflect the system’s closed-
loop response. Assuming a predominantly second order
system, the phase margin and/or damping factor can be
estimated by observing the percentage of overshoot seen
at this pin. Use a high impedance, low capacitance probe
(>50MΩ, <5pF). The ITH external components shown in
Figure 3 will provide an adequate starting point for most
MODE/SYNC Operation
The MODE/SYNC pin is a multipurpose pin allowing both
mode selection and operating frequency synchronization.
ConnectingthispintoINTV enablesBurstModeoperation
CC
for superior efficiency at low load currents at the expense
of slightly higher output voltage ripple. When the MODE/
SYNC pin is pulled to ground, forced continuous mode
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operationisselectedcreatingthelowestfixedoutputripple
at the expense of light load efficiency.
Output Power Good
The PGOOD output of the LTC3646 is driven by a 63Ω
willbecome
The LTC3646 will detect the presence of the external
clock signal on the MODE/SYNC pin and synchronize the
internal oscillator to the phase and frequency of the in-
coming clock. The presence of an external clock will place
the LTC3646 into forced continuous mode operation. For
proper on-time, connect a resistor corresponding to the
SYNC frequency between the RT pin and SGND (see the
Operating Frequency section). The user should be aware
that a clock with fast edges may drive this pin below the
–0.3V rating of this pin and an R-C filter may be needed
to prevent this condition.
(typical)open-drainpull-downdevice.Thispin
high impedance once the output voltage is within 5% (see
thresholds) of the target regulation point allow-
V
PGOOD
ing the voltage at PGOOD to rise via an external pull-up
resistor (100k typical). If the output voltage exits a 7.5%
(see V
thresholds) regulation window around the
PGOOD
targetregulationpointtheopen-drainoutputwillpulldown
with 63Ω output resistance to ground, thus dropping
the PGOOD pin voltage. A filter time of 30μs (typical at
f = 2.25MHz) acts to prevent unwanted PGOOD output
O
changes during V
transient events. This filter time
OUT
varies as a function of programmed switching period. The
output voltage must exit the 7.5% regulation window for
approximately 70 switching cycles before the PGOOD pin
pulls to ground (see Figure 6).
Soft-Start
Soft-start on the LTC3646 is implemented by internally
ramping the reference signal fed to the error amplifier
over approximately a 250µs period. Figure 5 shows the
behavior of the regulator during start-up.
NOMINAL OUTPUT
During the soft-start period, the inductor current is not
allowedtoreverseanddiscontinuousoperationmayoccur
under light load conditions.
PGOOD
VOLTAGE
V
OUT
3646 F06
–7.5% –5% 0% 5% 7.5%
RUN
5V/DIV
Figure 6. PGOOD Pin Behavior
I
L
250mA/DIV
V
OUT
5V/DIV
3646 F05
100µs/DIV
I
= 50mA
LOAD
Figure 5. Start-Up Waveform
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For more information www.linear.com/LTC3646
LTC3646/LTC3646-1
APPLICATIONS INFORMATION
Efficiency Considerations
2. The internal LDO supplies the power to the INTV rail.
CC
The total power loss here is the sum of the switching
losses and quiescent current losses from the control
circuitry.
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
Each time a power MOSFET gate is switched from low
to high to low again, a packet of charge dQ moves
from V to ground. The resulting dQ/dt is a cur-
IN
rent out of INTV that is typically much larger than
CC
% Efficiency = 100% – (L1 + L2 + L3 +…)
the DC control bias current. In continuous mode,
where L1, L2, etc. are the individual loss terms as a per-
centage of input power.
I
= f (Q + Q ), where Q and Q are the gate
GATECHG
O T B T B
charges of the internal top and bottom power MOSFETs
and f is the switching frequency. For estimation
O
Although all dissipative elements in the circuit produce
losses, three main sources account for the majority of the
purposes, (Q + Q ) on the LTC3646 is approximately
T
B
2
5nC. To calculate the total power loss from the LDO
losses in the LTC3646: 1) I R loss, 2) switching losses
load, simply add the gate charge current and quiescent
and quiescent current loss, 3) transition losses and other
system losses.
current and multiply by V :
IN
2
P
= (I
+ I ) • SVIN
LDO
GATECHG Q
1. I R loss is calculated from the DC resistance of the
internal switches, R , and external inductor, R . In
As will be discussed below, in certain cases the overall
efficiency can be improved by supplying the gate and
quiescent current through the EXTV pin.
SW
L
continuous mode, the average output current will flow
through inductor L but is chopped between the internal
topandbottompowerMOSFETs.Thus,theseriesresis-
tance looking into the SW pin is a function of both the
CC
3.Otherhiddenlossessuchastransitionloss,coppertrace
resistances, and internal load currents can account for
additional efficiency degradations in the overall power
system. Transition loss arises from the brief amount of
time the top power MOSFET spends in the saturated
region during switch node transitions. Other losses,
including diode conduction losses during dead time
and inductor core losses, generally account for less
than 2% total additional loss.
top and bottom MOSFET’s R
(DC) as follows:
and the duty cycle
DS(ON)
R
= (R )(DC) +(R )(1 – DC)
DS(ON)TOP DS(ON)BOT
SW
The R
for both the top and bottom MOSFETs can
DS(ON)
be obtained from the curves in the Typical Performance
2
Characteristics section. Thus to obtain I R loss:
2
2
I R Loss = I
• (R + R )
SW L
OUT
Transition loss can become significant at high V or high
IN
switchingfrequencies.TransitionlossfortheLTC3646can
be approximated by the following formula:
2
–10
Loss (Watts) = I
• V • f • 10
IN O
OUT
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For more information www.linear.com/LTC3646
LTC3646/LTC3646-1
APPLICATIONS INFORMATION
Thermal Considerations
TheDFN4mm×3mmpackagejunction-to-ambientthermal
resistance, θ , is approximately 43°C/W. Therefore, the
JA
The LTC3646 requires the exposed package backplane
metal (PGND) to be well soldered to the PC board to pro-
vide good thermal contact. This gives the DFN and MSOP
packages exceptional thermal properties, compared to
other packages of similar size, making it difficult in normal
operation to exceed the maximum junction temperature
of the part. In many applications, the LTC3646 does not
generate much heat due to its high efficiency. However,
in applications in which the LTC3646 is running at a high
ambient temperature, high input voltage, high switching
frequency, and maximum output current, the heat dissi-
pated may cause the part to exceed the maximum allowed
junction temperature. If the junction temperature reaches
approximately 175°C, both power switches will be turned
off until temperature decreases approximately 10°C.
junction temperature of the regulator operating in a 85°C
ambient temperature is approximately:
T = (0.312 + 0.043) • 43 + 85 = 100°C
J
which is below the specified maximum junction tempera-
ture of 125°C.
Highinputvoltage,highfrequencyapplicationsmaycause
the internal LDO to generate significant heat. The INTV
CC
current, which is dominated by the gate charge current,
may be supplied by either the SVIN LDO or through the
EXTV pin. When the voltage on the EXTV pin is less
CC
CC
than4.5V,theV LDOisenabled.Powerdissipationforthe
IN
IC in this case is highest and is equal to SVIN • I
. The
INTVCC
gate charge current is dependent on operating frequency
as discussed in the Efficiency Considerations section. For
Thermal analysis should always be performed by the user
to ensure the LTC3646 does not exceed the maximum
junction temperature.
example, the LTC3646 INTV current is approximately
CC
15mA at 3MHz operation. If V is at the 40V maximum,
IN
the loss in the on-chip LDO is:
The temperature rise is given by:
40V • 0.015A = 0.60W
t
= P θ
D JA
RISE
In these situations it will be advantageous to bias the
where P is the power dissipated by the regulator and
part through the EXTV pin if a suitable voltage source
D
CC
θ
is the thermal resistance from the junction of the
is available. When the voltage applied to EXTV rises
JA
CC
die to the ambient. Consider the example in which an
LTC3646IDE-1 is operating with I = 1.0A, SVIN = 12V,
above 4.5V (maximum 6.0V), the SVIN LDO is turned off
and an internal switch between the EXTV and INTV
OUT
CC
CC
f = 3MHz, V
= 1.8V, and a board temperature of 85°C.
pins is closed. This voltage is unregulated and so in this
OUT
From theTypical PerformanceCharacteristicssection, the
of the top switch is found to be nominally 200mΩ
situation, INTV = EXTV .
CC
CC
R
DS(ON)
Using EXTV allows the control power to be derived from
CC
while that of the bottom switch is nominally 120mΩ
the output if the output voltage is between 4.5V and 6.0V
during normal operation and from the SVIN LDO when the
output is out of regulation (e.g., start-up, short-circuit).
Significant efficiency and thermal gains can be realized by
yielding an equivalent power MOSFET resistance R of:
SW
RDS(ON)TOP •1.8 RDS(ON)BOT •10.2
+
= 132mΩ
12
12
poweringINTV fromtheoutput, sincethepowerneeded
CC
From the previous section, I
+ I is ~15mA when
for the driver and control currents will be supplied from
GATECHG
Q
f = 3MHz. Therefore, the total power dissipation due to
the buck converter instead of the internal linear regulator.
resistive losses and LDO losses is:
For 4.5V to 6V regulator outputs, this means connecting
the EXTV pin directly to V . Tying the EXTV pin to a
2
P = I
• R + SVIN • (I
+ I )
GATECHG Q
D
OUT
SW
CC
OUT
CC
2
5.5V supply reduces the dissipated power in the previous
example from 0.60W to approximately:
P = (1.0) • (0.132) + 12V • 15mA = 312mW
D
and the transition loss is:
5.5V • 0.015A = 82.5mW
2
–10
6
P = 1.0 • 12 • 10 • 3.0 • 10 = 43mW
T
36461fb
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For more information www.linear.com/LTC3646
LTC3646/LTC3646-1
APPLICATIONS INFORMATION
The following list summarizes the three possible connec-
3. The resistive divider, R1 and R2, must be connected
tions for EXTV :
between the (+) plate of C
and a ground line termi-
CC
OUT
nated near SGND. The feedback signal, V , should be
FB
1. EXTV grounded.ThiswillcauseINTV tobepowered
CC
CC
routedawayfromnoisycomponentsandtracessuchas
the SW line, and its trace length should be minimized.
Inaddition,RT andtheloopcompensationcomponents
should be terminated to SGND.
from the internal 5.0V regulator.
2. EXTV connected directly to V . This is the normal
CC
OUT
connection for a 4.5V to 6V regulated output and pro-
vides the highest efficiency.
4. Keep sensitive components away from the SW pin. The
3. EXTV connected to an external supply. If an external
R
resistor, the feedback resistors, the compensation
CC
RT
supply is available in the 4.5V to 6V range, it may be
components, and the INTV bypass capacitor should
CC
used to power EXTV . Ensure that EXTV < V .
all be routed away from the SW trace and the inductor.
CC
CC
IN
5. A ground plane is preferred, but if not available the
signal and power grounds should be segregated with
both connecting to a common, low noise reference
point. The point at which the ground terminals of the
Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3646.
V and V
bypass capacitors are connected makes a
IN
OUT
good, low noise reference point. The connection to the
PGND pin should be made with a minimal resistance
trace from the reference point.
1. Does the capacitor C
connect to PVIN and PGND
PVIN
as close to the pins as possible? These capacitors
provide the AC current to the internal power MOSFETs
and drivers. The (–) plate of C
connected to PGND and the (–) plate of C
should be closely
PVIN
6. Flood all unused areas on all layers with copper in order
to reduce the temperature rise of power components.
Thesecopperareasshouldbeconnectedtotheexposed
backside connection of the IC.
.
OUT
2. The output capacitor, C , and inductor L1 should
OUT
be closely connected to minimize loss. The (–) plate
of C
should be closely connected to PGND and the
OUT
(–) plate of C .
IN
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LTC3646/LTC3646-1
APPLICATIONS INFORMATION
R
SVIN
R2
C
SVIN
R1
C
F
C
VCC
C
R
COMP
COMP
R
RT
C
BOOST
R
PGOOD
SW
GND
C
PVIN
PVIN
C
OUT
VIA TO V
VIA TO INTV
VIA TO GND
OUT
CC
L1
VIA TO PVIN
V
OUT
3646 F07
Figure 7. Example of Power Component Layout for DFN Package.
Because of the Similar Pinout, MSE Package Layout is Similar
PV
IN
BOOST
SW
PVIN
SVIN
RUN
R
SVIN
C
BOOST
LTC3646
L1
INTV
CC
R
V
OUT
PGOOD
C
IN
PGOOD
ITH
10µF
C
OUT
V
ON
RT
SWITCH
CONTROL
C
SVIN
MODE/SYNC
R
COMP
EXTV
CC
C
F
C
VCC
R1
R2
R
+
–
RT
V
FB
0.6V
SGND
C
COMP
PGND
3646 F08
Figure 8. Board Layout Schematic
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For more information www.linear.com/LTC3646
LTC3646/LTC3646-1
APPLICATIONS INFORMATION
Design Example
NextC isselectedbasedontherequiredoutputtransient
OUT
performance and the required ESR to satisfy the output
voltage ripple. Using a 15µF ceramic capacitor with an
ESR of 5mΩ will result in approximately 5mV of ripple.
As a design example, consider using the LTC3646-1 in an
application with the following specifications: V = 12V,
IN
V
OUT
= 1.8V, I
= 1A, I
= 10mA.
OUT(MAX)
OUT(MIN)
Decoupling the PVIN pin with a 22µF capacitor and the
SVIN pin with a 1µF capacitor should be adequate for
most applications. A 0.1µF boost capacitor should also
work for most applications.
Because efficiency is important at both high and low load
currents, Burst Mode operation and 1MHz operation is
chosen.
First the correct R resistor value for 1MHz switching
RT
To save board space the ITH pin is connected to INTV
CC
frequency must be chosen. Based on the equation dis-
to select internal compensation. Since the switching and
cussed previously, the closest standard resistor value
Q current drawn from the 12V supply is not a significant
source of loss or heat, EXTV is disabled by tying the
for R is 90.9k.
RT
CC
Next, determine the inductor value for approximately 35%
ripple current using:
pin to SGND.
1.8V
1MHz • 350mA
1.8V
12V
L =
1−
= 4.37µH
A standard 4.7µH inductor would work well for this ap-
plication.
12V
SVIN
RUN
PVIN
C
PVIN
C
SVIN
22µF
1µF
LTC3646-1
BOOST
SW
C
L
BOOST
OUT
INTV
0.1µF
4.7µH
CC
V
MODE/SYNC
ITH
OUT
R
PG
100k
C
F
R1
1pF
150k
PGOOD
RT
V
ON
C
VCC
C
OUT
V
4.7µF
FB
15µF
R2
75k
R
RT
EXTV
CC
90.9k
SGND
PGND
3646 F09
Figure 9
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LTC3646/LTC3646-1
TYPICAL APPLICATIONS
12V to 1.8V Output with 400kHz External Sync
V
IN
BOOST
0.1µF
L1
PVIN
SVIN
12V
2Ω
LTC3646-1
RUN
10µH
SW
INTV
CC
V
OUT
1.8V
22µF
ITH
RT
V
ON
SWITCH
CONTROL
R
2.2µF
COMP
MODE/SYNC
49.9k
C
400kHz
EXTERNAL
CLOCK
EXTV
CC
F
274k
137k
4.7pF
4.7µF
+
–
100µF
V
226k
FB
0.6V
100k
SGND
PGND
C
COMP
220pF
3646 TA02a
L1: WÜRTH WE-TPC-744-065-100
Efficiency Curve
50mA to 1A Load Step
100
90
80
70
60
50
40
30
20
10
0
I
LOAD
1A/DIV
I
L
1A/DIV
V
OUT
100mV/DIV
AC-COUPLED
3646 TA02c
40µs/DIV
0.001
0.01
0.1
1
LOAD CURRENT (A)
3646 TA02b
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For more information www.linear.com/LTC3646
LTC3646/LTC3646-1
TYPICAL APPLICATIONS
24V Input to 5V Output at 1MHz Frequency and EXTVCC
V
IN
BOOST
SW
PVIN
SVIN
RUN
24V
2Ω
0.1µF
L1
LTC3646
10µH
INTV
CC
V
OUT
100k
5V
22µF
PGOOD
ITH
C
OUT
V
ON
RT
SWITCH
CONTROL
30µF
2.2µF
R
COMP
MODE/SYNC
100k
EXTV
CC
4.7µF
487k
20pF
90.9k
+
–
V
FB
0.6V
SGND
C
COMP
33pF
PGND
66.5k
3646 TA03a
Efficiency Curve
50mA to 1A Load Step
100
90
80
70
60
50
40
30
20
10
0
I
LOAD
1A/DIV
I
L1
1A/DIV
V
OUT
200mV/DIV
AC-COUPLED
3646 TA03c
40µs/DIV
0.001
0.01
0.1
1
LOAD CURRENT (A)
3646 TA03b
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For more information www.linear.com/LTC3646
LTC3646/LTC3646-1
PACKAGE DESCRIPTION
DE Package
14-Lead Plastic DFN (4mm × 3mm)
(Reference LTC DWG # 05-08-1708 Rev B)
0.70 ±0.05
3.30 ±0.05
1.70 ±0.05
3.60 ±0.05
2.20 ±0.05
PACKAGE
OUTLINE
0.25 ±0.05
0.50 BSC
3.00 REF
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
R = 0.115
0.40 ±0.10
4.00 ±0.10
(2 SIDES)
TYP
14
8
R = 0.05
TYP
3.30 ±0.10
3.00 ±0.10
(2 SIDES)
1.70 ±0.10
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
PIN 1
TOP MARK
(SEE NOTE 6)
CHAMFER
(DE14) DFN 0806 REV B
7
1
0.25 ±0.05
0.75 ±0.05
0.200 REF
0.50 BSC
3.00 REF
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WGED-3) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
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For more information www.linear.com/LTC3646
LTC3646/LTC3646-1
PACKAGE DESCRIPTION
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev F)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
1
8
0.35
REF
5.10
(.201)
MIN
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102
(.065 ±.004)
3.20 – 3.45
(.126 – .136)
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
DETAIL “B”
16
9
0.305 ±0.038
0.50
(.0197)
BSC
NO MEASUREMENT PURPOSE
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
(.0120 ±.0015)
TYP
0.280 ±0.076
(.011 ±.003)
RECOMMENDED SOLDER PAD LAYOUT
16151413121110
9
REF
DETAIL “A”
0° – 6° TYP
0.254
(.010)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
1 2 3 4 5 6 7 8
DETAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE16) 0213 REV F
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
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For more information www.linear.com/LTC3646
LTC3646/LTC3646-1
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
07/13 Changed '%' to '%/V’ regarding V Line Regulation in the Electrical Characteristics Table.
3
REF
B
03/14 Clarified Description
Clarified Operating Junction Temperature
Clarified specifications
1
2, 3, 4
3
Clarified graph
5
Clarified formula
11
Clarified description
19
Clarified Application drawings
22, 28
36461fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
27
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC3646/LTC3646-1
TYPICAL APPLICATION
28V Output at 500kHz Operating Frequency
Efficiency
D1: DFLS 1200
100
90
80
70
60
50
40
30
20
10
0
V
IN
40V
BOOST
PVIN
SVIN
RUN
2Ω
0.1µF
LTC3646
L1
47µH
SW
INTV
CC
V
OUT
28V
100k
22µF
PGOOD
ITH
C
OUT
V
ON
RT
SWITCH
33µF
2.2µF
CONTROL
R
COMP
402k
MODE/SYNC
EXTV
CC
4.7µF
487k
Burst Mode OPERATION
FORCED CONTINUOUS
180k
+
–
V
FB
0.6V
SGND
0.001
0.1 1
0.01
C
COMP
220pF
LOAD CURRENT (A)
PGND
10.7k
3646 TA04b
3646 TA04a
L1: WÜRTH WE-TPC-744-066-470
RELATED PARTS
PART
NUMBER DESCRIPTION
COMMENTS
= 4.5V, V
LTC3642 45V Input Capable with 60V Transient Protection, 50mA, Synchronous
Micropower Step-Down DC/DC Converter with I = 12µA
V
= 45V, 60V Transient, V
= 0.8V,
IN(MIN)
IN(MAX)
OUT(MIN)
I = 12µA, I < 1µA, 3mm × 3mm DFN-8, MSOP-8E Packages
Q
Q
SD
LTC3631 45V Input Capable with 60V Transient Protection, 100mA, Synchronous V
= 4.5V, V
= 45V, 60V Transient, V
= 0.8V,
IN(MIN)
IN(MAX)
OUT(MIN)
Micropower Step-Down DC/DC Converter with I = 12µA
I = 12µA, I <1µA, 3mm × 3mm DFN-8, MSOP-8E Packages
Q
Q
SD
LTC3632 50V Input Capable with 60V Transient Protection, 20mA, Synchronous
V
Q
= 4.5V, V
= 45V, 60V Transient, V
= 0.8V,
IN(MIN)
IN(MAX)
OUT(MIN)
Micropower Step-Down DC/DC Converter with I = 12µA
I = 12µA, I <1µA, 3mm × 3mm DFN-8, MSOP-8E Packages
Q
SD
LTC3601 15V, 1.5A (I ), 4MHz, Synchronous Step-Down DC/DC Converter
V
SD
= 4.5V, V
= 15V, V
= 0.6V, I = 300µA,
OUT
IN(MIN)
IN(MAX)
OUT(MIN) Q
I
<1µA, 4mm × 4mm QFN-20, MSOP-16E Packages
LTC3603 15V, 2.5A (I ), 3MHz, Synchronous Step-Down DC/DC Converter
V
SD
= 4.5V, V
= 15V, V
= 0.6V, I = 75µA,
OUT
IN(MIN)
IN(MAX)
OUT(MIN) Q
I
<1µA, 4mm × 4mm QFN-20, MSOP-16E Packages
LT3991
LT3682
LT3689
55V, 1.2A, 2.2MHz High Efficiency Micropower Step-Down DC/DC
Converter with I = 2.8µA
V
SD
= 4.3V, V
= 38V, V
= 1.2V, I = 2.8µA,
IN(MIN)
IN(MAX)
OUT(MIN) Q
I
<1µA, 3mm × 3mm DFN-10, MSOP-10E Packages
Q
36V, 60V
, 1A, 2.2MHz High Efficiency Micropower Step-Down
V
= 3.6V, V
= 36V, V
= 0.8V, I = 75µA,
MAX
IN(MIN)
IN(MAX)
OUT(MIN) Q
DC/DC Converter
I
SD
<1µA, 3mm × 3mm DFN-12 Package
36V, 60V Transient Protection, 800mA, 2.2MHz High Efficiency
Micropower Step-Down DC/DC Converter with POR Reset and
Watchdog Timer
V
= 3.6V, V
= 36V, Transient to 60V, V
= 0.8V,
IN(MIN)
IN(MAX)
OUT(MIN)
I = 75µA, I <1µA, 3mm × 3mm QFN-16 Package
Q
SD
LT3480
LT3980
36V with Transient Protection to 60V, 2A (I ), 2.4MHz, High
V
Q
= 3.6V, V = 36V, Transient to 60V, V
IN(MAX)
= 0.78V,
OUT
IN(MIN)
OUT(MIN)
Efficiency Step-Down DC/DC Converter with Burst Mode Operation
I = 70µA, I <1µA, 3mm × 3mm DFN-10, MSOP-10E Packages
SD
58V with Transient Protection to 80V, 2A (I ), 2.4MHz, High
V
Q
= 3.6V, V
= 58V, Transient to 80V, V
= 0.78V,
OUT
IN(MIN)
IN(MAX)
OUT(MIN)
Efficiency Step-Down DC/DC Converter with Burst Mode Operation
I = 85µA, I <1µA, 3mm × 4mm DFN-16, MSOP-16E Packages
SD
LT8610/ 42V, 2.5A, 96% Efficiency, 2.2MHz Synchronous Micropower
V
= 3.4V to 42V, V
= 0.97V, I = 2.5µA, I <1µA,
OUT(MIN) Q SD
IN
LT8611
Step-Down DC/DC Converter with I = 2.5µA
MSOP-16E Package
Q
36461fb
LT 0314 REV B • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
28
●
●
LINEAR TECHNOLOGY CORPORATION 2012
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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