LTC3704IMS#TR [Linear]
LTC3704 - Wide Input Range, No RSENSE Positive-to-Negative DC/DC Controller; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C;
| 型号： | LTC3704IMS#TR |
| 厂家： | 
Linear |
| 描述： | LTC3704 - Wide Input Range, No RSENSE Positive-to-Negative DC/DC Controller; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C 开关 光电二极管 |
| 文件： | 总28页 (文件大小：314K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3704
TM
SENSE
Wide Input Range, No R
Positive-to-Negative DC/DC Controller
U
FEATURES
DESCRIPTIO
The LTC®3704 is a wide input range, current mode,
positive-to-negative DC/DC controller that drives an
N-channel power MOSFET and requires very few external
components.Intendedforlowtohighpowerapplications,
it eliminates the need for a current sense resistor by
utilizingthepowerMOSFET’son-resistance,therebymaxi-
mizing efficiency.
■
High Efficiency Operation (No Sense
Resistor Required)
■
Wide Input Voltage Range: 2.5V to 36V
Current Mode Control Provides Excellent Transient
Response
■
■
■
■
■
■
High Maximum Duty Cycle (Typ 92%)
±1% Internal Voltage Reference
±2% RUN Pin Threshold with 100mV Hysteresis
Micropower Shutdown: IQ = 10μA
The IC’s operating frequency can be set with an external
resistorovera50kHzto1MHzrange, andcanbesynchro-
nized to an external clock using the MODE/SYNC pin.
Burst Mode operation at light loads, a low minimum
operating supply voltage of 2.5V and a low shutdown
quiescent current of 10μA make the LTC3704 ideally
suited for battery-operated systems.
Programmable Switching Frequency
(50kHz to 1MHz) with One External Resistor
Synchronizable to an External Clock Up to 1.3 × fOSC
User-Controlled Pulse Skip or Burst Mode® Operation
Internal 5.2V Low Dropout Voltage Regulator
Capable of Operating with a Sense Resistor for High
Output Voltage Applications (VDS >36V)
■
■
■
■
For applications requiring constant frequency operation,
the Burst Mode operation feature can be defeated using
the MODE/SYNC pin. Higher than 36V switch voltage
applicationsarepossiblewiththeLTC3704byconnecting
the SENSE pin to a resistor in the source of the power
MOSFET.
■
Small 10-Lead MUSOP Package
APPLICATIO S
■
SLIC Power Supplies
Telecom Power Supplies
■
The LTC3704 is available in the 10-lead MSOP package.
■
Portable Electronic Equipment
, LTC, LT and LTM are registered trademarks of Linear Technology Corporation. Burst
■
Cable and DSL Modems
Mode is a registered trademark of Linear Technology Corporation. No R
is a
SENSE
■
registered trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Protected by U.S. Patents including 5847554, 5731694.
Router Supplies
U
TYPICAL APPLICATIO
V
IN
5V to 15V
•
Conversion Efficiency
R1
1M
L1*
V
OUT
100
90
80
70
60
50
40
30
20
–5.0V
•
3A to 5A
RUN
SENSE
L2*
C
V
IN
= 5V
DC
47μF
I
TH
V
IN
LTC3704
INTV
V
IN
= 15V
R
C
NFB
C
OUT
CC
3k
100μF
M1
FREQ
GATE
GND
(X2)
V
IN
= 10V
MODE/SYNC
D1
C
C1
4.7nF
R
80.6k
1%
T
C
C
VCC
4.7μF
IN
47μF
GND
R
3.65k
1%
R
1.21k
1%
FB2
FB1
3704 TA01
0.001
10
0.01
0.1
1.0
OUTPUT CURRENT (A)
C
, C : TDK C5750X5R1C476M
D1: MBRD835L (ON SEMICONDUCTOR)
L1, L2: BH ELECTRONICS BH510-1009
M1: Si4884 (SILICONIX/VISHAY)
3704 TA01b
IN DC
C
OUT
C
VCC
: TDK C5750X5R0J107M
: TAIYO YUDEN LMK316BJ475ML
Figure 1. High Efficiency Positive to Negative Supply
3704fb
1
LTC3704
W W U W
U W
U
ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Note 1)
VIN Voltage ............................................... –0.3V to 36V
INTVCC Voltage ........................................... –0.3V to 7V
INTVCC Output Current ........................................ 50mA
GATE Voltage........................... –0.3V to VINTVCC + 0.3V
TOP VIEW
RUN
TH
NFB
FREQ
MODE/
SYNC
1
2
3
4
5
10 SENSE
I
9
8
7
6
V
IN
INTV
GATE
GND
CC
ITH Voltage............................................... –0.3V to 2.7V
MS PACKAGE
10-LEAD PLASTIC MSOP
NFB Voltage .............................................. –2.7V to 2.7V
RUN, MODE/SYNC Voltages ....................... –0.3V to 7V
FREQ Voltage............................................–0.3V to 1.5V
SENSE Pin Voltage ................................... –0.3V to 36V
Operating Temperature Range (Note 2) .. –40°C to 85°C
LTC3704E............................................ –40°C to 85°C
LTC3704I........................................... –40°C to 125°C
Junction Temperature (Note 3)............................ 125°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
TJMAX = 125°C, θJA = 120°C/ W
ORDER PART
NUMBER
MS PART MARKING
LTC3704EMS
LTC3704IMS
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
LTYT
LTCFW
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VIN = VINTVCC = 5V, VRUN = 1.5V, RT = 80k, VMODE/SYNC = 0V, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Main Control Loop
V
Minimum Input Voltage
2.5
V
IN(MIN)
I
Input Voltage Supply Current
Continuous Mode
Burst Mode Operation, No Load
Shutdown Mode
(V
= Open, No Switching) (Note 4)
INTVCC
Q
V
V
V
= 5V, V = 0.75V
550
250
10
1000
500
20
μA
μA
μA
MODE/SYNC
ITH
= 0V, V = 0V (Note 5)
MODE/SYNC
ITH
= 0V
RUN
+
–
V
V
Rising RUN Input Threshold Voltage
Falling RUN Input Threshold Voltage
V
V
= Open
1.348
1.248
V
RUN
RUN
INTVCC
INTVCC
= Open
1.223
1.198
1.273
1.298
V
V
●
V
RUN Pin Input Threshold Hysteresis
RUN Input Current
50
100
1
150
100
mV
nA
RUN(HYST)
I
RUN
V
Negative Feedback Voltage
V
V
V
= 0.4V (Note 5)
= 0.4V (Note 5)
= 0.4V (I-Grade) (Notes 2 and 5)
–1.218 –1.230 –1.242
V
V
V
NFB
ITH
ITH
ITH
●
●
–1.212
–1.248
–1.255
–1.205
I
NFB Pin Input Current
Line Regulation
7.5
15
μA
NFB
ΔV
ΔV
2.5V ≤ V ≤ 30V
0.002
0.02
%/V
NFB
IN
IN
ΔV
Load Regulation
V
= 0V, V = 0.5V to 0.90V (Note 5)
●
–1
–0.1
%
NFB
MODE/SYNC
ITH
ΔV
ITH
g
Error Amplifier Transconductance
I
Pin Load = ±5μA (Note 5)
TH
650
0.17
150
40
μmho
V
m
V
V
Burst Mode Operation I Pin Voltage
Falling I Voltage
ITH(BURST)
SENSE(MAX)
SENSE(ON)
SENSE(OFF)
TH
TH
Maximum Current Sense Input Threshold
SENSE Pin Current (GATE High)
SENSE Pin Current (GATE Low)
Duty Cycle < 20%
120
180
75
5
mV
μA
I
I
V
V
= 0V
SENSE
SENSE
= 30V
0.1
μA
3704fb
2
LTC3704
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C.
VIN = VINTVCC = 5V, VRUN = 1.5V, RFREQ = 80k, VMODE/SYNC = 0V, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Oscillator
f
Oscillator Frequency
R
= 80k
250
50
300
350
1000
97
kHz
kHz
%
OSC
FREQ
Oscillator Frequency Range
Maximum Duty Cycle
D
87
92
MAX
f
f
Recommended Maximum Synchronized
Frequency Ratio
f
= 300kHz (Note 6)
OSC
1.25
1.30
SYNC/ OSC
t
t
MODE/SYNC Minimum Input Pulse Width
MODE/SYNC Maximum Input Pulse Width
Low Level MODE/SYNC Input Voltage
High Level MODE/SYNC Input Voltage
MODE/SYNC Input Pull-Down Resistance
Nominal FREQ Pin Voltage
V
V
= 0V to 5V
= 0V to 5V
25
ns
ns
V
SYNC(MIN)
SYNC(MAX)
SYNC
SYNC
0.8/f
OSC
V
V
0.3
IL(MODE)
1.2
5.0
V
IH(MODE)
R
50
kΩ
V
MODE/SYNC
FREQ
V
0.62
Low Dropout Regulator
V
ΔV
INTV Regulator Output Voltage
V
= 7.5V
IN
5.2
8
5.4
25
V
INTVCC
CC
INTV Regulator Line Regulation
7.5V ≤ V ≤ 15V
mV
INTVCC
CC
IN
ΔV
IN1
ΔV
ΔV
INTV Regulator Line Regulation
15V ≤ V ≤ 30V
70
200
mV
INTVCC
CC
IN
IN2
V
V
INTV Load Regulation
V
V
= 7.5V, 0 ≤ I ≤ 20mA
INTVCC
–2
–0.2
280
10
%
mV
μA
LDO(LOAD)
DROPOUT
INTVCC
CC
IN
INTV Regulator Dropout Voltage
= Open, INTV Load = 20mA
CC
CC
INTVCC
I
Bootstrap Mode INTV Supply
RUN = 0V, SENSE = 5V
20
CC
Current in Shutdown
GATE Driver
t
t
GATE Driver Output Rise Time
GATE Driver Output Fall Time
C = 3300pF (Note 7)
17
8
100
100
ns
ns
r
f
L
C = 3300pF (Note 7)
L
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliabilty and lifetime.
Note 4: The dynamic input supply current is higher due to power MOSFET
gate charging (Q • f ). See Applications Information.
G
OSC
Note 5: The LTC3704 is tested in a feedback loop that servos V
to the
NFB
reference voltage with the I pin forced to a voltage between 0V and 1.4V
TH
Note 2: The LTC3704E is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls. The LTC3704I is guaranteed over the full
–40°C to 125°C operating temperature range.
(the no load to full load operating voltage range for the I pin is 0.3V to
1.23V).
Note 6: In a synchronized application, the internal slope compensation
gain is increased by 25%. Synchronizing to a significantly higher ratio will
reduce the effective amount of slope compensation, which could result in
subharmonic oscillation for duty cycles greater than 50%.
TH
Note 3: T is calculated from the ambient temperature T and power
J
A
dissipation P according to the following formula:
D
Note 7: Rise and fall times are measured at 10% and 90% levels.
T = T + (P • 120°C/W)
J
A
D
3704fb
3
LTC3704
TYPICAL PERFOR A CE CHARACTERISTICS
U W
NFB Voltage vs Temp
NFB Voltage Line Regulation
NFB Pin Current vs Temperature
8.0
7.9
7.8
7.7
7.6
7.5
7.4
7.3
7.2
7.1
7.0
–1.231
–1.230
–1.229
–1.25
–1.24
–1.23
–1.22
–1.21
–50
0
25 50 75 100 125 150
–25
0
5
10
15
20
(V)
25
30
35
50 75
TEMPERATURE (°C)
–50 –25
0
25
100 125 150
TEMPERATURE (°C)
V
IN
3704 G03
3704 G02
3704 G01
Shutdown Mode IQ vs VIN
Shutdown Mode IQ vs Temperature
Burst Mode IQ vs VIN
20
15
10
5
30
20
10
600
500
400
300
200
100
0
V
= 5V
IN
0
0
–50 –25
0
25 50 75 100 125 150
30
0
10
20
(V)
40
0
10
20
(V)
30
40
TEMPERATURE (°C)
V
V
IN
IN
3704 G05
3704 G04
3704 G06
Gate Drive Rise and Fall Time
vs CL
Burst Mode IQ vs Temperature
Dynamic IQ vs Frequency
500
400
300
200
100
0
18
16
14
12
10
8
60
50
40
30
20
10
0
C
= 3300pF
L
I
= 550μA + Qg • f
Q(TOT)
RISE TIME
FALL TIME
6
4
2
0
–50
50
100 125
150
–25
0
25
75
0
4000 6000 8000 10000 12000
(pF)
2000
0
200
400
FREQUENCY (kHz)
1000 1200
600
800
TEMPERATURE (°C)
C
L
3704 G07
3704 G09
3704 G08
3704fb
4
LTC3704
U W
TYPICAL PERFOR A CE CHARACTERISTICS
RUN Thresholds vs VIN
RUN Thresholds vs Temperature
RT vs Frequency
1000
100
10
1.5
1.4
1.3
1.40
1.35
1.30
1.25
1.20
1.2
30
0
10
20
(V)
40
200
400
600 700 800
1000
900
100
0
300
500
50 75
TEMPERATURE (°C)
–50 –25
0
25
100 125 150
V
FREQUENCY (kHz)
IN
3704 G12
3704 G10
3704 G11
Maximum Sense Threshold
vs Temperature
SENSE Pin Current vs Temperature
Frequency vs Temperature
325
320
315
310
305
300
295
290
285
280
275
45
40
35
160
155
150
145
GATE HIGH
V
= 0V
SENSE
140
–50 –25
0
25 50 75 100 125 150
125
100
150
–50
50
100 125
–50
50
–25
0
25
75
150
–25
0
25
75
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3704 G14
3704 G13
3704 G15
INTVCC Dropout Voltage
vs Current, Temperature
INTVCC Load Regulation
INTVCC Line Regulation
500
450
400
350
300
250
200
150
100
50
5.4
5.3
5.2
T
= 25°C
A
T
= 25°C
A
150°C
5.2
125°C
75°C
25°C
5.1
5.0
0°C
–50°C
5.1
0
40
0
10 20 30
50 60 70 80
25 30
10
20
0
5
10 15 20
(V)
35 40
0
5
15
INTV LOAD (mA)
V
INTV LOAD (mA)
CC
CC
IN
3704 G16
3704 G17
3704 G18
3704fb
5
LTC3704
U
U
U
PI FU CTIO S
RUN (Pin 1): The RUN pin provides the user with an
accurate means for sensing the input voltage and pro-
gramming the start-up threshold for the converter. The
falling RUN pin threshold is nominally 1.248V and the
comparatorhas100mVofhysteresisfornoiseimmunity.
When the RUN pin is below this input threshold, the IC is
shut down and the VIN supply current is kept to a low
value (typ 10μA). The Absolute Maximum Rating for the
voltage on this pin is 7V.
operating frequency to an external clock. If the MODE/
SYNC pin is connected to ground, Burst Mode operation
isenabled.IftheMODE/SYNCpinisconnectedtoINTVCC,
or if an external logic-level synchronization signal is
applied to this input, Burst Mode operation is disabled
and the IC operates in a continuous mode.
GND (Pin 6): Ground Pin.
GATE (Pin 7): Gate Driver Output.
I
NTVCC (Pin8):TheInternal5.20VRegulatorOutput. The
I
TH (Pin 2): Error Amplifier Compensation Pin. The cur-
gate driver and control circuits are powered from this
voltage. Decouple this pin locally to the IC ground with a
minimum of 4.7μF low ESR tantalum or ceramic
capacitor.
rent comparator input threshold increases with this
control voltage. Nominal voltage range for this pin is 0V
to 1.40V.
NFB (Pin 3): Receives the feedback voltage from the
external resistor divider across the output. Nominal
voltage for this pin in regulation is –1.230V.
VIN (Pin 9): Main Supply Pin. Must be closely decoupled
to ground.
SENSE (Pin 10): The Current Sense Input for the Control
Loop. Connect this pin to the drain of the power MOSFET
for VDS sensing and highest efficiency. Alternatively, the
SENSE pin may be connected to a resistor in the source
of the power MOSFET. Internal leading edge blanking is
provided for both sensing methods.
FREQ (Pin 4): A resistor from the FREQ pin to ground
programs the operating frequency of the chip. The nomi-
nal voltage at the FREQ pin is 0.62V.
MODE/SYNC (Pin 5): This input controls the operating
mode of the converter and allows for synchronizing the
3704fb
6
LTC3704
W
BLOCK DIAGRA
RUN
+
–
1
BIAS AND
START-UP
CONTROL
SLOPE
COMPENSATION
C2
1.248V
100mV
HYSTERESIS
(1.348V RISING)
V
IN
FREQ
4
V-TO-I
OSC
9
0.62V
I
OSC
MODE/SYNC
5
INTV
CC
GATE
7
50k
LOGIC
200k
NFB
S
Q
R
200k
–
3
GND
BUFFER
PWM LATCH
+
SENSE
10
+
0.30V
+
–
C1
EA
–
+
–
g
m
BURST
COMPARATOR
CURRENT
COMPARATOR
1.230V
I
TH
2
V-TO-I
R
LOOP
INTV
8
I
CC
LOOP
5.2V
1.230V
LDO
UV
SLOPE
BIAS
1.230V
–
+
GND
TO
START-UP
CONTROL
V
6
3704 BD
REF
2.00V
V
IN
3704fb
7
LTC3704
U
OPERATIO
Main Control Loop
The nominal operating frequency of the LTC3704 is pro-
grammed using a resistor from the FREQ pin to ground
and can be controlled over a 50kHz to 1000kHz range. In
addition, the internal oscillator can be synchronized to an
external clock applied to the MODE/SYNC pin and can be
locked to a frequency between 100% and 130% of its
nominal value. When the MODE/SYNC pin is left open, it is
pulled low by an internal 50k resistor and Burst Mode
operation is enabled. If this pin is taken above 2V or an
external clock is applied, Burst Mode operation is disabled
and the IC operates in continuous mode. With no load (or
an extremely light load), the controller will skip pulses in
order to maintain regulation and prevent excessive output
ripple.
The LTC3704 is a constant frequency, current mode
controller for DC/DC positive-to-negative converter appli-
cations. The LTC3704 is distinguished from conventional
current mode controllers because the current control loop
can be closed by sensing the voltage drop across the
power MOSFET switch instead of across a discrete sense
resistor, as shown in Figure 2. This sensing technique
improves efficiency, increases power density, and re-
duces the cost of the overall solution.
V
V
IN
SW
V
IN
SENSE
The RUN pin controls whether the IC is enabled or is in a
low current shutdown state. A micropower 1.248V refer-
ence and comparator C2 allow the user to program the
supply voltage at which the IC turns on and off (compara-
tor C2 has 100mV of hysteresis for noise immunity). With
the RUN pin below 1.248V, the chip is off and the input
supply current is typically only 10μA.
GATE
GND
GND
2a. SENSE Pin Connection for
Maximum Efficiency (V < 36V)
SW
V
V
SW
IN
V
IN
The LTC3704 can be used either by sensing the voltage
drop across the power MOSFET or by connecting the
SENSE pin to a conventional shunt resistor in the source
of the power MOSFET, as shown in Figure 2. Sensing the
voltage across the power MOSFET maximizes converter
efficiency and minimizes the component count, but limits
the output voltage to the maximum rating for this pin
(36V). By connecting the SENSE pin to a resistor in the
source of the power MOSFET, the user is able to program
output voltages significantly greater than the 36V maxi-
mum input voltage rating for the IC.
GATE
SENSE
GND
R
SENSE
3704 F02
GND
2b. SENSE Pin Connection for Precise
Control of Peak I /I or for V > 36V
IN OUT
SW
Figure 2. Using the SENSE Pin On the LTC3704
For circuit operation, please refer to the Block Diagram of
the IC and Figure 1. In normal operation, the power
MOSFET is turned on when the oscillator sets the PWM
latch and is turned off when the current comparator C1
resets the latch. The divided-down output voltage is com-
paredtoaninternal1.230Vreferencebytheerroramplifier
EA,whichoutputsanerrorsignalattheITH pin.Thevoltage
on the ITH pin sets the current comparator C1 input
threshold. When the load current increases, a fall in the
NFBvoltagerelativetothereferencevoltagecausestheITH
pin to rise, which causes the current comparator C1 to trip
at a higher peak inductor current value. The average
inductor current will therefore rise until it equals the load
current, thereby maintaining output regulation.
Programming the Operating Mode
For applications where maximizing the efficiency at very
light loads (e.g., <100μA) is a high priority, Burst Mode
operation should be applied (i.e., the MODE/SYNC pin
should be connected to ground). In applications where
fixed frequency operation is more critical than low cur-
rent efficiency, or where the lowest output ripple is
desired, pulse-skip mode operation should be used and
the MODE/SYNC pin should be connected to the INTVCC
pin. This allows discontinuous conduction mode (DCM)
operation down to near the limit defined by the chip’s
3704fb
8
LTC3704
U
OPERATIO
minimum on-time (about 175ns). Below this output
current level, the converter will begin to skip cycles in
ordertomaintainoutputregulation.Figures3and4show
the light load switching waveforms for Burst Mode and
Pulse-Skip Mode operation for the converter in Figure 1.
buffered ITH burst clamp is removed, allowing the ITH pin
to directly control the current comparator from no load to
full load. With no load, the ITH pin is driven below 0.30V,
the power MOSFET is turned off and sleep mode is
invoked. Oscilloscopewaveformsillustratingthismodeof
operation are shown in Figure 4.
Burst Mode Operation
MODE/SYNC = INTVCC
(PULSE-SKIP MODE)
Burst Mode operation is selected by leaving the MODE/
SYNC pin unconnected or by connecting it to ground. In
normal operation, the range on the ITH pin corresponding
to no load to full load is 0.30V to 1.2V. In Burst Mode
operation, if the error amplifier EA drives the ITH voltage
below 0.525V, the buffered ITH input to the current com-
parator C1 will be clamped at 0.525V (which corresponds
to 25% of maximum load current). The inductor current
peak is then held at approximately 30mV divided by the
power MOSFET RDS(ON). If the ITH pin drops below 0.30V,
the Burst Mode comparator B1 will turn off the power
MOSFET and scale back the quiescent current of the IC to
250μA(sleepmode).Inthiscondition,theloadcurrentwill
be supplied by the output capacitor until the ITH voltage
rises above the 50mV hysteresis of the burst comparator.
At light loads, short bursts of switching (where the aver-
age inductor current is 25% of its maximum value) fol-
lowed by long periods of sleep will be observed, thereby
greatlyimprovingconverterefficiency.Oscilloscopewave-
forms illustrating Burst Mode operation are shown in
Figure 3.
VOUT
50mV/DIV
IL
5A/DIV
2μs/DIV
3704 F04
Figure 4. LTC3704 Low Output Current Operation with Burst
Mode Operation Disabled (MODE/SYNC = INTVCC
)
When an external clock signal drives the MODE/SYNC pin
at a rate faster than the chip’s internal oscillator, the
oscillatorwillsynchronizetoit.Inthissynchronizedmode,
Burst Mode operation is disabled. The constant frequency
associated with synchronized operation provides a more
controlled noise spectrum from the converter, at the
expense of overall system efficiency of light loads.
When the oscillator’s internal logic circuitry detects a
synchronizing signal on the MODE/SYNC pin, the internal
oscillator ramp is terminated early and the slope compen-
sation is increased by approximately 30%. As a result, in
applicationsrequiringsynchronization,itisrecommended
that the nominal operating frequency of the IC be pro-
grammedtobeabout75%oftheexternalclockfrequency.
Attempting to synchronize to too high an external fre-
quency (above 1.3fO) can result in inadequate slope com-
pensationandpossiblesubharmonicoscillation(orjitter).
MODE/SYNC = 0V
(Burst Mode OPERATION)
VOUT
50mV/DIV
IL
5A/DIV
10μs/DIV
3704 F03
The external clock signal must exceed 2V for at least 25ns,
and should have a maximum duty cycle of 80%, as shown
in Figure 5. The MOSFET turn on will synchronize to the
rising edge of the external clock signal.
Figure 3. LTC3704 Burst Mode Operation
(MODE/SYNC = 0V) at Low Output Current
Pulse-Skip Mode Operation
With the MODE/SYNC pin tied to a DC voltage above 1.2V,
Burst Mode operation is disabled. The internal, 0.525V
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INTVCC Regulator Bypassing and Operation
2V TO 7V
MODE/
SYNC
An internal, P-channel low dropout voltage regulator pro-
duces the 5.2V supply which powers the gate driver and
logic circuitry within the LTC3704, as shown in Figure 7.
The INTVCC regulator can supply up to 50mA and must be
bypassed to ground immediately adjacent to the IC pins
with a minimum of 4.7μF tantalum or ceramic capacitor.
Good bypassing is necessary to supply the high transient
currents required by the MOSFET gate driver.
t
= 25ns
MIN
0.8T
T
T = 1/f
O
GATE
D = 40%
INPUT
I
SW
V
IN
SUPPLY
2.5V TO
30V
3404 F05
–
+
1.230V
Figure 5. MODE/SYNC Clock Input and Switching
Waveforms for Synchronized Operation
P-CH
5.2V
C
IN
R1
INTV
CC
Programming the Operating Frequency
R2
+
The choice of operating frequency and inductor value is a
tradeoff between efficiency and component size. Low
frequency operation improves efficiency by reducing
MOSFET and diode switching losses. However, lower
frequency operation requires more inductance for a given
amount of load current.
C
VCC
4.7μF
GATE
GND
LOGIC
DRIVER
M1
GND
PLACE AS CLOSE AS
POSSIBLE TO DEVICE PINS
3704 F07
The LTC3704 uses a constant frequency architecture that
can be programmed over a 50kHz to 1000kHz range with
a single external resistor from the FREQ pin to ground, as
shown in Figure 1. The nominal voltage on the FREQ pin is
0.6V, and the current that flows into the FREQ pin is used
to charge and discharge an internal oscillator capacitor. A
graph for selecting the value of RT for a given operating
frequency is shown in Figure 6.
Figure 7. Bypassing the LDO Regulator and Gate Driver Supply
For input voltages that don’t exceed 7V (the absolute
maximum rating for this pin), the internal low dropout
regulator in the LTC3704 is redundant and the INTVCC pin
can be shorted directly to the VIN pin. With the INTVCC pin
shorted to VIN, however, the divider that programs the
regulated INTVCC voltage will draw 10μA of current from
theinputsupply, eveninshutdownmode. Forapplications
that require the lowest shutdown mode input supply
current, do not connect the INTVCC pin to VIN. Regardless
of whether the INTVCC pin is shorted to VIN or not, it is
always necessary to have the driver circuitry bypassed
with a 4.7μF tantalum or low ESR ceramic capacitor to
ground immediately adjacent to the INTVCC and GND
pins.
1000
100
10
In an actual application, most of the IC supply current is
used to drive the gate capacitance of the power MOSFET.
Asaresult,highinputvoltageapplicationsinwhichalarge
100 200
400
600 700 800
1000
900
0
300
500
FREQUENCY (kHz)
3704 F06
Figure 6. Timing Resistor (RT) Value
power MOSFET is being driven at high frequencies can
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cause the LTC3704 to exceed its maximum junction
temperature rating. The junction temperature can be
estimated using the following equations:
U
Output Voltage Programming
The output voltage is set by a resistor divider according to
the following formula:
IQ(TOT) ≈ IQ + f • QG
R2
R1
⎛
⎝
⎞
⎟
⎠
VO = VREF • 1+
+ INFB •R2
⎜
PIC = VIN • (IQ + f • QG)
TJ = TA + PIC • RTH(JA)
where VREF = –1.230V, and INFB is the current which flows
out of the NFB pin (INFB = –7.5μA). In order to properly
dimension R2, including the effect of the NFB pin current,
the following formula can be used:
The total quiescent current IQ(TOT) consists of the static
supply current (IQ) and the current required to charge and
discharge the gate of the power MOSFET. The 10-pin
MSOP package has a thermal resistance of RTH(JA)
=
120°C/W.
VOUT − VREF
R2 =
V
R1
⎛
⎜
⎝
⎞
⎟
⎠
As an example, consider a power supply with VIN = 5V and
VSW(MAX) = 12V. The switching frequency is 500kHz, and
the maximum ambient temperature is 70°C. The power
MOSFET chosen is the IRF7805, which has a maximum
RDS(ON) of 11mΩ (at room temperature) and a maximum
total gate charge of 37nC (the temperature coefficient of
the gate charge is low).
REF
+ INFB
The nominal 7.5μA current which flows out of the NFB pin
has a production tolerance of approximately±2.5μA, so an
output divider current of 500μA (R1 = 2.49k) results in a
0.5% uncertainty in the output voltage. For low power
applications where the output voltage tolerance is less
important, efficiency can be increased by increasing the
value of R1.
IQ(TOT) = 600μA + 37nC • 500kHz = 19.1mA
PIC = 5V • 19.1mA = 95mW
TJ = 70°C + 120°C/W • 95mW = 81.4°C
Programming Turn-On and Turn-Off Thresholds
with the RUN Pin
Thisdemonstrateshowsignificantthegatechargecurrent
can be when compared to the static quiescent current in
the IC.
The LTC3704 contains an independent, micropower volt-
age reference and comparator detection circuit that re-
mains active even when the device is shut down, as shown
in Figure 8. This allows users to accurately program an
input voltage at which the converter will turn on and off.
The falling threshold voltage on the RUN pin is equal to the
internal reference voltage of 1.248V. The comparator has
100mV of hysteresis to increase noise immunity.
Topreventthemaximumjunctiontemperaturefrombeing
exceeded, the input supply current must be checked when
operating in a continuous mode at high VIN. A tradeoff
between the operating frequency and the size of the power
MOSFET may need to be made in order to maintain a
reliable IC junction temperature. Prior to lowering the
operating frequency, however, be sure to check with
power MOSFET manufacturers for their latest-and-great-
est low QG, low RDS(ON) devices. Power MOSFET manu-
facturing technologies are continually improving, with
newer and better performance devices being introduced
almost yearly.
The turn-on and turn-off input voltage thresholds are
programmed using a resistor divider according to the
following formulas:
R2
R1
⎛
⎝
⎞
⎟
⎠
V
= 1.248V • 1+
⎜
IN(OFF)
R2
R1
⎛
⎝
⎞
⎠
V
IN(ON)
= 1.348V • 1+
⎜
⎟
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The resistor R1 is typically chosen to be less than 1M.
Absolute Maximum Rating for this pin! The RUN pin can
be connected to the input voltage through an external 1M
resistor, as shown in Figure 8c, for “always on” operation.
For applications where the RUN pin is only to be used as
a logic input, the user should be aware of the 7V
V
IN
+
R2
R1
RUN
COMPARATOR
RUN
+
BIAS AND
START-UP
CONTROL
6V
INPUT
SUPPLY
–
OPTIONAL
FILTER
CAPACITOR
1.248V
μPOWER
REFERENCE
GND
–
3704 F08a
Figure 8a. Programming the Turn-On and Turn-Off Thresholds Using the RUN Pin
RUN
COMPARATOR
RUN
+
6V
EXTERNAL
LOGIC CONTROL
1.248V
–
3704 F08b
Figure 8b. On/Off Control Using External Logic
V
IN
+
R2
1M
RUN
RUN
COMPARATOR
+
–
6V
INPUT
SUPPLY
1.248V
GND
–
3704 F08c
Figure 8c. External Pull-Up Resistor On
RUN Pin for “Always On” Operation
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U
Applications Circuits
Peak and Average Input and Switch Currents
A simple positive-to-negative application circuit for the
LTC3704 is shown in Figure 1. The basic operation of this
circuit is shown in Figure 9. During the on-time the
inductor currents flow through the switch, and during the
off-timethesecurrentsflowthroughtheoutputdiode. The
use of inductors in series with both the input and output
results in continuous currents in these capacitors, result-
ing in low input and output noise. Discontinuous currents
flow in the switch, the coupling capacitor, and the diode.
The control loop in the LTC3704 is measuring the peak
switch current (either by using the RDS(ON) of the power
MOSFET or by using a sense resistor in the MOSFET
source), so the output current needs to be reflected back
totheswitchinordertodimensionthepowerMOSFETand
inductors properly. Based on the fact that, ideally, the
input power is equal to the output power, the maximum
average input current is:
DMAX
1– DMAX
I
= –IO(MAX) •
IN(MAX)
V
IN
V
OUT
+
where IO(MAX) is a negative number. The peak input
current is:
R
L
+
L1
L2
χ
2
DMAX
1– DMAX
⎛
⎝
⎞
⎟
⎠
+
–
I
= − 1+
•I
O(MAX)
•
⎜
IN(PEAK)
ON
In a positive-to-negative converter, however, the switch
currentisequaltoIIN +IO,sothemaximumaverageswitch
current is:
a) Current Flow During The Switch On-Time
V
IN
V
OUT
+
R
L
+
1
L1
L2
ISW(MAX) = −IO(MAX)
•
1− DMAX
and the peak switch current is:
+
–
OFF
χ
2
1
⎛
⎝
⎞
⎟
⎠
ISW(PEAK) = − 1+
•I
O(MAX)
•
⎜
3704 F09
1– DMAX
b) Current Flow During The Switch Off-Time
The maximum duty cycle, DMAX, should be calculated at
minimum VIN.
Figure 9. Positive-to-Negative Converter Operation
χ
Ripple Current ΔIL and the ‘ ’ Factor
Duty Cycle Considerations
χ
The constant ‘ ’ in the equation above represents the
percentage peak-to-peak total ripple current in the induc-
tor, relative to its maximum value. For example, if 30%
ripple current is chosen, then = 0.30, and the peak
current is 15% greater than the average.
For the positive-to-negative converter shown in Figure 1,
the duty cycle of the main switch in CCM is:
χ
VO
VO – V
D =
IN
For a current mode converter operating in CCM, slope
compensation must be added for duty cycles above 50%
inordertoavoidsubharmonicoscillation.FortheLTC3704,
this ramp compensation is internal. Having an internally
fixed ramp compensation waveform, however, does place
some constraints on the value of the inductor and the
operating frequency. If too large an inductor is used, the
resulting current ramp (ΔIL) will be small relative to the
3704fb
where VO is a negative number. The maximum output
voltage for this converter (in CCM) is:
DMAX
1– DMAX
VO(MAX) = V
•
IN(MIN)
The maximum duty cycle capability of the LTC3704 is
typically 92%.
13
LTC3704
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APPLICATIO S I FOR ATIO
internal ramp compensation (at duty cycles above 50%),
and the converter operation will approach voltage mode
(rampcompensationreducesthegainofthecurrentloop).
If too small an inductor is used, but the converter is still
operating in CCM (near critical conduction mode), the
internalrampcompensationmaybeinadequatetoprevent
subharmonic oscillation. To ensure good current mode
gain and avoid subharmonic oscillation, it is recom-
mended that the ripple current in the inductor fall in the
range of 20% to 40% of the maximum average switch
current. For example, if the maximum average switch
current is 1A, choose a ΔIL between 0.2A and 0.4A, and a
⎛
⎞
χ
2
DMAX
1– DMAX
IL1(PEAK) = − 1+
•IO(MAX) •
⎜
⎟
⎝
⎛
⎠
⎞
χ
2
IL2(PEAK) = − 1+
•IO(MAX)
⎜
⎟
⎝
⎠
where “χ” represents the percentage of ripple current. In
a positive-to-negative converter, however, the switch cur-
rent is the sum of the two inductor currents. Therefore,
⎛
⎞
χ
2
1
ISW(PEAK) = – 1+
•IO(MAX) •
χ
⎜
⎟
value ‘ ’ between 0.2 and 0.4.
1– DMAX
⎝
⎠
Inductor Selection
Since the control loop is looking at the switch current, and
since the internal slope compensation is acting on this
switch current, the ripple current percentage should be
between 20% and 40% of the maximum average current
at VIN(MIN) and IO(MAX). This corresponds to a value of “χ”
intheequationsabovebetween0.20and0.40. Expressing
this ripple current as a function of the output current
results in the following equation for calculating the induc-
tor value:
Selecting inductors for a positive-to-negative converter is
slightlymorecomplicatedthanforasingle-inductortopol-
ogy like a buck or boost. The use of separate, uncoupled
inductors can reduce the size of the solution, at the
expense of input and output ripple. Using a coupled
inductor complicates the design procedure, but can result
in significantly lower input and/or output ripple. It will also
reduce the number of components that the purchasing
department has to keep track of.
V
IN(MIN)
L1= L2 =
•DMAX
Regardless of the design goals, however, the inductor
selection process is an iterative one. The best recommen-
dation is to use the equations as a guideline, and then to
build a solution and measure the circuit’s performance. If
themeasuredperformancedeviatesfromthedesignguide-
lines, substitute a bigger (or smaller) inductor, as appro-
priate, and repeat the measurements. In addition, do your
best to minimize layout parasitics, which can have a
significant effect on circuit performance.
ΔISW • f
where:
ΔISW = –χ •IO(MAX)
1
•
1– DMAX
Byusingacoupledinductorwitha1:1turnsratio,thevalue
of inductance in the equation above can be replaced by 2L
due to mutual inductance. Doing this maintains the same
total ripple current and energy storage in the inductor.
Substituting 2L yields the following equation for 1:1
coupled inductors:
The inductor currents for a positive-to-negative converter
are calculated at full load current and minimum input
voltage. The peak inductor currents can be significantly
higher than the output current, especially with smaller
inductors and lighter loads. The following formulae as-
sume uncoupled inductors and CCM operation.
V
IN(MIN)
L1= L2 =
•DMAX
2• ΔIL • f
For the case of uncoupled inductors, choose minimum
saturation currents based on the peak currents outlined in
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U
theinitialequationsforIL1(PEAK) andIL2(PEAK). Ifacoupled
inductor is used, make sure that the minimum saturation
current for the parallel configuration exceeds the maxi-
mum switch current, or:
Power MOSFET or Sense Resistor Selection
If the maximum voltage on the drain of the power MOSFET
(which is VIN(MAX) + VOUT, plus any transients) is less than
36V then the circuit can take advantage of the LTC3704’s
No RSENSE technology in order to improve efficiency and
eliminate the sense resistor. For higher switch voltages
the SENSE pin should be connected to a resistor in the
source of the power MOSFET, as shown in Figure 2.
Internal leading-edge blanking is provided in the LTC3704
to eliminate the need for filtering components on the
SENSE pin.
⎛
⎞
χ
2
1
ILSAT(MIN) ≥ – 1+
•IO(MAX) •
⎜
⎟
1– DMAX
⎝
⎠
The saturation current rating should be checked at mini-
mum input voltage (which results in the highest average
inductor current) and maximum load current.
In both positive-to-negative and flyback converters the
maximum switch current is equal to the input current plus
the output current. As a result, the peak switch current is:
Operating in Discontinuous Mode
Discontinuous mode operation occurs when the load
current is low enough to allow the inductor current to run
out during the off-time of the switch, as shown in
Figure 10. Once the inductor current is near zero, the
switch and diode capacitances resonate with the induc-
tance to form damped ringing at 1MHz to 10MHz. If the
off-time is long enough, the drain voltage will settle to the
input voltage.
⎛
⎞
χ
2
1
ISW(PEAK) = – 1+
•IO(MAX) •
⎜
⎟
1– DMAX
⎝
⎠
where IO(MAX) is a negative number.
During the switch on-time, the control circuit limits the
maximum voltage drop across the power MOSFET to
150mV (at low duty cycles). The peak switch current is
therefore limited to 150mV/RDS(ON). The relationship be-
tween the maximum load current, the duty cycle and the
RDS(ON) of the power MOSFET is:
Depending on the input voltage and the residual energy in
the inductor, this ringing can cause the drain of the power
MOSFET to go below ground where it is clamped by the
body diode. This ringing is not harmful to the IC and it has
not been shown to contribute significantly to EMI. Any
attempttodampitwithasnubberwilldegradetheefficiency.
VSENSE(MAX)
RDS(ON)
≤
ISW(PEAK)
or
DMAX − 1
V
DS
RDS(ON) ≤ VSENSE(MAX)
•
10V/DIV
⎛
⎞
χ
1+
•IO(MAX) •ρΤ
⎜
⎟
2
⎝
⎠
I
L1
again,whereIO(MAX) isanegativenumber.TheVSENSE(MAX)
term is typically 150mV at low duty cycle, and is reduced
to about 100mV at a duty cycle of 92% due to slope
compensation, as shown in Figure 11. The ρΤ term ac-
countsforthetemperaturecoefficientoftheRDS(ON) ofthe
MOSFET, which is typically 0.4%/°C. Figure 12 illustrates
the variation of RDS(ON) over temperature for a typical
power MOSFET (normalized for simplicity).
1A/DIV
1μs/DIV
V
= 15V
IN
3704 F10
NO LOAD
Figure 10. Discontinuous Mode Waveforms
(MODE/SYNC = INTVCC, Pulse-Skip Mode)
for the Circuit in Figure 1.
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2.0
200
1.5
1.0
0.5
0
150
100
50
0
50
100
–50
150
0
0.2
0.4
0.5
0.8
1.0
0
JUNCTION TEMPERATURE (°C)
DUTY CYCLE
3704 F12
3704 F11
Figure 12. Normalized RDS(ON) vs Temperature
Figure 11. Maximum SENSE Threshold Voltage vs Duty Cycle
Another method of choosing which power MOSFET to use
is to check the maximum output current for a given
RDS(ON), since MOSFET on-resistances are generally
available in discrete values.
Asaresult, someiterativecalculationisnormallyrequired
to determine a reasonably accurate value. Since the
controller is using the MOSFET as both a switching and a
sensing element, care should be taken to ensure that the
converteriscapableofdeliveringtherequiredloadcurrent
over all operating conditions (line voltage and tempera-
ture),andfortheworst-casespecificationsforVSENSE(MAX)
andtheRDS(ON) oftheMOSFETlistedinthemanufacturer’s
data sheet.
1– DMAX
IO(MAX) = –VSENSE(MAX)
•
⎛
⎜
⎞
χ
1+
•RDS(ON) •ρΤ
⎟
2
⎝
⎠
The power dissipated by the MOSFET in a positive-to-
negative converter is:
For the case where a conventional sense resistor is used,
DMAX – 1
2
RSENSE = VSENSE(MAX)
•
⎛
⎞
–IO(MAX)
⎛
⎞
χ
P =
FET
•RDS(ON) •DMAX •ρT
1+
•IO(MAX)
⎜
⎟
⎜
⎟
1– D
⎝
⎠
2
MAX
⎝
⎠
IO(MAX)
+ k •(V – VO)1.85
•
•CRSS • f
SenseresistorsaregenerallylowTCandareavailablewith
different ranges of tolerance depending on price. The
power dissipated in the sense resistor is:
IN
1– DMAX
where IO(MAX) and VO are negative numbers.
= ISW(PEAK)2 •RSENSE •DMAX
The first term in the equation above represents the
I2R losses in the device, and the second term, the switch-
ing losses. The constant, k = 1.7, is an empirical factor
inversely related to the gate drive current and has the
dimension of 1/current.
P
SENSE
Calculating Power MOSFET Switching and Conduction
Losses and Junction Temperatures
Inordertocalculatethejunctiontemperatureofthepower
MOSFET, the power dissipated by the device must be
known. This power dissipation is a function of the duty
cycle, the load current and the junction temperature itself
(duetothepositivetemperaturecoefficientofitsRDS(ON)).
From a known power dissipated in the power MOSFET, its
junction temperature can be obtained using the following
formula:
TJ = TA + PFET • RTH(JA)
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U
The RTH(JA) to be used in this equation normally includes
the RTH(JC) for the device plus the thermal resistance from
the case to the ambient temperature (RTH(CA)). This value
of TJ can then be compared to the original, assumed value
used in the iterative calculation process.
1A/DIV
Output Diode Selection
To maximize efficiency, a fast switching diode with low
forward drop and low reverse leakage is desired. The
output diode in a positive-to-negative converter conducts
current during the switch off-time. The peak reverse
voltage that the diode must withstand is equal to VIN(MAX)
– VO. The average forward current in normal operation is
equal to the output current, and the peak current is equal
to the peak inductor current.
500ns/DIV
3704 F13
Figure 13. Ripple Current in the DC Coupling Capacitor
A low ESR and ESL, X5R- or X7R-type ceramic capacitor
is recommended here.
Selecting the Output Capacitor
⎛
⎞
χ
2
1
ID(PEAK) = – 1+
•IO(MAX)
The output ripple voltage appears as a triangular wave-
form riding on VO, due to the ripple current of L2 (the DC
component of the current in L2 equals the output current).
ThisripplecurrentflowsthroughtheESRandbulkcapaci-
tance of the output capacitor to produce the overall ripple
voltage on this node. Using the off-time to calculate this
ripple current results in the following equation for ΔIL2:
⎜
⎟
1– DMAX
⎝
⎠
The power dissipated by the diode is:
PD = IO(MAX) • VD
and the diode junction temperature is:
TJ = TA + PD • RTH(JA)
1– DMAX VO
The RTH(JA) to be used in this equation normally includes
the RTH(JC) for the device plus the thermal resistance from
the board to the ambient temperature in the enclosure.
ΔIL2 = –
•
f
L2
where VO is a negative number. The output ripple voltage
is therefore:
Remember to keep the diode lead lengths short and to
observe proper switch-node layout (see Board Layout
Checklist) to avoid excessive ringing and increased
dissipation.
1– DMAX VO
ΔVO(P–P)
=
•
f
L2
⎡
⎤
⎥
⎦
1
Selecting the DC Coupling Capacitor
–ESR –
⎢
⎣
8• f •CO
The voltage on the coupling capacitor in a positive-to-
negativeconverterisVIN(MAX) –VO, plusanyadditionalΔV
due to the ripple currents in the inductors. Generally, the
DC coupling capacitor is dimensioned based on the high
RMS ripple which flows in it, as shown in Figure 13.
The ESR can be minimized by using high quality, X5R- or
X7R-dielectric ceramic capacitor in parallel with a larger
value tantalum or aluminum electrolytic bulk capacitor.
Dependingupontheapplication,itmaybethattheceramic
capacitor alone will be sufficient.
The minimum RMS current rating of this capacitor must
exceed:
The RMS ripple current rating of the output capacitor
needs to be greater than:
DMAX
1– DMAX
IRMS(CAP) = –IO(MAX)
•
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makes it advisable to further derate the capacitor or to
choose a capacitor rated at a higher temperature than
required. Several capacitors may also be placed in parallel
to meet size or height requirements in the design.
1 (1– DMAX) VO
IRMS(COUT)
≥
•
•
12
f
L2
It should be noted that these equations assume no cou-
plingbetweentheinductors. Iftheinductorsarewoundon
the same core, the ripple currents at the input and output
can be tuned to very low values, and so the equations
above would be extremely conservative. It is highly rec-
ommended that the user experiment in the lab with the
same magnetics and capacitors which will be used in
production.
Manufacturers such as Nichicon, United Chemicon and
Sanyoshouldbeconsideredforhighperformancethrough-
hole capacitors. The OS-CON semiconductor dielectric
capacitor available from Sanyo has the lowest product of
ESR and size of any aluminum electrolytic, at a somewhat
higher price.
In surface mount applications, multiple capacitors may
have to be placed in parallel in order to meet the ESR or
RMS current handling requirements of the application.
Note that the ripple current ratings from capacitor manu-
facturers are often based on only 2000 hours of life. This
Table 1. Recommended Component Manufacturers
VENDOR
COMPONENTS
Capacitors
TELEPHONE
WEB ADDRESS
avxcorp.com
bhelectronics.com
coilcraft.com
coiltronics.com
diodes.com
AVX
(207) 282-5111
(952) 894-9590
(847) 639-6400
(407) 241-7876
(805) 446-4800
(408) 822-2126
(516) 847-3000
(310) 322-3331
(361) 992-7900
(408) 986-0424
(800) 245-3984
(617) 926-0404
(770) 436-1300
(847) 843-7500
(602) 244-6600
(714) 373-7334
(619) 661-6835
(847) 956-0667
(408) 573-4150
(562) 596-1212
(972) 243-4321
(408) 432-8020
(847) 699-3430
(847) 696-2000
(605) 665-9301
(800) 554-5565
(207) 324-4140
(631) 543-7100
BH Electronics
Coilcraft
Inductors, Transformers
Inductors
Coiltronics
Diodes, Inc
Fairchild
Inductors
Diodes
MOSFETs
fairchildsemi.com
generalsemiconductor.com
irf.com
General Semiconductor
International Rectifier
IRC
Diodes
MOSFETs, Diodes
Sense Resistors
Tantalum Capacitors
Toroid Cores
Diodes
irctt.com
Kemet
kemet.com
Magnetics Inc
Microsemi
Murata-Erie
Nichicon
mag-inc.com
microsemi.com
murata.co.jp
Inductors, Capacitors
Capacitors
nichicon.com
onsemi.com
On Semiconductor
Panasonic
Sanyo
Diodes
Capacitors
panasonic.com
sanyo.co.jp
Capacitors
Sumida
Inductors
sumida.com
Taiyo Yuden
TDK
Capacitors
t-yuden.com
Capacitors, Inductors
Heat Sinks
component.tdk.com
aavidthermalloy.com
tokin.com
Thermalloy
Tokin
Capacitors
Toko
Inductors
tokoam.com
United Chemicon
Vishay/Dale
Vishay/Siliconix
Vishay/Sprague
Zetex
Capacitors
chemi-com.com
vishay.com
Resistors
MOSFETs
vishay.com
Capacitors
vishay.com
Small-Signal Discretes
zetex.com
3704fb
18
LTC3704
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APPLICATIO S I FOR ATIO
U
causes the inductor current to quickly decay to zero.
However, because ΔIL is small, it takes multiple cycles for
the current to ramp back up to IBURST(PEAK). During this
inductor charging interval, the output capacitor must
supply the load current and a significant droop in the
output voltage can occur. Generally, it is a good idea to
choose a value of inductor ΔIL between 20% and 40% of
Aluminum electrolytic and dry tantalum capacitors are
both available in surface mount packages. In the case of
tantalum, it is critical that the capacitors have been surge
tested for use in switching power supplies. An excellent
choice is AVX TPS series of surface mount tantalum. Also,
ceramic capacitors are now available with extremely low
ESR, ESL and high ripple current ratings.
IIN(MAX). The alternative is to either increase the value of
Input Capacitor Selection
the output capacitor or disable Burst Mode operation
using the MODE/SYNC pin.
Theinputvoltagesourceimpedancedeterminesthesizeof
the input capacitor, which is typically in the range of 10μF
to 100μF. A low ESR capacitor is recommended, although
it is not as critical as for the output capacitor.
Burst Mode operation can be defeated by connecting the
MODE/SYNC pin to a high logic-level voltage (either with
a control input or by connecting this pin to INTVCC). In this
mode, the burst clamp is removed, and the chip can
operate at constant frequency from continuous conduc-
tion mode (CCM) at full load, down into deep discontinu-
ous conduction mode (DCM) at light load. Prior to skip-
pingpulsesatverylightload(i.e., <5-10%offullload), the
controller will operate with a minimum switch on-time in
DCM. Pulse skipping prevents a loss of control of the
output at very light loads and reduces output voltage
ripple.
The RMS input capacitor ripple current for a positive-to-
negative converter is:
V
1
IN(MIN)
IRMS(CIN)
=
•
•DMAX
12 L1• f
Please note that the input capacitor can see a very high
surge current when a battery is suddenly connected to the
input of the converter and solid tantalum capacitors can
fail catastrophically under these conditions. Be sure to
specify surge-tested capacitors!
Checking Transient Response
Burst Mode Operation and Considerations
The regulator loop response can be verified by looking at
the load transient response. Switching regulators gener-
ally take several cycles to respond to an instantaneous
step in resistive load current. When the load step occurs,
VOimmediatelyshiftsbyanamountequalto(ΔILOAD)(ESR),
and then CO begins to charge or discharge (depending on
the direction of the load step) as shown in Figure 14. The
The choice of MOSFET RDS(ON) and inductor value also
determines the load current at which the LTC3704 enters
BurstModeoperation.Whenbursting,thecontrollerclamps
the peak inductor current to approximately:
30mV
RDS(ON)
IBURST(PEAK)
=
which represents about 20% of the maximum 150mV
SENSE pin voltage. The corresponding average current
depends upon the amount of ripple current. Lower induc-
torvalues(higherΔIL)willreducetheloadcurrentatwhich
Burst Mode operations begins, since it is the peak current
that is being clamped.
V
(AC)
OUT
100mV/DIV
I
(DC)
1A/DIV
OUT
The output voltage ripple can increase during Burst Mode
operation if ΔIL is substantially less than IBURST. This can
occur if the input voltage is very low or if a very large
inductor is chosen. At high duty cycles, a skipped cycle
250μs/DIV
V
V
= 5V
IN
OUT
3704 F14
= –5V
Figure 14. Load Step Response for the Circuit in Figure 1.
3704fb
19
LTC3704
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APPLICATIO S I FOR ATIO
regulator feedback loop acts on the resulting error amp
output signal to return VO to its steady-state value. During
this recovery time, VO can be monitored for overshoot or
ringing that would indicate a stability problem.
V
IN(MIN)
L1= L2 =
•DMAX
2• ΔIL1 • f
5
=
•0.5 = 5.2μH
2•0.8•300k
A second, more severe transient can occur when connect-
ing loads with large (>1μF) supply bypass capacitors. The
dischargedbypasscapacitorsareeffectivelyputinparallel
with CO, causing a nearly instantaneous drop in VO. No
regulator can deliver enough current to prevent this prob-
lem if the load switch resistance is low and it is driven
quickly. The only solution is to limit the rise time of the
switch drive in order to limit the inrush current di/dt to the
load.
The minimum saturation current for this inductor is:
χ
2
1
⎛
⎞
⎟
⎠
ILSAT(MIN) ≥ – 1+
•I
O(MAX)
•
⎜
⎝
1– DMAX
1
= 1.2•2.0•
= 4.8A
1– 0.5
The inductor chosen is a BH Electronics part # 510-1009,
which has an open circuit parallel inductance of 4.56μH
and a maximum dc current rating of 6.5A.
Design Example: A 5V to 15V Input, –5V at 2A Output
Positive-to-Negative Converter
5. For the power MOSFET,
The design example presented here will be for the circuit
shown in Figure 1. The input voltage range is 5V to 15V,
and the output is -5V. The maximum load current is 2A at
aninputvoltageof5V(3Apeak), and3Aataninputvoltage
of 15V (5A peak).
DMAX – 1
RDS(ON) ≤ VSENSE(MAX)
•
χ
2
⎛
⎜
⎝
⎞
⎟
⎠
1+
•IO(MAX) •ρΤ
1. The maximum duty cycle of the main switch is:
At the maximum duty cycle of 50%, the maximum SENSE
pin voltage is reduced to 130mV due to slope compensa-
tion, as shown in Figure 11. Assuming a maximum
junction temperature of 125°C for the power MOSFET,
ρΤ = 1.5, and
VOUT
VOUT − V
–5
–10
DMAX
=
=
= 50%
IN(MIN)
2. Pulse-Skip operation is chosen, so the MODE/SYNC pin
is connected to the INTVCC pin.
0.5 – 1
–1.2•2.0•1.5
RDS(ON) ≤ 0.130•
= 18.1mΩ
3. The operating frequency is chosen to be 300kHz to
reducethesizeoftheinductors.FromFigure5,theresistor
from the FREQ pin to ground is 80.6k.
TheMOSFETchosenwasSiliconix/Vishay’sSi4884,which
has a maximum RDS(ON) = 16.5mΩ at VGS = 4.5V at 25°C.
The minimum BVDSS = 30V and the maximum gate charge
is QG = 20nC.
4. A total inductor ripple current of 40% of the maximum
is chosen, so the inductor ripple current is:
6. The output diode must withstand a reverse voltage of
VIN(MAX) – VO = 20V and a continuous current of
IO(MAX) =5.0A(peakoutputcurrentatVIN =15V). Thepeak
current in the diode is:
DMAX
1– DMAX
ΔIL1 = −χ •IO(MAX)
•
0.5
ΔIL1 = 0.4 •2.0•
= 0.8A
1– 0.5
χ
2
⎛
⎝
⎞
⎟
⎠
ID(PEAK) = 1+
•I
O(MAX)
= 6A
⎜
For a standard 1:1 coupled inductor, the inductance is
therefore:
The power dissipated in this diode at full load is:
3704fb
20
LTC3704
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APPLICATIO S I FOR ATIO
U
7. The DC coupling capacitor must be capable of handling
an RMS current of:
PD = IO(MAX) • VF
Assuming a maximum junction temperature of 125°C and
a forward voltage of approximately 0.33V at 3A (the
maximum output current at VIN = 15V), this diode will
dissipate 1W at full load. The diode selected was the
MBRD835L from On Semiconductor, packaged in a
D-Pak.
DMAX
1– DMAX
ID(PEAK) = –IO(MAX)
•
= 3A
V
IN
5V to 15V
V
OUT
C1
–5.0V
1nF
2A to 3A
(5A PEAK)
•
•
R1
154k
L1*
M1
L2*
1%
R2
68.1k 1%
1
2
10
9
RUN
SENSE
I
V
IN
TH
LTC3704
INTV
C
C
DC
OUT
8
3
4
5
47μF
100μF
R
C
3k
NFB
CC
X5R
X5R
(X2)
7
6
FREQ
GATE
GND
MODE/SYNC
C
C1
D1
4.7nF
D2
C
R
80.6k
1%
C
IN
T
VCC
47μF
4.7μF
X5R
X5R
GND
Q1
3704 F15
R
1.21k
1%
R
3.65k
1%
FB1
FB2
R
SS1
750Ω
C
C
C
C
: TDK C5750X5R1C476M
D1: ON SEMICONDUCTOR MBRD835L
D2: CDMSH-3
IN
: TDK C5750X7R1C476M
: TDK C5750X5R0J107M
DC
L1, L2: BH ELECTRONICS BH510-1009
R
SS2
100Ω
OUT
VCC
C
SS
10nF
: TAIYO YUDEN LMK316BJ475ML M1: SILICONICS/VISHAY Si4884
Q1: MMBT3904
Figure 15. 5V to 15V Input, –5V Output at 2A-3A(5A Peak)
Positive-to-Negative Converter with Soft-Start and Undervoltage Lockout.
6
100
90
80
70
60
50
40
30
20
V
= 5V
5
4
3
2
1
0
IN
V
= 15V
IN
V
= 10V
IN
FET = Si4884
L = BH510-1009
V
= –5V
O
FREQ = 300kHz
5
10
15
0.001
10
0.01
0.1
1
INPUT VOLTAGE (V)
OUTPUT CURRENT (A)
3704 F17
3704 F16
Figure 17. Maximum Output Current vs Input Voltage
Figure 16. Efficiency vs Output Current
3704fb
21
LTC3704
APPLICATIO S I FOR ATIO
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U
V
(AC)
V
(AC)
OUT
OUT
10mV/DIV
100mV/DIV
I
L2
(DC)
I
(DC)
OUT
1A/DIV
1A/DIV
1μs/DIV
V
OUT
= 5V
250μs/DIV
V
= 5V
IN
IN
3704 F18
3704 F19
I
= –2V
Figure 19. Load Step Response at VIN = 5V
for the Circuit in Figure 15
Figure 18. Output Ripple Voltage and
Inductor Current for the Circuit in Figure 15
V
OUT
1V/DIV
V
(AC)
OUT
100mV/DIV
I
OUT
1A/DIV
I
(DC)
OUT
1A/DIV
1ms/DIV
250μs/DIV
V
= 5V
IN
V
= 15V
IN
3704 F21
3704 F20
Figure 21. Soft-Start for the Circuit in Figure 15
Figure 20. Load Step Response at VIN = 15V
for the Circuit in Figure 15
The capacitor used was a TDK 47μF, 16V X5R-dielectric
ceramic (C5750X5R1C476M), mainly because of its low
ESR (2.4mΩ) and high RMS current capability.
1– 0.5 5.0
300k 3.5μ
ΔVO(P−P)
=
•
⎡
⎤
⎥
⎦
1
–0.0016 –
= 13.7mV
⎢
⎣
8. The peak-to-peak output ripple is:
8•300k •100μ
1– DMAX VO
This ripple voltage calculation also assumes no coupling
between the inductors, making the 13.7mV number very
conservative.
ΔVO(P−P)
=
•
f
L2
⎡
⎤
⎥
⎦
1
–ESR –
⎢
⎣
Figure 15 illustrates the same basic application shown in
Figure 1, with the added features of soft-start and
undervoltage lockout on the input supply. Figures 16
through 21 illustrate the measured performance for this
converter. The peak efficiency is 87% at a load current of
2A and the peak-to-peak output ripple is less than 10mV.
Figures 19 and 20 illustrate the load step response at 5V
and 15V input, and Figure 21, the start-up characteristics
8• f •CO
As a first try, a TDK 100μF, 6.3V X5R-dielectric ceramic
capacitor was chosen (C5750X5R0J107M). This capaci-
tor has a very low 1.6mΩ of ESR. As a result, the peak-to-
peak output ripple voltage is:
with a resistive load.
3704fb
22
LTC3704
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APPLICATIO S I FOR ATIO
U
PC Board Layout Checklist
source of the power MOSFET or the bottom terminal of
the sense resistor, 4) the negative terminal of the input
capacitor and 5) at least one via to the ground plane
immediately adjacent to Pin 6. The ground trace on the
top layer of the PC board should be as wide and short
as possible to minimize series resistance and induc-
tance.
1. In order to minimize switching noise and improve
output load regulation, the GND pin of the LTC3704
should be connected directly to 1) the negative termi-
nal of the INTVCC decoupling capacitor, 2) the negative
terminal of the output decoupling capacitors, 3) the
R3
C3
V
IN
C
C
C2
1
2
3
12
11
10
R4
R
C1
C
C
L1
L2
PIN 1
LTC3704
DC
C
IN
R2
M1
R1
4
5
6
9
8
7
R
T
C
VCC
D1
PSEUDO-KELVIN
SIGNAL GROUND
CONNECTION
C
C
OUT
OUT
TRUE REMOTE
OUTPUT SENSING
V
OUT
VIAS TO GROUND
PLANE
3704 F??
Figure 22. LTC3704 Positive-to-Negative Converter Suggested Layout
V
IN
R3
C3
R4
V
OUT
L1
C
C2
L2
1
2
10
9
C
C1
RUN
SENSE
R
C
C
DC
I
V
IN
TH
C
OUT
+
LTC3704
R1
3
4
5
8
7
6
NFB
INTV
CC
R2
M1
FREQ
GATE
GND
D1
R
T
C
IN
C
VCC
MODE/
SYNC
GND
PSEUDO-KELVIN
GROUND CONNECTION
3704 F23
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 23. LTC3704 Positive-to-Negative Converter Layout Diagram
3704fb
23
LTC3704
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APPLICATIO S I FOR ATIO
2. BewareofgroundloopsinmultiplelayerPCboards. Try
to maintain one central ground node on the board and
use the input capacitor to avoid excess input ripple for
high output current power supplies. If the ground plane
is to be used for high DC currents, choose a path away
from the small-signal components.
6. Place the small-signal components away from high
frequency switching nodes. In the layout shown in
Figure22,allofthesmall-signalcomponentshavebeen
placed on one side of the IC and all of the power
components have been placed on the other. This also
allows the use of a pseudo-Kelvin connection for the
signal ground, where high di/dt gate driver currents
flow out of the IC ground pin in one direction (to the
bottom plate of the INTVCC decoupling capacitor) and
small-signal currents flow in the other direction.
3. Place the CVCC capacitor immediately adjacent to the
INTVCC and GND pins on the IC package. This capacitor
carries high di/dt MOSFET gate drive currents. A low
ESR X5R-dielectric 4.7μF ceramic capacitor works well
here.
7. If a sense resistor is used in the source of the power
MOSFET,minimizethecapacitancebetweentheSENSE
pin trace and any high frequency switching nodes. The
LTC3704 contains an internal leading edge blanking
time of approximately 180ns, which should be ad-
equate for most applications.
4. Thehighdi/dtloopfromthedrainofthepowerMOSFET,
through the coupling capacitor and back through the
diode to ground should be kept as tight as possible to
reduce inductive ringing. Excess inductance can cause
increasedstressonthepowerMOSFETandincreaseHF
noise on the drain node. It is also important to keep the
cathodeofthediodeascloseaspossibletotheMOSFET
source or the bottom of the sense resistor.
8. For optimum load regulation and true remote sensing,
the top of the output resistor divider should connect
independently to the top of the output capacitor (Kelvin
connection), staying away from any high dV/dt traces.
Place the divider resistors near the LTC3704 in order to
keep the high impedance FB node short.
5. Check the stress on the power MOSFET by measuring
its drain-to-source voltage directly across the device
terminals(referencethegroundofasinglescopeprobe
directly to the source pad on the PC board). Beware of
inductiveringingwhichcanexceedthemaximumspeci-
fied voltage rating of the MOSFET. If this ringing cannot
be avoided and exceeds the maximum rating of the
device, either choose a higher voltage device or specify
an avalanche-rated power MOSFET. Not all MOSFETs
are created equal (some are more equal than others).
9. For applications with multiple switching power con-
verters connected to the same input supply, make sure
that the input filter capacitor for the LTC3704 is not
shared with other converters. AC input current from
anotherconvertercouldcausesubstantialinputvoltage
ripple, and this could interfere with the operation of the
LTC3704. A few inches of PC trace or wire (L ≈ 100nH)
between the CIN of the LTC3704 and the actual source
VIN should be sufficient to prevent current sharing
problems.
3704fb
24
LTC3704
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APPLICATIO S I FOR ATIO
U
V
IN
3V to 5V
V
OUT
–8.0V
•
•
1.2A to 2.5A
L1*
L2*
1
2
10
9
RUN
SENSE
I
V
IN
TH
LTC3704
INTV
C
DC
C
8
OUT
3
4
5
22μF
M1
R
100μF
C
NFB
CC
X5R
14.7k
7
6
X5R
FREQ
GATE
GND
MODE/SYNC
C
D1
C1
4.7nF
R
80.6k
1%
C
T
C
VCC
IN
47μF
4.7μF
X5R
X5R
GND
R
2.49k
1%
R
13.7k
1%
FB1
FB2
3704 F24
D1: DIODES INC B320B
L1, L2: BH ELECTRONICS BH 510-1009
M1: SILICONIX Si9426
Figure 24. 3V to 5V Input, –8V at 1.2A Output Converter
3
2
1
100
95
90
85
80
75
70
65
60
55
50
V
= 5V
IN
V
= 3V
IN
0
3.0
4.0
4.5
5.0
3.5
0.001
10
0.01
0.1
1
INPUT VOLTAGE (V)
OUTPUT CURRENT (A)
3704 F25
3704 F26
Figure 26. Output Efficiency at 3V and 5V Input
Figure 25. Maximum Output Current vs Input Voltage
V
(AC)
V
(AC)
OUT
100mV/DIV
OUT
100mV/DIV
(DC)
(DC)
I
I
OUT
0.5A/DIV
OUT
0.5A/DIV
250μs/DIV
V
IN
= 3V
250μs/DIV
V
= 3V
IN
3704 F27
3704 F27
Figure 27. Load Step Response at 3V Input
Figure 28.Load Step Response at 5V Input
3704fb
25
LTC3704
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APPLICATIO S I FOR ATIO
GND
•
4
C3
D2
+
+
+
10μF
25V
X5R
10BQ060
UV + = 5.4V
UV – = 5.0V
V
IN
R1
49.9k
1%
R2
150k
1%
7V TO 12V
V
OUT1
–24V
200mA
C
IN
C
•
5
R
+
C4
D3
10BQ060
+
220μF
16V
C
OUT
1nF
10μF
25V
X5R
T1*
1, 2, 3
3.3μF
TPS
100V
C
•
C2
100pF
RUN
SENSE
I
TH
V
IN
•
6
D4
10BQ060
C5
LTC3704
10μF
25V
X5R
R
C
82k
NFB
INTV
CC
FREQ
GATE
GND
IRL2910
V
OUT2
C1
C
C1
–72V
+
MODE/SYNC
f = 200kHz
4.7μF
10V
X5R
1nF
200mA
R
T
R
S
120k
C2
0.012Ω
4.7μF
50V
X5R
R
R
FB2
FB1
2.49k
1%
45.3k
1%
* VP5-0155 (PRIMARY = 3 WINDINGS IN PARALLEL)
3704 F29
Figure 29. High Power SLIC Supply
3704fb
26
LTC3704
U
PACKAGE DESCRIPTIO
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)
0.889 ± 0.127
(.035 ± .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.497 ± 0.076
(.0196 ± .003)
REF
0.50
0.305 ± 0.038
(.0120 ± .0015)
TYP
(.0197)
10 9
8
7 6
BSC
RECOMMENDED SOLDER PAD LAYOUT
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0.254
(.010)
0° – 6° TYP
GAUGE PLANE
1
2
3
4 5
0.53 ± 0.152
(.021 ± .006)
0.86
(.034)
REF
1.10
(.043)
MAX
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.127 ± 0.076
(.005 ± .003)
MSOP (MS) 0603
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
3704fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
27
LTC3704
U
TYPICAL APPLICATIO
High Efficiency Positive-to-Negative Converter
C9
1nF
OPTIONAL
R4
154k
1%
V
IN
5V TO 15V
R5
68.1k
1%
L1*
C
DC
22μF
25V
RUN
SENSE
X7R
I
V
IN
TH
C
47μF
16V
V
–5V
5A
IN
OUT
R
9.1k
C
LTC3704
INTV
L2*
D1
C
OUT1
NFB
CC
GATE
100μF
C
C2
330pF
6.3V
M1
FREQ
C
OUT2
C
VCC
4.7μF
R
80.6k
1%
T
C
10nF
150μF
C1
+
MODE/SYNC GND
6.3V
GND
3704 TA02
R1
1.21k
1%
R2
3.65k
1%
C
: TDK C5570X5R1C476M
: TDK C5750X5R0J107M
: PANASONIC EEFUE0J151R
D1: FAIRCHILD MBR2035CT
IN
C
L1, L2: COILTRONICS VP5-0053 (*COUPLED INDUCTORS, WITH 3
WINDINGS IN PARALLEL ON PRIMARY AND SECONDARY)
M1: INTERNATIONAL RECTIFIER IRF7822
OUT1
C
C
C
OUT2
: TDK C5750X7R1E226M
DC
: TDK C2012X5R0J475K
VCC
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT®1175
Negative Linear Low Dropout Regulator
User-Selectable Current Limit from 200mA to 800mA,
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Current Mode PWM Controller
Current Mode DC/DC Controller
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SO-8; 200kHz Operating Frequency; Buck, Boost, SEPIC Design;
V
IN
Up to 36V
LTC1700
LTC1871
No R
No R
Synchronous Step-Up Controller
Up to 95% Efficiency, Operation as Low as 0.9V Input
SENSE
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Programmable f
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OSC
LTC1872
LT1930
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SOT-23 Boost Controller
Delivers Up to 5A, 550kHz Fixed Frequency, Current Mode
1.2MHz, SOT-23 Boost Converter
Inverting 1.2MHz, SOT-23 Converter
ThinSOTTM Linear Low Dropout Regulator
Up to 34V Output, 2.6V ≤ V ≤ 16V, Miniature Design
IN
Positive-to-Negative DC/DC Conversion, Miniature Design
200mA Output Current, Low Noise, 340mV Drop Out at 200mA,
5-Lead ThinSOT
LTC3401/LTC3402
1A/2A 3MHz Synchronous Boost Converters
Up to 97% Efficiency, Very Small Solution, 0.5V ≤ V ≤ 5V
IN
ThinSOT is a trademark of Linear Technology Corporation.
3704fb
LT 0307 REV B • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
28
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2006
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