LTC3705EGN#TRPBF [Linear]
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| 型号： | LTC3705EGN#TRPBF |
| 厂家： | 
Linear |
| 描述： | 暂无描述 驱动器 栅极 开关 栅极驱动 控制器 |
| 文件： | 总20页 (文件大小：285K) |
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LTC3705
2-Switch Forward
Controller and Gate Driver
U
FEATURES
DESCRIPTIO
The LTC®3705 is a controller for a 2-switch forward
converter and includes on-chip bottom and top gate
drivers that do not require external transformers.
■
High-Speed Top and Bottom Gate Drivers for
2-Switch Forward Converter
On-Chip Rectifier and Self-Starting Architecture
■
Eliminate Need for Separate Gate Drive Bias
Supply
For secondary-side control, combine the LTC3705 with
the LTC3706 PolyPhase® secondary-side synchronous
forward controller to create a complete forward converter
using a minimum of discrete parts. A proprietary scheme
is used to multiplex gate drive signals across the isolation
barrier through a tiny pulse transformer. The on-chip
rectifierandthesamepulsetransformerprovidegatedrive
bias power.
■
Wide Input Voltage Supply Range: 18V to 80V
■
Tolerant of 100V Input Voltage Transients
■
Linear Regulator Controller for Fast Start-Up
■
Precision UVLO with Adjustable Hysteresis
■
Overcurrent Protection
■
Volt-Second Limit Prevents Transformer Core
Saturation
■
■
Alternatively, the LTC3705 can be used as a standalone
voltagemodecontrollerinaprimary-sidecontrolarchitec-
ture with optoisolator feedback. Voltage feedforward pro-
vides excellent line regulation and transient response.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
PolyPhase is a registered trademark of Linear Technology Corporation. All other
trademarks are the property of their respective owners. Patent Pending
Voltage Feedforward for Fast Transient Response
Available in 16-Lead Narrow SSOP Package
U
APPLICATIO S
■
Isolated 48V Telecommunication Systems
■
Internet Servers and Routers
■
Distributed Power Step-Down Converters
■
Automotive and Heavy Equipment
U
TYPICAL APPLICATIO
36V –72V to 3.3V/20A Isolated 2-Switch Forward Converter
+
+
V
IN
V
OUT
L1
1.2µH
MURS120
T1
1.2Ω
•
•
Si7852DP
Si7852DP
330µF
6.3V
×3
1µF
100V
x3
Si7336ADP
×2
Si7336ADP
MURS120
CMPSH1-4
2mΩ
2W
30mΩ
1W
10µF
–
–
V
V
IN
OUT
CZT3019
100k
BAS21
2.2µF
102k
FQT7N10
L1: COILCRAFT SER2010-122
T1: PULSE PA0807
0.22µF
T2: PULSE PA0297
FG
SW SG
V
NDRV
V
CC
IN
–
+
I
I
S
FS/SYNC
365k
1µF
NDRV
UVLO
BOOST TG TS BG IS
S
T2
+
+
FB
FB/IN
PT
•
•
LTC3706
ITH
680pF
LTC3705
V
CC
–
–
2.2µF
33nF
FS/IN
PT
SS/FLT
GND PGND PHASE SLP MODE REGSD
RUN/SS
GND PGND VSLMT
20k
22.6k
15k
162k
33nF
3705 TA01
3705fb
1
LTC3705
W W
U W
U
W
U
ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Note 1)
TOP VIEW
ORDER PART
Power Supply (VCC) ...................................–0.3V to 15V
External NMOS Drive (NDRV) ....................–0.3V to 20V
NDRV to VCC ........................................................... –0.3V to 5V
Bootstrap Supply (BOOST) ......................–0.3V to 115V
Top Source (TS) ..........................................-5V to 100V
BOOST to TS .............................................–0.3V to 15V
Soft-Start Fault, Feedback,
NUMBER
GND
1
2
3
4
5
6
7
8
16 TS
15 TG
I
S
LTC3705EGN
LTC3705IGN
V
14
13
12
11
10
9
BOOST
NC
SLMT
UVLO
SSFLT
NDRV
NC
V
CC
GN PART
MARKING
+
FB/IN
BG
Frequency Set, Transformer
–
FS/IN
PGND
Inputs (SSFLT, FB/IN+, FS/IN–) ..................–0.3V to 15V
All Other Pins (VSLMT, IS, UVLO) .................–0.3V to 5V
Peak Output Current <1µs (TG, BG)........................... 2A
Operating Ambient Temperature Range.. –40°C to 85°C
Operating Junction Temperature (Note 2) ............ 125°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
3705
GN PACKAGE
16-LEAD NARROW PLASTIC SSOP
3705I
TJMAX = 125°C, θJA = 110°C/W
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
otherwise noted.
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T = 25°C. V = V
= 12V, GND = PGND = V = 0V, T = 25°C, unless
TS A
A
CC
BOOST
SYMBOL PARAMETER
CONDITIONS
MIN
7
TYP
MAX
15
UNITS
V
V
V
Supply, Linear Regulator and Trickle Charger Shunt Regulator
CC
Operating Voltage Range
Output Voltage
12
8
V
V
CCOP
CCLR
NDRV
r(VCC)
NDRVTO
CC
Linear Regulator in Operation
I
t
I
I
Current into NDRV Pin
Linear Regulator in Operation
0.1
1
mA
µs
Rise Time of V
Linear Regulator Charging (0.5V to 7.5V)
45
0.27
1.4
CC
Linear Regulator Time Out Current Threshold Primary-Side Operation
mA
mA
Supply Current
V
= 1.5V, Linear Regulator in
2.1
2.5
15
UVLO
Operation (Note 3)
I
Maximum Supply Current
V
V
= 1.5V, Trickle Charger in Operation,
UVLO
1.7
mA
CCM
= 13.2V (Note 3)
CC
V
Maximum Supply Voltage
Trickle Charger Shunt Regulator
14.25
V
CCSR
I
Minimum Current into NDRV/V
Trickle Charger Shunt Regulator, V = 15V
(Note 3)
10
mA
CCSR
CC
CC
Internal Undervoltage
Internal Undervoltage Threshold
V
V
V
Rising
Falling
5.3
4.7
V
V
CCUV
CC
CC
Gate Drive Undervoltage
Gate Drive Undervoltage Threshold
V
V
V
V
Rising (Linear Regulator)
Rising (Trickle Charger)
Falling
●
●
●
7.2
13.1
6.8
7.4
13.4
7.0
7.7
14
7.2
V
V
V
GDUV
CC
CC
CC
Undervoltage Lockout (UVLO)
V
V
Undervoltage Lockout Threshold Rising
Undervoltage Lockout Threshold Falling
Rising
Falling
●
●
1.220
1.205
1.242
1.226
1.280
1.265
V
UVLOR
UVLOF
V
3705fb
2
LTC3705
ELECTRICAL CHARACTERISTICS
otherwise noted.
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T = 25°C. V = V
= 12V, GND = PGND = V = 0V, T = 25°C, unless
TS A
A
CC
BOOST
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
5.6
UNITS
µA
I
Hysteresis Current
V
= 1V
UVLO
●
4.2
4.9
HUVLO
V
Voltage Feedforward Operating Range
Primary-Side Control
V
3.75
V
UVLOOP
UVLOF(MIN)
Gate Drivers (TG and BG)
R
Output Pull-Down Resistance
High Output Voltage
Peak Pull-Up Current
Output Rise Time
I
I
= 100mA
1.9
11
Ω
V
OS
OH
OUT
OUT
V
= –100mA
I
t
t
1.7
40
A
PU
10% to 90%, C
10% to 90%, C
= 4.7nF
= 4.7nF
ns
ns
r
f
OUT
Output Fall Time
70
OUT
Rectifier
I
Maximum Rectifier DC Output Current
Oscillator Frequency
25
mA
RECT
Oscillator
f
Primary-Side Control, R
Primary-Side Control, R
Primary-Side Control, R
= 100kΩ
= 25kΩ
= 300kΩ
200
700
70
kHz
kHz
kHz
OSC(P)
FS(P)
FS(P)
FS(P)
∆f
Oscillator Resistor Set Accuracy
Oscillator Frequency
Primary-Side Control
RFS(P)
25k < R
< 300k
±15
%
FSET
f
Secondary-Side Control (During Start-Up),
= 100kΩ
300
kHz
OSC(S)
R
FS(S)
Soft-Start/Fault (SSFLT)
I
Soft-Start Charge Current
Primary-Side Control, V
Secondary-Side Control, V
= 2V
–5.2
–4
µA
µA
SS(C)
SSFLT
= 1.3V,
UVLO
V
= 2V
SSFLT
Secondary-Side Control, V
= 3.75V,
–1.6
µA
UVLO
V
= 2V
SSFLT
V
V
Linear Regulator Time Out-Threshold
Fault Output High
3.9
6.7
1
V
V
LRTO
FLTH
V
= 8V
CC
I
Soft-Start Discharge Current
Timing Out After Fault, V
= 2V
SSFLT
µA
SS(D)
Current Sense Input (I )
S
V
Overcurrent Threshold
300
mV
IS(MAX)
Volt Second Limit (V
)
SLMT
V
Volt-Second Limit Threshold
Maximum Volt-Second Limit Resistor Current
1.26
0.25
V
VSL(MAX)
I
mA
VSLMT(MAX)
Optoisolator Bias Current
V
Open Circuit Optoisolator Voltage
Optoisolator Bias Current
Primary-Side Control I = 0V
3.3
V
OPTO
OPTO
FB
I
Primary-Side Control V = 2.5V
0.5
1.6
mA
mA
FB
Primary-Side Control V = 0V
FB
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 3: I is the sum of current into NDRV and V
Note 4: The LTC3705EGN is guaranteed to meet performance
specifications from 0°C to 85°C. Specifications over the –40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC3705IGN is
guaranteed and tested over the – 40°C to 85°C operating temperature
range.
.
CC
CC
Note 2: Operating junction temperature T (in °C) is calculated from the
J
ambient temperature T and the average power dissipation PD (in watts)
A
by the formula: T = T + θ • PD. Refer to the Applications Information
J
A
JA
section for details.
3705fb
3
LTC3705
U W
(T = 25°C unless otherwise specified)
A
TYPICAL PERFOR A CE CHARACTERISTICS
Boost Current vs Boost – TS
UVLO Voltage Threshold vs
Supply Current vs V
Voltage
Temperature
CC
2.0
1.5
1.0
0.5
0
400
350
300
250
200
150
100
50
1.245
TRICKLE CHARGER
V
= 80V
TS
V
1.240
1.235
1.230
1.225
1.220
UVLOR
LINEAR REGULATOR
V
= 0V
TS
V
UVLOF
0
5
5
–40 –20
0
20
0
15
0
15
–60
100
10
10
– V (V)
40 60 80
V
(V)
V
TEMPERATURE (°C)
CC
BOOST
TS
3705 G01
3705 G02
3705 G09
UVLO Hysteresis Current vs
Temperature
Oscillator Frequency
OSC
Oscillator Frequency vs
Temperature
f
vs R
FSET
5.05
5.00
4.95
4.90
4.85
4.80
800
700
600
500
400
300
200
100
0
203
202
201
200
199
198
197
PRIMARY-SIDE CONTROL
R
= 100kΩ
FS(P)
SECONDARY-SIDE CONTROL
PRIMARY-SIDE CONTROL
100 200
(kΩ)
–40 –20
0
20
–60
100
0
300
400
40 60 80
–40 –20
0
20
–60
100
40 60 80
TEMPERATURE (°C)
R
TEMPERATURE (°C)
FSET
3705 G10
3705 G03
3705 G11
Shunt Regulator Current I
Shunt Regulator Current vs
Temperature
CC
vs V
V
GDUV
vs Temperature
CC
14
13
12
11
10
9
25
24
23
22
21
20
19
18
17
16
15
18
15
12
9
V
RISING (TRICKLE CHARGER)
CC
6
8
V
RISING (LINEAR REGULATOR)
CC
3
7
V
FALLING (BOTH)
CC
6
0
–40 –20
0
20
–60
100
40 60 80
–40 –20
0
20
–60
100
40 60 80
14.00
14.25
14.50
(V)
14.75
15.00
TEMPERATURE (°C)
TEMPERATURE (°C)
V
CC
3705 G13
3705 G12
3705 G04
3705fb
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LTC3705
U W
TYPICAL PERFOR A CE CHARACTERISTICS
(T = 25°C unless otherwise specified)
A
Optoisolator Bias V
FB/IN
+ vs
Gate Drive Pull-Down Resistance
vs Temperature
Gate Drive Peak Pull-Up Current
vs Temperature
FB/IN
I
+
2.50
2.25
2.00
1.75
1.50
2.0
1.9
1.8
1.7
1.6
1.5
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
–40 –20
0
20
–40 –20
0
20
–60
100
–60
100
40 60 80
40 60 80
0
0.5
1.0
+ (mA)
1.5
2.0
TEMPERATURE (°C)
TEMPERATURE (°C)
–I
FB/IN
3705 G14
3705 G15
3705 G05
Linear Regulator Start-Up
Gate Drive Encoding
Fault Operation
V
IN
BG
TG
10V/DIV
2V/DIV
FB/IN
SSFLT
5V/DIV
10V/DIV
NDRV
–
FS/IN
V
CC
3705 G06
3705 G07
3705 G08
25µs/DIV
1µs/DIV
40ms/DIV
3705fb
5
LTC3705
U
U
U
PI FU CTIO S
GND (Pin 1): Signal Ground.
duty cycle information for control of the primary-side gate
drives (see Operation below). In secondary-side control,
primary-side gate drive bias power is also extracted from
the FB/IN+ and FS/IN– pins using an on-chip full-wave
rectifier.
IS (Pin 2): Input to the Overcurrent Comparator. Connect
to the positive terminal of a current-sense resistor in
series with the source of the ground-referenced bottom
MOSFET.
Forprimary-sidecontrolconnectthispintoanoptoisolator
for feedback control of converter output voltage using an
internal optoisolator biasing network.
FS/IN– (Pin 8): This pin has several functions. Place a
resistor from this pin to GND to set the oscillator fre-
quency. For secondary-side control with the LTC3706,
connect one winding of the pulse transformer for opera-
tion as described for the FB/IN+ pin above.
VSLMT (Pin 3): Volt-Second Limit. Form an R-C integrator
by connecting a resistor from VIN to VSLMT and a capacitor
fromVSLMT toground. Thegatedrivesareturnedoffwhen
the voltage on the VSLMT pin exceeds 1.25V.
UVLO (Pin 4): Undervoltage Lockout. Connect to a resis-
tive voltage divider to monitor input voltage VIN. Enables
converter operation for VUVLO > 1.242V. Hysteresis is a
fixed 16mV hysteresis voltage with a 4.9µA hysteresis
current that combines with the Thevenin resistance of the
divider to set the total UVLO hysteresis voltage. This input
also senses VIN for voltage feedforward. Finally, this pin
can be used for external run/stop control.
PGND (Pin 9): Supply Return for the Bottom Gate Driver
and the On-Chip Bridge Rectifier.
BG(Pin10):BottomGateDriver.Connecttothegateofthe
“low side” external MOSFET.
SSFLT (Pin 5): Combination Soft-Start and Fault Indica-
tor. A capacitor to GND sets the duty cycle ramp-up rate
during start-up. To indicate a fault, the SSFLT pin is
momentarily pulled up to within 1.3V of VCC.
VCC (Pin 11): Main VCC Power for All Driver and Control
Circuitry.
NC (Pins 12, 13): Voltage Isolation Pins. No connection.
Provided to allow adequate clearance between high-volt-
age pins (BOOST, TG, and TS) and the remainder of the
pins.
NDRV (Pin 6): Drive for the External NMOS of the Linear
Regulator. Connect to the gate of the NMOS and connect
a pull up resistor to the input voltage VIN. Optionally, to
createatricklechargeromittheNMOSdeviceandconnect
NDRV to VCC.
FB/IN+ (Pin 7): This pin has several functions. The two
terminals of one pulse transformer winding are connected
totheFB/IN+ andFS/IN– pins. Theotherpulsetransformer
winding is connected to the LTC3706. The LTC3705
automatically detects when the LTC3706 applies a pulse-
encoded signal to the FB/IN+ and FS/IN– pins and decodes
BOOST (Pin 14): Top Gate Driver Supply. Connect to VCC
with a diode to supply power to the “high side” external
MOSFET and bypass with a capacitor to TS.
TG (Pin 15): Top Gate Driver. Connect to the gate of the
“high side” external MOSFET.
TS (Pin 16): Supply Return for the Top Gate Driver.
Connect to the source of the “high side” external MOSFET.
3705fb
6
LTC3705
W
BLOCK DIAGRA
+
8V
NDRV
6
SHUNT REGULATOR
V
CC
–
0.6V
7.4V/7V
LINEAR
REGULATOR
5V
+
–
+
–
–
+
UVGD
REGULATOR
13.4V/7V
TRICKLE
TRICKLE
CHARGE
14.25V
I
NDRV
CHARGER
+
–
5.3V/4.7V
NC
NC
IS
13
12
2
0.27mA
LINE OFF
TIME
UVINT
+
–
V
SOFT-START
FAULT
+
5
SSFLT
OC
–
300mV
1.242V
1.226V
+
UVVIN
4
1
UVLO
GND
–
V
FF
0.66
4.9µA
BOOT
TG
14
15
16
LEVEL
SHIFT
TS
SW
DET
PWM SECONDARY CONTROL
5V
PWM
RECEIVER
BOOTSTRAP
REFRESH
DRIVE
LOGIC
+
–
IN
IN
SW
CONDITION
DET
+
–
PWM
PRIMARY
CONTROL
–
+
PRIMARY
400mV
1.25V
3
SIDE CONTROL
V
SLMT
N/C
2V
FREQUENCY
SET
SWITCHES
ON
RAMP
V
P-P
0V
V
I
P-P
OSCILLATOR
CLOCK
OPTO
BIAS
OSC
SECONDARY SIDE CONTROL
3.3V
V
CC
+
V
11
10
9
7
8
FB/IN
CC
BG
RECTIFIER
PGND
–
FS/IN
PGND
3705 BD
3705fb
7
LTC3705
U
OPERATIO
Mode Setting
the transmission of 0% to 50% duty cycle, it is necessary
to establish a minimum controllable “on” time of approxi-
mately 100ns. This ensures that 0% duty cycle can be
reliably distinguished from 50% duty cycle.
The LTC3705 is a controller and gate driver designed for
use in a 2-switch forward converter. When used in con-
junction with the LTC3706 PolyPhase secondary-side
synchronous forward controller it forms a complete
2-switch forward converter with secondary-side regula-
tion, galvanic isolation between input and output, and
synchronous rectification. In this mode, upon start-up,
the FB/IN+ and FS/IN– pins are effectively shorted by one
winding of the pulse transformer. The LTC3705 detects
this short circuit to determine that it is in secondary-side
control mode. Operation in this mode is confirmed when
the LTC3706 begins switching the pulse transformer.
On-Chip Rectifier
Simultaneously with duty-cycle decoding, and through
the same pulse transformer, the near-square-wave gener-
ated by the LTC3706 provides primary-side VCC gate drive
bias power by way of the LTC3705’s on-chip full-wave
bridge rectifier. No auxiliary bias supply is necessary and
forward converter design and circuitry are considerably
simplified.
Alternately, the LTC3705 can be used as a standalone
primary-sidecontroller.Inthiscase,theFB/IN+ andFS/IN–
pinsoperateindependently.TheFB/IN+ pinisconnectedto
thecollectorofanoptoisolatortoprovidefeedbackandthe
FS/IN– pin is connected to the frequency set resistor.
External Series Pass Linear Regulator
The LTC3705 features an external series pass linear regu-
lator that eliminates the long start-up time associated with
the conventional trickle charger. The drain of an external
NMOS is connected to the input voltage and the source is
connected to VCC. The gate of the NMOS is connected to
NDRV. To power the gate, an external pull-up resistor is
connected from the input voltage to NDRV. The NMOS
must be a standard 3V threshold type (i.e. not logic level).
An on-chip circuit manages the start up and operation of
the linear regulator. It takes approximately 45µs for the
linear regulator to charge VCC to its target value of 8V
(unless limited by a slower rise of VIN). The LTC3705
begins operating the gate drives when VCC reaches 7.4V.
Often, the thermal rating of the NMOS prevents it from
operating continuously, and the LTC3705 “times out” the
linear regulator to prevent overheating. This is accom-
plished using the capacitor connected to the SSFLT pin as
described subsequently.
Gate Drive Encoding
In secondary-side control with the LTC3706, after a start-
up sequence, the LTC3706 transmits multiplexed PWM
information through a pulse transformer to the FB/IN+ and
FS/IN– inputs of the LTC3705. In the LTC3705, the PWM
receiver extracts the duty cycle and uses it to control the
top and bottom gate drivers.
Figure 1 shows that the LTC3706 drives the pulse trans-
former in a complementary fashion, with a duty cycle of
approximately 50%. At the appropriate time during the
positive half cycle, the LTC3706 applies a short (150ns)
zero-voltage pulse across the pulse transformer, indicat-
ing the end of the “on” time. Although this scheme allows
DUTY CYCLE = 15%
DUTY CYCLE = 0%
150ns
150ns
150ns
Trickle Charger Shunt Regulator
+7V
Alternately, a trickle charger can be implemented by
eliminating the external NMOS and connecting NDRV to
VCC and using the pull-up resistor to charge VCC. To allow
extra headroom for starting, the LTC3705 detects this
mode and increases the threshold for starting the gate
drives to 13.4V. An internal shunt regulator limits the
voltage on the trickle charger to 15V.
+
–
V
– V
PT1
PT1
–7V
1 CLK PER
1 CLK PER
Figure 1. Gate Drive Multiplexing Scheme
3705fb
8
LTC3705
U
OPERATIO
Self-Starting Architecture
caused by the current sense voltage on the IS pin exceed-
ing the 300mV overcurrent threshold, 2) an input
undervoltage fault caused by the UVLO pin falling below
the 1.226V falling threshold, 3) a gate drive undervoltage
fault caused by the voltage on the VCC pin falling below the
7V threshold, or 4) loss of the gate drive encoding signal
from the LTC3706.
The LTC3705 is combined with the LTC3706 to form a
complete self-starting DC isolated power supply. When
power is first applied, and when VCC for the LTC3705 is
above the appropriate threshold, the LTC3705 begins
open-loop operation using its own internal oscillator.
Power is supplied to the secondary by switching the gate
driverswithagraduallyincreasingdutycycleascontrolled
by the rate of rise of the voltage on the SSFLT pin. A peak
detector power supply for the LTC3706 allows it to begin
operation even for small duty cycles. Once adequate
voltage is available for the LTC3706, it provides duty cycle
information and gate drive bias power using the pulse
transformer as shown in Figure 1. The LTC3705 detects
the appearance of this signal and transfers control of the
gatedriverstotheLTC3706.Simultaneously,theLTC3705
also enables the on-chip rectifier and turns off the linear
regulator.
Upon sensing a fault, the LTC3705 immediately turns off
the top and bottom gate drives and indicates a fault by
quickly pulling the voltage on the SSFLT pin to within 1.3V
of the voltage on the VCC pin. After indicating the fault, the
LTC3705 quickly ramps down the voltage on the SSFLT
pin to approximately 2.8V. Then, to allow complete dis-
charge of the secondary-side circuit, the LTC3705 slowly
rampsdownthevoltageontheSSFLTpintoabout200mV.
The LTC3705 then attempts a restart.
Linear Regulator Timeout
The thermal rating of the linear regulator’s external NMOS
often cannot allow it to indefinitely supply bias current to
the primary-side gate drives. The LTC3705 has a linear
regulator timeout mechanism that also uses the SSFLT
capacitor.
Alternately, when the LTC3705 is used as a standalone
primary-sidecontroller,thegraduallyincreasingdutycycle
powersupasecondary-sidereferenceandoptoisolatorand
feedback is accomplished when the output of the
optoisolator begins pulling down in the FB/IN+ pin.
Asdescribedinthepriorsection,soft-startisoveroncethe
voltage on the SSFLT pin reaches 2.8V. However, the
SSFLT capacitor continues to charge and the linear regu-
lator is turned off when the voltage on the SSFLT pin
reaches 3.9V. The “Applications Information” section de-
scribes linear regulator timeout in more detail.
Soft-Start and Fault
These two functions are implemented using the SSFLT
pin. (This pin is also used for linear regulator timeout as
described in the following section.)
Initiating soft-start requires that: 1) the gate drive
undervoltage (UVGD) goes low meaning that adequate
voltage is available on the VCC pin (7.4V for the linear
regulator or 13.4V for the trickle charger) and 2) the input
undervoltage (UVVIN) goes low meaning that the voltage
on the UVLO pin has reached the 1.242V rising threshold.
Volt-Second Limit
The volt-second limit ensures that the power transformer
core does not saturate for any combination of duty cycle
and input voltage. The input of an R-C integrator is
connected to VIN and its output is connected to the VSLMT
pin. While the top and bottom gate drives are “off,” the
LTC3705 grounds the VSLMT pin. When the gate drives are
turned “on” the VSLMT pin is released and the capacitor is
allowed to charge in proportion to VIN. If the capacitor
voltage on the VSLMT pin exceeds 1.25V the two gate
drives are immediately turned “off.” Note that this is not
considered a fault condition and the LTC3705 can run
Duringsoft-start, theLTC3705graduallychargesthesoft-
start capacitor to ramp up the converter duty cycle. Soft-
startisoverwhenthevoltageontheSSFLTpinreaches2.8V.
Innormaloperation,atsomepointbeforethis,theLTC3705
makes a transition to controlling duty cycle using closed-
loop regulation of the converter output voltage.
TheSSFLTpinisalsousedtoindicateafault.TheLTC3705
recognizes faults from four origins: 1) an overcurrent fault
indefinitelywiththeswitchdutycyclebeingdeterminedby
3705fb
9
LTC3705
U
OPERATIO
the volt-second limit circuit. The duty cycle is always
limited to 50% to ensure that the power transformer flux
always has time to reset before the start of the next cycle.
duringstartupisdeterminedbycomparisonofthevoltage
on the SSFLT pin to a 50% duty cycle triangle wave with
anamplitudeof2V.Toimplementvoltagefeedforward,the
charging current for the soft-start capacitor is reduced in
proportion to the input voltage. As a result, the initial rate
of rise of the converter output voltage is held approxi-
mately constant regardless of the input voltage. At some
point during start-up, the LTC3706 begins to switch the
pulse transformer and takes over the soft-start.
In an alternate application, the volt-second limit can be
usedforopen-loopregulationoftheoutputagainstchanges
in VIN.
Current Limit
CurrentlimitfortheLTC3705isprincipallyasafetyfeature
to protect the converter and is not part of a control
function. The current that flows in series through the top
switch, the transformer primary, and the bottom switch is
sensed by a resistor connected between the source of the
bottom switch and GND. If the voltage across this resistor
exceeds 300mV, the LTC3705 initiates a fault.
For operation with standalone primary-side control and
optoisolator feedback, voltage feedforward is used during
both start-up and normal operation. The duty cycle is
determined by using a 50% duty cycle triangle wave with
an amplitude equal to 66% of the voltage on the UVLO pin
which is, in turn, proportional to VIN. The charging current
for the soft-start capacitor is a constant 5.2µA. During
soft-start, the duty cycle is determined by comparing the
voltage on the SSFLT pin to the triangle wave. Soft-start is
concluded when the voltage on the SSFLT pin exceeds the
voltage on the FB/IN+ pin. After the conclusion of soft-
start, the duty cycle is determined by comparison of the
voltage on the FB/IN+ pin to the triangle wave.
Bootstrap Refresh
The LTC3705 incorporates a unique bootstrap refresh
circuittoensurethatthebootstrapsupply(BOOST)forthe
top switch has adequate voltage for operation at low duty
cycles. Therefore, the LTC3705 does not require a
undervoltage lockout for the bootstrap supply and a po-
tential source of unexpected shutdowns is eliminated.
Optoisolator Bias
When the LTC3705 is used in standalone primary-side
mode, feedback is provided by an optoisolator connected
to the FB/IN+ pin. The LTC3705 has a built optoisolator
bias circuit which eliminates the need for external
components.
Voltage Feedforward
The LTC3705 uses voltage feedforward to properly modu-
late the duty cycle as a function of the input voltage. For
secondary-side control with the LTC3706, voltage
feedforward is used during start-up only. The duty cycle
W U U
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APPLICATIO S I FOR ATIO
UVLO
The LTC3705 also has 16mV of voltage hysteresis on the
UVLO pin so that the UVLO threshold for VIN falling is:
The UVLO pin is connected to a resistive voltage divider
connected to VIN as shown in Figure 2. The voltage
threshold on the UVLO pin for VIN rising is 1.242V. To
introduce hysteresis, the LTC3705 draws 4.9µA from the
UVLO pin when VIN is rising. The hysteresis is therefore
useradjustableanddependsonthevalueofR1. TheUVLO
threshold for VIN rising is:
R1+ R2
V
= (1.226V)
IN(UVLO,FALLING)
R2
To implement external Run/Stop control, connect a small
NMOS to the UVLO pin as shown in Figure 2. Turning the
NMOSongroundstheUVLOpinandpreventstheLTC3705
from running.
R1+ R2
V
= (1.242V)
+ R1(4.9µA)
IN(UVLO,RISING)
R2
3705fb
10
LTC3705
U
W
U U
APPLICATIO S I FOR ATIO
V
IN
completes the soft-start interval. In order to ensure that
control is properly transferred from the LTC3705 (pri-
mary-side) to the LTC3706 (secondary-side), it is neces-
sary to limit the rate of rise on the primary-side soft-start
ramp so that the LTC3706 has adequate time to wake up
and assume control before the output voltage gets too
high.Thisconditionissatisfiedformanyapplicationsifthe
following relationship is maintained:
R1
UVLO
RUN/STOP
CONTROL
(OPTIONAL)
LTC3705
R2
GND
3705 F02
CSS,SEC ≤ CSS_PRI
Figure 2. Resistive Voltage Divider for
UVLO and Optional Run/Stop Control
However, care should be taken to ensure that soft-start
transfer from primary-side to secondary-side is com-
pleted well before the output voltage reaches its target
value.Agooddesigngoalistohavethetransfercompleted
when the output voltage is less than one-half of its target
value. Note that the fastest output voltage rise time during
primary-side soft-start mode occurs with minimum load
current.
Linear Regulator
The linear regulator eliminates the long start-up times
associated with a conventional trickle charger by using an
external NMOS to quickly charge the capacitor connected
to the VCC pin.
Note that a trickle charger usually requires a large capaci-
tor to provide holdup for the VCC pin while the converter
attempts to start. The linear regulator in the LTC3705 can
both charge the capacitor connected to the VCC pin and
provide primary-side gate-drive bias current. Therefore,
with the linear regulator, the capacitor need only be large
enoughtocopewiththeripplecurrentfromdrivingthetop
and bottom gates and holdup need not be considered.
The open-loop start-up frequency on the LTC3705 is set
by placing a resistor RFS(S) from the FS/IN– pin to GND.
Although the exact start-up frequency on the primary side
is not critical, it is generally a good practice to set it
approximately equal to the operating frequency on the
secondary side.
In this mode the start-up frequency of the LTC3705 is
approximately:
The external NMOS for the linear regulator should be a
standard 3V threshold type (i.e. not a logic level thresh-
old). The rate of charge of VCC from 0V to 8V is controlled
by the LTC3705 to be approximately 45µs regardless of
the size of the capacitor connected to the VCC pin. The
charging current for this capacitor is approximately:
34 •109
fPRI
=
RFS(S) + 10,000
In the event that the LTC3706 fails to start up properly and
assume control of switching, there are several fail-safe
mechanisms to help avoid overvoltage conditions. First,
theLTC3705implementsavolt-secondclampthatmaybe
used to keep the primary-side duty cycle at a level that
does not produce an excessive output voltage. Second,
thetimeoutofthelinearregulator(describedinthefollow-
ing section) means that, unless the LTC3706 starts and
supports the LTC3705’s gate drives through the pulse
transformer and on-chip rectifier, the LTC3705 eventually
suffersagatedriveundervoltagefault.Finally,theLTC3706
has an independent overvoltage detection circuit that
crowbars the output of the DC/DC converter using the
synchronous secondary-side MOSFET switch.
8V
45µs
IC
=
C
The safe operating area (SOA) for the external NMOS
should be chosen so that capacitor charging does not
damage the NMOS. Excessive values of capacitor are
unnecessary and should be avoided.
Start-Up Considerations
When used in a self-starting converter with the LTC3706,
the LTC3705 initially begins the soft-start of the converter
in an open-loop fashion. After bias is obtained on the
secondary side, the LTC3706 assumes control and
3705fb
11
LTC3705
W U U
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APPLICATIO S I FOR ATIO
In the event that a short-circuit is applied to the output of
the converter prior to start-up, the LTC3706 generally
does not receive enough bias voltage to operate. In this
case,theLTC3705detectsaFAULTforoneoftworeasons:
1) since the LTC3706 never sends pulse encoding to the
LTC3705, the linear regulator times out resulting in a gate
driveundervoltagefault,or2)theprimary-sideovercurrent
circuit is tripped because of current buildup in the output
inductor. In either case, the LTC3705 initiates a shutdown
followed by a soft-start retry.
Since the power dissipation of the linear regulator is
proportional to the input voltage, this strategy of making
the timeout inversely proportional to the input voltage
produces an approximately constant temperature excur-
sion for the external NMOS of the linear regulator regard-
less of the input voltage.
In situations for which the continuous operation of the
linear regulator does not exceed the thermal limitations of
the external NMOS (i.e. converters with low VIN or with
minimal gate drive bias requirements), the auxiliary sup-
ply can be omitted and the linear regulator allowed to
operate continuously. If INDRV is less than 0.27mA the
linear regulator never times out and the voltage on the
SSFLT pin stays at approximately 2.8V after start-up is
completed. To accomplish this set:
Linear Regulator Timeout
After start-up, the LTC3705 times out the linear regulator
to prevent overheating of the external NMOS. The timeout
interval is set by further charging the soft-start capacitor
C
SSFLT fromtheend-of-soft-startvoltageofapproximately
V
IN(MAX) – VNDRV
2.8V to the timeout threshold of 3.9V. Linear regulator
timeout behaves differently depending on mode.
RPULLUP
>
0.27mA
where VIN(MAX) is the maximum expected continuous
input voltage. Note that once the linear regulator is turned
off it locks out. Therefore when using this strategy, care
should be taken to ensure that a transient higher than
In primary-side standalone mode, the LTC3705 generally
requires that an auxiliary gate drive bias supply take over
from the linear regulator. (See the subsequent section for
more detail on the auxiliary supply.) During linear regula-
tor timeout, the rate of rise of the soft-start capacitor
voltage depends on the current into the NDRV pin as
controlled by the pull-up resistor RPULLUP, the value of VIN
V
IN(MAX) does not persist longer than tTIMEOUT.
In secondary-side operation with the LTC3706, there is
never any need for continuous operation of the linear
regulator since gate drive bias power is provided by the
LTC3706 through the pulse transformer and on-chip
rectifier. The LTC3705 shuts down the linear regulator
once the LTC3706 begins switching the pulse trans-
former. If the LTC3706 fails to start, the LTC3705 quickly
times out the linear regulator once the voltage on the
SSFLT pin reaches 2.8V.
and the value of VNDRV
.
V – VNDRV
RPULLUP
IN
INDRV
=
The value of VNDRV is VCC = 8V plus the value of the gate-
to-source voltage (VNDRV – VCC) of the external NMOS in
the linear regulator. The gate-to-source voltage depends
on the actual device but is approximately the threshold
voltage of the external NMOS.
Fault Lockout
The LTC3705 indicates a fault by pulling the SSFLT pin to
within 1V of VCC. The LTC3705 subsequently attempts a
restart. Optionally, the user can prevent restart and “lock
out” the converter by clamping the voltage on the SSFLT
pinwitha4.3VZenerdiode. Oncetheconverterhaslocked
out it can only be restarted by the removal of the input
voltage or by release of the Zener diode clamp.
For INDRV > 0.27mA, the capacitor on the SSFLT pin is
charged in proportion to (INDRV – 0.27mA) until the linear
regulator times out. Thus, since VNDRV is very nearly
constant, the timeout interval for the linear regulator is
inversely proportional to the input voltage and a higher
input voltage produces a shorter timeout.
66CSSFLT(3.9V – 2.8V)
tTIMEOUT
=
⎡V − VNDRV
⎤
IN
– 0.27mA
⎢
⎥
⎦
RPULLUP
⎣
3705fb
12
LTC3705
W U U
APPLICATIO S I FOR ATIO
U
Pulse Transformer
designed to keep the voltage on the VCC pin between the
absolutemaximumof15Vandthegate-driveundervoltage
lockout of 7V.
The pulse transformer that connects the LTC3706 to the
LTC3705 performs the dual functions of gate drive duty
cycleencodingandgatedrivebiassupplyfortheLTC3705
bywayoftheon-chipfull-waverectifier.Thedesignsofthe
LTC3705 and LTC3706 have been coordinated so that the
transformer turn ratio is:
The auxiliary supply is connected in parallel with VCC. The
linear regulator maintains VCC at 8V. If the auxiliary supply
produces more than 8V, it turns off the external NMOS
beforetheLTC3705cantimeoutthelinearregulator. Ifthe
auxiliarysupplyproduceslessthan8V,thelinearregulator
times out and then the voltage on the VCC pin declines to
the voltage produced by the auxiliary supply.
NLTC3705 = 2NLTC3706
where NLTC3705 is the number of turns in the winding
connected to the FB/IN+ and FS/IN– pins of the LTC3705
and NLTC3706 is the number of turns in the winding
connected to the PT+ and PT– pins of the LTC3706. The
winding connected to the LTC3706 must be able to with-
stand volt-seconds equal to:
Slave Mode Operation
When the LTC3705 is paired with the LTC3706, multiple
pairs can be used to form a PolyPhase converter. In
PolyPhaseoperation,oneLTC3705becomesthe“master”
while the remainder become “slaves.” The master con-
trols start-up in the same manner as for the single-phase
converter, while the slaves do not begin switching until
receivingPWMinformationthroughtheirownpulsetrans-
former from their corresponding LTC3706. To synchro-
nize operation, the SSFLT and VCC pins of the master are
connected to the corresponding pins of all the slaves. The
master is designated by connection of the frequency set
resistortotheFS/IN– pinwhilethisresistorisomittedfrom
the slaves. For the slaves the NDRV pin is connected to the
VCC pin. See the following section on PolyPhase Applica-
tions for more detail.
VCC
2f
(V – s)MAX
=
whereVCCisthemaximumsupplyvoltagefortheLTC3706
and f is the operating frequency of the LTC3706.
Auxiliary Supply
When used with the LTC3706, the LTC3705 does not
require an auxiliary supply to provide primary-side gate-
drive bias current. After start-up, primary-side gate drive
current is provided by the LTC3706 through a small pulse
transformer and the LTC3705’s on-chip rectifier.
However, when used as a standalone primary-side con-
troller,theLTC3705mayrequireaconventionalgate-drive
bias supply as shown in Figure 3. The bias supply must be
PolyPhase Applications
Figure4showsthebasicconnectionsforusingtheLTC3705
andLTC3706inPolyPhaseapplications.Oneofthephases
is always identified as the “master,” while all other phases
are “slaves.” For the LTC3705 (primary side), the master
performs the open-loop start-up and supplies the initial
VCC voltage for the master and all slaves. The LTC3705
slaves are put into that mode by omitting the resistor on
FS/IN–. The LTC3705 slaves simply stand by and wait for
PWM signals from their respective pulse transformers.
Since the SSFLT pins of master and slave LTC3705s are
interconnected, a FAULT (overcurrent, etc.) on any one of
the phases will perform a shutdown/restart on all phases
together.
V
IN
POWER
TRANSFORMER
PRIMARY
WINDING N
BAS21
SECONDARY
NDRV
LTC3705
WINDING N
P
S
1mH
V
CC
AUXILIARY
WINDING N
2.2µF
BAS21
A
GND
3705 F03
Figure. 3. Auxiliary Supply for Primary-Side Control
3705fb
13
LTC3705
W U U
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APPLICATIO S I FOR ATIO
Grounding Considerations
For the LTC3706, the master performs soft-start and
voltage-loop regulation by driving all slaves to the same
current as the master using the ITH pins. Faults and
shutdowns are communicated via the interconnection of
the RUN/SS pins. The LTC3706 is put into slave mode by
tying the FB pin to VCC.
The LT3705 is typically used in high current converter
designs that involve substantial switching transients. Fig-
ure 5 illustrates these currents. The switch drivers on the
IC are designed to drive large capacitances and, as such,
generate significant transient currents. Careful consider-
ation must be made regarding input and local power
supply bypassing to avoid corrupting the ground refer-
ences used by the UVLO and frequency set circuitry.
Standalone Primary-Side Operation
The LTC3705 can be used to implement a standalone
forward converter using optoisolator feedback and a
secondary-sidevoltagereference.AlternatelytheLTC3705
can be used to implement an open-loop forward converter
using the VSLMT pin to regulate against changes in VIN. In
either case, the LTC3705 oscillator determines the fre-
quency as found from:
Typically, high current paths and transients from the input
supply and any local drive supplies must be kept isolated
from GND. By virtue of the topologies used in LT3705
applications,thelargecurrentsfromtheprimaryswitches,
as well as the switch drive transients, pass through the
sense resistor to ground. This defines the ground connec-
tion of the sense resistor as the reference point for both
GND and PGND.
21•109
RFS(P) + 4200
fOSC
=
Effective grounding can be achieved by considering the
return current paths from the sense resistor to each
respective bypass capacitor. Don’t be tempted to run
small traces to separate the grounds. A power ground
plane is important as always in high power converters, but
care must be taken to keep high current paths away from
the GND reference. An effective approach is to use a 2-
layer ground plane, reserving an entire layer for GND and
an entire layer for PGND. The UVLO and frequency set
resistors can then be directly connected to the GND plane.
Note that polyphase operation is not possible in the stand-
alone configuration.
3705fb
14
LTC3705
W U U
APPLICATIO S I FOR ATIO
U
+
+
V
V
IN
OUT
V
BIAS
V
NDRV V
CC
IN
+
NDRV
FS/SYNC
+
–
UVLO FB/IN
PT
•
•
V
FB
CC
–
ITH
FS/IN
PT
SS/FLT
RUN/SS
LTC3706
(MASTER)
LTC3705
(MASTER)
–
V
IN
V
NDRV V
CC
IN
RUN/SS FS/SYNC
NDRV
+
–
SS/FLT FB/IN
+
–
FB
ITH
PT
PT
•
•
V
CC
UVLO FS/IN
PHASE
LTC3705
(SLAVE)
LTC3706
(SLAVE)
3705 F04
Figure 4. Connections for PolyPhase
3705fb
15
LTC3705
W U U
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APPLICATIO S I FOR ATIO
V
V
V
IN
BOOST
IN
LT3705
BOOST
TG
TS
UVLO
V
CC
V
CC
–
FS/IN
GND
BG
PGND
POWER GROUND PLANE
3705 F05
SIGNAL GROUND PLANE
Figure 5. High-Current Transient Return Paths
3705fb
16
LTC3705
U
TYPICAL APPLICATIO S
+
+
V
IN
V
OUT
L2 1.2µH
10Ω
L1 1µH
MURS120
0.25W
T1
1nF
100V
10Ω
0.25W
1.2Ω
•
•
Si7852DP
Si7852DP
1nF
100V
330µF
6.3V
×3
1µF
100V
1µF
100V
x3
Si7336ADP
×2
1µF
CMPSH1-4
9:2
Si7336ADP
MURS120
2.2nF
250V
2mΩ
2W
30mΩ
1W
10µF
25V
–
–
V
OUT
V
IN
CZT3019
100Ω
100k
BAS21
680pF
2.2µF
16V
102k
1%
100Ω 100Ω
FQT7N10
0.22µF
L1: VISHAY IHLP-2525CZ-01
L2: COILCRAFT SER2010-122
T1: PULSE PA0807
1nF
FG SW
SG
V
NDRV
V
CC
IN
–
I
S
FS/SYNC
365k
T2: PULSE PA0297
+
I
S
NDRV
BOOST TG TS BG IS
1%
FB
+
+
T2
FB/IN
PT
LTC3706
UVLO
•
•
1µF
0.1µF
ITH
100Ω
470pF
1nF
LTC3705
V
CC
5k
–
–
2.2µF
25V
SS/FLT
FS/IN
PT
2:1
33nF
GND PGND PHASE SLP MODE REGSD
100k
RUN/SS
GND PGND VSLMT
680pF
20k
15k
1%
162k
22.6k
1%
33nF
3705 F06
Load Step
Efficiency
95
90
85
80
V
= 36V
IN
V
OUT
50mV/DIV
V
= 72V
IN
I
OUT
10A/DIV
3705 F06b
20µs/DIV
V
OUT
= 48V
IN
V
= 3.3V
LOAD STEP = 0A TO 20A
5
10
LOAD CURRENT (A)
25
0
15
20
3705 F06c
Figure 6. 36V-72V to 3.3V/20A Isolated Forward Converter Using LTC3706
3705fb
17
LTC3705
U
TYPICAL APPLICATIO S
•
E F F I C I E N C Y ( % )
3705fb
18
LTC3705
U
PACKAGE DESCRIPTIO
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.189 – .196*
(4.801 – 4.978)
.045 ±.005
.009
(0.229)
REF
16 15 14 13 12 11 10 9
.254 MIN
.150 – .165
.229 – .244
.150 – .157**
(5.817 – 6.198)
(3.810 – 3.988)
.0165
±
.0015
.0250 BSC
RECOMMENDED SOLDER PAD LAYOUT
1
2
3
4
5
6
7
8
.015 ± .004
(0.38 ± 0.10)
×
45°
.0532 – .0688
(1.35 – 1.75)
.004 – .0098
(0.102 – 0.249)
.007 – .0098
(0.178 – 0.249)
0°
– 8° TYP
.016 – .050
(0.406 – 1.270)
.0250
(0.635)
BSC
.008 – .012
GN16 (SSOP) 1005
(0.203 – 0.305)
TYP
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
3705fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
19
LTC3705
U
TYPICAL APPLICATIO
P1
+
V
IN
L2
0.82µH
10Ω
36V TO
72V
Q1
Q2
MURS120
P4
V
12V
5A
+
T1
MMBT2907A
+
OUT
D1A
C7
68µF
2x
PA0520
330pF
200V
1µF
100V
2
8T
5
7
D3
•
•
L1
6T
11
D1B
0.1µF
25µH
20Ω
1W
10Ω
1µF
100V
1µF
100V
11
7
P3
–
V
OUT
BAS21
MURS120
MMBT2907A
1
5T
6
•
2.2nF
250V
0.025Ω
1W
BAS21
P2
–
V
IN
C7: TPSE686M025R0125 AVX
D1A, D1B: MBRB20100CT
D3: P6SMB15AT3
L1: GOWANDA 050KM2502SM
L2: VISHAY IHLP2525CZERR82M01
Q1, Q2: SILICONIX Si7456DP
365k
1%
301k
100Ω
Regulation
18
16
14
12
10
8
330pF
FQT7N10
1mH
301k
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GND
TS
TG
0.22µF
LTC3705
I
S
DO1608C-105
V
SLMT
BOOT
NC
BAS21
UVLO
SSFLT
NDRV
220pF
6
NC
4
1000pF
V
CC
V
V
V
= 36V
= 48V
= 72V
IN
IN
IN
+
2
FB/IN
FS/IN
BG
15k
1%
–
+
PGND
0.033µF
2.2µF
25V
0
15V
0
1
2
3
4
5
0.1µF
100k
LOAD (A)
3705 F08b
3705 F08
Figure 8. 36V-72V to 12V/5A Open-Loop Regulated Isolated Forward Converter Using VSLMT
RELATED PARTS
PART NUMBER
LTC1693
DESCRIPTION
COMMENTS
High Speed Single/Dual N-Channel MOSFET Drivers CMOS Compatible Input, V Range: 4.5V to 12V
CC
LTC1698
Secondary Synchronous Rectifier Controller
Single Switch Controller
Use with the LT1681, Optocoupler Driver, Pulse Transformer Synchronization
Used for 20W to 500W Forward Converters
LT1950
LTC3706
Polyphase Secondary-Side Synchronous
Forward Controller
Fast Transient Response, Self-Starting Architecture, Current Mode Control
LT3710
LT3781
Secondary-Side Synchronous Post Regulator
For Regulated Auxiliary Output in Isolated DC/DC Converters
72V Operation, Synchronous Switch Output
“Bootstrap” Start Dual Transistor Synchronous
Forward Controller
LT3804
Secondary Side Dual Output Controller
with Opto Driver
Regulates Two Secondary Outputs, Optocoupler Feedback Driver
and Second Output Synchronous Driver Controller
LTC3901
Secondary-Side Synchronous Driver for
Push-Pull and Full-Bridge Converter
Similar Function to LTC3900, Used in Full-Bridge and Push-Pull Converter
LTC4440/LTC4440-5 High Speed, High Voltage and High Side
Gate Drivers
High Side Source Up to 100V, Up to 15V Gate Drive Supply, 6-Lead
ThinSOTTM or 8-Lead Exposed Pad MSOP Packages
LTC4441
6A MOSFET Driver
Adjustable Gate Drive from 5V to 8V, 5V to 28V V Range
IN
ThinSOT is a trademark of Linear Technology Corporation.
3705fb
LT 1006 REV B • PRINTED IN USA
20 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2005
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