LTC3778EF#TR [Linear]
LTC3778 - Wide Operating Range, No RSENSE Step-Down Controller; Package: TSSOP; Pins: 20; Temperature Range: -40°C to 85°C;
| 型号： | LTC3778EF#TR |
| 厂家： | 
Linear |
| 描述： | LTC3778 - Wide Operating Range, No RSENSE Step-Down Controller; Package: TSSOP; Pins: 20; Temperature Range: -40°C to 85°C 开关 光电二极管 |
| 文件： | 总24页 (文件大小：297K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3778
Wide Operating Range,
No RSENSETM Step-Down Controller
U
FEATURES
DESCRIPTIO
The LTC®3778 is a synchronous step-down switching
regulator controller for computer memory, automobile
and other DC/DC power supplies. The controller uses a
valley current control architecture to deliver very low duty
cycles without requiring a sense resistor. Operating fre-
quency is selected by an external resistor and is compen-
■
Wide VIN Range: 4V to 36V
■
Sense Resistor Optional
■
True Current Mode Control
2% to 90% Duty Cycle at 200kHz
■
■
t
ON(MIN) ≤ 100ns
■
■
■
■
■
■
■
■
■
■
■
Stable with Ceramic COUT
Dual N-Channel MOSFET Synchronous Drive
Power Good Output Voltage Monitor
±1% 0.6V Reference
Adjustable Current Limit
Adjustable Switching Frequency
Programmable Soft-Start
Output Overvoltage Protection
Optional Short-Circuit Shutdown Timer
Micropower Shutdown: IQ ≤ 30µA
sated for variations in VIN and VOUT.
Discontinuous mode operation provides high efficiency
operation at light loads. A forced continuous control pin
reduces noise and RF interference, and can assist second-
ary winding regulation when the main output is lightly
loaded. SENSE+ and SENSE– pins provide true Kelvin
sensing across the optional sense resistor or the
sychronous MOSFET.
Fault protection is provided by internal foldback current
limiting,anoutputovervoltagecomparator,optionalshort-
circuit shutdown timer and input undervoltage lockout.
Soft-start capability for supply sequencing is accom-
plished using an external timing capacitor. The regulator
current limit level is user programmable. Wide supply
range allows operation from 4V to 36V at the input and
from 0.6V up to (0.9)VIN at the output.
Available in a 1mUm 20-Lead TSSOP Package
APPLICATIO S
■
Notebook and Palmtop Computers, PDAs
■
Battery Chargers
■
Distributed Power Systems
■
DDR Memory Power Supply
■
Automobile DC Power Supply
, LTC and LT are registered trademarks of Linear Technology Corporation.
No RSENSE is a trademark of Linear Technology Corporation.
U
TYPICAL APPLICATIO
R
ON
1.4M
I
ON
Efficiency vs Load Current
C
SS
0.1µF
V
IN
V
IN
100
90
80
70
60
5V TO 28V
C
IN
M1
10µF
35V
×3
RUN/SS
TG
V
IN
= 5V
Si4884
L1
1.8µH
C
C
V
OUT
SW
500pF
2.5V
10A
C
B
0.22µF
C
I
TH
BOOST
OUT
+
V
IN
= 25V
D
B
180µF
4V
R
C
LTC3778
CMDSH-3
20k
SGND INTV
DRV
×2
CC
CC
M2
Si4874
D1
B340A
BG
+
SENSE
+
R2
40.2k
C
VCC
4.7µF
–
SENSE
PGOOD PGND
0.01
1
10
0.1
V
FB
R1
12.7k
LOAD CURRENT (A)
3778 F01b
3778 F01a
Figure 1. High Efficiency Step-Down Converter
3778f
1
LTC3778
W W
U W
U W
U
ABSOLUTE AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
(Note 1)
ORDER PART
NUMBER
TOP VIEW
Input Supply Voltage (VIN, ION)..................36V to –0.3V
Boosted Topside Driver Supply Voltage
(BOOST) ................................................... 42V to –0.3V
SENSE+, SW Voltage.................................... 36V to –5V
DRVCC, EXTVCC, (BOOST – SW), FCB,
RUN/SS, PGOOD Voltages .................... 7V to –0.3V
VON, VRNG Voltages................... INTVCC + 0.3V to –0.3V
ITH, VFB Voltages...................................... 2.7V to –0.3V
TG, BG, INTVCC Peak Currents.................................. 2A
TG, BG, INTVCC RMS Currents ............................ 50mA
Operating Ambient Temperature
Range (Note 4) ................................... –40°C to 85°C
Junction Temperature (Note 2)............................ 125°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
RUN/SS
1
2
20 BOOST
19 TG
V
ON
LTC3778EF
PGOOD
3
18 SW
+
V
4
17 SENSE
16 SENSE
15 PGND
14 BG
RNG
–
I
TH
5
FCB
6
SGND
7
I
ON
8
13 DRV
CC
V
FB
9
12 INTV
CC
EXTV
CC
10
11
V
IN
F PACKAGE
20-LEAD PLASTIC TSSOP
TJMAX = 125°C, θJA = 110°C/ W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are TA = 25°C. VIN = 15V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Main Control Loop
I
Input DC Supply Current
Normal
Shutdown Supply Current
Q
900
15
2000
30
µA
µA
V
Feedback Reference Voltage
Feedback Voltage Line Regulation
Feedback Voltage Load Regulation
Feedback Pin Input Current
Error Amplifier Transconductance
Forced Continuous Threshold
Forced Continuous Pin Current
On-Time
I
= 1.2V (Note 3)
TH
●
0.594
0.600
0.002
–0.05
–5
0.606
V
%/V
%
FB
∆V
∆V
V
= 4V to 30V, I = 1.2V (Note 3)
FB(LINEREG)
FB(LOADREG)
IN
TH
I
= 0.5V to 1.9V (Note 3)
–0.3
±100
2
TH
I
nA
FB
g
I
= 1.2V (Note 3)
●
●
1.4
1.7
mS
V
m(EA)
TH
V
0.57
0.6
0.63
–2
FCB
I
t
V
= 0.6V
–1
µA
FCB
ON
FCB
I
I
= 60µA, V = 1.5V
200
250
110
300
ns
ns
ON
ON
ON
= 60µA, V = 0V
ON
t
t
Minimum On-Time
I
I
= 180µA, V = 0V
50
100
400
ns
ns
ON(MIN)
OFF(MIN)
ON
ON
ON
Minimum Off-Time
= 60µA, V = 1.5V
250
ON
V
Maximum Current Sense Threshold
V
RNG
V
RNG
V
RNG
= 1V, V = 0.56V
●
●
●
113
79
158
133
93
186
153
107
214
mV
mV
mV
SENSE(MAX)
FB
–
+
V
SENSE
– V
= 0V, V = 0.56V
SENSE
FB
= INTV , V = 0.56V
CC FB
V
Minimum Current Sense Threshold
V
RNG
V
RNG
V
RNG
= 1V, V = 0.64V
67
47
93
mV
mV
mV
SENSE(MIN)
FB
+
–
V
SENSE
– V
= 0V, V = 0.64V
SENSE
FB
= INTV , V = 0.64V
CC FB
∆V
∆V
Output Overvoltage Fault Threshold
Output Undervoltage Fault Threshold
7.5
10
12.5
460
%
FB(OV)
FB(UV)
340
400
mV
3778f
2
LTC3778
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are TA = 25°C. VIN = 15V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
1.5
4
MAX
2
UNITS
V
V
V
V
RUN Pin Start Threshold
RUN Pin Latchoff Enable Threshold
RUN Pin Latchoff Threshold
Soft-Start Charge Current
Soft-Start Discharge Current
Undervoltage Lockout Threshold
Undervoltage Lockout Threshold
TG Driver Pull-Up On Resistance
TG Driver Pull-Down On Resistance
BG Driver Pull-Up On Resistance
BG Driver Pull-Down On Resistance
TG Rise Time
●
0.8
RUN/SS(ON)
RUN/SS(LE)
RUN/SS(LT)
RUN/SS(C)
RUN/SS(D)
RUN/SS Pin Rising
RUN/SS Pin Falling
4.5
4.2
–3
3
V
3.5
–1.2
1.8
3.4
3.5
2
V
I
I
–0.5
0.8
µA
µA
V
V
V
V
V
Falling
Rising
●
●
3.9
4
IN(UVLO)
IN
IN
V
IN(UVLOR)
TG R
TG R
BG R
BG R
TG High
TG Low
BG High
BG Low
3
Ω
UP
2
3
Ω
DOWN
UP
3
4
Ω
1
2
Ω
DOWN
TG t
TG t
C
C
C
C
= 3300pF
= 3300pF
= 3300pF
= 3300pF
20
20
20
20
ns
ns
ns
ns
r
f
LOAD
LOAD
LOAD
LOAD
TG Fall Time
BG t
BG t
BG Rise Time
r
BG Fall Time
f
Internal V Regulator
CC
V
Internal V Voltage
6V < V < 30V, V = 4V
EXTVCC
●
●
4.7
4.5
5
5.3
V
%
INTVCC
CC
IN
∆V
Internal V Load Regulation
I
I
I
= 0mA to 20mA, V = 4V
EXTVCC
–0.1
4.7
±2
LDO(LOADREG)
EXTVCC
CC
CC
CC
CC
V
EXTV Switchover Voltage
= 20mA, V
= 20mA, V
Rising
= 5V
V
CC
EXTVCC
EXTVCC
∆V
∆V
EXTV Switch Drop Voltage
150
200
300
mV
mV
EXTVCC
CC
EXTV Switchover Hysteresis
EXTVCC(HYS)
CC
PGOOD Output
∆V
∆V
∆V
PGOOD Upper Threshold
PGOOD Lower Threshold
PGOOD Hysteresis
V
V
V
Rising
7.5
10
–10
1
12.5
–12.5
2.5
%
%
%
V
FBH
FB
Falling
– 7.5
FBL
FB
Returning
FB(HYS)
FB
V
PGOOD Low Voltage
I
= 5mA
0.15
0.4
PGL
PGOOD
Note 1: Absolute Maximum Ratings are those values beyond which the life of
a device may be impaired.
Note 3: The LTC3778 is tested in a feedback loop that adjusts V to achieve
FB
a specified error amplifier output voltage (I ).
TH
Note 2: T is calculated from the ambient temperature T and power
Note4:TheLTC3778Eisguaranteedtomeetperformancespecificationsfrom
0°C to 70°C. Specifications over the –40°C to 85°C operating temperature
range are assured by design, characterization and correlation with statistical
process controls.
J
A
dissipation P as follows:
D
LTC3778E: T = T + (P • 110°C/W)
J
A
D
3778f
3
LTC3778
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Transient Response
(Discontinuous Mode)
Transient Response
Start-Up
RUN/SS
2V/DIV
VOUT
50mV/DIV
VOUT
50mV/DIV
VOUT
1V/DIV
IL
IL
IL
5A/DIV
5A/DIV
5A/DIV
20µs/DIV
LOAD STEP 0A TO 10A
VIN = 15V
3778 G01
20µs/DIV
LOAD STEP 1A TO 10A
VIN = 15V
3778 G02
50ms/DIV
3778 G19
VIN = 15V
VOUT = 2.5V
V
OUT = 2.5V
V
OUT = 2.5V
RLOAD = 0.125Ω
FCB = 0V
FIGURE 1 CIRCUIT
FCB = INTVCC
FIGURE 1 CIRCUIT
Efficiency vs Load Current
Efficiency vs Input Voltage
Frequency vs Input Voltage
100
95
100
90
80
70
60
50
300
280
260
240
220
200
FCB = 5V
FCB = 0V
FIGURE 1 CIRCUIT
FIGURE 1 CIRCUIT
DISCONTINUOUS
MODE
I
= 10A
= 0A
OUT
I
= 1A
LOAD
CONTINUOUS
90
MODE
I
= 10A
LOAD
I
OUT
85
V
V
= 10V
IN
OUT
= 2.5V
EXTV = 5V
CC
FIGURE 1 CIRCUIT
80
0
5
10
15
20
25
30
0.01
0.1
1
5
10
15
INPUT VOLTAGE (V)
20
0.001
10
25
INPUT VOLTAGE (V)
LOAD CURRENT (A)
3778 G04
3778 G03
3778 G05
Current Sense Threshold
vs ITH Voltage
Load Regulation
ITH Voltage vs Load Current
0
–0.1
–0.2
–0.3
–0.4
300
200
100
0
2.5
2.0
1.5
1.0
0.5
0
2V
FIGURE 1 CIRCUIT
V
=
FIGURE 1 CIRCUIT
RNG
RNG
V
= 1V
1.4V
1V
0.7V
0.5V
CONTINUOUS
MODE
DISCONTINUOUS
MODE
–100
–200
0
2
4
6
8
10
0
1.0
I
1.5
2.0
2.5
3.0
0.5
0
5
10
LOAD CURRENT (A)
15
VOLTAGE (V)
LOAD CURRENT (A)
TH
3778 G06
3778 G08
3778 G07
3778f
4
LTC3778
U W
TYPICAL PERFOR A CE CHARACTERISTICS
On-Time vs ION Current
On-Time vs VON Voltage
On-Time vs Temperature
300
250
200
150
10k
1000
800
600
400
200
0
I
= 30µA
V
= 0V
I
= 30µA
= 0V
ION
VON
ION
ON
V
1k
100
10
100
50
0
1
2
3
0
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
1
10
100
I
CURRENT (µA)
V
VOLTAGE (V)
ON
ON
3778 G20
3778 G21
3778 G22
Maximum Current Sense
Threshold vs VRNG Voltage
Maximum Current Sense
Threshold vs RUN/SS Voltage
Current Limit Foldback
150
125
300
250
200
150
100
50
150
125
V
RNG
= 1V
V
= 1V
RNG
100
75
100
75
50
25
0
50
25
0
0
0.5
1.0
V
1.25
1.5
1.75
2.0
1.5
2
2.5
3
3.5
0.75
0
0.15
0.30
(V)
0.45
0.60
VOLTAGE (V)
RUN/SS VOLTAGE (V)
V
RNG
FB
3778 G10
3778 G23
3778 G09
Feedback Reference Voltage
vs Temperature
Maximum Current Sense
Threshold vs Temperature
Error Amplifier gm vs Temperature
150
140
130
120
110
100
2.0
1.8
1.6
1.4
1.2
1.0
0.62
0.61
0.60
0.59
V
RNG
= 1V
0.58
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
3778 G11
3778 G12
3778 G13
3778f
5
LTC3778
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Input and Shutdown Currents
EXTVCC Switch Resistance
vs Temperature
INTVCC Load Regulation
vs Input Voltage
10
8
1200
1000
800
60
50
40
30
20
10
0
0
–0.1
–0.2
–0.3
–0.4
–0.5
EXTV OPEN
CC
6
SHUTDOWN
600
4
400
200
0
2
EXTV = 5V
CC
0
20
INPUT VOLTAGE (V)
30
35
0
5
10
15
25
–50 –25
0
25
50
75
125
100
0
10
20
30
40
50
TEMPERATURE (°C)
INTV LOAD CURRENT (mA)
CC
3778 G24
3778 G14
3778 G25
RUN/SS Pin Current
vs Temperature
FCB Pin Current vs Temperature
3
2
0
–0.25
–0.50
–0.75
PULL-DOWN CURRENT
1
0
–1.00
–1.25
–1.50
PULL-UP CURRENT
–1
–2
–50 –25
0
25
50
75 100 125
50
TEMPERATURE (°C)
100 125
–50 –25
0
25
75
TEMPERATURE (°C)
3778 G16
3778 G15
Undervoltage Lockout Threshold
vs Temperature
RUN/SS Latchoff Thresholds
vs Temperature
5.0
4.5
4.0
3.5
4.0
3.5
3.0
2.5
LATCHOFF ENABLE
LATCHOFF THRESHOLD
3.0
2.0
–50 –25
0
25
50
75 100 125
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (C)
3778 G17
3778 G18
3778f
6
LTC3778
U
U
U
PI FU CTIO S
RUN/SS (Pin 1): Run Control and Soft-Start Input. A and shuts down the internal regulator so that controller
capacitor to ground at this pin sets the ramp time to full power is drawn from EXTVCC. Do not exceed 7V at this pin
output current (approximately 3s/µF) and the time delay and ensure that EXTVCC < VIN.
for overcurrent latchoff (see Applications Information).
VIN (Pin 11): Main Input Supply. Decouple this pin to
Forcing this pin below 0.8V shuts down the device.
SGND with an RC filter (1Ω, 0.1µF).
V
ON (Pin 2): On-Time Voltage Input. Voltage trip point for
INTVCC (Pin 12): Internal 5V Regulator Output. The inter-
nal control circuits are powered from this voltage. De-
couple this pin to power ground with a minimum of 1µF
low ESR tantalum or ceramic capacitor.
the on-time comparator. Tying this pin to the output
voltage makes the on-time proportional to VOUT. The
comparatorinputdefaultsto0.7Vwhenthepinisgrounded,
2.4V when the pin is tied to INTVCC.
DRVCC (Pin 13): Voltage Supply to Bottom Gate Driver.
NormallyconnectedtotheINTVCCpinthroughadecoupling
RC filter (1Ω, 0.1µF). Decouple this pin to power ground
with a minimum of 4.7µF low ESR tantalum or ceramic
PGOOD (Pin 3): Power Good Output. Open drain logic
output that is pulled to ground when the output voltage is
not within ±10% of the regulation point.
VRNG (Pin 4): Sense Voltage Range Input. The voltage at capacitor. Do not exceed 7V at this pin.
thispinistentimesthenominalsensevoltageatmaximum
outputcurrentandcanbesetfrom0.5Vto2Vbyaresistive
divider from INTVCC. The nominal sense voltage defaults
to 70mV when this pin is tied to ground, 140mV when tied
to INTVCC.
BG (Pin 14): Bottom Gate Drive. Drives the gate of the
bottom N-channel MOSFET between ground and DRVCC.
PGND (Pin 15):Power Ground. Connect this pin closely to
the source of the bottom N-channel MOSFET or to the
bottom of the sense resistor when used, the (–) terminal
of CVCC and the (–) terminal of CIN.
SENSE– (Pin 16): Current Sense Comparator Input. The
(–) input to the current comparator is used to accurately
Kelvin sense the bottom side of the sense resistor or
MOSFET.
SENSE+ (Pin 17): Current Sense Comparator Input. The
(+) input to the current comparator is normally connected
to the SW node unless using a sense resistor (See Appli-
cations Information).
ITH (Pin 5): Current Control Threshold and Error Amplifier
Compensation Point. The current comparator threshold
increases with this control voltage. The voltage ranges
from 0V to 2.4V with 0.8V corresponding to zero sense
voltage (zero current).
FCB (Pin 6): Forced Continuous Input. Tie this pin to
ground to force continuous synchronous operation at low
load, toINTVCC toenablediscontinuousmodeoperationat
low load or to a resistive divider from a secondary output
when using a secondary winding.
SW (Pin 18): Switch Node. The (–) terminal of the boot-
strap capacitor CB connects here. This pin swings from a
diode voltage drop below ground up to VIN.
SGND (Pin 7): Signal Ground. All small-signal compo-
nents and compensation components should connect to
this ground, which in turn connects to PGND at one point.
TG (Pin 19): Top Gate Drive. Drives the top N-channel
MOSFET with a voltage swing equal to DRVCC superim-
posed on the switch node voltage SW.
ION (Pin 8): On-Time Current Input. Tie a resistor from VIN
to thispin tosettheone-shottimercurrentand thereby set
the switching frequency.
BOOST (Pin 20): Boosted Floating Driver Supply. The (+)
terminal of the bootstrap capacitor CB connects here. This
pin swings from a diode voltage drop below DRVCC up to
VIN + DRVCC.
VFB (Pin 9): Error Amplifier Feedback Input. This pin
connects the error amplifier input to an external resistive
divider from VOUT
.
EXTVCC (Pin 10): External VCC Input. When EXTVCC ex-
ceeds 4.7V, an internal switch connects this pin to INTVCC
3778f
7
LTC3778
U
U
W
FU CTIO AL DIAGRA
R
ON
V
OUT
V
IN
V
ON
11
V
IN
2
8
I
ON
6
FCB
10 EXTV
CC
4.7V
2.4V
0.7V
+
C
IN
1µA
+
–
0.6V
REF
0.6V
5V
REG
INTV
CC
+
–
12
F
BOOST
20
V
I
VON
ION
t
ON
=
(10pF)
R
S
C
B
TG
19
Q
I
FCNT
M1
SW
ON
20k
18
SENSE
17
+
–
+
–
+
–
L1
D
B
SWITCH
LOGIC
I
V
OUT
CMP
REV
SENSE
16
SHDN
OV
+
DRV
CC
C
OUT
1.4V
13
BG
14
V
M2
R
RNG
4
×
C
VCC
SENSE
(OPTIONAL)*
(0.5~2)
PGND
15
0.7V
3
3.3µA
PGOOD
R2
1
240k
0.54V
+
–
1V
Q2 Q4
UV
OV
Q6
I
V
FB
THB
9
Q3
Q1
R1
+
–
SGND
7
Q5
+
–
0.66V
0.8V
RUN
SHDN/
SS
LATCH-OFF
SW
M2
–
+
1.2µA
+
EA
SENSE
BG
×5.3
–
+
6V
0.6V
–
SENSE
C
C1
C
SS
PGND
I
TH
RUN/SS
1
5
0.6V
0.4V
R
C
*CONNECTION W/O
SENSE RESISTOR
1778 FD
3778f
8
LTC3778
U
OPERATIO
Main Control Loop
Furthermore, in an overvoltage condition, M1 is turned off
and M2 is turned on and held on until the overvoltage
condition clears.
The LTC3778 is a current mode controller for DC/DC
step-down converters. In normal operation, the top
MOSFET is turned on for a fixed interval determined by a
one-shot timer OST. When the top MOSFET is turned off,
the bottom MOSFET is turned on until the current com-
parator ICMP trips, restarting the one-shot timer and initi-
ating the next cycle. Inductor current is determined by
sensing the voltage between the SENSE– and SENSE+
pins. The voltage on the ITH pin sets the comparator
threshold corresponding to inductor valley current. The
error amplifier EA adjusts this voltage by comparing the
feedback signal VFB from the output voltage with an
internal 0.6V reference. If the load current increases, it
causes a drop in the feedback voltage relative to the
reference. The ITH voltage then rises until the average
inductor current again matches the load current.
Foldback current limiting is provided if the output is
shorted to ground. As VFB drops, the buffered current
threshold voltage ITHB is pulled down by clamp Q3 to a 1V
level set by Q4 and Q6. This reduces the inductor valley
current level to one sixth of its maximum value as VFB
approaches 0V.
Pulling the RUN/SS pin low forces the controller into its
shutdown state, turning off both M1 and M2. Releasing
the pin allows an internal 1.2µA current source to charge
up an external soft-start capacitor CSS. When this voltage
reaches 1.5V, the controller turns on and begins switch-
ing, but with the ITH voltage clamped at approximately
0.6V below the RUN/SS voltage. As CSS continues to
charge, the soft-start current limit is removed.
At low load currents, the inductor current can drop to zero
and become negative. This is detected by current reversal
comparator IREV which then shuts off M2, resulting in
discontinuous operation. Both switches will remain off
with the output capacitor supplying the load current until
the ITH voltage rises above the zero current level (0.8V) to
initiate another cycle. Discontinuous mode operation is
disabled by comparator F when the FCB pin is brought
below 0.6V, forcing continuous synchronous operation.
EXTVCC/INTVCC/DRVCC Power
Power for the top and bottom MOSFET drivers is derived
from DRVCC and most of the internal controller circuitry
is powered from the INTVCC pin. The top MOSFET driver
is powered from a floating bootstrap capacitor CB. This
capacitor is recharged from DRVCC through an external
Schottky diode DB when the top MOSFET is turned off.
When the EXTVCC pin is grounded, an internal 5V low
dropout regulator supplies the INTVCC power from VIN. If
EXTVCC rises above 4.7V, the internal regulator is turned
off, and an internal switch connects EXTVCC to INTVCC.
ThisallowsahighefficiencysourceconnectedtoEXTVCC,
suchasanexternal5Vsupplyorasecondaryoutputfrom
the converter, to provide the INTVCC power. Voltages up
to 7V can be applied to DRVCC for additional gate drive.
If the input voltage is low and INTVCC drops below 3.5V,
undervoltage lockout circuitry prevents the power
switches from turning on.
The operating frequency is determined implicitly by the
top MOSFET on-time and the duty cycle required to
maintain regulation. The one-shot timer generates an on-
time that is proportional to the ideal duty cycle, thus
holding frequency approximately constant with changes
in VIN and VOUT. The nominal frequency can be adjusted
with an external resistor RON.
Overvoltage and undervoltage comparators OV and UV
pull the PGOOD output low if the output feedback voltage
exits a ±10% window around the regulation point.
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The basic LTC3778 application circuit is shown in
Figure 1. External component selection is primarily de-
termined by the maximum load current and begins with
the selection of the sense resistance and power MOSFET
switches. The LTC3778 can use either a sense resistor or
theon-resistanceofthesynchronouspowerMOSFETfor
determining the inductor current. The desired amount of
ripple current and operating frequency largely deter-
mines the inductor value. Finally, CIN is selected for its
ability to handle the large RMS current into the converter
and COUT is chosen with low enough ESR to meet the
output voltage ripple and transient specification.
Connecting the SENSE+ and SENSE– Pins
TheLTC3778canbeusedwithorwithoutasenseresistor.
When using a sense resistor, it is placed between the
source of the bottom MOSFET, M2, and PGND. Connect
the SENSE+ and SENSE– pins to the top and bottom of the
sense resistor. Using a sense resistor provides a well
definedcurrentlimit,butaddscostandreducesefficiency.
Alternatively, one can eliminate the sense resistor and use
the bottom MOSFET as the current sense element by
simply connecting the SENSE+ pin to the SW pin and
SENSE– pin to PGND. This improves efficiency, but one
must carefully choose the MOSFET on-resistance as dis-
cussed below.
Maximum Sense Voltage and VRNG Pin
Inductor current is determined by measuring the voltage
acrossasenseresistancethatappearsbetweentheSENSE–
and SENSE+ pins. The maximum sense voltage is set by
the voltage applied to the VRNG pin and is equal to
approximately (0.133)VRNG. The current mode control
loop will not allow the inductor current valleys to exceed
(0.133)VRNG/RSENSE. In practice, one should allow some
margin for variations in the LTC3778 and external compo-
nent values and a good guide for selecting the sense
resistance is:
Power MOSFET Selection
The LTC3778 requires two external N-channel power
MOSFETs, one for the top (main) switch and one for the
bottom (synchronous) switch. Important parameters for
the power MOSFETs are the breakdown voltage V(BR)DSS
threshold voltage V(GS)TH, on-resistance RDS(ON), reverse
transfercapacitanceCRSS andmaximumcurrentIDS(MAX)
,
.
The gate drive voltage is set by the 5V INTVCC and DRVCC
supplies. Consequently, logic-level threshold MOSFETs
must be used in LTC3778 applications. If the input voltage
or DRVCC voltage is expected to drop below 5V, then sub-
logic level threshold MOSFETs should be considered.
VRNG
RSENSE
=
10•IOUT(MAX)
When the bottom MOSFET is used as the current sense
element, particular attention must be paid to its on-
resistance. MOSFET on-resistance is typically specified
with a maximum value RDS(ON)(MAX) at 25°C. In this case,
additional margin is required to accommodate the rise in
MOSFET on-resistance with temperature:
An external resistive divider from INTVCC can be used to
set the voltage of the VRNG pin between 0.5V and 2V
resulting in nominal sense voltages of 50mV to 200mV.
Additionally, the VRNG pin can be tied to SGND or INTVCC
in which case the nominal sense voltage defaults to 70mV
or 140mV, respectively. The maximum allowed sense
voltage is about 1.33 times this nominal value.
RSENSE
RDS(ON)(MAX)
=
ρT
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The ρT term is a normalization factor (unity at 25°C)
accounting for the significant variation in on-resistance
with temperature, typically about 0.4%/°C as shown in
Figure 2. For a maximum junction temperature of 100°C,
using a value ρT = 1.3 is reasonable.
Operating Frequency
The choice of operating frequency is a tradeoff between
efficiency and component size. Low frequency operation
improvesefficiencybyreducingMOSFETswitchinglosses
but requires larger inductance and/or capacitance in order
to maintain low output ripple voltage.
2.0
1.5
1.0
0.5
0
TheoperatingfrequencyofLTC3778applicationsisdeter-
mined implicitly by the one-shot timer that controls the
on-time tON of the top MOSFET switch. The on-time is set
by the current into the ION pin and the voltage at the VON
pin according to:
V
tON
=
VON (10pF)
I
ION
–50
50
100
150
0
JUNCTION TEMPERATURE (°C)
Tying a resistor RON from VIN to the ION pin yields an on-
time inversely proportional to VIN. For a step-down con-
verter, this results in approximately constant frequency
operation as the input supply varies:
3778 F02
Figure 2. RDS(ON) vs. Temperature
The power dissipated by the top and bottom MOSFETs
strongly depends upon their respective duty cycles and
the load current. When the LTC3778 is operating in
continuous mode, the duty cycles for the MOSFETs are:
VOUT
(VVON) RON(10pF)
f =
[Hz]
Toholdfrequencyconstantduringoutputvoltagechanges,
tie the VON pin to VOUT. The VON pin has internal clamps
that limit its input to the one-shot timer. If the pin is tied
below 0.7V, the input to the one-shot is clamped at 0.7V.
Similarly, if the pin is tied above 2.4V, the input is clamped
at2.4V.Ifoutputisabove2.4V,usearesistivedividerfrom
VOUT to VON pin.
VOUT
DTOP
DBOT
=
=
V
IN
V – VOUT
IN
V
IN
Because the voltage at the ION pin is about 0.7V, the
currentintothispinisnotexactlyinverselyproportionalto
VIN, especially in applications with lower input voltages.
To correct for this error, an additional resistor RON2
connected from the ION pin to the 5V INTVCC supply will
further stabilize the frequency.
The resulting power dissipation in the MOSFETs at maxi-
mum output current are:
PTOP = DTOP OUT(MAX)
I
2 ρT(TOP) RDS(ON)(MAX)
+ k VIN IOUT(MAX) CRSS
PBOT = DBOT OUT(MAX)
2 ρT(BOT) RDS(ON)(MAX)
2
f
I
Both MOSFETs have I2R losses and the top MOSFET
includesanadditionaltermfortransitionlosses,whichare
largest at high input voltages. The constant k = 1.7A–1 can
be used to estimate the amount of transition loss. The
bottomMOSFETlossesaregreatestwhenthebottomduty
cycle is near 100%, during a short-circuit or at high input
voltage.
5V
0.7V
RON2
=
RON
Changes in the load current magnitude will also cause
frequency shift. Parasitic resistance in the MOSFET
switches and inductor reduce the effective voltage across
the inductance, resulting in increased duty cycle as the
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this requires a large inductor. There is a tradeoff between
component size, efficiency and operating frequency.
loadcurrentincreases.Bylengtheningtheon-timeslightly
as current increases, constant frequency operation can be
maintained. This is accomplished with a resistive divider
from the ITH pin to the VON pin and VOUT. The values
required will depend on the parasitic resistances in the
specific application. A good starting point is to feed about
25% of the voltage change at the ITH pin to the VON pin as
shown in Figure 3a. Place capacitance on the VON pin to
filter out the ITH variations at the switching frequency. The
resistor load on ITH reduces the DC gain of the error amp
and degrades load regulation, which can be avoided by
using the PNP emitter follower of Figure 3b.
A reasonable starting point is to choose a ripple current
that is about 40% of IOUT(MAX). The largest ripple current
occurs at the highest VIN. To guarantee that ripple current
does not exceed a specified maximum, the inductance
should be chosen according to:
VOUT
f ∆IL(MAX)
VOUT
V
IN(MAX)
L =
1−
Once the value for L is known, the type of inductor must be
selected. A variety of inductors designed for high current,
low voltage applications are available from manufacturers
such as Sumida, Panasonic, Coiltronics, Coilcraft and
Toko.
R
VON1
30k
V
V
ON
OUT
C
VON
R
VON2
100k
0.01µF
LTC3778
TH
R
C
I
C
C
3778 F03a
Schottky Diode D1 Selection
(3a)
The Schottky diode D1 shown in Figure 1 conducts during
the dead time between the conduction of the power
MOSFET switches. It is intended to prevent the body diode
ofthebottomMOSFETfromturningonandstoringcharge
during the dead time, which can cause a modest (about
1%) efficiency loss. The diode can be rated for about one
half to one fifth of the full load current since it is on for only
a fraction of the duty cycle. In order for the diode to be
effective, the inductance between it and the bottom MOS-
FET must be as small as possible, mandating that these
components be placed adjacently. The diode can be omit-
ted if the efficiency loss is tolerable.
R
VON1
3k
V
V
ON
OUT
C
R
VON
VON2
10k
0.01µF
10k
LTC3778
TH
INTV
CC
R
C
Q1
2N5087
I
C
C
3778 F03b
(3b)
Figure 3. Correcting Frequency Shift with Load Current Changes
Inductor Selection
CIN and COUT Selection
Given the desired input and output voltages, the inductor
value and operating frequency determine the ripple
current:
The input capacitance CIN is required to filter the square
wave current at the drain of the top MOSFET. Use a low
ESR capacitor sized to handle the maximum RMS current.
VOUT
f L
VOUT
V
IN
∆IL =
1−
VOUT
V
IN
V
IN
VOUT
IRMS IOUT(MAX)
– 1
Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors and output voltage
ripple. Highest efficiency operation is obtained at low
frequency with small ripple current. However, achieving
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT(MAX)/2. This simple worst-case condition is
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commonly used for design because even significant
deviations do not offer much relief. Note that ripple
current ratings from capacitor manufacturers are often
basedononly2000hoursoflifewhichmakesitadvisable
to derate the capacitor.
anadditionalceramiccapacitorinparallelisrecommended
to reduce the effect of their lead inductance.
Top MOSFET Driver Supply (CB, DB)
AnexternalbootstrapcapacitorCBconnectedtotheBOOST
pinsuppliesthegatedrivevoltageforthetopsideMOSFET.
This capacitor is charged through diode DB from DRVCC
when the switch node is low. When the top MOSFET turns
on, the switch node rises to VIN and the BOOST pin rises
to approximately VIN + DRVCC. The boost capacitor needs
to store about 100 times the gate charge required by the
top MOSFET. In most applications a 0.1µF to 0.47µF, X5R
or X7R dielectric ceramic capacitor is adequate.
The selection of COUT is primarily determined by the ESR
required to minimize voltage ripple and load step
transients. The output ripple ∆VOUT is approximately
bounded by:
1
∆VOUT ≤ ∆IL ESR +
8fCOUT
Since ∆IL increases with input voltage, the output ripple is
highestatmaximuminputvoltage.Typically,oncetheESR
requirement is satisfied, the capacitance is adequate for
filtering and has the necessary RMS current rating.
Discontinuous Mode Operation and FCB Pin
The FCB pin determines whether the bottom MOSFET
remains on when current reverses in the inductor. Tying
this pin above its 0.6V threshold enables discontinuous
operation where the bottom MOSFET turns off when
inductor current reverses. The load current at which
inductor current reverses and discontinuous operation
begins depends on the amplitude of the inductor ripple
currentandwillvarywithchangesinVIN. TyingtheFCBpin
below the 0.6V threshold forces continuous synchronous
operation, allowing current to reverse at light loads and
maintaining high frequency operation.
Multiple capacitors placed in parallel may be needed to
meet the ESR and RMS current handling requirements.
Dry tantalum, special polymer, POSCAP aluminum elec-
trolytic and ceramic capacitors are all available in surface
mount packages. Special polymer capacitors offer very
low ESR but have lower capacitance density. Tantalum
capacitors have the highest capacitance density but it is
importanttoonlyusetypesthathavebeensurgetestedfor
use in switching power supplies. Aluminum electrolytic
capacitors have significantly higher ESR, but can be used
incost-sensitiveapplicationsprovidingthatconsideration
is given to ripple current ratings and long term reliability.
CeramiccapacitorshaveexcellentlowESRcharacteristics
but can have a high voltage coefficient and audible piezo-
electric effects. The high Q of ceramic capacitors with
traceinductancecanalsoleadtosignificantringing. When
usedasinputcapacitors,caremustbetakentoensurethat
ringing from inrush currents and switching does not pose
an overvoltage hazard to the power switches and control-
ler. When necessary, adding a small 5µF to 50µF alumi-
num electrolytic capacitor with an ESR in the range of
0.5Ω to 2Ω dampens input voltage transients. High per-
formance through-hole capacitors may also be used, but
In addition to providing a logic input to force continuous
operation, the FCB pin provides a means to maintain a
flyback winding output when the primary is operating in
discontinuous mode. The secondary output VOUT2 is nor-
mally set as shown in Figure 4 by the turns ratio N of the
transformer. However, if the controller goes into discon-
tinuous mode and halts switching due to a light primary
load current, then VOUT2 will droop. An external resistor
divider from VOUT2 to the FCB pin sets a minimum voltage
VOUT2(MIN) below which continuous operation is forced
until VOUT2 has risen above its minimum.
R4
R3
VOUT2(MIN) = 0.8V 1+
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To further limit current in the event of a short circuit to
ground, the LTC3778 includes foldback current limiting. If
the output falls by more than 50%, then the maximum
sense voltage is progressively lowered to about one sixth
of its full value.
V
IN
+
C
IN
V
IN
1N4148
V
V
TG
OUT2
•
OPTIONAL
+
LTC3778
EXTV
C
SEC
EXTV
CC
SW
1µF
CC
CONNECTION
OUT1
R4
R3
5V < V
< 7V
•
OUT2
T1
1:N
+
Minimum Off-time and Dropout Operation
C
OUT
FCB
The minimum off-time tOFF(MIN) is the smallest amount of
time that the LTC3778 is capable of turning on the bottom
MOSFET, tripping the current comparator and turning the
MOSFET back off. This time is generally about 250ns. The
minimum off-time limit imposes a maximum duty cycle of
tON/(tON +tOFF(MIN)).Ifthemaximumdutycycleisreached,
due to a dropping input voltage for example, then the
output will drop out of regulation. The minimum input
voltage to avoid dropout is:
BG
SGND
PGND
3778 F04
Figure 4. Secondary Output Loop and EXTVCC Connection
Fault Conditions: Current Limit and Foldback
The maximum inductor current is inherently limited in a
currentmodecontrollerbythemaximumsensevoltage.In
the LTC3778, the maximum sense voltage is controlled by
the voltage on the VRNG pin. With valley current control,
the maximum sense voltage and the sense resistance
determine the maximum allowed inductor valley current.
The corresponding output current limit is:
t
ON + tOFF(MIN)
V
= VOUT
IN(MIN)
tON
INTVCC Regulator
An internal P-channel low dropout regulator produces the
5V supply that powers the drivers and internal circuitry
within the LTC3778. The INTVCC pin can supply up to
50mA RMS and must be bypassed to ground with a
minimum of 4.7µF tantalum or other low ESR capacitor.
Good bypassing is necessary to supply the high transient
currents required by the MOSFET gate drivers. Applica-
tions using large MOSFETs with a high input voltage and
high frequency of operation may cause the LTC3778 to
exceed its maximum junction temperature rating or RMS
current rating. Most of the supply current drives the
MOSFET gates unless an external EXTVCC source is used.
VSNS(MAX)
(RDS(ON) ρT )* 2
1
ILIMIT
=
+ ∆IL
The current limit value should be checked to ensure that
ILIMIT(MIN) >IOUT(MAX).Theminimumvalueofcurrentlimit
generallyoccurswiththelowestVIN atthehighestambient
temperature. Note that it is important to check for self-
consistency between the assumed MOSFET junction tem-
perature and the resulting value of ILIMIT which heats the
MOSFET switches.
Caution should be used when setting the current limit
based upon the RDS(ON) of the MOSFETs. The maximum
current limit is determined by the minimum MOSFET on-
resistance. Data sheets typically specify nominal and
maximum values for RDS(ON), but not a minimum. A
reasonable assumption is that the minimum RDS(ON) lies
the same amount below the typical value as the maximum
liesaboveit.ConsulttheMOSFETmanufacturerforfurther
guidelines.
In continuous mode operation, this current is IGATECHG
=
f(Qg(TOP) + Qg(BOT)). The junction temperature can be
estimated from the equations given in Note 2 of the
Electrical Characteristics. For example, the LTC3778EF is
limited to less than 15mA from a 30V supply:
TJ = 70°C + (15mA)(30V)(110°C/W) = 120°C
Forlargercurrents, considerusinganexternalsupplywith
the DRVCC pin.
+
–
*Use R
.
value here if a sense resistor is connected between SENSE and SENSE
SENSE
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EXTVCC Connection
Soft-Start and Latchoff with the RUN/SS Pin
The EXTVCC pin can be used to provide MOSFET gate drive
and control power from the output or another external
source during normal operation. Whenever the EXTVCC
pin is above 4.7V the internal 5V regulator is shut off and
an internal 50mA P-channel switch connects the EXTVCC
pintoINTVCC.INTVCC powerissuppliedfromEXTVCC until
this pin drops below 4.5V. Do not apply more than 7V to
the EXTVCC pin and ensure that EXTVCC ≤ VIN. The follow-
ing list summarizes the possible connections for EXTVCC:
The RUN/SS pin provides a means to shut down the
LTC3778 as well as a timer for soft-start and overcurrent
latchoff. Pulling the RUN/SS pin below 0.8V puts the
LTC3778 into a low quiescent current shutdown (IQ <
30µA). Releasing the pin allows an internal 1.2µA current
source to charge up the external timing capacitor CSS. If
RUN/SS has been pulled all the way to ground, there is a
delay before starting of about:
1.5V
1. EXTVCC grounded. INTVCC is always powered from the
internal 5V regulator.
tDELAY
=
CSS = 1.3s/µF CSS
(
)
1.2µA
2. EXTVCC connected to an external supply. A high effi-
ciency supply compatible with the MOSFET gate drive
requirements (typically 5V) can improve overall
efficiency.
When the voltage on RUN/SS reaches 1.5V, the LTC3778
begins operating with a clamp on ITH of approximately
0.9V. As the RUN/SS voltage rises to 3V, the clamp on ITH
is raised until its full 2.4V range is available. This takes an
additional 1.3s/µF, during which the load current is folded
backuntiltheoutputreaches50%ofitsfinalvalue. Thepin
can be driven from logic as shown in Figure 6. Diode D1
reduces the start delay while allowing CSS to charge up
slowly for the soft-start function.
3. EXTVCC connected to an output derived boost network.
The low voltage output can be boosted using a charge
pump or flyback winding to greater than 4.7V. The system
will start-up using the internal linear regulator until the
boosted output supply is available.
After the controller has been started and given adequate
time to charge up the output capacitor, CSS is used as a
short-circuit timer. After the RUN/SS pin charges above
4V, if the output voltage falls below 75% of its regulated
value, then a short-circuit fault is assumed. A 1.8µA cur-
rent then begins discharging CSS. If the fault condition
persists until the RUN/SS pin drops to 3.5V, then the con-
troller turns off both power MOSFETs, shutting down the
converter permanently. The RUN/SS pin must be actively
pulled down to ground in order to restart operation.
External Gate Drive Buffers
The LTC3778 drivers are adequate for driving up to about
60nC into MOSFET switches with RMS currents of 50mA.
Applications with larger MOSFET switches or operating at
frequencies requiring greater RMS currents will benefit
fromusingexternalgatedrivebufferssuchastheLTC1693.
Alternately, the external buffer circuit shown in Figure 5
can be used. Note that the bipolar devices reduce the
signal swing at the MOSFET gate, and benefit from an
increased EXTVCC voltage of about 6V.
The overcurrent protection timer requires that the soft-
start timing capacitor CSS be made large enough to guar-
antee that the output is in regulation by the time CSS has
reachedthe4Vthreshold.Ingeneral,thiswilldependupon
the size of the output capacitance, output voltage and load
currentcharacteristic.Aminimumsoft-startcapacitorcan
be estimated from:
BOOST
DRV
CC
Q1
Q3
FMMT619
FMMT619
GATE
OF M1
10Ω
10Ω
GATE
OF M2
TG
BG
Q2
Q4
FMMT720
FMMT720
SW
PGND
3778 F05
CSS > COUT VOUT RSENSE (10–4 [F/V s])
Figure 5. Optional External Gate Driver
Generally 0.1µF is more than sufficient.
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Overcurrent latchoff operation is not always needed or
desired. Load current is already limited during a short-
circuit by the current foldback circuitry and latchoff
operation can prove annoying during troubleshooting.
The feature can be overridden by adding a pull-up current
greater than 5µA to the RUN/SS pin. The additional
current prevents the discharge of CSS during a fault and
also shortens the soft-start period. Using a resistor to VIN
as shown in Figure 6a is simple, but slightly increases
shutdown current. Connecting a resistor to INTVCC as
shown in Figure 6b eliminates the additional shutdown
current, but requires a diode to isolate CSS . Any pull-up
network must be able to maintain RUN/SS above the 4V
maximum latch-off threshold and overcome the 4µA
maximum discharge current.
with the resistances of L and the board traces to obtain the
DC I2R loss. For example, if RDS(ON) = 0.01Ω and
RL = 0.005Ω, the loss will range from 15mW to 1.5W
as the output current varies from 1A to 10A for a 1.5V
output.
2. Transition loss. This loss arises from the brief amount
of time the top MOSFET spends in the saturated region
during switch node transitions. It depends upon the input
voltage, load current, driver strength and MOSFET capaci-
tance, among other factors. The loss is significant at input
voltages above 20V and can be estimated from:
Transition Loss (1.7A–1) VIN IOUT CRSS
f
2
3. INTVCC current. This is the sum of the MOSFET driver
and control currents. This loss can be reduced by supply-
ing INTVCC current through the EXTVCC pin from a high
efficiency source, such as an output derived boost net-
work or alternate supply if available.
INTV
CC
R *
SS
V
IN
RUN/SS
3.3V OR 5V
RUN/SS
*
D2*
R
SS
4. CIN loss. The input capacitor has the difficult job of
filtering the large RMS input current to the regulator. It
must have a very low ESR to minimize the AC I2R loss and
sufficient capacitance to prevent the RMS current from
causing additional upstream losses in fuses or batteries.
D1
2N7002
C
SS
C
SS
3778 F06
*OPTIONAL TO OVERRIDE OVERCURRENT LATCHOFF
(6a)
(6b)
Other losses, including COUT ESR loss, Schottky diode D1
conduction loss during dead time and inductor core loss
generally account for less than 2% additional loss.
Figure 6. RUN/SS Pin Interfacing with Latchoff Defeated
Efficiency Considerations
When making adjustments to improve efficiency, the
input current is the best indicator of changes in efficiency.
Ifyoumakeachangeandtheinputcurrentdecreases,then
the efficiency has increased. If there is no change in input
current, then there is no change in efficiency.
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Although all dissipative
elements in the circuit produce losses, four main sources
account for most of the losses in LTC3778 circuits:
1. DC I2R losses. These arise from the resistances of the
sense resistor, MOSFETs, inductor and PC board traces
and cause the efficiency to drop at high output currents. In
continuousmodetheaverageoutputcurrentflowsthrough
L, but is chopped between the top and bottom MOSFETs.
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ∆ILOAD (ESR), where ESR is the effective series
resistance of COUT. ∆ILOAD also begins to charge or
dischargeCOUT generatingafeedbackerrorsignalusedby
the regulator to return VOUT to its steady-state value.
IfthetwoMOSFETshaveapproximatelythesameRDS(ON)
thentheresistanceofoneMOSFETcansimplybesummed
,
3778f
16
LTC3778
W U U
APPLICATIO S I FOR ATIO
U
During this recovery time, VOUT can be monitored for
overshoot or ringing that would indicate a stability prob-
lem. The ITH pin external components shown in Figure 7
will provide adequate compensation for most applica-
tions. For a detailed explanation of switching control loop
theory see Linear Technology Application Note 76.
146mV
1
2
ILIMIT
≥
+
5.1A = 12A
(
)
1.5 0.010Ω
(
)(
)
and double check the assumed TJ in the MOSFET:
2
28V –2.5V
PBOT
=
12A 1.5 0.010Ω = 1.97W
Design Example
28V
As a design example, take a supply with the following
specifications:VIN =7Vto28V(15Vnominal), VOUT =2.5V
±5%, IOUT(MAX) = 10A, f = 250kHz. First, calculate the
TJ = 70°C + (1.97W)(40°C/W) = 149°C
Because the top MOSFET is on for such a short time, an
Si4884 RDS(ON)(MAX) = 0.0165Ω, CRSS = 100pF will be
sufficient. Checking its power dissipation at current limit
with ρ100°C = 1.4:
timing resistor with VON = VOUT
:
1
RON
=
= 400kΩ
250kHz 10pF
(
)(
)
2
2.5V
28V
PTOP
=
12A 1.4 0.0165Ω +
(
) ( )(
)
and choose the inductor for about 40% ripple current at
the maximum VIN:
2
1.7 28V 12A 100pF 250kHz
(
)(
) (
)(
)(
)
= 0.30W + 0.40W = 0.7W
2.5V
2.5V
28V
L =
1−
= 2.3µH
250kHz 0.4 10A
(
)( )(
)
TJ = 70°C + (0.7W)(40°C/W) = 98°C
The junction temperatures will be significantly less at
nominal current, but this analysis shows that careful
attention to heat sinking will be necessary in this circuit.
Selecting a standard value of 1.8µH results in a maximum
ripple current of:
2.5V
2.5V
28V
CIN is chosen for an RMS current rating of about 5A at
85°C. The output capacitors are chosen for a low ESR of
0.013Ω to minimize output voltage changes due to induc-
tor ripple current and load steps. The ripple voltage will be
only:
∆IL =
1–
= 5.1A
250kHz 1.8µH
(
)(
)
Next, choose the synchronous MOSFET switch. Choosing
a Si4874 (RDS(ON) = 0.0083Ω (NOM) 0.010Ω (MAX),
θJA = 40°C/W) yields a nominal sense voltage of:
∆VOUT(RIPPLE) = ∆IL(MAX) (ESR)
= (5.1A) (0.013Ω) = 66mV
VSNS(NOM) = (10A)(1.3)(0.0083Ω) = 108mV
However, a 0A to 10A load step will cause an output
change of up to:
TyingVRNG to1.1V willsetthecurrentsensevoltagerange
for a nominal value of 110mV with current limit occurring
at 146mV. To check if the current limit is acceptable,
assume a junction temperature of about 80°C above a
70°C ambient with ρ150°C = 1.5:
∆VOUT(STEP) =∆ILOAD (ESR)=(10A)(0.013Ω)=130mV
An optional 22µF ceramic output capacitor is included to
minimize the effect of ESL in the output ripple. The
complete circuit is shown in Figure 7.
3778f
17
LTC3778
APPLICATIO S I FOR ATIO
W U U
U
C
SS
0.1µF
D
B
CMDSH-3
LTC3778
20
19
18
17
16
15
14
13
12
11
1
2
V
IN
RUN/SS BOOST
5V TO 28V
C
IN
C
B
10µF
35V
×3
0.22µF
M1
V
TG
ON
Si4884
R
PG
100k
V
2.5V
10A
OUT
R3
11k
R4
3
L1, 1.8µH
PGOOD
SW
+
39k
4
V
SENSE
C
RNG
C1
500pF
R
C
20k
5
–
I
SENSE
TH
C
C
OUT3
OUT1-2
+
180µF
4V
22µF
6.3V
X7R
6
M2
Si4874
D1
B340A
FCB
PGND
BG
×2
C
C2
100pF
7
SGND
C
, 0.01µF
ON
8
C
VCC
4.7µF
I
DRV
INTV
ON
CC
CC
+
R1
12.7k
9
V
FB
R
R
F
ON
400k
1Ω
10
EXTV
V
IN
CC
R2
40.2k
C
F
0.1µF
3778 F07
C
C
: UNITED CHEMICON THCR60EIHI06ZT
IN
: CORNELL DUBILIER ESRE181E04B
OUT1-2
L1: SUMIDA CEP125-1R8MC-H
Figure 7. Design Example: 2.5V/10A at 250kHz
Active Voltage Positioning
By positioning the output voltage at the regulation point at
noload, itwilldrop100mVbelowtheregulationpointafter
the load step. However, when the load disappears or the
outputissteppedfrom20Ato0A, the100mVisrecovered.
This way, a total of 100mV change is observed on VOUT in
all conditions, whereas a total of ±100mV or 200mV is
seen on VOUT without voltage positioning while using only
three output capacitors.
Active voltage positioning (also termed load “deregula-
tion” or droop) describes a technique where the output
voltage varies with load in a controlled manner. It is useful
in applications where rapid load steps are the main cause
of error in the output voltage. By positioning the output
voltage at or above the regulation point at zero load, and
below the regulation point at full load, one can use more
of the error budget for the load step. This allows one to
reduce the number of output capacitors by relaxing the
ESR requirement.
Implementingactivevoltagepositioningrequiressettinga
precise gain between the sensed current and the output
voltage. Because of the variability of MOSFET on-resis-
tance, it is prudent to use a sense resistor with active
voltage positioning. In order to minimize power lost in this
resistor, a low value of 0.002Ω is chosen. The nominal
sense voltage will now be:
For example, in a 20A application, six 0.015Ω capacitors
are required in parallel to keep the output voltage within a
100mV tolerance:
1
6
VSNS(NOM) = (0.002Ω)(20A) = 40mV
±20A
0.015Ω = ±50mV = 100mV
(
)
To maintain a reasonable current limit, the voltage on the
VRNG pin is reduced to 0.5V by connecting it to a resistor
divider from INTVCC, corresponding to a 50mV nominal
sense voltage.
Using active voltage positioning, the same specification
canbemetwithonlythreecapacitors.Inthiscase,theload
step will cause an output voltage change of:
Next, the gain of the LTC3778 error amplifier must be
determined. ThechangeinITH voltageforacorresponding
change in the output current is:
1
∆VOUT(STEP) = 20A
0.015Ω = 100mV
(
)
(
)
3
3778f
18
LTC3778
W U U
APPLICATIO S I FOR ATIO
U
these resistors must equal RVP and their ratio determines
nominal value of the ITH pin voltage when the error
amplifier input is zero. To set the beginning of the load line
at the regulation point, the ITH pin voltage must be set to
correspond to zero output current. The relation between
voltage and the output current is:
12V
VRNG
∆ITH
=
RSENSE ∆IOUT
= 24 0.002Ω 20A = 0.96V
( )(
)(
)
The corresponding change in the output voltage is deter-
mined by the gain of the error amplifier and feedback
divider. The LTC3778 error amplifier has a transcon-
ductance gm that is constant over both temperature and a
wide ± 40mV input range. Thus, by connecting a load
resistance RVP to the ITH pin, the error amplifier gain can
be precisely set for accurate voltage positioning.
12V
VRNG
1
2
1
ITH(NOM)
=
=
RSENSE OUT
I
– ∆IL + 0.75V
12V
0.5V
0.002Ω 0A – 5.8A + 0.75V
(
)
2
= 0.61V
0.6V
VOUT
∆ITH = gmRVP
∆VOUT
Solving for the required values of the resistors:
Solving for this resistance value:
5V
5V
RVP1
=
RVP
=
15.7k
5V – ITH(NOM)
5V – 0.61V
VOUT ∆ITH
RVP
=
=
= 18k
(0.6V)gm ∆VOUT
(1.25V)(0.96V)
5V
ITH(NOM)
5V
RVP2
=
RVP
=
15.7k = 129k
= 15.7k
0.61V
(0.6V)(1.7mS)(75mV)
The active voltage positioned circuit is shown in Figure 8.
Refer to Linear Technology Design Solutions 10 for addi-
tional information about output voltage positioning.
The gain setting resistance RVP is implemented with two
resistors, RVP1 connected from ITH to ground and RVP2
connectedfromITH toINTVCC. Theparallelcombinationof
C
SS
0.1µF
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
V
IN
RUN/SS BOOST
LTC3778
7V TO 24V
C
IN
D
B
M1
IRF7811
×2
22µF
50V
×3
CMDSH-3
L1
V
ON
TG
0.68µH
V
R
RNG1
R
R
PG
100k
C
B
OUT
RNG2
1.25V
20A
4.99k 45.3k
0.33µF
PGOOD
SW
+
M2
IRF7811
×3
D1
UPS840
C
OUT
C
V
RNG
SENSE
C1
R
20k
R
VP2
270µF
2V
2.2nF
C
129k
–
I
TH
SENSE
×3
C
C1
100pF
R
SENSE
0.002Ω
R
VP1
FCB
PGND
BG
18k
SGND
C
0.01µF
C
ION
VCC
4.7µF
I
DRV
INTV
ON
CC
CC
11.7k
V
FB
R
1Ω
F
12.7k
10
C
FB
100pF
R
ON
330k
5V
EXTV
V
IN
CC
C
C
: UNITED CHEMICON
THCR70EIH226ZT
: PANASONIC EEFUE0D271
L1: SUMIDA CEP125-4712-T007
IN
C
F
0.1µF
OUT
3778 F08
Figure 8. CPU Core Voltage Regulator with Active Voltage Positioning 1.25V/20A at 300kHz
3778f
19
LTC3778
W U U
U
APPLICATIO S I FOR ATIO
•
Use an immediate via to connect the components to
ground plane including SGND and PGND of LTC3778.
Use several bigger vias for power components.
PC Board Layout Checklist
When laying out a PC board follow one of the two sug-
gested approaches. The simple PC board layout requires
a dedicated ground plane layer. Also, for higher currents,
it is recommended to use a multilayer board to help with
heat sinking power components.
• Use compact plane for switch node (SW) to improve
cooling of the MOSFETs and to keep EMI down.
• Use planes for VIN and VOUT to maintain good voltage
filtering and to keep power losses low.
• The ground plane layer should not have any traces and
it should be as close as possible to the layer with power
MOSFETs.
• Flood all unused areas on all layers with copper. Flood-
ing with copper will reduce the temperature rise of
powercomponent.Youcanconnectthecopperareasto
any DC net (VIN, VOUT, GND or to any other DC rail in
your system).
• Place CIN, COUT, MOSFETs, D1 and inductor all in one
compactarea.Itmayhelptohavesomecomponentson
the bottom side of the board.
When laying out a printed circuit board, without a ground
plane, use the following checklist to ensure proper opera-
tion of the controller. These items are also illustrated in
Figure 9.
• Place LTC3778 chip with pins 11 to 20 facing the power
components. Keep the components connected to pins
1 to 9 close to LTC3778 (noise sensitive components).
C
C
B
SS
LTC3778
L
20
19
18
17
16
15
14
13
12
11
1
2
RUN/SS BOOST
V
TG
SW
ON
D
B
3
PGOOD
+
M1
4
V
SENSE+
SENSE–
PGND
BG
RNG
C
C1
R
C
5
I
TH
C
IN
D1
6
C
FCB
C2
V
IN
7
M2
SGND
C
ION
8
I
ON
DRV
INTV
CC
CC
C
FB
C
VCC
–
–
9
V
FB
R1
10
V
OUT
C
EXTV
V
IN
C
OUT
CC
F
+
R
F
R
ON
R2
3778 F10
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 9. LTC3778 Layout Diagram
3778f
20
LTC3778
W U U
APPLICATIO S I FOR ATIO
U
• Segregate the signal and power grounds. All small
signal components should return to the SGND pin at
onepointwhichisthentiedtothePGNDpinclosetothe
source of M2.
• Keep the high dV/dT SW, BOOST and TG nodes away
from sensitive small-signal nodes.
• Connect the INTVCC decoupling capacitor CVCC closely
to the INTVCC and PGND pins.
• Place M2 as close to the controller as possible, keeping
the PGND, BG and SW traces short.
• Connect the top driver boost capacitor CB closely to the
BOOST and SW pins.
• Connect the input capacitor(s) CIN close to the power
MOSFETs. This capacitor carries the MOSFET AC cur-
rent.
• Connect the VIN pin decoupling capacitor CF closely to
the VIN and PGND pins.
U
TYPICAL APPLICATIO S
an offset to the SENSE– pin so that the current limit is
symmetrical during both sink and source.
Figure10showsaDDRmemoryterminationapplicationin
which the output can sink and source up to 6A of current.
The resistive divider of R1 and R2 are meant to introduce
V
IN
5V TO 25V
C
SS
D
B
0.1µF
CMDSH-3
LTC3778
C
330µF
IN
20
19
18
17
16
15
14
13
12
11
1
2
3
10µF
35V
×3
25V,
RUN/SS BOOST
SANYO
C
B
ELECTROLYTIC
0.22µF
M1
V
TG
ON
IRF7811
V
R
OUT
PG
1.25V
100k
L1, 1.8µH
±6A
PGOOD
SW
+
4
5
C
OUT1-2
V
SENSE
RNG
+
C
C1
1500pF
180µF
4V
R
R1
1.2k
C
20k
–
I
SENSE
×2
TH
C
OUT3
C
R2
68Ω
C2
22µF
6.3V
X7R
100pF
M2
IRF7811
6
7
D1
B340A
FCB
PGND
BG
SGND
C
, 0.01µF
ON
8
C
VCC
4.7µF
I
DRV
INTV
ON
CC
CC
+
R1
12.7k
9
V
FB
R
R
ON
F
1Ω
227k
10
EXTV
V
IN
CC
R2
11.7k
C
F
0.1µF
3778 F11
C
C
: UNITED CHEMICON THCR60EIHI06ZT
IN
: CORNELL DUBILIER ESRE181E04B
OUT1-2
L1: SUMIDA CEP125-1R8MC-H
Figure 10. 1.25V/±6A Sink and Source at 550kHz
3778f
21
LTC3778
TYPICAL APPLICATIO S
U
Intel Compatible Tualatin Mobile CPU Power Supply with AVP
3
2
3
2
V
RON
2
Q2
Q1
1
1
1
3.3V
2N7002
R1
100k
2N7002
R3
OPT
R2
100k
V
IN
INTV
CC
V
IN
7.5V
C1, 0.01µF
CIN
10µF
35V
×4
SGND
PGND
TO 24V
2
+
1
QT
R16
0
D1
C2, 0.01µF
IRF7811A
LTC3778E
RUN/SS BOOST
CMDSH-3
1
2
20
19
18
17
16
15
14
13
12
11
×2
R4
2k
R5
100Ω
R6
1k
R8
1k
C10
L1
0.22µF
0.68µH
V
V
TG
OUT
ON
SUMIDA
PWRGOOD
3
Q3
CEP125-4712F011
1
3
V
CORE
PGOOD
SW
+
1.35V/1.15V/0.85V
23A
MMMT3906-7
R10
3.2k
C7
1
3
2
1µF
4
D2
UPS840
1
Q6
MMBT3904-7
V
RNG
SENSE
QB
6.3V
0603
R13
10k
IRF7811A
R14
10k
2
COUT
×3
5
–
+
I
TH
SENSE
270µF
C8, 0.1µF
2V, SP
2
3
6
×4
FCB
PGND
BG
R15
20k
R21
C9, 220pF
0.003Ω
7
SGND
C11, 220pF
8
I
ON
DRV
INTV
CC
CC
R17
R23
1Ω
C21
1µF
24.9k, 1%
9
V
FB
R18
221k, 1%
10
EXTV
V
IN
CC
C19
4.7µF
16V
R7
1Ω
C41, 1µF C42, 1µF
V
R41
0
IN
5V
R19
330k
R9
221k
1%
3.3V
V
IN
C18, 1000pF
R29
12.1k
R33
100k
DPSLP#
3
2
R49*
178k
1%
R30
11.8k
1%
R34
33.2k
1%
R31
10k
1%
2
1
1
Q13
V
CORE
2N7002
R37
100k
3.3V
3
R28
Q19*
2N7002
1
3
2
3
1
100k
R11
9.76k
1%
1
Q15
2N7002
Q14
2N7002
2
3
Q17
DPRSLPVR
GMUXSEL
3
R38
1M
2
2N7002
3
1
Q20*
2N7002
2
R39
1M
Q12
1
1
2N7002
2
2
*OPTIONAL
3778 F12
3778f
22
LTC3778
U
PACKAGE DESCRIPTIO
F Package
20-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1650)
6.40 – 6.60*
(.252 – .260)
20 19 18 17 16 15 14 13 12 11
6.25 – 6.50
(.246 – .256)
5
7
8
1
2
3
4
6
9 10
1.10
(.0433)
MAX
4.30 – 4.48**
(.169 – .176)
0° – 8°
.65
(.0256)
BSC
.50 – .70
(.020 – .028)
.09 – .18
(.0035 – .0071)
.05 – .15
(.002 – .006)
.18 – .30
(.0071 – .0118)
F20 TSSOP 0501
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
MILLIMETERS
2. DIMENSIONS ARE IN
(INCHES)
3. DRAWING NOT TO SCALE
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED .152mm (.006") PER SIDE
**DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE
3778f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection ofits circuits as described herein willnotinfringe on existing patentrights.
23
LTC3778
U
TYPICAL APPLICATIO
12V/5A at 300kHz
C
D
B
CMDSH-3
SS
LTC3778
0.1µF
1
2
20
19
18
17
16
15
14
13
12
11
V
IN
14V TO 28V
RUN/SS BOOST
C
C
IN
B
22µF
0.22µF
100k
V
TG
M1
M2
ON
50V
3
L1
10µH
PGOOD
SW
+
V
12V
5A
OUT
4
V
I
SENSE
RNG
5
–
+
C
OUT
SENSE
TH
220µF
R
C
6
C
D1
C
C1
16V
C2
20k
FCB
PGND
BG
2.2nF
100pF
7
SGND
C
8
VCC
4.7µF
I
DRV
INTV
ON
CC
CC
R1
10k
+
9
V
FB
10
R2
190k
R
ON
1.6M
EXTV
V
IN
CC
C
F
R
1Ω
F
0.1µF
C2
2200pF
3778 TA01
C
C
: UNITED CHEMICON THCR70E1H226ZT
IN
: SANYO 16SV220M
OUT
D1: DIODES, INC B340A
L1: SUMIDA CDRH127-100
M1, M2: FAIRCHILD FDS6680A
RELATED PARTS
PART NUMBER
LTC1622
DESCRIPTION
550kHz Step-Down Controller
No R
TM Current Mode Synchronous Step-Down Controller
COMMENTS
8-Pin MSOP; Synchronizable; Soft-Start; Current Mode
97% Efficiency; No Sense Resistor; 16-Pin SSOP
LTC1625/LTC1775
SENSE
LTC1628-PG/
LTC1628-SYNC
Dual, 2-Phase Synchronous Step-Down Controller
Minimum Input/Output Capacitors; 3.5V ≤ V ≤ 36V;
Power Good Output; Synchronizable 150kHz to 300kHz
IN
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with 5-Bit VID
Up to 42A Output; 0.925V ≤ V
≤ 2V
OUT
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LTC1735
High Efficiency, 2-Phase Synchronous Step-Down Controller
High Efficiency, Synchronous Step-Down Controller
Up to 42A Output; VRM 8.4; 1.3V ≤ V
≤ 3.5V
OUT
Burst ModeTM Operation; 16-Pin Narrow SSOP;
3.5V ≤ V ≤ 36V
IN
LTC1736
LTC1772
LTC1773
High Efficiency, Synchronous Step-Down Controller with 5-Bit VID Mobile VID; 0.925V ≤ V
≤ 2V; 3.5V ≤ V ≤ 36V
OUT IN
ThinSOTTM Step-Down Controller
Current Mode; 550kHz; Very Small Solution Size
Up to 95% Efficiency, 550kHz, 2.65V ≤ V ≤ 8.5V,
Synchronous Step-Down Controller
IN
0.8V ≤ V
≤ V , Synchronizable to 750kHz
OUT
IN
LTC1778
LTC1876
Wide Operating Range, No R
Step-Down Controller
GN16-Pin, 0.8V FB Reference
SENSE
2-Phase, Dual Synchronous Step-Down Controller with
Step-Up Regulator
3.5V ≤ V ≤ 36V, Power Good Output, 300kHz Operation
IN
LTC3701
Dual, 2-Phase Step-Down Controller
Current Mode; 300kHz to 750kHz; Small 16-Pin SSOP,
2.5V ≤ V ≤ 9.8V
IN
LTC3711
LTC3713
5-Bit Adjustable, No R
Step-Down Controller
0.925V ≤ V
≤ 2V; Mobile VIC Code
SENSE
OUT
Very Low V , High Current Step-Down Synchronous Controller
1.5V ≤ V , I
≤ 20A, Generates its own 5V Gate Drive,
IN
IN OUT
Uses Standard N-Channel MOSFETs
LTC3714
LTC3716
Intel Compatible, Wide Operating Range, No R
Controller with Internal Op Amp
Step-Down
SENSE
G28 Package, V = 0.6V to 1.75V 5-Bit Mobile VID,
OUT
Active Voltage Positioning I , V to 36V
MVP2 IN
High Efficiency, 2-Phase Synchronous Step-Down Controller
with 5-Bit Mobile VID
V
V
= 0.6V to 1.75V, Active Voltage Positioning I
to 36V
,
OUT
MVP2
IN
Burst Mode and ThinSOT are trademarks of Linear Technology Corporation.
3778f
LT/TP 0702 2K • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
24
●
●
LINEAR TECHNOLOGY CORPORATION 2001
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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