LTC3809EMS-1 [Linear]
IC 1 A SWITCHING CONTROLLER, 600 kHz SWITCHING FREQ-MAX, PDSO10, PLASTIC, MSOP-10, Switching Regulator or Controller;
| 型号： | LTC3809EMS-1 |
| 厂家： | 
Linear |
| 描述： | IC 1 A SWITCHING CONTROLLER, 600 kHz SWITCHING FREQ-MAX, PDSO10, PLASTIC, MSOP-10, Switching Regulator or Controller 开关 光电二极管 |
| 文件： | 总24页 (文件大小：318K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3809-1
No RSENSETM, Low Input
Voltage, Synchronous DC/DC
Controller with Output Tracking
U
DESCRIPTIO
FEATURES
The LTC®3809-1 is a synchronous step-down switching
regulator controller that drives external complementary
power MOSFETs using few external components. The
constantfrequencycurrentmodearchitecturewithMOSFET
VDS sensing eliminates the need for a current sense
resistor and improves efficiency.
■
Programmable Output Voltage Tracking
■
No Current Sense Resistor Required
■
Constant Frequency Current Mode Operation for
Excellent Line and Load Transient Response
■
Wide VIN Range: 2.75V to 9.8V
■
Wide VOUT Range: 0.6V to VIN
■
0.6V ±1.5% Reference
Optional Burst Mode operation provides high efficiency
operation at light loads. 100% duty cycle provides low
dropout operation, extending operating time in battery-
powered systems. Burst Mode is inhibited when the
MODE pin is pulled low to reduce noise and RF interfer-
ence.
■
Low Dropout Operation: 100% Duty Cycle
Selectable Burst Mode®/Pulse Skipping/Forced
■
Continuous Operation
■
Auxiliary Winding Regulation
■
Internal Soft-Start Circuitry
■
Selectable Maximum Peak Current Sense Threshold
■
Output Overvoltage Protection
The LTC3809-1 allows either coincident or ratiometric
output voltage tracking. Switching frequency is fixed at
550kHz. Fault protection is provided by an overvoltage
comparator and a short-circuit current limit comparator.
■
Micropower Shutdown: IQ = 9µA
■
Tiny Thermally Enhanced Leadless (3mm × 3mm)
DFN or 10-lead MSOP Package
U
The LTC3809-1 is available in the tiny footprint thermally
enhanced DFN package or 10-lead MSOP package.
, LTC and LT are registered trademarks of Linear Technology Corporation. Burst Mode
APPLICATIO S
■
One- or Two-Cell Lithium-Ion Powered Devices
is a registered trademark of Linear Technology Corporation. No R
is a trademark of
■
SENSE
Notebook and Palmtop Computers, PDAs
Linear Technology Corporation. All other trademarks are the property of their respective
owners. Protected by U.S. Patents including 5481178, 5929620, 6580258, 6304066,
5847554, 6611131, 6498466. Other Patents pending.
■
Portable Instruments
Distributed DC Power Systems
■
U
TYPICAL APPLICATIO
Efficiency and Power Loss vs Load Current
High Efficiency, 550kHz Step-Down Converter
100
90
80
70
60
50
10k
V
EFFICIENCY
IN
2.75V TO 9.8V
V
= 3.3V
IN
10µF
1k
V
IN
IPRG
V
IN
= 4.2V
V
= 5V
IN
MODE
100
10
TG
59k
LTC3809-1
2.2µH
47µF
V
OUT
V
FB
TYPICAL POWER
LOSS (V = 4.2V)
SW
BG
2.5V
2A
15k
IN
I
TH
187k
RUN
470pF
1
GND
FIGURE 8 CIRCUIT
V
OUT
= 2.5V
38091 TA01
0.1
10k
1
10
100
1k
LOAD CURRENT (mA)
38091 TA02
38091f
1
LTC3809-1
W W U W
ABSOLUTE AXI U RATI GS (Note 1)
Input Supply Voltage (VIN)........................ –0.3V to 10V Storage Ambient Temperature Range
RUN, TRACK/SS, MODE,
IPRG Voltages .............................. –0.3V to (VIN + 0.3V)
VFB, ITH Voltages...................................... –0.3V to 2.4V Junction Temperature (Note 3)............................ 125°C
SW Voltage ......................... –2V to VIN + 1V (10V Max) Lead Temperature (Soldering, 10 sec)
DFN .................................................. –65°C to 125°C
MSOP ............................................... –65°C to 150°C
TG, BG Peak Output Current (<10µs)........................ 1A
Operating Temperature Range (Note 2)... – 40°C to 85°C
MSOP Package ................................................. 300°C
U
W
U
PACKAGE/ORDER I FOR ATIO
TOP VIEW
ORDER PART
NUMBER
ORDER PART
NUMBER
TOP VIEW
MODE
1
2
3
4
5
10 SW
MODE
1
2
3
4
5
10 SW
TRACK/SS
9
8
7
6
V
IN
LTC3809EDD-1
LTC3809EMS-1
TRACK/SS
9
8
7
6
V
IN
11
V
I
TG
FB
V
TG
11
FB
BG
I
BG
IPRG
TH
TH
RUN
RUN
IPRG
DD PART
MARKING
MS PART
MARKING
MS PACKAGE
10-LEAD PLASTIC MSOP
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 130°C/W
LBQZ
TJMAX = 125°C, θJA = 37°C/W
EXPOSED PAD (PIN 11) IS GND
(MUST BE SOLDERED TO PCB)
EXPOSED PAD (PIN 11) IS GND
(MUST BE SOLDERED TO PCB)
LTBQV
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 4.2V unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Main Control Loops
Input DC Supply Current
Normal Operation
Sleep Mode
Shutdown
UVLO
(Note 4)
350
105
9
500
150
20
µA
µA
µA
µA
RUN = 0V
V
IN
= UVLO Threshold –200mV
9
20
Undervoltage Lockout Threshold (UVLO)
V
IN
V
IN
Falling
Rising
●
●
1.95
2.15
2.25
2.45
2.55
2.75
V
V
Shutdown Threshold of RUN Pin
Start-Up Current Source
0.8
0.65
0.591
1.1
1
1.4
1.35
0.609
0.04
V
µA
TRACK/SS = 0V
(Note 5)
Regulated Feedback Voltage
Output Voltage Line Regulation
Output Voltage Load Regulation
●
0.6
0.01
V
2.75V < V < 9.8V (Note 5)
%/V
IN
I
I
= 0.9V (Note 5)
= 1.7V
0.1
–0.1
0.5
–0.5
%
%
TH
TH
V
Input Current
(Note 5)
9
50
nA
V
FB
Overvoltage Protect Threshold
Measured at V
0.66
0.68
0.7
FB
38091f
2
LTC3809-1
ELECTRICAL CHARACTERISTICS
The ● indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 4.2V unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
20
MAX
UNITS
mV
V
Overvoltage Protect Hysteresis
Auxiliary Feedback Threshold
Top Gate (TG) Drive Rise Time
Top Gate (TG) Drive Fall Time
Bottom Gate (BG) Drive Rise Time
Bottom Gate (BG) Drive Fall Time
Maximum Current Sense Voltage (∆V
0.325
0.4
40
0.475
C = 3000pF
L
ns
C = 3000pF
L
40
ns
C = 3000pF
L
50
ns
C = 3000pF
L
40
ns
)
IPRG = Floating (Note 6)
IPRG = 0V (Note 6)
●
●
●
110
70
185
125
85
204
140
100
223
mV
mV
mV
SENSE(MAX)
+
(SENSE – SW)
IPRG = V (Note 6)
IN
Soft-Start Time (Internal)
Oscillator Frequency
Time for V to Ramp from 0.05V to 0.55V
0.5
0.74
550
0.9
ms
FB
480
600
kHz
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 4: Dynamic supply current is higher due to gate charge being
delivered at the switching frequency.
Note 2: The LTC3809E-1 is guaranteed to meet specified performance
from 0°C to 70°C. Specifications over the –40°C to 85°C operating range
are assured by design characterization, and correlation with statistical
process controls.
Note 5: The LTC3809-1 is tested in a feedback loop that servos I to a
TH
specified voltage and measures the resultant V voltage.
FB
Note 6: Peak current sense voltage is reduced dependent on duty cycle to
a percentage of value as shown in Figure 1.
Note 3: T is calculated from the ambient temperature T and power
J
A
dissipation P according to the following formula:
D
T = T + (P • θ °C/W)
J
A
D
JA
38091f
3
LTC3809-1
TYPICAL PERFOR A CE CHARACTERISTICS
U W
TA = 25°C unless otherwise noted.
Maximum Current Sense Voltage
vs ITH Pin Voltage
Efficiency vs Load Current
Efficiency vs Load Current
100
95
90
85
80
75
70
65
60
55
50
100
80
60
40
20
0
100
95
90
85
80
75
70
65
60
FIGURE 8 CIRCUIT
FIGURE 8 CIRCUIT
Burst Mode OPERATION
V
= 2.5V
OUT
V
= 5V, V
= 2.5V
(I RISING)
IN
OUT
TH
Burst Mode OPERATION
V
= 3.3V
(I FALLING)
OUT
TH
FORCED CONTINUOUS
MODE
BURST MODE
(MODE = V
)
IN
PULSE SKIPPING
MODE
V
OUT
= 1.2V
FORCED
CONTINUOUS
(MODE = 0V)
V
= 1.8V
OUT
PULSE SKIPPING
(MODE = 0.6V)
MODE = V
IN
IN
V
= 5V
–20
1
10
100
1k
10k
0.5
1
I
1.5
VOLTAGE (V)
2
1
10
100
1k
10k
LOAD CURRENT (mA)
LOAD CURRENT (mA)
TH
38091 G02
38091 G01
38091 G03
Load Step (Forced Continuous
Mode)
Load Step (Burst Mode
Operation)
Load Step (Pulse Skipping Mode)
V
V
V
OUT
OUT
OUT
200mV/DIV
200mV/DIV
200mV/DIV
AC COUPLED
AC COUPLED
AC COUPLED
I
I
I
L
L
L
2A/DIV
2A/DIV
2A/DIV
38091 G04
38091 G05
38091 G06
100µs/DIV
100µs/DIV
100µs/DIV
V
V
= 3.3V
OUT
V
V
= 3.3V
OUT
V
= 3.3V
IN
IN
IN
= 1.8V
= 1.8V
V
= 1.8V
OUT
LOAD
MODE = V
I
= 300mA TO 3A
I
= 300mA TO 3A
I
= 300mA TO 3A
LOAD
LOAD
MODE = 0V
FIGURE 8 CIRCUIT
MODE = V
IN
FIGURE 8 CIRCUIT
FB
FIGURE 8 CIRCUIT
Start-Up with Internal Soft-Start
(TRACK/SS = VIN)
Start-Up with External Soft-Start
(CSS = 10nF)
V
V
OUT
OUT
1.8V
1.8V
500mV/DIV
500mV/DIV
38091 G07
38091 G08
200µs/DIV
1ms/DIV
V
= 4.2V
LOAD
V
= 4.2V
IN
IN
R
= 1
R
= 1
LOAD
FIGURE 8 CIRCUIT
FIGURE 8 CIRCUIT
38091f
4
LTC3809-1
U W
TYPICAL PERFOR A CE CHARACTERISTICS
TA = 25°C unless otherwise noted.
Start-Up with Coincident Tracking
(VOUT = 0V at 0s)
Start-Up with Coincident Tracking
(VOUT = 0.8V at 0s)
Start-Up with Ratiometric
Tracking (VOUT = 0V at 0s)
V
V
V
x
2.5V
x
x
2.5V
2.5V
V
V
V
OUT
OUT
OUT
1.8V
1.8V
1.8V
500mV/DIV
500mV/DIV
500mV/DIV
38091 G09
38091 G10
38091 G11
10ms/DIV
10ms/DIV
10ms/DIV
V
R
R
= 4.2V
= 590
V
R
R
= 4.2V
= 590
V
R
R
= 4.2V
= 590
IN
TA
TB
IN
TA
TB
IN
TA
TB
= 1.18k
= 1.18k
= 1.69k
FIGURE 8 CIRCUIT
FIGURE 8 CIRCUIT
FIGURE 8 CIRCUIT
Regulated Feedback Voltage vs
Temperature
Undervoltage Lockout Threshold
vs Temperature
Shutdown (RUN) Threshold vs
Temperature
2.55
2.50
2.45
2.40
2.35
2.30
2.25
2.20
2.15
1.20
1.15
1.10
1.05
1.00
0.606
0.604
0.602
0.600
0.598
0.596
0.594
V
RISING
IN
V
FALLING
IN
40 60
0
TEMPERATURE (°C)
–60 –40 –20
20
80 100
40 60
TEMPERATURE (°C)
–60 –40 –20
0
20
80 100
40 60
TEMPERATURE (°C)
–60 –40 –20
0
20
80 100
38091 G13
38091 G14
38091 G012
Maximum Current Sense
Threshold vs Temperature
TRACK/SS Start-Up Current vs
Temperature
1.04
135
130
125
120
115
IPRG = FLOAT
TRACK/SS = 0V
1.02
1.00
0.98
0.96
0.94
40 60
TEMPERATURE (°C)
40 60
TEMPERATURE (°C)
–60 –40 –20
0
20
80 100
–60 –40 –20
0
20
80 100
38091 G15
38091 G16
38091f
5
LTC3809-1
TYPICAL PERFOR A CE CHARACTERISTICS
U W
TA = 25°C unless otherwise noted.
Oscillator Frequency vs
Temperature
Oscillator Frequency vs Input
Voltage
Shutdown Quiescent Current vs
Input Voltage
10
8
5
4
18
16
14
12
10
8
6
3
4
2
2
1
0
0
–2
–4
–6
–8
–10
–1
–2
–3
–4
–5
6
4
2
0
40 60
TEMPERATURE (°C)
–60 –40 –20
0
20
80 100
7
8
7
8
2
3
4
5
6
9
10
2
3
4
5
6
9
10
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
38091 G17
38091 G18
38091 G19
TRACK/SS Start-Up Current vs
TRACK/SS Voltage
Sleep Current vs Input Voltage
130
120
110
100
90
1.04
1.00
0.96
0.92
0.88
0.84
80
70
7
8
0.5 0.6
0.1 0.2 0.3 0.4
TRACK/SS VOLTAGE (V)
2
3
4
5
6
9
10
0
0.7
INPUT VOLTAGE (V)
38091 G20
38091 G21
38091f
6
LTC3809-1
U
U
U
PI FU CTIO S
MODE (Pin 1): This pin performs two functions: 1) auxil-
iary winding feedback input, and 2) Burst Mode operation,
pulse skipping or forced continuous mode select.
IPRG (Pin 6): Three-State Pin to Select Maximum Peak
Sense Voltage Threshold. This pin selects the maximum
allowed voltage drop between the VIN and SW pins (i.e.,
the maximum allowed drop across the external P-channel
MOSFET). Tie to VIN, GND or float to select 204mV, 85mV
or 125mV respectively.
To select Burst Mode operation at light loads, tie this pin
to VIN. Grounding this pin selects forced continuous
operation which allows the inductor current to reverse.
Tying this pin to VFB selects pulse-skipping mode. Do not
leave this pin floating.
BG (Pin 7): Bottom (NMOS) Gate Drive Output. This pin
drivesthegateoftheexternalN-channelMOSFET.Thispin
has an output swing from PGND to VIN.
TRACK/SS (Pin 2): Tracking Input for the Controller or
Optional External Soft-Start Input. This pin allows the
start-up of VOUT to “track” the external voltage at this pin
using an external resistor divider. Tying this pin to VIN
allows VOUT to start up with the internal 0.74ms soft-start.
An external soft-start can be programmed by connecting
acapacitorbetweenthispinandground. Donotleavethis
pin floating.
TG (Pin 8):Top (PMOS) Gate Drive Output. This pin drives
thegateoftheexternalP-channelMOSFET.Thispinhasan
output swing from PGND to VIN.
VIN (Pin9):ChipSignalPowerSupply.Thispinpowersthe
entire chip, the gate drivers and serves as the positive
input to the differential current comparator.
SW (Pin 10): Switch Node Connection to Inductor. This
pin is also the negative input to the differential current
comparator and an input to the reverse current compara-
tor. Normally this pin is connected to the drain of the
external P-channel MOSFET, the drain of the external
N-channel MOSFET and the inductor.
VFB (Pin 3): Feedback Pin. This pin receives the remotely
sensed feedback voltage for the controller from an exter-
nal resistor divider across the output.
ITH (Pin 4): Current Threshold and Error Amplifier Com-
pensation Point. Nominal operating range on this pin is
from 0.7V to 2V. The voltage on this pin determines the
threshold of the main current comparator.
GND (Exposed Pad, Pin 11): Ground connection for
internal circuits, the gate drivers and the negative input to
thereversecurrentcomparator.TheExposedPad mustbe
soldered to the PCB ground.
RUN (Pin 5): Run Control Input. Forcing this pin below
1.1V shuts down the chip. Driving this pin to VIN or
releasing this pin enables the chip to start-up with the
internal soft-start.
38091f
7
LTC3809-1
U
U
W
FU CTIO AL DIAGRA
V
IN
C
IN
9
V
IN
6
IPRG
VOLTAGE
REFERENCE
V
REF
0.6V
SLOPE
+
TG
SW
BG
CLK
S
R
8
10
7
MP
MN
+
–
Q
GND
ICMP
UNDERVOLTAGE
LOCKOUT
SWITCHING
LOGIC AND
BLANKING
CIRCUIT
SENSE
L
ANTI-SHOOT-
THROUGH
V
OUT
C
OUT
OSC
V
IN
PV
IN
V
IN
UVSD
0.7µA
RUN
5
+
–
FCB
SLEEP
V
IN
t = 0.74ms
INTERNAL
SOFT-START
+
–
0.15V
OV
REV
I
0.68V
0.54V
BURSTDIS
R
B
GND
11
2
0.3V
1µA
+
+
–
MUX
TRK/SS
TRACK/SS
MODE
UV
–
V
FB
BURSTDIS
FCB
BURST DEFEAT
I
TH
1
4
R
C
V
REF
0.6V
+
+
–
C
C
TRK/SS
EAMP
V
FB
3
R
A
38091 FD
SW
+
–
I
RICMP
REV
GND
38091f
8
LTC3809-1
U
(Refer to Functional Diagram)
OPERATIO
Main Control Loop
by releasing the RUN pin, the TRACK/SS pin is charged up
by an internal 1µA current source and rises linearly from
0V to above 0.6V. The error amplifier EAMP compares the
feedbacksignalVFB tothisrampinstead,andregulatesVFB
linearly from 0V to 0.6V.
The LTC3809-1 uses a constant frequency, current mode
architecture. During normal operation, the top external
P-channel power MOSFET is turned on when the clock
sets the RS latch, and is turned off when the current
comparator (ICMP) resets the latch. The peak inductor
currentatwhichICMPresetstheRSlatchisdeterminedby
the voltage on the ITH pin, which is driven by the output of
theerroramplifier(EAMP).TheVFB pinreceivestheoutput
voltage feedback signal from an external resistor divider.
This feedback signal is compared to the internal 0.6V
reference voltage by the EAMP. When the load current
increases, it causes a slight decrease in VFB relative to the
0.6V reference, which in turn causes the ITH voltage to
increase until the average inductor current matches the
new load current. While the top P-channel MOSFET is off,
thebottomN-channelMOSFETisturnedonuntileitherthe
inductor current starts to reverse, as indicated by the
current reversal comparator IRCMP, or the beginning of
the next cycle.
When the voltage on the TRACK/SS pin is less than the
0.6V internal reference, the LTC3809-1 regulates the VFB
voltagetotheTRACK/SSpininsteadofthe0.6Vreference.
Therefore VOUT of the LTC3809-1 can track an external
voltage VX during start-up. Typically, a resistor divider on
VX is connected to the TRACK/SS pin to allow the start-up
ofVOUT to“track”thatofVX.Forcoincidenttrackingduring
start-up, the regulated final value of VX should be larger
than that of VOUT, and the resistor divider on VX has the
same ratio as the divider on VOUT that is connected to VFB.
See detailed discussions in the Run and Soft-Start/
Tracking Functions in the Applications Information
Section.
Light Load Operation (Burst Mode Operation,
Continuous Conduction or Pulse Skipping Mode)
(MODE Pin)
Shutdown, Soft-Start and Tracking Start-Up
(RUN and TRACK/SS Pins)
The LTC3809-1 can be programmed for either high effi-
ciency Burst Mode operation, forced continuous conduc-
tion mode or pulse skipping mode at low load currents. To
select Burst Mode operation, tie the MODE pin to VIN. To
select forced continuous operation, tie the MODE pin to a
DC voltage below 0.4V (e.g., GND). Tying the MODE pin to
a DC voltage above 0.4V and below 1.2V (e.g., VFB)
enablespulseskippingmode.The0.4Vthresholdbetween
forcedcontinuousoperationandpulseskippingmodecan
be used in secondary winding regulation as described in
theAuxiliaryWindingControlUsingtheMODEPindiscus-
sion in the Applications Information section.
The LTC3809-1 is shut down by pulling the RUN pin low.
In shutdown, all controller functions are disabled and the
chip draws only 9µA. The TG output is held high (off) and
the BG output low (off) in shutdown. Releasing the RUN
pin allows an internal 0.7µA current source to pull up the
RUNpintoVIN.ThecontrollerisenabledwhentheRUNpin
reaches 1.1V.
The start-up of VOUT is based on the three different
connections on the TRACK/SS pin. The start-up of VOUT
is controlled by the LTC3809-1’s internal soft-start when
TRACK/SSisconnectedtoVIN.Duringsoft-start,theerror
amplifier EAMP compares the feedback signal VFB to the
internal soft-start ramp (instead of the 0.6V reference),
which rises linearly from 0V to 0.6V in about 1ms. This
allows the output voltage to rise smoothly from 0V to its
final value while maintaining control of the inductor
current.
When the LTC3809-1 is in Burst Mode operation, the peak
current in the inductor is set to approximately one-fourth
of the maximum sense voltage even though the voltage on
the ITH pin indicates a lower value. If the average inductor
current is higher than the load current, the EAMP will
decrease the voltage on the ITH pin. When the ITH voltage
drops below 0.85V, the internal SLEEP signal goes high
and the external MOSFET is turned off.
The 1ms soft-start time can be changed by connecting the
optional external soft-start capacitor CSS between the
TRACK/SS and GND pins. When the controller is enabled
38091f
9
LTC3809-1
U
(Refer to Functional Diagram)
OPERATIO
In sleep mode, much of the internal circuitry is turned off,
reducing the quiescent current that the LTC3809-1 draws.
Theloadcurrentissuppliedbytheoutputcapacitor.Asthe
output voltage decreases, the EAMP increases the ITH
voltage. When the ITH voltage reaches 0.925V, the SLEEP
signal goes low and the controller resumes normal opera-
tion by turning on the external P-channel MOSFET on the
next cycle of the internal oscillator.
high as Burst Mode operation. During start-up or an
undervoltage condition (VFB ≤ 0.54V), the LTC3809-1
operates in pulse skipping mode (no current reversal
allowed), regardless of the state of the MODE pin.
Short-Circuit and Current Limit Protection
The LTC3809-1 monitors the voltage drop ∆VSC (between
the SGND/PGND and SW pins) across the external
N-channel MOSFET with the short-circuit current limit
comparator. The allowed voltage is determined by:
When the controller is enabled for Burst Mode or pulse
skipping operation, the inductor current is not allowed to
reverse. Hence, the controller operates discontinuously.
The reverse current comparator RICMP senses the drain-
to-source voltage of the bottom external N-channel
MOSFET. This MOSFET is turned off just before the
inductor current reaches zero, preventing it from going
negative.
∆VSC(MAX) = A • 90mV
where A is a constant determined by the state of the IPRG
pin. Floating the IPRG pin selects A = 1; tying IPRG to VIN
selects A = 5/3; tying IPRG to GND selects A = 2/3.
The inductor current limit for short-circuit protection is
determined by ∆VSC(MAX) and the on-resistance of the
external N-channel MOSFET:
In forced continuous operation, the inductor current is
allowed to reverse at light loads or under large transient
conditions.Thepeakinductorcurrentisdeterminedbythe
voltageontheITH pin. TheP-channelMOSFETisturnedon
every cycle (constant frequency) regardless of the ITH pin
voltage. In this mode, the efficiency at light loads is lower
than in Burst Mode operation. However, continuous mode
has the advantages of lower output ripple and no noise at
audio frequencies.
∆VSC(MAX)
RDS(ON)
ISC
=
Once the inductor current exceeds ISC, the short current
comparator will shut off the external P-channel MOSFET
until the inductor current drops below ISC.
When the MODE pin is set to the VFB Pin, the LTC3809-1
operates in PWM pulse skipping mode at light loads. In
this mode, the current comparator ICMP may remain
tripped for several cycles and force the external P-channel
MOSFET to stay off for the same number of cycles. The
inductor current is not allowed to reverse (discontinuous
operation). This mode, like forced continuous operation,
exhibits low output ripple as well as low audible noise and
reduced RF interference as compared to Burst Mode
operation. However, it provides low current efficiency
higher than forced continuous mode, but not nearly as
Output Overvoltage Protection
As further protection, the overvoltage comparator (OVP)
guardsagainsttransientovershoots,aswellasothermore
serious conditions that may overvoltage the output. When
the feedback voltage on the VFB pin has risen 13.33%
above the reference voltage of 0.6V, the external P-chan-
nel MOSFET is turned off and the N-channel MOSFET is
turned on until the overvoltage is cleared.
38091f
10
LTC3809-1
U
(Refer to Functional Diagram)
OPERATIO
Dropout Operation
where A is a constant determined by the state of the IPRG
pin. Floating the IPRG pin selects A = 1; tying IPRG to VIN
selects A = 5/3; tying IPRG to GND selects A = 2/3. The
maximum value of VITH is typically about 1.98V, so the
maximum sense voltage allowed across the external
P-channel MOSFET is 125mV, 85mV or 204mV for the
three respective states of the IPRG pin.
When the input supply voltage (VIN) approaches the
output voltage, the rate of change of the inductor current
while the external P-channel MOSFET is on
(ON cycle) decreases. This reduction means that the
P-channel MOSFET will remain on for more than one
oscillator cycle if the inductor current has not ramped up
to the threshold set by the EAMP on the ITH pin. Further
reduction in the input supply voltage will eventually cause
the P-channel MOSFET to be turned on 100%; i.e., DC.
The output voltage will then be determined by the input
voltage minus the voltage drop across the P-channel
MOSFET and the inductor.
However, once the controller’s duty cycle exceeds 20%,
slope compensation begins and effectively reduces the
peaksensevoltagebyascalefactor(SF)givenbythecurve
in Figure 1.
Thepeakinductorcurrentisdeterminedbythepeaksense
voltage and the on-resistance of the external P-channel
MOSFET:
Undervoltage Lockout
To prevent operation of the P-channel MOSFET below
safe input voltage levels, an undervoltage lockout is
incorporated in the LTC3809-1. When the input supply
voltage (VIN) drops below 2.25V, the external P- and
N-channel MOSFETs and all internal circuits are turned
off except for the undervoltage block, which draws only
a few microamperes.
∆VSENSE(MAX)
IPK
=
RDS(ON)
110
100
90
80
70
60
50
40
30
20
10
0
Peak Current Sense Voltage Selection and Slope
Compensation (IPRG Pin)
When the LTC3809-1 controller is operating below 20%
duty cycle, the peak current sense voltage (between the
VIN and SW pins) allowed across the external P-channel
MOSFET is determined by:
0
10 20 30 40 50 60 70 80 90 100
DUTY CYCLE (%)
38091 F01
V
ITH – 0.7V
∆VSENSE(MAX) = A •
Figure 1. Maximum Peak Current vs Duty Cycle
10
38091f
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LTC3809-1
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The typical LTC3809-1 application circuit is shown in
Figure 8. External component selection for the controller
is driven by the load requirement and begins with the
selection of the inductor and the power MOSFETs.
where IRIPPLE is the inductor peak-to-peak ripple current
(see Inductor Value Calculation).
A reasonable starting point is setting ripple current IRIPPLE
to be 40% of IOUT(MAX). Rearranging the above equation
yields:
Power MOSFET Selection
∆VSENSE(MAX)
IOUT(MAX)
5
RDS(ON)MAX = •
6
The LTC3809-1’s controller requires two external power
MOSFETs: a P-channel MOSFET for the topside (main)
switch and a N-channel MOSFET for the bottom (synchro-
nous) switch. The main selection criteria for the power
MOSFETs are the breakdown voltage VBR(DSS), threshold
voltage VGS(TH), on-resistance RDS(ON), reverse transfer
capacitance CRSS, turn-off delay tD(OFF) and the total gate
charge QG.
for Duty Cycle < 20%
However, for operation above 20% duty cycle, slope
compensation has to be taken into consideration to select
the appropriate value of RDS(ON) to provide the required
amount of load current:
∆VSENSE(MAX)
IOUT(MAX)
5
6
Thegatedrivevoltageistheinputsupplyvoltage.Sincethe
LTC3809-1 is designed for operation down to low input
voltages, a sublogic level MOSFET (RDS(ON) guaranteed at
VGS = 2.5V) is required for applications that work close to
this voltage. When these MOSFETs are used, make sure
that the input supply to the LTC3809-1 is less than the
absolute maximum MOSFET VGS rating, which is typically
8V.
RDS(ON)MAX = • SF •
whereSFisascalefactorwhosevalueisobtainedfromthe
curve in Figure 1.
These must be further derated to take into account the
significant variation in on-resistance with temperature.
The following equation is a good guide for determining
the required RDS(ON)MAX at 25°C (manufacturer’s specifi-
cation), allowing some margin for variations in the
LTC3809-1 and external component values:
The P-channel MOSFET’s on-resistance is chosen based
on the required load current. The maximum average load
current IOUT(MAX) is equal to the peak inductor current
minus half the peak-to-peak ripple current IRIPPLE. The
LTC3809-1’s current comparator monitors the drain-to-
source voltage VDS of the top P-channel MOSFET, which
is sensed between the VIN and SW pins. The peak inductor
current is limited by the current threshold, set by the
voltage on the ITH pin, of the current comparator. The
voltage on the ITH pin is internally clamped, which limits
the maximum current sense threshold ∆VSENSE(MAX) to
approximately 125mV when IPRG is floating (85mV when
IPRG is tied low; 204mV when IPRG is tied high).
∆VSENSE(MAX)
IOUT(MAX) • ρT
5
6
RDS(ON)MAX
=
• 0.9 • SF •
The ρT is a normalizing term accounting for the tempera-
ture variation in on-resistance, which is typically about
0.4%/°C, asshowninFigure2. Junction-to-casetempera-
ture TJC is about 10°C in most applications. For a maxi-
mum ambient temperature of 70°C, using ρ80°C ~ 1.3 in
the above equation is a reasonable choice.
The N-channel MOSFET’s on resistance is chosen based
on the short-circuit current limit (ISC). The LTC3809-1’s
short-circuit current limit comparator monitors the drain-
to-source voltage VDS of the bottom N-channel MOSFET,
which is sensed between the GND and SW pins.
The output current that the LTC3809-1 can provide is
given by:
∆VSENSE(MAX)
IRIPPLE
IOUT(MAX)
=
–
RDS(ON)
2
38091f
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LTC3809-1
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2.0
1.5
1.0
0.5
0
VOUT
Top P-Channel Duty Cycle =
V
IN
V – VOUT
IN
Bottom N-Channel Duty Cycle =
V
IN
The MOSFET power dissipations at maximum output
current are:
VOUT
2
2
PTOP
=
• IOUT(MAX) • ρT • RDS(ON) + 2 • V
IN
50
100
–50
150
0
V
IN
JUNCTION TEMPERATURE (°C)
38091 F02
• IOUT(MAX) • CRSS • f
Figure 2. RDS(ON) vs Temperature
V – VOUT
2
IN
PBOT
=
• IOUT(MAX) • ρT • RDS(ON)
V
IN
The short-circuit current sense threshold ∆VSC is set
approximately 90mV when IPRG is floating (60mV when
IPRG is tied low; 150mV when IPRG is tied high). The
on-resistance of N-channel MOSFET is determined by:
Both MOSFETs have I2R losses and the PTOP equation
includesanadditionaltermfortransitionlosses,whichare
largest at high input voltages. The bottom MOSFET losses
are greatest at high input voltage or during a short-circuit
when the bottom duty cycle is 100%.
∆VSC
ISC(PEAK)
RDS(ON)MAX
=
The LTC3809-1 utilizes a non-overlapping, anti-shoot-
through gate drive control scheme to ensure that the P-
and N-channel MOSFETs are not turned on at the same
time. To function properly, the control scheme requires
that the MOSFETs used are intended for DC/DC switching
applications. Many power MOSFETs, particularly P-chan-
nel MOSFETs, are intended to be used as static switches
and therefore are slow to turn on or off.
The short-circuit current limit (ISC(PEAK)) should be larger
than the IOUT(MAX) with some margin to avoid interfering
with the peak current sensing loop. On the other hand, in
order to prevent the MOSFETs from excessive heating and
the inductor from saturation, ISC(PEAK) should be smaller
than the minimum value of their current ratings. A reason-
able range is:
Reasonable starting criteria for selecting the P-channel
MOSFET are that it must typically have a gate charge (QG)
less than 25nC to 30nC (at 4.5VGS) and a turn-off delay
(tD(OFF)) of less than approximately 140ns. However, due
to differences in test and specification methods of various
MOSFET manufacturers, and in the variations in QG and
tD(OFF) withgatedrive(VIN)voltage,theP-channelMOSFET
ultimately should be evaluated in the actual LTC3809-1
application circuit to ensure proper operation.
IOUT(MAX) < ISC(PEAK) < IRATING(MIN)
Therefore,theon-resistanceofN-channelMOSFETshould
be chosen within the following range:
∆VSC
IRATING(MIN)
∆VSC
IOUT(MAX)
< RDS(ON)
<
where ∆VSC is 90mV, 60mV or 150mV with IPRG being
floated, tied to GND or VIN respectively.
Shoot-through between the P-channel and N-channel
MOSFETs can most easily be spotted by monitoring the
input supply current. As the input supply voltage in-
creases,iftheinputsupplycurrentincreasesdramatically,
then the likely cause is shoot-through. Note that some
The power dissipated in the MOSFET strongly depends on
its respective duty cycles and load current. When the
LTC3809-1 is operating in continuous mode, the duty
cycles for the MOSFETs are:
38091f
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LTC3809-1
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APPLICATIO S I FOR ATIO
MOSFETsthatdonotworkwellathighinputvoltages(e.g.,
VIN > 5V) may work fine at lower voltages (e.g., 3.3V).
Thecorrespondingaveragecurrentdependsontheamount
of ripple current. Lower inductor values (higher IRIPPLE
)
willreducetheloadcurrentatwhichBurstModeoperation
begins.
Selecting the N-channel MOSFET is typically easier, since
for a given RDS(ON), the gate charge and turn-on and turn-
off delays are much smaller than for a P-channel MOSFET.
The ripple current is normally set so that the inductor
current is continuous during the burst periods. Therefore,
Inductor Value Calculation
IRIPPLE ≤ IBURST(PEAK)
Given the desired input and output voltages, the inductor
value and operating frequency, fOSC, directly determine
the inductor’s peak-to-peak ripple current:
This implies a minimum inductance of:
V – VOUT
fOSC • IBURST(PEAK)
VOUT
IN
LMIN
≤
•
VOUT V – VOUT
V
IN
IN
IRIPPLE
=
•
V
fOSC • L
IN
A smaller value than LMIN could be used in the circuit,
although the inductor current will not be continuous
during burst periods, which will result in slightly lower
efficiency. In general, though, it is a good idea to keep
Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors and output voltage
ripple. Thus, highest efficiency operation is obtained at
low frequency with a small ripple current. Achieving this,
however, requires a large inductor.
IRIPPLE comparable to IBURST(PEAK)
.
Inductor Core Selection
A reasonable starting point is to choose a ripple current
that is about 40% of IOUT(MAX). Note that the largest ripple
current occurs at the highest input voltage. To guarantee
that ripple current does not exceed a specified maximum,
the inductor should be chosen according to:
Once the value of L is known, the type of inductor must be
selected. Actual core loss is independent of core size for a
fixed inductor value, but is very dependent on the induc-
tance selected. As inductance increases, core losses go
down. Unfortunately, increased inductance requires more
turns of wire and therefore copper losses will increase.
V – VOUT
fOSC • IRIPPLE
VOUT
V
IN
IN
L ≥
•
Ferritedesignshaveverylowcorelossesandarepreferred
at high switching frequencies, so design goals can con-
centrate on copper loss and preventing saturation. Ferrite
core material saturates “hard”, which means that induc-
tance collapses abruptly when the peak design current is
exceeded. Core saturation results in an abrupt increase in
inductor ripple current and consequent output voltage
ripple. Do not allow the core to saturate!
Burst Mode Operation Considerations
The choice of RDS(ON) and inductor value also determines
the load current at which the LTC3809-1 enters Burst
Mode operation. When bursting, the controller clamps the
peak inductor current to approximately:
∆VSENSE(MAX)
1
4
IBURST(PEAK)
=
•
RDS(ON)
38091f
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LTC3809-1
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Different core materials and shapes will change the size/
current and price/current relationship of an inductor.
Toroid or shielded pot cores in ferrite or permalloy mate-
rials are small and don’t radiate much energy, but gener-
ally cost more than powdered iron core inductors with
similar characteristics. The choice of which style inductor
to use mainly depends on the price vs size requirements
and any radiated field/EMI requirements. New designs for
surface mount inductors are available from Coiltronics,
Coilcraft, Toko and Sumida.
This formula has a maximum value at VIN = 2VOUT, where
RMS = IOUT/2. This simple worst-case condition is com-
I
monlyusedfordesignbecauseevensignificantdeviations
donotoffermuchrelief.Notethatcapacitormanufacturer’s
ripplecurrentratingsareoftenbasedon2000hoursoflife.
This makes it advisable to further derate the capacitor or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may be paralleled to meet the
size or height requirements in the design. Due to the high
operating frequency of the LTC3809-1, ceramic capaci-
torscanalsobeusedforCIN. Alwaysconsultthemanufac-
turer if there is any question.
Schottky Diode Selection (Optional)
The schottky diode D in Figure 9 conducts current during
the dead time between the conduction of the power
MOSFETs. This prevents the body diode of the bottom
N-channel MOSFET from turning on and storing charge
during the dead time, which could cost as much as 1% in
efficiency. A 1A Schottky diode is generally a good size for
most LTC3809-1 applications, since it conducts a rela-
tively small average current. Larger diode results in addi-
tional transition losses due to its larger junction capaci-
tance. This diode may be omitted if the efficiency loss can
be tolerated.
The selection of COUT is driven by the effective series
resistance (ESR). Typically, once the ESR requirement is
satisfied, the capacitance is adequate for filtering. The
output ripple (∆VOUT) is approximated by:
⎛
⎝
⎞
1
∆VOUT ≈ IRIPPLE • ESR +
⎜
⎟
⎠
8 • f • COUT
where f is the operating frequency, COUT is the output
capacitance and IRIPPLE is the ripple current in the induc-
tor. The output ripple is highest at maximum input voltage
since IRIPPLE increase with input voltage.
CIN and COUT Selection
In continuous mode, the source current of the P-channel
MOSFET is a square wave of duty cycle (VOUT/VIN). To
preventlargevoltagetransients, alowESRinputcapacitor
sized for the maximum RMS current must be used. The
maximum RMS capacitor current is given by:
Setting Output Voltage
The LTC3809-1 output voltage is set by an external feed-
back resistor divider carefully placed across the output, as
shown in Figure 3. The regulated output voltage is deter-
mined by:
1/2
)
VOUT • V – V
(
⎛
⎝
⎞
IN
OUT
RB
RA
CINRequiredIRMS ≈ IMAX
•
VOUT = 0.6V • 1+
⎜
⎟
⎠
V
IN
38091f
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LTC3809-1
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For most applications, a 59k resistor is suggested for RA.
In applications where minimizing the quiescent current is
critical, RA should be made bigger to limit the feedback
divider current. If RB then results in very high impedance,
it may be beneficial to bypass RB with a 50pF to 100pF
capacitor CFF.
Once the controller is enabled, the start-up of VOUT is
controlled by the state of the TRACK/SS pin. If the TRACK/
SS pin is connected to VIN, the start-up of VOUT is con-
trolled by internal soft-start, which slowly ramps the
positive reference to the error amplifier from 0V to 0.6V,
allowing VOUT to rise smoothly from 0V to its final value.
The default internal soft-start time is around 0.74ms. The
soft-start time can be changed by placing a capacitor
betweentheTRACK/SSpinandGND. Inthiscase, thesoft-
start time will be approximately:
V
OUT
R
C
FF
B
A
LTC3809-1
V
FB
R
600mV
1µA
tSS = CSS
•
38091 F03
Figure 3. Setting Output Voltage
where 1µA is an internal current source which is
always on.
Run and Soft-Start/Tracking Functions
When the voltage on the TRACK/SS pin is less than the
internal 0.6V reference, the LTC3809-1 regulates the VFB
voltage to the TRACK/SS pin voltage instead of 0.6V.
Therefore the start-up of VOUT can ratiometrically track an
external voltage VX, according to a ratio set by a resistor
divider at TRACK/SS pin (Figure 5a). The ratiometric
relation between VOUT and VX is (Figure 5c):
The LTC3809-1 has a low power shutdown mode which is
controlled by the RUN pin. Pulling the RUN pin below 1.1V
puts the LTC3809-1 into a low quiescent current shut-
down mode (IQ = 9µA). Releasing the RUN pin, an internal
0.7µA (at VIN = 4.2V) current source will pull the RUN pin
up to VIN, which enables the controller. The RUN pin can
be driven directly from logic as showed in Figure 4.
VOUT RTA RA + RB
3.3V OR 5V
=
•
VX
RA RTA + RTB
LTC3809-1
RUN
LTC3809-1
RUN
V
OUT
V
X
38091 F04
LTC3809-1
R
B
A
V
FB
R
R
TB
Figure 4. RUN Pin Interfacing
R
TRACK/SS
TA
38091 F5a
Figure 5a. Using the TRACK/SS Pin to Track VX
38091f
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LTC3809-1
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V
V
X
X
V
V
OUT
OUT
38091 F05b,c
TIME
TIME
(5b) Coincident Tracking
(5c) Ratiometric Tracking
Figure 5b and 5c. Two Different Modes of Output Voltage Tracking
For coincident tracking (VOUT = VX during start-up),
RTA = RA, RTB = RB
Auxiliary Winding Control Using the MODE Pin
The MODE pin can be used as an auxiliary feedback to
provide a means of regulating a flyback winding output.
When this pin drops below its ground-referenced 0.4V
threshold, continuous mode operation is forced.
VX should always be greater than VOUT when using the
tracking function of TRACK/SS pin.
During continuous mode, current flows continuously in
the transformer primary side. The auxiliary winding draws
current only when the bottom synchronous N-channel
MOSFET is on. When primary load currents are low and/
or the VIN/VOUT ratio is close to unity, the synchronous
MOSFET may not be on for a sufficient amount of time to
transfer power from the output capacitor to the auxiliary
load. Forced continuous operation will support an auxil-
iary winding as long as there is a sufficient synchronous
MOSFET duty factor. The MODE input pin removes the
requirement that power must be drawn from the trans-
former primary side in order to extract power from the
auxiliary winding. With the loop in continuous mode, the
auxiliary output may nominally be loaded without regard
to the primary output load.
The internal current source (1µA), which is for external
soft-start, will cause a tracking error at VOUT. For example,
if a 59k resistor is chosen for RTA, the RTA current will be
about 10µA (600mV/59k). In this case, the 1µA internal
current source will cause about 10% (1µA/10µA • 100%)
tracking error, which is about 60mV (600mV • 10%)
referred to VFB. This is acceptable for most applications. If
a better tracking accuracy is required, the value of RTA
should be reduced.
Table 1 summarizes the different states in which the
TRACK/SS can be used.
Table 1. The States of the TRACK/SS Pin
TRACK/SS Pin
Capacitor C
FREQUENCY
External Soft-Start
Internal Soft-Start
SS
V
IN
Resistor Divider
V
Tracking an External Voltage V
OUT X
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The auxiliary output voltage VAUX is normally set, as
shown in Figure 6, by the turns ratio N of the transformer:
In a hard short (VOUT = 0V), the top P-channel MOSFET is
turned off and kept off until the short-circuit condition is
cleared. In this case, there is no current path from input
supply (VIN) to either VOUT or GND, which prevents
excessive MOSFET and inductor heating.
VAUX = (N + 1) • VOUT
V
V
AUX
105
V
IN
+
LTC3809-1
TG
L1
1:N
V
REF
100
R6
R5
OUT
MODE
95
90
MAXIMUM
SENSE VOLTAGE
SW
BG
+
C
OUT
38091 F06
85
80
75
Figure 6. Auxiliary Output Loop Connection
However, if the controller goes into pulse skipping opera-
tionandhaltsswitchingduetoalightprimaryloadcurrent,
then VAUX will droop. An external resistor divider from
2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0
INPUT VOLTAGE (V)
38091 F07
VAUX to the MODE sets a minimum voltage VAUX(MIN)
:
Figure 7. Line Regulation of VREF and Maximum Sense Voltage
Low Supply Voltage
⎛
⎝
⎞
R6
R5
VAUX(MIN) = 0.4V • 1+
⎜
⎟
⎠
Although the LTC3809-1 can function down to below
2.4V, themaximumallowableoutputcurrentisreducedas
VIN decreases below 3V. Figure 7 shows the amount of
changeasthesupplyisreduceddownto2.4V. Alsoshown
If VAUX drops below this value, the MODE voltage forces
temporary continuous switching operation until VAUX is
again above its minimum.
is the effect on VREF
.
Minimum On-Time Considerations
Fault Condition: Short-Circuit and Current Limit
Minimum on-time, tON(MIN) is the smallest amount of time
thattheLTC3809-1iscapableofturningthetopP-channel
MOSFET on. It is determined by internal timing delays and
the gate charge required to turn on the top MOSFET. Low
duty cycle and high frequency applications may approach
the minimum on-time limit and care should be taken to
ensure that:
If the LTC3809-1’s load current exceeds the short-circuit
current limit (ISC), which is set by the short-circuit sense
threshold (∆VSC) and the on resistance (RDS(ON)) of bot-
tom N-channel MOSFET, the top P-channel MOSFET is
turned off and will not be turned on at the next clock cycle
unless the load current decreases below ISC. In this case,
the controller’s switching frequency is decreased and
the output is regulated by short-circuit (current
limit) protection.
VOUT
OSC • V
tON(MIN)
<
f
IN
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3) I2R losses are calculated from the DC resistances of the
MOSFETs, inductor and/or sense resistor. In continuous
mode, the average output current flows through L but is
“chopped” between the top P-channel MOSFET and the
bottom N-channel MOSFET. The MOSFET RDS(ON)
multiplied by duty cycle can be summed with the resis-
tance of L to obtain I2R losses.
Ifthedutycyclefallsbelowwhatcanbeaccommodatedby
the minimum on-time, the LTC3809-1 will begin to skip
cycles (unless forced continuous mode is selected). The
output voltage will continue to be regulated, but the ripple
current and ripple voltage will increase. The minimum on-
timefortheLTC3809-1istypicallyabout210ns. However,
as the peak sense voltage (IL(PEAK) • RDS(ON)) decreases,
the minimum on-time gradually increases up to about
260ns. This is of particular concern in forced continuous
applications with low ripple current at light loads. If forced
continuousmodeisselectedandthedutycyclefallsbelow
the minimum on time requirement, the output will be
regulated by overvoltage protection.
4) Transition losses apply to the external MOSFET and
increase with higher operating frequencies and input
voltages. Transition losses can be estimated from:
Transition Loss = 2 • VIN2 • IO(MAX) • CRSS • f
Other losses, including CIN and COUT ESR dissipative
lossesandinductorcorelosses,generallyaccountforless
than 2% total additional loss.
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
oftenusefultoanalyzeindividuallossestodeterminewhat
is limiting efficiency and which change would produce the
most improvement. Efficiency can be expressed as:
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equalto(∆ILOAD)•(ESR), whereESRistheeffectiveseries
resistance of COUT. ∆ILOAD also begins to charge or
dischargeCOUT generatingafeedbackerrorsignalusedby
the regulator to return VOUT to its steady-state value.
During this recovery time, VOUT can be monitored for
overshoot or ringing that would indicate a stability prob-
lem. OPTI-LOOP compensation allows the transient re-
sponse to be optimized over a wide range of output
capacitance and ESR values.
Efficiency = 100% – (L1 + L2 + L3 + …)
whereL1, L2, etc. aretheindividuallossesasapercentage
of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC3809-1 circuits: 1) LTC3809-1 DC bias
current, 2) MOSFET gate charge current, 3) I2R losses
and 4) transition losses.
1) The VIN (pin) current is the DC supply current, given in
the Electrical Characteristics, which excludes MOSFET
driver currents. VIN current results in a small loss that
increases with VIN.
The ITH series RC-CC filter (see Functional Diagram) sets
the dominant pole-zero loop compensation.
The ITH external components showed in the figure on the
firstpageofthisdatasheetwillprovideadequatecompen-
sation for most applications. The values can be modified
slightly (from 0.2 to 5 times their suggested values) to
optimize transient response once the final PC layout is
done and the particular output capacitor type and value
have been determined. The output capacitor needs to be
decided upon because the various types and values deter-
mine the loop feedback factor gain and phase. An output
2) MOSFETgatechargecurrentresultsfromswitchingthe
gate capacitance of the power MOSFET. Each time a
MOSFET gate is switched from low to high to low again, a
packet of charge dQ moves from VIN to ground. The
resulting dQ/dt is a current out of VIN, which is typically
much larger than the DC supply current. In continuous
mode, IGATECHG = f • QP.
38091f
19
LTC3809-1
W U U
U
APPLICATIO S I FOR ATIO
current pulse of 20% to 100% of full load current having
a rise time of 1µs to 10µs will produce output voltage and
ITH pin waveforms that will give a sense of the overall loop
stability. The gain of the loop will be increased by increas-
ing RC and the bandwidth of the loop will be increased by
decreasing CC. The output voltage settling behavior is
related to the stability of the closed-loop system and will
demonstrate the actual overall supply performance. For a
detailedexplanationofoptimizingthecompensationcom-
ponents, including a review of control loop theory, refer to
Application Note 76.
A 0.032Ω P-channel MOSFET in Si7540DP is close to
this value.
TheN-channelMOSFETinSi7540DPhas0.017ΩRDS(ON)
The short circuit current is:
.
90mV
0.017Ω
ISC
=
= 5.3A
So the inductor current rating should be higher than 5.3A.
The LTC3809-1 operates at a frequency of 550kHz. For
continuousBurstModeoperationwith600mAIRIPPLE, the
required minimum inductor value is:
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
dischargedbypasscapacitorsareeffectivelyputinparallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25) •
(CLOAD). Thus a 10µF capacitor would be require a 250µs
rise time, limiting the charging current to about 200mA.
⎛
⎞
1.8V
550kHz • 600mA
1.8V
2.75V
LMIN
=
• 1−
= 1.88µH
⎜
⎟
⎝
⎠
A 6A 2.2µH inductor works well for this application.
CIN will require an RMS current rating of at least 1A at
temperature. A COUT with 0.1Ω ESR will cause approxi-
mately 60mV output ripple.
Design Example
PC Board Layout Checklist
As a design example, assume VIN will be operating from a
maximum of 4.2V down to a minimum of 2.75V (powered
by a single lithium-ion battery). Load current requirement
is a maximum of 2A, but most of the time it will be in a
standby mode requiring only 2mA. Efficiency at both low
andhighloadcurrentsisimportant. BurstModeoperation
at light loads is desired. Output voltage is 1.8V. The IPRG
pin will be left floating, so the maximum current sense
threshold ∆VSENSE(MAX) is approximately 125mV.
When laying out the printed circuit board, use the
following checklist to ensure proper operation of the
LTC3809-1.
• The power loop (input capacitor, MOSFET, inductor,
output capacitor) should be as small as possible and
isolated as much as possible from LTC3809-1.
• Put the feedback resistors close to the VFB pins. The ITH
compensation components should also be very close to
the LTC3809-1.
VOUT
Maximum Duty Cycle =
From Figure 1, SF = 82%.
= 65.5%
• The current sense traces should be Kelvin connections
right at the P-channel MOSFET source and drain.
V
IN(MIN)
• Keeping the switch node (SW) and the gate driver nodes
(TG,BG)awayfromthesmall-signalcomponents,espe-
cially the feedback resistors, and ITH compensation
components.
∆VSENSE(MAX)
IOUT(MAX) • ρT
5
6
RDS(ON)MAX = • 0.9 • SF •
= 0.032Ω
38091f
20
LTC3809-1
U
TYPICAL APPLICATIO S
V
IN
2.75V TO 8V
10µF
1
6
MODE
IPRG
9
8
V
IN
MP
Si7540DP
L
TG
1.5µH
C
ITH
V
2.5V
(5A AT 5V
R
15k
OUT
ITH
220pF
LTC3809EDD-1
4
2
10
7
)
I
SW
BG
IN
TH
MN
TRACK/SS
Si7540DP
187k
+
3
5
C
OUT
RUN
V
GND
11
FB
150µF
59k
100pF
38091 F08
L: VISHAY IHLP-2525CZ-01
: SANYO 4TPB150MC
C
OUT
Figure 8. 550kHz, Synchronous DC/DC Converter with Internal Soft-Start
V
IN
2.75V TO 8V
10µF
1
6
MODE
IPRG
9
8
V
IN
MP
Si3447BDV
TG
L
470pF
1.5µH
15k
LTC3809EDD-1
4
2
10
7
V
OUT
SW
BG
I
TH
1.8V
2A
10nF
MN
Si3460DV
TRACK/SS
C
22µF
OUT
118k
3
5
V
RUN
FB
GND
11
x2
D
(OPT)
59k
100pF
38091 F09
L: VISHAY IHLP-2525CZ-01
D: ON SEMI MBRM120LT3 (OPTIONAL)
Figure 9. 550kHz, Synchronous DC/DC Converter with External Soft-Start, Ceramic Output Capacitor
38091f
21
LTC3809-1
TYPICAL APPLICATIO S
U
Synchronous DC/DC Converter with Output Tracking
V
IN
2.75V TO 8V
1
10µF
MODE
IPRG
9
8
V
IN
6
MP
TG
Si7540DP
L
1.5µH
V
1.8V
(5A AT 5V
OUT
220pF
Vx
15k
LTC3809EDD-1
4
2
10
7
I
SW
BG
TH
)
IN
1.18k
MN
Si7540DP
TRACK/SS
+
590Ω
C
OUT
150µF
118k
3
5
V
RUN
FB
GND
11
59k
100pF
38091 TA03
L: VISHAY IHLP-2525CZ-01
C : SANYO 4TPB150MC
OUT
V < Vx
OUT
U
PACKAGE DESCRIPTIO
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698)
R = 0.115
TYP
6
0.38 ± 0.10
10
0.675 ±0.05
3.50 ±0.05
2.15 ±0.05 (2 SIDES)
1.65 ±0.05
3.00 ±0.10
(4 SIDES)
1.65 ± 0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PACKAGE
OUTLINE
(DD10) DFN 1103
5
1
0.25 ± 0.05
0.50 BSC
0.75 ±0.05
0.200 REF
0.25 ± 0.05
0.50
BSC
2.38 ±0.10
(2 SIDES)
2.38 ±0.05
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON
ANY SIDE
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION
OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS
OF VARIATION ASSIGNMENT
5. EXPOSED PAD SHALL BE SOLDER PLATED
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
38091f
22
LTC3809-1
U
PACKAGE DESCRIPTIO
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.06 0.102
(.081 .004)
2.794 0.102
(.110 .004)
0.889 0.127
(.035 .005)
1
1.83 0.102
(.072 .004)
5.23
(.206)
MIN
2.083 0.102 3.20 – 3.45
(.082 .004) (.126 – .136)
10
0.50
(.0197)
BSC
0.305 0.038
(.0120 .0015)
TYP
3.00 0.102
(.118 .004)
(NOTE 3)
0.497 0.076
(.0196 .003)
REF
10 9
8
7 6
RECOMMENDED SOLDER PAD LAYOUT
3.00 0.102
(.118 .004)
(NOTE 4)
4.90 0.152
(.193 .006)
DETAIL “A”
0.254
(.010)
0 – 6 TYP
1
2
3
4 5
GAUGE PLANE
0.53 0.152
(.021 .006)
0.86
(.034)
REF
1.10
(.043)
MAX
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.127 0.076
(.005 .003)
MSOP (MSE) 0603
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
38091f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
23
LTC3809-1
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1628/LTC3728 Dual High Efficiency, 2-Phase Synchronous
Step Down Controllers
Constant Frequency, Standby, 5V and 3.3V LDOs, V to 36V,
28-Lead SSOP
IN
LTC1735
High Efficiency Synchronous Step-Down Controller
Burst Mode Operation, 16-Pin Narrow SSOP, Fault Protection,
3.5V ≤ V ≤ 36V
IN
LTC1773
LTC1778
Synchronous Step-Down Controller
2.65V ≤ V ≤ 8.5V, I
Up to 4A, 10-Lead MSOP
OUT
IN
No R
, Synchronous Step-Down Controller
Current Mode Operation Without Sense Resistor,
Fast Transient Response, 4V ≤ V ≤ 36V
SENSE
IN
LTC1872
LTC3411
Constant Frequency Current Mode Step-Up Controller
1.25A (I ), 4MHz, Synchronous Step-Down DC/DC Converter
2.5V ≤ V ≤ 9.8V, SOT-23 Package, 550kHz
IN
95% Efficiency, V : 2.5V to 5.5V, V
= 0.8V, I = 60mA,
Q
OUT
IN
OUT
I
= <1mA, MS Package
SD
LTC3412
LTC3416
LTC3418
2.5A (I ), 4MHz, Synchronous Step-Down DC/DC Converter
95% Efficiency, V : 2.5V to 5.5V, V
= 0.8V, I = 60mA,
Q
OUT
IN
OUT
I
= <1mA, TSSOP-16E Package
SD
4A, 4MHz, Monolithic Synchronous Step-Down Regulator
8A, 4MHz, Monolithic Synchronous Regulator
Tracking Input to Provide Easy Supply Sequencing,
2.25V ≤ V ≤ 5.5V, 20-Lead TSSOP Package
IN
Tracking Input to Provide Easy Supply Sequencing,
2.25V ≤ V ≤ 5.5V, QFN Package
IN
LTC3701
LTC3708
2-Phase, Low Input Voltage Dual Step-Down DC/DC Controller
2.5V ≤ V ≤ 9.8V, 550kHz, PGOOD, PLL, 16-Lead SSOP
IN
2-Phase, No R
, Dual Synchronous Controller with
Constant On-Time Dual Controller, V Up to 36V, Very Low
SENSE
IN
Output Tracking
Duty Cycle Operation, 5mm × 5mm QFN Package
LTC3736
2-Phase, No R
Output Tracking
, Dual Synchronous Controller with
2.75V ≤ V ≤ 9.8V, 0.6V ≤ V
≤ V , 4mm × 4mm QFN
OUT IN
SENSE
IN
LTC3736-1
Low EMI, 2-Phase, No R
Output Tracking
, Dual Synchronous Controller with
SENSE
Integrated Spread Spectrum for 20dB Lower “Noise,”
2.75V ≤ V ≤ 9.8V
IN
LTC3737
LTC3772
2-Phase, No R
, Dual DC/DC Controller with Output Tracking
2.75V ≤ V ≤ 9.8V, 0.6V ≤ V
≤ V , 4mm × 4mm QFN
SENSE
IN
OUT IN
Micropower, No R
, Constant Frequency Step-Down Controller 40µA No-Load I , Non-Synchronous, 2.75V ≤ V ≤ 9.8V,
SENSE Q IN
550kHz, 3mm × 2mm DFN or 8-Lead TSOT-23 Packages.
LTC3776
Dual, 2-Phase, No R
Memory Termination
, Synchronous Controller for DDR/QDR
Provides V and V with One IC, 2.75V ≤ V ≤ 9.8V,
SENSE
DDQ
TT
IN
Adjustable Constant Frequency with PLL Up to 850kHz,
Spread Spectrum Operation, 4mm × 4mm QFN and 24-Lead
SSOP Packages
LTC3808
LTC3809
No R
No R
Low EMI, Synchronous Controller with Output Tracking 2.75V ≤ V ≤ 9.8V, 4mm × 3mm DFN, Spread Spectrum for
SENSE,
IN
20dB Lower Peak Noise
Low EMI, Synchronous DC/DC Controller
2.75V ≤ V ≤ 9.8V, 3mm × 3mm DFN, Spread Spectrum for
SENSE,
IN
20dB Lower Peak Noise
PolyPhase is a trademark of Linear Technology Corporation
.
38091f
LT/TP 0405 500 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
24
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2005
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