LTC3809EMSE-1 [Linear]
No RSENSETM, Low Input Voltage, Synchronous DC/DC Controller with Output Tracking; 没有RSENSETM ，低输入电压，同步DC /与输出跟踪DC控制器
| 型号： | LTC3809EMSE-1 |
| 厂家： | 
Linear |
| 描述： | No RSENSETM, Low Input Voltage, Synchronous DC/DC Controller with Output Tracking |
| 文件： | 总24页 (文件大小：255K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3809-1
No RSENSETM, Low Input
Voltage, Synchronous DC/DC
Controller with Output Tracking
FEATURES
DESCRIPTION
The LTC®3809-1 is a synchronous step-down switching
regulator controller that drives external complementary
power MOSFETs using few external components. The
constantfrequencycurrentmodearchitecturewithMOSFET
n
Programmable Output Voltage Tracking
n
No Current Sense Resistor Required
n
Constant Frequency Current Mode Operation for
Excellent Line and Load Transient Response
n
Wide V Range: 2.75V to 9.8V
V
sensingeliminatestheneedforacurrentsenseresistor
IN
DS
n
Wide V
Range: 0.6V to V
and improves efficiency.
OUT
IN
n
n
n
0.6V 1.5% Reference
Optional Burst Mode operation provides high efficiency
operation at light loads. 100% duty cycle provides low
dropout operation, extending operating time in battery-
poweredsystems.BurstModeisinhibitedwhentheMODE
pin is pulled low to reduce noise and RF interference.
Low Dropout Operation: 100% Duty Cycle
Selectable Burst Mode®/Pulse-Skipping/Forced
Continuous Operation
Auxiliary Winding Regulation
Internal Soft-Start Circuitry
n
n
n
n
n
n
The LTC3809-1 allows either coincident or ratiometric
output voltage tracking. Switching frequency is fixed at
550kHz. Fault protection is provided by an overvoltage
comparator and a short-circuit current limit comparator.
Selectable Maximum Peak Current Sense Threshold
Output Overvoltage Protection
Micropower Shutdown: I = 9μA
Q
Tiny Thermally Enhanced Leadless (3mm × 3mm)
DFN and 10-lead MSOP Packages
The LTC3809-1 is available in tiny footprint thermally
enhanced DFN and 10-lead MSOP packages.
APPLICATIONS
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Burst
is a registered trademark of Linear Technology Corporation. No R
Linear Technology Corporation. All other trademarks are the property of their respective
owners. Protected by U.S. Patents including 5481178, 5929620, 6580258, 6304066,
5847554, 6611131, 6498466. Other Patents pending.
n
is a trademark of
SENSE
1- or 2-Cell Lithium-Ion Powered Devices
n
Notebook and Palmtop Computers, PDAs
n
Portable Instruments
Distributed DC Power Systems
n
TYPICAL APPLICATION
Efficiency and Power Loss vs Load Current
High Efficiency, 550kHz Step-Down Converter
100
90
80
70
60
50
10k
EFFICIENCY
V
IN
2.75V TO 9.8V
V
= 3.3V
IN
10μF
1k
V
IN
IPRG
V
= 4.2V
V
= 5V
IN
IN
100
10
MODE
TG
59k
LTC3809-1
2.2μH
47μF
V
2.5V
2A
OUT
TYPICAL POWER
LOSS (V = 4.2V)
V
SW
BG
FB
15k
IN
I
TH
187k
RUN
470pF
1
GND
FIGURE 8 CIRCUIT
V
= 2.5V
OUT
38091 TA01
0.1
10k
1
10
100
1k
LOAD CURRENT (mA)
38091 TA02
38091fc
1
LTC3809-1
(Note 1)
ABSOLUTE MAXIMUM RATINGS
Input Supply Voltage (V )........................ –0.3V to 10V
Storage Ambient Temperature Range
IN
RUN, TRACK/SS, MODE,
DFN....................................................–65°C to 125°C
MSOP ................................................–65°C to 150°C
Junction Temperature (Note 3) ............................ 125°C
Lead Temperature (Soldering, 10 sec)
IPRG Voltages............................... –0.3V to (V + 0.3V)
IN
V , I Voltages...................................... –0.3V to 2.4V
FB TH
SW Voltage ......................... –2V to V + 1V (10V Max)
IN
TG, BG Peak Output Current (<10μs)......................... 1A
MSOP Package ................................................. 300°C
Operating Temperature Range (Note 2)....–40°C to 85°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
MODE
1
2
3
4
5
10 SW
MODE
1
2
3
4
5
10 SW
TRACK/SS
9
8
7
6
V
IN
TRACK/SS
9
8
7
6
V
IN
V
TH
RUN
TG
11
11
V
FB
TG
FB
I
BG
IPRG
I
BG
TH
RUN
IPRG
MSE PACKAGE
10-LEAD PLASTIC MSOP
DD PACKAGE
T
= 125°C, θ = 40°C/W
JA
EXPOSED PAD (PIN 11) IS GND
(MUST BE SOLDERED TO PCB)
JMAX
10-LEAD (3mm s 3mm) PLASTIC DFN
T
= 125°C, θ = 43°C/W
JA
EXPOSED PAD (PIN 11) IS GND
(MUST BE SOLDERED TO PCB)
JMAX
ORDER INFORMATION
LEAD FREE FINISH
LTC3809EDD-1#PBF
LTC3809IDD-1#PBF
LTC3809EMSE-1#PBF
LTC3809IMSE-1#PBF
LEAD BASED FINISH
LTC3809EDD-1
TAPE AND REEL
PART MARKING*
LBQZ
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 85°C
LTC3809EDD-1#TRPBF
LTC3809IDD-1#TRPBF
10-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic DFN
10-Lead Plastic MSOP
LBQZ
–40°C to 85°C
LTC3809EMSE-1#TRPBF LTBQV
LTC3809IMSE-1#TRPBF LTBQV
–40°C to 85°C
10-Lead Plastic MSOP
–40°C to 85°C
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 85°C
LTC3809EDD-1#TR
LTC3809IDD-1#TR
LTC3809EMSE-1#TR
LTC3809IMSE-1#TR
LBQZ
LBQZ
LTBQV
LTBQV
10-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic DFN
10-Lead Plastic MSOP
LTC3809IDD-1
–40°C to 85°C
LTC3809EMSE-1
–40°C to 85°C
LTC3809IMSE-1
10-Lead Plastic MSOP
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
38091fc
2
LTC3809-1
ELECTRICAL CHARACTERISTICS The l indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 4.2V unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Main Control Loops
Input DC Supply Current
Normal Operation
Sleep Mode
(Note 4)
350
105
9
500
150
20
μA
μA
μA
μA
Shutdown
RUN = 0V
UVLO
V
= UVLO Threshold –200mV
9
20
IN
l
l
Undervoltage Lockout Threshold (UVLO)
V
V
Falling
Rising
1.95
2.15
2.25
2.45
2.55
2.75
V
V
IN
IN
Shutdown Threshold of RUN Pin
Start-Up Current Source
0.8
0.65
0.591
1.1
1
1.4
1.35
0.609
0.04
V
μA
TRACK/SS = 0V
(Note 5)
l
Regulated Feedback Voltage
Output Voltage Line Regulation
Output Voltage Load Regulation
0.6
0.01
V
2.75V < V < 9.8V (Note 5)
%/V
IN
I
TH
I
TH
= 0.9V (Note 5)
= 1.7V
0.1
–0.1
0.5
–0.5
%
%
V
Input Current
(Note 5)
9
0.68
20
50
nA
V
FB
Overvoltage Protect Threshold
Overvoltage Protect Hysteresis
Auxiliary Feedback Threshold
Top Gate (TG) Drive Rise Time
Top Gate (TG) Drive Fall Time
Bottom Gate (BG) Drive Rise Time
Bottom Gate (BG) Drive Fall Time
Maximum Current Sense Voltage (ΔV
Measured at V
0.66
0.7
FB
mV
V
0.325
0.4
40
0.475
C = 3000pF
L
ns
ns
ns
ns
C = 3000pF
L
40
C = 3000pF
L
50
C = 3000pF
L
40
l
l
l
IPRG = Floating (Note 6)
IPRG = 0V (Note 6)
IPRG = V (Note 6)
110
70
185
125
85
204
140
100
223
mV
mV
mV
)
SENSE(MAX)
(V – SW)
IN
IN
Soft-Start Time (Internal)
Oscillator Frequency
Time for V to Ramp from 0.05V to 0.55V
0.5
0.74
550
0.9
ms
FB
480
600
kHz
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 3: T is calculated from the ambient temperature TA and power
J
dissipation P according to the following formula:
D
T = T + (P • θ °C/W)
J
A
D
JA
Note 4: Dynamic supply current is higher due to gate charge being
Note 2: The LTC3809E-1 is guaranteed to meet specified performance
from 0°C to 85°C. Specifications over the –40°C to 85°C operating range
are assured by design characterization, and correlation with statistical
process controls. The LTC3809I-1 is guaranteed to meet specified
performance over the full –40°C to 85°C operating temperature range.
delivered at the switching frequency.
Note 5: The LTC3809-1 is tested in a feedback loop that servos I to
a specified voltage and measures the resultant V voltage.
Note 6: Peak current sense voltage is reduced dependent on duty cycle
TH
FB
to a percentage of value as shown in Figure 1.
38091fc
3
LTC3809-1
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Maximum Current Sense Voltage
vs ITH Pin Voltage
Efficiency vs Load Current
Efficiency vs Load Current
100
80
60
40
20
0
100
95
90
85
80
75
70
65
60
100
95
90
85
80
75
70
65
60
55
50
FIGURE 8 CIRCUIT
FIGURE 8 CIRCUIT
Burst Mode OPERATION
V
= 2.5V
OUT
V
= 5V, V
= 2.5V
(I RISING)
IN
OUT
TH
Burst Mode OPERATION
V
= 3.3V
(I FALLING)
OUT
TH
FORCED CONTINUOUS
MODE
BURST MODE
(MODE = V
)
PULSE SKIPPING
MODE
IN
V
OUT
= 1.2V
FORCED
CONTINUOUS
(MODE = 0V)
V
= 1.8V
OUT
PULSE SKIPPING
(MODE = 0.6V)
MODE = V
IN
V
= 5V
IN
–20
0.5
1
I
1.5
VOLTAGE (V)
2
1
10
100
1k
10k
1
10
100
1k
10k
LOAD CURRENT (mA)
LOAD CURRENT (mA)
TH
38091 G01
38091 G02
38091 G03
Load Step
(Burst Mode Operation)
Load Step
(Forced Continuous Mode)
Load Step
(Pulse-Skipping Mode)
V
V
V
OUT
OUT
OUT
200mV/DIV
200mV/DIV
200mV/DIV
AC COUPLED
AC COUPLED
AC COUPLED
I
I
I
L
L
L
2A/DIV
2A/DIV
2A/DIV
38091 G04
38091 G05
38091 G06
100μs/DIV
100μs/DIV
100μs/DIV
V
V
= 3.3V
V
V
= 3.3V
V
= 3.3V
IN
IN
IN
= 1.8V
= 1.8V
V
= 1.8V
OUT
OUT
OUT
LOAD
I
= 300mA TO 3A
I
= 300mA TO 3A
I
= 300mA TO 3A
LOAD
MODE = V
FIGURE 8 CIRCUIT
LOAD
MODE = 0V
FIGURE 8 CIRCUIT
MODE = V
FB
IN
FIGURE 8 CIRCUIT
Start-Up with Internal Soft-Start
(TRACK/SS = VIN)
Start-Up with External Soft-Start
(CSS = 10nF)
V
V
OUT
OUT
1.8V
1.8V
500mV/DIV
500mV/DIV
38091 G07
38091 G08
200μs/DIV
1ms/DIV
V
= 4.2V
LOAD
V
= 4.2V
LOAD
IN
IN
R
= 1
R
= 1
FIGURE 8 CIRCUIT
FIGURE 8 CIRCUIT
38091fc
4
LTC3809-1
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Start-Up with Coincident Tracking
(VOUT = 0V at 0s)
Start-Up with Coincident Tracking
(VOUT = 0.8V at 0s)
Start-Up with Ratiometric Tracking
(VOUT = 0V at 0s)
V
V
V
x
2.5V
x
x
2.5V
2.5V
V
V
V
OUT
OUT
OUT
1.8V
1.8V
1.8V
500mV/DIV
500mV/DIV
500mV/DIV
38091 G09
38091 G10
38091 G11
10ms/DIV
10ms/DIV
10ms/DIV
V
R
R
= 4.2V
= 590
V
R
R
= 4.2V
= 590
V
R
R
= 4.2V
= 590
IN
TA
TB
IN
TA
TB
IN
TA
TB
= 1.18k
= 1.18k
= 1.69k
FIGURE 8 CIRCUIT
FIGURE 8 CIRCUIT
FIGURE 8 CIRCUIT
Regulated Feedback Voltage
vs Temperature
Undervoltage Lockout Threshold
vs Temperature
Shutdown (RUN) Threshold
vs Temperature
2.55
2.50
2.45
2.40
2.35
2.30
2.25
2.20
2.15
1.20
1.15
1.10
1.05
1.00
0.606
0.604
0.602
0.600
0.598
0.596
0.594
V
RISING
IN
V
FALLING
IN
40 60
TEMPERATURE (°C)
40 60
40 60
TEMPERATURE (°C)
–60 –40 –20
0
20
80 100
–60 –40 –20
0
20
80 100
–60 –40 –20
0
20
80 100
TEMPERATURE (°C)
38091 G012
38091 G13
38091 G14
Maximum Current Sense
Threshold vs Temperature
TRACK/SS Start-Up Current
vs Temperature
1.04
1.02
1.00
0.98
0.96
0.94
135
130
125
120
115
IPRG = FLOAT
TRACK/SS = 0V
40 60
TEMPERATURE (°C)
40 60
TEMPERATURE (°C)
–60 –40 –20
0
20
80 100
–60 –40 –20
0
20
80 100
38091 G15
38091 G16
38091fc
5
LTC3809-1
TA = 25°C, unless otherwise noted.
TYPICAL PERFORMANCE CHARACTERISTICS
Oscillator Frequency
vs Temperature
Oscillator Frequency
vs Input Voltage
Shutdown Quiescent Current
vs Input Voltage
10
8
5
4
18
16
14
12
10
8
6
3
4
2
2
1
0
0
–2
–4
–6
–8
–10
–1
–2
–3
–4
–5
6
4
2
0
40 60
TEMPERATURE (°C)
7
8
7
8
–60 –40 –20
0
20
80 100
2
3
4
5
6
9
10
2
3
4
5
6
9
10
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
38091 G17
38091 G18
38091 G19
TRACK/SS Start-Up Current
vs TRACK/SS Voltage
Sleep Current vs Input Voltage
130
120
110
100
90
1.04
1.00
0.96
0.92
0.88
0.84
80
70
7
8
0.5 0.6
TRACK/SS VOLTAGE (V)
2
3
4
5
6
9
10
0
0.1 0.2 0.3 0.4
0.7
INPUT VOLTAGE (V)
38091 G20
38091 G21
38091fc
6
LTC3809-1
PIN FUNCTIONS
MODE(Pin1):Thispinperformstwofunctions:1)auxiliary
winding feedback input, and 2) Burst Mode operation,
pulse skipping or forced continuous mode select.
IPRG (Pin 6): Three-State Pin to Select Maximum Peak
Sense Voltage Threshold. This pin selects the maximum
allowed voltage drop between the V and SW pins
IN
(i.e., the maximum allowed drop across the external
To select Burst Mode operation at light loads, tie this
P-channel MOSFET). Tie to V , GND or float to select
IN
pin to V . Grounding this pin selects forced continuous
IN
204mV, 85mV or 125mV respectively.
operation which allows the inductor current to reverse.
Tying this pin to V selects pulse-skipping mode. Do not
BG (Pin 7): Bottom (NMOS) Gate Drive Output. This pin
FB
leave this pin floating.
drives the gate of the external N-channel MOSFET. This
pin has an output swing from PGND to V .
IN
TRACK/SS (Pin 2): Tracking Input for the Controller or
Optional External Soft-Start Input. This pin allows the
TG (Pin 8): Top (PMOS) Gate Drive Output. This pin drives
start-up of V
to “track” the external voltage at this pin
the gate of the external P-channel MOSFET. This pin has
OUT
using an external resistor divider. Tying this pin to V
an output swing from PGND to V .
IN
IN
allows V
to start up with the internal 0.74ms soft-start.
OUT
V
(Pin 9): Chip Signal Power Supply. This pin powers
IN
An external soft-start can be programmed by connecting
a capacitor between this pin and ground. Do not leave
this pin floating.
the entire chip, the gate drivers and serves as the positive
input to the differential current comparator.
SW (Pin 10): Switch Node Connection to Inductor. This
pin is also the negative input to the differential current
comparatorandaninputtothereversecurrentcomparator.
Normally this pin is connected to the drain of the external
P-channel MOSFET, the drain of the external N-channel
MOSFET and the inductor.
V
(Pin 3): Feedback Pin. This pin receives the remotely
FB
sensedfeedbackvoltageforthecontrollerfromanexternal
resistor divider across the output.
I
(Pin 4): Current Threshold and Error Amplifier
TH
Compensation Point. Nominal operating range on this pin
is from 0.7V to 2V. The voltage on this pin determines the
threshold of the main current comparator.
GND (Exposed Pad, Pin 11): Ground connection for
internal circuits, the gate drivers and the negative input to
the reverse current comparator. The Exposed Pad must
be soldered to the PCB ground.
RUN (Pin 5): Run Control Input. Forcing this pin below
1.1V shuts down the chip. Driving this pin to V or
IN
releasing this pin enables the chip to start-up with the
internal soft-start.
38091fc
7
LTC3809-1
FUNCTIONAL DIAGRAM
V
IN
C
IN
9
V
IN
6
IPRG
VOLTAGE
REFERENCE
V
REF
0.6V
SLOPE
+
TG
SW
BG
CLK
S
R
8
10
7
MP
MN
+
–
Q
GND
ICMP
UNDERVOLTAGE
LOCKOUT
SWITCHING
LOGIC AND
BLANKING
CIRCUIT
SENSE
L
ANTI-SHOOT-
THROUGH
V
OUT
C
OUT
OSC
V
IN
PV
IN
V
IN
UVSD
0.7μA
RUN
5
+
–
FCB
SLEEP
V
IN
t = 0.74ms
INTERNAL
SOFT-START
+
–
0.15V
OV
REV
I
0.68V
0.54V
BURSTDIS
R
B
GND
11
2
0.3V
1μA
+
–
MUX
TRK/SS
TRACK/SS
MODE
UV
V
FB
BURSTDIS
FCB
BURST DEFEAT
I
TH
1
4
+
R
C
V
REF
0.6V
TRK/SS
+
+
–
C
C
–
EAMP
V
FB
3
R
A
38091 FD
SW
+
–
I
RICMP
REV
GND
38091fc
8
LTC3809-1
(Refer to Functional Diagram)
OPERATION
Main Control Loop
by releasing the RUN pin, the TRACK/SS pin is charged up
by an internal 1μA current source and rises linearly from
0V to above 0.6V. The error amplifier EAMP compares the
The LTC3809-1 uses a constant frequency, current mode
architecture. During normal operation, the top external
P-channel power MOSFET is turned on when the clock sets
the RS latch, and is turned off when the current comparator
(ICMP) resets the latch. The peak inductor current at which
ICMPresetstheRSlatchisdeterminedbythevoltageonthe
feedback signal V to this ramp instead, and regulates
FB
V
FB
linearly from 0V to 0.6V.
When the voltage on the TRACK/SS pin is less than the
0.6V internal reference, the LTC3809-1 regulates the V
FB
I
pin, which is driven by the output of the error amplifier
voltagetotheTRACK/SSpininsteadofthe0.6Vreference.
TH
(EAMP). The V pin receives the output voltage feedback
Therefore V of the LTC3809-1 can track an external
FB
OUT
signal from an external resistor divider. This feedback
signal is compared to the internal 0.6V reference voltage
by the EAMP. When the load current increases, it causes a
voltage V during start-up. Typically, a resistor divider on
X
V is connected to the TRACK/SS pin to allow the start-up
X
ofV
to“track”thatofV .Forcoincidenttrackingduring
OUT
X
slight decrease in V relative to the 0.6V reference, which
start-up, the regulated final value of V should be larger
FB
X
in turn causes the I voltage to increase until the average
than that of V , and the resistor divider on V has the
OUT X
TH
inductorcurrentmatchesthenewloadcurrent.Whilethetop
P-channelMOSFETisoff, thebottomN-channelMOSFETis
turned on until either the inductor current starts to reverse,
as indicated by the current reversal comparator IRCMP, or
the beginning of the next cycle.
same ratio as the divider on V
that is connected to V .
OUT FB
SeedetaileddiscussionsintheRunandSoft-Start/Tracking
Functions in the Applications Information Section.
Light Load Operation (Burst Mode Operation,
Continuous Conduction or Pulse-Skipping Mode)
(MODE Pin)
Shutdown, Soft-Start and Tracking Start-Up
(RUN and TRACK/SS Pins)
TheLTC3809-1canbeprogrammedforeitherhighefficiency
BurstModeoperation,forcedcontinuousconductionmode
or pulse-skipping mode at low load currents. To select
The LTC3809-1 is shut down by pulling the RUN pin low.
In shutdown, all controller functions are disabled and the
chip draws only 9μA. The TG output is held high (off) and
the BG output low (off) in shutdown. Releasing the RUN
pin allows an internal 0.7μA current source to pull up the
Burst Mode operation, tie the MODE pin to V . To select
IN
forced continuous operation, tie the MODE pin to a DC
voltage below 0.4V (e.g., GND). Tying the MODE pin to a
RUN pin to V . The controller is enabled when the RUN
DC voltage above 0.4V and below 1.2V (e.g., V ) enables
IN
FB
pin reaches 1.1V.
pulse-skipping mode. The 0.4V threshold between forced
continuous operation and pulse-skipping mode can be
used in secondary winding regulation as described in the
AuxiliaryWindingControlUsingtheMODEPindiscussion
in the Applications Information section.
The start-up of V
is based on the three different con-
OUT
nections on the TRACK/SS pin. The start-up of V
is
OUT
controlled by the LTC3809-1’s internal soft-start when
TRACK/SS is connected to V . During soft-start, the error
IN
amplifier EAMP compares the feedback signal V to the
When the LTC3809-1 is in Burst Mode operation, the peak
current in the inductor is set to approximately one-fourth
of the maximum sense voltage even though the voltage on
FB
internal soft-start ramp (instead of the 0.6V reference),
which rises linearly from 0V to 0.6V in about 1ms. This al-
lows the output voltage to rise smoothly from 0V to its final
value while maintaining control of the inductor current.
the I pin indicates a lower value. If the average induc-
TH
tor current is higher than the load current, the EAMP will
decrease the voltage on the I pin. When the I voltage
TH
TH
The 1ms soft-start time can be changed by connecting
drops below 0.85V, the internal SLEEP signal goes high
the optional external soft-start capacitor C between the
SS
and the external MOSFET is turned off.
TRACK/SS and GND pins. When the controller is enabled
38091fc
9
LTC3809-1
(Refer to Functional Diagram)
OPERATION
In sleep mode, much of the internal circuitry is turned off,
reducing the quiescent current that the LTC3809-1 draws.
The load current is supplied by the output capacitor. As
the output voltage decreases, the EAMP increases the
high as Burst Mode operation. During start-up or an
undervoltage condition (V ≤ 0.54V), the LTC3809-1
FB
operates in pulse-skipping mode (no current reversal
allowed), regardless of the state of the MODE pin.
I
voltage. When the I voltage reaches 0.925V, the
TH
TH
Short-Circuit and Current Limit Protection
SLEEP signal goes low and the controller resumes normal
operation by turning on the external P-channel MOSFET
on the next cycle of the internal oscillator.
The LTC3809-1 monitors the voltage drop ΔV (between
SC
the GND and SW pins) across the external N-channel
MOSFET with the short-circuit current limit comparator.
The allowed voltage is determined by:
When the controller is enabled for Burst Mode or pulse-
skipping operation, the inductor current is not allowed to
reverse. Hence, the controller operates discontinuously.
The reverse current comparator RICMP senses the
drain-to-source voltage of the bottom external N-channel
MOSFET.ThisMOSFETisturnedoffjustbeforetheinductor
current reaches zero, preventing it from going negative.
ΔV
= A • 90mV
SC(MAX)
where A is a constant determined by the state of the IPRG
pin. Floating the IPRG pin selects A = 1; tying IPRG to V
selects A = 5/3; tying IPRG to GND selects A = 2/3.
IN
The inductor current limit for short-circuit protection is
SC(MAX)
external N-channel MOSFET:
In forced continuous operation, the inductor current is
allowed to reverse at light loads or under large transient
conditions.Thepeakinductorcurrentisdeterminedbythe
determined by ΔV
and the on-resistance of the
voltage on the I pin. The P-channel MOSFET is turned
TH
ΔVSC(MAX)
ISC =
on every cycle (constant frequency) regardless of the I
TH
RDS(ON)
pin voltage. In this mode, the efficiency at light loads is
lower than in Burst Mode operation. However, continuous
mode has the advantages of lower output ripple and no
noise at audio frequencies.
Once the inductor current exceeds I , the short current
SC
comparator will shut off the external P-channel MOSFET
until the inductor current drops below I .
SC
When the MODE pin is set to the V Pin, the LTC3809-1
FB
Output Overvoltage Protection
operates in PWM pulse-skipping mode at light loads. In
this mode, the current comparator ICMP may remain
tripped for several cycles and force the external P-channel
MOSFET to stay off for the same number of cycles. The
inductor current is not allowed to reverse (discontinuous
operation). This mode, like forced continuous operation,
exhibits low output ripple as well as low audible noise
and reduced RF interference as compared to Burst Mode
operation. However, it provides low current efficiency
higher than forced continuous mode, but not nearly as
As further protection, the overvoltage comparator (OVP)
guardsagainsttransientovershoots,aswellasothermore
seriousconditionsthatmayovervoltagetheoutput. When
the feedback voltage on the V pin has risen 13.33%
FB
abovethereferencevoltageof0.6V,theexternalP-channel
MOSFETisturnedoffandtheN-channelMOSFETisturned
on until the overvoltage is cleared.
38091fc
10
LTC3809-1
(Refer to Functional Diagram)
OPERATION
Dropout Operation
where A is a constant determined by the state of the IPRG
pin. Floating the IPRG pin selects A = 1; tying IPRG to
IN
Whentheinputsupplyvoltage(V )approachestheoutput
IN
V
selects A = 5/3; tying IPRG to GND selects A = 2/3.
voltage,therateofchangeoftheinductorcurrentwhilethe
external P-channel MOSFET is on (ON cycle) decreases.
This reduction means that the P-channel MOSFET will
remainonformorethanoneoscillatorcycleiftheinductor
current has not ramped up to the threshold set by the
The maximum value of V is typically about 1.98V, so
ITH
the maximum sense voltage allowed across the external
P-channel MOSFET is 125mV, 85mV or 204mV for the
three respective states of the IPRG pin.
EAMP on the I pin. Further reduction in the input supply
However, once the controller’s duty cycle exceeds 20%,
slope compensation begins and effectively reduces the
peak sense voltage by a scale factor (SF) given by the
curve in Figure 1.
TH
voltage will eventually cause the P-channel MOSFET to be
turned on 100%; i.e., DC. The output voltage will then be
determined by the input voltage minus the voltage drop
across the P-channel MOSFET and the inductor.
Thepeakinductorcurrentisdeterminedbythepeaksense
voltage and the on-resistance of the external P-channel
MOSFET:
Undervoltage Lockout
To prevent operation of the P-channel MOSFET below
safe input voltage levels, an undervoltage lockout is
incorporated in the LTC3809-1. When the input supply
ΔVSENSE(MAX)
IPK =
RDS(ON)
voltage (V ) drops below 2.25V, the external P- and
IN
N-channel MOSFETs and all internal circuits are turned
off except for the undervoltage block, which draws only
a few microamperes.
110
100
90
80
70
60
50
40
30
20
10
0
Peak Current Sense Voltage Selection
and Slope Compensation (IPRG Pin)
When the LTC3809-1 controller is operating below 20%
duty cycle, the peak current sense voltage (between the
V and SW pins) allowed across the external P-channel
IN
MOSFET is determined by:
0
10 20 30 40 50 60 70 80 90 100
DUTY CYCLE (%)
VITH –0.7V
ΔVSENSE(MAX) = A •
38091 F01
10
Figure 1. Maximum Peak Current vs Duty Cycle
38091fc
11
LTC3809-1
APPLICATIONS INFORMATION
ThetypicalLTC3809-1applicationcircuitisshowninFigure
8.Externalcomponentselectionforthecontrollerisdriven
by the load requirement and begins with the selection of
the inductor and the power MOSFETs.
where I
is the inductor peak-to-peak ripple current
RIPPLE
(see Inductor Value Calculation).
A reasonable starting point is setting ripple current I
to be 40% of I
yields:
RIPPLE
. Rearranging the above equation
OUT(MAX)
Power MOSFET Selection
ΔVSENSE(MAX)
5
6
The LTC3809-1’s controller requires two external power
MOSFETs: a P-channel MOSFET for the topside (main)
switch and a N-channel MOSFET for the bottom (synchro-
nous) switch. The main selection criteria for the power
RDS(ON)MAX = •
for Duty Cycle <20%
IOUT(MAX)
However, for operation above 20% duty cycle, slope
compensation has to be taken into consideration to select
MOSFETs are the breakdown voltage V
, threshold
BR(DSS)
the appropriate value of R
amount of load current:
to provide the required
voltage V
, on-resistance R
RSS
, reverse transfer
DS(ON)
D(OFF)
DS(ON)
GS(TH)
capacitance C , turn-off delay t
and the total gate
charge Q .
G
ΔVSENSE(MAX)
5
6
RDS(ON)MAX = •SF •
The gate drive voltage is the input supply voltage. Since
theLTC3809-1isdesignedforoperationdowntolowinput
IOUT(MAX)
voltages, a sublogic level MOSFET (R
GS
guaranteed at
DS(ON)
where SF is a scale factor whose value is obtained from
the curve in Figure 1.
V
= 2.5V) is required for applications that work close to
thisvoltage.WhentheseMOSFETsareused,makesurethat
These must be further derated to take into account the
significantvariationinon-resistancewithtemperature.The
following equation is a good guide for determining the re-
the input supply to the LTC3809-1 is less than the absolute
maximum MOSFET V rating, which is typically 8V.
GS
The P-channel MOSFET’s on-resistance is chosen based
on the required load current. The maximum average load
quiredR
at25°C(manufacturer’sspecification),
DS(ON)MAX
allowing some margin for variations in the LTC3809-1 and
current I
is equal to the peak inductor current
OUT(MAX)
external component values:
minus half the peak-to-peak ripple current I
. The
RIPPLE
ΔVSENSE(MAX)
5
6
LTC3809-1’s current comparator monitors the drain-to-
RDS(ON)MAX = •0.9•SF •
source voltage V of the top P-channel MOSFET, which
IOUT(MAX) •ρT
DS
is sensed between the V and SW pins. The peak inductor
IN
currentislimitedbythecurrentthreshold,setbythevoltage
Theρ isanormalizingtermaccountingforthetemperature
T
on the I pin, of the current comparator. The voltage on
variationinon-resistance,whichistypicallyabout0.4%/°C,
TH
theI pinisinternallyclamped,whichlimitsthemaximum
as shown in Figure 2. Junction-to-case temperature T is
TH
JC
current sense threshold ΔV
to approximately
about 10°C in most applications. For a maximum ambi-
SENSE(MAX)
125mV when IPRG is floating (85mV when IPRG is tied
low; 204mV when IPRG is tied high).
ent temperature of 70°C, using ρ
equation is a reasonable choice.
~ 1.3 in the above
80°C
The output current that the LTC3809-1 can provide is
given by:
The N-channel MOSFET’s on resistance is chosen based
on the short-circuit current limit (I ). The LTC3809-
SC
1’s short-circuit current limit comparator monitors the
ΔVSENSE(MAX)
IRIPPLE
drain-to-source voltage V of the bottom N-channel
IOUT(MAX)
=
–
DS
RDS(ON)
2
MOSFET, which is sensed between the GND and SW pins.
38091fc
12
LTC3809-1
APPLICATIONS INFORMATION
2.0
VOUT
VIN
Top P-Channel Duty Cycle =
1.5
1.0
0.5
0
VIN − VOUT
Bottom N-Channel Duty Cycle =
VIN
The MOSFET power dissipations at maximum output
current are:
VOUT
2
2
PTOP
=
• IOUT(MAX) • ρT • RDS(ON) + 2 • V
IN
V
IN
50
100
–50
150
0
JUNCTION TEMPERATURE (°C)
• IOUT(MAX) • CRSS • f
38091 F02
V – VOUT
2
IN
PBOT
=
• IOUT(MAX) • ρT • RDS(ON)
Figure 2. RDS(ON) vs Temperature
V
IN
2
The short-circuit current sense threshold ΔV is set
Both MOSFETs have I R losses and the P
equation
SC
TOP
approximately 90mV when IPRG is floating (60mV when
IPRG is tied low; 150mV when IPRG is tied high). The
on-resistance of N-channel MOSFET is determined by:
includesanadditionaltermfortransitionlosses,whichare
largest at high input voltages. The bottom MOSFET losses
are greatest at high input voltage or during a short-circuit
when the bottom duty cycle is 100%.
ΔVSC
ISC(PEAK)
RDS(ON)MAX
=
The LTC3809-1 utilizes a non-overlapping, anti-shoot-
through gate drive control scheme to ensure that the
P- and N-channel MOSFETs are not turned on at the same
time. To function properly, the control scheme requires
that the MOSFETs used are intended for DC/DC switching
applications.ManypowerMOSFETs,particularlyP-channel
MOSFETs, are intended to be used as static switches and
therefore are slow to turn on or off.
The short-circuit current limit (I
) should be larger
SC(PEAK)
than the I
with some margin to avoid interfering
OUT(MAX)
with the peak current sensing loop. On the other hand,
in order to prevent the MOSFETs from excessive heating
and the inductor from saturation, I
should be
SC(PEAK)
smaller than the minimum value of their current ratings.
A reasonable range is:
Reasonable starting criteria for selecting the P-channel
MOSFET are that it must typically have a gate charge (Q )
G
I
< I
< I
OUT(MAX)
SC(PEAK) RATING(MIN)
less than 25nC to 30nC (at 4.5V ) and a turn-off delay
GS
Therefore,theon-resistanceofN-channelMOSFETshould
be chosen within the following range:
(t
) of less than approximately 140ns. However, due
D(OFF)
to differences in test and specification methods of various
MOSFET manufacturers, and in the variations in Q and
ΔVSC
IRATING(MIN)
ΔVSC
IOUT(MAX)
G
<RDS(ON)
<
t
withgatedrive(V )voltage,theP-channelMOSFET
D(OFF)
IN
ultimately should be evaluated in the actual LTC3809-1
application circuit to ensure proper operation.
where ΔV is 90mV, 60mV or 150mV with IPRG being
SC
floated, tied to GND or V respectively.
Shoot-through between the P-channel and N-channel
MOSFETs can most easily be spotted by monitoring the
inputsupplycurrent.Astheinputsupplyvoltageincreases,
if the input supply current increases dramatically, then the
likely cause is shoot-through. Note that some MOSFETs
IN
The power dissipated in the MOSFET strongly depends
on its respective duty cycles and load current. When the
LTC3809-1 is operating in continuous mode, the duty
cycles for the MOSFETs are:
38091fc
13
LTC3809-1
APPLICATIONS INFORMATION
that do not work well at high input voltages (e.g., V
5V) may work fine at lower voltages (e.g., 3.3V).
>
The corresponding average current depends on the
amount of ripple current. Lower inductor values (higher
RIPPLE
IN
I
) will reduce the load current at which Burst Mode
Selecting the N-channel MOSFET is typically easier, since
operation begins.
foragivenR
,thegatechargeandturn-onandturn-off
DS(ON)
delays are much smaller than for a P-channel MOSFET.
Theripplecurrentisnormallysetsothattheinductorcurrent
is continuous during the burst periods. Therefore,
Inductor Value Calculation
I
≤ I
BURST(PEAK)
RIPPLE
Given the desired input and output voltages, the inductor
This implies a minimum inductance of:
VIN – VOUT VOUT
fOSC •IBURST(PEAK) VIN
value and operating frequency, f , directly determine
OSC
the inductor’s peak-to-peak ripple current:
LMIN
≤
•
VOUT VIN – VOUT
IRIPPLE
=
•
VIN
fOSC •L
A smaller value than L
could be used in the circuit,
MIN
although the inductor current will not be continuous
during burst periods, which will result in slightly lower
efficiency. In general, though, it is a good idea to keep
Lower ripple current reduces core losses in the inductor,
ESR losses in the output capacitors and output voltage
ripple. Thus, highest efficiency operation is obtained at
low frequency with a small ripple current. Achieving this,
however, requires a large inductor.
I
comparable to I
.
RIPPLE
BURST(PEAK)
Inductor Core Selection
A reasonable starting point is to choose a ripple current
Once the value of L is known, the type of inductor must be
selected. Actual core loss is independent of core size for a
fixed inductor value, but is very dependent on the induc-
tance selected. As inductance increases, core losses go
down. Unfortunately, increased inductance requires more
turns of wire and therefore copper losses will increase.
that is about 40% of I . Note that the largest ripple
OUT(MAX)
current occurs at the highest input voltage. To guarantee
that ripple current does not exceed a specified maximum,
the inductor should be chosen according to:
VIN – VOUT VOUT
fOSC •IRIPPLE VIN
L ≥
•
Ferrite designs have very low core losses and are pre-
ferred at high switching frequencies, so design goals can
concentrate on copper loss and preventing saturation.
Ferrite core material saturates “hard”, which means that
inductancecollapsesabruptlywhenthepeakdesigncurrent
is exceeded. Core saturation results in an abrupt increase
in inductor ripple current and consequent output voltage
ripple. Do not allow the core to saturate!
Burst Mode Operation Considerations
The choice of R and inductor value also determines
DS(ON)
theloadcurrentatwhichtheLTC3809-1entersBurstMode
operation. When bursting, the controller clamps the peak
inductor current to approximately:
ΔVSENSE(MAX)
1
IBURST(PEAK) = •
4
RDS(ON)
38091fc
14
LTC3809-1
APPLICATIONS INFORMATION
Different core materials and shapes will change the size/
currentandprice/currentrelationshipofaninductor.Toroid
or shielded pot cores in ferrite or permalloy materials are
small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price vs size requirements and any
radiated field/EMI requirements. New designs for surface
mount inductors are available from Coiltronics, Coilcraft,
Toko and Sumida.
This formula has a maximum value at V = 2V , where
IN OUT
I
= I /2. This simple worst-case condition is com-
RMS
OUT
monlyusedfordesignbecauseevensignificantdeviations
donotoffermuchrelief.Notethatcapacitormanufacturer’s
ripplecurrentratingsareoftenbasedon2000hoursoflife.
This makes it advisable to further derate the capacitor or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may be paralleled to meet the
size or height requirements in the design. Due to the high
operatingfrequencyoftheLTC3809-1, ceramiccapacitors
can also be used for C . Always consult the manufacturer
IN
Schottky Diode Selection (Optional)
if there is any question.
The schottky diode D in Figure 9 conducts current dur-
ing the dead time between the conduction of the power
MOSFETs. This prevents the body diode of the bottom
N-channel MOSFET from turning on and storing charge
during the dead time, which could cost as much as 1%
in efficiency. A 1A Schottky diode is generally a good
size for most LTC3809-1 applications, since it conducts
a relatively small average current. Larger diode results
in additional transition losses due to its larger junction
capacitance. This diode may be omitted if the efficiency
loss can be tolerated.
The selection of C
is driven by the effective series
OUT
resistance (ESR). Typically, once the ESR requirement
is satisfied, the capacitance is adequate for filtering. The
output ripple (ΔV ) is approximated by:
OUT
⎛
⎞
1
ΔVOUT ≈ IRIPPLE • ESR +
⎜
⎟
⎠
8 • f • COUT
⎝
where f is the operating frequency, C
is the output
OUT
capacitance and I
is the ripple current in the induc-
RIPPLE
tor. The output ripple is highest at maximum input voltage
since I increase with input voltage.
RIPPLE
C and C
Selection
IN
OUT
Setting Output Voltage
In continuous mode, the source current of the P-channel
MOSFET is a square wave of duty cycle (V /V ). To
preventlargevoltagetransients, alowESRinputcapacitor
sized for the maximum RMS current must be used. The
maximum RMS capacitor current is given by:
The LTC3809-1 output voltage is set by an external
feedback resistor divider carefully placed across the
output, as shown in Figure 3. The regulated output voltage
is determined by:
OUT IN
⎛
⎝
⎞
RB
RA
1/2
VOUT = 0.6V • 1+
VOUT • V – V
(
)
⎜
⎟
⎠
IN
OUT
CIN RequiredIRMS ≈IMAX
•
VIN
38091fc
15
LTC3809-1
APPLICATIONS INFORMATION
For most applications, a 59k resistor is suggested for R .
Once the controller is enabled, the start-up of V
is con-
A
OUT
In applications where minimizing the quiescent current is
trolled by the state of the TRACK/SS pin. If the TRACK/SS
pin is connected to V , the start-up of V is controlled
critical, R should be made bigger to limit the feedback
A
IN
OUT
divider current. If R then results in very high impedance,
by internal soft-start, which slowly ramps the positive
B
it may be beneficial to bypass R with a 50pF to 100pF
reference to the error amplifier from 0V to 0.6V, allowing
B
capacitor C .
V
torisesmoothlyfrom0Vtoitsfinalvalue. Thedefault
OUT
FF
internal soft-start time is around 0.74ms. The soft-start
time can be changed by placing a capacitor between the
TRACK/SS pin and GND. In this case, the soft-start time
will be approximately:
V
OUT
R
C
FF
B
A
LTC3809-1
V
FB
600mV
R
tSS = CSS
•
1μA
38091 F03
where 1μA is an internal current source which is always on.
When the voltage on the TRACK/SS pin is less than the
Figure 3. Setting Output Voltage
internal 0.6V reference, the LTC3809-1 regulates the V
FB
Run and Soft-Start/Tracking Functions
voltage to the TRACK/SS pin voltage instead of 0.6V.
Therefore the start-up of V
can ratiometrically track
OUT
The LTC3809-1 has a low power shutdown mode which is
controlled by the RUN pin. Pulling the RUN pin below 1.1V
putstheLTC3809-1intoalowquiescentcurrentshutdown
an external voltage V , according to a ratio set by a resis-
X
tor divider at TRACK/SS pin (Figure 5a). The ratiometric
relation between V
and V is (Figure 5c):
OUT
X
mode (I = 9μA). Releasing the RUN pin, an internal 0.7μA
Q
(at V = 4.2V) current source will pull the RUN pin up
IN
IN
VOUT
VX
RTA RA +RB
•
=
to V , which enables the controller. The RUN pin can be
RA RTA +RTB
driven directly from logic as showed in Figure 4.
V
OUT
V
X
3.3V OR 5V
LTC3809-1
V
R
B
LTC3809-1
RUN
LTC3809-1
RUN
R
R
FB
TB
TA
R
A
TRACK/SS
38091 F04
38091 F5a
Figure 4. RUN Pin Interfacing
Figure 5a. Using the TRACK/SS Pin to Track VX
38091fc
16
LTC3809-1
APPLICATIONS INFORMATION
V
V
X
X
V
V
OUT
OUT
38091 F05b,c
TIME
TIME
(5b) Coincident Tracking
(5c) Ratiometric Tracking
Figure 5b and 5c. Two Different Modes of Output Voltage Tracking
For coincident tracking (V
= V during start-up),
Auxiliary Winding Control Using the MODE Pin
OUT
X
R
= R , R = R
B
The MODE pin can be used as an auxiliary feedback to
provide a means of regulating a flyback winding output.
When this pin drops below its ground-referenced 0.4V
threshold, continuous mode operation is forced.
TA
A
TB
V should always be greater than V
tracking function of TRACK/SS pin.
when using the
X
OUT
The internal current source (1μA), which is for external
soft-start, will cause a tracking error at V . For example,
if a 59k resistor is chosen for R , the R current will be
During continuous mode, current flows continuously in
the transformer primary side. The auxiliary winding draws
current only when the bottom synchronous N-channel
MOSFET is on. When primary load currents are low and/
OUT
TA
TA
about 10μA (600mV/59k). In this case, the 1μA internal
current source will cause about 10% (1μA/10μA • 100%)
tracking error, which is about 60mV (600mV • 10%)
or the V /V
ratio is close to unity, the synchronous
IN OUT
MOSFET may not be on for a sufficient amount of time to
transfer power from the output capacitor to the auxiliary
load.Forcedcontinuousoperationwillsupportanauxiliary
winding as long as there is a sufficient synchronous
MOSFET duty factor. The MODE input pin removes
the requirement that power must be drawn from the
transformer primary side in order to extract power from
the auxiliary winding. With the loop in continuous mode,
the auxiliary output may nominally be loaded without
regard to the primary output load.
referred to V . This is acceptable for most applications.
FB
If a better tracking accuracy is required, the value of R
TA
should be reduced.
Table 1 summarizes the different states in which the
TRACK/SS can be used.
Table 1. The States of the TRACK/SS Pin
TRACK/SS Pin
Capacitor C
FREQUENCY
External Soft-Start
Internal Soft-Start
SS
V
IN
Resistor Divider
V Tracking an External Voltage V
OUT X
38091fc
17
LTC3809-1
APPLICATIONS INFORMATION
TheauxiliaryoutputvoltageV isnormallyset,asshown
In a hard short (V
= 0V), the top P-channel MOSFET
AUX
OUT
in Figure 6, by the turns ratio N of the transformer:
is turned off and kept off until the short-circuit condition
is cleared. In this case, there is no current path from
V
AUX
= (N + 1) • V
OUT
input supply (V ) to either V
or GND, which prevents
IN
OUT
excessive MOSFET and inductor heating.
V
V
AUX
V
105
IN
+
+
LTC3809-1
L1
1:N
1μF
V
REF
100
R6
R5
TG
OUT
MODE
SW
95
90
MAXIMUM
SENSE VOLTAGE
C
BG
OUT
38091 F06
85
80
75
Figure 6. Auxiliary Output Loop Connection
2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0
INPUT VOLTAGE (V)
However,ifthecontrollergoesintopulse-skippingoperation
andhaltsswitchingduetoalightprimaryloadcurrent,then
38091 F07
V
will droop. An external resistor divider from V
to
AUX
AUX
Figure 7. Line Regulation of VREF and Maximum Sense Voltage
the MODE sets a minimum voltage V
:
AUX(MIN)
⎛
⎝
⎞
R6
R5
Low Supply Voltage
VAUX(MIN) = 0.4V • 1+
⎜
⎟
⎠
AlthoughtheLTC3809-1canfunctiondowntobelow2.4V,
the maximum allowable output current is reduced as V
IN
If V
drops below this value, the MODE voltage forces
temporary continuous switching operation until V
again above its minimum.
AUX
decreasesbelow3V. Figure7showstheamountofchange
is
AUX
as the supply is reduced down to 2.4V. Also shown is the
effect on V
.
REF
Fault Condition: Short-Circuit and Current Limit
Minimum On-Time Considerations
Minimum on-time, t is the smallest amount of time
that the LTC3809-1 is capable of turning the top P-channel
MOSFET on. It is determined by internal timing delays and
the gate charge required to turn on the top MOSFET. Low
duty cycle and high frequency applications may approach
the minimum on-time limit and care should be taken to
ensure that:
If the LTC3809-1’s load current exceeds the short-circuit
current limit (I ), which is set by the short-circuit sense
ON(MIN)
SC
threshold (ΔV ) and the on resistance (R
) of
SC
DS(ON)
bottom N-channel MOSFET, the top P-channel MOSFET
is turned off and will not be turned on at the next clock
cycle unless the load current decreases below I . In this
SC
case, the controller’s switching frequency is decreased
and the output is regulated by short-circuit (current limit)
protection.
VOUT
OSC • V
tON(MIN)
<
f
IN
38091fc
18
LTC3809-1
APPLICATIONS INFORMATION
2
If the duty cycle falls below what can be accommodated
by the minimum on-time, the LTC3809-1 will begin to skip
cycles (unless forced continuous mode is selected). The
output voltage will continue to be regulated, but the ripple
current and ripple voltage will increase. The minimum on-
time for the LTC3809-1 is typically about 210ns. However,
3) I R losses are calculated from the DC resistances of the
MOSFETs, inductor and/or sense resistor. In continuous
mode, the average output current flows through L but
is “chopped” between the top P-channel MOSFET and
the bottom N-channel MOSFET. The MOSFET R
DS(ON)
multipliedbydutycyclecanbesummedwiththeresistance
2
as the peak sense voltage (I
• R
) decreases,
of L to obtain I R losses.
L(PEAK)
DS(ON)
the minimum on-time gradually increases up to about
260ns. This is of particular concern in forced continuous
applications with low ripple current at light loads. If forced
continuousmodeisselectedandthedutycyclefallsbelow
the minimum on time requirement, the output will be
regulated by overvoltage protection.
4) Transition losses apply to the external MOSFET and
increase with higher operating frequencies and input
voltages. Transition losses can be estimated from:
2
Transition Loss = 2 • V • I
• C
• f
RSS
IN
O(MAX)
Otherlosses,includingC andC ESRdissipativelosses
IN
OUT
and inductor core losses, generally account for less than
Efficiency Considerations
2% total additional loss.
Theefficiencyofaswitchingregulatorisequaltotheoutput
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
limiting efficiency and which change would produce the
most improvement. Efficiency can be expressed as:
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
immediately shifts by an amount
Efficiency = 100% – (L1 + L2 + L3 + …)
OUT
equal to (ΔI
) • (ESR), where ESR is the effective se-
LOAD
whereL1, L2, etc. aretheindividuallossesasapercentage
of input power.
ries resistance of C . ΔI
also begins to charge or
OUT
LOAD
discharge C
generating a feedback error signal used
by the regulator to return V
During this recovery time, V
OUT
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of
the losses in LTC3809-1 circuits: 1) LTC3809-1 DC bias
to its steady-state value.
OUT
OUT
can be monitored for
overshootorringingthatwouldindicateastabilityproblem.
OPTI-LOOP compensation allows the transient response
to be optimized over a wide range of output capacitance
and ESR values.
2
current, 2) MOSFET gate-charge current, 3) I R losses
and 4) transition losses.
1) The V (pin) current is the DC supply current, given
IN
in the Electrical Characteristics, which excludes MOSFET
The I series R -C filter (see Functional Diagram) sets
TH C C
the dominant pole-zero loop compensation.
driver currents. V current results in a small loss that
IN
increases with V .
IN
The I external components showed in the figure on the
TH
2) MOSFET gate-charge current results from switching
the gate capacitance of the power MOSFET. Each time a
MOSFET gate is switched from low to high to low again,
firstpageofthisdatasheetwillprovideadequatecompen-
sation for most applications. The values can be modified
slightly (from 0.2 to 5 times their suggested values) to
optimizetransientresponseoncethefinalPClayoutisdone
and the particular output capacitor type and value have
beendetermined.Theoutputcapacitorneedstobedecided
upon because the various types and values determine the
loop feedback factor gain and phase. An output current
a packet of charge dQ moves from V to ground. The
IN
resulting dQ/dt is a current out of V , which is typically
IN
much larger than the DC supply current. In continuous
mode, I
= f • Q .
GATECHG
P
38091fc
19
LTC3809-1
APPLICATIONS INFORMATION
pulse of 20% to 100% of full load current having a rise
A 0.032Ω P-channel MOSFET in Si7540DP is close to
this value.
time of 1μs to 10μs will produce output voltage and I
TH
pin waveforms that will give a sense of the overall loop
TheN-channelMOSFETinSi7540DPhas0.017ΩR
The short-circuit current is:
.
DS(ON)
stability. The gain of the loop will be increased by increas-
ing R and the bandwidth of the loop will be increased
C
90mV
by decreasing C . The output voltage settling behavior is
C
ISC =
= 5.3A
related to the stability of the closed-loop system and will
demonstrate the actual overall supply performance. For
a detailed explanation of optimizing the compensation
components, including a review of control loop theory,
refer to Application Note 76.
0.017Ω
So the inductor current rating should be higher than 5.3A.
The LTC3809-1 operates at a frequency of 550kHz. For
continuous Burst Mode operation with 600mA I
the required minimum inductor value is:
,
RIPPLE
A second, more severe transient is caused by switching
in loads with large (>1μF) supply bypass capacitors. The
dischargedbypasscapacitorsareeffectivelyputinparallel
⎛
⎞
1.8V
550kHz • 600mA
1.8V
2.75V
LMIN
=
• 1−
= 1.88μH
⎜
⎟
⎝
⎠
with C , causing a rapid drop in V . No regulator can
OUT
OUT
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
A 6A 2.2μH inductor works well for this application.
will require an RMS current rating of at least 1A
C
IN
at temperature. A C
with 0.1Ω ESR will cause
theloadrisetimeislimitedtoapproximately(25)•(C
).
OUT
LOAD
approximately 60mV output ripple.
Thus a 10μF capacitor would be require a 250μs rise time,
limiting the charging current to about 200mA.
PC Board Layout Checklist
Design Example
Whenlayingouttheprintedcircuitboard,usethefollowing
checklist to ensure proper operation of the LTC3809-1.
As a design example, assume V will be operating from a
IN
maximum of 4.2V down to a minimum of 2.75V (powered
by a single lithium-ion battery). Load current requirement
is a maximum of 2A, but most of the time it will be in a
standby mode requiring only 2mA. Efficiency at both low
andhighloadcurrentsisimportant. BurstModeoperation
at light loads is desired. Output voltage is 1.8V. The IPRG
pin will be left floating, so the maximum current sense
• The power loop (input capacitor, MOSFET, inductor,
output capacitor) should be as small as possible and
isolated as much as possible from LTC3809-1.
• Put the feedback resistors close to the V pins. The I
FB
TH
compensation components should also be very close
to the LTC3809-1.
threshold ΔV
is approximately 125mV.
SENSE(MAX)
• The current sense traces should be Kelvin connections
right at the P-channel MOSFET source and drain.
VOUT
VIN(MIN)
Maximum Duty Cycle =
= 65.5%
• Keepingtheswitchnode(SW)andthegatedrivernodes
(TG, BG) away from the small-signal components,
especiallythefeedbackresistors,andI compensation
From Figure 1, SF = 82%.
TH
components.
ΔV
5
6
RDS(ON)MAX = •0.9•SF • SENSE(MAX) = 0.032Ω
IOUT(MAX) •ρT
38091fc
20
LTC3809-1
TYPICAL APPLICATIONS
V
IN
2.75V TO 8V
10μF
1
MODE
9
8
V
IN
6
MP
Si7540DP
IPRG
TG
C
ITH
L
R
15k
ITH
220pF
LTC3809EDD-1
1.5μH
4
2
10
7
V
2.5V
OUT
I
SW
BG
TH
(5A AT 5V
)
IN
MN
TRACK/SS
Si7540DP
187k
+
3
5
C
OUT
RUN
V
GND
11
FB
150μF
59k
100pF
38091 F08
L: VISHAY IHLP-2525CZ-01
: SANYO 4TPB150MC
C
OUT
Figure 8. 550kHz, Synchronous DC/DC Converter with Internal Soft-Start
V
IN
2.75V TO 8V
10μF
1
6
MODE
IPRG
9
8
V
IN
MP
Si3447BDV
TG
L
470pF
1.5μH
15k
LTC3809EDD-1
4
2
10
7
V
OUT
SW
BG
I
TH
1.8V
2A
10nF
MN
Si3460DV
TRACK/SS
C
22μF
x2
OUT
118k
3
5
V
RUN
FB
GND
11
D
(OPT)
59k
100pF
38091 F09
L: VISHAY IHLP-2525CZ-01
D: ON SEMI MBRM120LT3 (OPTIONAL)
Figure 9. 550kHz, Synchronous DC/DC Converter with External Soft-Start, Ceramic Output Capacitor
38091fc
21
LTC3809-1
TYPICAL APPLICATIONS
Synchronous DC/DC Converter with Output Tracking
V
IN
2.75V TO 8V
1
10μF
MODE
IPRG
9
8
V
IN
6
MP
TG
Si7540DP
L
220pF
Vx
1.5μH
15k
LTC3809EDD-1
4
2
10
7
V
1.8V
OUT
I
SW
BG
TH
(5A AT 5V
)
IN
1.18k
MN
Si7540DP
TRACK/SS
+
590Ω
C
OUT
150μF
118k
3
5
V
RUN
FB
GND
11
59k
100pF
38091 TA03
L: VISHAY IHLP-2525CZ-01
C
V
: SANYO 4TPB150MC
< Vx
OUT
OUT
PACKAGE DESCRIPTION
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698)
R = 0.115
TYP
6
0.38 p 0.10
10
0.675 p 0.05
3.50 p 0.05
2.15 p 0.05 (2 SIDES)
1.65 p 0.05
3.00 p 0.10 1.65 p 0.10
(4 SIDES)
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PACKAGE
OUTLINE
(DD10) DFN 1103
5
1
0.25 p 0.05
0.50 BSC
0.75 p 0.05
0.200 REF
0.25 p 0.05
0.50
BSC
2.38 p 0.10
(2 SIDES)
2.38 p 0.05
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON
ANY SIDE
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION
OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS
OF VARIATION ASSIGNMENT
5. EXPOSED PAD SHALL BE SOLDER PLATED
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
38091fc
22
LTC3809-1
PACKAGE DESCRIPTION
MSE Package
10-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1664 Rev C)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.06 p 0.102
2.794 p 0.102
(.110 p .004)
0.889 p 0.127
(.035 p .005)
(.081 p .004)
1
0.29
REF
1.83 p 0.102
(.072 p .004)
0.05 REF
5.23
(.206)
MIN
2.083 p 0.102 3.20 – 3.45
(.082 p .004) (.126 – .136)
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
DETAIL “B”
10
0.50
(.0197)
BSC
0.305 p 0.038
(.0120 p .0015)
TYP
3.00 p 0.102
(.118 p .004)
(NOTE 3)
0.497 p 0.076
(.0196 p .003)
10 9
8
7 6
RECOMMENDED SOLDER PAD LAYOUT
REF
3.00 p 0.102
(.118 p .004)
(NOTE 4)
4.90 p 0.152
(.193 p .006)
DETAIL “A”
0.254
(.010)
0o – 6o TYP
1
2
3
4 5
GAUGE PLANE
0.53 p 0.152
(.021 p .006)
0.86
(.034)
REF
1.10
(.043)
MAX
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 p 0.0508
(.004 p .002)
0.50
(.0197)
BSC
MSOP (MSE) 0908 REV C
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
38091fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
23
LTC3809-1
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1628/LTC3728
Dual High Efficiency, 2-Phase Synchronous Step Down Controllers Constant Frequency, Standby, 5V and 3.3V LDOs, V to 36V,
IN
LTC1735
High Efficiency Synchronous Step-Down Controller
Synchronous Step-Down Controller
Burst Mode Operation, 16-Pin Narrow SSOP, Fault Protection,
3.5V ≤ V ≤ 36V
IN
LTC1773
LTC1778
2.65V ≤ V ≤ 8.5V, I
Up to 4A, 10-Lead MSOP
OUT
IN
No R
, Synchronous Step-Down Controller
Current Mode Operation Without Sense Resistor,
Fast Transient Response, 4V ≤ V ≤ 36V
SENSE
IN
LTC1872
LTC3411
Constant Frequency Current Mode Step-Up Controller
1.25A (I ), 4MHz, Synchronous Step-Down DC/DC Converter
2.5V ≤ V ≤ 9.8V, SOT-23 Package, 550kHz
IN
95% Efficiency, V : 2.5V to 5.5V, V
= 0.8V, I = 60μA,
Q
OUT
IN
OUT
I
= <1μA, MS Package
SD
LTC3412
LTC3416
LTC3418
2.5A (I ), 4MHz, Synchronous Step-Down DC/DC Converter
95% Efficiency, V : 2.5V to 5.5V, V
SD
= 0.8V, I = 60μA,
Q
OUT
IN
OUT
I
= <1μA, TSSOP-16E Package
4A, 4MHz, Monolithic Synchronous Step-Down Regulator
8A, 4MHz, Monolithic Synchronous Regulator
Tracking Input to Provide Easy Supply Sequencing,
2.25V ≤ V ≤ 5.5V, 20-Lead TSSOP Package
IN
Tracking Input to Provide Easy Supply Sequencing,
2.25V ≤ V ≤ 5.5V, QFN Package
IN
LTC3701
LTC3708
2-Phase, Low Input Voltage Dual Step-Down DC/DC Controller
2.5V ≤ V ≤ 9.8V, 550kHz, PGOOD, PLL, 16-Lead SSOP
IN
2-Phase, No R
, Dual Synchronous Controller with
Constant On-Time Dual Controller, V Up to 36V, Very Low
SENSE
IN
Output Tracking
Duty Cycle Operation, 5mm × 5mm QFN Package
LTC3736/LTC3736-2 2-Phase, No R
, Dual Synchronous Controller with
2.75V ≤ V ≤ 9.8V, 0.6V ≤ V
≤ V , 4mm × 4mm QFN
IN
SENSE
IN
OUT
Output Tracking
LTC3736-1
Low EMI, 2-Phase, No R
Output Tracking
, Dual Synchronous Controller with
Integrated Spread Spectrum for 20dB Lower “Noise,”
SENSE
2.75V ≤ V ≤ 9.8V
IN
LTC3737
LTC3772
2-Phase, No R
, Dual DC/DC Controller with Output Tracking
SENSE
2.75V ≤ V ≤ 9.8V, 0.6V ≤ V
≤ V , 4mm × 4mm QFN
IN
IN
OUT
Micropower, No R
, Constant Frequency Step-Down Controller 40μA No-Load IQ, Non-Synchronous, 2.75V ≤ V ≤ 9.8V,
SENSE
IN
550kHz, 3mm × 2mm DFN or 8-Lead TSOT-23 Packages.
LTC3776
Dual, 2-Phase, No R
, Synchronous Controller for DDR/QDR
Provides V
and V with One IC, 2.75V ≤ V ≤ 9.8V,
SENSE
DDQ TT IN
Memory Termination
Adjustable Constant Frequency with PLL Up to 850kHz,
Spread Spectrum Operation, 4mm × 4mm QFN and 24-Lead
SSOP Packages
LTC3808
LTC3809
No R
No R
, Low EMI, Synchronous Controller with Output Tracking
, Low EMI, Synchronous DC/DC Controller
2.75V ≤ V ≤ 9.8V, 4mm × 3mm DFN, Spread Spectrum for
SENSE
SENSE
IN
20dB Lower Peak Noise
2.75V ≤ V ≤ 9.8V, 3mm × 3mm DFN and 10-Lead MSOPE
IN
Packages, Spread Spectrum for 20dB Lower Peak Noise
PolyPhase is a trademark of Linear Technology Corporation.
38091fc
LT 1108 REV C • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
24
●
●
© LINEAR TECHNOLOGY CORPORATION 2005
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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