LTC3813IG#TRPBF_技术文档

LTC3813

100V Current Mode

Synchronous Step-Up Controller

FEATURES

DESCRIPTION

n

High Output Voltages: Up to 100V

TheLTC3813isasynchronousstep-upswitchingregulator

controller that can generate output voltages up to 100V.

TheLTC3813usesaconstantoff-timepeakcurrentcontrol

architecture with accurate cycle-by-cycle current limit,

without requiring a sense resistor.

n

Large 1Ω Gate Drivers

n

No Current Sense Resistor Required

n

Dual N-Channel MOSFET Synchronous Drive

0.ꢀ5 0.8V Voltage Reference

n

Fast Transient Response

Programmable Soft-Start

A precise internal reference provides 0.ꢀ5 ꢁC accuracy.

A high bandwidth (2ꢀMHz) error ampliﬁer provides very

fastlineandloadtransientresponse.Large1Ωgatedrivers

allow the LTC3813 to drive multiple MOSFETs for higher

current applications. The operating frequency is selected

n

Generates 10V ꢁriver Supply from Input Supply

n

Synchronizable to External Clock

n

Power Good Output Voltage Monitor

n

Adjustable Off-Time/Frequency: t

< 100ns

OFF(MIN)

by an external resistor and is compensated for variations

n

Adjustable Cycle-by-Cycle Current Limit

Programmable Undervoltage Lockout

Output Overvoltage Protection

28-Pin SSOP Package

in V and can also be synchronized to an external clock

IN

forswitching-noisesensitiveapplications.Ashutdownpin

allows the LTC3813 to be turned off, reducing the supply

current to 240μA.

PARAMETER

Maximum V

LTC3813

100V

LTC3814-5

60V

APPLICATIONS

OUT

n

24V Fan Supplies

MOSFET Gate ꢁrive

6.3ꢀV to 14V

6.2V

4.ꢀV to 14V

4.2V

n

+

48V Telecom and Base Station Power Supplies

Networking Equipment, Servers

INTV UV

CC

n

–

INTV UV

6V

4V

CC

n

Automotive and Industrial Control Systems

L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners. Protected by U.S. Patents,

including ꢀ481178, ꢀ847ꢀꢀ4, 6304066, 6476ꢀ89, 6ꢀ802ꢀ8, 6677210, 6774611.

TYPICAL APPLICATION

Efﬁciency vs Load Current

High Efﬁciency High Voltage Step-Up Converter

ꢀ0k

100

V

= 36V

= 24V

IN

ꢀ00k

V

OUT

NꢁRV

BOOST

TG

I

IN

OFF

10V TO 40V

V

+

9ꢀ

90

8ꢀ

80

PGOOꢁ

10μH

22μF

V

IN

= 12V

LTC3813

V

RNG

M1

0.1μF

Si78ꢀ0ꢁP

V

SYNC

SS

OUT

SW

1000pF

ꢀ0V/ꢀA

EXTV

CC

ꢁRV

INTV

SHDN

ꢁ1

MBR1100

CC

+

30.9k

499Ω

+

SENSE

I

TH

270μF

2x

M2

Si78ꢀ0ꢁP

2x

0.01μF

100pF

100k

BG

V

0

1

2

3

4

ꢀ

FB

–

SENSE

BGRTN

LOAꢁ (A)

3813 TA01b

SGNꢁ

1μF

3813 TA01

3813fb

1

LTC3813

ABSOLUTE MAXIMUM RATINGS

PIN CONFIGURATION

(Note 1)

TOP VIEW

Supply Voltages

I

BOOST

TG

1

2

28

27

26

2ꢀ

24

23

22

21

20

19

18

17

16

1ꢀ

OFF

INTV , ꢁRV ....................................... –0.3V to 14V

CC

NC

(ꢁRV - BGRTN), (BOOST - SW).......... –0.3V to 14V

CC

NC

SW

3

BOOST................................................. –0.3V to 114V

+

V

SENSE

NC

4

OFF

BGRTN........................................................ –ꢀV to 0V

V

ꢀ

RNG

EXTV .................................................. –0.3V to 1ꢀV

CC

PGOOꢁ

SYNC

NC

6

(NꢁRV - INTV ) Voltage ........................... –0.3V to 10V

CC

NC

7

+

SW, SENSE Voltage ................................... –1V to 100V

–

I

SENSE

8

TH

I

Voltage.............................................. –0.3V to 100V

OFF

V

BGRTN

BG

9

FB

SS Voltage ................................................... –0.3V to ꢀV

PLL/LPF

SS

10

11

12

13

14

PGOOꢁ Voltage............................................ –0.3V to 7V

V

ꢁRV

CC

, V , SYNC, SHDN,

SGNꢁ

SHDN

UVIN

INTV

CC

RNG OFF

UVIN Voltages........................................ –0.3V to 14V

EXTV

CC

NꢁRV

PLL/LPF, FB Voltages................................. –0.3V to 2.7V

TG, BG, INTV , EXTV RMS Currents.................ꢀ0mA

CC

G PACKAGE

28-LEAꢁ PLASTIC SSOP

= 12ꢀ°C, θ = 100°C/W

Operating Temperature Range (Note 2)

T

JMAX

JA

LTC3813E............................................. –40°C to 8ꢀ°C

LTC3813I............................................ –40°C to 12ꢀ°C

Junction Temperature (Notes 3, 7)........................ 12ꢀ°C

Storage Temperature Range................... –6ꢀ°C to 1ꢀ0°C

Lead Temperature (Soldering, 10 sec) .................. 300°C

ORDER INFORMATION

LEAD FREE FINISH

LTC3813EG#PBF

LTC3813IG#PBF

TAPE AND REEL

PART MARKING

LTC3813EG

PACKAGE DESCRIPTION

28-Lead Plastic SSOP

TEMPERATURE RANGE

LTC3813EG#TRPBF

LTC3813IG#TRPBF

–40°C to 8ꢀ°C

–40°C to 12ꢀ°C

LTC3813IG

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges.

Consult LTC Marketing for information on non-standard lead based ﬁnish parts.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel speciﬁcations, go to: http://www.linear.com/tapeandreel/

ELECTRICAL CHARACTERISTICS ^Thel denotes speciﬁcations which apply over the full operating

V_NDRV= 10V, V_SYNC= V_SENSE= V_SENSE= V_BGRTN= V_SW= 0V, unless otherwise speciﬁed.

temperature range, otherwise speciﬁcations are at T_A= 25°C, INTV_CC= DRV_CC= V_BOOST= V_OFF= V_RNG= SHDN = UV_IN= V_EXTVCC

=

–

+

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Main Control Loop

l

INTV

INTV Supply Voltage

6.3ꢀ

14

V

CC

I

INTV Supply Current

SHDN > 1.ꢀV, I

= 9.ꢀV (Notes 4, ꢀ)

NTVCC

3

240

6

600

mA

μA

Q

CC

INTV Shutdown Current

SHDN = 0V

CC

I

BOOST Supply Current

SHDN > 1.ꢀV (Note ꢀ)

SHDN = 0V

270

0

400

ꢀ

μA

BOOST

3813fb

2

LTC3813

ELECTRICAL CHARACTERISTICS

The l denotes speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C, INTV_CC= DRV_CC= V_BOOST= V_OFF= V_RNG= SHDN = UV_IN= V_EXTVCC

=

–

+

V_NDRV= 10V, V_SYNC= V_SENSE= V_SENSE= V_BGRTN= V_SW= 0V, unless otherwise speciﬁed.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

Feedback Voltage

(Note 4)

0.796

0.794

0.792

0.800

0.804

0.806

0.808

V

FB

l

0°C to 8ꢀ°C

–40°C to 8ꢀ°C

–40°C to 12ꢀ°C (I-Grade)

l

ΔV

Feedback Voltage Line Regulation

Maximum Current Sense Threshold

7V < INTV < 14V (Note 4)

0.002

0.02

5/V

FB,LINE

CC

V

RNG

V

RNG

V

RNG

= 2V, V = 0.76V

2ꢀ6

70

170

320

9ꢀ

21ꢀ

384

120

260

mV

SENSE(MAX)

FB

= 0V, V = 0.76V

FB

= INTV , V = 0.76V

CC FB

V

Minimum Current Sense Threshold

V

RNG

V

RNG

V

RNG

= 2V, V = 0.84V

–300

–8ꢀ

–200

mV

SENSE(MIN)

FB

= 0V, V = 0.84V

FB

= INTV , V = 0.84V

CC FB

I

Feedback Current

V

= 0.8V

20

100

2ꢀ

0

1ꢀ0

nA

dB

VFB

FB

A

(EA)

Error Ampliﬁer ꢁC Open Loop Gain

Error Amp Unity Gain Crossover Frequency

SYNC Current

6ꢀ

VOL

f

I

(Note 6)

MHz

μA

U

SYNC = 10V

1

2

SYNC

V

Shutdown Threshold

1.2

0.7

1.ꢀ

0

V

SHDN

SS

I

SHDN Pin Input Current

SS Source Current

1

μA

V

SS

> 0.ꢀV

1.4

2.ꢀ

μA

l

V

VINUV

V

Undervoltage Lockout

V

Rising

Falling

0.86

0.78

0.07

0.88

0.80

0.10

0.92

0.82

0.12

V

IN

Hysteresis

l

V

INTV Undervoltage Lockout

INTV Rising

6.0ꢀ

6.2

0.ꢀ

6.3ꢀ

V

VCCUV

CC

Hysteresis

Oscillator and Phase-Locked Loop

t

Off-Time

I

= 100μA

= 300μA

1.ꢀꢀ

ꢀ1ꢀ

1.8ꢀ

60ꢀ

2.1ꢀ

69ꢀ

μs

ns

OFF

t

Minimum Off-Time

Minimum On-Time

I

= 2000μA

100

ns

OFF(MIN)

ON(MIN)

OFF(PLL)

OFF

3ꢀ0

t

Modulation Range by PLL

OFF

ꢁown Modulation

Up Modulation

I

= 100μA, V

= 0.6V

= 1.8V

2.2

0.6

3.6

1.2

ꢀ

1.8

μs

OFF

PLL/LPF

I

Phase ꢁetector Output Current

Sinking Capability

Sourcing Capability

PLL/LPF

f

< f

> f

1ꢀ

–2ꢀ

μA

PLLIN

SW

Driver

I

BG ꢁriver Peak Source Current

V

= 0V

1.ꢀ

2

1

2

1

A

Ω

A

BG,PEAK

BG

R

BG ꢁriver Pulldown R

1.ꢀ

BG,SINK

TG,PEAK

ꢁS(ON)

I

TG ꢁriver Peak Source Current

TG ꢁriver Pulldown R

V

TG

– V = 0V

SW

R

Ω

TG,SINK

ꢁS(ON)

PGOOD Output

ΔV

PGOOꢁ Upper Threshold

PGOOꢁ Lower Threshold

V

Rising

Falling

7.ꢀ

–7.ꢀ

10

–10

12.ꢀ

–12.ꢀ

5

FBOV

FB

ΔV

PGOOꢁ Hysteresis

PGOOꢁ Low Voltage

V

Returning

1.ꢀ

0.3

3

5

V

FB,HYST

PGOOꢁ

FB

V

I

= ꢀmA

0.6

PGOOꢁ

3813fb

3

LTC3813

ELECTRICAL CHARACTERISTICS

The l denotes speciﬁcations which apply over the full operating

temperature range, otherwise speciﬁcations are at T_A= 25°C, INTV_CC= DRV_CC= V_BOOST= V_OFF= V_RNG= SHDN = UV_IN= V_EXTVCC

=

–

+

V_NDRV= 10V, V_SYNC= V_SENSE= V_SENSE= V_BGRTN= V_SW= 0V, unless otherwise speciﬁed.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

0

MAX

UNITS

μA

I

PGOOꢁ Leakage Current

PGOOꢁ ꢁelay

V = ꢀV

PGOOꢁ

2

PGOOꢁ

PG ꢁelay

V

Falling

12ꢀ

μs

FB

V

Regulators

CC

V

EXTV Switchover Voltage

CC

EXTVCC

l

EXTV Rising

6.4

0.1

6.7

V

CC

EXTV Hysteresis

0.2ꢀ

0.ꢀ

10.6

2ꢀ0

CC

V

INTV Voltage from EXTV

10.ꢀV < V < 1ꢀV

EXTVCC

9.4

10

170

0.01

10

V

mV

5

INTVCC,1

CC

ΔV

V

- V

at ꢁropout

I

= 20mA, V

= 9.1V

EXTVCC

EXTVCC,1

LOAꢁREG,1

INTVCC,2

EXTVCC

INTVCC

CC

INTV Load Regulation from EXTV

= 0mA to 20mA, V

= 12V

EXTVCC

CC

V

INTV Voltage from NꢁRV Regulator

Linear Regulator in Operation

= 0mA to 20mA, V = 0

9.4

20

10

10.6

60

V

CC

ΔV

INTV Load Regulation from NꢁRV

I

CC

0.01

40

5

LOAꢁREG,2

CC

EXTVCC

I

Current into NꢁRV Pin

V

NꢁRV

– V = 3V

INTVCC

μA

V

NꢁRV

V

Maximum Supply Voltage

Trickle Charger Shunt Regulator

1ꢀ

CCSR

I

Maximum Current into NꢁRV/INTV

Trickle Charger Shunt Regulator,

mA

CCSR

CC

INTV ≤ 16.7V (Note 8)

CC

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 4: The LTC3813 is tested in a feedback loop that servos V to the

FB

reference voltage with the I pin forced to a voltage between 1V and 2V.

TH

Note 5: The dynamic input supply current is higher due to the power

MOSFET gate charging being delivered at the switching frequency

Note 2: The LTC3813E is guaranteed to meet performance speciﬁcations

from 0°C to 8ꢀ°C. Speciﬁcations over the –40°C to 8ꢀ°C operating

temperature range are assured by design, characterization and correlation

with statistical process controls. The LTC3813I is guaranteed to meet

performance speciﬁcations over the full –40°C to 12ꢀ°C operating

temperature range.

(Q • f ).

G SW

Note 6: Guaranteed by design. Not subject to test.

Note 7: This IC includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperature will exceed 12ꢀ°C when overtemperature protection is active.

Continuous operation above the speciﬁed maximum operating junction

temperature may impair device reliability.

Note 3: T is calculated from the ambient temperature T and power

J

A

dissipation P according to the following formula:

ꢁ

Note 8: I is the sum of current into NꢁRV and INTV

.

CC

LTC3813: T = T + (P • 100°C/W)

J

A

ꢁ

3813fb

4

LTC3813

TYPICAL PERFORMANCE CHARACTERISTICS

Load Transient Response

Start-Up

Overcurrent Operation

V

OUT

V

OUT

20V/ꢁIV

200mV/

ꢁIV

V

OUT

20V/ꢁIV

SS

4V/ꢁIV

I

OUT

I

L

2A/ꢁIV

ꢀA/ꢁIV

I

L

ꢀA/ꢁIV

3813 G01

100μs/ꢁIV

3813 G02

3813 G03

1ms/ꢁIV

FRONT PAGE CIRCUIT

ꢀ00μs/ꢁIV

FRONT PAGE CIRCUIT

FIGURE 14 CIRCUIT

V

= 12V

IN

V

= 24V

0A TO 4A LOAꢁ STEP

IN

V

= 24V

IN

I

= 2A

LOAꢁ

R

= 1Ω

SHORT

Frequency vs Input Voltage

Efﬁciency vs Load Current

Frequency vs Load Current

100

9ꢀ

90

8ꢀ

80

280

300

FRONT PAGE CIRCUIT

V

= 24V

OUT

V

= 12V

IN

270

260

2ꢀ0

240

230

220

210

200

280

260

240

220

200

I

= 0A

= 1A

LOAꢁ

V

= 24V

IN

V

= ꢀV

IN

LOAꢁ

V

= 12V

IN

2

3

1

3

0

4

0

2

LOAꢁ CURRENT (A)

4

1

10

1ꢀ

20

2ꢀ

30

3ꢀ

40

LOAꢁ (A)

INPUT VOLTAGE (V)

3813 G06

3813 G0ꢀ

3813 G04

Current Sense Threshold

vs I_THVoltage

Off-Time vs I_OFFCurrent

Off-Time vs V_OFFVoltage

700

600

400

300

10000

1000

100

V

= INTV

I = 300μA

OFF

CC

V

= 2V

RNG

1.4V

200

ꢀ00

400

300

200

100

1V

0.7V

0.ꢀV

100

0

–100

–200

–300

–400

0

10

2

3

0

0.ꢀ

1

1.ꢀ

2.ꢀ

0

1

I

1.ꢀ

2

2.ꢀ

3

10

100

1000

CURRENT (μA)

10000

0.ꢀ

I

VOLTAGE (V)

V

VOLTAGE (V)

OFF

TH

OFF

3813 G08

3813 G09

3813 G07

3813fb

5

LTC3813

TYPICAL PERFORMANCE CHARACTERISTICS

Maximum Current Sense

Threshold vs V_RNGVoltage

Maximum Current Sense

Threshold vs Temperature

Off-Time vs Temperature

230

220

210

200

190

180

680

660

640

620

400

300

200

100

0

I

= 300μA

V

= INTV

CC

OFF

RNG

600

ꢀ80

ꢀ60

ꢀ0

0

TEMPERATURE (°C)

100 12ꢀ

–ꢀ0 –2ꢀ

2ꢀ

7ꢀ

–ꢀ0 –2ꢀ

0

2ꢀ

ꢀ0

7ꢀ

12ꢀ

100

1

1.ꢀ

0.ꢀ

2

TEMPERATURE (°C)

V

VOLTAGE (V)

RNG

3813 G10

3813 G12

3813 G11

Feedback Reference Voltage

vs Temperature

Driver Peak Source Current

vs Temperature

Driver Pulldown R_DS(ON)

vs Temperature

0.803

0.802

0.801

0.800

0.799

0.798

0.797

1.ꢀ0

1.2ꢀ

1.00

0.7ꢀ

2.ꢀ

2.0

V

= V

= 10V

INTVCC

V

= V

= 10V

INTVCC

BOOST

1.ꢀ

1

0.ꢀ0

0.2ꢀ

0

–ꢀ0 –2ꢀ

0

2ꢀ

ꢀ0

7ꢀ 100 12ꢀ

–ꢀ0 –2ꢀ

0

2ꢀ

ꢀ0

7ꢀ 100 12ꢀ

ꢀ0

TEMPERATURE (°C)

100 12ꢀ

–ꢀ0 –2ꢀ

0

2ꢀ

7ꢀ

TEMPERATURE (°C)

3813 G13

3813 G14

3813 G1ꢀ

Driver Peak Source Current

vs Supply Voltage

Driver Pulldown R_DS(ON)

vs Supply Voltage

1.1

3.0

2.ꢀ

2.0

1.ꢀ

1.0

0.ꢀ

0

1.0

0.9

0.8

0.7

0.6

ꢀ

6

7

8

9

10 11 12 13 14 1ꢀ

6

7

8

9

11

13 14 1ꢀ

10

12

ꢁRV /BOOST VOLTAGE (V)

CC

3813 G16

3813 G17

3813fb

6

LTC3813

TYPICAL PERFORMANCE CHARACTERISTICS

EXTV_CCLDO Resistance at

Dropout vs Temperature

INTV_CCShutdown Current

vs Temperature

INTV_CCCurrent vs Temperature

4

3

2

1

0

14

12

10

8

400

300

200

100

0

6

4

2

0

–ꢀ0 –2ꢀ

0

2ꢀ

ꢀ0

7ꢀ 100 12ꢀ

–2ꢀ

0

ꢀ0

7ꢀ 100 12ꢀ

–ꢀ0

2ꢀ

–2ꢀ

0

ꢀ0

7ꢀ 100 12ꢀ

–ꢀ0

2ꢀ

TEMPERATURE (°C)

3813 G19

3813 G18

3813 G20

INTV_CCShutdown Current

vs INTV_CCVoltage

SS Pull-Up Current

vs Temperature

INTV_CCCurrent vs INTV_CCVoltage

300

2ꢀ0

200

1ꢀ0

100

ꢀ0

4.0

3.ꢀ

3.0

2.ꢀ

2.0

1.ꢀ

1.0

0.ꢀ

0

3

2

1

0

8

12

14

0

2

4

6

10

8

12

14

0

2

4

6

10

ꢀ0

100 12ꢀ

–ꢀ0 –2ꢀ

0

2ꢀ

7ꢀ

INTV VOLTAGE (V)

TEMPERATURE (°C)

CC

3813 G22

3813 G21

3813 G23

I_THVoltage

Shutdown Threshold

vs Temperature

vs Load Current

3

2

1

0

2.2

FRONT PAGE CIRCUIT

V

= 24V

RNG

IN

2.0

1.8

= 1V

1.6

1.4

1.2

1.0

0.8

0.6

1

2

3

4

0

–2ꢀ

0

ꢀ0

7ꢀ 100 12ꢀ

–ꢀ0

2ꢀ

LOAꢁ CURRENT (A)

TEMPERATURE (°C)

3813 G24

3813 G2ꢀ

3813fb

7

LTC3813

PIN FUNCTIONS

I

(Pin 1): Off-Time Current Input. Tie a resistor from

to this pin to set the one-shot timer current and

SS (Pin 11): Soft-Start Input. A capacitor to ground at

this pin sets the ramp rate of the maximum current sense

threshold.

OFF

V

OUT

thereby set the switching frequency.

V

(Pin 4): Off-Time Voltage Input. Voltage trip point

SGND(Pin12):SignalGround.Allsmallsignalcomponents

should connect to this ground and eventually connect to

PGNꢁ at one point.

OFF

for the on-time comparator. Tying this pin to an external

resistive divider from the input makes the off-time pro-

portional to V . The comparator defaults to 0.7V when

IN

SHDN (Pin 13): Shutdown Pin. Pulling this pin below 1.ꢀV

will shut down the LTC3813, turn off both of the external

MOSFET switches and reduce the quiescent supply cur-

rent to 240μA.

the pin is grounded and defaults to 2.4V when the pin is

connected to INTV .

CC

V

(Pin 5): Sense Voltage Limit Set. The voltage at this

RNG

pin sets the nominal sense voltage at maximum output

UVIN (Pin 14): UVLO Input. This pin is input to the internal

UVLO and is compared to an internal 0.8V reference. An

external resistor divider is connected to this pin and the

inputsupplytoprogramtheundervoltagelockoutvoltage.

When UVIN is less than 0.8V, the LTC3813 is shut down.

current and can be set from 0.ꢀV to 2V by a resistive

divider from INTV . The nominal sense voltage defaults

CC

to 9ꢀmV when this pin is tied to ground, and 21ꢀmV when

tied to INTV .

CC

PGOOD (Pin 6): Power Good Output. Open-drain logic

output that is pulled to ground when the output voltage

is not between 105 of the regulation point. The output

voltage must be out of regulation for at least 12ꢀμs before

the power good output is pulled to ground.

NDRV (Pin 15): ꢁrive Output for External Pass ꢁevice of

the Linear Regulator for INTV . Connect to the gate of an

CC

external NMOS pass device and a pull-up resistor to the

input voltage V or the output voltage V

.

IN

OUT

EXTV (Pin 16): External ꢁriver Supply Voltage. When

CC

SYNC (Pin 7): Sync Pin. This pin provides an external

clock input to the phase detector. The phase-locked loop

will force the rising top gate signal to be synchronized

with the rising edge of the clock signal.

this voltage exceeds 6.7V, an internal switch connects

this pin to INTV through an LꢁO and turns off the exter-

CC

nal MOSFET connected to NꢁRV, so that controller and

gate drive are drawn from EXTV .

CC

I

(Pin 8): Error Ampliﬁer Compensation Point and Cur-

TH

INTV (Pin 17): Main Supply Pin. All internal circuits

CC

rentControlThreshold. Thecurrentcomparatorthreshold

increases with control voltage. The voltage ranges from

0V to 2.6V with 1.2V corresponding to zero sense voltage

(zero current).

except the output drivers are powered from this pin.

INTV should be bypassed to ground (Pin 10) with at

CC

least a 0.1μF capacitor in close proximity to the

LTC3813.

V (Pin9):FeedbackInput.ConnectV througharesistor

FB

DRV (Pin 18): ꢁriver Supply Pin. ꢁRV supplies power

CC

divider network to V

to set the output voltage.

OUT

to the BG output driver. This pin is normally connected to

PLL/LPF (Pin 10): The phase-locked loop’s lowpass ﬁlter

is tied to this pin. The voltage at this pin defaults to 1.2V

when the IC is not synchronized with an external clock at

the SYNC pin.

INTV . ꢁRV should be bypassed to BGRTN (Pin 20)

CC

with a low ESR (XꢀR or better) 1μF capacitor in close

proximity to the LTC3813.

3813fb

8

LTC3813

PIN FUNCTIONS

BG (Pin 19): Bottom Gate ꢁrive. The BG pin drives the

SW (Pin 26): Switch Node Connection to Inductor and

Bootstrap Capacitor. Voltage swing at this pin is from a

Schottky diode (external) voltage drop below ground

gate of the bottom N-channel main switch MOSFET. This

pin swings from BGRTN to ꢁRV .

CC

to V

.

OUT

BGRTN(Pin20):BottomGateReturn.Thispinconnectsto

the source of the pulldown MOSFET in the BG driver and

is normally connected to ground. Connecting a negative

supply to this pin allows the main MOSFET’s gate to be

pulled below ground to help prevent false turn-on during

high dV/dt transitions on the SW node. See the Applica-

tions Information section for more details.

TG (Pin 27): Top Gate ꢁrive. The TG pin drives the gate of

the top N-channel synchronous switch MOSFET. The TG

driver draws power from the BOOST pin and returns to the

SW pin, providing true ﬂoating drive to the top MOSFET.

BOOST (Pin 28): Top Gate ꢁriver Supply. The BOOST pin

supplies power to the ﬂoating TG driver. BOOST should

be bypassed to SW with a low ESR (XꢀR or better) 0.1μF

capacitor. An additional fast recovery Schottky diode from

+

–

SENSE , SENSE (Pin 25, Pin 21): Current Sense Com-

parator Input. The (+) input to the current comparator is

normally connected to SW unless using a sense resistor.

The (–) input is used to accurately kelvin sense the bottom

side of the sense resistor or MOSFET.

ꢁRV to the BOOST pin will create a complete ﬂoating

CC

charge-pumped supply at BOOST.

3813fb

9

LTC3813

FUNCTIONAL DIAGRAM

V

IN

NꢁRV

1ꢀ

10V

+

–

M3

OFF

INTV

17

CC

EXTV

16

CC

V

IN

ꢀV

REG

0.8V

REF

R

UVIN

14

UV1

+

–

+

INTV

UV

CC

V

IN

UV

UV2

SYNC

7

+

10V

0.8V

6.2V

+

ON

PLL-SYNC

PLL/LPF

10

V

IN

+

–

ꢁ

B

+

BOOST

28

C

V

OFF

IN

6.7V

4

L

C

TG

27

V

B

I

VOFF

OFF

1

R

OFF

t

=

(76pF)

OFF

I

IOFF

V

R

S

OUT

ON

Q

SW

26

20k

+

SENSE

2ꢀ

+

SWITCH

LOGIC

OVERTEMP

SENSE

V

OUT

I

CMP

M1

ꢁRV

CC

–

18

SHꢁN

OV

C

VCC

BG

19

M2

+

BGRTN

20

C

OUT

s

–

SENSE

21

1.4V

0.7V

V

RNG

FAULT

PGOOꢁ

6

ꢀ

1.4μA

RUN

R2

SHꢁN

–

+

I

TH

–

0.72V

+

–

1.ꢀV

4V

8

+

UV

2.6V

V

FB

R

C

9

C

C2

R1

+

–

C

C1

SHDN

13

SGNꢁ

12

EA

OV

–

+

0.8ꢀV

0.8V

SS

11

3813 Fꢁ

3813fb

10

LTC3813

OPERATION

Main Control Loop

inductor current will never exceed the value programmed

on the V

pin.

RNG

The LTC3813 is a current mode controller for ꢁC/ꢁC step-

up converters. In normal operation, the top MOSFET is

turned on for a ﬁxed interval determined by a one-shot

timer (OST). When the top MOSFET is turned off, the bot-

tom MOSFET is turned on until the current comparator

Overvoltage and undervoltage comparators OV and UV

pull the PGOOꢁ output low if the output feedback voltage

exits a 105 window around the regulation point after the

internal12ꢀμspowerbadmasktimerexpires.Furthermore,

in an overvoltage condition, M1 is turned off and M2 is

turned on immediately and held on until the overvoltage

condition clears.

I

trips, restarting the one-shot timer and initiating the

CMP

next cycle. Inductor current is determined by sensing the

–

+

voltage between the SENSE and SENSE pins using a

sense resistor or the bottom MOSFET on-resistance. The

The LTC3813 provides two undervoltage lockout com-

voltage on the I pin sets the comparator threshold cor-

TH

parators—one for the INTV /ꢁRV supply and one for

CC

responding to the inductor peak current. The fast 2ꢀMHz

the input supply V . The INTV UV threshold is 6.2V to

IN

CC

error ampliﬁer EA adjusts this voltage by comparing the

guaranteethattheMOSFETshavesufﬁcientgatedrivevolt-

feedback signal V to the internal 0.8V reference volt-

FB

age before turning on. The V UV threshold (UVIN pin) is

IN

age. If the load current increases, it causes a drop in the

0.8V with 105 hysteresis which allows programming the

feedback voltage relative to the reference. The I voltage

TH

V

threshold with the appropriate resistor divider con-

IN

thenrisesuntiltheaverageinductorcurrentagainmatches

nected to V . If either comparator inputs are under the

IN

the load current.

UV threshold, the LTC3813 is shut down and the drivers

are turned off.

The operating frequency is determined implicitly by the

top MOSFET on-time (t ) and the duty cycle required to

OFF

Strong Gate Drivers

maintain regulation. The one-shot timer generates a top

MOSFET on-time that is inversely proportional to the I

OFF

TheLTC3813containsverylowimpedancedriverscapable

of supplying amps of current to slew large MOSFET gates

quickly. Thisminimizestransitionlossesandallowsparal-

leling MOSFETs for higher current applications. A 100V

ﬂoating high side driver drives the top side MOSFET and

a low side driver drives the bottom side MOSFET (see

Figure 1). The bottom side driver is supplied directly

current and proportional to the V voltage. Connecting

OFF

V

to I and V to V with a resistive divider keeps

OUT

OFF IN OFF

thefrequencyapproximatelyconstantwithchangesinV .

IN

The nominal frequency can be adjusted with an external

resistor R

.

OFF

For applications with stringent constant-frequency require-

ments, the LTC3813 can be synchronized with an external

clock. By programming the nominal frequency the same as

the external clock frequency, the LTC3813 behaves as a con-

stant-frequency part against the load and supply variations.

from the ꢁRV pin. The top MOSFET drivers are biased

CC

from ﬂoating bootstrap capacitor C , which normally is

B

recharged during each off cycle through an external diode

V

ꢁRV

IN

CC

Pulling the SHDN pin low forces the controller into its

shutdown state, turning off both M1 and M2. Forcing a

voltage above 1.ꢀV will turn on the device.

+

ꢁ

C

IN

B

LTC3813

ꢁRV

CC

BOOST

TG

L

C

B

SW

Fault Monitoring/Protection

V

OUT

Constant off-time current mode architecture provides

accurate cycle-by-cycle current limit protection—a fea-

ture that is very important for protecting the high volt-

age power supply from output overcurrent conditions.

The cycle-by-cycle current monitor guarantees that the

+

M1

BG

M2

C

OUT

BGRTN

0V TO –ꢀV

3813 F01

Figure 1. Floating TG Driver Supply and Negative BG Return

3813fb

11

LTC3813

OPERATION

from ꢁRV when the top MOSFET turns off. In an output

supply is used on BGRTN, the switch node dV/dt could

CC

overvoltage condition, where it is possible that the bot-

tom MOSFET will be off for an extended period of time,

an internal timeout guarantees that the bottom MOSFET

is turned on at least once every 2ꢀμs for one top MOSFET

on-time period to refresh the bootstrap capacitor.

pull the gate up 2V before the V of the bottom MOSFET

has more than 0V across it.

GS

IC/Driver Supply Power and Linear Regulators

TheLTC3813’sinternalcontrolcircuitryandtopandbottom

MOSFET drivers operate from a supply voltage (INTV ,

The bottom driver has an additional feature that helps

minimize the possibility of external MOSFET shoot-thru.

When the top MOSFET turns on, the switch node dV/dt

pulls up the bottom MOSFET’s internal gate through the

Miller capacitance, even when the bottom driver is hold-

ing the gate terminal at ground. If the gate is pulled up

high enough, shoot-thru between the top side and bottom

side MOSFETs can occur. To prevent this from occurring,

the bottom driver return is brought out as a separate pin

(BGRTN) so that a negative supply can be used to reduce

the effect of the Miller pull-up. For example, if a –2V

CC

ꢁRV pins) in the range of 6.2V to 14V. If the input supply

CC

voltage or another available supply is within this voltage

range it can be used to supply IC/driver power. If a supply

in this range is not available, two internal regulators are

availabletogeneratea10Vsupplyfromtheinputoroutput.

Aninternallowdropoutregulatorisgoodforvoltagesupto

1ꢀV, and the second, a linear regulator controller, controls

the gate of an external NMOS to generate the 10V supply.

Since the NMOS is external, the user has the ﬂexibility to

choose a BV

as high as necessary.

ꢁSS

3813fb

12

LTC3813

APPLICATIONS INFORMATION

The current mode control loop will not allow the induc-

The basic LTC3813 application circuit is shown on the ﬁrst

page of this data sheet. External component selection is

primarily determined by the maximum input voltage and

load current and begins with the selection of the sense

resistance and power MOSFET switches. The LTC3813

uses either a sense resistor or the on-resistance of the

synchronous power MOSFET for determining the induc-

tor current. The desired amount of ripple current and

operating frequency largely determines the inductor

tor peak to exceed V

/R

. In practice, one

SENSE(MAX) SENSE

should allow some margin for variations in the LTC3813

and external component values, and a good guide for

selecting the maximum sense voltage when V sensing

ꢁS

is used is:

1.7 •R_DS(ON)•I_O(MAX)

V_SENSE(MAX)

=

1ꢀD_MAX

value. Next, C

is selected for its ability to handle the

OUT

V

is set by the voltage applied to the V

pin. Once

RNG

SENSE

to be:

large RMS current and with low enough ESR to meet the

output voltage ripple and transient speciﬁcation. Finally,

loop compensation components are selected to meet the

required transient/phase margin speciﬁcations.

is chosen, the required V

voltage is calculated

RNG

V

= ꢀ.78 • (V

+ 0.026)

SENSE(MAX)

RNG

An external resistive divider from INTV can be used

CC

Duty Cycle Considerations

to set the voltage of the V

pin between 0.ꢀV and 2V

RNG

For a boost converter, the duty cycle of the main switch is:

resulting in nominal sense voltages of 60mV to 320mV.

Additionally, the V pin can be tied to SGNꢁ or INTV

CC

V

RNG

V

V_OUT

IN(MIN)

IN

D=1ꢀ

;D_MAX=1ꢀ

in which case the nominal sense voltage defaults to 9ꢀmV

or 21ꢀmV, respectively.

V_OUT

The maximum V

capability of the LTC3813 is inversely

OUT

+

–

Connecting the SENSE and SENSE Pins

proportional to the minimum desired operating frequency

The LTC3813 can be used with or without a sense resis-

tor. When using a sense resistor, place it between the

source of the bottom MOSFET, M2, and PGNꢁ. Connect

and minimum off-time:

V

IN(MIN)

V_OUT(MAX)

=

ꢀ100V

+

–

f _MIN• t_OFF(MIN)

the SENSE and SENSE pins to the top and bottom of

the sense resistor. Using a sense resistor provides a well

deﬁnedcurrentlimit, butaddscostandreducesefﬁciency.

Alternatively, one can eliminate the sense resistor and use

thebottomMOSFETasthecurrentsenseelementbysimply

Maximum Sense Voltage and the V

RNG

The control circuit in the LTC3813 measures the input

current by using the R of the bottom MOSFET or

+

ꢁS(ON)

connecting the SENSE pin to the lower MOSFET drain

–

by using a sense resistor in the bottom MOSFET source,

so the output current needs to be reﬂected back to the

input in order to dimension the power MOSFET properly

and to choose the maximum sense voltage. Based on the

fact that, ideally, the output power is equal to the input

power, the maximum average input current and average

inductor current is:

and SENSE pin to the MOSFET source. This improves

efﬁciency, but one must carefully choose the MOSFET

on-resistance, as discussed in the following section.

I_O(MAX)

I_IN(MAX)=I_L,AVG(MAX)=

1ꢀD_MAX

3813fb

13

LTC3813

APPLICATIONS INFORMATION

Power MOSFET Selection

Themostimportantparameterinhighvoltageapplications

is breakdown voltage BV . Both the top and bottom

ꢁSS

The LTC3813 requires two external N-channel power

MOSFETs, one for the bottom (main) switch and one for

the top (synchronous) switch. Important parameters for

MOSFETs will see full output voltage plus any additional

ringing on the switch node across its drain-to-source dur-

ing its off-time and must be chosen with the appropriate

breakdown speciﬁcation. Since most MOSFETs in the 60V

the power MOSFETs are the breakdown voltage BV

,

ꢁSS

threshold voltage V_(GS)TH, on-resistance R_ꢁS(ON), Miller

capacitance and maximum current I_ꢁS(MAX)

to 100V range have higher thresholds (typically V

GS(MIN)

.

≥ 6V), the LTC3813 is designed to be used with a 6.2V to

When the bottom MOSFET is used as the current sense

element, particular attention must be paid to its on-resis-

tance. MOSFET on-resistance is typically speciﬁed with

14V gate drive supply (ꢁRV pin).

CC

For maximum efﬁciency, on-resistance R

and input

ꢁS(ON)

capacitanceshouldbeminimized. LowR

minimizes

ꢁS(ON)

a maximum value R

at 2ꢀ°C. In this case,

ꢁS(ON)(MAX)

conduction losses and low input capacitance minimizes

transition losses. MOSFET input capacitance is a combi-

nation of several components but can be taken from the

typical “gate charge” curve included on most data sheets

(Figure 3).

additional margin is required to accommodate the rise in

MOSFET on-resistance with temperature:

R_SENSE

R_DS(ON)(MAX)

=

ꢀ_T

V

The ρ term is a normalization factor (unity at 2ꢀ°C)

OUT

T

accounting for the signiﬁcant variation in on-resistance

MILLER EFFECT

V

with temperature (see Figure 2) and typically varies

GS

from 0.45/

°

C to 1.05/

°

C depending on the particular

a

b

+

–

V

MOSFET used.

ꢁS

+

Q

IN

V

GS

–

C

= (Q – Q )/V

B A ꢁS

MILLER

3813 F03

2.0

Figure 3. Gate Charge Characteristic

1.ꢀ

1.0

0.ꢀ

The curve is generated by forcing a constant input cur-

rent into the gate of a common source, current source

loaded stage and then plotting the gate voltage versus

time. The initial slope is the effect of the gate-to-source

and the gate-to-drain capacitance. The ﬂat portion of the

curve is the result of the Miller multiplication effect of the

drain-to-gate capacitance as the drain drops the voltage

across the current source load. The upper sloping line is

due to the drain-to-gate accumulation capacitance and

the gate-to-source capacitance. The Miller charge (the

0

ꢀ0

100

–ꢀ0

1ꢀ0

0

JUNCTION TEMPERATURE (°C)

3813 F02

Figure 2. R_DS(ON)vs Temperature

3813fb

14

LTC3813

APPLICATIONS INFORMATION

increase in coulombs on the horizontal axis from a to b

where ρ is the temperature dependency of R

, R

T

ꢁS(ON) ꢁR

while the curve is ﬂat) is speciﬁed for a given V drain

is the effective top driver resistance (approximately 2Ω at

V = V ). V is the data sheet speciﬁed typical

GS

ꢁS

voltage, but can be adjusted for different V voltages by

ꢁS

MILLER

TH(IL)

multiplying by the ratio of the application V to the curve

gatethresholdvoltagespeciﬁedinthepowerMOSFETdata

ꢁS

speciﬁed V values. A way to estimate the C

term

sheetatthespeciﬁeddraincurrent.C isthecalculated

ꢁS

MILLER

is to take the change in gate charge from points a and b

on a manufacturers data sheet and divide by the stated

capacitanceusingthegatechargecurvefromtheMOSFET

data sheet and the technique described above.

V

voltage speciﬁed. C

is the most important se-

2

ꢁS

MILLER

BothMOSFETshaveI RlosseswhilethebottomN-channel

lection criteria for determining the transition loss term in

the top MOSFET but is not directly speciﬁed on MOSFET

equation includes an additional term for transition losses.

2

Both top and bottom MOSFET I R losses are greatest at

data sheets. C

deﬁnitions of these parameters are not included.

and C are speciﬁed sometimes but

2

RSS

OS

lowest V , and the top MOSFET I R losses also peak

IN

during an overcurrent condition when it is on close to

When the controller is operating in continuous mode

the duty cycles for the top and bottom MOSFETs are

given by:

1005 of the period. For most LTC3813 applications,

2

the transition loss and I R loss terms in the bottom

MOSFET are comparable, so best efﬁciency is obtained

by choosing a MOSFET that optimizes both R

and

ꢁS(ON)

V

_OUTꢀ V

V_OUT

IN

Main Switch Duty Cycle =

C

. Since there is no transition loss term in the syn-

MILLER

chronousMOSFET,however,optimalefﬁciencyisobtained

V

V_OUT

by minimizing R

—by using larger MOSFETs or

ꢁS(ON)

IN

Synchronous SwitchDuty Cycle=

paralleling multiple MOSFETs.

MultipleMOSFETscanbeusedinparalleltolowerR

ꢁS(ON)

The power dissipation for the main and synchronous

MOSFETs at maximum output current are given by:

and meet the current and thermal requirements if desired.

TheLTC3813containslargelowimpedancedriverscapable

of driving large gate capacitances without signiﬁcantly

slowing transition times. In fact, when driving MOSFETs

with very low gate charge, it is sometimes helpful to

slow down the drivers by adding small gate resistors

(10Ω or less) to reduce noise and EMI caused by the

fast transitions.

I_O(MAX)

ꢁ

ꢄ²

ꢆ

P_MAIN=D_MAX

(ꢇ_T)R_DS(ON)

ꢃ

1ꢀD

ꢂ

_MAXꢅ

I_O(MAX)

₂ꢁ

ꢄ

ꢆ

1

2

+ V_OUT

(R_DR)(C_MILLER)

ꢃ

1ꢀD

ꢂ

_MAXꢅ

ꢈ

ꢋ

1

•

+

(f)

ꢊ

ꢍ

DRV_CC– V_TH(IL)V_{TH(IL) ꢍ}

ꢊ

ꢉ

ꢌ

ꢁ

ꢄ

1

1ꢀD

P_SYNC

=

(I_O(MAX))²(ꢇ_T)R_DS(0N)

ꢃ

ꢆ

ꢂ

_MAXꢅ

3813fb

15

LTC3813

APPLICATIONS INFORMATION

Operating Frequency

The V

pin can be connected to INTV or ground or

OFF CC

can be connected to a resistive divider from V . The V

IN

OFF

The choice of operating frequency is a tradeoff between

efﬁciency and component size. Low frequency operation

improvesefﬁciencybyreducingMOSFETswitchinglosses

but requires larger inductance and/or capacitance in order

to maintain low output ripple voltage.

pin has internal clamps that limit its input to the one-shot

timer. If the pin is tied below 0.7V, the input to the one-

shot is clamped at 0.7V. Similarly, if the pin is tied above

2.4V, the input is clamped at 2.4V. Note, however, that

if the V

pin is connected to a constant voltage, the

OFF

The operating frequency of LTC3813 applications is de-

termined implicitly by the one-shot timer that controls

operating frequency will be proportional to the input

voltage V . Figures 4a and 4b illustrate how R relates

IN

OFF

the on-time t

of the synchronous MOSFET switch.

to switching frequency as a function of the input voltage

OFF

The on-time is set by the current into the I pin and the

and V voltage. To hold frequency constant for input

OFF

voltage at the V pin according to:

voltage changes, tie the V pin to a resistive divider from

OFF

V , as shown in Figure ꢀ. Choose the resistor values so

IN

V_VOFF

t_OFF

=

76pF

(

)

that the V

voltage equals about 1.ꢀꢀV at the mid-point

RNG

I

IOFF

of V as follows:

IN

Tying a resistor R

from V

to the I

pin yields a

OFF

V

_IN(MAX)+ V

OFF

OUT

R1

R2

^IN(MIN)=1.55V • 1+

ꢀ

ꢁ

ꢃ

ꢄ

V

=

synchronous MOSFET on-time inversely proportional to

ꢂ

ꢅ

IN,MID

2

V

. This results in the following operating frequency

and also keeps frequency constant as V

start-up:

OUT

ramps up at

OUT

V

IN

f =

(Hz)

V_VOFF•R_OFF(76pF)

1000

1+R1/R2 = 3.2

(V

,

= ꢀV)

IN MIꢁ

V

= ꢀV

V = 24V

IN

1+R1/R2 = 7.7

(V =12V)

,

IN MIꢁ

1+R1/R2 = 1ꢀ.ꢀ

(V = 24V)

V

= 12V

IN

,

IN MIꢁ

100

10

100

(kΩ)

1000

10

100

1000

3813 F04a

R

(kΩ)

OFF

3813 F04b

Figure 4a. Switching Frequency vs R_OFF(V_OFF= INTV_CC

)

Figure 4b. Switching Frequency vs R_OFF

(V_OFFConnected to a Resistor Divider from V_IN)

3813fb

16

LTC3813

APPLICATIONS INFORMATION

With these resistor values, the frequency will remain

relatively constant at:

Minimum On-Time and Dropout Operation

The minimum on-time t is the smallest amount of

ON(MIN)

time that the LTC3813 is capable of turning on the bottom

MOSFET, tripping the current comparator and turning the

MOSFET back off. This time is generally about 3ꢀ0ns. The

minimum on-time limit imposes a minimum duty cycle

1+R1/ R2

R_OFF(76pF)

f =

(Hz)

for the range of 0.4ꢀV to 1.ꢀꢀ • V , and will be propor-

IN

of t

/(t

+ t ). If the minimum duty cycle is

tional to V outside of this range.

ON(MIN) ON(MIN) OFF

IN

reached, due to a rising input voltage, for example, then

the output will rise out of regulation. The maximum input

voltage to avoid dropout is:

Changes in the load current magnitude will also cause

a frequency shift. Parasitic resistance in the MOSFET

switches and inductor reduce the effective voltage across

the inductance, resulting in increased duty cycle as the

load current increases. By shortening the off-time slightly

ascurrentincreases,constant-frequencyoperationcanbe

maintained.Thisisaccomplishedwitharesistorconnected

from the I pin to the I pin to increase the I current

t_OFF

_ON(MIN)+ t_OFF

V_IN(MAX)= V_OUT

t

A plot of maximum duty cycle vs switching frequency is

shown in Figure 7.

TH

OFF

slightly as V increases. The values required will depend

ITH

2.0

on the parasitic resistances in the speciﬁc application. A

good starting point is to feed about 105 of the R cur-

OFF

rent with R as shown in Figure 6.

ITH

1.ꢀ

ꢁROPOUT

REGION

V

IN

1.0

0.ꢀ

0

R1

R2

V

OFF

LTC3813

0

0.2ꢀ

0.ꢀ0

/V

0.7ꢀ

1.0

V

IN OUT

3813 F0ꢀ

3813 F07

Figure 5. V_OFFConnection to Keep the Operating

Frequency Constant as the Input Supply Varies

Figure 7. Maximum Duty Cycle vs Switching Frequency

Inductor Selection

R

OFF

Aninductorshouldbechosenthatcancarrythemaximum

input ꢁC current which occurs at the minimum input volt-

age.Thepeak-to-peakripplecurrentissetbytheinductance

and a good starting point is to choose a ripple current of

at least 405 of its maximum value:

V

I

OUT

OFF

1000pF

R

LTC3813

ITH

TH

3813 F06

10R

OFF

R

ITH

=

V

OUT

I_O(MAX)

ꢀI_L= 40%•

Figure 6. Correcting Frequency Shift with Load Current Changes

1ꢁD_MAX

3813fb

17

LTC3813

APPLICATIONS INFORMATION

The required inductance can then be calculated to be:

where the ﬁrst term is due to the bulk capacitance and

second term due to the ESR.

V

_IN(MIN)•D_MAX

L =

Formanydesignsitispossibletochooseasinglecapacitor

type that satisﬁes both the ESR and bulk C requirements

forthedesign.Incertaindemandingapplications,however,

the ripple voltage can be improved signiﬁcantly by con-

necting two or more types of capacitors in parallel. For

example, using a low ESR ceramic capacitor can minimize

the ESR step, while an electrolytic capacitor can be used

to supply the required bulk C.

f • ꢀI_L

The required saturation of the inductor should be chosen

to be greater than the peak inductor current:

I_O(MAX)

ꢂI_L

2

I_L(SAT)ꢀ

+

1ꢁD_MAX

Once the value for L is known, the type of inductor must be

selected. High efﬁciency converters generally cannot afford

thecorelossfoundinlowcostpowderedironcores, forcing

theuseofmoreexpensiveferrite,molypermalloyorKoolMμ^®

cores. A variety of inductors designed for high current, low

voltage applications are available from manufacturers such

as Sumida, Panasonic, Coiltronics, Coilcraft and Toko.

L

ꢁ

V

OUT

V

SW

C

R

L

IN

OUT

8a. Circuit Diagram

Schottky Diode D1 Selection

I

IN

I

L

The Schottky diode ꢁ1 shown in the front page schematic

conducts during the dead time between the conduction of

the power MOSFET switches. It is intended to prevent the

body diode of the synchronous MOSFET from turning on

and storing charge during the dead time, which can cause

a modest (about 15) efﬁciency loss. The diode can be

rated for about one half to one ﬁfth of the full load current

since it is on for only a fraction of the duty cycle. The peak

reverse voltage that the diode must withstand is equal to

the regulator output voltage. In order for the diode to be

effective, the inductance between it and the synchronous

MOSFET must be as small as possible, mandating that

these components be placed adjacently. The diode can

be omitted if the efﬁciency loss is tolerable.

8b. Inductor and Input Currents

I

SW

t

ON

8c. Switch Current

I

ꢁ

t

OFF

I

O

8d. Diode and Output Currents

ΔV

Output Capacitor Selection

COUT

V

OUT

In a boost converter, the output capacitor requirements

are demanding due to the fact that the current waveform

is pulsed. The choice of component(s) is driven by the

acceptable ripple voltage which is affected by the ESR,

ESL and bulk capacitance as shown in Figure 8e. The total

output ripple voltage is:

(AC)

RINGING ꢁUE TO

TOTAL INꢁUCTANCE

(BOARꢁ + CAP)

ΔV

ESR

8e. Output Voltage Ripple Waveform

3813 F08

Figure 8. Switching Waveforms for a Boost Converter

ꢁ

ꢄ

ꢆ

1

ESR

1–D

ꢀV_OUT=I_O(MAX)

+

ꢃ

f •C

ꢂ

_MAXꢅ

OUT

3813fb

18

LTC3813

APPLICATIONS INFORMATION

Once the output capacitor ESR and bulk capacitance

have been determined, the overall ripple voltage wave-

form should be veriﬁed on a dedicated PC board (see PC

Board Layout Checklist section for more information on

component placement). Lab breadboards generally suffer

fromexcessiveseriesinductance(duetointer-component

wiring), and these parasitics can make the switching

waveforms look signiﬁcantly worse than they would be

on a properly designed PC board.

can be used in cost-driven applications providing that

consideration is given to ripple current ratings and long

term reliability. Other capacitor types include Panasonic

SP and Sanyo POSCAPs. In applications with V

> 30V,

OUT

however, choices are limited to aluminum electrolytic and

ceramic capacitors.

Input Capacitor Selection

The input capacitor of a boost converter is less critical

than the output capacitor, due to the fact that the inductor

is in series with the input and the input current waveform

is continuous (see Figure 8b). The input voltage source

impedance determines the size of the input capacitor,

which is typically in the range of 10μF to 100μF. A low

ESR capacitor is recommended though not as critical as

for the output capacitor.

Theoutputcapacitorinaboostregulatorexperienceshigh

RMS ripple currents, as shown in Figure 8d. The RMS

output capacitor ripple current is:

V_O– V

IN(MIN)

I_RMS(COUT)ꢀI_O(MAX)•

V

IN(MIN)

The RMS input capacitor ripple current for a boost con-

verter is:

Note that the ripple current ratings from capacitor manu-

facturers are often based on only 2000 hours of life. This

makes it advisable to further derate the capacitor or to

choose a capacitor rated at a higher temperature than

required. Several capacitors may also be placed in parallel

to meet size or height requirements in the design.

V

IN(MIN)

I_RMS(CIN)= 0.3•

•D_MAX

L • f

Please note that the input capacitor can see a very high

surge current when a battery is suddenly connected to

the input of the converter and solid tantalum capacitors

can fail catastrophically under these conditions. Be sure

to specify surge-tested capacitors!

Manufacturers such as Nichicon, Nippon Chemi-con

and Sanyo should be considered for high performance

throughhole capacitors. The OS-CON (organic semicon-

ductor dielectric) capacitor available from Sanyo has the

lowestproductofESRandsizeofanyaluminumelectrolytic

at a somewhat higher price. An additional ceramic capaci-

tor in parallel with OS-CON capacitors is recommended

to reduce the effect of their lead inductance.

Output Voltage

The LTC3813 output voltage is set by a resistor divider

according to the following formula:

In surface mount applications, multiple capacitors placed

in parallel may be required to meet the ESR, RMS current

handlingandloadsteprequirements.ꢁrytantalum,special

polymerandaluminumelectrolyticcapacitorsareavailable

in surface mount packages. Special polymer capacitors

offer very low ESR but have lower capacitance density

than other types. Tantalum capacitors have the highest

capacitance density but it is important to only use types

that have been surge tested for use in switching power

supplies. Several excellent surge-tested choices are the

AVX TPS and TPSV or the KEMET Tꢀ10 series. Aluminum

electrolytic capacitors have signiﬁcantly higher ESR, but

ꢀ

_FB1ꢃ

_FB2ꢄ

R

V_OUT= 0.8V 1+

ꢂ

ꢅ

ꢁ

The external resistor divider is connected to the output as

shownintheFunctionalꢁiagram, allowingremotevoltage

sensing. The resultant feedback signal is compared with

the internal precision 800mV voltage reference by the

error ampliﬁer. The internal reference has a guaranteed

tolerance of <15. Tolerance of the feedback resistors

will add additional error to the output voltage. 0.15 to

15 resistors are recommended.

3813fb

19

LTC3813

APPLICATIONS INFORMATION

Input Voltage Undervoltage Lockout

BGRTN to ground? In high voltage switching converters,

the switch node dV/dt can be many volts/ns, which will

pull up on the gate of the bottom MOSFET through its

Miller capacitance. If this Miller current, times the internal

gate resistance of the MOSFET plus the driver resistance,

exceeds the threshold of the FET, shoot-through will oc-

cur. By using a negative supply on BGRTN, the BG can be

pulledbelowgroundwhenturningthebottomMOSFEToff.

This provides a few extra volts of margin before the gate

reaches the turn-on threshold of the MOSFET. Be aware

A resistor divider connected from the input supply to the

UVIN pin (see Functional ꢁiagram) is used to program the

input supply undervoltage lockout thresholds. When the

rising voltage at UVIN reaches 0.88V, the LTC3813 turns

on, and when the falling voltage at UVIN drops below 0.8V,

the LTC3813 is shut down—providing 105 hysteresis.

The input voltage UVLO thresholds are set by the resistor

divider according to the following formulas:

ꢀ

_UV1ꢃ

_UV2ꢄ

R

that the maximum voltage difference between ꢁRV and

CC

V

_IN,FALLING= 0.8V • 1+

ꢂ

ꢅ

BGRTNis14V. If, forexample, V

=–2V, themaximum

BGRTN

ꢁ

voltage on ꢁRV pin is now 12V instead of 14V.

CC

and

IC/MOSFET Driver Supplies (INTV and DRV )

CC

ꢀ

_UV1ꢃ

_UV2ꢄ

R

V

_IN,RISING= 0.88V • 1+

ꢂ

ꢅ

The LTC3813 drivers are supplied from the ꢁRV pin

CC

ꢁ

and the LTC3813 internal circuits from INTV pin (see

CC

Figure 1). These pins have an operating range between

6.2V and 14V. If the input voltage or another supply is not

available in this voltage range, two internal regulators are

providedtosimplifythegenerationofthisIC/driversupply

voltage as described in the next sections.

If input supply undervoltage lockout is not needed, it can

be disabled by connecting UVIN to INTV .

CC

Top MOSFET Driver Supply (C , D )

B

AnexternalbootstrapcapacitorC connectedtotheBOOST

B

pinsuppliesthegatedrivevoltageforthetopsideMOSFET.

The N

Pin Regulator

DRV

This capacitor is charged through diode ꢁ from ꢁRV

B

CC

The N

pin controls the gate of an external NMOS as

when the switch node is low. When the top MOSFET turns

ꢁRV

shown in Figure 9b and can be used to generate a regu-

lated 10V supply from V or V . Since the NMOS is

on, the switch node rises to V and the BOOST pin

OUT

rises to approximately V

+ ꢁRV . The boost capacitor

IN

OUT

CC

external, it can be chosen with a BV

or power rating

needs to store about 100x the gate charge required by the

top MOSFET. In most applications, 0.1μF to 0.47μF, XꢀR

or X7R dielectric capacitor is adequate.

ꢁSS

as high as necessary to safely derive power from a high

voltage input or output voltage. In order to generate an

INTV supply that is always above the 6.2V UV threshold,

CC

The reverse breakdown of the external diode, ꢁ , must be

B

the supply connected to the drain must be greater than

greaterthanV .Anotherimportantconsiderationforthe

OUT

6.2V + R

• 40μA + V .

NꢁRV

T

externaldiodeisthereverserecoveryandreverseleakage,

eitherofwhichmaycauseexcessivereversecurrenttoﬂow

at full reverse voltage. If the reverse current times reverse

voltage exceeds the maximum allowable power dissipa-

tion, the diode may be damaged. For best results, use an

ultrafast recovery diode such as the MMꢁL770T1.

The EXTV Pin Regulator

CC

A second low dropout regulator is available for voltages

≤ 1ꢀV. When a supply that is greater than 6.7V is con-

nected to the EXTV pin, the internal LꢁO will regulate

CC

10V on INTV from the EXTV pin voltage and will also

CC

disable the NꢁRV pin regulator. This regulator is disabled

when the IC is shut down, when INTV < 6.2V, or when

Bottom MOSFET Driver Return Supply (BGRTN)

CC

The bottom gate driver, BG, switches from ꢁRV to

CC

EXTV < 6.7V.

CC

BGRTN where BGRTN can be a voltage between ground

and –ꢀV. Why not just keep it simple and always connect

3813fb

20

LTC3813

APPLICATIONS INFORMATION

Using the INTV Regulators

to keep INTV above the UV threshold and the BV

CC ꢁSS

CC

of the external NMOS must be chosen to be greater

than V . The EXTV regulator is disabled by

One, both or neither of these regulators can be used to

generatethe10VIC/driversupplydependingonthecircuit

requirements, available supplies, and the voltage range

IN(MAX)

grounding the EXTV pin.

CC

< 14.7V and V is allowed to

IN(MAX) IN

of V or V . ꢁeriving the 10V supply from V is more

3. Figure 9c. If the V

fall below 6.2V without disrupting the boost converter

operation, use this conﬁguration. The INTV supply

IN

OUT

IN

efﬁcient, however deriving it from V

of maintaining regulation of V

the UV threshold. Four possible conﬁgurations are shown

in Figures 9a through 9d, and are described as follows:

has the advantage

when V drops below

OUT

IN

CC

is derived from V until the V

> 6.7V. Once INTV

IN

OUT CC

is derived from V , V can fall below the 6V UV

OUT IN

threshold without losing regulation of V . Note that

OUT

1. Figure 9a. If the V voltage or another low voltage

IN

in this conﬁguration, V must be > 7V at least long

IN

supply between 6.2V and 14V is available, the sim-

enough to start up the LTC3813 and charge V

>

OUT

CC

plest approach is to connect this supply directly to the

6.7V. Also, since V

is connected to the EXTV pin,

OUT

INTV and ꢁRV pins. The internal regulators are

CC

this conﬁguration is limited to V

< 1ꢀV.

OUT

disabled by shorting NꢁRV and EXTV to INTV .

CC

4. Figure 9d. Similar to conﬁguration 3 except that V

OUT

2. Figure 9b. If V

> 14V, an external NMOS con-

IN(MAX)

is allowed to be >1ꢀV since V

is connected to an

OUT

nected to the NꢁRV pin can be used to generate 10V

external NMOS with appropriately rated BV . V has

ꢁSS IN

from V . V

must be > 6.2V + R

• 40μA + V

NꢁRV T

IN IN(MIN)

same start-up requirement as 3.

V

IN

R

NꢁRV

INTV

CC

INTV

10V

CC

+

LTC3813

+

–

LTC3813

6.2V to

14V

EXTV

CC

(a) 6.2V to 14V

Supply Available

(b) INTV from V ,

CC IN

V

> 14V

IN

V

OUT

V

< 14.7V

IN

V

< 14.7V

IN

R

NꢁRV

INTV

CC

10V

CC

+

LTC3813

EXTV

CC

EXTV

V

≤ 1ꢀV

CC

OUT

3813 F09

(c) INTV from V

,

(d) INTV from V

,

OUT

CC

OUT

CC

V

≤ 15V

V

> 15V

OUT

Figure 9. Four Possible Ways to Generate INTV_CCSupply

3813fb

21

LTC3813

APPLICATIONS INFORMATION

Power Dissipation Considerations

ꢀ

_SENSE(MAX)ꢃ

R_L• V • V

V_OUT(s)

IN

H(s)=

=

(1)

ꢂ

ꢅ

Applications using large MOSFETs and high frequency

V (s)

2.4• V_OUT• R_DS(ON)

ꢄ

ꢁ

ITH

of operation may result in a large ꢁRV /INTV supply

CC

ꢀ

_OUTꢃ

1+ s • R_ESR• C

1+ s • R_L• C_OUT

current. Therefore, when using the linear regulators, it is

•

ꢂ

ꢅ

necessary to verify that the resulting power dissipation

ꢁ

ꢄ

is within the maximum limits. The ꢁRV /INTV supply

CC

2

ꢀ

ꢃ

ꢅ

ꢄ

V_OUT

L

current consists of the MOSFET gate current plus the

• 1ꢆ s •

•

ꢂ

2

LTC3813 quiescent current:

R_L

V

ꢁ

IN

I

= (f)(Q

+ Q

) + 3mA

G(BOTTOM)

CC

G(TOP)

s= j2ꢇ f

When using the internal LꢁO regulator, the power dissipa-

tion is internal so the rise in junction temperature can be

estimatedfromtheequationgiveninNote2oftheElectrical

Characteristics as follows:

This portion of the power supply is pretty well out of the

user’s control since the current sense is chosen based on

maximum output load, and the output capacitor is usually

chosen based on load regulation and ripple requirements

without considering AC loop response. The feedback am-

pliﬁer, on the other hand, gives us a handle on which to

adjust the AC response. The goal is to have an 180° phase

shift at ꢁC so the loop regulates and less than 360° phase

shift at the point where the loop gain falls below 0dB, i.e.,

the crossover frequency, with as much gain as possible

at frequencies below the crossover frequency. Since the

feedback ampliﬁer adds an additional 90° phase shift to

the phase shift already present from the modulator/output

stage, some phase boost is required at the crossover

frequency to achieve good phase margin. The design

procedure (described in more detail in the next section) is

to (1) obtain a gain/phase plot of modulator/output stage,

(2) choose a crossover frequency and the required phase

boost, and (3) calculate the compensation network.

T = T + I

• (V

– V )(100°C/W)

INTVCC

J

A

EXTVCC

and must not exceed 12ꢀ°C.

Likewise, iftheexternalNMOSregulatorisused, theworst

case power dissipation is calculated to be:

P

= (V – 10V) • I

ꢁRAIN(MAX) CC

MOSFET

and can be used to properly size the device.

FEEDBACK LOOP/COMPENSATION

Introduction

In a typical LTC3813 circuit, the feedback loop consists of

twosections:themodulator/outputstageandthefeedback

ampliﬁer/compensation network. The modulator/output

stage consists of the current sense component and in-

ternal current comparator, the power MOSFET switches

and drivers, and the output ﬁlter and load. The transfer

function of the modulator/output stage for a boost con-

180

90

GAIN

verter consists of an output capacitor pole, R C , and

L OUT

an ESR zero, R

C

OUT

, and also a “right-half plane” zero,

). Ithasagain/phasecurvethatistypi-

ESR OUT

(R /L)(V /V

0

2

L

IN

cally like the curve shown in Figure 10 and is expressed

mathematically in the following equation.

PHASE

–90

–180

FREQUENCY (Hz)

3813 F10

Figure 10. Bode Plot of Boost Modulator/Output Stage

3813fb

22

LTC3813

APPLICATIONS INFORMATION

C2

C1

IN

R2

–6dB/OCT

GAIN

R1

FB

–6dB/OCT

–

R

OUT

0

FREQ

–90

B

V

+

REF

–180

–270

–360

PHASE

3813 F11

Figure 11. Type 2 Schematic and Transfer Function

IN

C2

C1

R2

C3

R1

R3

FB

–6dB/OCT

–

GAIN

+6dB/OCT

–6dB/OCT

R

OUT

0

FREQ

–90

B

V

+

REF

–180

–270

–360

PHASE

3813 F12

Figure 12. Type 3 Schematic and Transfer Function

Thetwotypesofcompensationnetworks, Type2andType

3areshowninFigures11and12.Whencomponentvalues

are chosen properly, these networks provide a “phase

bump” at the crossover frequency. Type 2 uses a single

pole-zero pair to provide up to about 60° of phase boost

while Type 3 uses two poles and two zeros to provide up

to 1ꢀ0° of phase boost.

for a speciﬁc crossover frequency. These two factors

usually can be overcome if the crossover frequency is

chosen low enough.

Feedback Component Selection

Selecting the R and C values for a typical Type 2 or

Type 3 loop is a nontrivial task. The applications shown

in this data sheet show typical values, optimized for the

power components shown. They should give acceptable

performance with similar power components, but can be

way off if even one major power component is changed

signiﬁcantly. Applications that require optimized transient

response will require recalculation of the compensation

values speciﬁcally for the circuit in question. The underly-

ing mathematics are complex, but the component values

can be calculated in a straightforward manner if we know

the gain and phase of the modulator at the crossover

frequency.

The compensation of boost converters are complicated

by two factors: the RHP zero and the dependence of the

loop gain on the duty cycle. The RHP zero adds additional

phase lag and gain. The phase lag degrades phase margin

and the added gain keeps the gain high typically in the

frequency region where the user is trying the roll off the

gain below 0dB. This often forces the user to choose a

crossover frequency at a lower frequency than originally

desired. The duty cycle effect of gain (see above transfer

function)causesthephasemarginandcrossoverfrequency

to be dependent on the input supply voltage which may

causeproblemsiftheinputvoltagevariesoverawiderange

since the compensation network can only be optimized

Modulator gain and phase can be obtained in one of

three ways: measured directly from a breadboard, or if

3813fb

23

LTC3813

APPLICATIONS INFORMATION

.param rdson=0.02

the appropriate parasitic values are known, simulated or

generated from the modulator transfer function. Mea-

surement will give more accurate results, but simulation

or transfer function can often get close enough to give

a working system. To measure the modulator gain and

phase directly, wire up a breadboard with an LTC3813

and the actual MOSFETs, inductor and input and output

capacitors that the ﬁnal design will use. This breadboard

should use appropriate construction techniques for high

speed analog circuitry: bypass capacitors located close

to the LTC3813, no long wires connecting components,

appropriately sized ground returns, etc. Wire the feedback

.param Vrng=1

.param vsnsmax={0.173*Vrng-0.026}

.param K={vsnsmax/rdson/1.2}

.param wz={1/esr/cout}

.param wp={2/rload/cout}

*

* Feedback Ampliﬁer

rfb1 outin vfb 29k

rfb2 vfb 0 1k

eithx ithx 0 laplace {0.8-v(vfb)} =

{1/(1+s/1000)}

eith ith 0 value={limit(1e6*v(ithx),0,2.4)}

cc1 ith vfb 100p

ampliﬁer with a 0.1μF feedback capacitor from I to FB

TH

and a 10k to 100k resistor from V

to FB. Choose the

OUT

cc2 ith x1 0.01μ

bias resistor (R ) as required to set the desired output

B

rc x1 vfb 100k

voltage. ꢁisconnect R from ground and connect it to

B

*

a signal generator or to the source output of a network

* Modulator/Output Stage

eout out 0 laplace {v(ith)} =

{0.5*K*Rload*vin/vout *(1+s/wz)/(1+s/wp)

*(1-s*L/Rload*vout*vout/vin/vin)}

rload out 0 {rload}

*

analyzer to inject a test signal into the loop. Measure the

gain and phase from the I pin to the output node at the

TH

positive terminal of the output capacitor. Make sure the

analyzer’s input is AC coupled so that the ꢁC voltages

present at both the I and V

nodes do not corrupt

OUT

TH

the measurements or damage the analyzer.

vstim out outin dc=0 ac=10m; ac stimulus

.ac dec 100 10 10meg

.probe

If breadboard measurement is not practical, mathemat-

ical software such as MATHCAꢁ or MATLAB can be used

to generate plots from the transfer function given in

equation 1. A SPICE simulation can also be used to gener-

ate approximate gain/phase curves. Plug the expected

capacitor, inductor and MOSFET values into the following

.end

With the gain/phase plot in hand, a loop crossover fre-

quency can be chosen. Usually the curves look something

likeFigure10.Choosethecrossoverfrequencyabout2ꢀ5

of the switching frequency for maximum bandwidth. Al-

SPICEdeckand generateanACplotofV /V withgain

OUT ITH

in dB and phase in degrees. Refer to your SPICE manual

though it may be tempting to go beyond f /4, remember

SW

for details of how to generate this plot.

that signiﬁcant phase shift occurs at half the switching

frequency that isn’t modeled in the above H(s) equation

and PSPICE code. Note the gain (GAIN, in dB) and phase

(PHASE, in degrees) at this point. The desired feedback

ampliﬁer gain will be –GAIN to make the loop gain at 0dB

at this frequency. Now calculate the needed phase boost,

assuming 60° as a target phase margin:

*This ﬁle simulates a simpliﬁed model of

the LTC3813 for generating a v(out)/(vith)

or a v(out)/v(outin) bode plot

.param vout=24

.param vin=12

.param L=10u

.param cout=270u

.param esr=.018

.param rload=24

*

BOOST = – (PHASE + 30°)

If the required BOOST is less than 60°, a Type 2 loop can

be used successfully, saving two external components.

BOOST values greater than 60° usually require Type 3

loops for satisfactory performance.

3813fb

24

LTC3813

APPLICATIONS INFORMATION

Finally, choose a convenient resistor value for R1 (10k SPICE or mathematical software can be used to generate

is usually a good value). Now calculate the remaining the gain/phase plots for the compensated power supply to

values:

(K is a constant, used in the calculations)

do a sanity check on the component values before trying

them out on the actual hardware. For software, use the

following transfer function:

f = chosen crossover frequency

T(s) = A(s)H(s)

(GAIN/20)

G = 10

(this converts GAIN in dB to G in

where H(s) was given in equation 1 and A(s) depends on

compensation circuit used:

absolute gain)

TYPE 2 Loop:

Type 2:

BOOST

ꢀ

ꢁ

ꢃ

ꢄ

1+ s •R3•C2

K = tan

+ 45°

ꢂ

ꢅ

A (s)=

2

C2 •C3

C2+C3

ꢀ

ꢃ

ꢄ

s •R1• C2+C3 • 1+ s •R3•

(

)

1

ꢂ

ꢅ

ꢁ

C2=

2ꢆ • f •G•K •R1

C1=C2 K²ꢇ1

Type 3:

A (s)=

(

)

1

K

•

R2=

R_B=

s •R1• C2+C3

(

)

2ꢆ • f •C1

V_REF(R1)

_OUTꢇ V_REF

1+ s • R1+R3 •C3 • 1+ s •R2•C1

(

)

(

V

C1• C2

C1+C2

ꢀ

ꢃ

1+ s •R3•C3 • 1+ s •R2•

(

)

ꢂ

ꢅ

ꢁ

ꢄ

TYPE 3 Loop:

For SPICE, simulate the previous PSPICE code with

calculated compensation values entered and generate a

BOOST

4

1

ꢀ

ꢁ

ꢃ

ꢄ

K = tan²

+ 45°

ꢂ

ꢅ

gain/phase plot of V /V

.

OUT OUTIN

C2=

Fault Conditions: Current Limit

2ꢆ • f •G•R1

C1=C2 K ꢇ1

(

)

The maximum inductor current is inherently limited in a

current mode controller by the maximum sense voltage.

In the LTC3813, the maximum sense voltage is controlled

K

R2=

R3=

C3=

2ꢆ • f •C1

by the voltage on the V

pin. With peak current control,

RNG

R1

the maximum sense voltage and the sense resistance

determine the maximum allowed inductor peak current.

The corresponding output current limit is:

K ꢇ1

1

2ꢆf K • R3

V_SNS(MAX)

1

I_LIMIT

=

ꢁ ꢂI_L

2

V_REF(R1)

_OUTꢇ V_REF

R_DS(ON)ꢀ_T

R_B=

V

The current limit value should be checked to ensure that

I

>I

.Theminimumvalueofcurrentlimit

LIMIT(MIN) OUT(MAX)

generally occurs at the lowest V at the highest ambient

IN

temperature, conditions that cause the largest power loss

in the converter. Note that it is important to check for

3813fb

25

LTC3813

APPLICATIONS INFORMATION

self-consistency between the assumed MOSFET junction

The LTC3813 incorporates a pulse detection circuit that

will detect a clock on the SYNC pin. In turn, it will turn on

the phase-locked loop function. The pulse width of the

clock has to be greater than 400ns and the amplitude of

the clock should be greater than 2V.

temperature and the resulting value of I

the MOSFET switches.

which heats

LIMIT

Caution should be used when setting the current limit

based upon the R of the MOSFETs. The maximum

ꢁS(ON)

current limit is determined by the minimum MOSFET

on-resistance. ꢁata sheets typically specify nominal

The internal oscillator locks to the external clock after the

second clock transition is received. If an external clock

transition is not detected for three successive periods, the

internaloscillatorwillreverttothefrequencyprogrammed

and maximum values for R

, but not a minimum.

ꢁS(ON)

A reasonable assumption is that the minimum R

ꢁS(ON)

lies the same percentage below the typical value as the

maximumliesaboveit.ConsulttheMOSFETmanufacturer

for further guidelines.

by the R resistor.

OFF

ꢁuring the start-up phase, phase-locked loop function is

disabled. When LTC3813 is not in synchronization mode,

PLL/LPF pin voltage is set to around 1.21ꢀV. Frequency

synchronization is accomplished by changing the inter-

nal off-time current according to the voltage on the

PLL/LPF pin.

Note that in a boost mode architecture, it is only possible

to provide protection for “soft” shorts where V

> V .

OUT

IN

For hard shorts, the inductor current is limited only by the

input supply capability.

The phase detector used is an edge sensitive digital type

which provides zero degrees phase shift between the ex-

ternal and internal pulses. This type of phase detector will

not lock up on input frequencies close to the harmonics

Soft-Start

The LTC3813 has the ability to soft-start with a capacitor

connected to the SS pin. The LTC3813 is put in a low

quiescent current shutdown state (I ~240μA) if the

Q

of the V center frequency. The PLL hold-in range, Δf ,

CO

H

SHDN pin voltage is below 1.ꢀV. The SS pin is actively

pulled to ground in this shutdown state. Once the SHDN

pin voltage is above 1.ꢀV, the LTC3813 is powered up. A

soft-start current of 1.4μA then starts to charge the soft-

is equal to the capture range, Δf

C:

Δf = Δf = 0.3 f

O

H

C

Theoutputofthephasedetectorisacomplementarypairof

current sources charging or discharging the external ﬁlter

network on the PLL/LPF pin. A simpliﬁed block diagram

is shown in Figure 13.

start capacitor C . Soft-start is achieved by limiting the

SS

maximum output current of the controller by controlling

the ramp rate of the I voltage. The total soft-start time

TH

can be calculated as:

R

LP

2.4V

C_SS

C

LP

t

_SOFTSTARTꢀ2.4 •

1.4μA

PLL/LPF

VCO

ꢁIGITAL

SYNC

Phase-Locked Loop and Frequency Synchronization

PHASE/

FREQUENCY

ꢁETECTOR

The LTC3813 has a phase-locked loop comprised of an

internal voltage controlled oscillator and phase detector.

This allows the top MOSFET turn-on to be locked to the

rising edge of an external source. The frequency range

of the voltage controlled oscillator is 305 around the

center frequency f . The center frequency is the operating

frequency discussed in the Operating Frequency section.

3813 F13

Figure 13. Phase-Locked Loop Block Diagram

O

3813fb

26

LTC3813

APPLICATIONS INFORMATION

If the external frequency (f

) is greater than the oscil-

current is maximum at maximum output current and

minimuminputvoltage.Theaverageinputcurrentﬂows

through L, but is chopped between the top and bottom

MOSFETs. If the two MOSFETs have approximately the

SYNC

lator frequency f , current is sourced continuously, pull-

O

ing up the PLL/LPF pin. When the external frequency is

less than f , current is sunk continuously, pulling down

O

the PLL/LPF pin. If the external and internal frequencies

are the same but exhibit a phase difference, the current

sources turn on for an amount of time corresponding to

the phase difference. Thus the voltage on the PLL/LPF

pinisadjusteduntilthephaseandfrequencyoftheexternal

andinternaloscillatorsareidentical.Atthisstableoperating

point the phase comparator output is open and the ﬁlter

same R

, then the resistance of one MOSFET can

ꢁS(ON)

simply be summed with the resistances of L and the

2

board traces to obtain the ꢁC I R loss. For example, if

R

= 0.01Ω and R = 0.00ꢀΩ, the loss will range

ꢁS(ON)

L

from 1ꢀmW to 1.ꢀW as the input current varies from

1A to 10A.

2. Transition loss. This loss arises from the brief amount

of time the bottom MOSFET spends in the saturated

region during switch node transitions. It depends upon

the output voltage, load current, driver strength and

MOSFET capacitance, among other factors. The loss

is signiﬁcant at output voltages above 20V and can be

capacitor C holds the voltage. The LTC3813 SYNC pin

LP

must be driven from a low impedance source such as a

logic gate located close to the pin.

The loop ﬁlter components (C , R ) smooth out the

LP

current pulses from the phase detector and provide a

stable input to the voltage controlled oscillator. The ﬁlter

estimated from the second term of the P

equa-

MAIN

components C and R determine how fast the loop

tion found in the Power MOSFET Selection section.

When transition losses are signiﬁcant, efﬁciency can

be improved by lowering the frequency and/or using a

LP

acquires lock. Typically R = 10kΩ and C is 0.01μF

LP

to 0.1μF.

bottom MOSFET(s) with lower C

at the expense of

RSS

Pin Clearance/Creepage Considerations

higher R

.

ꢁS(ON)

The LTC3813 is available in the G28 package which

has 0.0106" spacing between adjacent pins. To

maximize PC board trace clearance between high volt-

age pins, the LTC3813 has three unconnected pins

between all adjacent high voltage and low voltage

pins, providing 4(0.0106") = 0.042" clearance which

will be sufﬁcient for most applications up to 100V.

For more information, refer to the printed circuit board

design standards described in IPC-2221 (www.ipc.org).

3. INTV /ꢁRV current. This is the sum of the MOSFET

CC

driver and control currents. Control current is typically

about 3mA and driver current can be calculated by:

I

=f(Q

+Q

), whereQ andQ

G(TOP) G(BOT)

GATE

G(TOP)

G(BOT)

are the gate charges of the top and bottom MOSFETs.

This loss is proportional to the supply voltage that

INTV /ꢁRV is derived from, i.e., V , V or an

CC

IN OUT

external supply connected to INTV /ꢁRV .

CC

4. C

loss. The output capacitor has the difﬁcult job

OUT

of ﬁltering the large RMS input current out of the syn-

Efﬁciency Considerations

chronous MOSFET. It must have a very low ESR to

minimize the AC I R loss

2

The percent efﬁciency of a switching regulator is equal to

the output power divided by the input power times 1005.

It is often useful to analyze individual losses to determine

what is limiting the efﬁciency and which change would

produce the most improvement. Although all dissipative

elements in the circuit produce losses, four main sources

account for most of the losses in LTC3813 circuits:

.

Other losses, including C ESR loss, Schottky diode ꢁ1

IN

conduction loss during dead time and inductor core loss

generally account for less than 25 additional loss. When

making adjustments to improve efﬁciency, the input cur-

rent is the best indicator of changes in efﬁciency. If you

make a change and the input current decreases, then the

efﬁciency has increased. If there is no change in input

current, then there is no change in efﬁciency.

2

1. ꢁC I R losses. These arise from the resistances of the

MOSFETs, inductor and PC board traces and cause

the efﬁciency to drop at high input currents. The input

3813fb

27

LTC3813

APPLICATIONS INFORMATION

Checking Transient Response

The peak inductor current is:

5A

The regulator loop response can be checked by looking

at the load transient response. Switching regulators take

several cycles to respond to a step in load current. When

1

I_L(PEAK)

=

+ (4A)=12A

1ꢀ 0.5 2

Choose the CꢁEP147 ꢀ.9μH inductor with I

at 100°C.

= 16.4A

load step occurs, V

immediately shifts by an amount

SAT

OUT

equal to ΔI

(ESR), where ESR is the effective series

LOAꢁ

resistance of C . ΔI

also begins to charge or dis-

OUT

LOAꢁ

Next, choose the bottom MOSFET switch. Since the drain

of the MOSFET will see the full output voltage plus any

ringing, choose a 40V MOSFET to provide a margin of

safety. The Si7848ꢁP has:

chargeC generatingafeedbackerrorsignalusedbythe

OUT

regulator to return V

this recovery time, V

to its steady-state value. ꢁuring

can be monitored for overshoot

OUT

or ringing that would indicate a stability problem.

BV

R

= 40V

ꢁS(ON)

δ = 0.006/°C,

ꢁSS

= 9mΩ(max)/7.ꢀmΩ(nom),

Design Example

Asadesignexample,takeasupplywiththefollowingspeci-

C

V

= (14nC – 6nC)/20V = 400pF,

MILLER

GS(MILLER)

ﬁcations: V = 12V 205, V

= 24V ꢀ5, I

=

IN

OUT

OUT(MAX)

= 3.ꢀV,

ꢀA, f=2ꢀ0kHz. SinceV canvaryaroundthe12Vnominal

IN

θ = 20°C/W.

JA

value, connect a resistive divider from V to V to keep

the frequency independent of V changes:

IN

OFF

This yields a nominal sense voltage of:

IN

R1 12V

R2 1.55V

1.7 •0.0075ꢀ •5A

=

ꢀ1= 6.74

V_SNS(NOM)

=

=128mV

1ꢁ 0.5

Toguaranteepropercurrentlimitatworst-caseconditions,

Choose R1 = 133k and R2 = 20k. Now calculate timing

increase nominal V by ꢀ05 to 190mV. To check if the

resistor R

:

SNS

OFF

current limit is acceptable at V

= 190mV, assume a

SNS

1+133k / 20k

250kHz •76pF

junction temperature of about 30°C above a 70°C ambient

(ρ = 1.4):

R_OFF

=

= 402.6k

100°C

190mV

1.4•0.009ꢁ

1

2

The duty cycle is:

I

_IN(MAX)ꢀ

ꢂ • 4A =13A

12V

D=1ꢀ

= 0.5

24V

I

= I • (1-ꢁ

) = 6.ꢀA

MAX

OUT(MAX)

IN(MAX)

and double-check the assumed T in the MOSFET:

and the maximum input current is:

J

1

ꢁ

ꢂ

ꢄ

ꢅ

5A

1ꢀ 0.5

2

P_TOP

=

6.5A (1.4)(0.009ꢇ)=1.06W

I

=

=10A

(

)

ꢃ

ꢆ

IN(MAX)

1ꢀ 0.5

Choose the inductor for about 405 ripple current at the

T = 70°C + 1.06W • 20°C/W = 91°C

J

maximum V :

IN

12V

250kHz •0.4•10A

12V

24V

ꢁ

ꢂ

ꢄ

ꢅ

L =

1ꢀ

= 6μH

ꢃ

ꢆ

3813fb

28

LTC3813

APPLICATIONS INFORMATION

Verify that the Si7848ꢁP is also a good choice for the

bottom MOSFET by checking its power dissipation at

current limit and minimum input voltage, assuming a

junction temperature of 30°C above a 70°C ambient

Since V is always between 6.2V and 14V, it can be con-

IN

nected directly to the INTV and ꢁRV pins.

CC

C

OUT

is chosen for an RMS current rating of about ꢀA at

8ꢀ°C. The output capacitors are chosen for a low ESR

of 0.018Ω to minimize output voltage changes due to

inductor ripple current and load steps. The ripple voltage

will be only:

(ρ

= 1.4):

100°C

ꢁ

ꢂ

ꢄ²

ꢅ

6.5A

1ꢀ 0.5

P_BOT= 0.5

(1.4)(0.009ꢇ)

ꢃ

ꢆ

ꢂ

ꢅ

1

0.018

1

2

6.5A

1ꢀ 0.5

ꢁ

ꢂ

ꢄ

ꢅ

+ (24V)²

(2)(400pF)

ꢀV_OUT(RIPPLE)=(5A)

= 0.25V (about 1%)

+

ꢄ

ꢇ

ꢃ

ꢆ

250kHz •330μF 1ꢁ 0.5

ꢃ

ꢆ

1

ꢁ

ꢂ

ꢄ

ꢅ

•

+

(250kHz)

ꢃ

ꢆ

12V ꢀ 3.5V 3.5V

A 0A to ꢀA load step will cause an output change of up to:

ΔV = ΔI • ESR = ꢀA • 0.018Ω

=1.06W + 0.30W =1.36W

T = 70°C + 1.36W • 20°C/W = 97°C

OUT(STEP)

LOAꢁ

= 90mV

J

An optional 10μF ceramic output capacitor is included

to minimize the effect of ESL in the output ripple. The

complete circuit is shown in Figure 14.

The junction temperature will be signiﬁcantly less at

nominal current, but this analysis shows that careful at-

tention to heat sinking on the board will be necessary in

this circuit.

V

IN

12V

C

IN1

V

OUT

68μF

20V

133k

C

IN2

1μF

20V

R

OFF

403k

ꢁB

BAS19

C

OFF

100pF

20k

L1

ꢀ.9μH

PGNꢁ

LTC3813

28

BOOST

1

I

OFF

C

B

0.1μF

27

26

TG

4

ꢀ

6

7

8

SW

V

OFF

RNG

M1

Si7848ꢁP

V

OUT

24V

ꢀA

PGOOꢁ

SYNC

2ꢀ

21

+

SENSE

–

I

TH

R

UV1

11ꢀk

9

10

20

V

FB

BGRTN

ꢁ1

B1100

C

OUT

330μF

3ꢀV

C

PLL/LPF

ꢁRVCC

C

SS

1000pF

0.1μF

19

18

M2

Si7848ꢁP

BG

2x

11

SS

ꢁRV

CC

17

16

1ꢀ

12

13

14

SGNꢁ

SHDN

UVIN

INTV

EXTV

NꢁRV

CC

SHDN

C

VCC

1μF

SGNꢁ

PGNꢁ

C

C2

R

UV2

470pF

10k

C

47pF

C1

R

2ꢀ0k

C

R

FB2

1k

R

FB1

29.4k

3813 F14

Figure 14. 12V Input Voltage to 24V/5A

3813fb

29

LTC3813

APPLICATIONS INFORMATION

PC Board Layout Checklist

When laying out a printed circuit board, without a ground

plane, use the following checklist to ensure proper opera-

tion of the controller.

When laying out a PC board follow one of two suggested

approaches. The simple PC board layout requires a dedi-

cated ground plane layer. Also, for higher currents, it is

recommended to use a multilayer board to help with heat

sinking power components.

• Segregate the signal and power grounds. All small

signal components should return to the SGNꢁ pin at

one point which is then tied to the PGNꢁ pin close to

the source of M2.

• The ground plane layer should not have any traces and

it should be as close as possible to the layer with power

MOSFETs.

• Place M2 as close to the controller as possible, keeping

the PGNꢁ, BG and SW traces short.

•

Connect the input capacitor(s) C close to the pow-

er MOSFETs. This capacitor carries the MOSFET AC

current.

• Place C , C , MOSFETs, ꢁ1 and inductor all in one

IN

IN OUT

compact area. It may help to have some components

on the bottom side of the board.

• Keep the high dV/dt SW, BOOST and TG nodes away

from sensitive small-signal nodes.

•

Use an immediate via to connect the components to

ground plane including SGNꢁ and PGNꢁ of LTC3813.

Use several bigger vias for power components.

• Connect the INTV decoupling capacitor C

closely

CC

VCC

to the INTV and SGNꢁ pins.

CC

• Use compact plane for switch node (SW) to improve

cooling of the MOSFETs and to keep EMI down.

• Connect the top driver boost capacitor C closely to

B

the BOOST and SW pins.

• Use planes for V and V

to maintain good voltage

OUT

IN

ﬁltering and to keep power losses low.

• ConnectthebottomdriverdecouplingcapacitorC

ꢁRVCC

closely to the ꢁRV and BGRTN pins.

CC

• Floodallunusedareasonalllayerswithcopper.Flooding

with copper will reduce the temperature rise of power

component. You can connect the copper areas to any

ꢁC net (V , V , GNꢁ or to any other ꢁC rail in your

IN OUT

system).

3813fb

30

LTC3813

PACKAGE DESCRIPTION

G Package

28-Lead Plastic SSOP (5.3mm)

(Reference LTC ꢁWG # 0ꢀ-08-1640)

9.90 – 10.ꢀ0*

(.390 – .413)

28 27 26 2ꢀ 24 23 22 21 20 19 18

16 1ꢀ

17

1.2ꢀ ±0.12

7.8 – 8.2

ꢀ.3 – ꢀ.7

7.40 – 8.20

(.291 – .323)

0.42 ±0.03

0.6ꢀ BSC

ꢀ

7

8

1

2

3

4

6

9 10 11 12 13 14

RECOMMENꢁEꢁ SOLꢁER PAꢁ LAYOUT

2.0

(.079)

MAX

ꢀ.00 – ꢀ.60**

(.197 – .221)

0° – 8°

0.6ꢀ

(.02ꢀ6)

BSC

0.09 – 0.2ꢀ

0.ꢀꢀ – 0.9ꢀ

(.003ꢀ – .010)

(.022 – .037)

0.0ꢀ

0.22 – 0.38

(.009 – .01ꢀ)

TYP

(.002)

NOTE:

MIN

1. CONTROLLING ꢁIMENSION: MILLIMETERS

MILLIMETERS

2. ꢁIMENSIONS ARE IN

(INCHES)

G28 SSOP 0204

3. ꢁRAWING NOT TO SCALE

*ꢁIMENSIONS ꢁO NOT INCLUꢁE MOLꢁ FLASH. MOLꢁ FLASH

SHALL NOT EXCEEꢁ .1ꢀ2mm (.006") PER SIꢁE

**ꢁIMENSIONS ꢁO NOT INCLUꢁE INTERLEAꢁ FLASH. INTERLEAꢁ

FLASH SHALL NOT EXCEEꢁ .2ꢀ4mm (.010") PER SIꢁE

3813fb

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

31

LTC3813

TYPICAL APPLICATION

24V Input Voltage to 50V/5A Synchronized at 250kHz

V

IN

12V TO 40V

V

OUT

C

68μF

ꢀ0V

IN1

R

NꢁRV

100k

C

1μF

ꢀ0V

R

OFF

806k

IN2

M3

143k

ZXMN10A07F

C

ꢁB

BAS19

OFF

100pF

PGNꢁ

L1

LTC3813

1

4

28

10μH

I

BOOST

OFF

C , 0.1μF

B

27

26

10k

TG

SW

V

OFF

M1

Si78ꢀ0ꢁP

ꢀ

6

RNG

V

OUT

PGOOꢁ

SYNC

7

2ꢀ

21

20

+

ꢀ0V

ꢀA

2ꢀ0kHz

CLOCK

SENSE

8

9

10

–

SENSE

I

TH

0.01μF

V

BGRTN

BG

10k

FB

ꢁ1

B1100

C

PLL/LPF

ꢁRVCC

0.1μF

C

OUT1

C

SS

1000pF

M2

Si78ꢀ0

2x

R

UV1

220μF

63V

2x

19

18

140k

11

C

OUT2

ꢁRV

CC

SS

10μF

100V

2x

17

16

1ꢀ

12

13

14

INTV

CC

SGNꢁ

SHDN

UVIN

SHDN

EXTV

CC

NꢁRV

C

VCC

1μF

SGNꢁ

PGNꢁ

R

C

UV2

C2

330pF

10k

C

R

300k

C1

C

R

FB1

30.9k

R

FB2

499Ω

1ꢀ0pF

3813 TA02

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3813fb

LT 0408 REV B • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

32

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(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC3813IG#TRPBF
厂家：	Linear
描述：	LTC3813 - 100V Current Mode Synchronous Step-Up Controller; Package: SSOP; Pins: 28; Temperature Range: -40°C to 85°C 开关光电二极管
文件：	总32页 (文件大小：450K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC3813IG#TRPBF [Linear]

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