LTC3872EDDB-1#TRPBF [Linear]
LTC3872-1 - No RSENSE Current Mode Boost DC/DC Controller; Package: DFN; Pins: 8; Temperature Range: -40°C to 85°C;
| 型号： | LTC3872EDDB-1#TRPBF |
| 厂家： | 
Linear |
| 描述： | LTC3872-1 - No RSENSE Current Mode Boost DC/DC Controller; Package: DFN; Pins: 8; Temperature Range: -40°C to 85°C 开关 光电二极管 |
| 文件： | 总20页 (文件大小：296K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3872-1
No R
SENSE
Current Mode Boost
DC/DC Controller
FeaTures
DescripTion
The LTC®3872-1 is a constant frequency current mode
boost DC/DC controller that drives an N-channel power
MOSFET and requires very few external components. The
n
No Current Sense Resistor Required
OUT
n
V
up to 60V
n
n
n
n
n
n
n
Constant Frequency 550kHz Operation
Internal Soft-Start and Optional External Soft-Start
Adjustable Current Limit
No R
TM architecture eliminates the need for a sense
SENSE
resistor, improves efficiency and saves board space.
Pulse Skipping at Light Load
The LTC3872-1 provides excellent AC and DC load and
line regulation with 1.ꢀ5 output voltage accuracy. It
incorporates an undervoltage lockout feature that shuts
down the device when the input voltage falls below 2.3V.
V Range: 2.7ꢀV to 9.8V
IN
1.ꢀ5 Voltage Reference Accuracy
Current Mode Operation for Excellent Line and Load
Transient Response
n
LTC3872-1 has the same functionality as the standard
LTC3872 except that it has no frequency foldback in cur-
rent limit.
Low Profile (1mm) SOT-23 and 2mm × 3mm DFN
Packages
High switching frequency of ꢀꢀ0kHz allows the use of a
small inductor. The LTC3872-1 is available in an 8-lead
low profile (1mm) ThinSOTTM package and 8-pin 2mm ×
3mm DFN package.
applicaTions
n
Telecom Power Supplies
n
42V Automotive Systems
n
24V Industrial Controls
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
n
IP Phone Power Supplies
No R
and ThinSOT are trademarks of Linear Technology Corporation. All other trademarks
SENSE
are the property of their respective owners.
Typical applicaTion
High Efficiency 3.3V Input, 5V Output Boost Converter
Efficiency and Power Loss vs Load Current
100
90
80
70
60
50
40
30
20
10
0
10
1.8nF
17.4k
V
IN
I
V
IN
TH
3.3V
47pF
V
IN
10µF
IPRG
1
1µH
LTC3872-1
D1
V
5V
2A
OUT
GND
SW
0.1
0.01
0.001
M1
V
RUN/SS NGATE
FB
100µF
×2
11k
1%
1nF
34.8k
1%
38721 TA01
1
10
100
1000
10000
LOAD CURRENT (mA)
38721 TA01b
38721f
1
For more information www.linear.com/LTC3872-1
LTC3872-1
absoluTe MaxiMuM raTings (Note 1)
Input Supply Voltage (V ), RUN/SS .......... –0.3V to 10V
Operating Junction Temperature Range
IN
IPRG Voltage................................. –0.3V to (V + 0.3V)
(Notes 2, 3)............................................ –40°C to 1ꢀ0°C
Storage Temperature Range .................. –6ꢀ°C to 1ꢀ0°C
Lead Temperature (Soldering, 10 sec)
IN
V , I Voltages....................................... –0.3V to 2.4V
FB TH
SW Voltage ................................................ –0.3V to 60V
TS8 Package.........................................................300°C
pin conFiguraTion
TOP VIEW
TOP VIEW
GND
1
2
3
4
8
7
6
5
NGATE
IPRG 1
8 SW
7 RUN/SS
6 V
IN
5 NGATE
V
I
V
IN
FB
I
V
2
3
9
TH
RUN/SS
SW
TH
FB
IPRG
GND 4
TS8 PACKAGE
8-LEAD PLASTIC TSOT-23
= 1ꢀ0°C, θ = 19ꢀ°C/W
DDB PACKAGE
8-LEAD (3mm × 2mm) PLASTIC DFN
= 1ꢀ0°C, θ = 76°C/W
T
JMAX
JA
T
JMAX
JA
EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB
orDer inForMaTion
LEAD FREE FINISH
LTC3872ETS8-1#PBF
LTC3872ITS8-1#PBF
LTC3872HTS8-1#PBF
LTC3872EDDB-1#PBF
LTC3872IDDB-1#PBF
LTC3872HDDB-1#PBF
TAPE AND REEL
PART MARKING*
LTCFN
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3872ETS8-1#TRPBF
LTC3872ITS8-1#TRPBF
8-Lead Plastic TSOT-23
–40°C to 8ꢀ°C
–40°C to 12ꢀ°C
–40°C to 1ꢀ0°C
–40°C to 8ꢀ°C
–40°C to 12ꢀ°C
–40°C to 1ꢀ0°C
LTCFN
8-Lead Plastic TSOT-23
LTC3872HTS8-1#TRPBF LTCFN
LTC3872EDDB-1#TRPBF LCFK
8-Lead Plastic TSOT-23
8-Lead (3mm × 2mm) Plastic DFN
8-Lead (3mm × 2mm) Plastic DFN
8-Lead (3mm × 2mm) Plastic DFN
LTC3872IDDB-1#TRPBF
LCFK
LTC3872HDDB-1#TRPBF LCFK
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
38721f
For more information www.linear.com/LTC3872-1
2
LTC3872-1
elecTrical characTerisTics
The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 4.2V unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
Input Voltage Range
2.7ꢀ
9.8
V
Input DC Supply Current
Normal Operation
Shutdown
Typicals at V = 4.2V (Note 4)
IN
2.7ꢀV ≤ V ≤ 9.8V
2ꢀ0
8
20
400
20
3ꢀ
µA
µA
µA
IN
V
V
= 0V
RUN/SS
IN
UVLO
< UVLO Threshold
l
l
Undervoltage Lockout Threshold
Shutdown Threshold (at RUN/SS)
Regulated Feedback Voltage
V
V
Rising
Falling
2.3
2.4ꢀ
2.3
2.7ꢀ
2.ꢀꢀ
V
V
IN
IN
2.0ꢀ
l
l
V
V
Falling
Rising
0.6
0.6ꢀ
0.8ꢀ
0.9ꢀ
1.0ꢀ
1.1ꢀ
V
V
RUN/SS
RUN/SS
l
l
(Note ꢀ) LTC3872-1E
LTC3872-1I and LTC3872-1H
1.182
1.178
1.2
1.2
1.218
1.218
V
V
Feedback Voltage Line Regulation
Feedback Voltage Load Regulation
2.7ꢀV < V < 9V (Note ꢀ)
0.14
mV/V
IN
V
ITH
V
ITH
= 1.6V (Note ꢀ)
= 1V (Note ꢀ)
0.0ꢀ
–0.0ꢀ
5
5
V
Input Current
(Note ꢀ)
2ꢀ
ꢀ0
nA
µA
FB
RUN/SS Pull Up Current
V
= 0
0.3ꢀ
ꢀ00
0.7
1.2ꢀ
RUN/SS
Oscillator Frequency
Normal Operation
V
C
C
= 1V
ꢀꢀ0
40
6ꢀ0
kHz
ns
FB
Gate Drive Rise Time
Gate Drive Fall Time
= 3000pF
= 3000pF
LOAD
LOAD
40
ns
l
l
l
Peak Current Sense Voltage
IPRG = GND (Note 6)
LTC3872-1E
LTC3872-1I
LTC3872-1H
90
8ꢀ
80
10ꢀ
10ꢀ
10ꢀ
120
120
120
mV
mV
mV
l
l
l
IPRG = Float
LTC3872-1E
LTC3872-1I
LTC3872-1H
160
1ꢀ0
14ꢀ
180
180
180
200
200
200
mV
mV
mV
l
l
l
IPRG = V
LTC3872-1E
LTC3872-1I
LTC3872-1H
260
2ꢀ0
240
28ꢀ
28ꢀ
28ꢀ
310
310
310
mV
mV
mV
IN
Default Internal Soft-Start Time
1
ms
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 3: T is calculated from the ambient temperature T and power
J A
dissipation P according to the following formula:
D
LTC3872-1TS8: T = T + (P • 195°C/W)
J
A
D
LTC3872-1DDB: T = T + (P • 76°C/W)
J
A
D
Note 2: The LTC3872-1 is tested under pulsed load conditions such that
Note 4: The dynamic input supply current is higher due to power MOSFET
gate charging (Q • f ). See Applications Information.
T ≈ T . The LTC3872-1E is guaranteed to meet performance specifications
J
A
G
OSC
from 0°C to 8ꢀ°C. Specifications over the –40°C to 8ꢀ°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC3872-1I is guaranteed
over the –40°C to 12ꢀ°C operating junction temperature range. The
LTC3872-1H is guaranteed over the full –40°C to 1ꢀ0°C operating junction
temperature range. The maximum ambient temperature consistent with
these specifications is determined by specific operating conditions in
conjunction with board layout, the rated package thermal impedance and
other environmental factors.
Note 5: The LTC3872-1 is tested in a feedback loop which servos V to
FB
the reference voltage with the I pin forced to the midpoint of its voltage
TH
range (0.7V ≤ V ≤ 1.9V, midpoint = 1.3V).
ITH
Note 6: Rise and fall times are measured at 105 and 905 levels.
38721f
3
For more information www.linear.com/LTC3872-1
LTC3872-1
TA = 25°C, unless otherwise noted.
Typical perForMance characTerisTics
FB Voltage vs Temperature
FB Voltage Line Regulation
ITH Voltage vs RUN/SS Voltage
1.25
1.24
2.5
2.0
1.5
1.2025
1.2020
1.2015
1.23
1.2010
1.2005
1.2000
1.1995
1.22
1.21
1.20
1.19
1.0
0.5
0
V
IN
V
IN
V
IN
= 2.5V
= 3.3V
= 5V
1.18
1.1990
–40 –20
0
20
80 100
10
–60
40 60
0
3
5
6
7
8
9
1
2
4
0
0.5 1.0 1.5
3.0 3.5 4.0 4.5 5.0
2.0 2.5
V
(V)
TEMPERATURE (°C)
RUN VOLTAGE (V)
IN
38721 G01
38721 G02
38721 G03
Shutdown IQ vs VIN
Shutdown IQ vs Temperature
14
12
20
15
10
5
10
8
6
4
2
0
0
4
5
6
9
10
2
3
7
8
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
V
(V)
IN
38721 G04
38721 G05
38721f
For more information www.linear.com/LTC3872-1
4
LTC3872-1
TA = 25°C, unless otherwise noted.
Typical perForMance characTerisTics
Gate Drive Rise and Fall Time
RUN/SS Threshold vs
Temperature
vs CLOAD
RUN/SS Threshold vs VIN
100
90
80
70
60
50
40
30
20
10
0
1.0
1.00
0.98
0.96
0.94
RISING
RISING
0.9
0.8
RISE TIME
FALLING
FALL TIME
0.92
0.90
0.7
0.6
0.5
0.88
0.86
0.84
FALLING
8
50
0
2000
4000
C
6000
8000 10000
–50 –25
0
25
75 100 125 150
TEMPERATURE (°C)
2
4
0
10
12
6
(pF)
V
(V)
LOAD
IN
38721 G06
38721 G08
38721 G07
Maximum Sense Threshold
vs Temperature
Frequency vs Temperature
300
250
600
575
550
525
IPRG = V
IN
200
150
IPRG = FLOAT
IPRG = GND
100
50
0
500
–50 –30 –10 10 30 50 70 90 110 130 150
TEMPERATURE (°C)
–50 –5
0
25 50 75 100 125 150
TEMPERATURE (°C)
38721 G10
38721 G09
38721f
5
For more information www.linear.com/LTC3872-1
LTC3872-1
pin FuncTions (TS8/DD8)
IPRG (Pin 1/Pin 4): Current Sense Limit Select Pin.
V
(Pin 6/Pin 7): Supply Pin. This pin must be closely
IN
decoupled to GND.
I
(Pin 2/Pin 3): Error Amplifier Compensation Point.
TH
Nominal voltage range for this pin is 0.7V to 1.9V.
RUN/SS (Pin 7/Pin 6): Shutdown and external soft-start
pin. Inshutdown, allfunctionsaredisabledandtheNGATE
pin is held low.
V
(Pin 3/Pin 2): Receives the feedback voltage from an
FB
external resistor divider across the output.
SW (Pin 8/Pin 5): Switch node connection to inductor and
current sense input pin through external slope compensa-
tion resistor. Normally, the external N-channel MOSFET’s
drain is connected to this pin.
GND (Pin 4/Pin 1, Exposed Pad Pin 9): Ground. The ex-
posed pad must be soldered to PCB ground for electrical
contact and rated thermal performance.
NGATE(Pin5/Pin8):GateDrivefortheExternalN-Channel
MOSFET. This pin swings from 0V to V .
IN
FuncTional DiagraM
V
GND
SW
IN
UV
SLOPE
COMPENSATION
UNDERVOLTAGE
LOCKOUT
VOLTAGE
REFERENCE
1.2V
IPRG
SHUTDOWN
COMPARATOR
–
+
CURRENT
COMPARATOR
0.7µA
I
LIM
+
–
SHDN
I
TH
BUFFER
550kHz
OSCILLATOR
R
S
RS
LATCH
Q
RUN/SS
CURRENT LIMIT
CLAMP
V
IN
NGATE
SWITCHING
LOGIC CIRCUIT
ERROR
AMPLIFIER
V
FB
–
+
INTERNAL
SOFT-START
RAMP
1.2V
I
TH
38721 FD
38721f
For more information www.linear.com/LTC3872-1
6
LTC3872-1
operaTion
Main Control Loop
component count; the maximum rating for this pin, 60V,
allows MOSFET sensing in a wide output voltage range.
The LTC3872-1 is a No R
constant frequency, cur-
SENSE
rent mode controller for DC/DC boost, SEPIC and flyback
converter applications. The LTC3872-1 is distinguished
from conventional current mode controllers because the
current control loop can be closed by sensing the voltage
dropacrossthepowerMOSFETswitchoracrossadiscrete
The RUN/SS pin controls whether the IC is enabled or is
in a low current shutdown state. With the RUN/SS pin
below 0.8ꢀV, the chip is off and the input supply current is
typicallyonly8µA.Withanexternalcapacitorconnectedto
the RUN/SS pin an optional external soft-start is enabled.
A 0.7µA trickle current will charge the capacitor, pulling
the RUN/SS pin above shutdown threshold and slowly
senseresistor,asshowninFigures1and2.ThisNoR
SENSE
sensing technique improves efficiency, increases power
density and reduces the cost of the overall solution.
rampingRUN/SStolimittheV duringstart-up.Because
ITH
the noise on the SW pin could couple into the RUN/SS
pin, disrupting the trickle charge current that charges the
RUN/SS pin, a 1M resistor is recommended to pull-up
the RUN/SS pin when external soft-start is used. When
RUN/SSisdrivenbyanexternallogic,aminimumof2.7ꢀV
For circuit operation, please refer to the Block Diagram
of the IC and the Typical Application on the front page. In
normal operation, the power MOSFET is turned on when
the oscillator sets the RS latch and is turned off when the
current comparator resets the latch. The divided-down
outputvoltageiscomparedtoaninternal1.2Vreferenceby
logic is recommended to allow the maximum I range.
TH
the error amplifier, which outputs an error signal at the I
TH
Light Load Operation
pin. The voltage on the I pin sets the current comparator
TH
Under very light load current conditions, the I pin volt-
input threshold. When the load current increases, a fall in
TH
age will be very close to the zero current level of 0.8ꢀV.
As the load current decreases further, an internal offset at
the current comparator input will assure that the current
comparatorremainstripped(evenatzeroloadcurrent)and
the regulator will start to skip cycles, as it must, in order
to maintain regulation. This behavior allows the regulator
to maintain constant frequency down to very light loads,
resulting in low output ripple as well as low audible noise
and reduced RF interference, while providing high light
load efficiency.
the FB voltage relative to the reference voltage causes the
I
TH
pin to rise, which causes the current comparator to
trip at a higher peak inductor current value. The average
inductor current will therefore rise until it equals the load
current, thereby maintaining output regulation.
The LTC3872-1 can be used either by sensing the voltage
drop across the power MOSFET or by connecting the SW
pin to a conventional sensing resistor in the source of the
power MOSFET. Sensing the voltage across the power
MOSFETmaximizesconverterefficiencyandminimizesthe
D
D
L
L
V
V
C
V
V
C
IN
OUT
OUT
IN
OUT
OUT
V
SW
V
V
IN
IN
+
+
SW
NGATE
V
SW
LTC3872-1
NGATE
GND
LTC3872-1
SW
R
SENSE
GND
GND
GND
38721 F01
38721 F02
Figure 1. SW Pin (Internal Sense Pin)
Connection for Maximum Efficiency
Figure 2. SW Pin (Internal Sense Pin)
Connection for Sensing Resistor
38721f
7
For more information www.linear.com/LTC3872-1
LTC3872-1
applicaTions inForMaTion
Output Voltage Programming
on the fact that, ideally, the output power is equal to the
input power, the maximum average input current is:
The output voltage is set by a resistor divider according
to the following formula:
IO(MAX)
I
=
IN(MAX)
1–DMAX
R2
R1
V =1.2V • 1+
O
pu
Thepeak in t current is:
IO(MAX)
χ
The external resistor divider is connected to the output
as shown in the Typical Application on the front page,
allowing remote voltage sensing.
I
IN(PEAK) = 1+
•
2
1–DMAX
c
Ripple Current I and the Factor
L
Application Circuits
c
The constant in the equation above represents the
A basic LTC3872-1 application circuit is shown on the front
page of this data sheet. External component selection is
drivenbythecharacteristicsoftheloadandtheinputsupply.
percentage peak-to-peak ripple current in the inductor,
relative to its maximum value. For example, if 305 ripple
c
current is chosen, then = 0.30, and the peak current is
1ꢀ5 greater than the average.
Duty Cycle Considerations
For a current mode boost regulator operating in CCM,
slope compensation must be added for duty cycles above
ꢀ05 in order to avoid subharmonic oscillation. For the
LTC3872-1, thisrampcompensationisinternal. Havingan
internally fixed ramp compensation waveform, however,
does place some constraints on the value of the inductor
and the operating frequency. If too large an inductor is
For a boost converter operating in a continuous conduc-
tion mode (CCM), the duty cycle of the main switch is:
V +V – V
IN
D
O
D=
VO +VD
where V is the forward voltage of the boost diode. For
D
used, the resulting current ramp (I ) will be small relative
L
converters where the input voltage is close to the output
voltage, the duty cycle is low and for converters that
develop a high output voltage from a low; voltage input
supply, the duty cycle is high. The minimum on-time of
the LTC3872-1 is typically around 2ꢀ0ns. This time limits
the minimum duty cycle of the LTC3872-1. The maximum
duty cycle of the LTC3872-1 is around 905. Although
frequencyfoldbackfeatureoftheregularLTC3872enables
the user to obtain higher output voltage, it also increases
inductor ripple current.
to the internal ramp compensation (at duty cycles above
ꢀ05), and the converter operation will approach voltage
mode(rampcompensationreducesthegainofthecurrent
loop). If too small an inductor is used, but the converter is
still operating in CCM (continuous conduction mode), the
internalrampcompensationmaybeinadequatetoprevent
subharmonicoscillation.Toensuregoodcurrentmodegain
andavoidsubharmonicoscillation,itisrecommendedthat
the ripple current in the inductor fall in the range of 205
to 405 of the maximum average current. For example, if
the maximum average input current is 1A, choose an I
L
The Peak and Average Input Currents
c
between0.2Aand0.4A, andavalue between0.2and0.4.
ThecontrolcircuitintheLTC3872-1ismeasuringtheinput
current (either by using the R
of the power MOSFET
DS(ON)
Inductor Selection
or by using a sense resistor in the MOSFET source), so
the output current needs to be reflected back to the input
in order to dimension the power MOSFET properly. Based
Givenanoperatinginputvoltagerange,andhavingchosen
the operating frequency and ripple current in the inductor,
38721f
For more information www.linear.com/LTC3872-1
8
LTC3872-1
applicaTions inForMaTion
the inductor value can be determined using the following
equation:
inductanceselected. Asinductanceincreases, corelosses
go down. Unfortunately, increased inductance requires
more turns of wire and therefore, copper losses will in-
crease. Generally, there is a tradeoff between core losses
and copper losses that needs to be balanced.
V
L= IN(MIN) •DMAX
∆IL •f
where:
Ferrite designs have very low core losses and are pre-
ferred at high switching frequencies, so design goals can
concentrate on copper losses and preventing saturation.
Ferrite core material saturates “hard,” meaning that the
inductancecollapsesrapidlywhenthepeakdesigncurrent
is exceeded. This results in an abrupt increase in inductor
ripple current and consequently, output voltage ripple. Do
not allow the core to saturate!
IO(MAX)
c
∆IL = •
1–DMAX
Remember that boost converters are not short-circuit
protected. Under a shorted output condition, the induc-
tor current is limited only by the input supply capability.
The minimum required saturation current of the inductor
can be expressed as a function of the duty cycle and the
load current, as follows:
Different core materials and shapes will change the size/
currentandprice/currentrelationshipofaninductor.Toroid
or shielded pot cores in ferrite or permalloy materials are
small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price vs size requirements and any
radiated field/EMI requirements. New designs for surface
mount inductors are available from Coiltronics, Coilcraft,
Toko and Sumida.
IO(MAX)
χ
IL(SAT) ≥ 1+
•
2 1–DMAX
The saturation current rating for the inductor should be
checked at the minimum input voltage (which results in
thehighestinductorcurrent)andmaximumoutputcurrent.
Operating in Discontinuous Mode
Power MOSFET Selection
Discontinuous mode operation occurs when the load cur-
rent is low enough to allow the inductor current to run
out during the off-time of the switch. Once the inductor
current is near zero, the switch and diode capacitances
resonate with the inductance to form damped ringing at
1MHz to 10MHz. If the off-time is long enough, the drain
voltage will settle to the input voltage.
ThepowerMOSFETservestwopurposesintheLTC3872-1:
it represents the main switching element in the power
path and its R
represents the current sensing ele-
DS(ON)
ment for the control loop. Important parameters for the
power MOSFET include the drain-to-source breakdown
voltage (BV ), the threshold voltage (V
), the on-
DSS
GS(TH)
resistance (R
) versus gate-to-source voltage, the
DS(ON)
Depending on the input voltage and the residual energy
in the inductor, this ringing can cause the drain of the
power MOSFET to go below ground where it is clamped
by the body diode. This ringing is not harmful to the IC
and it has been shown not to contribute significantly to
EMI. Any attempt to damp it with a snubber will degrade
the efficiency.
gate-to-source and gate-to-drain charges (Q and Q ,
GS
GD
respectively), the maximum drain current (I
the MOSFET’s thermal resistances (R
Logic-level (4.ꢀV V
) and
TH(JA)
D(MAX)
and R
).
TH(JC)
) threshold MOSFETs should
GS-RATED
be used when input voltage is high, otherwise if low input
voltage operation is expected (e.g., supplying power from
alithium-ionbatteryora3.3Vlogicsupply),thensublogic-
level(2.ꢀVV )thresholdMOSFETsshouldbeused.
GS-RATED
Inductor Core Selection
Pay close attention to the BV
specifications for the
DSS
Once the value for L is known, the type of inductor must
be selected. Actual core loss is independent of core size
for a fixed inductor value, but is very dependent on the
MOSFETs relative to the maximum actual switch voltage
in the application. Many logic-level devices are limited
38721f
9
For more information www.linear.com/LTC3872-1
LTC3872-1
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to 30V or less, and the switch node can ring during the
turn-off of the MOSFET due to layout parasitics. Check
the switching waveforms of the MOSFET directly across
the drain and source terminals using the actual PC board
layout(notjustonalabbreadboard!)forexcessiveringing.
driving MOSFETs with relatively high package inductance
(DPAK and bigger) or inadequate layout. A small Schottky
diode between NGATE pin and ground can prevent nega-
tive voltage spikes. Two small Schottky diodes can inhibit
positive and negative voltage spikes (Figure ꢀ).
During the switch on-time, the control circuit limits the
maximumvoltagedropacrossthepowerMOSFETtoabout
28ꢀmV, 10ꢀmV and 18ꢀmV at low duty cycle with IPRG
300
IPRG = HIGH
250
tied to V , GND, or left floating respectively. The peak
IN
200
IPRG = FLOAT
inductorcurrentisthereforelimitedto(28ꢀmV,10ꢀmVand
150
18ꢀmV)/R
depending on the status of the IPRG pin.
DS(ON)
The relationship between the maximum load current, duty
100
IPRG = LOW
50
cycle and the R
of the power MOSFET is:
DS(ON)
1–DMAX
RDS(ON) ≤ VSENSE(MAX)
•
0
1
20
40
60
80
100
χ
2
1+ •IO(MAX) •ρT
DUTY CYCLE (%)
38721 G03
Figure 3. Maximum SENSE Threshold Voltage vs Duty Cycle
V
is the maximum voltage drop across the
SENSE(MAX)
powerMOSFET.V
istypically28ꢀmV,18ꢀmVand
SENSE(MAX)
2.0
10ꢀmV. It is reduced with increasing duty cycle as shown
in Figure 3. The r term accounts for the temperature co-
T
1.5
1.0
0.5
0
efficient of the R
of the MOSFET, which is typically
DS(ON)
0.45/°C. Figure 4 illustrates the variation of normalized
over temperature for a typical power MOSFET.
R
DS(ON)
Another method of choosing which power MOSFET to
use is to check what the maximum output current is for a
givenR
, sinceMOSFETon-resistancesareavailable
DS(ON)
in discrete values.
50
100
–50
150
0
JUNCTION TEMPERATURE (°C)
1–DMAX
IO(MAX) = VSENSE(MAX)
•
38721 F04
χ
2
1+ •RDS(ON) •ρT
Figure 4. Normalized RDS(ON) vs Temperature
It is worth noting that the 1 – D
relationship between
MAX
I
and R
can cause boost converters with a
O(MAX)
DS(ON)
V
V
IN
wide input range to experience a dramatic range of maxi-
mum input and output current. This should be taken into
consideration in applications where it is important to limit
the maximum current drawn from the input supply.
IN
SW
SW
LTC3872-1
NGATE
LTC3872-1
NGATE
GND
GND
Voltage on the NGATE pin should be within –0.3V to
38721 F04
(V + 0.3V) limits. Voltage stress below –0.3V and above
IN
Figure 5
V + 0.3V can damage internal MOSFET driver, see Func-
IN
tional Diagram. This is especially important in case of
38721f
For more information www.linear.com/LTC3872-1
10
LTC3872-1
applicaTions inForMaTion
Calculating Power MOSFET Switching and Conduction
Losses and Junction Temperatures
must withstand is equal to the regulator output voltage.
The average forward current in normal operation is equal
to the output current, and the peak current is equal to the
peak inductor current.
In order to calculate the junction temperature of the power
MOSFET,thepowerdissipatedbythedevicemustbeknown.
This power dissipation is a function of the duty cycle, the
load current and the junction temperature itself (due to
IO(MAX)
χ
2
ID(PEAK) =IL(PEAK) = 1+
•
1–DMAX
the positive temperature coefficient of its R
). As a
DS(ON)
The power dissipated by the diode is:
P = I • V
result, some iterative calculation is normally required to
determineareasonablyaccuratevalue.Sincethecontroller
is using the MOSFET as both a switching and a sensing
element, care should be taken to ensure that the converter
is capable of delivering the required load current over all
operating conditions (line voltage and temperature), and
D
O(MAX)
D
and the diode junction temperature is:
T = T + P • R
J
A
D
TH(JA)
The R
to be used in this equation normally includes
TH(JA)
for the worst-case specifications for V
DS(ON)
sheet.
and the
SENSE(MAX)
the R
for the device plus the thermal resistance from
TH(JC)
R
of the MOSFET listed in the manufacturer’s data
the board to the ambient temperature in the enclosure.
Remember to keep the diode lead lengths short and to
observe proper switch-node layout (see Board Layout
Checklist) to avoid excessive ringing and increased dis-
sipation.
ThepowerdissipatedbytheMOSFETinaboostconverteris:
2
I
O(MAX)
PFET
=
• RDS(ON) •DMAX • ρT
1–DMAX
Output Capacitor Selection
IO(MAX)
•CRSS • f
1–D
1.85
+k • VO
•
Contributions of ESR (equivalent series resistance), ESL
(equivalent series inductance) and the bulk capacitance
mustbeconsideredwhenchoosingthecorrectcomponent
for a given output ripple voltage. The effects of these three
parameters (ESR, ESL and bulk C) on the output voltage
ripple waveform are illustrated in Figure 6e for a typical
boost converter.
(
)
MAX
2
The first term in the equation above represents the I R
losses in the device, and the second term, the switching
losses.Theconstant,k=1.7,isanempiricalfactorinversely
related to the gate drive current and has the dimension
of 1/current.
The choice of component(s) begins with the maximum
acceptable ripple voltage (expressed as a percentage of
the output voltage), and how this ripple should be divided
between the ESR step and the charging/discharging DV.
For the purpose of simplicity we will choose 25 for the
maximum output ripple, to be divided equally between the
ESRstepandthecharging/dischargingDV.Thispercentage
ripple will change, depending on the requirements of the
application, and the equations provided below can easily
be modified.
From a known power dissipated in the power MOSFET, its
junction temperature can be obtained using the following
formula:
T = T + P • R
J
A
FET
TH(JA)
The R
the R
to be used in this equation normally includes
TH(JA)
for the device plus the thermal resistance from
TH(JC)
the case to the ambient temperature (R ). This value
TH(CA)
of T can then be compared to the original, assumed value
J
used in the iterative calculation process.
For a 15 contribution to the total ripple voltage, the ESR
of the output capacitor can be determined using the fol-
lowing equation:
Output Diode Selection
To maximize efficiency, a fast switching diode with low
forwarddropandlowreverseleakageisdesired.Theoutput
diode in a boost converter conducts current during the
switch off-time. The peak reverse voltage that the diode
0.01•VO
IIN(PEAK)
ESRCOUT
≤
38721f
11
For more information www.linear.com/LTC3872-1
LTC3872-1
applicaTions inForMaTion
where:
capacitor available from Sanyo has the lowest product of
ESR and size of any aluminum electrolytic, at a somewhat
higher price.
IO(MAX)
χ
2
IIN(PEAK)= 1+
•
1–DMAX
In surface mount applications, multiple capacitors may
have to be placed in parallel in order to meet the ESR or
RMS current handling requirements of the application.
Aluminum electrolytic and dry tantalum capacitors are
both available in surface mount packages. In the case of
tantalum, it is critical that the capacitors have been surge
tested for use in switching power supplies. An excellent
choice is AVX TPS series of surface mount tantalum. Also,
ceramic capacitors are now available with extremely low
ESR, ESL and high ripple current ratings.
For the bulk C component, which also contributes 15 to
the total ripple:
IO(MAX)
COUT
≥
0.01•VO •f
Formanydesignsitispossibletochooseasinglecapacitor
type that satisfies both the ESR and bulk C requirements
forthedesign.Incertaindemandingapplications,however,
the ripple voltage can be improved significantly by con-
necting two or more types of capacitors in parallel. For
example, using a low ESR ceramic capacitor can minimize
the ESR step, while an electrolytic capacitor can be used
to supply the required bulk C.
L
D
V
OUT
V
IN
SW
C
OUT
R
L
6a. Circuit Diagram
Once the output capacitor ESR and bulk capacitance have
been determined, the overall ripple voltage waveform
should be verified on a dedicated PC board (see Board
Layout section for more information on component place-
ment). Lab breadboards generally suffer from excessive
series inductance (due to inter-component wiring), and
these parasitics can make the switching waveforms look
significantly worse than they would be on a properly
designed PC board.
I
IN
I
L
6b. Inductor and Input Currents
I
SW
t
ON
The output capacitor in a boost regulator experiences
high RMS ripple currents, as shown in Figure 7. The RMS
output capacitor ripple current is:
6c. Switch Current
V – V
I
IN(MIN)
O
D
t
IRMS(COUT) ≈IO(MAX)
•
OFF
I
O
V
IN(MIN)
6d. Diode and Output Currents
Note that the ripple current ratings from capacitor manu-
facturers are often based on only 2000 hours of life. This
makes it advisable to further derate the capacitor or to
choose a capacitor rated at a higher temperature than
required. Several capacitors may also be placed in parallel
to meet size or height requirements in the design.
V
COUT
V
OUT
(AC)
RINGING DUE TO
TOTAL INDUCTANCE
(BOARD + CAP)
V
ESR
6e. Output Voltage Ripple Waveform
Manufacturers such as Nichicon, United Chemicon and
Sanyoshouldbeconsideredforhighperformancethrough-
hole capacitors. The OS-CON semiconductor dielectric
Figure 6. Switching Waveforms for a Boost Converter
38721f
For more information www.linear.com/LTC3872-1
12
LTC3872-1
applicaTions inForMaTion
and which change would produce the most improvement.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for the majority
of the losses in LTC3872-1 application circuits:
V
OUT
200mV/DIV
AC-COUPLED
1. The supply current into V . The V current is the
IN
IN
sum of the DC supply current I (given in the Electrical
Q
Characteristics) and the MOSFET driver and control cur-
I
rents. The DC supply current into the V pin is typically
LOAD
IN
500mA/DIV
about 2ꢀ0µA and represents a small power loss (much
38721 F07
less than 15) that increases with V . The driver current
20µs/DIV
IN
results from switching the gate capacitance of the power
MOSFET; this current is typically much larger than the DC
current. Each time the MOSFET is switched on and then
off, a packet of gate charge Q is transferred from V
to ground. The resulting dQ/dt is a current that must be
supplied to the Input capacitor by an external supply. If
the IC is operating in CCM:
Figure 7. Load Transient Response for a 3.3V Input,
5V Output Boost Converter Application, 0.1A to 1A Step
Input Capacitor Selection
G
IN
The input capacitor of a boost converter is less critical
than the output capacitor, due to the fact that the inductor
is in series with the input and the input current waveform
is continuous (see Figure 6b). The input voltage source
impedance determines the size of the input capacitor,
which is typically in the range of 10µF to 100µF. A low ESR
capacitor is recommended, although it is not as critical as
for the output capacitor.
I
≈ I = f • Q
Q G
Q(TOT)
P = V • (I + f • Q )
IC
IN
Q
G
2. Power MOSFET switching and conduction losses. The
technique of using the voltage drop across the power
MOSFET to close the current feedback loop was chosen
because of the increased efficiency that results from not
having a sense resistor. The losses in the power MOSFET
are equal to:
The RMS input capacitor ripple current for a boost con-
verter is:
V
IRMS(CIN) =0.3• IN(MIN) •DMAX
L•f
2
I
O(MAX)
PFET
=
•RDS(ON) •DMAX • ρT
1–DMAX
Please note that the input capacitor can see a very high
surge current when a battery is suddenly connected to
the input of the converter and solid tantalum capacitors
can fail catastrophically under these conditions. Be sure
to specify surge-tested capacitors!
IO(MAX)
•CRSS • f
1–DMAX
1.85
+ k • VO
•
2
TheI Rpowersavingsthatresultfromnothavingadiscrete
sense resistor can be calculated almost by inspection.
Efficiency Considerations: How Much Does VDS
Sensing Help?
I
2
O(MAX)
PR(SENSE)
=
•RSENSE •DMAX
Theefficiencyofaswitchingregulatorisequaltotheoutput
power divided by the input power (×1005).
1–DMAX
To understand the magnitude of the improvement with
Percent efficiency can be expressed as:
this V sensing technique, consider the 3.3V input, ꢀV
DS
5 Efficiency = 1005 – (L1 + L2 + L3 + …),
output power supply shown in the Typical Application on
thefrontpage.Themaximumloadcurrentis7A(10Apeak)
and the duty cycle is 395. Assuming a ripple current of
where L1, L2, etc. are the individual loss components as a
percentage of the input power. It is often useful to analyze
individuallossestodeterminewhatislimitingtheefficiency
405, the peak inductor current is 13.8A and the average
38721f
13
For more information www.linear.com/LTC3872-1
LTC3872-1
applicaTions inForMaTion
is 11.ꢀA. With a maximum sense voltage of about 140mV,
the sense resistor value would be 10mΩ, and the power
dissipated in this resistor would be ꢀ14mW at maximum
output current. Assuming an efficiency of 905, this
sense resistor power dissipation represents 1.35 of the
overall input power. In other words, for this application,
regulator feedback loop acts on the resulting error amp
output signal to return V to its steady-state value. During
O
this recovery time, V can be monitored for overshoot or
O
ringing that would indicate a stability problem.
A second, more severe transient can occur when con-
necting loads with large (>1µF) supply bypass capacitors.
The discharged bypass capacitors are effectively put in
the use of V sensing would increase the efficiency by
DS
approximately 1.35.
parallel with C , causing a nearly instantaneous drop in
O
For more details regarding the various terms in these
equations, please refer to the section Boost Converter:
Power MOSFET Selection.
V . No regulator can deliver enough current to prevent
O
this problem if the load switch resistance is low and it is
driven quickly. The only solution is to limit the rise time
of the switch drive in order to limit the inrush current
di/dt to the load.
3. The losses in the inductor are simply the DC input cur-
rentsquaredtimesthewindingresistance.Expressingthis
loss as a function of the output current yields:
Boost Converter Design Example
2
I
O(MAX)
Thedesignexamplegivenherewillbeforthecircuitshown
on the front page. The input voltage is 3.3V, and the output
is ꢀV at a maximum load current of 2A.
PR(WINDING)
=
•RW
1–DMAX
4. Losses in the boost diode. The power dissipation in the
boost diode is:
1. The duty cycle is:
V + V – V
5+0.4 – 3.3
5+0.4
IN
D
O
P
DIODE
= I • V
O(MAX) D
D =
=
= 38.9%
VO + VD
The boost diode can be a major source of power loss in
a boost converter. For the 3.3V input, ꢀV output at 7A ex-
ample given above, a Schottky diode with a 0.4V forward
voltage would dissipate 2.8W, which represents 75 of the
input power. Diode losses can become significant at low
output voltages where the forward voltage is a significant
percentage of the output voltage.
2. An inductor ripple current of 405 of the maximum load
current is chosen, so the peak input current (which is also
the minimum saturation current) is:
IO(MAX)
χ
2
IIN(PEAK) = 1+
•
= 1.2 •
= 3.9A
2 1–DMAX
1– 0.39
ꢀ. Other losses, including C and C ESR dissipation and
IN
O
The inductor ripple current is:
IO(MAX)
inductor core losses, generally account for less than 25
2
of the total additional loss.
c
∆IL = •
=0.4•
=1.3A
1–DMAX
1–0.39
Checking Transient Response
And so the inductor value is:
V
The regulator loop response can be verified by looking at
theloadtransientresponse.Switchingregulatorsgenerally
take several cycles to respond to an instantaneous step
3.3V
L= IN(MIN) •DMAX
∆IL •f
=
•0.39=1.8µH
1.3A •ꢀꢀ0kHz
in resistive load current. When the load step occurs, V
O
immediately shifts by an amount equal to (DI
)(ESR),
LOAD
The component chosen is a 2.2µH inductor made by
Sumida (part number CEP12ꢀ-H 1ROMH).
and then C begins to charge or discharge (depending on
O
the direction of the load step) as shown in Figure 7. The
38721f
For more information www.linear.com/LTC3872-1
14
LTC3872-1
applicaTions inForMaTion
3. Assuming a MOSFET junction temperature of 12ꢀ°C,
capacitors (JMK32ꢀBJ226MM) are required (the input
and return lead lengths are kept to a few inches). As
with the output node, check the input ripple with a single
oscilloscope probe connected across the input capacitor
terminals.
the room temperature MOSFET R
than:
should be less
DS(ON)
1–DMAX
RDS(ON) ≤ VSENSE(MAX)
•
χ
2
1+ •IO(MAX) •ρT
PC Board Layout Checklist
1–0.39
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3872-1. These items are illustrated graphically
in the layout diagram in Figure 8. Check the following in
your layout:
=0.175V •
≈30mΩ
0.4
2
1+
•2A •1.5
The MOSFET used was the Si3460 DDV, which has a maxi-
mum R
of 27mΩ at 4.ꢀV V , a BV
of greater
GS
DS(ON)
GS
DSS
1. TheSchottkydiodeshouldbecloselyconnectedbetween
the output capacitor and the drain of the external MOSFET.
than 30V, and a gate charge of 13.ꢀnC at 4.ꢀV V .
4. The diode for this design must handle a maximum DC
output current of 2A and be rated for a minimum reverse
2. The input decoupling capacitor (0.1µF) should be con-
nected closely between V and GND.
IN
voltage of V , or ꢀV. A 2ꢀA, 1ꢀV diode from On Semi-
OUT
3. The trace from SW to the switch point should be kept
short.
conductor (MBRB2ꢀ1ꢀL) was chosen for its high power
dissipation capability.
4. Keep the switching node NGATE away from sensitive
small signal nodes.
ꢀ. Theoutputcapacitorusuallyconsists ofalowervalued,
low ESR ceramic.
ꢀ. The V pin should connect directly to the feedback
FB
6. The choice of an input capacitor for a boost converter
depends on the impedance of the source supply and the
amount of input ripple the converter will safely tolerate.
For this particular design two 22µF Taiyo Yuden ceramic
resistors. The resistive divider R1 and R2 must be con-
nected between the (+) plate of C
and signal ground.
OUT
IPRG
SW
I
RUN/SS
TH
LTC3872-1
R
ITH
V
V
IN
FB
C
C
OUT
IN
+
+
GND
NGATE
C
ITH
V
V
OUT
R2
D1
R1
L1
M1
IN
38721 F08
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 8. LTC3872-1 Layout Diagram (See PC Board Layout Checklist)
38721f
15
For more information www.linear.com/LTC3872-1
LTC3872-1
Typical applicaTions
High Efficiency 3.3V Input, 12V Output Boost Converter
4.7M
0.1µF
2.2nF
23.2k
V
IN
I
RUN/SS
V
IN
TH
3.3V
C
IN
L1
2.2µH
100pF
IPRG
10µF
LTC3872-1
GND
SW
NGATE
M1
V
PDS1040
FB
11.8k
1%
V
OUT
12V
107k
1%
C
OUT1
+
1.5A
C
OUT2
22µF
120µF
×2
38721 F09
C
: TAIYO YUDEN TMK325B7226MM
OUT1
L1: COILTRONICS DR125-2R2
M1: VISHAY Si4114DY
V
OUT
12V
AC-COUPLED
I
L
5A/DIV
I
LOAD
1A/DIV
STEP FROM
500mA TO 1.5A
38721 F10
100µs/DIV
38721f
For more information www.linear.com/LTC3872-1
16
LTC3872-1
Typical applicaTions
High Efficiency 5V Input, 12V Output Boost Converter
4.7M
I
LOAD
1nF
500mA/DIV
STEP FROM
2.2nF
11k
100mA TO 600mA
V
IN
I
RUN/SS
V
TH
IN
5V
C
IN
100pF
IPRG
L1
3.3µH
I
10µF
L
5A/DIV
LTC3872-1
GND
SW
V
12V
2A
M1
V
NGATE
SBM835L
OUT
V
FB
OUT
11.8k
1%
500mV/DIV
AC-COUPLED
C
OUT1
+
C
OUT2
22µF
107k
68µF
×2
1%
38721 TA03b
500µs/DIV
38721 TA03a
C
: TAIYO YUDEN TMK325B7226MM
OUT1
L1: TOKO D124C 892NAS-3R3M
M1: IRF3717
High Efficiency 5V Input, 24V Output Boost Converter
4.7M
0.068µF
1nF
52.3k
V
IN
I
RUN/SS
V
IN
TH
5V
C
IN
100pF
IPRG
L1
8.2µH
10µF
LTC3872-1
GND
SW
NGATE
V
24V
1A
M1
OUT
V
UPS840
FB
12.1k
C
OUT1
+
C
OUT2
1%
10µF
232k
1%
68µF
×2
38721 TA04a
C
: TAIYO YUDEN UMK325BJ106MM-T
OUT1
L1: WURTH WE-HCF 8.2µH 7443550820
M1: VISHAY Si4174DY
Efficiency
Load Step
100
90
I
LOAD
500mA/DIV
STEP FROM
80
70
60
100mA TO 600mA
I
L
5A/DIV
50
40
30
20
10
0
V
OUT
500mV/DIV
AC-COUPLED
38721 TA04c
500µs/DIV
1
100
1000
10
LOAD (mA)
38721 TA04b
38721f
17
For more information www.linear.com/LTC3872-1
LTC3872-1
Typical applicaTions
High Efficiency 5V Input, 48V Output Boost Converter
1M
0.33µF
63.4k
1%
2.2nF
V
IN
I
RUN/SS
V
TH
IN
5V
C
IN
V
IPRG
IN
L1
10µH
10µF
LTC3872-1
GND
SW
NGATE
V
M1
D1
FB
12.1k
1%
V
OUT
48V
475k
1%
C
OUT1
+
C
0.5A
OUT2
2.2µF
68µF
×3
38721 TA05a
C
: NIPPON CHEMI-CON KTS101B225M43N
OUT1
D1: DIODES INC. PDS760
L1: SUMIDA CDEP147NP-100
M1: VISHAY Si7850DP
Soft-Start
Load Step
RUN/SS
5V/DIV
I
LOAD
200mA/DIV
I
L
5A/DIV
I
L
2A/DIV
V
OUT
20V/DIV
V
OUT
500mV/DIV
AC-COUPLED
38721 TA05b
38721 TA05c
40ms/DIV
500µs/DIV
Efficiency
100
90
80
70
60
50
40
30
20
1
10
100
1000
LOAD (mA)
38721 TA05d
38721f
For more information www.linear.com/LTC3872-1
18
LTC3872-1
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DDB Package
8-Lead Plastic DFN (3mm × 2mm)
(Reference LTC DWG # 05-08-1702 Rev B)
0.61 0.05
(2 SIDES)
R = 0.115
0.40 ± 0.10
3.00 0.10
(2 SIDES)
TYP
5
R = 0.05
TYP
8
0.70 0.05
2.55 0.05
1.15 0.05
2.00 ±0.10
PIN 1 BAR
TOP MARK
PIN 1
(2 SIDES)
R = 0.20 OR
0.25 × 45°
CHAMFER
(SEE NOTE 6)
PACKAGE
OUTLINE
0.56 ± 0.05
(2 SIDES)
4
1
(DDB8) DFN 0905 REV B
0.25 0.05
0.25 0.05
0.75 ±0.05
0.200 REF
0.50 BSC
2.20 0.05
(2 SIDES)
0.50 BSC
2.15 ±0.05
(2 SIDES)
0 – 0.05
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
TS8 Package
8-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1637 Rev A)
2.90 BSC
(NOTE 4)
0.40
MAX
0.65
REF
1.22 REF
1.50 – 1.75
(NOTE 4)
2.80 BSC
1.4 MIN
3.85 MAX 2.62 REF
PIN ONE ID
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.22 – 0.36
8 PLCS (NOTE 3)
0.65 BSC
0.80 – 0.90
0.20 BSC
DATUM ‘A’
0.01 – 0.10
1.00 MAX
0.30 – 0.50 REF
1.95 BSC
TS8 TSOT-23 0710 REV A
0.09 – 0.20
(NOTE 3)
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
38721f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
19
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LTC3872-1
Typical applicaTion
3.3V Input, 5V/2A Output Boost Converter
47pF
1 M
1nF
1.8nF
17.4k
V
IN
I
RUN/SS
V
IN
TH
3.3V
C
IN
V
IN
IPRG
L1
1µH
10µF
LTC3872-1
GND
SW
NGATE
M1
V
D1
FB
11k
1%
V
5V
2A
OUT
34.8k
1%
C
OUT
100µF
×2
38721 TA02
D1: DIODES INC. B320
L1: TOKO FDV0630-1R0
M1: VISHAY Si3460DDV
relaTeD parTs
PART NUMBER
DESCRIPTION
Low I Synchronous Step-Up Controller
COMMENTS
LTC3786
4.5V(Down to 2.5V After Start-Up) ≤ V ≤ 38V, V Up to 60V, 55µA
OUT
Quiescent Current, 3mm × 3mm QFN-16, MSOP-16E
Q
IN
LTC3787/LTC3787-1 Single Output, Dual Channel Multiphase Synchronous 4.5V(Down to 2.5V After Start-Up) ≤ V ≤ 38V, V
Up to 60V, 50kHz to
IN
OUT
Step-Up Controller
900kHz Operating Frequency, 4mm × 5mm QFN-28, SSOP-28
LTC3788/LTC3788-1 Multiphase, Dual Output Synchronous Step-Up
Controller
4.5V(Down to 2.5V After Start-Up) ≤ V ≤ 38V, V
Up to 60V, 50kHz to
IN
OUT
900kHz Fixed Operating Frequency, 5mm × 5mm QFN-32, SSOP-28
LTC3862/LTC3862-1 Multiphase, Dual Channel Single Output Current Mode 4V ≤ V ≤ 36V, 5V or 10V Gate Drive, 75kHz to 500kHz Fixed Operating
IN
Step-Up DC/DC Controller
Frequency, SSOP-24, TSSOP-24, 5mm × 5mm QFN-24
LT3757A/LT3758/
LT3759
Boost, Flyback, SEPIC and Inverting Controller
1.6V/2.9V ≤ V ≤ 40V/100V, 100kHz to 1MHz Fixed Operating Frequency,
IN
3mm × 3mm DFN-10 and MSOP-10E
LT3957A/LT3958/
LT3959
Boost, Flyback, SEPIC and Inverting Converters with
Onboard Power Switch
1.6V/3V/5V ≤ V ≤ 40V/80V, 100kHz to 1MHz Programmable Operation
IN
Frequency, 5mm × 6mm QFN Package
LTC1871/LTC1871-1/ Wide Input Range, No R
Low Quiescent Current 2.5V ≤ V ≤ 36V, 50kHz to 1MHz Fixed Operating Frequency, I = 250µA,
IN Q
SENSE
LTC1871-7
Flyback, Boost and SEPIC Controller
MSOP-10
All Outputs Remain in Regulation Through Cold Crank, 4.5V(Down to
2.5V After Start-Up) ≤ V ≤ 38V, V Up to 24V, V
LTC3859AL
Low I , Triple Output Buck/Buck/Boost Synchronous
Q
DC/DC Controller
Up
IN
OUT(BUCKS)
OUT(BOOST)
to 60V, I = 28µA
Q
38721f
LT 0214 • PRINTED IN USA
20 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
●
LINEAR TECHNOLOGY CORPORATION 2014
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTC3872-1
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