LTC4006_1_技术文档

LTC4006

4A, High Efficiency,

Standalone Li-Ion

Battery Charger

U

DESCRIPTIO

FEATURES

■

Complete Charger Controller for 2-, 3- or 4-Cell

The LTC^®4006 is a complete constant-current/constant-

voltage charger controller for 2-, 3- or 4-cell lithium bat-

teries in a small package using few external components.

ThePWMcontrollerisasynchronous, quasi-constantfre-

Lithium-Ion Batteries

■

High Conversion Efficiency: Up to 96%

■

Output Currents Exceeding 4A

■

±0.8% Accurate Preset Voltages: 8.4V, 12.6V, 16.8V quency, constant off-time architecture that will not gener-

■

Built-In Charge Termination with Automatic Restart

AC Adapter Current Limiting Maximizes Charge Rate*

Automatic Conditioning of Deeply Discharged

Batteries

ate audible noise even when using ceramic capacitors.

TheLTC4006isavailablein8.4V,12.6Vand16.8Vversions

with±0.8%voltageaccuracy.Chargingcurrentisprogram-

mablewithasinglesenseresistorto±4%typicalaccuracy.

Charging current can be monitored as a representative

voltageattheI_MONpin.Atimer,programmedbyanexternal

resistor,setsthetotalchargetimeorisresetto25%oftotal

charge time after C/10 charging current is reached. Charg-

ingautomaticallyresumeswhenthecellvoltagefallsbelow

3.9V/cell.

■

Thermistor Input for Temperature Qualified Charging

Wide Input Voltage Range: 6V to 28V

0.5V Dropout Voltage; Maximum Duty Cycle: 98%

Programmable Charge Current: ±4% Accuracy

Indicator Outputs for Charging, C/10 Current

Detection and AC Adapter Present

■

Charging Current Monitor Output

Fully discharged cells are automatically trickle charged at

10% of the programmed current until the cell voltage ex-

ceeds 2.5V/cell. Charging terminates if the low-battery

condition persists for more than 25% of the total charge

time.

16-Pin Narrow SSOP Package

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APPLICATIO S

■

Notebook Computers

■

Portable Instruments

The LTC4006 includes a thermistor sensor input that

suspends charging if an unsafe temperature condition is

detected and automatically resumes charging when the

battery temperature returns to within safe limits.

■

Battery-Backup Systems

Standalone Li-Ion Chargers

■

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners. Protected by U.S. Patents

including 5723970.

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TYPICAL APPLICATIO

4A Li-Ion Battery Charger

DCIN

0V TO 28V

3A

INPUT SWITCH

0.1µF

5k

V

LOGIC

DCIN

CHG

INFET

CLP

100k

0.033Ω

15nF

LTC4006

CHG

ACP

CHARGING

TO SYSTEM LOAD

ACP/SHDN

CLN

20µF

10µH

I

TGATE

BGATE

PGND

CSP

MON

0.025Ω

CURRENT MONITOR

32.4k

0.0047µF

NTC

BATTERY

20µF

R

T

THERMISTOR

I

TH

309k

TIMING

10k

6k

GND

BAT

NTC

RESISTOR

(~2 HOURS)

0.47µF

4006 TA01

0.12µF

4006fa

1

LTC4006

W W U W

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W U

ABSOLUTE MAXIMUM RATINGS

PACKAGE/ORDER INFORMATION

(Note 1)

TOP VIEW

Voltage from DCIN, CLP, CLN, TGATE, INFET,

ORDER PART

DCIN

CHG

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

INFET

BGATE

PGND

TGATE

CLN

ACP/SHDN, CHG to GND ....................... +32V to –0.3V

Voltage from CLP to CLN..................................... ±0.3V

CSP, BAT to GND................................... +28V to –0.3V

R_Tto GND................................................. +7V to –0.3V

NTC ........................................................ +10V to –0.3V

Operating Ambient Temperature Range

NUMBER

LTC4006EGN-2

LTC4006EGN-4

LTC4006EGN-6

ACP/SHDN

R

T

GND

NTC

CLP

I

BAT

GN PART MARKING

TH

I

CSP

MON

(Note 4) ............................................. –40°C to 85°C

Operating Junction Temperature ......... –40°C to 125°C

Storage Temperature Range ................. –65°C to 150°C

Lead Temperature (Soldering, 10 sec).................. 300°C

40062

40064

40066

GN PACKAGE

16-LEAD PLASTIC SSOP

T_JMAX= 125°C, θ_JA= 110°C/W

Order Options Tape and Reel: Add #TR

Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF

Lead Free Part Marking: http://www.linear.com/leadfree/

Consult LTC Marketing for parts specified with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS

The

A

●

denotes specifications which apply over the full operating

temperature range (Note 4), otherwise specifications are at T = 25°C. V

= 20V, V

= 12V unless otherwise noted.

DCIN

BAT

SYMBOL PARAMETER

DCIN Operating Range

CONDITIONS

MIN

TYP

MAX

28

UNITS

V

6

I

DCIN Operating Current

Voltage Accuracy

Sum of Current from CLP, CLN, DCIN

3

5

mA

DCIN

V

(Note 2)

TOL

LTC4006-6

LTC4006-2

LTC4006-4

8.333

8.316

12.499

12.474

16.665

16.632

8.4

12.6

16.8

8.467

8.484

12.700

12.726

16.935

16.968

V

●

I

Current Accuracy (Note 3)

V

CSP

V

BAT

V

BAT

V

BAT

– V Target = 100mV

BAT

–4

–5

4

5

%

TOL

= 11.5V (LTC4006-2)

= 7.6V (LTC4006-6)

= 12V (LTC4006-4)

●

V

< 6V, V

– V Target = 10mV

BAT

–60

–40

60

40

%

BAT

CSP

6V ≤ V

≤ V

,

LOBAT

BAT

V

R

– V

Target = 10mV

BAT

CSP

T

Termination Timer Accuracy

Battery Leakage Current

= 270k

RT

●

–15

15

%

TOL

Shutdown

DCIN = 0V

20

25

0

35

45

10

µA

●

DCIN = 20V, V

= 0V, V

= 0V

= 12V

BAT

–10

4.2

1

SHDN

UVLO

Undervoltage Lockout Threshold

Shutdown Threshold at ACP/SHDN

DCIN Current in Shutdown

DCIN Rising, V

●

4.7

5.5

2.5

3

V

BAT

V

= 0V, Sum of Current from CLP,

2

mA

SHDN

CLN, DCIN

Current Sense Amplifier, CA1

Input Bias Current Into BAT Pin

CA1/I Input Common Mode Low

11.67

µA

V

CMSL

CMSH

●

0

1

CA1/I Input Common Mode High

V

– 0.2

CLN

V

1

4006fa

2

LTC4006

ELECTRICAL CHARACTERISTICS

The

A

●

denotes specifications which apply over the full operating

= 20V, V = 12V unless otherwise noted.

temperature range (Note 4), otherwise specifications are at T = 25°C. V

DCIN

BAT

SYMBOL PARAMETER

Current Comparators I

CONDITIONS

MIN

TYP

MAX

UNITS

and I

CMP

REV

I

Maximum Current Sense Threshold (V

– V

)

BAT

V

ITH

= 2.5V

●

140

165

–30

200

mV

TMAX

TREV

CSP

Reverse Current Threshold (V

– V

)

BAT

CSP

Current Sense Amplifier, CA2

Transconductance

Source Current

1

mmho

µA

Measured at I , V = 1.4V

–40

40

TH ITH

Sink Current

Measured at I , V = 1.4V

µA

TH ITH

Current Limit Amplifier

Transconductance

1.5

100

mmho

mV

V

Current Limit Threshold

CLP Input Bias Current

●

93

107

110

CLP

I

nA

Voltage Error Amplifier, EA

Transconductance

Sink Current

1

mmho

µA

Measured at I , V = 1.4V

36

TH ITH

OVSD

Overvoltage Shutdown Threshold as a Percent

of Programmed Charger Voltage

●

102

0

107

%

Input P-Channel FET Driver (INFET)

DCIN Detection Threshold (V

– V

)

CLN

DCIN Voltage Ramping Up

0.17

0.25

50

V

DCIN

from V

– 0.1V

CLN

Forward Regulation Voltage (V

– V

)

CLN

●

25

–25

5.8

mV

V

DCIN

Reverse Voltage Turn-Off Voltage (V

– V

)

CLN

DCIN Voltage Ramping Down

–60

5

DCIN

INFET “On” Clamping Voltage (V

INFET “Off” Clamping Voltage (V

– V

)

I

= 1µA

6.5

DCIN

INFET

)

= –25µA

0.25

V

Thermistor

NTCVR

Reference Voltage During Sample Time

High Threshold

4.5

V

Rising

Falling

≤ 10V

●

NTCVR NTCVR NTCVR

• 0.48 • 0.5 • 0.52

NTC

Low Threshold

NTCVR NTCVR NTCVR

• 0.115 • 0.125 • 0.135

V

Thermistor Disable Current

10

µA

Indicator Outputs (ACP/SHDN, CHG)

C10TOL

LBTOL

C/10 Indicator Accuracy

Voltage Falling at PROG

●

0.375

0.400

0.425

V

LOBAT Threshold Accuracy

LTC4006-6

LTC4006-2

LTC4006-4

●

4.70

7.27

9.70

4.93

7.5

10

5.14

7.71

10.28

V

RESTART Threshold Accuracy

LTC4006-6

LTC4006-2

LTC4006-4

●

7.5

11.35

15.15

7.8

11.7

15.6

7.96

11.94

15.92

V

Low Logic Level of ACP/SHDN, CHG

High Logic Level of ACP/SHDN

Pull-Up Current on ACP/SHDN

C/10 Indicator Sink Current from CHG

Off State Leakage Current of CHG

Timer Defeat Threshold at CHG

I

= 100µA

= –1µA

●

0.5

V

OL

OH

OL

OH

2.7

I

V = 0V

–10

25

µA

PO

IC10

V

= 3V

●

15

–1

1

38

1

OH

I

OFF

V

4006fa

3

LTC4006

ELECTRICAL CHARACTERISTICS

The

A

●

denotes specifications which apply over the full operating

= 20V, V = 12V unless otherwise noted.

temperature range (Note 4), otherwise specifications are at T = 25°C. V

DCIN

BAT

SYMBOL PARAMETER

Oscillator

CONDITIONS

MIN

TYP

MAX

UNITS

f

Regulator Switching Frequency

255

20

300

25

345

kHz

%

OSC

MIN

Regulator Switching Frequency in Drop Out

Regulator Maximum Duty Cycle

Duty Cycle ≥ 98%

DC

V

= V

BAT

98

99

MAX

CSP

Gate Drivers (TGATE, BGATE)

V

High (V

High

– V

)

I

= –1mA

= 3000pF

= 1mA

50

10

50

mV

V

TGATE

BGATE

TGATE

BGATE

CLN

TGATE

C

4.5

5.6

LOAD

Low (V

Low

– V

)

V

CLN

TGATE

I

mV

BGATE

TGATE Transition Time

TGATE Rise Time

TGATE Fall Time

TGTR

TGTF

C

= 3000pF, 10% to 90%

50

110

100

ns

LOAD

BGATE Transition Time

BGATE Rise Time

BGATE Fall Time

BGTR

BGTF

C

= 3000pF, 10% to 90%

40

90

80

ns

LOAD

V

at Shutdown (V

at Shutdown

– V

)

I

= –1µA, DCIN = 0V, CLN = 12V

= 1µA, DCIN = 0V, CLN = 12V

100

mV

TGATE

BGATE

CLN

TGATE

BGATE

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 3: Does not include tolerance of current sense resistor.

Note 4: The LTC4006E is guaranteed to meet performance specifications

from 0°C to 70°C. Specifications over the –40°C to 85°C operating

temperature range are assured by design, characterization and correlation

with statistical process controls.

Note 2: See Test Circuit

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TYPICAL PERFOR A CE CHARACTERISTICS

INFET Response Time to

Reverse Current

V

OUT

vs I

PWM Frequency vs Duty Cycle

OUT

350

300

250

200

150

100

50

0

–0.5

–1.0

–1.5

–2.0

–2.5

–3.0

–3.5

–4.0

–4.5

–5.0

V

OF PFET (2V/DIV)

gs

V

= 0

gs

V OF PFET (5V/DIV)

s

PROGRAMMED CURRENT = 10%

V = 0V

s

I

(REVERSE) OF

DCIN = 15V

DCIN = 20V

DCIN = 24V

d

PFET (5A/DIV)

DCIN = 20V

= 12.6V

V

BAT

0

I

d

= 0A

0

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

DUTY CYCLE (V /V

0

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

OUTPUT CURRENT (A)

1.25µs/DIV

)

OUT IN

TEST PERFORMED ON DEMOBOARD

V

= 15VDC

LTC4006-2

INFET = 1/2 Si4925DY

4006 G03

4006 G02

IN

CHARGER = ON

= <10mA

I

4006 G01

CHARGE

4006fa

4

LTC4006

U W

TYPICAL PERFOR A CE CHARACTERISTICS

Disconnect/Reconnect Battery

(Load Dump)

Battery Leakage Current vs

Battery Voltage

40

VDCIN = 0V

3A STEP

35

30

1A STEP

V

FLOAT

25

20

15

10

5

1V/(DIV)

3A STEP

RECONNECT

LOAD

STATE

DISCONNECT

0

LOAD CURRENT = 1A, 2A, 3A

DCIN = 20V

LTC4006-2

0

5

10

15

20

25

30

BATTERY VOLTAGE (V)

4006 G05

4006 G04

LTC4006-2 Efficiency with

Efficiency at 19VDC V

15VDC V

IN

100

95

90

85

80

75

100

95

90

85

80

75

LTC4006-4

LTC4006-2

0.50

1.00

1.50

2.00

2.50

3.00

0.50

1.00

1.50

2.00

2.50

3.00

CHARGING CURRENT (A)

4006 G07

4006 G08

U

PI FU CTIO S

DCIN (Pin 1): External DC Power Source Input. Bypass

this pin with at least 0.01µF. See Applications Information

section.

nected and the CHG pin is forced into a high impedance

state. A pull-up resistor is required. The timer function is

defeated by forcing this pin below 1V (or connecting it to

GND).

CHG (Pin 2): Open-Drain Charge Status Output. When the

battery is being charged, the CHG pin is pulled low by an

internal N-channel MOSFET. When the charge current

drops below 10% of programmed current, the N-channel

MOSFET turns off and a 25µA current source is connected

from the CHG pin to GND. When the timer runs out or the

inputsupplyisremoved,thecurrentsourcewillbediscon-

ACP/SHDN (Pin 3): Open-Drain Output used to indicate if

the AC adapter voltage is adequate for charging. Active

high digital output. Internal 10µA pull-up to 3.5V. The

charger can also be inhibited by pulling this pin below 1V.

Reset the charger by pulsing the pin low for a minimum of

0.1µs.

4006fa

5

LTC4006

U

PI FU CTIO S

R_T(Pin 4): Timer Resistor. The timer period is set by

CSP (Pin 9): Current Amplifier CA1 Input. This pin and the

placing a resistor, R_RT, to GND.

BAT pin measure the voltage across the sense resistor,

R

_SENSE, to provide the instantaneous current signals re-

The timer period is t_TIMER= (1hour • R_RT/154k)

If this resistor is not present, the charger will not start.

GND (Pin 5): Ground for low power circuitry.

quired for both peak and average current mode operation.

BAT (Pin 10): Battery Sense Input and the Negative

Reference for the Current Sense Resistor. A precision

internal resistor divider sets the final float potential on this

pin.Theresistordividerisdisconnectedduringshutdown.

NTC (Pin 6): A thermistor network is connected from NTC

to GND. This pin determines if the battery temperature is

safe for charging. The charger and timer are suspended if

the thermistor indicates a temperature that is unsafe for

charging. The thermistor function may be disabled with a

300k to 500k resistor from DCIN to NTC.

CLP(Pin11):PositiveInputtotheSupplyCurrentLimiting

Amplifier, CL1. The threshold is set at 100mV above the

voltage at the CLN pin. When used to limit supply current,

a filter is needed to filter out the switching noise. If no

current limit function is desired, connect this pin to CLN.

I_TH(Pin 7): Control Signal of the Inner Loop of the Current

Mode PWM. Higher I_THvoltage corresponds to higher

charging currrent in normal operation. A 6.04k resistor, in

series with a capacitor of at least 0.1µF to GND, provides

loop compensation. Typical full-scale output current is

40µA. Nominal voltage range for this pin is 0V to 3V.

CLN (Pin 12): Negative Reference for the Input Current

Limit Amplifier, CL1. This pin also serves as the power

supply for the IC. A 10µF to 22µF bypass capacitor should

be connected as close as possible to this pin.

TGATE(Pin13):DrivesthetopexternalP-channelMOSFET

of the battery charger buck converter.

I_MON(Pin 8): Current Monitoring Output. The voltage at

this pin provides a linear indication of charging current.

Peak current is equivalent to 1.19V. Zero current is ap-

proximately 0.309V. A capacitor from I_MONto ground is

PGND (Pin 14):HighCurrentGroundReturnfortheBGATE

Driver.

required to filter higher frequency components. If V_BAT

<

BGATE (Pin 15): Drives the bottom external N-channel

MOSFET of the battery charger buck converter.

2.5V/cell, then V(I_MON) = 1.19V when conditioning a

depleted battery. Any current sourced or sinked from this

pin directly affects the charging current accuracy. If this

pin is to be monitored, a high impedance input buffer

should be used.

INFET(Pin16):DrivestheGateoftheExternalInputPFET.

TEST CIRCUIT

LTC4006

11.67µA

+

V

REF

+

–

EA

–

3k

35mV

I

BAT

10

CSP

TH

9

7

+

–

LT1055

0.6V

4006 TC

4006fa

6

LTC4006

W

BLOCK DIAGRA

V

IN

100k

CHG

25µA

DCIN

V

LOGIC

1

2

0.1µF

5.8V

INFET

Q3

16

3

CLN

ACP/SHDN

R

RT

R

T

OSCILLATOR

4

6

TIMER/CONTROLLER

I

CL

32.4k

T

BAD

NTC

THERMISTOR

RESTART

LOBAT

10k

NTC

1.105V

708mV

0.47µF

397mV

C/10

35mV

–

+

GND

5

3k

BAT

CSP

10

9

11.67µA

R

SENSE

20µF

–

+

Ω

1.19V

+

3k

g

= 1m

m

CA1

EA

–

5.1k

CLP

CLN

Ω

11

12

–

+

g

= 1.5m

m

9k

R

15nF

CL1

CL

100mV

Ω

–

g

= 1m

m

CA2

+

1.19V

DCIN

I

TH

OSCILLATOR

WATCH DOG

DETECT

7

6.04k

0.12µF

20µF

BUFFERED I

t

TH

OV

OFF

÷ 5

1.28V

TGATE

S

R

+

–

+

–

13

Q1

Q2

Q

I

CMP

BGATE

PGND

CHARGE

PWM

LOGIC

15

14

–

+

I

REV

17mV

I

MON

8

L1

R

IMON1

26.44k

4.7nF

R

IMON2

52.87k

4006 BD

4006fa

7

LTC4006

U

OPERATIO

Overview

ACP/SHDNpin. ItcontrolsthegateoftheinputFETtokeep

a low forward voltage drop when charging and also

prevents reverse current flow through the input FET.

The LTC4006 is a synchronous current mode PWM step-

down(buck)switcherbatterychargercontroller.Thecharge

current is programmed by the sense resistor (R_SENSE

If the input voltage is less than V_CLN, it must go at least

170mVhigherthanV_CLNtoactivatethecharger.Whenthis

occurs the ACP/SHDN pin is released and pulled up with

an internal load to indicate that the adapter is present. The

gateoftheinputFETisdriventoavoltagesufficienttokeep

a low forward voltage drop from drain to source. If the

voltage between DCIN and CLN drops to less than 25mV,

the input FET is turned off slowly. If the voltage between

DCIN and CLN is ever less than –25mV, then the input FET

is turned off in less than 10µs to prevent significant

reverse current from flowing in the input FET. In this

condition, theACP/SHDNpinisdrivenlowandthecharger

is disabled.

)

between the CSP and BAT pins. The final float voltage is

internally programmed to 8.4V (LTC4006-6), 12.6V

(LTC4006-2)or16.8V(LTC4006-4)withbetterthan±0.8%

accuracy. Charging begins when the potential at the DCIN

pin rises above the voltage at CLN (and the UVLO voltage)

and the ACP/SHDN pin is allowed to go high; the CHG pin

is set low. At the beginning of the charge cycle, if the cell

voltage is below 2.5V, the charger will trickle charge the

battery with 10% of the maximum programmed current.

If the cell voltage stays below 2.5V for 25% of the total

charge time, the charge sequence will be terminated im-

mediately and the CHG pin will be set to a high impedance.

An external thermistor network is sampled at regular

intervals. If the thermistor value exceeds design limits,

charging is suspended. If the thermistor value returns to

an acceptable value, charging resumes. An external resis-

tor on the R_Tpin sets the total charge time. The timer can

be defeated by forcing the CHG pin to a low voltage.

Battery Charger Controller

The LTC4006 charger controller uses a constant off-time,

current mode step-down architecture. During normal opera-

tion, the top MOSFET is turned on each cycle when the

oscillator sets the SR latch and turned off when the main

current comparator I_CMPresets the SR latch. While the top

MOSFET is off, the bottom MOSFET is turned on until either

the inductor current trips the current comparator I_REVor the

beginning of the next cycle. The oscillator uses the equation:

As the battery approaches the final float voltage, the charge

current will begin to decrease. When the current drops to

10% of the programmed charge current, an internal C/10

comparatorwillindicatethisconditionbysinking25µAatthe

CHG pin. The charge timer is also reset to 25% of the total

charge time. If this condition is caused by an input current

limit condition, described below, then the C/10 comparator

will be inhibited. When a time-out occurs, charging is termi-

nated immediately and the CHG pin changes to a high

impedance. The charger will automatically restart if the cell

voltage is less than 3.9V. To restart the charge cycle manu-

ally, simply remove the input voltage and reapply it, or force

the ACP/SHDN pin low momentarily. When the input voltage

is not present, the charger goes into a sleep mode, dropping

batterycurrentdrainto15µA.Thisgreatlyreducesthecurrent

drain on the battery and increases the standby time. The

chargercanbeinhibitedatanytimebyforcingtheACP/SHDN

pin to a low voltage.

V_DCIN– V_BAT

V_DCIN• f_OSC

t_OFF

=

to set the bottom MOSFET on time. This activity is dia-

grammed in Figure 1.

The peak inductor current, at which I_CMPresets the SR latch,

is controlled by the voltage on I_TH. I_THis in turn controlled by

several loops, depending upon the situation at hand. The

average current control loop converts the voltage between

CSP and BAT to a representative current. Error amp CA2

OFF

TGATE

ON

t

BGATE

OFF

Input FET

TRIP POINT SET BY ITH VOLTAGE

INDUCTOR

CURRENT

The input FET circuit performs two functions. It enables

the charger if the input voltage is higher than the CLN pin

and provides the logic indicator of AC present on the

4006 F01

Figure 1

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8

LTC4006

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OPERATIO

Table 1. Truth Table for LTC4006 Operation

MODE

DCIN

<BAT

>BAT

BAT VOLTAGE

>UVLO

BAT CURRENT

ACP/SHDN

LOW

TIMER STATE

CHG*

HIGH

LOW

Shut Down by Low Adapter Voltage

Conditioning a Depleted Battery

Leakage

Reset

<2.5V/Cell

10% Programmed

Current

HIGH

Running

Normal Charging

>BAT

>2.5V/Cell

X

Programmed

Current

HIGH

Running

Paused

LOW

Input Current Limited Charging

Charger Paused Due to Thermistor Out of Range

Programmed

Current

OFF

LOW or 25µA

(Faulted)

Shut Down by ACP/SHDN Pin

>BAT

X

OFF

Forced LOW

HIGH

Reset

HIGH

Terminated by Low-Battery Fault (Note 1)

<2.5V/Cell

>T/4 Stopped

HIGH

(Faulted)

Top-Off Charging. C/10 is Latched

>BAT

X

V

OFF

HIGH

<T/4 After C/10

Comparator Trip.

Running

25µA

FLOAT

Timer is Reset by C/10 Comparator (Latched),

then Terminates After 1/4 T

V

>T/4 After C/10

Comparator Trip.

Stopped

HIGH

(Waiting

for Restart)

Terminated by Expired Timer

V

FLOAT

**

>T Stopped

HIGH

(Waiting

for Restart)

Timer Defeated. (Low-Battery Conditioning Still

Functional)

X

Forced LOW

HIGH**

LOW

Shut Down by Undervoltage Lockout

>BAT

and <UVL

<UVL

2.5V ≤ V

OFF

HIGH

Reset

Timer Defeated Until V

> 3.9V/Cell

>BAT

≤3.9V

BAT

Programmed

Current

Running

BAT

(V/Cell)

*Open Drain. High when used with pull-up resistor.

**Most probable condition, X = Don’t care

Note 1: If a depleted battery is inserted while the charger is in this state,

the charger must be reset to initiate charging.

comparesthiscurrentagainstthedesiredcurrentprogrammed

by R_IMONat the I_MONpin and adjusts I_THuntil:

The accuracy of V_IMONwill range from 0% to I_TOL

_IMONis plotted in Figure 2.

.

V

V_REF

V_CSP– V_BAT+ 11.67µA •3kΩ

The amplifier CL1 monitors and limits the input current to

a preset level (100mV/R_CL). At input current limit, CL1 will

decrease the I_THvoltage, thereby reducing charging cur-

rent.Whenthisconditionisdetected,theC/10indicatorwill

=

R

IMON

3kΩ

therefore,

⎛ V_REF

⎞

3kΩ

1.2

I_CHARGE

=

– 11.67µA •

⎟

1.19V

⎜

⎝R

⎠ R_SENSE

IMON

1.0

0.8

0.6

0.4

The voltage at BAT is divided down by an internal resistor

divider and is used by error amp EA to decrease I_THif the

divider voltage is above the 1.19V reference. When the

charging current begins to decrease, the voltage at I_MON

will decrease in direct proportion. The voltage at I_MONis

then given by:

0.309V

0.2

0

20

40

60

80

100

R

3kΩ

IMON

I

(% OF MAXIMUM CURRENT)

CHARGE

V

= I_CHARGE•R_SENSE+ 11.67µA •3kΩ •

(

)

IMON

4006 F02

Figure 2. V

vs I

CHARGE

IMON

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9

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OPERATIO

Table 2. Truth Table for LTC4006 Operation (Supplemental)

FROM

STATE

TO

BAT

VOLTAGE

PRESENT C/10 NEXT C/10

MAX BAT

CURRENT

TIMER

STATE

NUMBER

STATE

MODE

DCIN

<BAT

>BAT

LATCH

ACP/SHDN

LOW

CHG*

HIGH

1

2

3

Any

MSD

SD

Shut Down by Low Adapter Voltage

Charge Shutdown

0

OFF

Reset

MSD

HIGH

SD,

SD

Shut Down by Undervoltage Lockout

>BAT

and

HIGH

HIGH**

CONDITION,

CHARGE

<UVL

4

5

6

7

8

9

SD

CONDITION Start Conditioning a Depleted Battery

>BAT

<2.5V/Cell

10% Programmed

Current

HIGH

LOW

CONDITION CONDITION Input Current Limited Condition Charging

CONDITION CONDITION Conditioning a Depleted Battery

<10% Programmed

Current (Note 2)

Running

Ignored

Paused

>T/4

10% Programmed

Current

LOW

CONDITION CONDITION Timer Defeated. (Low-Battery Conditioning Still

Functional)

10% Programmed

Current

Forced LOW

CONDITION

SD

Charger Paused Due to Thermistor Out of Range >BAT

OFF

LOW

(Faulted)

CONDITION

SD

Timeout in CONDITION Mode

>BAT

HIGH

(Faulted)

10

11

CONDITION

SD

Shut Down by ACP/SHDN Pin

Start Normal Charging

>BAT

<2.5V/Cell

>2.5V/Cell

0

Forced LOW

HIGH

Reset

HIGH

CHARGE

Programmed

Current

Running

12

13

14

15

16

17

18

CHARGE

SD

CHARGE

SD

Timer Defeated. (Low-Battery Conditioning Still

Functional)

>BAT

>2.5V/Cell

Programmed

Current

HIGH

Ignored

Reset

Forced LOW

Restart

>BAT 2.5V ≤ V_BAT≤ 3.9V

0

1

Programmed

Current

(V/Cell)

CHARGE

Top-Off Charging

>BAT

>3.9V/Cell

>2.5V/Cell

>3.9V/Cell

>2.5V/Cell

0

1

Programmed

Current

Running

Reset

LOW

25µA

C/10 Latch is SET when Battery Current is Less

Than 10% of Programmed Current

Programmed

Current

Top-Off Charging

Programmed

Current

Running

Input Current Limited Charging

<Programmed

Current (Note 2)

Charger Paused Due to Thermistor Out of Range >BAT

OFF

Paused

LOW or 25µA

(Faulted)

19

20

CHARGE

SD

Shut Down by ACP/SHDN Pin

>BAT

>2.5V/Cell

<2.5V/Cell

0

OFF

Forced LOW

HIGH

Reset

HIGH

Terminated by Low-Battery Fault (Note 1)

>T/4 then Reset

HIGH

(Faulted)

21

22

CHARGE

SD

Terminates After 1/4 T

Terminates After T

>BAT

V_FLOAT

1

0

OFF

HIGH

>T/4 then Reset

HIGH

V_FLOAT**

Note 1: If a depleted battery is inserted while the charger is in this state,

the charger must be reset to initiate charging.

LTC4006: State Diagram (Supplemental)

Note 2: See section on “Adapter Limiting”.

Note 3: The information contained in this table is supplemental to the

LTC4006 data sheet and has not been production qualified.

1

MASTER

SHUTDOWN

ANY

Note 4: Blank fields indicate no change, not considered, or other states

2

impact value.

*Open Drain. High when used with pull-up resistor.

** Most probable condition.

SHUTDOWN

4

3, 8,

9, 10

5,

13 6,

7

3, 18, 19,

20, 21, 22

CONDITION

11

CHARGE

12, 14, 15, 16, 17

4006 F15

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LTC4006

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OPERATIO

be inhibited if it is not already active. If the charging current

decreases below 10% to 15% of programmed current,

while engaged in input current limiting, BGATE will be

forced low to prevent the charger from discharging the

battery. Audible noise can occur in this mode of operation.

LTC4006

NTC

CLK

R9

–

32.4k

6

~4.5V

R

S1

TH

C7

0.47µF

+

10k

NTC

An overvoltage comparator guards against voltage tran-

sient overshoots (>7% of programmed value). In this

case, both MOSFETs are turned off until the overvoltage

condition is cleared. This feature is useful for batteries

which “load dump” themselves by opening their protec-

tion switch to perform functions such as calibration or

pulse mode charging.

60k

+

–

45k

15k

–

+

As the voltage at BAT increases to near the input voltage

at DCIN, the converter will attempt to turn on the top

MOSFET continuously (“dropout’’). A watchdog timer

detects this condition and forces the top MOSFET to turn

off for about 300ns at 40µs intervals. This is done to

prevent audible noise when using ceramic capacitors at

the input and output.

T

BAD

D

C

Q

4006 F03

Figure 3

Charger Startup

This voltage is stored by C7. Then the switch is opened for a

shortperiodoftimetoreadthevoltageacrossthethermistor.

When the charger is enabled, it will not begin switching

untiltheI_THvoltageexceedsathresholdthatassuresinitial

current will be positive. This threshold is 5% to 15% of the

maximum programmed current. After the charger begins

switching, the various loops will control the current at a

level that is higher or lower than the initial current. The

duration of this transient condition depends upon the loop

compensation but is typically less than 100µs.

t_HOLD= 10 • R_RT• 17.5pF = 54µs,

for R_RT= 309k

When the t_HOLDinterval ends the result of the thermistor

testing is stored in the D flip-flop (DFF). If the voltage at

NTC is within the limits provided by the resistor divider

feeding the comparators, then the NOR gate output will be

low and the DFF will set T_BADto zero and charging will

continue. If the voltage at NTC is outside of the resistor

dividerlimits, thentheDFFwillsetT_BADtoone, thecharger

will be shut down, and the timer will be suspended until

T_BADreturns to zero (see Figure 4).

Thermistor Detection

The thermistor detection circuit is shown in Figure 3. It requires

an external resistor and capacitor in order to function properly.

Thethermistordetectorperformsasample-and-holdfunc-

tion. An internal clock, whose frequency is determined by

the timing resistor connected to R_T, keeps switch S1

closed to sample the thermistor:

CLK

(NOT TO

SCALE)

t

SAMPLE

t

HOLD

t_SAMPLE= 127.5 • 20 • R_RT• 17.5pF = 13.8ms,

VOLTAGE ACROSS THERMISTOR

for R_RT= 309k

COMPARATOR HIGH LIMIT

COMPARATOR LOW LIMIT

V

NTC

The external RC network is driven to approximately 4.5V

and settles to a final value across the thermistor of:

4006 F04

4.5V •R_TH

R_TH+ R9

V_RTH(FINAL)

=

Figure 4

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11

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APPLICATIO S I FOR ATIO

Alternatively, a normally closed switch can be used to

detect when the battery is present (see Figure 8).

Charger Current Programming

The basic formula for charging current is:

200

180

160

140

120

100

80

100mV

R_SENSE

I_CHARGE(MAX)

=

Table 3. Recommended R

Resistor Values

(Ω) 1%

SENSE

I

(A)

R

SENSE

R

(W)

SENSE

MAX

1.0

0.100

0.25

0.5

2.0

3.0

4.0

0.050

0.033

0.025

60

40

20

0.5

0

100

300

400 450

500

150 200 250

350

Setting the Timer Resistor

R

RT

(kΩ)

4006 F05

The charger termination timer is designed for a range of 1

hour to 3 hours with a ±15% uncertainty. The timer is

programmed by the resistor R_RTusing the following

equation:

Figure 5. t

vs R

RT

TIMER

3.3V

t_TIMER= 10 • 2²⁷• R_RT• 17.5pF (Refer to Figure 5)

V

DD

200k

LTC4006

CHG

µP

OUT

IN

33k

(seconds)

2

It is important to keep the parasitic capacitance on the R_T

pin to a minimum. The trace connecting R_Tto R_RTshould

be as short as possible.

4006 F06

Figure 6. Microprocessor Interface

CHG Status Output Pin

LTC4006

ADAPTER

POWER

When the charge cycle starts, the CHG pin is pulled down

to ground by an internal N-channel MOSFET that can drive

more than 100µA. When the charge current drops to 10%

of the full-scale current (C/10), the N-channel MOSFET is

turned off and a weak 25µA current source to ground is

connected to the CHG pin. After a time out occurs, the pin

will go into a high impedance state. By using two different

value pull-up resistors, a microprocessor can detect three

states from this pin (charging, C/10 and stop charging).

See Figure 6.

DCIN

1

3

470k

ACP/SHDN

4006 F07

SWITCH CLOSED IF

BATTERY CONNECTED

Figure 7

LTC4006

ADAPTER

POWER

DCIN

1

3

Battery Detection

ACP/SHDN

It is generally not good practice to connect a battery while

the charger is running. The timer is in an unknown state

and the charger could provide a large surge current into

the battery for a brief time. The circuit shown in Figure 7

keeps the charger shut down and the timer reset while a

battery is not connected.

4006 F08

SWITCH OPEN WHEN

BATTERY CONNECTED

Figure 8

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U

Soft-Start

⎛

⎝

V_BAT

V_DCIN

⎞

0.29 V

1–

(

)

⎜

⎟

⎠

BAT

The LTC4006 is soft started by the 0.12µF capacitor on the

I_RMS

=

I

_THpin.Onstart-up,I_THpinvoltagewillrisequicklyto0.5V,

L1 f

( )( )

then ramp up at a rate set by the internal 40µA pull-up

current and the external capacitor. Battery charging For example:

current starts ramping up when I_THvoltage reaches 0.8V

V_DCIN= 19V, V_BAT= 12.6V, L1 = 10µH, and

f = 300kHz, I_RMS= 0.41A.

and full current is achieved with I_THat 2V. With a 0.12µF

capacitor, time to reach full charge current is about 2ms

and it is assumed that input voltage to the charger will

reach full value in less than 2ms. The capacitor can be

increased up to 1µF if longer input start-up times are

needed.

EMI considerations usually make it desirable to minimize

ripple current in the battery leads, and beads or inductors

maybeaddedtoincreasebatteryimpedanceatthe300kHz

switching frequency. Switching ripple current splits be-

tween the battery and the output capacitor depending on

theESRoftheoutputcapacitorandthebatteryimpedance.

If the ESR of C3 is 0.2Ω and the battery impedance is

raised to 4Ω with a bead or inductor, only 5% of the

current ripple will flow in the battery.

Input and Output Capacitors

The input capacitor (C2) is assumed to absorb all input

switching ripple current in the converter, so it must have

adequate ripple current rating. Worst-case RMS ripple

currentwillbeequaltoonehalfofoutputchargingcurrent.

Actual capacitance value is not critical. Solid tantalum low

ESR capacitors have high ripple current rating in a rela-

tively small surface mount package, but caution must be

used when tantalum capacitors are used for input or

output bypass. High input surge currents can be created

when the adapter is hot-plugged to the charger or when a

battery is connected to the charger. Solid tantalum capaci-

tors have a known failure mechanism when subjected to

very high turn-on surge currents. Only Kemet T495 series

of “Surge Robust” low ESR tantalums are rated for high

surge conditions such as battery to ground.

Inductor Selection

Higher operating frequencies allow the use of smaller

inductor and capacitor values. A higher frequency gener-

ally results in lower efficiency because of MOSFET gate

charge losses. In addition, the effect of inductor value on

ripple current and low current operation must also be

considered. The inductor ripple current ∆I_Ldecreases

with higher frequency and increases with higher V_IN.

1

⎛

V_OUT

V

IN

⎞

∆I_L=

V_OUT1–

⎜

⎟

⎠

f L

( )( )

⎝

The relatively high ESR of an aluminum electrolytic for C1,

located at the AC adapter input terminal, is helpful in

reducing ringing during the hot-plug event. Refer to Appli-

cation Note 88 for more information.

Accepting larger values of ∆I_Lallows the use of low

inductances, but results in higher output voltage ripple

and greater core losses. A reasonable starting point for

setting ripple current is ∆I_L= 0.4(I_MAX). In no case should

∆I_Lexceed 0.6(I_MAX) due to limits imposed by I_REVand

CA1. Remember the maximum ∆I_Loccurs at the maxi-

mum input voltage. In practice 10µH is the lowest value

recommended for use.

Highest possible voltage rating on the capacitor will mini-

mize problems. Consult with the manufacturer before use.

Alternatives include new high capacity ceramic (at least

20µF) from Tokin, United Chemi-Con/Marcon, et al. Other

alternative capacitors include OS-CON capacitors from

Sanyo.

Lower charger currents generally call for larger inductor

values. Use Table 4 as a guide for selecting the correct

inductor value for your application.

The output capacitor (C3) is also assumed to absorb

output switching current ripple. The general formula for

capacitor current is:

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APPLICATIO S I FOR ATIO

Table 4

highest at high input voltages. For V_IN< 20V the high

currentefficiencygenerallyimproveswithlargerMOSFETs,

while for V_IN> 20V the transition losses rapidly increase

to the point that the use of a higher R_DS(ON)device with

lower C_RSSactually provides higher efficiency. The syn-

chronous MOSFET losses are greatest at high input volt-

age or during a short circuit when the duty cycle in this

switch is nearly 100%. The term (1 + δ∆T) is generally

given for a MOSFET in the form of a normalized R_DS(ON)vs

temperature curve, but δ = 0.005/°C can be used as an

approximation for low voltage MOSFETs. C_RSSis usually

specified in the MOSFET characteristics; if not, then C_RSS

can be calculated using C_RSS= Q_GD/∆V_DS. The constant

k = 2 can be used to estimate the contributions of the two

terms in the main switch dissipation equation.

MAXIMUM

AVERAGE CURRENT (A)

INPUT

VOLTAGE (V)

MINIMUM INDUCTOR

VALUE (µH)

1

2

3

4

≤20

>20

≤20

>20

≤20

>20

≤20

>20

40 ±20%

56 ±20%

20 ±20%

30 ±20%

15 ±20%

20 ±20%

10 ±20%

15 ±20%

Charger Switching Power MOSFET

and Diode Selection

Two external power MOSFETs must be selected for use

with the charger: a P-channel MOSFET for the top (main)

switch and an N-channel MOSFET for the bottom (syn-

chronous) switch.

If the charger is to operate in low dropout mode or with a

high duty cycle greater than 85%, then the topside

P-channel efficiency generally improves with a larger

MOSFET.UsingasymmetricalMOSFETsmayachievecost

savings or efficiency gains.

The peak-to-peak gate drive levels are set internally. This

voltageistypically6V.Consequently,logic-levelthreshold

MOSFETs must be used. Pay close attention to the BV_DSS

specification for the MOSFETs as well; many of the logic

level MOSFETs are limited to 30V or less.

The Schottky diode D1, shown in the Typical Application

on the back page, conducts during the dead-time between

the conduction of the two power MOSFETs. This prevents

thebodydiodeofthebottomMOSFETfromturningonand

storing charge during the dead-time, which could cost as

much as 1% in efficiency. A 1A Schottky is generally a

good size for 4A regulators due to the relatively small

average current. Larger diodes can result in additional

transition losses due to their larger junction capacitance.

SelectioncriteriaforthepowerMOSFETsincludethe“ON”

resistance R_DS(ON), total gate capacitance Q_G, reverse

transfer capacitance C_RSS, input voltage and maximum

output current. The charger is operating in continuous

mode at moderate to high currents so the duty cycles for

the top and bottom MOSFETs are given by:

The diode may be omitted if the efficiency loss can be

tolerated.

Main Switch Duty Cycle = V_OUT/V_IN

Synchronous Switch Duty Cycle = (V_IN– V_OUT)/V_IN.

Calculating IC Power Dissipation

The MOSFET power dissipations at maximum output

current are given by:

The power dissipation of the LTC4006 is dependent upon

the gate charge of the top and bottom MOSFETs (Q_G1and

Q_G2respectively). The gate charge is determined from the

manufacturer’sdatasheetandisdependentuponboththe

gate voltage swing and the drain voltage swing of the

MOSFET. Use 6V for the gate voltage swing and V_DCINfor

the drain voltage swing.

PMAIN = V_OUT/V_IN(I²_MAX)(1 + δ∆T)R_DS(ON)

+ k(V²_IN)(I_MAX)(C_RSS)(f_OSC

)

PSYNC = (V_IN– V_OUT)/V_IN(I²_MAX)(1 + δ∆T)R_DS(ON)

Where δ is the temperature dependency of R_DS(ON)and k

is a constant inversely related to the gate drive current.

Both MOSFETs have I²R losses while the PMAIN equation

includesanadditionaltermfortransitionlosses,whichare

P_D= V_DCIN• (f_OSC(Q_G1+ Q_G2) + I_DCIN

)

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14

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APPLICATIO S I FOR ATIO

U

between the CLP and DCIN pins. When this voltage ex-

ceeds 100mV, the amplifier will override programmed

charging current to limit adapter current to 100mV/R_CL. A

lowpass filter formed by 5kΩ and 15nF is required to

eliminate switching noise. If the current limit is not used,

CLP should be connected to CLN.

Example:

V_DCIN= 19V, f_OSC= 345kHz, Q_G1= Q_G2= 15nC.

PD = 292mW

I_DCIN= 5mA

Adapter Limiting

Setting Input Current Limit

An important feature of the LTC4006 is the ability to

automatically adjust charging current to a level which

avoids overloading the wall adapter. This allows the prod-

uct to operate at the same time that batteries are being

charged without complex load management algorithms.

Additionally, batteries will automatically be charged at the

maximum possible rate of which the adapter is capable.

To set the input current limit, you need to know the

minimum wall adapter current rating. Subtract 7% for the

input current limit tolerance and use that current to deter-

mine the resistor value.

R

_CL= 100mV/I_LIM

I_LIM= Adapter Min Current –

(Adapter Min Current • 7%)

This feature is created by sensing total adapter output

current and adjusting charging current downward if a

preset adapter current limit is exceeded. True analog

control is used, with closed-loop feedback ensuring that

adapter load current remains within limits. Amplifier CL1

in Figure 9 senses the voltage across R_CL, connected

As is often the case, the wall adapter will usually have at

least a +10% current limit margin and many times one can

simply set the adapter current limit value to the actual

adapter rating (see Figure 9).

Designing the Thermistor Network

LTC4006

100mV

There are several networks that will yield the desired

function of voltage vs temperature needed for proper

operation of the thermistor. The simplest of these is the

voltage divider shown in Figure 10. Unfortunately, since

theHIGH/LOWcomparatorthresholdsarefixedinternally,

there is only one thermistor type that can be used in this

network; the thermistor must have a HIGH/LOW resis-

tance ratio of 1:7. If this happy circumstance is true for

CLP

+

11

–

15nF

5k

CL1

+

AC ADAPTER

INPUT

R

CL

*

CLN

V

12

IN

+

C

TO SYSTEM

LOAD

IN

100mV

ADAPTER CURRENT LIMIT

*R

CL

=

4006 F09

Figure 9. Adapter Current Limiting

Table 5. Common R Resistor Values

CL

ADAPTER

RATING (A)

–7% ADAPTER

RATING (A)

R VALUE*

CL

(Ω) 1%

R

POWER

R

POWER

CL

LIMIT (A)

DISSIPATION (W)

RATING (W)

1.5

1.8

2.0

2.3

2.5

2.7

3.0

3.3

3.6

4.0

1.40

1.67

1.86

2.14

2.33

2.51

2.79

3.07

3.35

3.72

0.068

0.062

0.051

0.047

0.043

0.039

0.036

0.033

0.030

0.027

1.47

0.15

0.16

0.20

0.21

0.23

0.26

0.28

0.31

0.33

0.37

0.25

1.61

0.25

1.96

0.25

2.13

0.25

2.33

0.50

2.56

0.50

2.79

0.50

3.07

0.50

3.35

0.50

3.72

0.50

* Rounded to nearest 5% standard step value. Many non-standard values are popular.

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15

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LTC4006

NTC

R9

NTC

6

C7

R

C7

R9A

R

TH

4006 F10

4006 F11

Figure 10. Voltage Divider Thermistor Network

Figure 11. General Thermistor Network

you, then simply set R9 = R_TH(LOW)

R_TH= 22k at 25°C,

_TH(LOW)= 6.53k at 0°C

R_TH(HIGH)= 61.4k at 50°C

R9 = 43.9k → 44.2k (nearest 1% value)

R9A = 154k

R

If you are using a thermistor that doesn’t have a 1:7 HIGH/

LOW ratio, or you wish to set the HIGH/LOW limits to

different temperatures, then the more generic network in

Figure 11 should work.

Sizing the Thermistor Hold Capacitor

Once the thermistor, R_TH, has been selected and the

thermistor value is known at the temperature limits, then

resistors R9 and R9A are given by:

During the hold interval, C7 must hold the voltage across

the thermistor relatively constant to avoid false readings.

A reasonable amount of ripple on NTC during the hold

interval is about 10mV to 15mV. Therefore, the value of C7

is given by:

For NTC thermistors:

R9 = 6 R_TH(LOW)• R_TH(HIGH)/(R_TH(LOW)– R_TH(HIGH)

)

R9A=6R_TH(LOW)•R_TH(HIGH)/(R_TH(LOW)–7•R_TH(HIGH)

where R_TH(LOW)> 7 • R_TH(HIGH)

)

C7 = t_HOLD/(R9/7 • –ln(1 – 8 • 15mV/4.5V))

= 10 • R_RT• 17.5pF/(R9/7 • –ln(1 – 8 • 15mV/4.5V)

For PTC thermistors:

Example:

R9 = 6 R_TH(LOW)• R_TH(HIGH)/(R_TH(HIGH)– R_TH(LOW)

)

R9 = 24.3k

R_RT= 309k (~2 hour timer)

C7 = 0.57µF → 0.56µF (nearest value)

R9A =6R_TH(LOW)•R_TH(HIGH)/(R_TH(HIGH)–7• R_TH(LOW)

where R_TH(HIGH)> 7R_TH(LOW)

)

Example #1: 10kΩ NTC with custom limits

Disabling the Thermistor Function

TLOW = 0°C, THIGH = 50°C

R_TH= 10k at 25°C,

If the thermistor is not needed, connecting a resistor

between DCIN and NTC will disable it. The resistor should

besizedtoprovideatleast10µAwiththeminimumvoltage

applied to DCIN and 10V at NTC. Do not exceed 30µA into

NTC. Generally, a 301k resistor will work for DCIN less

than 15V. A 499k resistor is recommended for DCIN

between 15V and 24V.

R_TH(LOW)= 32.582k at 0°C

R_TH(HIGH)= 3.635k at 50°C

R9 = 24.55k → 24.3k (nearest 1% value)

R9A = 99.6k → 100k (nearest 1% value)

Example #2: 100kΩ NTC

TLOW = 5°C, THIGH = 50°C

Optional Simple Battery Discharge Path Circuit

R_TH= 100k at 25°C,

It is NOT recommended that one permit battery current to

flow backwards through R_SENSE, inductor and out the

TGATE MOSFET internal diode to reach V_OUT. The TGATE

MOSFET is off when V_IN< V_BAT. Figure 12 shows an op-

tionalhighefficiencydischargepathforthebatterysuchthat

V_OUTpowercomesfromlossless“diodeor”ofV_INandV_BAT

Normally when V_IN> V_BAT, P-channel MOSFET Q1B V_GS

R_TH(LOW)= 272.05k at 5°C

R_TH(HIGH)= 33.195k at 50°C

R9 = 226.9k → 226k (nearest 1% value)

R9A = 1.365M → 1.37M (nearest 1% value)

Example #3: 22kΩ PTC

.

=

TLOW = 0°C, THIGH = 50°C

4006fa

16

LTC4006

W U U

APPLICATIO S I FOR ATIO

U

100k

selection. If the V_INsupply is going to collapse very slowly

suchthatQ1Bisnotturnedonquicklyenoughforthegiven

load and stay within its P_Dlimits, you should install a suit-

able Schottky diode in parallel with Q1B.

V

IN

Q1A

PCB Layout Considerations

V

OUT

BAT

Formaximumefficiency,theswitchnoderiseandfalltimes

should be minimized. To prevent magnetic and electrical

field radiation and high frequency resonant problems,

proper layout of the components connected to the IC is

essential. (See Figure 13.) Here is a PCB layout priority list

forproperlayout.LayoutthePCBusingthisspecificorder.

ZENER

18V

TGATE

Q1B

INDUCTOR

R

SENSE

V

1. Inputcapacitorsneedtobeplacedascloseaspossible

to switching FET’s supply and ground connections.

Shortest copper trace connections possible. These

parts must be on the same layer of copper. Vias must

not be used to make this connection.

4006 F12

Figure 12. Optional Simple High

Efficiency Battery Discharge Path

0V keeping Q1B in the off state while P-channel MOSFET

Q1A is on. If V_INwere to suddenly go away, Q1B internal

diode will provide a passive but instant discharge path for

battery current to reach V_OUTand hold up the load. Q1B

internaldiodehasthesamecurrentratingastheFETitself,

but has a very high V_fof about a volt such that heat will

quicklybuildupinQ1Bifleftalone.HoweverasV_IN’svoltage

fallsbelowV_BATbyQ1B’sV_GSthreshold,Q1Bwillthenturn

on shorting out its internal diode removing both the heat

and voltage losses created by the diode. When V_INfalls to

zero volts, Q1B gate will be driven to the same voltage as

V_BATproviding the lowest possible RDS_ONvalue. A zener

diodealongwitha100kresistorinserieswiththeQ1Bgate

protects the gate from any hazardous voltage spikes that

can exceed Q1B maximum permissible V_GSvoltage. The

zener voltage rating must be less than Q1B V_GS(MAX)volt-

2. ThecontrolICneedstobeclosetotheswitchingFET’s

gate terminals. Keep the gate drive signals short for a

clean FET drive. This includes IC supply pins that con-

nect to the switching FET source pins. The IC can be

placedontheoppositesideofthePCBrelativetoabove.

3. Place inductor input as close as possible to switching

FET’s output connection. Minimize the surface area of

this trace. Make the trace width the minimum amount

needed to support current—no copper fills or pours.

Avoid running the connection using multiple layers in

parallel. Minimize capacitance from this node to any

other trace or plane.

SWITCH NODE

L1

V

BAT

age but greater than V_BAT

.

HIGH

FREQUENCY

CIRCULATING

PATH

SinceQ1AandQ1Barealwaysatoppositestatesandshare

thesameload,itisoftenadvantagoustocombinebothFETs

into a single package and save PCB space. The P_Drate of

theFETthatisonisenhancedwhentheotherFETisoff.The

choiceofacombinedQ1shouldtakeintoaccountthehigh-

est load current conditions of both paths and choose

whicheverisgreaterasthedrivingforcebehindtheMOSFET

C2

D1

V

IN

C3

BAT

4006 F13

Figure 13. High Speed Switching Path

4006fa

17

LTC4006

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U

APPLICATIO S I FOR ATIO

4. Place the output current sense resistor right next to

the inductor output but oriented such that the IC’s

currentsensefeedbacktracesgoingtoresistorarenot

long. The feedback traces need to be routed together

asasinglepaironthesamelayeratanygiventimewith

smallest trace spacing possible. Locate any filter

componentonthesetracesnexttotheICandnotatthe

sense resistor location.

8. Route analog ground as a trace tied back to IC ground

(analog ground pin if present) before connecting to

any other ground. Avoid using the system ground

plane. CAD trick: make analog ground a separate

ground net and use a 0Ω resistor to tie analog ground

to system ground.

9. A good rule of thumb for via count for a given high

current path is to use 0.5A per via. Be consistent.

5. Place output capacitors next to the sense resistor

output and ground.

10. If possible, place all the parts listed above on the same

PCB layer.

6. Output capacitor ground connections need to feed

into same copper that connects to the input capacitor

ground before tying back into system ground.

11. Copper fills or pours are good for all power connec-

tionsexceptasnotedaboveinRule3.Youcanalsouse

copper planes on multiple layers in parallel too—this

helps with thermal management and lower trace in-

ductance improving EMI performance further.

General Rules

7. Connection of switching ground to system ground or

internal ground plane should be single point. If the

system has an internal system ground plane, a good

way to do this is to cluster vias into a single star point

to make the connection.

12. For best current programming accuracy provide a

Kelvin connection from R_SENSEto CSP and BAT. See

Figure 13 as an example.

It is important to keep the parasitic capacitance on the R_T,

CSP and BAT pins to a minimum. The traces connecting

these pins to their respective resistors should be as short

as possible.

DIRECTION OF CHARGING CURRENT

R

SNS

4006 F14

BAT

CSP

Figure 14. Kelvin Sensing of Charging Current

4006fa

18

LTC4006

U

PACKAGE DESCRIPTION

GN Package

16-Lead Plastic SSOP (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1641)

.189 – .196*

(4.801 – 4.978)

.045 ±.005

.009

(0.229)

REF

16 15 14 13 12 11 10 9

.254 MIN

.150 – .165

.229 – .244

.150 – .157**

(5.817 – 6.198)

(3.810 – 3.988)

.0165

±

.0015

.0250 BSC

RECOMMENDED SOLDER PAD LAYOUT

1

2

3

4

5

6

7

8

.015 ± .004

(0.38 ± 0.10)

×

45°

.0532 – .0688

(1.35 – 1.75)

.004 – .0098

(0.102 – 0.249)

.007 – .0098

(0.178 – 0.249)

0°

– 8° TYP

.016 – .050

(0.406 – 1.270)

.0250

(0.635)

BSC

.008 – .012

GN16 (SSOP) 0204

(0.203 – 0.305)

TYP

NOTE:

1. CONTROLLING DIMENSION: INCHES

INCHES

2. DIMENSIONS ARE IN

(MILLIMETERS)

3. DRAWING NOT TO SCALE

*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH

SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE

**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD

FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE

4006fa

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-

tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.

19

LTC4006

U

TYPICAL APPLICATIO

2A Li-Ion Battery Charger

Q3

DCIN

0V TO 20V

2.5A

INPUT SWITCH

D1: MBRM140T3

Q1, Q2: Si7501DN

Q3: Si5435B

R1

5k

C1

0.1µF

V

LOGIC

1

2

3

8

6

4

7

5

16

11

12

13

15

14

9

R3

C4

15nF

DCIN

CHG

INFET

R

CL

100k

LTC4006

0.04Ω

CLP

CLN

CHG

ACP

CHARGING

TO SYSTEM LOAD

C2

20µF

ACP/SHDN

L1

R

SENSE

0.05Ω

I

TGATE

BGATE

PGND

CSP

Q1

Q2

MON

22µH 2A

CURRENT MONITOR

R9 32.4k

NTC

BATTERY

R

I

T

D1

C3

20µF

C5

THERMISTOR

R

T

0.0047µF

TH

10k

R4

6.04k

C6

309k

TIMING

10

GND

BAT

NTC

C7

RESISTOR

(~2 HOURS)

4006 TA02

0.47µF

0.12µF

RELATED PARTS

PART NUMBER DESCRIPTION

COMMENTS

LT1511

LT1513

LTC1709

3A Constant-Current/Constant-Voltage Battery Charger High Efficiency, Minimum External Components to Fast Charge Lithium,

NIMH and NiCd Batteries

SEPIC Constant- or Programmable-Current/Constant-

Voltage Battery Charger

Charger Input Voltage May be Higher, Equal to or Lower Than Battery Voltage,

500kHz Switching Frequency

2-Phase, Dual Synchronous Step-Down Controller

with VID

Up to 42A Output, Minimum C and C , Uses Smallest Components for

IN OUT

Intel and AMD Processors

LTC1760/

LTC1960

Dual Battery Charger/Selector

Simultaneous Charge or Discharge of Two Batteries, DAC Programmable

Current and Voltage, Input Current Limiting Maximizes Charge Current

LTC1778

Wide Operating Range, No R

Step-Down Controller

^TMSynchronous

2% to 90% Duty Cycle at 200kHz, Stable with Ceramic C

SENSE

OUT

LTC3711

No R

Synchronous Step-Down Controller

3.5V ≤ V ≤ 36V, 0.925V ≤ V

≤ 2V, for Transmeta, AMD and Intel

SENSE

IN

OUT

with VID

Mobile Processors

LTC3728

LTC4002

2-Phase, Dual Synchronous Step-Down Controller

Li-Ion Battery Charger Controller

Minimizes C and C , Power Good Output, 3.5V ≤ V ≤ 36V

IN OUT IN

1- and 2-Cell Li-Ion Batteries, V ≤ 22V, 500kHz Switching Frequency,

IN

≤ 4A

3hr Charge Termination, I

OUT

LTC4007

LTC4008

High Efficiency, Programmable Voltage,

Battery Charger with Termination

Complete Charger for 3- or 4-Cell Li-Ion Batteries, AC Adapter

Current Limit, Thermistor Sensor and Indicator Outputs

High Efficiency, Programmable Voltage/Current

Battery Charger

Constant-Current/Constant-Voltage Switching Regulator, Resistor Voltage/

Current Programming, AC Adapter Current Limit and Thermistor Sensor and

Indicator Outputs

LTC4100

LTC4412

Smart Battery Charger Controller

SMBus (Rev 1.1) Compliant, 6.4V ≤ V ≤ 26V, SMBus Accelerator Minimizes

IN

Bus Errors

PowerPath^TMIdeal Diode or Controller

Very Low Loss Replacement for OR’ing Diodes

No R_SENSEand PowerPath are trademarks of Linear Technology Corporation.

4006fa

LT 0506 REV A • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

20

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC4006_1
厂家：	Linear
描述：	4A, High Efficiency, Standalone Li-Ion Battery Charger 4A ，高效，独立锂离子电池充电器电池
文件：	总20页 (文件大小：258K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC4006_1 [Linear]

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