LTC4067EDE_技术文档

LTC4067

USB Power Manager

with OVP and

Li-Ion/Polymer Charger

U

DESCRIPTIO

FEATURES

Programmable Input Current Limit:

The LTC^®4067 is a USB power management and Li-Ion/

Polymer battery charger designed for portable battery

powered applications. The part controls total current used

by the USB peripheral for operation and battery charging.

The total input current may be left unregulated, or it may

be limited to 20% or 100% of the programmed value up

to 1.5A (typically 500mA). Battery charge current is au-

tomatically reduced such that the sum of the load current

and the charge current does not exceed the programmed

input current.

■

Single Resistor at CLPROG Pin to Set and Monitor

Input Current

Battery Charger/Ideal Diode/Controller:

■

13V Overvoltage Protection

■

Full Featured Battery Charger with 4.2V Float

■

Up to 1.25A Programmable Charge Current

■

Thermal Regulation Maximizes Charge Current

Without Risk of Overheating

■

Internal 2 Hour Termination Timer from Onset of

Voltage Mode Charging

With the addition of an external P-channel MOSFET the

LTC4067 can withstand voltages up to 13V.

■

Automatic Load Switchover to Battery Power with

Internal Ideal Diode and Drive Output for Optional

External MOSFET

The LTC4067 includes a complete constant current/con-

stant voltage linear charger for single cell Li-Ion batteries.

The ﬂoat voltage applied to the battery is held to a tight

0.4% tolerance, and charge current is programmed using

an external resistor to ground. An end-of-charge status

output, CHRG, indicates full charge. Also featured is an

NTCthermistorinputusedtomonitorbatterytemperature

while charging.

■

NTC Thermistor Input

■

Bad Battery Time-Out Detection

4mm × 3mm 12-Lead DFN Package

■

U

APPLICATIO S

■

Automatic Battery Charging/Load Switchover

■

Backup Battery Charger

The LTC4067 is available in a 12-lead low proﬁle 4mm ×

3mm DFN package.

■

Uninterrupted Supplies

, LTC and LT are registered trademarks of Linear Technology Corporation.

All other trademarks are the property of their respective owners.

U

TYPICAL APPLICATIO

OVP Response to Ramp Input at OVI

I

LOAD

OVI

OUT

WALL

OR

USB

V

10nF

OVI

10μF

5V/DIV

OVP

5V TO 12V

IN

I

IN

BAT

500mA/DIV

1μF

10μF

1-CELL

Li-Ion

LTC4067

V

OUT

5V/DIV

V

= 4.2V

BAT

I

IN(MAX)

I

CHRG

PROG

LIM0

LIM1

LIM0

V

OVP

I

5V/DIV

LIM1

L

H

L

H

L

O (SUSPEND)

4067 TA01b

200V/R

1ms/DIV

CLPROG

GND

2k

1000V/R

CLPROG

2k

4067 TA01

FIXED (2A)

4067f

1

LTC4067

W W U W

ABSOLUTE AXI U RATI GS

PACKAGE/ORDER INFORMATION

(Note 1)

TOP VIEW

IN, OUT, BAT Voltage

(t < 1ms, Duty Cycle < 1%)...................... –0.3V to 7V

Steady State, IN, OUT, BAT Voltage.............. –0.3V to 6V

CLPROG

CHRG

NTC

1

2

3

4

5

6

12 IN

11 OUT

10 BAT

NTC, I

, I

, PROG, CLPROG, CHRG, GATE

LIM0 LIM1

13

I

9

8

7

GATE

PROG

OVP

LIM0

Voltages (Note 6)....................................–0.3V to V

CC

LIM1

OVI

OVI, OVP Voltages ..................................... –0.3V to 13V

Operating Temperature Range ................. –40°C to 85°C

Storage Temperature Range................... –65°C to 125°C

DE PACKAGE

12-LEAD (4mm × 3mm) PLASTIC DFN

Max Junction Temperature (T

) ..................... 125°C

JMAX

T

= 125°C, θ = 43°C/W

JMAX

JA

EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB

ORDER PART NUMBER

LTC4067EDE

DE PART MARKING

4067

Order Options Tape and Reel: Add #TR

Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF

Lead Free Part Marking: http://www.linear.com/leadfree/

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS ^The● denotes the speciﬁcations which apply over the full operating

temperature range (Note 3), otherwise speciﬁcations are at T_A= 25°C. Note 2 unless otherwise noted, V_IN= 5V, V_BAT= 3.7V,

V_ILIM0= 0V, V_ILIM1= 0V, R_PROG= 2k, R_CLPROG= 2k, V_OVI= 0V, V_NTC= V_IN/2.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

●

V

IN Supply Voltage

Input Supply Current

5.5

V

IN

●

I

V

= 5V (Forces I = I

= 0)

PROG

= 5V, No Load

ILIM1

0.4

52

12

1.2

90

30

mA

μA

IN

NTC

BAT

SUSPEND: V

= 0V, V

ILIM0

SHUTDOWN: V

= 5V

PROG

●

I

Battery Supply Current

V

= 4.3V, Charging Stopped

14

6

2.5

60

30

12

5

μA

BAT

SUSPEND: V

= 0V V

= 5V, No Load, V = 5.5V

ILIM0

PROG

ILIM1 IN

= 5V

SHUTDOWN: V

IDEAL DIODE: V = Float, BAT Powers OUT, No Load

100

IN

I

Maximum Input Current Limit

V

OUT

= 4V, I

= 5V I = 0V (Note 7)

LIM1

1.5

2

A

IN(MAX)

LIM0

4067f

2

LTC4067

ELECTRICAL CHARACTERISTICS ^The● denotes the speciﬁcations which apply over the full operating

temperature range (Note 3), otherwise speciﬁcations are at T_A= 25°C. Note 2 unless otherwise noted, V_IN= 5V, V_BAT= 3.7V,

V_ILIM0= 0V, V_ILIM1= 0V, R_PROG= 2k, R_CLPROG= 2k, V_OVI= 0V, V_NTC= V_IN/2.

SYMBOL

PARAMETER

CONDITIONS

MIN

3.5

TYP

MAX

UNITS

●

V

IUVLO

IN Undervoltage Lockout

Rising Threshold

Falling Threshold

3.8

3.675

4

V

BAT Undervoltage Lockout

Rising Threshold

Falling Threshold

2.8

2.7

3

V

BUVLO

2.5

Current Limit

R

On-Resistance of Input Power FET

Input Current Limit

I

= 200mA

220

mΩ

FWD,IN

OUT

●

I

HPWR Mode: V

LPWR Mode

= V

= 5V

475

90

500

98

525

110

mA

LIM

ILIM0

ILIM1

●

V

CLPROG Pin Servo Voltage

Soft Start Inrush Current

HPWR Mode: V

LPWR Mode : V

= V , V

= 4V

0.95

0.18

1

0.2

1.05

0.22

V

CLPROG

ILIM0

ILIM1

CC OUT

= 4V

OUT

I

R

= 4k, Short at OUT (Note 8)

CLPROG

0.3

mA/μs

SS

Battery Charger

V

Regulated Output Voltage

I

= –2mA

BAT

4.185

4.167

4.2

4.215

4.234

V

FLOAT

(0°C – 85°C); I = –2mA

BAT

●

I

Constant-Current Mode Charge

Current

R

PROG

R

PROG

= 2k, No Load at OUT

= 1k, No Load at OUT, R

470

940

500

1000

530

1060

mA

CC-CHG

= 1k

CLPROG

I

Maximum Charge Current

PROG Pin Servo Voltage

R

= R

= 0 (Note 7)

2

A

CHG(MAX)

PROG

CLPROG

●

V

R

PROG

R

PROG

R

PROG

= 2k; I = –500mA

980

90

1000

100

1020

110

mV

PROG

BAT

= 1k; I = –1A

= 2k, V < V

, I = I

TRIKL BAT TRIKL

I

End-of-Charge BAT Current

V

= 4.2V; As A Ratio to Full BAT Charge Current

BAT

CC-CHG

0.08

0.093

0.106

mA/mA

EOC

(I

)

Trickle Charge Current

V

= 2V

35

65

50

100

2

60

135

2.3

mA

mV

hrs

%

TRIKL

BAT

●

V

Recharge Battery Threshold Voltage

TIMER Period

V

– V

FLOAT RECHRG

RECHRG

TIMER

t

1.7

Low Battery Trickle Charge Time

Percent of Total Charge Time, V < 2.8V

25

BAT

T

LIM

Junction Temperature in Constant

Temperature Mode

(Note 4)

105

°C

Ideal Diode

R

On-Resistance, V Regulation

V

= 0V, V

= 5V, V = 4.3V, I

= –200mA,

= –1A

200

220

mΩ

FWD

ON

ILIM0

ILIM1

BAT

OUT

Measured as ΔV/ΔI

R

DIO,ON

FWD

On-Resistance V to V

V

= 0V, V

= 5V, V = 4.3V, I

ILIM1 BAT

BAT

OUT

ILIM0

OUT

●

V

Voltage Forward Drop (V – V

)

V

= 0V, V

= 5V, V = 4.3V, I

= –1mA

= –200mA

= –1A

10

25

70

240

40

mV

BAT

OUT

ILIM0

ILIM1

BAT

OUT

= 5V, V = 4.3V, I

BAT

= 5V, V = 4.3V, I

BAT

I

Ideal Diode Current Limit

V

= 0V, V

= 5V, V = 4.3V (Notes 4, 5)

1.5

2.1

1.9

A

mA

D(MAX)

ILIM0

ILIM1

BAT

GATE Pin Output Pull Up Current

GATE Pin Output Pull Down Current

V

OUT

> V , V

= 0V

GPU

BAT GATE

V

ILIM0

V

GATE

= 0V, V

= 4.3V

= 5V, V = 4.3V, I

= 1A,

GPD

ILIM1

BAT

OUT

4067f

3

LTC4067

ELECTRICAL CHARACTERISTICS ^The● denotes the speciﬁcations which apply over the full operating

temperature range (Note 3), otherwise speciﬁcations are at T_A= 25°C. Note 2 unless otherwise noted, V_IN= 5V, V_BAT= 3.7V,

V_ILIM0= 0V, V_ILIM1= 0V, R_PROG= 2k, R_CLPROG= 2k, V_OVI= 0V, V_NTC= V_IN/2.

SYMBOL

NTC

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

I

NTC Input Leakage Current

V

NTC

= 2.5V

0

1

μA

NTC

V

COLD

V

HOT

V

DIS

Cold Temperature Fault Threshold

Voltage

Rising Threshold

Hysteresis

0.725 • V 0.733 • V 0.741• V

IN

V

IN

0.02 • V

IN

Hot Temperature Fault Threshold

Voltage

Falling Threshold

Hysteresis

0.287 • V 0.29 • V 0.293 • V

V

IN

0.02 • V

●

NTC Disable Voltage

NTC Input voltage to GND (Falling)

Hysteresis

80

100

30

120

mV

Logic

F

MOD

F

PW

F

TF

Serrated Fault Pulse Modulation

Frequency at CHRG Pin

(V < V

BAT

< V ) or (V

> V )

COLD

1.5

6

Hz

DIS

NTC

HOT

NTC

V

< 2.9V for Longer Than Trickle Charge Time

Serrated Fault Pulse Width at CHRG (V < V

< V ) or (V

> V )

COLD

1.33

2.62

μs

DIS

NTC

HOT

NTC

V

< 2.9V for Longer Than Trickle Charge Time

BAT

Serrated Fault Pulse Frequency at

CHRG Pin

(V < V

< V ) or (V

> V ) or

COLD

35

kHz

DIS

BAT

NTC

HOT

NTC

V

< 2.9V for Longer Than Trickle Charge Time

●

V

Output Low Voltage (CHRG)

Enable Input High Voltage

Enable Input Low Voltage

Logic Input Pull Down Current

I

= 5mA

1.5

0.4

6.2

V

OL

SINK

ILIM0, ILIM1 Pin Low to High

ILIM0, ILIM1 Pin High to Low

ILIM0, ILIM1

1.2

5.8

IH

V

lL

I

2

μA

PULLDN

V

Overvoltage Protection Threshold

(OVI Pin)

V

Rising Threshold

OVI

6

250

V

mV

OVTH

Hysteresis

– V Rising (Note 6)

PROG

V

Shutdown Threshold

V

1.4

50

V

mV

PROG,SD

CC

Hysteresis

I

PROG Pin Shutdown Sense Current

V

PROG

= 1V

3.5

μA

PROG,PULLUP

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 5: This IC includes over-temperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperature exceeds 125°C when over-temperature protection is active.

Continuous operation above the speciﬁed maximum operating junction

temperature may result in device degradation or failure.

Note 2: Current into a pin is positive and current out of a pin is negative.

All Voltages referenced to GND

Note 6: V is the greater of V , V

or V

.

BAT

CC

IN OUT

Note 3: The LTC4067 is guaranteed to meet performance speciﬁcations

from 0°C to 85°C. Speciﬁcations over the –40°C to 85°C ambient

operating temperature range are assured by design, characterization and

correlation with statistical process controls.

Note 7: Accuracy of programmed current may degrade for currents greater

than 1A.

Note 8: CLPROG soft-start scales with inverse of CLPROG resistor. If

R

= 2k, then I = 0.6mA/μs.

CLPROG

SS

Note 4: Speciﬁcation is guaranteed by design and not 100% tested in

production.

4067f

4

LTC4067

U W

TYPICAL PERFOR A CE CHARACTERISTICS

Input Supply Current vs

Temperature (Shutdown Mode)

Input Supply Current vs

Temperature (Suspend Mode)

Input Supply Current vs

Temperature

16

14

12

10

8

90

80

70

60

50

40

30

20

10

0

450

400

350

300

250

200

150

100

50

CHARGER ENTERS

THERMAL REGULATION

6

4

2

0

–50 –30 –10 10 30 50 70 90 110 130 150

TEMPERATURE (°C)

4067 G03

4067 G01

4067 G02

Battery Current vs Temperature

(Shutdown)

Input Current Limit vs

Temperature (High Power)

Battery Current vs Temperature

90

80

70

60

50

40

30

20

10

0

12

10

8

510

505

500

495

490

485

480

1010

1000

990

IN = OUT = FLOAT

V

= 3.7V

V

CLPROG

BAT

I

LIM

6

4

2

0

980

–50 –30 –10 10 30 50 70 90 110 130 150

–50 –25

0

25 50 75 100 125 150

TEMPERATURE (°C)

4067 G04

4067 G09

4067 G05

Input Current Limit vs

V_CLPROGvs Temperature

at I_IN= 500mA

Temperature (Low Power)

R_ONvs Temperature

102

100

98

204

240

220

200

180

160

140

120

100

1000

V

= 4.45V

CLPROG

IN

V

CLPROG

R

= 0k

HPWR

200

196

192

188

184

180

800

600

I

LIM

96

V

= 4V

CLPROG

= 200mA

OUT

R

= 2k

400

200

0

I

OUT

94

LPWR

R

, 1A

ON

, 500mA

, 200mA

, 100mA

92

90

–50 –30 –10 10 30 50 70 90 110 130 150

–50 –25

0

25

50

75 100 125

–50 –25

0

25

50

75 100 125

TEMPERATURE (°C)

4067 G07

4067 G06

4067 G08

4067f

5

LTC4067

U W

TYPICAL PERFOR A CE CHARACTERISTICS

V_PROGvs Temperature

at I_BAT= –500mA

Battery Float Voltage vs

Temperature

Battery Regulated (Float) Voltage

vs Input Voltage

1.2

1.0

0.8

0.6

0.4

0.2

0

4.30

4.25

4.20

4.15

4.10

4.4

4.2

4.0

3.8

3.6

3.4

3.2

3.0

ONSET OF THERMAL

REGULATION

–50 –25

0

25

50

75 100 125

–50 –30 –10 10 30 50 70 90 110

3.0

3.5

4.0

4.5

(V)

5.0

5.5

6.0

TEMPERATURE (°C)

V

IN

4067 G11

4067 G10

4067 G12

Charge Current vs Battery Voltage

600

500

400

300

200

100

0

525

500

475

450

425

V

I

= 5V

OUT

V

I

= 5V

IN

OUT

IN

= 0mA

R

= 2k

PROG

2k

R

= 4k

PROG

0

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5

(V)

3.4 3.5 3.6 3.7 3.8 3.9 4.0 4.1 4.2

(V)

V

BAT

4067 G13

4067 G14

Charge Current vs Temperature

(Thermal Regulation)

Ideal Diode Forward Voltage vs

Current and Temperature

600

500

400

300

200

100

0

500

400

300

200

100

0

V

= 5V

BAT

SUSP

IN

= 3.6V

ONSET OF THERMAL

REGULATION

T

= 130°C

= 90°C

= 50°C

= 10°C

= –30°C

A

V

= 5V

BAT

IN

= 3.6V

–50 –30 –10 10 30 50 70 80 90 110

0

400

800

I

OUT

1200

(mA)

1600

2000

TEMPERATURE (°C)

4067 G18

4067 G17

4067f

6

LTC4067

U W

TYPICAL PERFOR A CE CHARACTERISTICS

Ideal Diode Forward Voltage and

Resistance vs Current

Ideal Diode and Schottky Diode

Forward Voltage vs Current

V

_PROGvs I_BAT

500

400

300

200

100

0

500

400

300

200

100

0

2000

1800

1600

1400

1200

1000

800

1200

1000

800

600

400

200

0

V

= 3.6V

V

I

= 5V

IN

V

R

AT T = 130°C

BAT

FWD

A

= 0mA

AT T = 50°C

OUT

A

AT T = –50°C

A

AT T = 130°C

A

R

= 4k

PROG

AT T = 50°C

A

LTC4067

AT T = –50°C

A

R

= 2k

PROG

600

400

V

= 5V

BAT

SUSP

IN

1N5817

200

= 3.6V

0

50

150

250

350

450

400 500

0

400

800

1200

(mA)

1600

2000

0

50 100 150 200 250 300 350 400 450

(mV)

0

100

200

300

I

V

I

(mA)

BAT

OUT

FWD

4067 G19

4067 G13

4067 G21

V_CLPROGvs I_IN

I_INor I_BATand I_OUTHPWR Mode

1200

1000

800

600

400

200

0

600

V

= 3.8V

BAT

500

400

I

IN

R

= 4k

CLPROG

300

I

CHARGING

BAT

200

R

= 2k

CLPROG

100

0

–100

–200

–300

–400

–500

V

R

= 3.8V

BAT

= 2k

CLPROG

= 2k

I

IDEAL DIODE

HPWR

100 200 300 400 500 600 700 800 900

1000

PROG

BAT

0

100

200

300

400

500

600

0

I

IN

(mA)

I

(mA)

OUT

4067 G22

4067 G23

4067f

7

LTC4067

U W

TYPICAL PERFOR A CE CHARACTERISTICS

CHRG Pin Serrated Pulse for

NTC Faults

(V_IN– V_OUT) vs I_OUT

400

350

300

250

200

150

100

50

V

= NTC = 4.4V

IN

CLPROG = 2k

I

= 4.4V

LIM0

LIM1

2V/DIV

4067 G31

20μs/DIV

0

100

200

300

(mA)

400

500

600

I

OUT

4067 G28

CHRG Pin Serrated Pulse for

BAD BAT Faults

CHRG V_OLvs I_CHRG

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

2V/DIV

4067 G32

20μs/DIV

1

2

3

4

5

6

7

8

9

0

10

I

(mA)

CHRG

4067 G33

4067f

8

LTC4067

U

PI FU CTIO S

CLPROG (Pin 1): Current Limit Program Pin. Connect-

current during the constant-current portion of the charge

cycle according to the following formula:

ing a 1% resistor, R , to ground programs input

CLPROG

current limit depending on the selected operating mode.

Operating mode and input current limit are programmed

I

(A) = 1000V/R

PROG

CC-CHG

If the PROG pin is pulled above the V threshold or left

depending on the I

and I

pin voltages according

SD

LIM0

LIM1

ﬂoating, the LTC4067 enters low power SHUTDOWN

mode to conserve power, in this way an open-drain driver

in series with the PROG resistor serves as an ENABLE

control. Grounding this pin disables charge current limit

and turns off CHRG status signal.

to the following table:

Table 1. I_LIMProgramming

I

(A)

MODE

SUSPEND

Low Power

High Power

CLDIS

LIM0

LIM1

LIMIT

L

H

0

L

H

L

H

L

200V/R

CLPROG

GATE (Pin 9): External Ideal Diode Gate Connection. This

pin controls the gate of an optional external P-channel

MOSFET transistor used to supplement the internal ideal

diode. The source of the P-channel MOSFET should be

connected to OUT and the drain should be connected to

BAT. It is important to maintain high impedance on this

pin and minimize all leakage paths.

1000V/R

2

CLPROG

ThemaximumCLPROGresistancevalueshouldbenomore

than 5k. Ground to disable the current limit function.

CHRG (Pin 2): Open Drain Charge/Fault Status Output.

When the battery is being charged, the CHRG pin is pulled

lowbyaninternalN-channelMOSFET.Whenthetimerruns

out or the charge current drops below a programmable

level or the supply is removed, the CHRG pin is forced

into a high impedance state. Float or tie to ground when

not in use.

BAT (Pin 10): Single-Cell Li-Ion Battery. Depending on

availablepowerandload,aLi-IonbatteryonBATwilleither

deliver system power to OUT through the ideal diode or

be charged from the battery charger.

OUT(Pin11):OutputVoltageofthePowerPath™Controller

and Input Voltage of the Battery Charger. The majority of

the portable product should be powered from OUT. The

LTC4067 will partition the available power between the

external load on OUT and the internal battery charger.

Priority is given to the external load and any extra power is

usedtochargethebattery. AnidealdiodefromBATtoOUT

ensures that OUT is powered even if the load exceeds the

allotted input current from IN or if the IN power source is

removed. OUT should be bypassed with a low impedance

multilayer ceramic capacitor of at least 10μF.

NTC(Pin3):Thermistorsenseinputtothethermistormoni-

toring circuits. Under normal operation, tie a thermistor

from the NTC pin to ground and a resistor of equal value

from the NTC pin to IN. Connect the NTC pin to ground

to disable this feature.

I

(Pin 4): Current Limit Control Input. Float or connect

LIM0

to ground when not in use (see Table 1).

I

(Pin 5): Current Limit Control Input. Float or connect

LIM1

to ground when not in use (see Table 1).

OVI (Pin 6): Overvoltage Protection Sense Input. Connect

to ground when not in use. Bypass to OVP with a 10nF

capacitor.

IN(Pin12):USBInputVoltage.INwillusuallybeconnected

to the USB port of a computer or a DC output wall adapter.

IN should be bypassed with a low impedance multilayer

ceramic capacitor of at least 1μF.

OVP (Pin 7): Overvoltage Protection Output. Drive output

for an external high-voltage protection PFET. Float when

not in use.

Exposed Pad (Pin 13): Ground. The exposed pad is

ground and must be soldered to the PC board for proper

functionality and for maximum heat transfer.

PROG (Pin 8): Charge Current Program Pin. Connecting

a 1% resistor, R

, to ground programs the charge

PROG

PowerPath is a trademark of Linear Technology Corporation.

4067f

9

LTC4067

W

BLOCK DIAGRA

IN

OUT

CURRENT

LIMIT

SD

OVP

I

/1000

OUT

PROGRAMMABLE

CURRENT LIMIT

CLPROG

R

CLPROG

CLDIS

I

LIM0

LIM1

HPWR

LPWR

SUSP

DECODE

LOGIC

–

+

25mV

1V

0.2V

0V

MUX

V

SERVO

SD

COLD FAULT

HOT FAULT

OVI

+

–

CC/CV

CHARGER

IDEAL

6V

GATE

BAT

IN

BAT

OUT

OVP

V

CC

V

MAX

0.74V

–

+

IN

COLD FAULT

HOT FAULT

NTC OFF

NTC

–

+

I

/1000

BAT

0.29V

0.1V

IN

COLD FAULT

HOT FAULT

CHRG

–

+

–

+

SD

FLOAT

100mV

SDB

CHARGE STATUS/

FAULT FLAG

4067 BD

GND

PROG

R

PROG

Figure 1. Simpliﬁed Block Diagram

4067f

10

LTC4067

U

OPERATIO

Introduction

If the combined load does not exceed the programmed

input current limit, OUT will be connected to IN through

an internal 200mΩ P-channel MOSFET.

The LTC4067 is a complete PowerPath controller for bat-

tery powered USB applications. The LTC4067 is designed

to receive power from a USB source (or a wall adapter)

or a battery. It can then deliver power to an application

connected to the OUT pin and a battery connected to the

BAT pin (assuming that an external supply other than the

battery is present). Power supplies that have limited cur-

IfthecombinedloadatOUTexceedstheprogrammedinput

current limit, the battery charger will reduce its charge

current by the amount necessary to enable the external

load to be satisﬁed while maintaining the programmed

input current. Even if the battery charge current is set to

exceed the allowable USB current, the USB speciﬁcation

will not be violated. The input current limit will ensure that

the USB speciﬁcation is never violated. Furthermore, load

current at OUT will always be prioritized and only excess

available current will be used to charge the battery.

rent resources (such as USB V

supplies) should be

BUS

connectedtotheINpinwhichhasaprogrammablecurrent

limit. Batterychargecurrentwillbeadjustedtoensurethat

the sum of the charge current and the load current does

not exceed the programmed input current limit.

An internal ideal diode function provides power from the

battery when output/load current exceeds the input cur-

rent limit or when the input power is removed. Powering

the load through the ideal diode instead of connecting the

load directly to the battery allows a fully charged battery

to remain fully charged until external power is removed.

Once external power is removed the output drops until

the ideal diode is forward biased. The forward biased

ideal diode will then provide the output power to the load

from the battery.

The current out of the CLPROG pin is a fraction (1/1000th)

of the IN current. When a programming resistor is con-

nected from CLPROG to GND, the voltage on CLPROG

represents the input current:

V_CLPROG

R_CLPROG

I =

•1000

IN

The input current limit is programmed by the I

LIM1

and

LIM0

I

pins (see Table 1 in PIN FUNCTIONS). The LTC4067

can be conﬁgured to limit input current to one of several

possiblesettingsaswellasbedeactivated(USBsuspend).

The input current limit will be set by the appropriate servo

voltage and the resistor on CLPROG according to the fol-

lowing expressions:

Furthermore,poweringswitchingregulatorloadsfromthe

OUT pin (rather than directly from the battery) results in

shorter battery charge times. This is due to the fact that

switchingregulatorstypicallyrequireconstantinputpower.

WhenthispowerisdrawnfromtheOUTpinvoltage(rather

than the lower BAT pin voltage) the current consumed

by the switching regulator is lower leaving more current

available to charge the battery.

I

(A) = 0 (SUSPEND)

LIM

200V

R_CLPROG

I_LIM

=

(Low Power)

Finally,theLTC4067providesovervoltagecontrollercircuitry

which,whenusedinconjunctionwithanexternalP-channel

MOSFET, will protect against overvoltage damage if a wall

adapter with greater than 6V output is used. The circuit will

tolerate input voltages up to 13V without damage.

1000V

R_CLPROG

I_LIM

=

(High Power)

I

(A) = 2A (CLDIS)

LIM

Under worst-case conditions, the USB speciﬁcation will

not be violated with an R of greater than 2.1k.

USB PowerPath Controller

CLPROG

The input current limit and charge control circuits of the

LTC4067 are designed to limit input current as well as

Current Limit Disable (CLDIS)

When I is low and I

control battery charge current as a function of I . OUT

OUT

is high, the input current limit

LIM0

LIM1

drives the combination of the external load and the bat-

tery charger.

is set to a higher current limit for increased charging and

4067f

11

LTC4067

U

OPERATIO

current availability at OUT. This mode is typically used

keepstheinputcurrentlimitcircuitryoffuntilINrisesabove

the rising UVLO threshold (3.8V) and at least 50mV above

OUT. Hysteresis on the UVLO turns off the input current

limit if IN drops below 3.675V or 50mV below OUT. When

this happens, system power at OUT will be drawn from the

battery via the ideal diode. To minimize the possibility of

oscillation in and out of UVLO when using resistive input

supplies, the input current limit is reduced when IN falls

to within a few hundred millivolts of the UVLO threshold.

To ensure that the full input current limit is available and

a complete battery charge cycle can be achieved, apply

at least 4.25V to IN.

when there is power available from a wall adapter.

Suspend Mode

When I

is high and I

is low, the LTC4067 enters

LIM1

LIM0

suspend mode to comply with the USB speciﬁcation. In

this mode, the power path between IN and OUT is put in

a high impedance state to reduce the IN input current to

50μA. If no other power source is available to drive OUT,

the system load connected to OUT is supplied through

the ideal diode connected to BAT.

Ideal Diode From BAT to OUT

Battery Charger

The LTC4067 has an internal ideal diode as well as a

controller for an optional external ideal diode. Both the

internal and external ideal diodes will respond quickly

whenever OUT drops below BAT.

The LTC4067 includes a constant-current/constant-volt-

age battery charger with automatic recharge, automatic

termination by safety timer, low voltage trickle charging,

bad cell detection and thermistor sensor input for out of

temperature charge pausing.

If the load increases beyond the input current limit, ad-

ditional current will be pulled from the battery via the ideal

diodes.Furthermore,ifpowertoIN(USB)isremoved,then

alloftheapplication’spowerwillbeprovidedbythebattery

via the ideal diodes. The ideal diodes are fast enough to

keepOUTfromdroppingwithjusttherecommendedoutput

capacitor. The ideal diode consists of a precision ampliﬁer

that enables an on-chip P-channel MOSFET whenever the

When a battery charge cycle begins, the battery charger

ﬁrst determines if the battery is deeply discharged. If

the battery voltage is below 2.8V, an automatic trickle

charge feature sets the battery charge current to 10%

of the programmed value. If the low voltage persists for

more than 1/2 hour, the battery charger automatically

terminates and indicates via the CHRG pin that the battery

was unresponsive.

voltage at OUT is approximately 30mV (V

) below the

FWD

voltage at BAT. The resistance of the internal ideal diode is

approximately 200mΩ. If this is sufﬁcient for the applica-

tion,thennoexternalcomponentsarenecessary.However,

if more conductance is needed, an external P-channel

MOSFET can be added from BAT to OUT.

Once the battery voltage is above 2.8V, the battery charger

begins charging in full power constant-current mode. The

current delivered to the battery will try to reach 1000V/

R

PROG

. Depending on available input power and external

load conditions, the battery charger may or may not be

able to charge at the full programmed rate. The external

load will always be prioritized over the battery charge cur-

rent. The USB current limit programming will always be

observed and only additional current will be available to

charge the battery. When system loads are light, battery

charge current will be maximized.

TheGATEpinoftheLTC4067drivesthegateoftheexternal

P-channel MOSFET for automatic ideal diode control. The

source of the MOSFET should be connected to OUT and

the drain should be connected to BAT. Capable of driving

a 1nF load, the GATE pin can control an external P-channel

MOSFET having extremely low on-resistance.

If the BAT voltage is below the V

diodes are disabled.

threshold the ideal

BUVLO

Charge Termination

The battery charger has a built-in safety timer. When the

battery voltage approaches the 4.2V required to maintain

a full charge, otherwise known as the ﬂoat voltage, the

4067f

IN Undervoltage Lockout (UVLO)

An internal undervoltage lockout circuit monitors IN and

12

LTC4067

U

OPERATIO

charge current begins to decrease as the LTC4067 enters

constant-voltage mode. Once the battery charger detects

that it has entered constant-voltage mode, the two hour

safety timer is started. After the safety timer expires,

charging of the battery will discontinue and no more cur-

rent will be delivered.

In many cases, the actual battery charge current, I , will

BAT

belowerthanI

duetolimitedinputcurrentavailable

CC-CHG

and prioritization with the system load drawn from OUT.

Thermal Regulation

To prevent thermal damage to the IC or surrounding

components, an internal thermal feedback loop will

automatically decrease the programmed charge current

if the die temperature rises to approximately 105°C.

Thermal regulation protects the LTC4067 from excessive

temperature due to high power operation or high ambient

thermal conditions and allows the user to push the limits

of the power handling capability with a given circuit board

design without risk of damaging the LTC4067 or external

components. The beneﬁt of the LTC4067 thermal regula-

tion loop is that charge current can be set according to

actual conditions rather than worst-case conditions with

the assurance that the battery charger will automatically

reduce the current in worst-case conditions.

Automatic Recharge

After the battery charger terminates, it will remain off

drawing only microamperes of current from the battery.

If the portable product remains in this state long enough,

thebatterywilleventuallyselfdischarge.Toensurethatthe

battery is always topped off, a charge cycle will automati-

cally begin when the battery voltage falls below V

RECHRG

(typically 4.1V). In the event that the safety timer is run-

ning when the battery voltage falls below V , the

RECHRG

timer will reset back to zero. To prevent brief excursions

below V from resetting the safety timer, the battery

RECHRG

voltage must be below V

for more than 1.3ms. The

RECHRG

charge cycle and safety timer will also restart if the IN

UVLO cycles low and then high (e.g. IN is removed and

then replaced).

Low Power Shutdown

The LTC4067 enters a low power shutdown mode if the

PROG pin is pulled above the shutdown threshold, V . In

shutdown, the BAT pin current is reduced to 5μA, the IN

pin current is reduced to 10μA, the internal battery charge

timerandend-of-chargecomparatoroutputarebothreset.

All power paths are put in a high impedance state.

SD

Charge Current

The charge current is programmed using a single resistor

from PROG to ground. 1/1000th of the battery charge cur-

rent is delivered to PROG which will attempt to servo to

1.000V. Thus, the battery charge current will try to reach

1000 times the current in the PROG pin. The program

resistor and the charge current are calculated using the

following equations:

Aweak(2.5μA)pullupatthePROGpincausestheLTC4067

toenterlowpowershutdownifthePROGpinisﬂoated. An

external N-channel MOSFET transistor with its drain tied

in series with the PROG pin, or an open drain driver may

thereby serve as an enable input for the LTC4067.

1000V

I_CC−CHG

1000V

R_PROG

=

,I_CC−CHG=

NTC

Ineithertheconstant-currentorconstant-voltagecharging

modes, the PROG pin voltage will be proportional to the

actual charge current delivered to the battery. Therefore,

the actual charge current can be determined at any time

by monitoring the PROG pin voltage and using the fol-

lowing equation:

Under normal operation, tie a thermistor from the NTC

pin to GND and a resistor of equal value from NTC to IN.

When the voltage on this pin is above 0.74 • V (cold,

IN

0°C) or below 0.29 • V (hot, 50°C) the charge timer is

IN

suspended, but not cleared, the charging is disabled and

the CHRG pin ﬂashes from Hi-Z to active pull-down with

a serrated pulse. When the voltage on NTC comes back

V_PROG

I_BAT

=

•1000

to between 0.29 • V and 0.74 • V , the charger timer

IN

R_PROG

continues from where it left off, the charging is re-enabled

4067f

13

LTC4067

U

OPERATIO

if the battery is below the recharge threshold. There is

approximately 3°C of temperature hysteresis associated

with each of the input comparators. If the NTC pin is tied

to GND, thermistor qualiﬁed charging is disabled.

current pulses are designed to cause an LED connected

from the CHRG pin to a positive supply voltage to visibly

ﬂash, indicating to the user that there is a problem, as well

as allowing a microcontroller to detect a fault condition

within 300μs.

Fault Conditions

Overvoltage Protection

The CHRG pin provides information as to the charging

status, indicating an active charge cycle with a strong

open-drain pull down at the CHRG pin. NTC faults and

bad battery faults are indicated with serrated pulses; this

is described in more detail under the heading Fault Condi-

tions in the Applications Information section.

The OVI input is provided to sense potentially hazardous

voltages at the input in case an unregulated wall adapter

is applied. If an overvoltage condition is detected the OVP

pin is driven high to turn off an external PMOS transistor

inserted in series with the IN pin to disconnect the high

voltage from the LTC4067.

When the battery is being charged, the CHRG pin is pulled

low by an internal N-channel MOSFET. When the charge

cycleentersvoltagemodechargingandthechargecurrent

Table 2 lists recommended P-channel MOSFETs to use

with the LTC4067.

is reduced below I

/10, the CHRG indicates that the

CC-CHG

Table 2. Recommended OVP Transistors

charge cycle is nearly complete by switching to a Hi-Z

state. Also when the battery voltage exceeds the OUT

voltage and the input supply is removed, or the LTC4067

is put into suspend or shutdown modes, the CHRG pin

is forced into a high impedance state. If a bad battery

is detected, or if an NTC temperature fault is detected,

charging is halted and the CHRG pin switches to a series

of serrated open-drain pull down pulses. These serrated

PART NUMBER

IRLML6402

FDR8508P

DESCRIPTION

P-channel 16V

Dual P-channel 16V

If the OVP pin is high, the power path from IN to OUT is

disabled.

4067f

14

LTC4067

U

W U U

APPLICATIO S I FOR ATIO

Battery Charger Stability Considerations

LTC4067

PROG

AVERAGE

BATTERY

CURRENT

20k

The LTC4067 battery charger contains two control loops:

constant voltage and constant current. The constant-volt-

ageloopisstablewithoutanycompensationwhenabattery

is connected with low impedance leads. Excessive battery

lead length, however, may add enough series inductance

to require a bypass capacitor of at least 1μF from BAT to

ground. Furthermore, a 4.7μF capacitor with a 0.2Ω to 1Ω

series resistor is required from BAT to ground to keep the

ripple voltage low when the battery is disconnected.

R

C

FILTER

PROG

4067 F02

Figure 2. Isolating Capacitive Load on PROG Pin and Filtering.

NTC Thermistor Input Pin

An NTC input provides the option of charge qualiﬁcation

using battery temperature and an external thermistor

thermally coupled to the battery. When the thermistor

senses an over or under temperature condition, charg-

ing is suspended until the temperature returns to a safe

operating range. The CHRG pin ﬂashes while this out of

temperatureconditionpersists.IftheNTCpinisgrounded,

NTC charge qualiﬁcation is disabled. For more informa-

tion on the CHRG pin during fault conditions see the Fault

Conditions heading.

In constant-current mode the PROG pin is in the feedback

loop, not the BAT pin. Because of the additional pole cre-

ated by PROG pin capacitance, additional capacitance on

this pin must be kept to a minimum. With no additional

capacitance on the PROG pin, the charger is stable with

program resistor values as high as 6k. However additional

capacitance on this node reduces the maximum allowed

program resistor. The pole frequency at the PROG pin

should be kept above 500kHz. Therefore, if the PROG pin

The battery temperature is measured by placing a nega-

tive temperature coefﬁcient (NTC) thermistor in thermal

contact with the battery. The thermal regulation feature

is loaded with a capacitance, C

tion should be used to calculate the maximum resistance

value for R

, the following equa-

PROG

of the LTC4067, requires a thermistor, R , between the

:

NTC

PROG

NTC pin and GND as well as a second resistor, R

, from

5

NOM

R

≤ 1/(2π • 5 • 10 C

)

PROG

the NTC pin to IN. The recommended R

resistor has a

NOM

Average,ratherthaninstantaneous,batterycurrentmaybe

of interest to the user. For example, if a switching power

supply operating in low current mode is connected in

parallel with the battery, the average current being pulled

out of the BAT pin is typically of more interest than the

instantaneous current pulses. In such a case, a simple

RC ﬁlter at the PROG pin measures the average BAT pin

current, as shown in the ﬁgure below. A 20k resistor has

been added between the PROG pin and the ﬁlter capacitor

to ensure stability. This technique may also be used on

the CLPROG pin.

value equal to the value of the chosen NTC thermistor at

25°C. (For a Vishay NTHS0603N02N1002 thermistor this

value is 10k.) The LTC4067 charger goes into hold mode

when the resistance, R , of the NTC thermistor drops

HOT

to 0.41 times the value of R

or approximately 4.1k,

NOM

which is at 50°C. Hold mode freezes the timer and stops

the charge cycle until the thermistor indicates a return to

a valid temperature range. As the temperature drops, the

resistance of the NTC thermistor rises. The LTC4067 is

also designed to go into hold mode when the value of the

4067f

15

LTC4067

U

W U U

APPLICATIO S I FOR ATIO

NTC thermistor, R

, increases to 2.82 times the value

Table 3 illustrates the four possible states of the CHRG

pin when the battery charger is active.

Table 3. CHRG Output Pin

COLD

or R . (For a Vishay NTHS0603N02N1002 thermistor

NOM

this value is 28.2k which corresponds to a temperature of

approximately 0°C). The hot and cold comparators each

haveapproximately3°Cofhysteresistopreventoscillation

about the trip points.

MODULATION

(BLINK)

STATUS

FREQUENCY

0Hz

FREQUENCY

DUTY CYCLE

100%

Charging

0Hz (Lo-Z)

Fault Conditions

I

< I

/10

CC-CHG

0Hz

0Hz (Hi-Z)

0%

BAT

NTC Fault

Bad Battery

35kHz

1.5Hz at 50%

6.1Hz at 50%

4.7% to 95.3%

9.4% to 90.6%

The CHRG pin is used to signal two distinct fault condi-

tions: NTC faults and bad battery faults. Both of these

conditions are signaled at the CHRG pin with a series of

serrated open-drain pull-down pulses that are intended

to produce a visible “blinking” at an LED tied to this pin

as well as to produce a pulse train that is detectable to a

microprocessor input connected to this pin. The serrated

pulses are described with the aid of Figure 3, assuming

that the CHRG pin is connected to a positive rail with a

resistive pull-up. When an NTC fault condition is detected

during a normal charge cycle, the CHRG pin immediately

goes from a strong open-drain pull down to a high-im-

pedance state that pulses on for 1.4μs and then off at a

35kHz rate. This signal is further modulated by a 1.5Hz

blink frequency that reverses from pulsing high-to-low to

pulsing low-to-high.

A bad battery fault has a 2.8μs pulse at the same rate that

is modulated by a 6Hz blink frequency. As the CHRG pin

immediatelychangesstateuponenteringafailuremode, a

microprocessorobservingthispindetectsthefaultcondi-

tion within 29μs of the failure occurring, by measuring the

pulse width. Furthermore the blink frequency is visually

detected by hooking this signal up to an LED.

When connecting a microprocessor with a positive logic

suppy that is different than the LED anode, a diode must

be inserted in series with the microcontroller input so as

to aviod the condition where the LED may inadvertantly

power up the microcontroller. A circuit that allows visual

fault and/or charge status as well as providing a safe

microcontroller interface is shown in Figure 4.

PW = 27.7μs (NTC FAULT)

26.3μs (BAD BAT)

T

S

V (CHRG)

VLOGIC

OUT

TO MICRO

LTC4067

PW = 1.3μs OR

2.7μs

T

S

= 667ms/2 (NTC FAULT)

167ms/2 (BAD BAT)

CHRG

NORMAL

CHARGING

FAULT

CONDITION

4067 F04

4067 F03

Figure 4. CHRG Pin Connection to Drive a Microcontroller at the

Same Time as Providing a Visual Fault and/or Charge Status

Figure 3

4067f

16

LTC4067

U

TYPICAL APPLICATIO S

Li-Ion Charger from 5V Wall Adapter with Overvoltage

Protection

voltage for this pin. This may occur in the event that the

wall input suddenly steps from 5.5V to a higher voltage.

In this case, a zener diode is also recommended to keep

the IN pin voltage to a safe level.

Figure 5 illustrates an application where the LTC4067 is

used to charge a single-cell Li-Ion battery from a wall

adapter with built-in overvoltage protection.

In the example of Figure 5, the input current limit from

the wall adapter is programmed to 1A with a 1k resistor

Overvoltage protection is achieved with the OVI and OVP

pins of the LTC4067 along with an external PFET in se-

ries with the IN pin. This PFET disconnects the LTC4067

from potentially damaging overvoltage conditions that

are caused by attaching the wrong wall adapter. When

from CLPROG to GND (assuming I

and I

are held

LIM0

LIM1

high). And the charge current is programmed to 500mA

via the 2k resistor from the PROG pin to GND.

An optional second external PFET connected between

OUT and BAT serves as a high-performance ideal diode;

to connect the load to the battery with an extremely low

impedance. This ideal diode is controlled by the GATE

output pin whenever the wall adapter is not present or

the load demands more current than is available from

the wall adapter input (Connect the source of the PFET to

OUT and the drain to BAT).

the OVI input senses a voltage greater than V

, the

OVTH

OVP output is pulled up to disable the PFET. When OVI is

belowthisthreshold, theOVPoutputispulledlow, turning

on this PFET. In the event that large in-rush currents are

expected, it is recommended that a decoupling capacitor

be placed from OVI to GND. The body diode of this PFET

must be connected so that it is reverse biased when an

overvoltage condition exists.

Instantaneous monitoring of both input current and

charge current is achieved by measuring the voltages at

the CLPROG and PROG pins respectively.

A10nFcapacitorisrecommendedtodynamicallypull-upon

the gate of Q1 if a fast edge occurs at the wall input during

a hot-plug. In the event that this capacitor is pre-charged

below the OVI rising threshold when a high voltage spike

occurs, the OVP output cannot guarantee turning off Q1

before the IN pin voltage exceeds the absolute maximum

Low-power shutdown is engaged by any of the following.

Disabling an external NFET tied in series with the PROG

pin resistor, by ﬂoating the PROG pin with a single-pole

switch, by tying R

to an open-drain output, by pulling

PROG

LOAD

OVI

OUT

10nF

10μF

SOURCE

Q2

OVP

CHRG

GATE

Q1

WALL

ADAPTER

IN

OPTIONAL

DRAIN

LTC4067

D1

OPTIONAL

1μF

10μF

NTC

BAT

1-CELL

Li-Ion

CHARGE CURRENT

MONITOR

PROG

R

PROG

I

LIM0

2k

IN

LIM1

INPUT

CURRENT

MONITOR

CLPROG

GND

Q3

ENABLE

R

CLPROG

1k

4067 F05

Q1, Q2: IFR7404

Figure 5. Li-Ion Charger/Controller with Overvoltage Protection

4067f

17

LTC4067

U

TYPICAL APPLICATIO S

the PROG pin to the most positive supply rail (IN, BAT or

OUT)(not shown). In low-power shutdown total current

consumption of the LTC4067 is less than 20μA.

of 4.2V. Note that actual charge current depends on the

load current, as the charger shares the USB current with

the load. During a charge cycle the CHRG pin signals that

the battery is charging in constant-current mode by pull-

ing to GND through an open-drain drive output capable

of driving an LED for visual indication of charge status.

When the charge current drops to less than 10% of the

programmed charge current, and the battery is above the

recharge threshold (4.1V), the CHRG pin assumes a high

impedance state (but top-off charge current continues to

ﬂow until the internal charge timer elapses). Bad battery

andbatteryout-of-temperatureconditionsarealsoﬂagged

with the CHRG pin as described in the Fault Conditions

section.

Figure 6 illustrates an application for charging single-cell

Li-Ion batteries directly from a USB bus conforming to

theUSBrequirementsforlow-power(LPWR),high-power

(HPWR), or self-powered functions. Here, the LTC4067

ensures that the load at OUT sees the USB potential when

the USB port is applied. When the USB port is removed

the load is powered from the battery through an internal

200mΩ ideal diode. Optionally an external PFET driven by

the GATE pin is used to improve performance by reducing

the series resistance.

The 2k resistor at the CLPROG pin ensures that the maxi-

mum current drawn from the USB input port is kept below

the maximum allowed depending on the permitted power

allocation. 500mA for HPWR USB function or 100mA for

LPWRUSBfunction.TheLTC4067isconﬁguredtocomply

If the load demands more current than allowed by the USB

current limit, the charge current is automatically scaled

back. Up to the point where an ideal diode function from

BATtoOUTturnsononcetheOUTvoltagedropsbelowthe

BAT voltage. When the ideal diode is engaged, the battery

charge cycle is paused and the load at OUT draws current

both from the USB port as well as from the battery.

with the USB SUSPEND speciﬁcation by driving the I

LIM0

pin low and the I

pin high, whereby the load at OUT is

LIM1

powered from the battery and the only current drawn from

the USB port is due to the two series NTC pin resistors.

At any time, the user may monitor both instantaneous

charge current and instantaneous USB current by observ-

ing the PROG pin and CLPROG pin voltages respectively.

Whenprobingthesenodeswithacapacitivesensor,aseries

resistanceisrecommendedtoensurethatbulkcapacitance

from these two nodes to GND does not exceed 50pF.

The 2k resistor at the PROG pin selects 500mA for the

charge current to automatically charge a single-cell Li-Ion

battery following a constant-current/constant-voltage

(CC/CV) algorithm with a built-in timer that halts charg-

ing after the battery achieves the maximum ﬂoat voltage

SOURCE

CHRG

IN

USB INPUT

OPTIONAL

TO LOAD

OUT

10μF

NTC

GATE

LTC4067

DRAIN

BAT

1-CELL

Li-Ion

I

LIM0

LIM1

IN

PROG

GND

R

CLPROG

PROG

R

2k

CLPROG

2k

4067 F06

Figure 6. USB Battery Charger

4067f

18

LTC4067

U

PACKAGE DESCRIPTIO

DE/UE Package

12-Lead Plastic DFN (4mm × 3mm)

(Reference LTC DWG # 05-08-1695 Rev C)

0.70 0.05

3.60 0.05

2.20 0.05 (2 SIDES)

1.70 0.05

PACKAGE OUTLINE

0.25 0.05

0.50

BSC

3.30 0.05

(2 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

0.40 0.10

4.00 0.10

(2 SIDES)

R = 0.115

TYP

7

12

R = 0.05

TYP

3.00 0.10 1.70 0.05

(2 SIDES)

PIN 1

TOP MARK

(NOTE 6)

PIN 1 NOTCH

R = 0.20 OR

0.35 × 45°

CHAMFER

(UE12/DE12) DFN 0905 REV C

6

0.25 0.05

1

0.75 0.05

0.200 REF

0.50

BSC

3.30 0.05

(2 SIDES)

0.00 – 0.05

BOTTOM VIEW—EXPOSED PAD

NOTE:

1. DRAWING PROPOSED TO BE A VARIATION OF VERSION

(WGED) IN JEDEC PACKAGE OUTLINE M0-229

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON THE TOP AND BOTTOM OF PACKAGE

4067f

InformationfurnishedbyLinearTechnologyCorporationisbelievedtobeaccurateandreliable.However,

no responsibility is assumed for its use. Linear Technology Corporation makes no representation that

the interconnection of its circuits as described herein will not infringe on existing patent rights.

19

LTC4067

U

TYPICAL APPLICATIO

Li-Ion Charger/Controller with Overvoltage Protection

LOAD

10μF

OVI

OUT

10nF

SOURCE

Q2

OVP

CHRG

GATE

Q1

WALL

ADAPTER

IN

OPTIONAL

DRAIN

LTC4067

D1

OPTIONAL

1μF

10μF

NTC

BAT

1-CELL

Li-Ion

CHARGE CURRENT

MONITOR

PROG

R

PROG

I

LIM0

2k

IN

LIM1

INPUT

CURRENT

MONITOR

CLPROG

GND

Q3

ENABLE

R

CLPROG

1k

4067 TA02

Q1, Q2: IFR7404

RELATED PARTS

PART NUMBER

Battery Chargers

LTC4054

DESCRIPTION

COMMENTS

Standalone Linear Li-Ion Battery

Charger with Integrated Pass Transistor Charge Current

in ThinSOT™

Thermal Regulation Prevents Overheating, C/10 Termination, C/10 Indicator, Up to 800mA

LTC4059

900mA Linear Lithium-Ion Battery

Charger

2mm × 2mm DFN Package, Thermal Regulation, Charge Current Monitor Output

LTC4065/LTC4065A Standalone Li-Ion Battery Chargers

4.2V, 0.6% Float Voltage, Up to 750mA Charge Current, 2mm × 2mm DFN,

“A” Version has ACPR Function.

in 2 × 2 DFN

LTC4411/LTC4412 Low Loss PowerPath Controller in

ThinSOT

Automatic Switching Between DC Sources, Load Sharing, Replaces ORing Diode

LTC4412HV

High Voltage Power Path Controllers in

ThinSOT

V = 3V to 36V, More Efﬁcient than Diode ORing, Automatic Switching Between DC

IN

Sources, Simpliﬁed Load Sharing, ThinSOT Package.

Power Management

LTC3455

Dual DC/DC Converter with USB Power Seamless Transition Between Power Sources: USB, Wall Adapter and Battery; 95%

Manager and Li-Ion Battery Charger

Efﬁcient DC/DC Conversion

LTC4055

LTC4066

LTC4085

USB Power Controller and Battery

Charger

Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal Regulation,

200mΩ Ideal Diode, 4mm × 4mm QFN16 Package

USB Power Controller and Li-Ion Battery Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal Regulation, 50mΩ

Charger with Low-Loss Ideal Diode

Ideal Diode, 4mm × 4mm QFN24 Package

USB Power Manager with Ideal Diode

Controller and Li-Ion Charger

Charges Single Cell Li-Ion Batteries Directly from a USB Port, Thermal Regulation,

200mΩ Ideal Diode with <50mΩ Option, 4mm × 3mm DFN14 Package

LTC4089/

LTC4089-5

USB Power Manager with Ideal Diode

Controller and High Efﬁciency Li-Ion

Battery Charger

High Efﬁciency 1.2A Charger from 6V to 36V (40V Max) Input Charges Single-Cell Li-Ion

Batteries Directly from a USB Port, Thermal Regulation, 200mΩ Ideal Diode with <50mΩ

option, Bat-Track Adaptive Output Control (LTC4089), Fixed 5V Output (LTC4089-5), 4mm

× 3mm DFN-14 Package

ThinSOT is a trademark of Linear Technology Corporation.

4067f

LT 0407 • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

20

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC4067EDE
厂家：	Linear
描述：	USB Power Manager with OVP and Li-Ion/Polymer Charger 与OVP和锂离子/锂聚合物充电器的USB电源管理器
文件：	总20页 (文件大小：214K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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