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LTC4211CS8 [Linear]

Hot Swap Controller with Multifunction Current Control; 热插拔控制器多功能电流控制
LTC4211CS8
型号： LTC4211CS8
厂家： Linear    Linear
描述：

Hot Swap Controller with Multifunction Current Control
热插拔控制器多功能电流控制

电源电路 电源管理电路 光电二极管 控制器
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中文：  中文翻译
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LTC4211  
Hot Swap Controller with  
Multifunction Current Control  
U
FEATURES  
DESCRIPTIO  
■
Allows Safe Board Insertion and Removal  
The LTC®4211 is a Hot SwapTM controller that allows a  
board to be safely inserted and removed from a live  
backplane.Aninternalhighsideswitchdrivercontrolsthe  
gateofanexternalN-channelMOSFETforsupplyvoltages  
ranging from 2.5V to 16.5V. The LTC4211 provides soft-  
startandinrushcurrentlimitingduringthestart-upperiod  
which has a programmable duration.  
from a Live Backplane  
■
Controls Supply Voltages from 2.5V to 16.5V  
■
Programmable Soft-Start with Inrush Current  
Limiting, No External Gate Capacitor Required  
■
Faster Turn-Off Time Because No External Gate  
Capacitor is Required  
■
Dual Level Overcurrent Fault Protection  
Two on-chip current limit comparators provide dual level  
overcurrent circuit breaker protection. The slow com-  
parator trips at VCC – 50mV and activates in 20µs (or  
programmedbyanexternalfiltercapacitor, MSonly). The  
fast comparator trips at VCC – 150mV and typically  
responds in 300ns.  
■
Programmable Response Time for Overcurrent  
Protection (MS)  
■
Programmable Overvoltage Protection (MS)  
■
Automatic Retry or Latched Mode Operation (MS)  
■
High Side Drive for an External N-Channel FET  
■
User-Programmable Supply Voltage Power-Up Rate  
■
■
TheFBpinmonitorstheoutputsupplyvoltageandsignals  
the RESET output pin. The ON pin signal turns the chip on  
and off and can also be used for the reset function. The  
MS package has FAULT and FILTER pins to provide  
additional functions like fault indication, autoretry or  
latch-off modes, programmable current limit response  
time and programmable overvoltage protection using an  
external Zener diode clamp.  
FB Pin Monitors VOUT and Signals RESET  
Glitch Filter Protects Against Spurious RESET Signal  
U
APPLICATIO S  
■
Electronic Circuit Breaker  
■
Hot Board Insertion and Removal (Either On  
Backplane or On Removable Card)  
Industrial High Side Switch/Circuit Breaker  
, LTC and LT are registered trademarks of Linear Technology Corporation.  
Hot Swap is a trademark of Linear Technology Corporation.  
■
U
TYPICAL APPLICATIO  
Single Channel 5V Hot Swap Controller  
BACKPLANE PCB EDGE  
CONNECTOR CONNECTOR  
Power-Up Sequence  
(FEMALE)  
(MALE)  
R
M1  
SENSE  
0.007Ω  
V
5V  
5A  
Si4410DY  
OUT  
LONG  
V
NO C  
LOAD  
CC  
5V  
+
R
X
C
LOAD  
10Ω  
V
Z1*  
GATE  
5V/DIV  
C
X
100nF  
8
7
6
R5  
R3  
36k  
10k  
V
SENSE  
GATE  
FB  
CC  
5
1
V
RESET  
R1  
20k  
5V/DIV  
R4  
15k  
SHORT  
2
µP  
LTC4211  
ON  
LOGIC  
R2  
10k  
V
ON  
RESET  
RESET  
1V/DIV  
TIMER  
3
GND  
V
TIMER  
1V/DIV  
4
PCB CONNECTION SENSE  
LONG  
C
TIMER  
10nF  
2.5ms/DIV  
GND  
GND  
4211 TA01b  
4211 TA01A  
Z1 = 1SMA10A OR SMAJ10A  
* OPTIONAL  
4211f  
1
LTC4211  
ABSOLUTE AXI U RATI GS  
W W  
U W  
(Note 1)  
Supply Voltage (VCC) ............................................... 17V  
Input Voltage  
FB, ON .................................................. –0.3V to 17V  
SENSE, FILTER.......................... –0.3V to VCC + 0.3V  
TIMER .....................................................–0.3V to 2V  
Output Voltage  
Operating Temperature Range  
LTC4211C .............................................. 0°C to 70°C  
LTC4211I........................................... –40°C to 85°C  
Storage Temperature Range ................. –65°C to 150°C  
Lead Temperature (Soldering, 10 sec).................. 300°C  
GATE ............................... Internally Limited (Note 3)  
RESET, FAULT ...................................... –0.3V to 17V  
U W  
U
PACKAGE/ORDER I FOR ATIO  
TOP VIEW  
TOP VIEW  
TOP VIEW  
RESET  
ON  
1
2
3
4
8
7
6
5
V
CC  
RESET  
ON  
FILTER  
TIMER  
GND  
1
2
3
4
5
10 FAULT  
RESET  
ON  
TIMER  
GND  
1
2
3
4
8 V  
CC  
9
8
7
6
V
SENSE  
GATE  
FB  
CC  
7 SENSE  
6 GATE  
5 FB  
SENSE  
GATE  
FB  
TIMER  
GND  
MS8 PACKAGE  
8-LEAD PLASTIC MSOP  
MS PACKAGE  
10-LEAD PLASTIC MSOP  
S8 PACKAGE  
8-LEAD PLASTIC SO  
TJMAX = 125°C, θJA = 200°C/ W  
TJMAX = 125°C, θJA = 200°C/ W  
TJMAX = 125°C, θJA = 150°C/ W  
ORDER PART  
NUMBER  
S8 PART  
MARKING  
ORDER PART  
NUMBER  
MS8 PART  
MARKING  
ORDER PART  
NUMBER  
MS PART  
MARKING  
LTC4211CS8  
LTC4211IS8  
4211  
4211I  
LTC4211CMS8  
LTC4211IMS8  
LTSC  
LTSD  
LTC4211CMS  
LTC4211IMS  
LTSU  
LTSV  
Consult LTC Marketing for parts specified with wider operating temperature ranges.  
ELECTRICAL CHARACTERISTICS  
The ● denotes specifications which apply over the full operating  
temperature range, otherwise specifications are TA = 25°C. VCC = 5V, unless otherwise noted. (Note 2)  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
16.5  
1.5  
UNITS  
V
V
V
V
Supply Voltage Range  
Supply Current  
●
●
●
2.5  
CC  
CC  
CC  
I
FB = High, ON = High, TIMER = Low  
1
mA  
V
CC  
V
V
Internal V Undervoltage Lockout  
V
Low-to-High Transition  
2.13  
2.3  
120  
±1  
2.47  
LKO  
CC  
CC  
V
Undervoltage Lockout Hysteresis  
CC  
mV  
µA  
LKOHST  
INFB  
I
I
I
I
FB Input Current  
V
V
V
V
= V or GND  
±10  
±10  
±2.5  
±10  
170  
60  
FB  
CC  
ON Input Current  
= V or GND  
±1  
µA  
INON  
ON  
CC  
RESET, FAULT Leakage Current  
SENSE Input Current  
= V = 15V, Pull-Down Device Off  
FAULT  
●
±0.1  
±1  
µA  
LEAK  
RESET  
SENSE  
= V or GND  
µA  
INSENSE  
CC  
V
V
SENSE Trip Voltage (V – V  
)
)
Fast Comparator Trips  
Slow Comparator Trips  
●
●
●
●
130  
40  
150  
50  
mV  
mV  
µA  
CB(FAST)  
CB(SLOW)  
GATEUP  
CC  
SENSE  
SENSE Trip Voltage (V – V  
CC  
SENSE  
I
I
GATE Pull-Up Current  
Charge Pump On, V  
ON Low  
≤ 0.2V  
–12.5  
130  
–10  
200  
50  
–7.5  
270  
GATE  
Normal GATE Pull-Down Current  
Fast GATE Pull-Down Current  
µA  
GATEDOWN  
FAULT Latched and Circuit Breaker  
Tripped or in UVLO  
mA  
4211f  
2
LTC4211  
ELECTRICAL CHARACTERISTICS  
The ● denotes specifications which apply over the full operating  
temperature range, otherwise specifications are TA = 25°C. VCC = 5V, unless otherwise noted. (Note 2)  
SYMBOL  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
∆V  
GATE  
External N-Channel Gate Drive  
V
GATE  
V
GATE  
V
GATE  
V
GATE  
V
GATE  
V
GATE  
– V (For V = 2.5V)  
●
●
●
●
●
●
4.0  
4.5  
5.0  
10  
10  
8
8
8
10  
16  
18  
18  
V
V
V
V
V
V
CC  
CC  
– V (For V = 2.7V)  
CC  
CC  
– V (For V = 3.3V)  
CC  
CC  
– V (For V = 5V)  
CC  
CC  
– V (For V = 12V)  
CC  
CC  
– V (For V = 15V)  
CC  
CC  
V
V
GATE Overvoltage Lockout Threshold  
FB Voltage Threshold  
●
●
●
0.08  
0.2  
1.236  
0.5  
0.3  
1.248  
5
V
V
GATEOV  
FB High to Low  
1.223  
FB  
∆V  
FB Threshold Line Regulation  
FB Voltage Threshold Hysteresis  
ON Threshold High  
2.5V ≤ V ≤ 16.5V  
mV  
mV  
V
FB  
CC  
V
V
V
V
3
FBHST  
ONHI  
●
●
1.23  
1.20  
1.316  
1.236  
80  
1.39  
1.26  
ON Threshold Low  
V
ONLO  
ONHST  
FILTER  
ON Hysteresis  
mV  
µA  
µA  
V
I
FILTER Current  
During Slow Fault Condition  
●
●
●
–2.5  
7
–2  
–1.5  
13  
During Normal and Reset Conditions  
Latched Off Threshold, FILTER Low to High  
10  
V
V
FILTER Threshold  
1.20  
1.236  
80  
1.26  
FILTER  
FILTERHST  
TMR  
FILTER Threshold Hysteresis  
TIMER Current  
mV  
µA  
mA  
V
I
Timer On, V  
= 1V  
●
–2.5  
–2  
–1.5  
TIMER  
Timer Off, TIMER = 1.5V  
TIMER Low to High  
3
V
TMR  
TIMER Threshold  
●
●
●
1.20  
0.15  
1.20  
1.236  
0.200  
1.236  
50  
1.26  
0.40  
1.26  
TIMER High to Low  
V
V
V
V
V
FAULT Threshold  
Latched Off Threshold, FAULT High to Low  
V
FAULT  
FAULT Threshold Hysteresis  
Output Low Voltage  
mV  
V
FAULTHST  
OLFAULT  
OLRESET  
FAULTFC  
FAULTSC  
I
I
= 1.6mA  
●
●
●
●
0.14  
0.14  
300  
20  
0.4  
0.4  
700  
30  
FAULT  
RESET  
Output Low Voltage  
= 1.6mA  
V
t
t
FAST COMP Trip to GATE Discharging  
SLOW COMP Trip to GATE Discharging  
V
= 0mV to 200mV Step  
ns  
µs  
CB  
CB  
V
= 0mV to 100mV Step,  
10  
4
8-Pin Version or FILTER Floating  
V
CB  
= 0mV to 100mV Step,  
●
6
8
ms  
10nF at FILTER Pin to GND  
t
t
t
t
FAULT Low to GATE Discharging  
FILTER High to FAULT Latched  
Circuit Breaker Reset Delay Time  
Turn-Off Time  
V
V
= 5V to 0V  
= 0V to 5V  
●
●
●
1
2
3
4.5  
150  
8
5
7
µs  
µs  
µs  
µs  
EXTFAULT  
FILTER  
RESET  
OFF  
FAULT  
FILTER  
ON Low to FAULT High  
ON Low to GATE Off  
250  
Note 1: Absolute Maximum Ratings are those values beyond which the life  
of a device may be impaired.  
Note 2: All current into device pins are positive; all current out of device  
pins are negative; all voltages are referenced to ground unless otherwise  
specified.  
Note 3: An internal Zener at the GATE pin clamps the charge pump voltage  
to a typical maximum operating voltage of 26V. External voltage applied to  
the GATE pin beyond the internal Zener voltage may damage the part. If a  
lower GATE pin voltage is desired, use an external Zener diode. The GATE  
capacitance must be <0.15µF at maximum V  
.
CC  
4211f  
3
LTC4211  
TYPICAL PERFOR A CE CHARACTERISTICS  
U W  
Undervoltage Lockout Threshold  
vs Temperature  
Supply Current vs Supply Voltage  
Supply Current vs Temperature  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
2.5  
2.4  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
T
= 25°C  
A
RISING EDGE  
2.3  
V
V
= 15V  
= 12V  
CC  
CC  
FALLING EDGE  
2.2  
2.1  
2.0  
V
= 5V  
= 3V  
CC  
V
CC  
25 50  
TEMPERATURE (°C)  
–75 –50 –25  
0
50  
100 125 150  
75  
–75 –50 –25  
0
75 100 125 150  
25  
0
2
4
6
8
10 12 14 16 18 20  
TEMPERATURE (°C)  
SUPPLY VOLTAGE (V)  
4211 G02  
4211 G03  
4211 G01  
ON Pin Threshold  
vs Temperature  
ON Pin Threshold  
vs Supply Voltage  
GATE Voltage vs Supply Voltage  
1.40  
1.35  
30  
25  
1.40  
1.35  
T
= 25°C  
T
= 25°C  
V
CC  
= 5V  
A
A
HIGH THRESHOLD  
HIGH THRESHOLD  
LOW THRESHOLD  
1.30  
1.30  
1.25  
20  
15  
LOW THRESHOLD  
1.25  
1.20  
1.20  
1.15  
1.10  
10  
5
1.15  
1.10  
0
0
2
4
6
8
10 12 14 16 18 20  
0
2
4
6
8
10 12 14 16 18 20  
–75 –50 –25  
0
25 50 75 100 125 150  
SUPPLY VOLTAGE (V)  
SUPPLY VOLTAGE (V)  
TEMPERATURE (°C)  
4211 G04  
4211 G06  
4211 G05  
VGATE – VCC vs Supply Voltage  
GATE Voltage vs Temperature  
VGATE – VCC vs Temperature  
18  
16  
14  
12  
10  
8
18  
16  
14  
12  
10  
8
30  
25  
T = 25°C  
A
V
CC  
= 15V  
V
= 12V  
V
= 12V  
= 5V  
CC  
CC  
20  
V
CC  
V
= 15V  
V
V
= 5V  
= 3V  
CC  
CC  
CC  
15  
10  
V
= 3V  
CC  
6
6
4
4
5
0
2
2
0
0
–75 –50 –25  
0
25 50 75 100 125 150  
0
2
4
6
8
10  
20  
12 14 16 18  
–75 –50 –25  
0
100 125 150  
25 50 75  
TEMPERATURE (°C)  
SUPPLY VOLTAGE (V)  
TEMPERATURE (°C)  
4211 G07  
4211 G08  
4211 G09  
4211f  
4
LTC4211  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
GATE Output Source Current  
vs Supply Voltage  
GATE Output Source Current  
vs Temperature  
Normal GATE Pull-Down Current  
vs Supply Voltage  
13  
12  
260  
240  
13  
12  
T
= 25°C  
T = 25°C  
A
A
11  
11  
10  
220  
200  
V
= 15V  
CC  
10  
9
V
= 3V  
CC  
V
CC  
= 12V  
V
CC  
= 5V  
9
8
7
180  
160  
140  
8
7
0
2
4
6
8
10 12 14 16 18 20  
0
2
4
6
8
10 12 14 16 18 20  
–75 –50 –25  
0
25 50 75 100 125 150  
SUPPLY VOLTAGE (V)  
SUPPLY VOLTAGE (V)  
TEMPERATURE (°C)  
4211 G10  
4211 G12  
4211 G11  
Fast GATE Pull-Down Current  
vs Temperature  
Fast GATE Pull-Down Current  
vs Supply Voltage  
Normal GATE Pull-Down Current  
vs Temperature  
80  
70  
260  
240  
80  
70  
T
= 25°C  
V
CC  
= 5V  
V
CC  
= 5V  
A
220  
60  
60  
50  
200  
180  
50  
40  
40  
30  
20  
160  
140  
30  
20  
0
2
4
6
8
10 12 14 16 18 20  
–75 –50 –25  
0
25 50 75 100 125 150  
–75 –50 –25  
0
25 50 75 100 125 150  
SUPPLY VOLTAGE (V)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
4211 G14  
4211 G13  
4211 G15  
Feedback Threshold  
vs Temperature  
Feedback Threshold  
vs Supply Voltage  
FILTER Threshold  
vs Supply Voltage  
1.40  
1.35  
1.250  
1.245  
1.240  
1.250  
1.245  
T
= 25°C  
V
= 5V  
A
T
= 25°C  
CC  
A
HIGH THRESHOLD  
LOW THRESHOLD  
1.30  
1.25  
HIGH THRESHOLD  
LOW THRESHOLD  
1.240  
HIGH THRESHOLD  
LOW THRESHOLD  
1.235  
1.230  
1.225  
1.235  
1.230  
1.225  
1.20  
1.15  
1.10  
0
2
4
6
8
10 12 14 16 18 20  
100 125  
150  
0
2
4
6
8
10 12 14 16 18 20  
–75 –50 –25  
0
25 50 75  
SUPPLY VOLTAGE (V)  
TEMPERATURE (°C)  
SUPPLY VOLTAGE (V)  
4211 G18  
4211 G16  
4211 G17  
4211f  
5
LTC4211  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
FILTER Pull-Up Current  
vs Supply Voltage  
FILTER Pull-Up Current  
vs Temperature  
FILTER Threshold vs Temperature  
2.3  
2.2  
1.40  
1.35  
2.3  
2.2  
T
= 25°C  
V
CC  
= 5V  
V
CC  
= 5V  
A
1.30  
2.1  
2.1  
2.0  
HIGH THRESHOLD  
1.25  
1.20  
2.0  
1.9  
1.9  
1.8  
1.7  
LOW THRESHOLD  
1.15  
1.10  
1.8  
1.7  
0
2
4
6
8
10 12 14 16 18 20  
–75 –50 –25  
0
25 50 75 100 125 150  
–75 –50 –25  
0
25 50 75  
100 125  
150  
SUPPLY VOLTAGE (V)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
4211 G20  
4211 G19  
4211 G21  
TIMER High Threshold  
vs Supply Voltage  
FILTER Pull-Down Current  
vs Temperature  
FILTER Pull-Down Current  
vs Supply Voltage  
1.26  
1.25  
12.0  
11.5  
11.0  
10.5  
10.0  
9.5  
12.0  
11.5  
11.0  
10.5  
10.0  
9.5  
T
= 25°C  
T
= 25°C  
V
CC  
= 5V  
A
A
1.24  
1.23  
1.22  
1.21  
1.20  
9.0  
9.0  
8.5  
8.5  
8.0  
8.0  
0
2
4
6
8
10 12 14 16 18 20  
25 50  
0
2
4
6
8
10 12 14 16 18 20  
–75 –50 –25  
0
75 100 125 150  
SUPPLY VOLTAGE (V)  
SUPPLY VOLTAGE (V)  
TEMPERATURE (°C)  
4211 G24  
4211 G22  
4211 G23  
TIMER Low Threshold  
vs Supply Voltage  
TIMER High Threshold  
vs Temperature  
TIMER Low Threshold  
vs Temperature  
1.0  
0.8  
1.26  
1.25  
1.0  
0.8  
0.6  
V = 5V  
CC  
V
CC  
= 5V  
T
= 25°C  
A
1.24  
0.6  
1.23  
1.22  
0.4  
0.2  
0
0.4  
0.2  
0
1.21  
1.20  
–75 –50 –25  
0
25 50 75 100 125 150  
–75 –50 –25  
0
25 50 75 100 125 150  
0
2
4
6
8
10 12 14 16 18 20  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SUPPLY VOLTAGE (V)  
4211 G27  
4211 G25  
4211 G26  
4211f  
6
LTC4211  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
TIMER Pull-Up Current  
vs Supply Voltage  
TIMER Pull-Up Current  
vs Temperature  
TIMER Pull-Down Current  
vs Supply Voltage  
2.30  
2.20  
6
5
2.3  
2.2  
T
= 25°C  
T = 25°C  
A
V
CC  
= 5V  
A
2.1  
2.10  
2.00  
4
3
2.0  
1.9  
1.90  
1.80  
1.70  
2
1
0
1.8  
1.7  
0
2
4
6
8
10 12 14 16 18 20  
0
2
4
6
8
10 12 14 16 18 20  
–75 –50 –25  
0
25 50 75 100 125 150  
SUPPLY VOLTAGE (V)  
SUPPLY VOLTAGE (V)  
TEMPERATURE (°C)  
4211 G28  
4211 G30  
4211 G29  
TIMER Pull-Down Current  
vs Temperature  
VOL vs Temperature  
VOL vs Supply Voltage  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
6
5
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
0.4  
0.2  
0
V
CC  
= 5V  
T
= 25°C  
V
= 5V  
A
CC  
RESET OR FAULT  
RESET OR FAULT  
4
3
2
I
= 5mA  
OL  
I
= 5mA  
OL  
1
0
I
OL  
= 1mA  
I
= 1mA  
OL  
–75 –50 –25  
0
25 50 75 100 125 150  
0
2
4
6
8
10 12 14 16 18 20  
–75 –50 –25  
0
25 50 75 100 125 150  
TEMPERATURE (°C)  
SUPPLY VOLTAGE (V)  
TEMPERATURE (°C)  
4211 G31  
4211 G32  
4211 G33  
VCB (SLOW COMP)  
vs Temperature  
VCB (SLOW COMP)  
vs Supply Voltage  
VCB (FAST COMP)  
vs Supply Voltage  
60  
58  
56  
54  
52  
50  
48  
46  
44  
42  
40  
170  
165  
160  
155  
150  
145  
140  
135  
130  
60  
58  
56  
54  
52  
50  
48  
46  
44  
42  
40  
V
CC  
= 5V  
T
= 25°C  
T
= 25°C  
A
A
–75 –50 –25  
0
25 50 75 100 125 150  
0
2
4
6
8
10 12 14 16 18 20  
0
2
4
6
8
10 12 14 16 18 20  
TEMPERATURE (°C)  
SUPPLY VOLTAGE (V)  
SUPPLY VOLTAGE (V)  
4211 G35  
4211 G34  
4211 G36  
4211f  
7
LTC4211  
TYPICAL PERFOR A CE CHARACTERISTICS  
U W  
VCB (FAST COMP)  
vs Temperature  
SLOW COMP Response Time vs  
Supply Voltage  
SLOW COMP Response Time vs  
Temperature  
26  
24  
22  
20  
18  
16  
14  
12  
10  
26  
24  
22  
20  
18  
16  
14  
12  
10  
170  
165  
160  
155  
150  
145  
140  
135  
130  
8-PIN VERSION OR FILTER FLOATING  
T
= 25°C  
V
= 5V  
A
CC  
8-PIN VERSION  
OR FILTER FLOATING  
V
= 12V  
= 5V  
CC  
V
= 15V  
= 3V  
CC  
V
V
CC  
CC  
25 50  
TEMPERATURE (°C)  
–75 –50 –25  
0
75 100 125 150  
0
2
4
6
8
10 12 14 16 18 20  
25 50  
TEMPERATURE (°C)  
–75 –50 –25  
0
75 100 125 150  
SUPPLY VOLTAGE (V)  
4211 G39  
4211 G38  
4211 G37  
FAST COMP Response Time vs  
Supply Voltage  
FAST COMP Response Time vs  
Temperature  
FILTER High to FAULT Activation  
Time vs Supply Voltage  
800  
700  
600  
500  
400  
300  
200  
100  
0
6.0  
5.5  
800  
700  
600  
500  
400  
300  
200  
100  
0
T
= 25°C  
V
CB  
= 0mV TO 200mV STEP  
T
= 25°C  
A
A
V
= 0mV TO 200mV STEP  
CB  
5.0  
4.5  
V
= 3V  
= 5V  
CC  
V
CC  
= 12V  
V
CC  
4.0  
3.5  
3.0  
V
CC  
= 15V  
25 50  
TEMPERATURE (°C)  
0
2
4
6
8
10 12 14 16 18 20  
–75 –50 –25  
0
75 100 125 150  
0
2
4
6
8
10 12 14 16 18 20  
SUPPLY VOLTAGE (V)  
SUPPLY VOLTAGE (V)  
4211 G41  
4211 G42  
4211 G40  
FILTER High to FAULT Activation  
Time vs Temperature  
Circuit Breaker RESET Time  
vs Supply Voltage  
Circuit Breaker RESET Time  
vs Temperature  
200  
180  
6.0  
5.5  
200  
180  
T
= 25°C  
V
= 5V  
V
= 5V  
CC  
A
CC  
5.0  
160  
160  
140  
4.5  
4.0  
140  
120  
120  
100  
80  
3.5  
3.0  
100  
80  
0
2
4
6
8
10 12 14 16 18 20  
–75 –50 –25  
0
25 50 75 100 125 150  
–75 –50 –25  
0
25 50 75 100 125 150  
SUPPLY VOLTAGE (V)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
4211 G44  
4211 G43  
4211 G45  
4211f  
8
LTC4211  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS  
FAULT Pin Low to GATE Discharging  
Time vs Supply Voltage  
FAULT Pin Low to GATE Discharging  
Time vs Temperature  
FAULT Threshold Voltage  
vs Supply Voltage  
4.5  
4.0  
1.50  
1.45  
1.40  
1.35  
1.30  
1.25  
1.20  
1.15  
1.10  
4.5  
4.0  
T
= 25°C  
V
= 5V  
A
T = 25°C  
A
CC  
3.5  
3.5  
3.0  
3.0  
2.5  
HIGH THRESHOLD  
LOW THRESHOLD  
2.5  
2.0  
1.5  
2.0  
1.5  
0
2
4
6
8
10 12 14 16 18 20  
–75 –50 –25  
0
25 50 75 100 125 150  
0
2
4
6
8
10 12 14 16 18 20  
SUPPLY VOLTAGE (V)  
TEMPERATURE (°C)  
SUPPLY VOLTAGE (V)  
4211 G46  
4211 G47  
4211 G48  
FAULT Threshold Voltage  
vs Temperature  
Turn Off Time  
vs Supply Voltage  
Turn Off Time vs Temperature  
11  
10  
11  
10  
1.50  
1.45  
1.40  
1.35  
1.30  
1.25  
1.20  
1.15  
1.10  
T
= 25°C  
V
CC  
= 5V  
V
CC  
= 5V  
A
9
9
8
HIGH THRESHOLD  
LOW THRESHOLD  
8
7
7
6
5
6
5
0
2
4
6
8
10 12 14 16 18 20  
25 50  
–75 –50 –25  
0
50  
100 125 150  
75  
–75 –50 –25  
0
75 100 125 150  
25  
SUPPLY VOLTAGE (V)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
4211 G50  
4211 G49  
4211 G51  
GATE Overvoltage Lockout Threshold  
vs Supply Voltage  
GATE Overvoltage Lockout Threshold  
vs Temperature  
0.5  
0.4  
0.3  
0.5  
V
CC  
= 5V  
T
= 25°C  
A
0.4  
0.3  
0.2  
0.1  
0
0.2  
0.1  
0
0
2
4
6
8
10 12 14 16 18 20  
–75 –50 –25  
0
25 50 75  
100 125  
150  
TEMPERATURE (°C)  
SUPPLY VOLTAGE (V)  
4211 G52  
4211 G53  
4211f  
9
LTC4211  
U
U
U
PI FU CTIO S  
(8-Lead Package/10-Lead Package)  
RESET (Pin 1/Pin 1): An open-drain N-channel MOSFET  
whose source connects to GND (Pin 4/Pin 5). This pin  
pullslowifthevoltageattheFBpin(Pin5/Pin6)fallsbelow  
the FB pin threshold (1.236V). During the start-up cycle,  
the RESET pin goes high impedance at the end of the  
second timing cycle after the FB pin goes above the FB  
threshold. This pin requires an external pull-up resistor to  
VCC. If an undervoltage lockout condition occurs, the  
RESET pin pulls low independently of the FB pin to prevent  
false glitches.  
As shown in the Block Diagram, an internal charge pump  
supplies a 10µA gate current and sufficient gate voltage  
drive to the external FET for supply voltages from 2.5V to  
16.5V. The internal charge-pump and zener clamps at the  
GATE pin determine the gate drive voltage (∆VGATE  
=
V
GATE – VCC). The charge pump produces a minimum 4V  
of ∆VGATE for supplies in the range of 2.5V < VCC < 4.75V.  
For VCC > 4.75V, the ∆VGATE is limited by zener clamp Z1  
connecting between GATE and VCC pins. The ∆VGATE is  
typically at 12V and with guaranteed minimum value of  
10V. For VCC > 15V, the zener clamp Z2 sets the limitation  
for ∆VGATE. Z2 clamps the gate voltage to ground to 26V  
typically. The minimum Z2’s clamp voltage is 23V. This  
effectively sets ∆VGATE to 8V minimum.  
ON (Pin 2/Pin 2): An active high signal used to enable or  
disable LTC4211 operation. COMP1’s threshold is set at  
1.236V and its hysteresis is set at 80mV. If a logic high  
signal is applied to the ON pin (VON > 1.316V), the first  
timing cycle begins if an overvoltage condition does not  
exist on the GATE pin (Pin 6/Pin 7). If a logic low signal is  
applied to the ON pin (VON < 1.236V), the GATE pin is  
pulled low by an internal 200µA current sink. The ON pin  
can also be used to reset the electronic circuit breaker. If  
the ON pin is cycled low and then high following a circuit  
breaker trip, the internal circuit breaker is reset, and the  
LTC4211 begins a new start-up cycle.  
SENSE (Pin 7/Pin 8): Circuit Breaker Set Pin. With a sense  
resistorplacedinthepowerpathbetweenVCC andSENSE,  
theLTC4211’selectroniccircuitbreakertripsifthevoltage  
across the sense resistor exceeds the thresholds set  
internally for the SLOW COMP and the FAST COMP, as  
shown in the Block Diagram. The threshold for the SLOW  
COMP is VCB(SLOW) = 50mV, and the electronic circuit  
breaker trips if the voltage across the sense resistor  
exceeds 50mV for 20µs. The SLOW COMP delay is fixed in  
the S8/MS8 version and adjustable in the MS version of  
the LTC4211. To adjust the SLOW COMP’s delay, please  
refertothesectiononAdjustingSLOWCOMP’sResponse  
Time.  
TIMER (Pin 3/Pin 4): A capacitor connected from this pin  
toGNDsetstheLTC4211’ssystemtiming. TheLTC4211’s  
initial and second start-up timing cycles and its internal  
“power good” delay time are defined by this capacitor.  
GND (Pin 4/Pin 5): Device Ground Connection. Connect  
this pin to the system’s analog ground plane.  
Under transient conditions where large step current  
changes can and do occur over shorter periods of time, a  
second (fast) comparator instead trips the electronic  
circuit breaker. The threshold for the FAST COMP is set at  
VCB(FAST) = 150mV, and the circuit breaker trips if the  
voltageacrossthesenseresistorexceeds150mVformore  
than 300ns. The FAST COMP’s delay is fixed in the  
LTC4211andcannotbeadjusted.Todisabletheelectronic  
circuit breaker, connect the VCC and SENSE pins together.  
FB (Pin 5/Pin 6): The FB (Feedback) pin is an input to the  
COMP2 comparator and monitors the output supply volt-  
age through an external resistor divider. If VFB < 1.236V,  
theRESETpinpullslow.AninternalglitchfilteratCOMP2’s  
output helps prevent negative voltage transients from  
triggeringaresetcondition. IfVFB >1.239V, theRESETpin  
goes high after one timing cycle.  
GATE (Pin 6/Pin 7): The output signal at this pin is the  
high side gate drive for the external N-channel FET pass  
transistor.  
VCC (Pin 8/Pin 9): This is the positive supply input to the  
LTC4211.TheLTC4211operatesfrom2.5V<VCC <16.5V,  
and the supply current is typically 1mA. An internal  
undervoltage lockout circuit disables the device until the  
voltage at VCC exceeds 2.3V.  
4211f  
10  
LTC4211  
U
U
U
PI FU CTIO S  
(8-Lead Package/10-Lead Package)  
FAULT (Not available on S8/MS8, Pin 10 MS): FAULT is  
both an input and an output. Connected to this pin are an  
analog comparator (COMP6) and an open-drain N-chan-  
nel FET. During normal operation, if COMP6 is driven  
below 1.236V, the electronic circuit breaker trips and the  
GATE pin pulls low. Typically, a 10k pull-up resistor  
connects to the FAULT pin. This allows the LTC4211 to  
beginasecondtimingcycle(VFAULT >1.286)andstart-up  
properly. This also allows the use of the FAULT pin as a  
status output. Under normal operating conditions, the  
FAULT output is a logic high. Two conditions cause an  
active low on FAULT: (1) the LTC4211’s electronic circuit  
0V) or because of a fast output overcurrent transient  
(FAST COMP trips circuit breaker); or (2) VFILTER  
>
1.236V. The FAULT output is driven to logic low and is  
latched logic low until the ON pin is driven to logic low for  
150µs (the tRESET duration).  
FILTER (Not available S8/MS8, Pin 3 MS): Overcurrent  
Fault Timing Pin and Overvoltage Fault Set pin. With a  
capacitor connected from this pin to ground, the SLOW  
COMP’s response time can be adjusted. In the S8/MS8  
versionoftheLTC4211, theFILTERpinisnotavailableand  
thedelaytimefromovercurrentdetecttoGATEOFFisfixed  
at 20µs.  
breaker trips because of an output short circuit (VOUT  
=
W
BLOCK DIAGRA  
V
8 (9)  
SENSE 7 (8)  
GATE 6 (7)  
CC  
–
+
Z2  
Z
Z1  
V
(TYP) = 26V  
V
(TYP) = 12V  
Z
COMP7  
V
CC  
CHARGE  
PUMP  
0.2V  
10µA  
UVLO  
–
–
+
+
50mV  
150mV  
t
TIMER  
RESET  
1
+
+
–
–
M3  
CB  
V
CC  
SLOW  
COMP  
FAST  
M1  
COMP  
0.2V  
+
–
200µA  
10µA  
2µA  
COMP3  
COMP4  
START-UP  
CURRENT  
REGULATOR CHARGING  
GLITCH FILTER  
(SEE NOTE 1)  
300ns  
DELAY  
TIMER  
3 (4)  
TRIPS  
OR UVLO ON LOW  
GATE  
M6  
+
–
POWER BAD  
V
REF  
V
REF  
+
–
V
CC  
NORMAL  
LOGIC  
COMP6  
2µA  
FAULT  
FAULT  
M5  
CB TRIPS  
(10)  
MS ONLY  
FILTER  
+
–
M2  
(3)  
MS ONLY  
COMP5  
GLITCH FILTER  
FUNCTION OF  
OVERDRIVE  
M4  
GLITCH FILTER  
V
REF  
150µs  
GND  
4 (5)  
V
10µA  
REF  
NORMAL, RESET  
BG  
0.2V  
COMP1  
–
COMP2  
–
+
+
V
REF  
V
REF  
4211 BD  
2
ON  
5 (6) FB  
NOTE 1: SET BY FILTER CAPACITOR FOR MS  
20µs DEFAULT FOR MS8, S8  
PIN NUMBERS FOR S8/MS8 (MS)  
4211f  
11  
LTC4211  
U
OPERATIO  
COMP2outputgoeshigh.Afterpassingthroughaglitchfil-  
ter,RESETispulledlow(TimePointN2).Whenthevoltage  
at the FB pin rises above its reset threshold (1.239V),  
COMP2’s output goes low and a timing cycle starts (Time  
Point N4). After a complete timing cycle, RESET is pulled  
highbytheexternalpull-upresistor.IftheFBpinrisesabove  
the reset threshold for less than a timing cycle, the RESET  
output remains low (Time Point N3).  
HOT CIRCUIT INSERTION  
Whencircuitboardsareinsertedintoorremovedfromlive  
backplanes, the supply bypass capacitors can draw huge  
transient currents from the backplane power bus as they  
charge. The transient current can cause permanent dam-  
age to the connector pins as well as cause glitches on the  
system supply, causing other boards in the system to  
reset.  
As shown in Figure 5, the LTC4211’s RESET pin is logic  
low during any undervoltage lockout condition and during  
theinitialinsertionofaPCboard. Undernormaloperation,  
RESET goes to logic high at the end of the soft-start cycle  
only after the FB pin voltage rises above its reset threshold  
of 1.239V.  
The LTC4211 is designed to turn a printed circuit board’s  
supplyvoltagesONandOFFinacontrolledmanner, allow-  
ing the circuit board to be safely inserted or removed from  
alivebackplane. Thedeviceprovidesasystemresetsignal  
to indicate when board supply voltage drops below a pre-  
determined level, as well as a dual function fault monitor.  
N1 N2  
N3  
N4  
V1 V2  
V1 V2  
V
OUT  
OUTPUT VOLTAGE MONITOR  
1.236V  
The LTC4211 uses a 1.236V bandgap reference, precision  
voltage comparator and an external resistor divider to  
monitor the output supply voltage as shown in Figure 1.  
TIMER  
RESET  
The operation of the supply monitor in normal mode is il-  
lustratedinFigure 2. WhenthesupplyvoltageattheFBpin  
drops below its reset threshold (1.236V), the comparator  
POWER GOOD  
DELAY  
4211 F02  
Figure 2. Supply Monitor Waveforms in Normal Mode  
BACKPLANE PCB EDGE  
CONNECTOR CONNECTOR  
(FEMALE)  
(MALE)  
R
SENSE  
Q1  
LONG  
V
V
CC  
OUT  
+
C
LOAD  
8
7
6
LTC4211  
ON  
V
SENSE  
GATE  
CC  
R3  
R1  
R2  
10k  
FB  
5
1
–
+
2
SHORT  
ON/RESET  
COMP2  
LOGIC  
µP  
1.236V  
REFERENCE  
RESET  
TIMER  
RESET  
Q2  
TIMER  
GND  
3
4
C
TIMER  
4211 F01  
LONG  
GND  
Figure 1. Supply Voltage Monitor Block Diagram  
4211f  
12  
LTC4211  
U
OPERATIO  
UNDERVOLTAGE LOCKOUT  
pin. The relationship between glitch filter time and the  
feedback transient voltage is shown in Figure 4.  
The LTC4211’s power-on reset circuit initializes the start-  
up procedure and ensures the chip is in the proper state if  
the input supply voltage is too low. If the supply voltage  
falls below 2.18V, the LTC4211 is in undervoltage lockout  
(UVLO) mode, and the GATE pin is pulled low. Since the  
UVLO circuitry uses hysteresis, the chip restarts after the  
supply voltage rises above 2.3V and the ON pin goes high.  
250  
T
A
= 25°C  
200  
150  
100  
50  
0
In addition, users can utilize the ON comparator (COMP1)  
or the FAULT comparator (COMP6) to effectively program  
a higher undervoltage lockout level. Figure 3 shows the  
external resistor divider at the ON pin programs the  
system’s undervoltage lockout voltage. The system will  
entertheplug-incycleaftertheONpinrisesabove1.316V.  
The resistor divider sets the circuit to turn on when VCC  
reaches around 79% of its final value. If a different turn on  
VCC voltage is desired change the resistor divider value  
accordingly. The FAULT comparator can be the alternative  
for external undervoltage lockout setting. If the FAULT  
comparator is used for this purpose, the system will wait  
for the input voltage to increase above the level set by the  
user before starting the second timing cycle. Also, if the  
inputvoltagedropsbelowthesetlevelinnormaloperating  
mode, the user must cycle the ON pin or VCC to restart the  
system.  
0
20 40 60 80 100 120 140 160 180 200  
FEEDBACK TRANSIENT (mV)  
4211 F03  
Figure 4. FB Comparator Glitch Filter Time  
vs Feedback Transient Voltage  
SYSTEM TIMING  
System timing for the LTC4211 is generated at the TIMER  
pin (see the Block Diagram). If the LTC4211’s internal  
timing circuit is off, an internal N-channel FET connects  
the TIMER pin to GND. If the timing circuit is enabled, an  
internal 2µA current source is then connected to the  
TIMER pin to charge CTIMER at a rate given by Equation 1:  
V
V
V
IN  
12V  
IN  
IN  
3.3V  
5V  
2µA  
R1  
10k  
R1  
20k  
R1  
61.9k  
CTIMER Charge -Up Rate =  
(1)  
CTIMER  
ON PIN  
ON PIN  
ON PIN  
R2  
R2  
R2  
When the TIMER pin voltage reaches COMP4’s threshold  
of 1.236V, the TIMER pin is reset to GND. Equation 2 gives  
an expression for the timer period:  
10k  
10k  
10k  
4211 F04  
(a) 3.3V  
(b) 5V  
(c) 12V  
IN  
IN  
IN  
Figure 3. ON Pin Sets the Undervoltage  
Lockout Voltage Externally  
CTIMER  
2µA  
t
TIMER = 1.236V •  
(2)  
GLITCH FILTER FOR RESET  
As a design aid, the LTC4211’s timer period as a function  
of the CTIMER using standard values from 3.3nF to 0.33µF  
is shown in Table 1.  
The LTC4211 has a glitch filter to prevent RESET from  
generating a system reset if there are transients on the FB  
4211f  
13  
LTC4211  
U
OPERATIO  
Table 1. tTIMER vs CTIMER  
The CTIMER value is vital to ensure a proper start-up and  
reliable operation. A system may not get started if a timing  
period is set too short in relation to the time needed for the  
output voltage to ramp up from zero to its rated value.  
Conversely, this timing period should not be excessive as  
an output short can occur at start-up allowing the external  
MOSFETtooverheat. AgoodstartingpointistosetCTIMER  
= 10nF and adjust its value accordingly to suit the specific  
applications.  
C
t
TIMER  
TIMER  
0.0033µF  
0.0047µF  
0.0068µF  
0.0082µF  
0.01µF  
2.0ms  
2.9ms  
4.2ms  
5.1ms  
6.2ms  
0.015µF  
0.022µF  
0.033µF  
0.047µF  
0.068µF  
0.082µF  
0.1µF  
9.3ms  
13.6ms  
20.4ms  
29.0ms  
42.0ms  
50.7ms  
61.8ms  
92.7ms  
136ms  
204ms  
OPERATING SEQUENCE  
Power-Up, Start-Up Check and Plug-In Timing Cycle  
The sequence of operations for the LTC4211 is illustrated  
in the timing diagram of Figure 5. When a PC board is first  
inserted into a live backplane, the LTC4211 first performs  
0.15µF  
0.22µF  
0.33µF  
CHECK FOR FILTER LOW (<V  
– 80mV)  
+ 50mV)  
REF  
REF  
CHECK FOR FAULT HIGH (>V  
FAST COMPARATOR ARMED  
SLOW COMPARATOR ARMED  
ON GOES LOW  
CHECK FOR GATE < 0.2V  
RESET PULLED LOW DUE TO POWER BAD  
1
2
3
4 5  
6
7
8
9 10  
V
CC  
ON  
V
= V  
REF  
TMR  
TIMER  
2µA  
2µA  
GATE  
10µA  
200µA  
POWER  
GOOD  
FB  
POWER BAD  
(V < V  
)
FB  
REF  
V
OUT  
(V > V  
)
REF  
RESET  
4211 F05  
PLUG-IN CYCLE  
FIRST TIMING CYCLE  
SOFT-START CYCLE  
SECOND TIMING CYCLE  
Figure 5. Normal Power-Up Sequence  
4211f  
14  
LTC4211  
U
OPERATIO  
a start-up check to make sure the supply voltage is above  
its 2.3V UVLO threshold (see Time Point 1). If the input  
supply voltage is valid, the gate of the external pass  
transistorispulledtogroundbytheinternal200µAcurrent  
source connected at the GATE pin. The TIMER pin is held  
low by an internal N-channel pull-down transistor (see  
M6, LTC4211 Block Diagram) and the FILTER pin voltage  
is pulled to ground by an internal 10µA current source.  
The inrush current being delivered to the load while the  
GATE is ramping is dependent on CLOAD and CGATE  
.
Equation 4 gives an expression for the inrush current  
during the second timing cycle:  
dV  
=
GATE •CLOAD = 10µA •  
CLOAD  
CGATE  
I
INRUSH  
(4)  
dt  
For example, if CGATE = 3300pF and CLOAD = 2000µF, the  
inrush current charging CLOAD is:  
Once VCC and ON (the ON pin is >1.316) are valid, the  
LTC4211 checks to make sure that GATE is OFF (VGATE  
<
0.2V) at Time Point 2. An internal timing circuit is enabled  
and the TIMER pin voltage ramps up at the rate described  
by Equation 1. At Time Point 3 (the timing period pro-  
grammed by CTIMER), the TIMER pin voltage equals VTMR  
(1.236V). Next, the TIMER pin voltage ramps down to  
TimePoint4wheretheLTC4211performstwochecks:(1)  
FILTER pin voltage is low (VFILTER < 1.156V) and (2)  
FAULT pin voltage is high (VFAULT > 1.286V). If both  
conditions are met, the LTC4211 begins a second timing  
(soft-start) cycle.  
2000µF  
0.0033µF  
I
INRUSH = 10µA •  
= 6.06A  
(5)  
At Time Point 6, the output voltage trips COMP2’s thresh-  
old, signaling an output voltage “power good” condition.  
At Time Point 7, RESET is asserted high, SLOW COMP is  
armed and the LTC4211 enters a fault monitor mode. The  
TIMER voltage then ramps down to Time Point 8.  
Power-Off Cycle  
AsshownatTimePoint9,anexternalhardresetisinitiated  
by pulling the ON pin low (VON < 1.236V). The GATE pin  
voltage is ramped to ground by the internal 200µA current  
source, discharging CGATE and turning off the pass tran-  
sistor. As CLOAD discharges, the output voltage crosses  
COMP2’s threshold, signaling a “power bad” condition at  
Time Point 10. At this point, RESET is asserted low.  
Second Timing (Soft-Start) Cycle  
Atthebeginningofthesecondtimingcycle(TimePoint 5),  
theLTC4211’sFASTCOMPisarmedandaninternal10µA  
current source working with an internal charge pump  
provides the gate drive to the external pass transistor. An  
expression for the GATE voltage slew rate is given by  
Equation 3:  
dVGATE 10µA  
SOFT-START WITH CURRENT LIMITING  
VGATE Slew Rate,  
=
(3)  
dt  
CGATE  
During the second timing cycle, the inrush current was  
described by Equation 4. Note that there is a one-to-one  
correspondence in the inrush current to CLOAD. If the  
inrush current is large enough to cause a voltage drop  
greater than 50mV across the sense resistor, an internal  
servo loop controls the operation of the 10µA current  
source at the GATE pin to regulate the load current to:  
where CGATE = Power MOSFET gate input capacitance  
(CISS).  
Forexample,aSi4410DY(a30VN-channelpowerMOSFET)  
exhibitsanapproximateCGATE of3300pFatVGS =10V.The  
LTC4211’s GATE voltage rate-of-change (slew rate) for  
this example would be:  
50mV  
RSENSE  
ILIMIT(SOFTSTART)  
=
(6)  
dVGATE  
dt  
10µA  
3300pF  
V
ms  
VGATE Slew Rate,  
=
= 3.03  
For example, the inrush current is limited to 5A when  
RSENSE = 0.01Ω.  
4211f  
15  
LTC4211  
U
OPERATIO  
In this fashion, the inrush current is controlled and CLOAD  
FREQUENCY COMPENSATION AT SOFT-START  
is charged up slowly during the soft-start cycle.  
If the external gate input capacitance (CISS) is greater than  
600pF, no external gate capacitor is required at GATE to  
stabilize the internal current-limiting loop during soft-  
start. Otherwise, connect a gate capacitor between the  
GATEpinandgroundtoincreasethetotalgatecapacitance  
tobeequaltoorabove600pF. Theservoloopthatcontrols  
the external MOSFET during current limiting has a unity-  
gain frequency of about 105kHz and phase margin of 80°  
for external MOSFET gate input capacitances to 2.5nF.  
The timing diagram in Figure 6 illustrates the operation of  
the LTC4211 in a normal power-up sequence with limited  
inrushcurrentasdescribedbyEquation6.AtTimePoint 5,  
the GATE pin voltage begins to ramp indicating that the  
power MOSFET is beginning to charge CLOAD. At Time  
Point 5A, the inrush current causes a 50mV voltage drop  
across RSENSE and the internal servo loop engages, limit-  
ing the inrush current to a fixed level. At Time Point 6, the  
GATEpinvoltagecontinuestorampasCLOAD chargesuntil  
VOUT reachesitsfinalvalue. Thechargingcurrentreduces,  
and the internal servo loop disengages. At the end of the  
soft-start cycle (Time Point 7), RESET is high and SLOW  
COMP is armed.  
USING AN EXTERNAL GATE CAPACITOR  
TheLTC4211automaticallylimitstheinrushcurrentinone  
of two ways: by controlling the GATE pin voltage slew rate  
CHECK FOR FILTER LOW (<V  
– 80mV)  
+ 50mV)  
REF  
REF  
CHECK FOR FAULT HIGH (>V  
FAST COMPARATOR ARMED  
SLOW COMPARATOR ARMED  
ON GOES LOW  
CHECK FOR GATE < 0.2V  
2
RESET PULLED LOW DUE TO POWER BAD  
1
3
4 5 5A  
6
7
8
9 10  
V
CC  
ON  
V
REF  
2µA  
2µA  
TIMER  
GATE  
GATE  
V
OUT  
10µA  
200µA  
POWER GOOD  
> V  
POWER BAD  
< V  
REF  
V
OUT  
V
V
FB  
FB  
REF  
LOAD CURRENT IS  
REGULATING AT 50mV/R  
SENSE  
I
LOAD  
RESET  
4211 F06  
PLUG-IN CYCLE  
FIRST TIMING CYCLE  
SOFT-START CYCLE  
SECOND TIMING CYCLE  
Figure 6. Normal Power-Up Sequence (With Current Limiting in Second Timing Cycle)  
4211f  
16  
LTC4211  
U
OPERATIO  
or by actively limiting the inrush current. The LTC4211  
uses GATE voltage slew rate limiting when CLOAD is small  
and/or the inrush current limit is set high. If GATE voltage  
slew rate control is preferred with large CLOAD, an external  
capacitor (CGX) can be used from GATE to ground, as  
shown in Figure 7. According to Equation 3, adding CGX  
slows the GATE voltage slew rate at the expense of slower  
system turn-on and turn-off time. Should this technique  
beused,valuesforCGX lessthan150nFarerecommended.  
trips, the GATE pin is immediately pulled to ground, the  
external N-channel MOSFET is quickly turned OFF and  
FAULT is latched low.  
The circuit breaker trips whenever the voltage across the  
sense resistor exceeds two different levels, set by the  
LTC4211’s SLOW COMP and FAST COMP thresholds (see  
Block Diagram). The SLOW COMP trips the circuit breaker  
if the voltage across the SENSE resistor (VCC – VSENSE  
=
VCB) is greater than 50mV for 20µs. There may be appli-  
cations where this comparator’s response time is not long  
enough, for example, because of excessive supply voltage  
noise.ToadjusttheresponsetimeoftheSLOWCOMP,the  
MS version of the LTC4211 is chosen and a capacitor is  
used at the LTC4211’s FILTER pin (see section on Adjust-  
ingSLOWComp’sResponseTime). TheFASTCOMPtrips  
thecircuitbreakertoprotectagainstfastloadovercurrents  
if the transient voltage across the sense resistor is greater  
than150mVfor300ns.TheresponsetimeoftheLTC4211’s  
FAST COMP is fixed.  
R
M1  
Si4410DY  
SENSE  
V
0.007Ω  
OUT  
5V  
5A  
V
IN  
5V  
C
*
GX  
+
R1  
36k  
C
LOAD  
V
SENSE  
LTC4211**  
GATE  
CC  
FB  
R2  
15k  
4211 F07  
*VALUES ≤150nF SUGGESTED  
**ADDITIONAL DETAILS OMITTED  
FOR CLARITY  
V
SLEW RATE CONTROL  
GATE  
dV  
10µA  
+ C  
GATE  
dt  
=
(
)
C
GATE  
GX  
The timing diagram of Figure 6 illustrates when the  
LTC4211’s electronic circuit breaker is armed. After the  
first timing cycle, the LTC4211’s FAST COMP is armed at  
TimePoint5.ArmingFASTCOMPatTimePoint5ensures  
that the system is protected against a short-circuit  
condition during the second timing cycle after CLOAD has  
been fully charged. At Time Point 7, SLOW COMP is  
armed when the internal control loop is disengaged.  
Figure 7. Using an External Capacitor at GATE for  
GATE Voltage Slew Rate Control and Large CLOAD  
An external gate capacitor may also be useful to decrease  
or eliminate current spikes through the MOSFET when  
power is first applied. At power-up, the instantaneous in-  
put voltage step attempts to pull the MOSFET gate up  
through the MOSFET’s drain-to-gate capacitance. If the  
MOSFET’s CGS is small, the gate can be pulled up high  
enough to turn on the MOSFET, thereby allowing a current  
spike to the output. This event occurs during the time that  
the LTC4211 is coming out of UVLO and getting its intel-  
ligence to hold the GATE pin low. An external capacitor  
attenuates the voltage to which the GATE is pulled up and  
eliminates the current spike. The value required is depen-  
dent on the MOSFET capacitance specifications. In typical  
applications, this capacitor is not required.  
ThetimingdiagramsinFigures8and9illustratetheopera-  
tionoftheLTC4211whentheloadcurrentconditionsexceed  
the thresholds of the FAST COMP (VCB(FAST) > 150mV)  
and SLOW COMP (VCB(SLOW) > 50mV), respectively.  
RESETTING THE ELECTRONIC CIRCUIT BREAKER  
Once the LTC4211’s circuit breaker is tripped, FAULT is  
asserted low and the GATE pin is pulled to ground. The  
LTC4211 remains latched OFF in this fault state until the  
external fault is cleared. To clear the internal fault detect  
circuitry and to restart the LTC4211, its ON pin must be  
driven low (VON < 1.236V) for at least 150µs, after which  
time FAULT goes high. Toggling the ON pin from low to  
high (VON > 1.316V) initiates a restart sequence in the  
LTC4211. The timing diagram in Figure 10 illustrates a  
ELECTRONIC CIRCUIT BREAKER  
The LTC4211 features an electronic circuit breaker func-  
tion that protects against supply overvoltage, externally-  
generated fault conditions and shorts or excessive load  
current conditions on the supply. If the circuit breaker  
4211f  
17  
LTC4211  
U
OPERATIO  
FAST COMPARATOR ARMED  
SLOW COMPARATOR ARMED  
CIRCUIT BREAKER TRIPS  
SHORT CIRCUIT  
RESET PULLED LOW DUE TO POWER BAD  
1
2
3
4 5  
6
7 8 A B C  
V
ON  
CC  
TIMER  
GATE  
FPD  
V
OUT  
GATE  
POWER BAD  
< V  
POWER GOOD  
> V  
V
OUT  
V
FB  
REF  
V
FB  
REF  
RESET  
>150mV  
V
– V  
SENSE  
CC  
FAULT  
300ns  
TYP  
4211 F08  
Figure 8. Output Short Circuit Causes Fast Comparator to Trip the Circuit Breaker  
4211f  
18  
LTC4211  
U
OPERATIO  
FAST COMPARATOR ARMED  
SLOW COMPARATOR ARMED  
CIRCUIT BREAKER TRIPS  
RESET PULLED LOW DUE TO POWER BAD  
OVER CURRENT  
1
2
3
4 5  
6
7
8
A
B C  
V
ON  
CC  
TIMER  
GATE  
V
OUT  
FPD  
GATE  
POWER BAD  
< V  
POWER GOOD  
V
OUT  
V
FB  
REF  
V
> V  
FB  
REF  
RESET  
>50mV  
V
– V  
SENSE  
CC  
V
REF  
FILTER  
10µA  
2µA  
FAULT  
4211 F09  
CIRCUIT BREAKER TRIPS  
Figure 9. Mild Overcurrent Slow Comparator Trips the Circuit Breaker After Filter Programming Period  
4211f  
19  
LTC4211  
U
OPERATIO  
FAST COMPARATOR ARMED  
SLOW COMPARATOR ARMED  
CIRCUIT BREAKER TRIPS  
CIRCUIT BREAKER RESET  
1
2
3
4 5  
6
7
8
B
9
9A  
1
V
ON  
ON  
ON  
CC  
TIMER  
GATE  
FPD  
GATE  
OUT  
V
< V  
REF  
FB  
V
OUT  
V
RESET  
>50mV  
V
= 50mV  
SENSE  
V
– V  
CC  
SENSE  
FILTER  
FAULT  
REGULATING  
LOAD CURRENT  
t
FAULTSC  
V
REF  
10µA  
2µA  
4211 F10  
t
RESET  
Figure 10. Power-Up in Overcurrent, Slow Comparator Trips the Circuit Breaker  
start-up sequence where the LTC4211 is powered up into  
a load overcurrent condition. Note that the circuit breaker  
trips at Time Point B and is reset at Time Point 9A.  
increases.OncetheFILTERpinvoltageincreasesto1.236V,  
the electronic circuit breaker trips and the LTC4211’s  
GATE pin is switched quickly to ground by transistor M3.  
After the circuit breaker is tripped, M5 is turned OFF, M4  
is turned ON and the 10µA pull-down current then holds  
the FILTER pin voltage low.  
ADJUSTING SLOW COMP’S RESPONSE TIME  
The response time of SLOW COMP is adjusted using a  
capacitor connected from the LTC4211’s FILTER pin to  
ground. If this pin is left unused, SLOW COMP’s delay  
defaults to 20µs. During normal operation, the FILTER  
output pin is held low as an internal 10µA pull-down  
current source is connected to this pin by transistor M4.  
This pull-down current source is turned off when an  
overcurrent load condition is detected by SLOW COMP.  
During an overcurrent condition, the internal 2µA pull-up  
current source is connected to the FILTER pin by transis-  
tor M5, thereby charging CFILTER. As the charge on the  
capacitor accumulates, the voltage across CFILTER  
The SLOW COMP response time from an overcurrent fault  
condition to when the circuit breaker trips (GATE OFF) is  
given by Equation 7:  
CFILTER  
2µA  
tSLOWCOMP = 1.236V •  
+ 20µs  
(7)  
Forexample,ifCFILTER =1000pF,SLOWCOMP’sresponse  
time = 638µs. As a design aid, SLOW COMP’s delay time  
(tSLOWCOMP)versusCFILTER forstandardvaluesofCFILTER  
from 100pF to 1000pF is illustrated in Table 2.  
4211f  
20  
LTC4211  
U
OPERATIO  
Table 2. tSLOWCOMP vs CFILTER  
For proper circuit breaker operation, Kelvin-sense PCB  
connectionsbetweenthesenseresistorandtheLTC4211’s  
VCC and SENSE pins are strongly recommended. The  
drawing in Figure 11 illustrates the correct way of making  
connections between the LTC4211 and the sense resistor.  
PCB layout should be balanced and symmetrical to mini-  
mize wiring errors. In addition, the PCB layout for the  
sense resistor should include good thermal management  
techniques for optimal sense resistor power dissipation.  
C
t
SLOWCOMP  
FILTER  
100pF  
220pF  
330pF  
470pF  
680pF  
820pF  
1000pF  
82µs  
156µs  
224µs  
310µs  
440µs  
527µs  
638µs  
The power rating of the sense resistor should accommo-  
date steady-state fault current levels so that the compo-  
nent is not damaged before the circuit breaker trips.  
Table 4 in the Appendix lists sense resistors that can be  
used with the LTC4211’s circuit breaker.  
SENSE RESISTOR CONSIDERATIONS  
The fault current level at which the LTC4211’s internal  
electronic circuit breaker trips is determined by a sense  
resistorconnectedbetweentheLTC4211’sVCC andSENSE  
pins and two separate trip points. The first trip point is set  
by the SLOW COMP’s threshold, VCB(SLOW) = 50mV, and  
occurs should a load current fault condition exist for more  
than 20µs. The current level at which the electronic circuit  
breaker trips is given by Equation 8:  
IRC-TT SENSE RESISTOR  
CURRENT FLOW  
TO LOAD  
LR251201R010F  
OR EQUIVALENT  
0.01Ω, 1%, 1W  
CURRENT FLOW  
TO LOAD  
TRACK WIDTH W:  
0.03" PER AMP  
ON 1 OZ COPPER  
W
4211 F11  
VCB(SLOW)  
50mV  
RSENSE  
ITRIP(SLOW)  
=
=
(8)  
RSENSE  
TO  
CC  
TO  
SENSE  
V
ThesecondtrippointissetbytheFASTCOMP’sthreshold,  
VCB(FAST) = 150mV, and occurs during fast load current  
transients that exist for 300ns or longer. The current level  
at which the circuit breaker trips in this case is given by  
Equation 9:  
Figure 11. Making PCB Connections to the Sense Resistor  
CALCULATING CIRCUIT BREAKER TRIP CURRENT  
For a selected RSENSE value, the nominal load current that  
trips the circuit breaker is given by Equation 10:  
VCB(FAST)  
150mV  
RSENSE  
ITRIP(FAST)  
=
=
(9)  
VCB(NOM)  
50mV  
RSENSE  
ITRIP(NOM)  
=
=
(10)  
RSENSE(NOM) RSENSE(NOM)  
As a design aid, the currents at which electronic circuit  
breaker trips for common values for RSENSE are shown in  
Table 3.  
The minimum load current that trips the circuit breaker is  
given by Equation 11.  
Table 3. ITRIP(SLOW) and ITRIP(FAST) vs RSENSE  
VCB(MIN)  
RSENSE(MAX) RSENSE(MAX)  
40mV  
R
I
I
TRIP(FAST)  
SENSE  
TRIP(SLOW)  
ITRIP(MIN)  
where  
RSENSE(MAX) = RSENSE(NOM) • 1+  
=
=
(11)  
0.005Ω  
0.006Ω  
0.007Ω  
0.008Ω  
0.009Ω  
0.01Ω  
10A  
30A  
8.3A  
7.1A  
6.3A  
5.6A  
5A  
25A  
21A  
19A  
17A  
15A  
RTOL  
100  
4211f  
21  
LTC4211  
U
OPERATIO  
The maximum load current that trips the circuit breaker is  
given in Equation 12.  
Power MOSFETs are classified into two categories: stan-  
dard MOSFETs (RDS(ON) specified at VGS = 10V) and  
logic-level MOSFETs (RDS(ON) specified at VGS = 5V). The  
absolute maximum rating for VGS is typically ±20V for  
standard MOSFETs. However, the VGS maximum rating  
for logic-level MOSFETs ranges from ±8V to ±20V de-  
pending upon the manufacturer and the specific part  
number. The LTC4211’s GATE overdrive as a function of  
VCB(MAX)  
60mV  
RSENSE(MIN) RSENSE(MIN)  
ITRIP(MAX)  
where  
RSENSE(MIN) = RSENSE(NOM) • 1–  
=
=
(12)  
RTOL  
100  
V
CC isillustratedintheTypicalPerformancecurves.Logic-  
level MOSFETs are recommended for low supply voltage  
applicationsandstandardMOSFETscanbeusedforappli-  
cations where supply voltage is greater than 4.75V.  
For example:  
If a sense resistor with 7mΩ ±5% RTOL is used for current  
Note that in some applications, the gate of the external  
MOSFET can discharge faster than the output voltage  
when the circuit breaker is tripped. This causes a negative  
VGS voltage on the external MOSFET. Usually, the selected  
external MOSFET should have a ±VGS(MAX) rating that is  
higher than the operating input supply voltage to ensure  
that the external MOSFET is not destroyed by a negative  
VGS voltage. In addition, the ±VGS(MAX) rating of the  
MOSFET must be higher than the gate overdrive voltage.  
Lower ±VGS(MAX) rating MOSFETs can be used with the  
LTC4211 if the GATE overdrive is clamped to a lower  
voltage. The circuit in Figure 12 illustrates the use of Zener  
diodes to clamp the LTC4211’s GATE overdrive signal if  
lower voltage MOSFETs are used.  
limiting, the nominal trip current ITRIP(NOM) = 7.1A. From  
Equations 11 and 12, ITRIP(MIN) = 5.4A and ITRIP(MAX)  
9.02A respectively.  
=
For proper operation and to avoid the circuit breaker  
tripping unnecessarily, the minimum trip current  
(ITRIP(MIN)) must exceed the circuit’s maximum operating  
load current. For reliability purposes, the operation at the  
maximum trip current (ITRIP(MAX)) must be evaluated  
carefully. If necessary, two resistors with the same RTOL  
can be connected in parallel to yield an RSENSE(NOM) value  
that fits the circuit requirements.  
POWER MOSFET SELECTION CRITERIA  
R
Q1  
SENSE  
V
V
OUT  
To start the power MOSFET selection process, choose the  
maximum drain-to-source voltage, VDS(MAX), and the  
maximum drain current, ID(MAX) of the MOSFET. The  
VDS(MAX) rating must exceed the maximum input supply  
voltage (including surges, spikes, ringing, etc.) and the  
ID(MAX) rating must exceed the maximum short-circuit  
current in the system during a fault condition. In addition,  
consider three other key parameters: 1) the required gate-  
source (VGS) voltage drive, 2) the voltage drop across the  
drain-to-source on resistance, RDS(ON) and 3) the maxi-  
mum junction temperature rating of the MOSFET.  
CC  
D1*  
D2*  
R
G
200Ω  
GATE  
*USER SELECTED VOLTAGE CLAMP  
(A LOW BIAS CURRENT ZENER DIODE IS RECOMMENDED)  
1N4688 (5V)  
1N4692 (7V): LOGIC-LEVEL MOSFET  
1N4695 (9V)  
1N4702 (15V): STANDARD-LEVEL MOSFET  
4211 F12  
Figure 12. Optional Gate Clamp for Lower VGS(MAX) MOSFETs  
4211f  
22  
LTC4211  
U
OPERATIO  
The RDS(ON) of the external pass transistor should be low  
to make its drain-source voltage (VDS) a small percentage  
of VCC. At a VCC = 2.5V, VDS + VRSENSE = 0.1V yields 4%  
error at the output voltage. This restricts the choice of  
MOSFETs to very low RDS(ON). At higher VCC voltages, the  
VDS requirement can be relaxed in which case MOSFET  
package dissipation (PD and TJ) may limit the value of  
RDS(ON). Table 5 lists some power MOSFETs that can be  
used with the LTC4211.  
PCB CONNECTION SENSE  
There are a number of ways to use the LTC4211’s ON pin  
to detect whether the printed circuit board has been fully  
seated in the backplane before the LTC4211 commences  
a start-up cycle.  
The first example is shown in the schematic on the front  
page of this data sheet. In this case, the LTC4211 is  
mounted on the PCB and a 20k/10k resistive divider is  
connected to the ON pin. On the edge connector, R1 is  
wired to a short pin. Until the connectors are fully mated,  
the ON pin is held low, keeping the LTC4211 in an OFF  
state.Oncetheconnectorsaremated,theresistivedivider  
is connected to VCC, VON > 1.316V and the LTC4211  
begins a start-up cycle.  
For reliable circuit operation, the maximum junction tem-  
perature (TJ(MAX)) for a power MOSFET should not exceed  
the manufacturer’s recommended value. This includes  
normal mode operation, start-up, current-limit and  
autoretry mode in a fault condition. Under normal condi-  
tionsthejunctiontemperatureofapowerMOSFETisgiven  
by Equation 13:  
In Figure 13, an LTC4211 is illustrated in a basic configu-  
ration on a PCB daughter card. The ON pin is connected to  
VCC on the backplane through a 10k pull-up resistor once  
the card is seated into the backplane. R2 bleeds off any  
potentialstaticchargewhichmightexistonthebackplane,  
the connector or during card installation.  
MOSFET Junction Temperature,  
T
J(MAX) ≤ TA(MAX) + θJA • PD  
(13)  
where  
PD = (ILOAD)2 • RDS(ON)  
A third example is shown in Figure 14 where the LTC4211  
is mounted on the backplane. In this example, a 2N2222  
transistor and a pair of resistors (R4, R5) form the PCB  
connection sense circuit. With the card out of the chassis,  
Q2’s base is biased to VCC through R5, biasing Q2 ON and  
driving the LTC4211’s ON pin low. The base of Q2 is also  
wiredtoasocketonthebackplaneconnector.Whenacard  
is firmly seated into the backplane, the base of Q2 is then  
grounded through a short pin connection on the card. Q2  
is biased OFF, the LTC4211’s ON pin is pulled-up to VCC  
and a start-up cycle begins.  
θJA = junction-to-ambient thermal resistance  
TA(MAX) = maximum ambient temperature  
If a short circuit happens during start-up, the external  
MOSFET can experience a big single pulse energy. This is  
especially true if the applications only employed a small  
gate capacitor or no gate capacitor at all. Consult the safe  
operating area (SOA) curve of the selected MOSFET to  
ensure that the TJ(MAX) is not exceeded during start-up.  
USING STAGGERED PIN CONNECTORS  
In the previous three examples, the connection sense was  
hardwiredwithnoprocessor(low)interruptcapability. As  
illustrated in Figure 15, the addition of an inexpensive  
logic-level discrete MOSFET and a couple of resistors  
offersprocessorinterruptcontroltotheconnectionsense.  
R4 keeps the gate of M2 at VCC until the card is firmly  
mated to the backplane. A logic low for the ON/OFF signal  
turns M2 OFF, allows the ON pin to pull high and turns on  
the LTC4211.  
The LTC4211 can be used on either a printed circuit board  
or on the backplane side of the connector, and examples  
for both are shown in Figures 13 and 14. Printed circuit  
board edge connectors with staggered pins are recom-  
mended as the insertion and removal of circuit boards do  
sequence the pin connections. Supply voltage and ground  
connections on the printed circuit board should be wired  
to the edge connector’s long pins or blades. Control and  
statussignals(likeRESET,FAULTandON)passingthrough  
the card’s edge connector should be wired to short length  
pins or blades.  
4211f  
23  
LTC4211  
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APPLICATIO S I FOR ATIO  
BACKPLANE PCB EDGE  
CONNECTOR CONNECTOR  
(FEMALE)  
(MALE)  
V
IN  
5V  
R
SENSE  
Q1  
Si4410DY  
0.007Ω  
V
5V  
5A  
OUT  
LONG  
5V  
V
CC  
R1  
10Ω  
C1  
0.1µF  
Z1*  
R6  
10k  
SHORT  
SHORT  
1
2
8
+
RESET  
RESET  
ON  
V
CC  
C
OUT  
7
SENSE  
R2  
10k  
LTC4211  
R4  
6
5
GATE  
FB  
36k  
LONG  
4
GND  
Z1 = 1SMA10A OR SMAJ10A  
* OPTIONAL  
R5  
TIMER  
15k  
3
4211 F13  
C
10nF  
TIMER  
Figure 13. Hot Swap Controller On Daughter Board (Staggered Pin Connections)  
BACKPLANE PCB EDGE  
CONNECTOR CONNECTOR  
(FEMALE)  
(MALE)  
R
SENSE  
Q1  
Si4410DY  
0.007Ω  
V
5V  
5A  
OUT  
LONG  
LONG  
V
IN  
5V  
+
C
R
OUT  
X
Z1*  
10Ω  
X
C
8
7
R1  
36k  
R5  
10k  
R4  
0.1µF  
10k  
V
SENSE  
GATE  
CC  
PCB  
2
4
6
ON  
CONNECTION  
SENSE  
R3  
10k  
LTC4211  
RESET  
Q2  
SHORT  
SHORT  
SHORT  
1
5
RESET  
GND  
FB  
R2  
100k  
TIMER  
3
R7  
15k  
4211 F14  
C
TIMER  
10nF  
Z1 = 1SMA10A OR SMAJ10A  
* OPTIONAL  
Figure 14. Hot Swap Controller on Backplane (Staggered Pin Connections)  
ofQ1andQ2finallymatetothebackplane,theirbasesare  
grounded, biasing the transistors OFF. The ON pin volt-  
age is then pulled high by R3 enabling the LTC4211 and  
a power-up cycle begins.  
A more elaborate connection sense scheme is shown in  
Figure 16. The bases of Q1 and Q2 are wired to short pins  
located on opposite ends of the edge connector because  
the installation/removal of printed circuit cards generally  
requires rocking the card back and forth. When VCC  
makesconnection,thebasesoftransistorsQ1andQ2are  
pulled high, biasing them ON. When either one of them is  
ON, the LTC4211’s ON pin is held low, keeping the  
LTC4211 OFF. When both the short base connector pins  
A software-initiated power-down cycle can be started by  
momentarilydrivingtransistorM1withalogichighsignal.  
This in turn will drive the LTC4211’s ON pin low. If the ON  
pin is held low for more than 8µs, the LTC4211’s GATE pin  
is switched to ground.  
4211f  
24  
LTC4211  
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BACKPLANE PCB EDGE  
CONNECTOR CONNECTOR  
(FEMALE)  
(MALE)  
R
M1  
Si4410DY  
SENSE  
V
5V  
5A  
0.007Ω  
OUT  
LONG  
V
CC  
5V  
+
R
X
C
LOAD  
10Ω  
X
Z1*  
C
100nF  
8
7
6
R5  
36k  
R7  
10k  
V
SENSE  
GATE  
FB  
CC  
5
1
R1  
R4  
10k  
R6  
15k  
10k  
SHORT  
SHORT  
2
µP  
LTC4211  
ON  
LOGIC  
RESET  
RESET  
M2  
ON/OFF  
GND  
R2  
10k  
TIMER  
3
GND  
4
C
TIMER  
10nF  
PCB CONNECTION SENSE  
LONG  
4211 F15  
ZZ1 = 1SMA10A OR SMAJ10A  
M2: 2N7002LT1  
* OPTIONAL  
Figure 15. Connection Sense with ON/OFF Control  
BACKPLANE PCB EDGE  
CONNECTOR CONNECTOR  
LAST BLADE OR PIN ON CONNECTOR  
(FEMALE)  
(MALE)  
SHORT  
LONG  
R
M2  
Si4410DY  
SENSE  
PCB CONNECTION SENSE  
V
5V  
5A  
0.007Ω  
OUT  
V
CC  
+
R
X
C
LOAD  
10Ω  
Z1*  
C
X
0.1µF  
R1  
R2  
R3  
10k  
8
7
6
10k 10k  
R4  
36k  
R7  
10k  
V
SENSE  
GATE  
FB  
CC  
5
1
R5  
15k  
2
µP  
LTC4211  
ON  
LOGIC  
R8  
10k  
RESET  
RESET  
Q1  
TIMER  
3
GND  
Q2  
4
SHORT  
ON/RESET  
GND  
M1  
C
TIMER  
10nF  
LONG  
4211 F16  
SHORT  
Z1 = 1SMA10A OR SMAJ10A  
M1: 2N7002LT1  
Q1, Q2: MMBT3904LT1  
* OPTIONAL  
LAST BLADE OR PIN ON CONNECTOR  
Figure 16. Connection Sense for Rocking the Daughter Board Back and Forth  
4211f  
25  
LTC4211  
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APPLICATIO S I FOR ATIO  
12V Hot Swap Application  
Figure 18. In this case, the autoretry circuitry will attempt  
to restart the LTC4211 with a 50% duty cycle, as shown in  
the timing diagram of Figure 19. To prevent overheating  
the external MOSFET and other components during the  
autoretry sequence, adding a capacitor (CAUTO) to the  
circuit introduces an RC time constant (tOFF) that adjusts  
the autoretry duty cycle. Equation 14 gives the autoretry  
duty cycle, modified by this external time constant:  
Figure 17 shows a 12V, 3A hot swap application circuit.  
The resistor divider R1/R2 programs the undervoltage  
lockout externally and allows the system to start up after  
VCC increases above 9.46V. The resistor divider R3/R4  
monitors VOUT and signals the RESET pin when VOUT goes  
above 10.54V. Transient voltage suppressor Z1 and snub-  
ber network (CX, RX) are highly recommended to protect  
the 12V applications system from ringing and voltage  
spikes. RG is recommended for VCC > 10V and it can  
minimizehighfrequencyparasiticoscillationsinthepower  
MOSFET.  
tTIMER  
OFF + 2• tTIMER  
AutoretryDuty Cycle ≈  
•100%  
(14)  
t
where tTIMER = LTC4211 system timing(see TIMER func-  
tion) and tOFF is a time needed to charge capacitor CAUTO  
from 0V to the ON pin threshold (1.316V).  
AUTORETRY AFTER A FAULT  
To configure the LTC4211 to automatically retry after a  
fault condition, the FAULT and ON pins can be connected  
to a pull-up resistor (RAUTO) to the supply, as shown in  
For the values shown, the external RC time constant is set  
at 1 second, the tTIMER delay equals 6.2ms and the  
autoretry duty cycle drops from 50% to 2.5%.  
BACKPLANE PCB EDGE  
CONNECTOR CONNECTOR  
(FEMALE)  
(MALE)  
R
M1  
Si4410DY  
SENSE  
0.012Ω  
V
12V  
3A  
OUT  
LONG  
V
CC  
12V  
+
R
X
C
LOAD  
10Ω  
X
Z1**  
R
G
C
100Ω  
100nF  
8
7
6
R5  
R3  
93.1k  
10k  
V
SENSE  
GATE  
CC  
5
1
FB  
R1  
61.9k  
R4  
12.4k  
SHORT  
2
µP  
LTC4211  
ON  
LOGIC  
R2  
10k  
RESET  
RESET  
TIMER  
3
GND  
4
PCB CONNECTION SENSE  
LONG  
C
TIMER  
8.2nF  
GND  
GND  
4211 F17  
Z1 = 1SMA12A OR SMAJ12A  
** HIGHLY RECOMMENDED  
Figure 17. 12V Hot Swap Application  
BACKPLANE PCB EDGE  
CONNECTOR CONNECTOR  
(FEMALE)  
(MALE)  
Q1  
Si4410DY  
R
SENSE  
0.007Ω  
V
5V  
5A  
OUT  
LONG  
V
CC  
5V  
R3  
R
R
PULL-UP  
10k  
AUTO  
(SEE NOTE)  
10Ω  
Z1*  
C1  
0.1µF  
R1  
36k  
+
SHORT  
1
2
10  
9
RESET  
C
LOAD  
RESET  
ON  
FAULT  
R2  
15k  
V
CC  
LTC4211MS  
FILTER SENSE  
3
4
5
8
7
6
C
FILTER  
100pF  
TIMER  
GND  
GATE  
FB  
NOTE:  
2
Q1 MOUNTED TO 300mm COPPER AREA  
= 1M YIELDS 2.5%  
AUTO  
DUTY CYCLE AND Q1 T  
= 3.2M YIELDS 0.8%  
AUTO  
DUTY CYCLE AND Q1 T  
C
AUTO  
1µF  
C
TIMER  
10nF  
R
= 50°C  
= 37°C  
CASE  
CASE  
LONG  
Z1 = 1SMA10A OR SMAJ10A  
* OPTIONAL  
R
GND  
4211 F18  
Figure 18. LTC4211MS Autoretry Application  
4211f  
26  
LTC4211  
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APPLICATIO S I FOR ATIO  
U
FAST COMPARATOR ARMED  
SLOW COMPARATOR ARMED  
1
2
3
4 5  
6
7
8
B
ON/FAULT  
ON/FAULT  
V
CC  
t
RESET  
TIMER  
GATE  
FPD  
GATE  
OUT  
V
< V  
REF  
FB  
V
V
OUT  
RESET  
>50mV  
V
= 50mV  
SENSE  
V
CC  
– V  
SENSE  
REGULATED  
LOAD CURRENT  
V
REF  
10µA  
FILTER  
2µA  
t
t
1
t
t
t
OFF  
OFF  
2
FILTER  
4211 F19  
t
2
DUTY CYCLE =  
(t  
FILTER  
<< t , t AND t  
)
1
2
OFF  
t
+ t + t  
OFF  
1 2  
Figure 19. Autoretry Timing  
with20msdelaysetbyR6andC2.Onthefallingedge,both  
supplies ramp down together because D1 and D2 bypass  
R1 and R6.  
To increase the RC delay, the user may either increase  
CAUTO or RAUTO. However, increasing CAUTO > 2µF will  
actually limit the RC delay due to the reset sink-current  
capability of the FAULT pin. Therefore, in order to increase  
the RC delay, it is more effective to either increase RAUTO  
or to put a bleed resistor in parallel with CAUTO to GND. As  
an example, increasing RAUTO from 1M to 3.2M decreases  
duty cycle to 0.8%.  
OVERVOLTAGE TRANSIENT PROTECTION  
Good engineering practice calls for bypassing the supply  
rail of any analog circuit. Bypass capacitors are often  
placed at the supply connection of every active device, in  
additiontooneormorelargevaluebulkbypasscapacitors  
per supply rail. If power is connected abruptly, the large  
bypass capacitors slow the rate of rise of the supply  
voltage and heavily damp any parasitic resonance of lead  
or PC track inductance working against the supply bypass  
capacitors.  
HOT SWAPPING TWO SUPPLIES  
Using two external pass transistors, the LTC4211 can  
switch two supply voltages. In some cases, it is necessary  
to bring up the dominant supply first during power-up but  
ramp them down together during the power-down phase.  
The circuit in Figure 20 shows how to program two  
different delays for the pass transistors. The 5V supply is  
powered up first. R1 and C3 are used to set the rise and fall  
times on the 5V supply. Next, the 3.3V supply ramps up  
The opposite is true for LTC4211 Hot Swap circuits  
mounted on plug-in cards. In most cases, there is no  
supply bypass capacitor present on the powered supply  
4211f  
27  
LTC4211  
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APPLICATIO S I FOR ATIO  
BACKPLANE PCB EDGE  
CONNECTOR CONNECTOR  
5V OUT  
3.3V OUT  
(FEMALE)  
(MALE)  
Q2  
1/2 Si4936DY  
V
3.3V  
2A  
OUT1  
LONG  
3.3V  
5V  
R8  
10Ω  
C4  
+
+
D3**  
Z1*  
Z2*  
C
C
LOAD  
LOAD  
R2  
0.015Ω  
5%  
R7  
10Ω  
5%  
Q1  
CURRENT LIMIT: 3.3A  
0.1µF  
1/2 Si4936DY  
V
5V  
2A  
OUT2  
LONG  
R9  
10Ω  
C5  
10k  
D1  
R3  
1N4148  
D2  
1N4148  
LTC4211  
10Ω  
0.1µF  
SHORT  
SHORT  
5%  
1
2
3
4
8
7
6
5
RESET  
ON  
RESET  
ON  
V
CC  
R6  
1M  
5%  
R1  
10k  
5%  
R4  
2.74k  
1%  
SENSE  
R11  
10k  
R10  
10k  
TIMER GATE  
GND FB  
TRIP POINT: 4.06V  
R5  
C1  
10nF  
16V  
C3  
C2  
0.022µF  
25V  
0.047µF  
1.2k  
1%  
LONG  
25V  
4211 F20  
GND  
Z1, Z2: 1SMA10A OR SMAJ10A  
* OPTIONAL  
**D3 IS OPTIONAL AND HELPS DISCHARGE V  
IF V  
SHORTS  
OUT1  
OUT2  
Figure 20. Switching 5V and 3.3V  
voltage side of the MOSFET switch. An abrupt connection,  
produced by inserting the board into a backplane connec-  
tor, resultinginafastrisingedgeappliedonthesupplyline  
of the LTC4211.  
voltage such as 5V, usually a snubber is adequate to  
reduce the supply ringing. Although, the need of a tran-  
sient voltage suppressor arises for inductive and high  
current application. Note that in all LTC4211 5V applica-  
tions schematics, transient suppressor and snubber net-  
works have been added for protection. The transient  
suppressor is optional and a simple short-circuit test can  
beperformedtodeterminetheneedofit.Theseprotection  
networks should be mounted very close to the LTC4211’s  
supply input rail using short lead lengths to minimize lead  
inductance. This is shown schematically in Figure 21, and  
arecommendedlayoutofthetransientprotectiondevices  
around the LTC4211 is shown in Figure 22.  
Since there is no bulk capacitance to damp the parasitic  
track inductance, supply voltage transients excite  
parasitic resonant circuits formed by the power MOSFET  
capacitance and the combined parasitic inductance from  
the wiring harness, the backplane and the circuit board  
traces.  
In these applications, there are two methods that should  
be applied together for eliminating these supply voltage  
transients: using transient voltage suppressor to clip the  
transient to a safe level and snubber networks. Snubber  
networks are series RC networks whose time constants  
areexperimentallydeterminedbasedontheboard’spara-  
siticresonancecircuits. Asastartingpoint, thecapacitors  
in these networks are chosen to be 10× to 100× the power  
MOSFET’s COSS under bias. The series resistor is a value  
determined experimentally and ranges from 1Ω to 50Ω,  
depending on the parasitic resonance circuit. For applica-  
tionswithsupplyvoltagesof12Vorhighertheringingand  
overshoot during hot-swapping or when the output is  
short-circuited can easily exceed the absolute maximum  
specification of the LTC4211. To reduce the danger,  
transient voltage suppressors and snubber networks are  
highly recommended. For applications with lower supply  
R
Q1  
Si4410DY  
SENSE  
0.007Ω  
V
OUT  
5V  
5A  
V
IN  
5V  
R1  
36k  
+
8
7
6
V
SENSE  
LTC4211  
TIMER  
GATE  
FB  
CC  
5
R
X
C
OUT  
10Ω  
R2  
15k  
Z1*  
1
2
C
X
RESET  
ON  
RESET  
ON  
0.1µF  
GND  
4
3
C
TIMER  
INPUT  
GND  
OUTPUT  
GND  
Z1 = 1SMA10A OR SMAJ10A  
* OPTIONAL  
4211 F21  
Figure 21. Placing Transient Protection Devices  
Close to the LTC4211’s Input Rail  
4211f  
28  
LTC4211  
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APPLICATIO S I FOR ATIO  
CURRENT FLOW  
TO LOAD  
CURRENT FLOW  
TO LOAD  
POWER MOSFET  
(SO-8)  
SENSE RESISTOR  
(R  
)
SENSE  
D
D
D
D
G
S
S
S
W
W
C
X
X
Z1*  
R
GX  
*
C
*
GX  
TRANSIENT  
VOLTAGE  
SNUBBER  
NETWORK  
VIA TO  
GND PLANE  
SUPPRESSOR  
R
R4  
15k  
R3  
36k  
NOTES:  
LTC4211**  
DRAWING IS NOT TO SCALE!  
*OPTIONAL COMPONENTS  
**ADDITIONAL DETAILS OMITTED  
FOR CLARITY  
1
C
TIMER  
10nF  
CURRENT FLOW  
FROM LOAD  
W
4211 F28  
Figure 22. Recommended Layout for LTC4211 Protection Devices, RSENSE, Power MOSFET and Feedback Network  
4211f  
29  
LTC4211  
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APPLICATIO S I FOR ATIO  
SUPPLY OVERVOLTAGE DETECTION/  
PROTECTION USING FILTER PIN  
In addition to using external protection devices around the  
LTC4211 for large scale transient protection, low power  
Zener diodes can be used with the LTC4211’s FILTER pin  
to act as a supply overvoltage detection/protection circuit  
on either the high side (input) or low side (output) of the  
external pass transistor. Recall that internal control cir-  
cuitry keeps the LTC4211 GATE voltage from ramping up  
if VFILTER > 1.156V, or when an external fault condition  
(VFILTER > 1.236V) causes FAULT to be asserted low.  
threshold.Asaresult,theGATEpinisnotallowedtoramp  
and the second timing cycle will not commence until the  
supply overvoltage condition is removed. Should the  
supply overvoltage condition occur during normal op-  
eration, internal control logic would trip the electronic  
circuit breaker and the GATE would be pulled to ground,  
shutting OFF the external pass transistor. If a lower  
supply overvoltage threshold is desired, use a Zener  
diode with a smaller breakdown voltage.  
AtimingdiagramforillustratingLTC4211operationunder  
a high side overvoltage condition is shown in Figure 24.  
The start-up sequence in this case (between Time Points  
1 and 2) is identical to any other start-up sequence under  
normal operating conditions. At Time Point 2A, the input  
supply voltage causes the Zener diode to conduct thereby  
forcing VFILTER > 1.156V. At Time Point 3, FAULT is  
asserted low and the TIMER pin voltage ramps down. At  
Time Point 4, the LTC4211 checks if VFILTER < 1.156V.  
High Side (Input) Overvoltage Protection  
As shown in Figure 23, a low power Zener diode can be  
used to sense an overvoltage condition on the input  
(high) side of the main 5V supply. In this example, a low  
bias current 1N4691 Zener diode is chosen to protect the  
system. Here, the Zener diode is connected from VCC to  
the LTC4211’s FILTER pin (Pin 3 MS). If the input voltage  
to the system is greater than 6.8V during start-up, the  
voltage on the FILTER pin is pulled higher than its 1.156V  
BACKPLANE PCB EDGE  
CONNECTOR CONNECTOR  
(FEMALE)  
(MALE)  
LONG  
5V  
R3  
10Ω  
C1  
R4  
10k  
R
SENSE  
0.007Ω  
Q1  
Si4410DY  
Z1*  
V
5V  
5A  
OUT  
0.1µF  
SHORT  
FAULT  
R1  
R5  
Z2  
LTC4211  
36k  
10k  
+
6.2V  
SHORT  
SHORT  
1
2
3
4
5
10  
9
C
LOAD  
RESET  
RESET FAULT  
R2  
15k  
ON/OFF  
ON  
V
CC  
R6  
10k  
R7  
10k  
8
FILTER SENSE  
TIMER GATE  
7
C
47pF  
C
FILTER  
TIMER  
6
4211 F23  
10nF  
GND  
FB  
LONG  
GND  
Z1 = 1SMA10A OR SMAJ10A  
Z2 = 1N4691  
* OPTIONAL  
Figure 23. LTC4211MS High Side Overvoltage Protection Implementation  
4211f  
30  
LTC4211  
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APPLICATIO S I FOR ATIO  
U
IF ANY FAULT HAPPENS  
AFTER THIS POINT, THE  
CIRCUIT BREAKER TRIPS  
AND FAULT LATCHES LOW  
SLOW COMPARATOR ARMED  
OVERVOLTAGE CIRCUIT BREAKER  
IF OVERVOLTAGE GOES  
AWAY, SECOND CYCLE  
CONTINUES  
TRIPS, GATE PULLS DOWN AND  
FAULT LATCHES LOW  
OVERVOLTAGE  
2A  
1
2
3
4
5
6
7
8
A B C  
V
CC  
ON  
TIMER  
GATE  
V
FPD  
OUT  
POWER BAD  
< V  
GATE  
OUT  
V
V
POWER GOOD  
> V  
FB  
REF  
V
FB  
REF  
RESET  
FILTER  
FAULT  
>V  
REF  
– 80mV  
>V  
REF  
4211 F24  
FAULT  
LATCHED LOW  
FAULT IS PULLED LOW (BUT NOT LATCHED)  
DUE TO A START-UP OVERVOLTAGE PROBLEM  
Figure 24. High Side Overvoltage Protection  
FAULT is asserted low (but not latched) to indicate a start-  
up failure. Only if the input overvoltage condition is re-  
moved before Time Point 5 does the start-up sequence  
resumeatthesecondtimingcycle.Atthispointintime,the  
GATE pin voltage is allowed to ramp up, FAULT is pulled  
to logic high and the circuit breaker is armed. Should, at  
anytimeafterTimePoint5,asupplyovervoltagecondition  
develop (VFILTER > 1.236V), the electronic circuit breaker  
will trip, the GATE will be pulled low to turn off the external  
MOSFET and FAULT will be asserted low and latched. This  
sequence is shown in detail at Time Point B.  
Low Side (Output) Overvoltage Protection  
A Zener diode can be used in a similar fashion to detect/  
protect the system against a supply overvoltage condition  
ontheload(orlow)sideofthepasstransistor.Inthiscase,  
theZenerdiodeisconnectedfromtheloadtotheLTC4211’s  
FILTER pin, as shown in Figure 25. An additional diode,  
D1, prevents the FILTER pin from pulling low during an  
output short-circuit. Figure 26 illustrates the timing dia-  
gram for a low side output overvoltage condition. In this  
example, the LTC4211 can only sense the overvoltage  
supply condition after Time Point 5 and the GATE pin has  
4211f  
31  
LTC4211  
W U U  
U
APPLICATIO S I FOR ATIO  
BACKPLANE PCB EDGE  
CONNECTOR CONNECTOR  
(FEMALE)  
(MALE)  
D1  
IN4148  
LONG  
5V  
R3  
10k  
R4  
10Ω  
C1  
R
Q1  
Si4410DY  
SENSE  
0.007Ω  
Z1*  
V
OUT  
5V  
5A  
0.1µF  
SHORT  
FAULT  
R1  
R5  
Z2  
LTC4211  
RESET FAULT  
ON  
36k  
+
10k  
6.2V  
SHORT  
SHORT  
C
1
2
3
4
5
10  
9
LOAD  
RESET  
R2  
15k  
ON/OFF  
V
CC  
R6  
10k  
R7  
10k  
8
FILTER SENSE  
TIMER GATE  
7
C
C
FILTER  
47pF  
TIMER  
10nF  
6
4211 F25  
GND  
FB  
LONG  
GND  
Z1 = 1SMA10A OR SMAJ10A  
Z2 = 1N4691  
* OPTIONAL  
Figure 25. LTC4211MS Low Side Overvoltage Protection Implementation  
OVERVOLTAGE SENSED BY FILTER PIN CIRCUIT BREAKER TRIPS  
1
2
3 4 5  
6A 6B  
V
ON  
CC  
TIMER  
GATE  
V
OUT  
FPD  
RESET  
FILTER  
V
REF  
FAULT  
4211 F26  
Figure 26. Low Side Overvoltage Protection  
4211f  
32  
LTC4211  
W U U  
APPLICATIO S I FOR ATIO  
U
ramped up to its nominal operating value. After Time can reach 10A or more, narrow PCB tracks exhibit more  
Point 5, a supply voltage fault occurs at the load and the resistance than wider tracks and operate at more elevated  
Zener diode begins to conduct, causing VFILTER to in- temperatures. Since the sheet resistance of 1 ounce cop-  
crease. At Time Point 6A, VFILTER is greater than 1.236V, per foil is approximately 0.54mΩ/square, track resis-  
thecircuitbreakeristripped,theGATEpinvoltageispulled tances add up quickly in high current applications. Thus,  
to ground and FAULT is asserted low and latched.  
to keep PCB track resistance and temperature rise to a  
minimum, PCB track width must be appropriately sized.  
Consult Appendix A of LTC Application Note 69 for details  
on sizing and calculating trace resistances as a function of  
copper thickness.  
In either case, the LTC4211 can be configured to auto-  
matically initiate a start-up sequence. Please refer to the  
section on AutoRetry After a Fault for additional  
information.  
In the majority of applications, it will be necessary to use  
plated-through vias to make circuit connections from  
component layers to power and ground layers internal to  
the PC board. For 1 ounce copper foil plating, a good  
starting point is 1A of DC current per via, making sure the  
via is properly dimensioned so that solder completely fills  
any void. For other plating thicknesses, check with your  
PCB fabrication facility.  
PCB Layout Considerations  
For proper operation of the LTC4211’s circuit breaker  
function, a 4-wire Kelvin connection to the sense resistors  
is highly recommended. A recommended PCB layout for  
the sense resistor, the power MOSFET and the GATE drive  
components around the LTC4211 is illustrated in  
Figure 22. In Hot Swap applications where load currents  
4211f  
33  
LTC4211  
U
APPE DIX  
Table4listssomecurrentsenseresistorsthatcanbeused  
withthecircuitbreaker.Table5listssomepowerMOSFETs  
that are available. Table 6 lists the web sites of several  
manufacturers.Sincethisinformationissubjecttochange,  
please verify the part numbers with the manufacturer.  
Table 4. Sense Resistor Selection Guide  
CURRENT LIMIT VALUE  
PART NUMBER  
LR120601R050  
LR120601R025  
LR120601R020  
WSL2512R015F  
LR251201R010F  
WSR2R005F  
DESCRIPTION  
MANUFACTURER  
IRC-TT  
1A  
0.05Ω 0.5W 1% Resistor  
0.025Ω 0.5W 1% Resistor  
0.02Ω 0.5W 1% Resistor  
0.015Ω 1W 1% Resistor  
0.01Ω 1.5W 1% Resistor  
0.005Ω 2W 1% Resistor  
2A  
IRC-TT  
2.5A  
3.3A  
5A  
IRC-TT  
Vishay-Dale  
IRC-TT  
10A  
Vishay-Dale  
Table 5. N-Channel Selection Guide  
CURRENT LEVEL (A)  
PART NUMBER  
DESCRIPTION  
MANUFACTURER  
0 to 2  
MMDF3N02HD  
MMSF5N02HD  
MTB50N06V  
Dual N-Channel SO-8  
ON Semiconductor  
R
= 0.1Ω, C = 455pF  
DS(ON)  
ISS  
2 to 5  
Single N-Channel SO-8  
= 0.025Ω, C = 1130pF  
ON Semiconductor  
ON Semiconductor  
ON Semiconductor  
R
DS(ON)  
ISS  
5 to 10  
10 to 20  
Single N-Channel DD Pak  
= 0.028Ω, C = 1570pF  
R
DS(ON)  
ISS  
MTB75N05HD  
Single N-Channel DD Pak  
= 0.0095Ω, C = 2600pF  
R
DS(ON)  
ISS  
Table 6. Manufacturers’ Web Sites  
MANUFACTURER  
TEMIC Semiconductor  
International Rectifier  
ON Semiconductor  
Harris Semiconductor  
IRC-TT  
WEB SITE  
www.temic.com  
www.irf.com  
www.onsemi.com  
www.semi.harris.com  
www.irctt.com  
Vishay-Dale  
www.vishay.com  
www.vishay.com  
www.diodes.com  
Vishay-Siliconix  
Diodes, Inc.  
4211f  
34  
LTC4211  
U
PACKAGE DESCRIPTIO  
MS8 Package  
8-Lead Plastic MSOP  
(Reference LTC DWG # 05-08-1660)  
3.00 ± 0.102  
(.118 ± .004)  
(NOTE 3)  
0.52  
(.206)  
REF  
8
7 6  
5
0.889 ± 0.127  
(.035 ± .005)  
3.00 ± 0.102  
(.118 ± .004)  
NOTE 4  
4.88 ± 0.1  
(.192 ± .004)  
DETAIL “A”  
0.254  
5.23  
(.206)  
MIN  
3.2 – 3.45  
(.126 – .136)  
(.010)  
0° – 6° TYP  
GAUGE PLANE  
1
2
3
4
0.65  
(.0256)  
BSC  
0.42 ± 0.04  
0.53 ± 0.015  
(.021 ± .006)  
1.10  
(.043)  
MAX  
0.86  
(.034)  
REF  
(.0165 ± .0015)  
TYP  
DETAIL “A”  
RECOMMENDED SOLDER PAD LAYOUT  
0.18  
(.077)  
SEATING  
PLANE  
NOTE:  
1. DIMENSIONS IN MILLIMETER/(INCH)  
2. DRAWING NOT TO SCALE  
0.22 – 0.38  
(.009 – .015)  
0.13 ± 0.05  
(.005 ± .002)  
0.65  
(.0256)  
BCS  
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.  
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE  
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.  
MSOP (MS8) 0102  
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE  
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX  
MS Package  
10-Lead Plastic MSOP  
(Reference LTC DWG # 05-08-1661)  
3.00 ± 0.102  
(.118 ± .004)  
(NOTE 3)  
0.497 ± 0.076  
(.0196 ± .003)  
REF  
10 9  
8
7 6  
0.889 ± 0.127  
(.035 ± .005)  
3.00 ± 0.102  
(.118 ± .004)  
NOTE 4  
4.88 ± 0.10  
(.192 ± .004)  
DETAIL “A”  
0.254  
5.23  
(.206)  
MIN  
3.2 – 3.45  
(.126 – .136)  
(.010)  
0° – 6° TYP  
GAUGE PLANE  
1
2
3
4 5  
0.50  
(.0197)  
BSC  
0.305 ± 0.038  
(.0120 ± .0015)  
TYP  
0.53 ± 0.01  
(.021 ± .006)  
0.86  
(.034)  
REF  
1.10  
(.043)  
MAX  
DETAIL “A”  
RECOMMENDED SOLDER PAD LAYOUT  
0.18  
(.007)  
SEATING  
PLANE  
NOTE:  
0.17 – 0.27  
(.007 – .011)  
0.13 ± 0.05  
(.005 ± .002)  
MSOP (MS) 1001  
1. DIMENSIONS IN MILLIMETER/(INCH)  
2. DRAWING NOT TO SCALE  
0.50  
(.0197)  
TYP  
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.  
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE  
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.  
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE  
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX  
S8 Package  
8-Lead Plastic Small Outline (Narrow .150 Inch)  
(Reference LTC DWG # 05-08-1610)  
0.189 – 0.197*  
(4.801 – 5.004)  
0.010 – 0.020  
(0.254 – 0.508)  
7
5
8
6
× 45°  
0.053 – 0.069  
(1.346 – 1.752)  
0.004 – 0.010  
(0.101 – 0.254)  
0.008 – 0.010  
(0.203 – 0.254)  
0°– 8° TYP  
0.150 – 0.157**  
(3.810 – 3.988)  
0.228 – 0.244  
(5.791 – 6.197)  
0.016 – 0.050  
(0.406 – 1.270)  
0.050  
(1.270)  
BSC  
0.014 – 0.019  
(0.355 – 0.483)  
TYP  
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH  
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE  
SO8 1298  
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD  
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE  
1
2
3
4
4211f  
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.  
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-  
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.  
35  
LTC4211  
U
TYPICAL APPLICATIO S  
LOW COST OVERVOLTAGE PROTECTION  
COMPcircuitbreakerisavailableandthecurrentlimitlevel  
is 150mV/RSENSE. During the soft-cycle, the inrush cur-  
rent servo loop is at 50mV/RSENSE. So, the heavy load  
should only turn on at/after the end of second cycle where  
the RESET pin goes high.  
There is an alternative method to implementing the over-  
voltage protection using a resistor divider at the FILTER  
pin (see Figures 27 and 28). In this implementation, the  
SLOW COMP is NULL in Normal Mode. Only the FAST  
BACKPLANE PCB EDGE  
CONNECTOR CONNECTOR  
(FEMALE)  
(MALE)  
LONG  
5V  
R3  
10Ω  
C1  
R4  
10k  
R
Q1  
Si4410DY  
Z1*  
SENSE  
0.007Ω  
V
5V  
5A  
OUT  
0.1µF  
SHORT  
FAULT  
R1  
R5  
R8  
LTC4211  
36k  
10k  
+
4.3k  
SHORT  
SHORT  
1
2
3
4
5
10  
9
C
RESET  
RESET FAULT  
LOAD  
R2  
15k  
ON/OFF  
ON  
V
CC  
R6  
10k  
R7  
10k  
8
FILTER SENSE  
TIMER GATE  
7
R9  
750Ω  
C
TIMER  
10nF  
6
4211 F29  
GND  
FB  
LONG  
GND  
Z1 = 1SMA10A OR SMAJ10A  
* OPTIONAL  
Figure 27. LTC4211MS High Side Overvoltage Protection Implementation  
(In Normal Mode, SLOW COMP is Disabled, In Soft-Start Cycle, ISOFTSTART is Still 50mV/RSENSE  
)
BACKPLANE PCB EDGE  
CONNECTOR CONNECTOR  
(FEMALE)  
(MALE)  
LONG  
5V  
R3  
10k  
R7  
10Ω  
C1  
R
Q1  
Si4410DY  
SENSE  
0.007Ω  
Z1*  
V
5V  
5A  
OUT  
0.1µF  
SHORT  
FAULT  
R1  
R4  
LTC4211  
3.6k  
10k  
+
SHORT  
SHORT  
1
2
3
4
5
10  
9
C
RESET  
RESET FAULT  
LOAD  
R2  
750Ω  
ON/OFF  
ON  
V
CC  
R5  
10k  
R6  
10k  
8
FILTER SENSE  
TIMER GATE  
7
R8  
750Ω  
C
TIMER  
10nF  
6
GND  
FB  
4211 F30  
LONG  
GND  
Z1 = 1SMA10A OR SMAJ10A  
* OPTIONAL  
Figure 28. LTC4211MS Low Side Overvoltage Protection Implementation  
(In Normal Mode, SLOW COMP is Disabled, In Soft-Start Cycle, ISOFTSTART is Still 50mV/RSENSE  
)
RELATED PARTS  
PART NUMBER  
LTC1421  
DESCRIPTION  
COMMENTS  
Two Channels, Hot Swap Controller  
Single Channel, Hot Swap Controller  
Negative Voltage Hot Swap Controller  
Positive Voltage Hot Swap Controller  
Single Channel, Hot Swap Controller  
PCI Hot Swap Controller  
24-Pin, Operates from 3V to 12V and Supports –12V  
8-Pin, Operates from 2.7V to 12V  
LTC1422  
LT1640AL/LT1640AH  
LT1641-1/LT1641-2  
LTC1642  
8-Pin, Operates from –10V to –80V  
8-Pin, Operates from 9V to 80V, Latch-Off/Auto Retry  
16-Pin, Overvoltage Protection to 33V  
LTC1644  
16-Pin, 3.3V, 5V and ±12V, 1V Precharge, PCI Reset Logic  
8-Pin, 16-Pin, Operates from 2.7V to 16.5V  
LTC1647  
Dual Channel, Hot Swap Controller  
Triple Hot Swap Controller with Multifunction Current Control  
LTC4230  
Operates from 1.7V to 16.5V  
4211f  
LT/TP 0702 2K • PRINTED IN USA  
LinearTechnology Corporation  
1630 McCarthy Blvd., Milpitas, CA 95035-7417  
36  
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com  
LINEAR TECHNOLOGY CORPORATION 2001  

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