LTC4211_12_技术文档

LTC4211

Hot Swap Controller with

Multifunction Current Control

FEATURES

DESCRIPTION

TheLTC^®4211isaHotSwap™controllerthatallowsaboard

to be safely inserted and removed from a live backplane.

An internal high side switch driver controls the gate of an

external N-channel MOSFET for supply voltages ranging

from 2.5V to 16.5V. The LTC4211 provides soft-start and

inrush current limiting during the start-up period which

has a programmable duration.

n

Allows Safe Board Insertion and Removal

from a Live Backplane

n

Controls Supply Voltages from 2.5V to 16.5V

n

Programmable Soft-Start with Inrush Current

Limiting, No External Gate Capacitor Required

n

Faster Turn-Off Time Because No External Gate

Capacitor is Required

n

Dual Level Overcurrent Fault Protection

Two on-chip current limit comparators provide dual level

overcurrent circuit breaker protection. The slow com-

parator trips at V_CC– 50mV and activates in 20μs (or is

programmed by an external filter capacitor, MS only).

The fast comparator trips at V_CC– 150mV and typically

responds in 300ns.

n

Programmable Response Time for Overcurrent

Protection (MS)

n

Programmable Overvoltage Protection (MS)

n

Automatic Retry or Latched Mode Operation (MS)

n

High Side Drive for an External N-Channel FET

n

User-Programmable Supply Voltage Power-Up Rate

n

TheFBpinmonitorstheoutputsupplyvoltageandsignals

the RESET output pin. The ON pin signal turns the chip on

and off and can also be used for the reset function. The

MS package has FAULT and FILTER pins to provide addi-

tional functions like fault indication, autoretry or latch-off

modes, programmable current limit response time and

programmable overvoltage protection using an external

Zener diode clamp.

FB Pin Monitors V

and Signals RESET

OUT

n

Glitch Filter Protects Against Spurious RESET Signal

APPLICATIONS

n

Electronic Circuit Breaker

n

Hot Board Insertion and Removal (Either On

Backplane or On Removable Card)

Industrial High Side Switch/Circuit Breaker

L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and Hot Swap

is a trademark of Linear Technology Corporation. All other trademarks are the property of their

respective owners.

n

TYPICAL APPLICATION

Single Channel 5V Hot Swap Controller

Power-Up Sequence

BACKPLANE PCB EDGE

CONNECTOR CONNECTOR

NO C

LOAD

(FEMALE)

(MALE)

R

M1

SENSE

0.007Ω

V

5V

5A

V

GATE

Si4410DY

OUT

LONG

V

CC

5V/DIV

5V

+

R

X

C

LOAD

10Ω

Z1*

V

C

X

100nF

RESET

5V/DIV

8

7

6

R5

R3

36k

10k

V

SENSE

GATE

FB

CC

5

1

R1

20k

V

ON

R4

15k

1V/DIV

SHORT

2

μP

LTC4211

ON

LOGIC

V

R2

10k

TIMER

RESET

1V/DIV

RESET

TIMER

3

GND

2.5ms/DIV

4211 TA01b

4

PCB CONNECTION SENSE

LONG

C

TIMER

10nF

GND

4211 TA01A

Z1 = 1SMA10A OR SMAJ10A

* OPTIONAL

4211fb

1

LTC4211

ABSOLUTE MAXIMUM RATINGS

(Note 1)

Supply Voltage (V ) ................................................17V

Operating Temperature Range

CC

Input Voltage

LTC4211C................................................ 0°C to 70°C

LTC4211I............................................. –40°C to 85°C

Storage Temperature Range ..................–65°C to 150°C

Lead Temperature (Soldering, 10 sec)...................300°C

FB, ON .................................................. –0.3V to 17V

SENSE, FILTER ........................... –0.3V to V + 0.3V

CC

TIMER...................................................... –0.3V to 2V

Output Voltage

GATE................................. Internally Limited (Note 3)

RESET, FAULT ....................................... –0.3V to 17V

PIN CONFIGURATION

TOP VIEW

RESET

ON

1

2

3

4

8

7

6

5

V

RESET

ON

FILTER

TIMER

GND

1

2

3

4

5

10 FAULT

CC

RESET

ON

TIMER

GND

1

2

3

4

8 V

CC

9

8

7

6

V

CC

7 SENSE

6 GATE

5 FB

SENSE

GATE

FB

SENSE

GATE

FB

TIMER

GND

MS8 PACKAGE

MS PACKAGE

10-LEAD PLASTIC MSOP

8-LEAD PLASTIC MSOP

S8 PACKAGE

8-LEAD PLASTIC SO

T

JMAX

= 125°C, θ = 200°C/W

JA

T

= 125°C, θ = 200°C/W

JMAX

JA

T

= 125°C, θ = 150°C/W

JA

JMAX

ORDER INFORMATION

LEAD FREE FINISH

LTC4211CS8#PBF

LTC4211IS8#PBF

LTC4211CMS8#PBF

LTC4211IMS8#PBF

LTC4211CMS#PBF

LTC4211IMS#PBF

TAPE AND REEL

PART MARKING

4211

PACKAGE DESCRIPTION

TEMPERATURE RANGE

0°C to 70°C

LTC4211CS8#TRPBF

LTC4211IS8#TRPBF

LTC4211CMS8#TRPBF

LTC4211IMS8#TRPBF

LTC4211CMS#TRPBF

LTC4211IMS#TRPBF

8-Lead Plastic SO

4211I

8-Lead Plastic SO

–40°C to 85°C

0°C to 70°C

LTSC

8-Lead Plastic MSOP

10-Lead Plastic MSOP

LTSD

–40°C to 85°C

0°C to 70°C

LTSU

LTSV

–40°C to 85°C

Consult LTC Marketing for parts specified with wider operating temperature ranges.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. V_CC= 5V, unless otherwise noted. (Note 2)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

16.5

1.5

UNITS

V

l

V

Supply Voltage Range

Supply Current

2.5

CC

I

CC

FB = High, ON = High, TIMER = Low

1

2.3

120

1

mA

V

Internal V Undervoltage Lockout

V

Low-to-High Transition

2.13

2.47

LKO

CC

V

Undervoltage Lockout Hysteresis

CC

mV

μA

LKOHST

INFB

I

FB Input Current

V

FB

= V or GND

10

CC

4211fb

2

LTC4211

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. V_CC= 5V, unless otherwise noted. (Note 2)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

1

MAX

10

UNITS

μA

I

ON Input Current

V

= V or GND

CC

INON

ON

l

RESET, FAULT Leakage Current

SENSE Input Current

= V = 15V, Pull-Down Device Off

FAULT

0.1

1

2.5

10

μA

LEAK

RESET

SENSE

= V or GND

μA

INSENSE

CC

l

V

SENSE Trip Voltage (V – V

)

Fast Comparator Trips

Slow Comparator Trips

130

40

150

50

170

60

mV

μA

CB(FAST)

CB(SLOW)

GATEUP

CC

SENSE

SENSE Trip Voltage (V – V

CC

I

GATE Pull-Up Current

Charge Pump On, V

ON Low

≤ 0.2V

–12.5

130

–10

200

50

–7.5

270

GATE

Normal GATE Pull-Down Current

Fast GATE Pull-Down Current

μA

GATEDOWN

FAULT Latched and Circuit Breaker Tripped or in

UVLO

mA

l

ΔV

External N-Channel Gate Drive

V

GATE

V

GATE

V

GATE

V

GATE

V

GATE

V

GATE

– V (For V = 2.5V)

2.5

4.5

5.0

10

8

V

GATE

CC

– V (For V = 2.7V)

8

CC

– V (For V = 3.3V)

10

16

18

CC

– V (For V = 5V)

CC

– V (For V = 12V)

CC

– V (For V = 15V)

CC

l

V

GATE Overvoltage Lockout Threshold

FB Voltage Threshold

0.08

0.2

1.236

0.5

0.3

1.248

5

V

GATEOV

FB High to Low

1.223

FB

ΔV

FB Threshold Line Regulation

FB Voltage Threshold Hysteresis

ON Threshold High

2.5V ≤ V ≤ 16.5V

mV

V

FB

CC

V

3

FBHST

ONHI

l

1.23

1.20

1.316

1.236

80

1.39

1.26

ON Threshold Low

V

ONLO

ONHST

FILTER

ON Hysteresis

mV

μA

V

l

I

FILTER Current

During Slow Fault Condition

–2.5

7

–2

–1.5

13

During Normal and Reset Conditions

Latched Off Threshold, FILTER Low to High

10

V

FILTER Threshold

1.20

1.236

80

1.26

FILTER

FILTERHST

TMR

FILTER Threshold Hysteresis

TIMER Current

mV

μA

mA

V

l

I

Timer On, V

= 1V

–2.5

–2

–1.5

TIMER

Timer Off, TIMER = 1.5V

TIMER Low to High

3

l

V

TIMER Threshold

1.20

0.15

1.20

1.236

0.200

1.236

50

1.26

0.40

1.26

TMR

TIMER High to Low

V

FAULT Threshold

Latched Off Threshold, FAULT High to Low

V

FAULT

FAULT Threshold Hysteresis

Output Low Voltage

mV

V

FAULTHST

OLFAULT

OLRESET

FAULTFC

FAULTSC

l

I

= 1.6mA

0.14

300

20

0.4

700

30

FAULT

RESET

Output Low Voltage

= 1.6mA

V

t

FAST COMP Trip to GATE Discharging

SLOW COMP Trip to GATE Discharging

V

= 0mV to 200mV Step

= 0mV to 100mV Step,

ns

μs

CB

10

4

CB

8-Pin Version or FILTER Floating

l

V

= 0mV to 100mV Step,

6

8

ms

CB

10nF at FILTER Pin to GND

l

t

FAULT Low to GATE Discharging

FILTER High to FAULT Latched

V

= 5V to 0V

= 0V to 5V

1

2

3

5

7

μs

EXTFAULT

FAULT

4.5

FILTER

4211fb

3

LTC4211

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the full operating

temperature range, otherwise specifications are at T_A= 25°C. V_CC= 5V, unless otherwise noted. (Note 2)

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

150

8

MAX

UNITS

μs

l

t

Circuit Breaker Reset Delay Time

Turn-Off Time

ON Low to FAULT High

ON Low to GATE Off

250

RESET

OFF

μs

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: All current into device pins are positive; all current out of device

pins are negative; all voltages are referenced to ground unless otherwise

specified.

Note 3: An internal Zener at the GATE pin clamps the charge pump voltage

to a typical maximum operating voltage of 26V. External voltage applied to

the GATE pin beyond the internal Zener voltage may damage the part. If a

lower GATE pin voltage is desired, use an external Zener diode. The GATE

capacitance must be <0.15μF at maximum V

.

CC

TYPICAL PERFORMANCE CHARACTERISTICS

Undervoltage Lockout Threshold

vs Temperature

Supply Current vs Supply Voltage

Supply Current vs Temperature

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

2.5

2.4

T

= 25°C

A

RISING EDGE

2.3

V

= 15V

= 12V

CC

FALLING EDGE

2.2

2.1

2.0

V

= 5V

= 3V

CC

V

0

2

4

6

8

10 12 14 16 18 20

25 50

TEMPERATURE (°C)

–75 –50 –25

0

75 100 125 150

–75 –50 –25

0

50

100 125 150

75

25

TEMPERATURE (°C)

SUPPLY VOLTAGE (V)

4211 G01

4211 G02

4211 G03

ON Pin Threshold

vs Temperature

ON Pin Threshold

vs Supply Voltage

GATE Voltage vs Supply Voltage

1.40

1.35

1.40

1.35

30

25

T

= 25°C

V

= 5V

A

T = 25°C

A

CC

HIGH THRESHOLD

LOW THRESHOLD

1.30

1.25

20

15

LOW THRESHOLD

1.25

1.20

1.15

1.10

10

5

1.15

1.10

0

2

4

6

8

10 12 14 16 18 20

0

2

4

6

8

10 12 14 16 18 20

–75 –50 –25

0

25 50 75 100 125 150

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

4211 G04

4211 G06

4211 G05

4211fb

4

LTC4211

TYPICAL PERFORMANCE CHARACTERISTICS

V

_GATE– V_CCvs Supply Voltage

GATE Voltage vs Temperature

V_GATE– V_CCvs Temperature

18

16

14

12

10

8

18

16

14

12

10

8

30

25

T

= 25°C

A

V

= 15V

CC

V

= 12V

CC

V

= 12V

= 5V

CC

20

V

CC

V

= 15V

V

= 5V

= 3V

CC

15

10

V

= 3V

CC

6

4

5

0

2

0

2

4

6

8

10

20

–75 –50 –25

0

100 125 150

12 14 16 18

25 50 75

–75 –50 –25

0

25 50 75 100 125 150

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

4211 G08

4211 G09

4211 G07

GATE Output Source Current

vs Supply Voltage

GATE Output Source Current

vs Temperature

Normal GATE Pull-Down Current

vs Supply Voltage

13

12

260

240

13

T

= 25°C

T = 25°C

A

12

11

10

220

200

V

= 15V

CC

V

10

9

= 3V

CC

V

= 12V

V

= 5V

CC

9

8

7

180

160

140

8

7

0

2

4

6

8

10 12 14 16 18 20

0

2

4

6

8

10 12 14 16 18 20

–75 –50 –25

0

25 50 75 100 125 150

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

4211 G10

4211 G12

4211 G11

Fast GATE Pull-Down Current

vs Temperature

Fast GATE Pull-Down Current

vs Supply Voltage

Normal GATE Pull-Down Current

vs Temperature

80

70

80

70

260

240

T

= 25°C

A

V

= 5V

CC

V

= 5V

CC

60

50

220

50

40

200

180

40

30

20

30

20

160

140

0

2

4

6

8

10 12 14 16 18 20

–75 –50 –25

0

25 50 75 100 125 150

–75 –50 –25

0

25 50 75 100 125 150

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

4211 G14

4211 G15

4211 G13

4211fb

5

LTC4211

TYPICAL PERFORMANCE CHARACTERISTICS

Feedback Threshold

vs Supply Voltage

Feedback Threshold

vs Temperature

FILTER Threshold

vs Supply Voltage

1.250

1.245

1.240

1.40

1.35

1.250

1.245

T

= 25°C

V

= 5V

T

= 25°C

A

CC

A

HIGH THRESHOLD

LOW THRESHOLD

1.30

1.25

HIGH THRESHOLD

LOW THRESHOLD

1.240

HIGH THRESHOLD

LOW THRESHOLD

1.235

1.230

1.225

1.235

1.230

1.225

1.20

1.15

1.10

0

2

4

6

8

10 12 14 16 18 20

0

2

4

6

8

10 12 14 16 18 20

–75 –50 –25

0

25 50 75 100 125 150

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

4211 G16

4211 G18

4211 G17

FILTER Pull-Up Current

vs Supply Voltage

FILTER Pull-Up Current

vs Temperature

FILTER Threshold vs Temperature

2.3

2.2

1.40

1.35

2.3

2.2

T

A

= 25°C

V

= 5V

V

= 5V

CC

1.30

2.1

2.0

2.1

HIGH THRESHOLD

1.25

1.20

2.0

1.9

1.8

1.7

LOW THRESHOLD

1.15

1.10

1.8

1.7

0

2

4

6

8

10 12 14 16 18 20

–75 –50 –25

0

25 50 75 100 125 150

TEMPERATURE (°C)

–75 –50 –25

0

25 50 75 100 125 150

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

4211 G20

4211 G19

4211 G21

FILTER Pull-Down Current

vs Temperature

FILTER Pull-Down Current

vs Supply Voltage

TIMER High Threshold

vs Supply Voltage

1.26

1.25

12.0

11.5

11.0

10.5

10.0

9.5

12.0

11.5

11.0

10.5

10.0

9.5

T = 25°C

A

V

= 5V

T

= 25°C

CC

A

1.24

1.23

1.22

1.21

1.20

9.0

8.5

8.0

0

2

4

6

8

10 12 14 16 18 20

25 50

–75 –50 –25

0

75 100 125 150

0

2

4

6

8

10 12 14 16 18 20

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

SUPPLY VOLTAGE (V)

4211 G24

4211 G23

4211 G22

4211fb

6

LTC4211

TYPICAL PERFORMANCE CHARACTERISTICS

TIMER Low Threshold

vs Supply Voltage

TIMER High Threshold

vs Temperature

TIMER Low Threshold

vs Temperature

1.0

0.8

0.6

1.26

1.25

1.0

0.8

T

A

= 25°C

V

= 5V

V

= 5V

CC

1.24

0.6

1.23

1.22

0.4

0.2

0

0.4

0.2

0

1.21

1.20

0

2

4

6

8

10 12 14 16 18 20

–75 –50 –25

0

25 50 75 100 125 150

–75 –50 –25

0

50

100 125 150

75

25

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

4211 G26

4211 G25

4211 G27

TIMER Pull-Down Current

vs Supply Voltage

TIMER Pull-Up Current

vs Supply Voltage

TIMER Pull-Up Current

vs Temperature

2.30

2.20

6

5

2.3

2.2

T

= 25°C

T = 25°C

A

V

= 5V

A

CC

2.1

2.10

2.00

4

3

2.0

1.9

1.90

1.80

1.70

2

1

0

1.8

1.7

0

2

4

6

8

10 12 14 16 18 20

0

2

4

6

8

10 12 14 16 18 20

–75 –50 –25

0

25 50 75 100 125 150

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

4211 G28

4211 G30

4211 G29

TIMER Pull-Down Current

vs Temperature

V_OLvs Temperature

V_OLvs Supply Voltage

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

6

5

1.6

1.4

1.2

1.0

0.8

0.6

0.4

0.2

0

T

= 25°C

V

= 5V

CC

V

= 5V

A

CC

RESET OR FAULT

4

3

2

I

OL

= 5mA

I

= 5mA

OL

1

0

I

OL

= 1mA

I

OL

= 1mA

0

2

4

6

8

10 12 14 16 18 20

25 50

–75 –50 –25

0

75 100 125 150

–75 –50 –25

0

25 50 75 100 125 150

TEMPERATURE (°C)

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

4211 G32

4211 G33

4211 G31

4211fb

7

LTC4211

TYPICAL PERFORMANCE CHARACTERISTICS

V_CB(SLOW COMP)

vs Temperature

V_CB(SLOW COMP)

vs Supply Voltage

V_CB(FAST COMP)

vs Supply Voltage

60

58

56

54

52

50

48

46

44

42

40

60

58

56

54

52

50

48

46

44

42

40

170

165

160

155

150

145

140

135

130

T

= 25°C

V

= 5V

T = 25°C

A

CC

0

2

4

6

8

10 12 14 16 18 20

–75 –50 –25

0

25 50 75 100 125 150

0

2

4

6

8

10 12 14 16 18 20

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

SUPPLY VOLTAGE (V)

4211 G34

4211 G35

4211 G36

V_CB(FAST COMP)

vs Temperature

SLOW COMP Response Time vs

Supply Voltage

SLOW COMP Response Time vs

Temperature

26

24

22

20

18

16

14

12

10

170

165

160

155

150

145

140

135

130

26

24

22

20

18

16

14

12

10

V

= 5V

8-PIN VERSION OR FILTER FLOATING

T

= 25°C

CC

A

8-PIN VERSION

OR FILTER FLOATING

V

= 12V

= 5V

CC

V

= 15V

CC

V

= 3V

V

CC

25 50

TEMPERATURE (°C)

–75 –50 –25

0

75 100 125 150

–75 –50 –25

0

75 100 125 150

0

2

4

6

8

10 12 14 16 18 20

TEMPERATURE (°C)

SUPPLY VOLTAGE (V)

4211 G37

4211 G39

4211 G38

FAST COMP Response Time vs

Supply Voltage

FAST COMP Response Time vs

Temperature

FILTER High to FAULT Activation

Time vs Supply Voltage

800

700

600

500

400

300

200

100

0

6.0

5.5

800

700

600

500

400

300

200

100

0

T

= 25°C

V

CB

= 0mV TO 200mV STEP

T

= 25°C

A

V

= 0mV TO 200mV STEP

CB

5.0

4.5

V

= 3V

= 5V

CC

V

= 12V

CC

V

CC

4.0

3.5

3.0

V

= 15V

CC

0

2

4

6

8

10 12 14 16 18 20

25 50

TEMPERATURE (°C)

0

2

4

6

8

10 12 14 16 18 20

–75 –50 –25

0

75 100 125 150

SUPPLY VOLTAGE (V)

4211 G42

4211 G40

4211 G41

4211fb

8

LTC4211

TYPICAL PERFORMANCE CHARACTERISTICS

FILTER High to FAULT Activation

Time vs Temperature

Circuit Breaker RESET Time

vs Supply Voltage

Circuit Breaker RESET Time

vs Temperature

200

180

200

180

6.0

5.5

T = 25°C

A

V

= 5V

V

= 5V

CC

160

5.0

160

140

120

4.5

4.0

120

100

80

100

80

3.5

3.0

0

2

4

6

8

10 12 14 16 18 20

–75 –50 –25

0

25 50 75 100 125 150

–75 –50 –25

0

25 50 75 100 125 150

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

4211 G44

4211 G45

4211 G43

FAULT Pin Low to GATE Discharging

Time vs Supply Voltage

FAULT Pin Low to GATE Discharging

Time vs Temperature

FAULT Threshold Voltage

vs Supply Voltage

4.5

4.0

4.5

4.0

1.50

1.45

1.40

1.35

1.30

1.25

1.20

1.15

1.10

T

= 25°C

V

= 5V

CC

T

= 25°C

A

3.5

3.0

2.5

HIGH THRESHOLD

LOW THRESHOLD

2.5

2.0

1.5

2.0

1.5

0

2

4

6

8

10 12 14 16 18 20

–75 –50 –25

0

25 50 75 100 125 150

0

2

4

6

8

10 12 14 16 18 20

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

SUPPLY VOLTAGE (V)

4211 G46

4211 G47

4211 G48

FAULT Threshold Voltage

vs Temperature

Turn Off Time

vs Supply Voltage

Turn Off Time vs Temperature

11

10

11

10

1.50

1.45

1.40

1.35

1.30

1.25

1.20

1.15

1.10

T

A

= 25°C

V

= 5V

V

= 5V

CC

9

8

HIGH THRESHOLD

LOW THRESHOLD

8

7

6

5

6

5

0

2

4

6

8

10 12 14 16 18 20

25 50

–75 –50 –25

0

75 100 125 150

100

125 150

–75 –50 –25

0

25 50 75

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

4211 G50

4211 G49

4211 G51

4211fb

9

LTC4211

TYPICAL PERFORMANCE CHARACTERISTICS

GATE Overvoltage Lockout Threshold

vs Supply Voltage

GATE Overvoltage Lockout Threshold

vs Temperature

0.5

0.4

T

= 25°C

V

= 5V

A

CC

0.4

0.3

0.2

0.1

0

0.2

0.1

0

2

4

6

8

10 12 14 16 18 20

–75 –50 –25

0

25 50 75 100 125 150

SUPPLY VOLTAGE (V)

TEMPERATURE (°C)

4211 G52

4211 G53

PIN FUNCTIONS ^{(8-Lead Package/10-Lead Package)}

RESET (Pin 1/Pin 1): An open-drain output that pulls to

GND if the voltage at the FB pin (Pin 5/Pin 6) falls below

the FB pin threshold (1.236V). During the start-up cycle,

the RESET pin goes high impedance at the end of the

second timing cycle after the FB pin goes above the FB

threshold. This pin requires an external pull-up resistor

TIMER (Pin 3/Pin 4): A capacitor connected from this pin

toGNDsetstheLTC4211’ssystemtiming. TheLTC4211’s

initial and second start-up timing cycles and its internal

“power good” delay time are defined by this capacitor.

GND (Pin 4/Pin 5): Device Ground Connection. Connect

this pin to the system’s analog ground plane.

to V . If an undervoltage lockout condition occurs, the

CC

FB (Pin 5/Pin 6): The FB (Feedback) pin is an input to the

RESETpinpullslowindependentlyoftheFBpintoprevent

false glitches.

COMP2comparatorandmonitorstheoutputsupplyvoltage

through an external resistor divider. If V < 1.236V, the

FB

ON (Pin 2/Pin 2): An active high signal used to enable or

disableLTC4211operation. COMP1’shigh-to-lowthresh-

old is set at 1.236V and its hysteresis is set at 80mV. If a

RESET pin pulls low. An internal glitch filter at COMP2’s

output helps prevent negative voltage transients from

triggering a reset condition. If V > 1.239V, the RESET

FB

logic high signal is applied to the ON pin (V > 1.316V),

ON

pin goes high at the end of the second timing cycle.

the first timing cycle begins if an overvoltage condition

GATE (Pin 6/Pin 7): The output signal at this pin is the

high side gate drive for the external N-channel FET pass

transistor.

does not exist on the GATE pin (Pin 6/Pin 7). If a logic

low signal is applied to the ON pin (V < 1.236V), the

ON

GATE pin is pulled low by an internal 200μA current sink.

The ON pin can also be used to reset the electronic circuit

breaker. IftheONpiniscycledlowandthenhighfollowing

a circuit breaker trip, the internal circuit breaker is reset,

and the LTC4211 begins a new start-up cycle.

As shown in the Block Diagram, an internal charge pump

supplies a 10μA gate current and sufficient gate volt-

age drive to the external FET for supply voltages from

2.5V to 16.5V. The internal charge-pump and zener

4211fb

10

LTC4211

PIN FUNCTIONS ^{(8-Lead Package/10-Lead Package)}

clamps at the GATE pin determine the gate drive voltage

V

(Pin 8/Pin 9): This is the positive supply input to

CC

(ΔV

= V

– V ). The charge pump produces a

the LTC4211. The LTC4211 operates from 2.5V < V

<

GATE

CC

minimum 4.5V of ΔV

for supplies in the range of 2.7V

16.5V, and the supply current is typically 1mA. An internal

undervoltage lockout circuit disables the device until the

voltage at V exceeds 2.3V.

GATE

≤ V < 4.75V. For 4.75V ≤ V ≤ 12V the ΔV is limited

CC

GATE

by zener clamp Z1 connected between the GATE and V

CC

pins. The ΔV

is typically at 12V and with guaranteed

GATE

FAULT (Not available on S8/MS8, Pin 10 MS): FAULT is

both an input and an output. Connected to this pin are an

analogcomparator(COMP6)andanopen-drainN-channel

FET. During normal operation, if COMP6 is driven below

1.236V, the electronic circuit breaker trips and the GATE

pin pulls low. Typically, a 10k pull-up resistor connects

to the FAULT pin. This pull-up is required to allow the

LTC4211 to begin a second timing cycle (V_FAULT> 1.286)

and start-up properly. This also allows the use of the

FAULT pin as a status output. Under normal operating

conditions, the FAULT output is a logic high. Two condi-

tions cause an active low on FAULT: (1) the LTC4211’s

electronic circuit breaker trips because of an output short

circuit causing a fast output overcurrent transient (FAST

COMP trips circuit breaker); or (2) V_FILTER> 1.236V. The

FAULT output is driven to logic low and is latched logic

low until the ON pin is driven to logic low for 150μs (the

t_RESETduration).

minimum value of 10V. For V > 12V, the Zener clamp

CC

Z2 begins to set the limitation for ΔV

. Z2 clamps the

GATE

gatevoltagetogroundto26Vtypically. TheminimumZ2’s

clamp voltage is 23V. This effectively sets ΔV to 8V

GATE

minimum at V = 15V.

CC

SENSE (Pin 7/Pin 8): Circuit Breaker Set Pin. With a sense

resistorplacedinthepowerpathbetweenV andSENSE,

CC

theLTC4211’selectroniccircuitbreakertripsifthevoltage

across the sense resistor exceeds the thresholds set inter-

nally for the SLOW COMP and the FAST COMP, as shown

intheBlockDiagram.ThethresholdfortheSLOWCOMPis

V

= 50mV, and the electronic circuit breaker trips

CB(SLOW)

if the voltage across the sense resistor exceeds 50mV for

20μs. The SLOW COMP delay is fixed in the S8/MS8 ver-

sion and adjustable in the MS version of the LTC4211. To

adjust the SLOW COMP’s delay, please refer to the section

on Adjusting SLOW COMP’s Response Time.

Under transient conditions where large step current

changes can and do occur over shorter periods of time,

a second (fast) comparator instead trips the electronic

circuit breaker. The threshold for the FAST COMP is set at

FILTER (Not available S8/MS8, Pin 3 MS): Overcurrent

Fault Timing Pin and Overvoltage Fault Set pin. With a

capacitor connected from this pin to ground, the SLOW

COMP’s response time can be adjusted. In the S8/MS8

version of the LTC4211, the FILTER pin is not available

and the delay time from overcurrent detect to GATE OFF

is fixed at 20μs.

V

= 150mV, and the circuit breaker trips if the

CB(FAST)

voltage across the sense resistor exceeds 150mV for

more than 300ns. The FAST COMP’s delay is fixed in the

LTC4211andcannotbeadjusted. Todisabletheelectronic

circuit breaker, connect the V and SENSE pins together.

CC

4211fb

11

LTC4211

BLOCK DIAGRAM

V

8 (9)

SENSE 7 (8)

GATE 6 (7)

CC

–

+

Z2

Z

Z1

V

(TYP) = 26V

V

(TYP) = 12V

Z

COMP7

V

CC

CHARGE

PUMP

0.2V

10μA

UVLO

–

+

50mV

150mV

t

TIMER

RESET

+

–

1

M3

CB

V

CC

SLOW

COMP

FAST

M1

COMP

0.2V

+

–

200μA

10μA

2μA

COMP3

COMP4

START-UP

CURRENT

REGULATOR CHARGING

GLITCH FILTER

(SEE NOTE 1)

300ns

DELAY

TIMER

3 (4)

TRIPS

OR UVLO ON LOW

GATE

M6

+

–

POWER BAD

V

REF

V

+

–

V

CC

REF

NORMAL

LOGIC

COMP6

2μA

FAULT

M5

CB TRIPS

(10)

MS ONLY

FILTER

+

–

M2

(3)

MS ONLY

COMP5

GLITCH FILTER

FUNCTION OF

OVERDRIVE

M4

GLITCH FILTER

150μs

V

REF

GND

4 (5)

V

REF

10μA

NORMAL, RESET

BG

0.2V

V

= 1.236V

COMP1

–

COMP2

REF

–

+

V

REF

V

REF

4211 BD

2

ON

5 (6) FB

NOTE 1: SET BY FILTER CAPACITOR FOR MS

20μs DEFAULT FOR MS8, S8

PIN NUMBERS FOR S8/MS8 (MS)

4211fb

12

LTC4211

OPERATION

HOT CIRCUIT INSERTION

COMP2 output goes high. After a glitch filter delay, RESET

is pulled low (Time Point 1). When the voltage at the FB

pin rises above its reset threshold (1.239V), COMP2’s

output goes low and a timing cycle starts (Time Point 4).

After a complete timing cycle, RESET is pulled high by

the external pull-up resistor. If the FB pin rises above the

reset threshold for less than a timing cycle, the RESET

output remains low (Time Points 2 to 3).

When circuit boards are inserted into or removed from

live backplanes, the supply bypass capacitors can draw

huge transient currents from the backplane power bus as

they charge. The transient current can cause permanent

damage to the connector pins as well as cause glitches

on the system supply, causing other boards in the system

to reset.

As shown in Figure 5, the LTC4211’s RESET pin is logic

low during any undervoltage lockout condition and during

the initial insertion of a PC board. Under normal opera-

tion, RESET goes to logic high at the end of the soft-start

cycle only after the FB pin voltage rises above its reset

threshold of 1.239V.

The LTC4211 is designed to turn a printed circuit board’s

supply voltages ON and OFF in a controlled manner, al-

lowing the circuit board to be safely inserted or removed

from a live backplane. The device provides a system

reset signal to indicate when board supply voltage drops

below a predetermined level, as well as a dual function

fault monitor.

1

2

3

4

V1 V2

V

OUT

OUTPUT VOLTAGE MONITOR

1.236V

TIMER

The LTC4211 uses a 1.236V bandgap reference, precision

voltage comparator and an external resistor divider to

monitor the output supply voltage as shown in Figure 1.

RESET

POWER GOOD

DELAY

The operation of the supply monitor in normal mode is

illustrated in Figure 2. When the voltage at the FB pin

drops below its reset threshold (1.236V), the comparator

4211 F02

Figure 2. Supply Monitor Waveforms in Normal Mode

BACKPLANE PCB EDGE

CONNECTOR CONNECTOR

(FEMALE)

(MALE)

R

SENSE

Q1

LONG

V

CC

OUT

+

C

LOAD

8

7

6

LTC4211

ON

V

CC

SENSE

GATE

R3

R1

R2

10k

FB

5

1

–

+

2

SHORT

ON/RESET

COMP2

LOGIC

μP

1.236V

REFERENCE

RESET

TIMER

RESET

Q2

TIMER

GND

3

4

C

TIMER

4211 F01

LONG

GND

Figure 1. Supply Voltage Monitor Block Diagram

4211fb

13

LTC4211

OPERATION

UNDERVOLTAGE LOCKOUT

250

200

150

T

= 25°C

A

The LTC4211’s power-on reset circuit initializes the start-

up procedure and ensures the chip is in the proper state if

the input supply voltage is too low. If the supply voltage

falls below 2.18V, the LTC4211 is in undervoltage lockout

(UVLO) mode, and the GATE pin is pulled low. Since the

UVLO circuitry uses hysteresis, the chip restarts after the

supply voltage rises above 2.3V and the ON pin goes high.

100

50

0

In addition, users can utilize the ON comparator (COMP1)

or the FAULT comparator (COMP6) to effectively program

a higher undervoltage lockout level. Figure 3 shows how

the external resistor divider at the ON pin programs the

system’s undervoltage lockout voltage. The system will

entertheplug-incycleaftertheONpinrisesabove1.316V.

0

20 40 60 80 100 120 140 160 180 200

FB TRANSIENT (mV)

4211 F04

Figure 4. FB Comparator Glitch Filter Time

vs Feedback Transient Voltage

The resistor divider sets the circuit to turn on when V

CC

reaches around 79% of its final value. If a different turn on

SYSTEM TIMING

V

voltage is desired change the resistor divider values

CC

accordingly. Alternatively, the FAULT comparator can be

used to configure the external undervoltage lockout level.

If the FAULT comparator is used for this purpose, the

system will wait for the input voltage to increase above

the level set by the user before starting the second timing

cycle. Also, if the input voltage drops below the set level

in normal operating mode, the user must cycle the ON pin

System timing for the LTC4211 is generated at the TIMER

pin (see the Block Diagram). If the LTC4211’s internal

timing circuit is off, an internal N-channel FET connects

the TIMER pin to GND. If the timing circuit is enabled,

an internal 2μA current source is then connected to the

TIMER pin to charge C

at a rate given by Equation 1:

TIMER

2µA

C_TIMER

or V to restart the system.

(1)

CC

C_TIMERCharge-Up Rate =

V

IN

12V

IN

3.3V

5V

When the TIMER pin voltage reaches COMP4’s threshold

of 1.236V, the TIMER pin is reset to GND. Equation 2 gives

an expression for the timer period:

R1

10k

R1

20k

R1

61.9k

ON PIN

R2

10k

R2

10k

R2

10k

C_TIMER

2µA

(2)

t_TIMER= 1.236V •

4211 F03

(a) 3.3V

(b) 5V

(c) 12V

IN

As a design aid, the LTC4211’s timer period as a function

TIMER

is shown in Table 1.

Figure 3. ON Pin Sets the Undervoltage

Lockout Voltage Externally

of the C using standard values from 3.3nF to 0.33μF

GLITCH FILTER FOR RESET

The LTC4211 has a glitch filter to prevent transients on the

FB pin from generating a system reset. The relationship

between glitch filter time and the FB transient voltage is

shown in Figure 4.

4211fb

14

LTC4211

OPERATION

Table 1. t_TIMERvs C_TIMER

The C

value is vital to ensure a proper start-up and

TIMER

reliable operation. A system may not start up if a timing

period is set too short relative to the time needed for the

output voltage to ramp up from zero to its rated value.

Conversely, this timing period should not be too long as

an output short can occur at start-up causing the exter-

nal MOSFET to overheat. A good starting point is to set

C

t

TIMER

0.0033μF

0.0047μF

0.0068μF

0.0082μF

0.01μF

2.0ms

2.9ms

4.2ms

5.1ms

6.2ms

C

= 10nF and adjust its value accordingly to suit the

TIMER

specific applications.

0.015μF

0.022μF

0.033μF

0.047μF

0.068μF

0.082μF

0.1μF

9.3ms

13.6ms

20.4ms

29.0ms

42.0ms

50.7ms

61.8ms

92.7ms

136ms

204ms

OPERATING SEQUENCE

Power-Up, Start-Up Check and Plug-In Timing Cycle

The sequence of operation for the LTC4211 is illustrated

in the timing diagram of Figure 5. When a PC board is

inserted into a live backplane, the LTC4211 first performs

0.15μF

0.22μF

0.33μF

CHECK FOR FILTER LOW (<V

– 80mV)

+ 50mV)

REF

CHECK FOR FAULT HIGH (>V

FAST COMPARATOR ARMED

ON GOES LOW

CHECK FOR GATE < 0.2V

2

SLOW COMPARATOR ARMED

RESET PULLED LOW DUE TO POWER BAD

1

3

4 5

6

7

8

9 10

V

CC

ON

V

= V

REF

TMR

2μA

TIMER

2μA

GATE

10μA

200μA

POWER

GOOD

FB

POWER BAD

(V < V

)

FB

REF

V

(V > V

)

OUT

REF

RESET

4211 F05

PLUG-IN CYCLE

FIRST TIMING CYCLE

SOFT-START CYCLE

SECOND TIMING CYCLE

Figure 5. Normal Power-Up Sequence

4211fb

15

LTC4211

OPERATION

a start-up check to make sure the supply voltage is above

its 2.3V UVLO threshold (see Time Point 1). If the input

supply voltage is valid, the gate of the external pass tran-

sistor is pulled to ground by the internal 200μA current

source connected at the GATE pin. The TIMER pin is held

low by an internal N-channel pull-down transistor (see

M6, LTC4211 Block Diagram) and the FILTER pin voltage

is pulled to ground by an internal 10μA current source.

An expression for the GATE voltage slew rate is given by

Equation 3:

dV_GATE10µA

(3)

V_GATESlew Rate,

=

dt

C_GATE

Adding C

slows the GATE voltage slew rate at the ex-

GATE

pense of slower system turn-on and turn-off time. Should

this technique be used, values for C

are recommended.

less than 150nF

GATE

Once V and ON (the ON pin is >1.316) are valid, the

CC

LTC4211 checks to make sure that GATE is OFF (V

<

The inrush current being delivered to the load while

the GATE is ramping is dependent on C and C

GATE

0.2V) at Time Point 2. An internal timing circuit is enabled

andtheTIMERpinvoltagerampsupattheratedescribedby

Equation1.AtTimePoint3(thetimingperiodprogrammed

.

GATE

LOAD

Equation 4 gives an expression for the inrush current

during the second timing cycle:

by C

), the TIMER pin voltage equals V

TIMER

(1.236V).

TMR

dV_GATE

dt

C_LOAD

C_GATE

Next, the TIMER pin voltage ramps down to Time Point 4

where the LTC4211 performs two checks: (1) FILTER pin

I

=

•C_LOAD= 10µA •

= 3300pF and C

(4)

INRUSH

voltage is low (V

< 1.156V) and (2) FAULT pin volt-

FILTER

For example, if C

= 2000μF, the

(5)

GATE

LOAD

age is high (V

> 1.286V). If both conditions are met,

FAULT

inrush current charging C

is:

LOAD

the LTC4211 begins a second timing (soft-start) cycle.

2000µF

Second Timing (Soft-Start) Cycle

I

= 10µA •

= 6.06A

INRUSH

0.0033µF

Atthebeginningofthesecondtimingcycle(TimePoint5),

the LTC4211’s FAST COMP is armed and an internal 10μA

current source working with an internal charge pump

providesthegatedrivetotheexternalpasstransistor. The

LTC4211 automatically limits the inrush current in one of

two ways: by controlling the GATE pin voltage slew rate

or by actively limiting the inrush current. If GATE voltage

At Time Point 6, the output voltage trips COMP2’s thresh-

old, signaling an output voltage “power good” condition.

At Time Point 7, RESET is asserted high, SLOW COMP is

armed and the LTC4211 enters a fault monitor mode. The

TIMER voltage then ramps down to Time Point 8.

Power-Off Cycle

slew rate control is preferred, an external capacitor C

can be used from GATE to ground, as shown in Figure 6.

GATE

AsshownatTimePoint9,anexternalhardresetisinitiated

by pulling the ON pin low (V < 1.236V). The GATE pin

ON

R

M1

SENSE

V

5V

5A

voltage is ramped to ground by the internal 200μA cur-

0.007Ω

Si4410DY

OUT

V

IN

5V

C

*

rent source, discharging C

and turning off the pass

GATE

+

R1

transistor.AsC

discharges,theoutputvoltagecrosses

LOAD

C

LOAD

36k

COMP2’s threshold, signaling a “power bad” condition at

Time Point 10. At this point, RESET is asserted low.

V

SENSE

LTC4211**

GATE

CC

FB

R2

15k

4211 F06

*VALUES ≤150nF SUGGESTED

**ADDITIONAL DETAILS OMITTED

FOR CLARITY

V

SLEW RATE CONTROL

GATE

dV

10μA

GATE

dt

=

(

)

C

GATE

Figure 6. Using an External Capacitor at GATE for

GATE Voltage Slew Rate Control

4211fb

16

LTC4211

OPERATION

SOFT-START WITH CURRENT LIMITING

In this fashion, the inrush current is controlled and C

LOAD

is charged up slowly during the soft-start cycle.

During the second timing cycle, the inrush current was

described by Equation 4. Note that there is a one-to-one

correspondenceintheinrushcurrenttoC

current is large enough to cause a voltage drop greater

than 50mV across the sense resistor, an internal servo

loop controls the operation of the 10μA current source at

the GATE pin to regulate the load current to:

The timing diagram in Figure 7 illustrates the operation

of the LTC4211 in a normal power-up sequence with lim-

ited inrush current as described by Equation 6. At Time

Point5, theGATEpinvoltagebeginstorampandthepower

.Iftheinrush

LOAD

MOSFETstartstochargeC

.AtTimePoint5A,theinrush

LOAD

current causes a 50mV voltage drop across R

and

SENSE

the internal servo loop engages, limiting the inrush cur-

rent to a fixed level. At Time Point 6, the GATE pin voltage

50mV

R_SENSE

(6)

I_{LIMIT(SOFTSTART)}

=

continues to ramp as C

charges until V

reaches its

LOAD

OUT

final value. The charging current reduces, and the internal

servo loop disengages. At the end of the soft-start cycle

(Time Point 7), RESET is high and SLOW COMP is armed.

For example, the inrush current is limited to 5A when

SENSE

R

= 0.01Ω.

CHECK FOR FILTER LOW (<V

– 80mV)

+ 50mV)

REF

CHECK FOR FAULT HIGH (>V

FAST COMPARATOR ARMED

SLOW COMPARATOR ARMED

ON GOES LOW

CHECK FOR GATE < 0.2V

2

RESET PULLED LOW DUE TO POWER BAD

1

3

4 5 5A

6

7

8

9 10

V

CC

ON

V

REF

2μA

TIMER

GATE

V

OUT

10μA

200μA

POWER GOOD

> V

POWER BAD

< V

V

OUT

V

FB

REF

LOAD CURRENT IS

REGULATING AT 50mV/R

SENSE

I

LOAD

RESET

4211 F07

PLUG-IN CYCLE

FIRST TIMING CYCLE

SOFT-START CYCLE

SECOND TIMING CYCLE

Figure 7. Normal Power-Up Sequence (with Current Limiting in Second Timing Cycle)

4211fb

17

LTC4211

OPERATION

FREQUENCY COMPENSATION AT SOFT-START

breaker if the voltage across the SENSE resistor (V

–

CC

V

= V ) is greater than 50mV for 20μs. There may

SENSE

CB

If the external gate capacitance is greater than 600pF, no

external gate capacitor is required at GATE to stabilize

the internal current-limiting loop during soft-start. Oth-

erwise, connect a gate capacitor between the GATE pin

and ground to increase the total gate capacitance to be

equal to or above 600pF. The servo loop that controls the

external MOSFET during current limiting has a unity-gain

frequency of about 105kHz and phase margin of 80° for

external MOSFET gate input capacitances to 2.5nF.

be applications where this comparator’s response time

is not long enough, for example, because of excessive

supply voltage noise. To adjust the response time of the

SLOW COMP, the MS version of the LTC4211 is chosen

and a capacitor is used at the LTC4211’s FILTER pin (see

section on Adjusting SLOW Comp’s Response Time). The

FAST COMP trips the circuit breaker to protect against fast

load overcurrents if the transient voltage across the sense

resistor is greater than 150mV for 300ns. The response

time of the LTC4211’s FAST COMP is fixed.

USING AN EXTERNAL GATE CAPACITOR

The timing diagram of Figure 7 illustrates when the

LTC4211’s electronic circuit breaker is armed. After the

first timing cycle, the LTC4211’s FAST COMP is armed

at Time Point 5. Arming FAST COMP at Time Point 5 en-

sures that the system is protected against a short-circuit

conditionduringthesecondtimingcycle. AtTimePoint7,

SLOW COMP is armed when the internal control loop is

disengaged.

In addition to reducing the inrush current (Equation 4), an

external gate capacitor (Figure 6) may also be useful to

decrease or eliminate current spikes through the MOSFET

whenpowerisfirstapplied.Atpower-up,theinstantaneous

input voltage step attempts to pull the MOSFET gate up

through the MOSFET’s drain-to-gate capacitance. If the

MOSFET’s C is small, the gate can be pulled up high

GS

enough to turn on the MOSFET, thereby allowing a cur-

rent spike to the output. This event occurs during the time

that the LTC4211 is coming out of UVLO and getting its

intelligence to hold the GATE pin low. An external capaci-

tor attenuates the voltage to which the GATE is pulled up

and eliminates the current spike. The value required is

dependent on the MOSFET capacitance specifications. In

typical applications, this capacitor is not required.

The timing diagrams in Figures 8 and 9 illustrate the op-

eration of the LTC4211 when the load current conditions

exceed the thresholds of the FAST COMP (V

>

CB(FAST)

> 50mV), respec-

150mV) and SLOW COMP (V

tively.

CB(SLOW)

RESETTING THE ELECTRONIC CIRCUIT BREAKER

Once the LTC4211’s circuit breaker is tripped, FAULT is

asserted low and the GATE pin is pulled to ground. The

LTC4211 remains latched OFF in this fault state until the

external fault is cleared. To clear the internal fault detect

circuitry and to restart the LTC4211, its ON pin must be

ELECTRONIC CIRCUIT BREAKER

TheLTC4211featuresanelectroniccircuitbreakerfunction

thatprotectsagainstexternally-generatedfaultconditions

and shorts or excessive load current and can also be con-

figured to protect against input supply overvoltage. If the

circuit breaker trips, the GATE pin is immediately pulled to

ground, the external N-channel MOSFET is quickly turned

OFF and FAULT is latched low.

driven low (V < 1.236V) for at least 150μs, after which

ON

time FAULT goes high. Toggling the ON pin from low to

high (V > 1.316V) initiates a restart sequence in the

ON

LTC4211. The timing diagram in Figure 10 illustrates a

start-up sequence where the LTC4211 is powered up into

a load overcurrent condition. Note that the circuit breaker

trips at Time Point B and is reset at Time Point 9A.

The circuit breaker trips whenever the voltage across the

sense resistor exceeds two different levels, set by the

LTC4211’s SLOW COMP and FAST COMP thresholds

(see Block Diagram). The SLOW COMP trips the circuit

4211fb

18

LTC4211

OPERATION

FAST COMPARATOR ARMED

SLOW COMPARATOR ARMED

CIRCUIT BREAKER TRIPS

SHORT CIRCUIT

RESET PULLED LOW DUE TO POWER BAD

1

2

3

4 5

6

7 8 A B C

V

CC

ON

TIMER

GATE

FPD

V

OUT

GATE

POWER BAD

< V

POWER GOOD

> V

V

OUT

V

FB

REF

V

FB

REF

RESET

>150mV

V

CC

– V

SENSE

FAULT

300ns

TYP

4211 F08

Figure 8. Output Short Circuit Causes Fast Comparator to Trip the Circuit Breaker

4211fb

19

LTC4211

OPERATION

FAST COMPARATOR ARMED

SLOW COMPARATOR ARMED

CIRCUIT BREAKER TRIPS

OVER CURRENT

RESET PULLED LOW DUE TO POWER BAD

1

2

3

4 5

6

7

8

A

B C

V

CC

ON

TIMER

GATE

V

OUT

FPD

GATE

POWER BAD

< V

POWER GOOD

V

OUT

V

FB

REF

V

> V

FB

REF

RESET

>50mV

V

– V

SENSE

CC

V

REF

FILTER

10μA

2μA

FAULT

4211 F09

CIRCUIT BREAKER TRIPS

Figure 9. Mild Overcurrent Slow Comparator Trips the Circuit Breaker After Filter Programming Period

4211fb

20

LTC4211

OPERATION

FAST COMPARATOR ARMED

SLOW COMPARATOR ARMED

CIRCUIT BREAKER TRIPS

CIRCUIT BREAKER RESET

1

2

3

4 5

6

7

8

B

9

9A

1

V

CC

ON

TIMER

GATE

FPD

GATE

OUT

V

FB

< V

REF

V

OUT

V

RESET

>50mV

V

= 50mV

SENSE

V

– V

CC

SENSE

FILTER

FAULT

REGULATING

LOAD CURRENT

t

FAULTSC

V

REF

10μA

2μA

4211 F10

t

RESET

Figure 10. Power-Up in Overcurrent, Slow Comparator Trips the Circuit Breaker

ADJUSTING SLOW COMP’S RESPONSE TIME

GATE pin is switched quickly to ground by transistor M3.

After the circuit breaker is tripped, M5 is turned OFF, M4

is turned ON and the 10μA pull-down current then holds

the FILTER pin voltage low.

The response time of SLOW COMP is adjusted using a

capacitor connected from the LTC4211’s FILTER pin to

ground. If this pin is left unused, SLOW COMP’s delay

defaults to 20μs. During normal operation, the FILTER

output pin is held low as an internal 10μA pull-down

current source is connected to this pin by transistor M4.

This pull-down current source is turned off when an

overcurrent load condition is detected by SLOW COMP.

During an overcurrent condition, the internal 2μA pull-

up current source is connected to the FILTER pin by

The SLOW COMP response time from an overcurrent fault

condition to when the circuit breaker trips (GATE OFF) is

given by Equation 7:

C_FILTER

2µA

(7)

t_SLOWCOMP= 1.236V •

+ 20µs

Forexample, ifC

=1000pF, SLOWCOMP’sresponse

FILTER

transistor M5, thereby charging C

. As the charge

time = 638μs. As a design aid, SLOW COMP’s delay time

FILTER

on the capacitor accumulates, the voltage across C

(t

) versus C

SLOW COMP

for standard values of C

FILTER FILTER

FILTER

increases.OncetheFILTERpinvoltageincreasesto1.236V,

the electronic circuit breaker trips and the LTC4211’s

from 100pF to 1000pF is illustrated in Table 2.

4211fb

21

LTC4211

OPERATION

Table 2. t_SLOWCOMPvs C_FILTER

For proper circuit breaker operation, Kelvin-sense PCB

connectionsbetweenthesenseresistorandtheLTC4211’s

CC

drawing in Figure 11 illustrates the correct way of making

connections between the LTC4211 and the sense resis-

tor. PCB layout should be balanced and symmetrical to

minimize wiring errors. In addition, the PCB layout for the

sense resistor should include good thermal management

techniques for optimal sense resistor power dissipation.

C

t

SLOWCOMP

FILTER

V

and SENSE pins are strongly recommended. The

100pF

220pF

330pF

470pF

680pF

820pF

1000pF

82μs

156μs

224μs

310μs

440μs

527μs

638μs

Thepowerratingofthesenseresistorshouldaccommodate

steady-state fault current levels so that the component is

not damaged before the circuit breaker trips. Table 4 in

the Appendix lists sense resistors that can be used with

the LTC4211’s circuit breaker.

SENSE RESISTOR CONSIDERATIONS

The fault current level at which the LTC4211’s internal

electronic circuit breaker trips is determined by a sense

resistorconnectedbetweentheLTC4211’sV andSENSE

CC

pins and two separate trip points. The first trip point is

IRC-TT SENSE RESISTOR

set by the SLOW COMP’s threshold, V

= 50mV,

CB(SLOW)

CURRENT FLOW

TO LOAD

LR251201R010F

OR EQUIVALENT

0.01, 1%, 1W

CURRENT FLOW

TO LOAD

and occurs should a load current fault condition exist for

more than 20μs. The current level at which the electronic

circuit breaker trips is given by Equation 8:

TRACK WIDTH W:

0.03" PER AMP

ON 1 OZ COPPER

W

V_CB(SLOW)

50mV

R_SENSE

I_TRIP(SLOW)

=

(8)

4211 F11

R_SENSE

TO

CC

TO

ThesecondtrippointissetbytheFASTCOMP’sthreshold,

= 150mV, and occurs during fast load current

transients that exist for 300ns or longer. The current level

at which the circuit breaker trips in this case is given by

Equation 9:

V

SENSE

V

CB(FAST)

Figure 11. Making PCB Connections to the Sense Resistor

CALCULATING CIRCUIT BREAKER TRIP CURRENT

For a selected R

value, the nominal load current that

SENSE

V_CB(FAST)

150mV

R_SENSE

trips the circuit breaker is given by Equation 10:

V_CB(NOM)

R_SENSE(NOM)R_SENSE(NOM)

(9)

I_TRIP(FAST)

=

R_SENSE

50mV

(10)

I_TRIP(NOM)

=

As a design aid, the currents at which the electronic circuit

breaker trips for common values for R

in Table 3.

are shown

SENSE

The minimum load current that trips the circuit breaker is

given by Equation 11.

Table 3. I_TRIP(SLOW)and I_TRIP(FAST)vs R_SENSE

V_CB(MIN)

R_SENSE(MAX)R_SENSE(MAX)

40mV

R

SENSE

I

TRIP(FAST)

TRIP(SLOW)

(11)

I_TRIP(MIN)

where

=

0.005Ω

0.006Ω

0.007Ω

0.008Ω

0.009Ω

0.01Ω

10A

30A

8.3A

7.1A

6.3A

5.6A

5A

25A

21A

19A

17A

15A

⎡

⎤

⎥

⎛

⎞

⎢

R_TOL

100

R_SENSE(MAX)= R_SENSE(NOM)s _⎢1+

⎟

⎠

⎜

⎝

⎥

⎦

⎣

4211fb

22

LTC4211

OPERATION

The maximum load current that trips the circuit breaker

is given in Equation 12.

standardMOSFETs.However,theV maximumratingfor

GS

logic-level MOSFETs ranges from 8V to 20V depend-

ing upon the manufacturer and the specific part number.

V_CB(MAX)

60mV

R_SENSE(MIN)R_SENSE(MIN)

The LTC4211’s GATE overdrive as a function of V is

CC

I_TRIP(MAX)

=

(12)

illustrated in the Typical Performance curves. Logic-level

and sub-logic-level MOSFETs are recommended for low

supply voltage applications and standard MOSFETs can

be used for applications where supply voltage is greater

than 4.75V.

where

⎡

⎤

⎥

⎛

⎞

⎢

R_TOL

100

R_SENSE(MIN)=R_SENSE(NOM)s 1–

⎟

⎠

⎜

⎝

⎢

⎥

⎦

⎣

Note that in some applications, the gate of the external

MOSFET can discharge faster than the output voltage

when the circuit breaker is tripped. This causes a nega-

For example:

If a sense resistor with 7mΩ 5% R is used for current

limiting, the nominal trip current I

Equations 11 and 12, I

9.02A respectively.

tive V voltage on the external MOSFET. Usually, the

GS

TOL

TRIP(NOM)

selected external MOSFET should have a V

rat-

GS(MAX)

= 7.1A. From

ing that is higher than the operating input supply voltage

to ensure that the external MOSFET is not destroyed by

= 5.4A and I

=

TRIP(MIN)

TRIP(MAX)

a negative V voltage. In addition, the V

rating

GS

GS(MAX)

For proper operation and to avoid the circuit breaker trip-

ping unnecessarily, the minimum trip current (I

of the MOSFET must be higher than the gate overdrive

)

TRIP(MIN)

voltage. Lower V rating MOSFETs can be used

GS(MAX)

mustexceedthecircuit’smaximumoperatingloadcurrent.

For reliability purposes, the operation at the maximum

with the LTC4211 if the GATE overdrive is clamped to a

lower voltage. The circuit in Figure 12 illustrates the use

of Zener diodes to clamp the LTC4211’s GATE overdrive

signal if lower voltage MOSFETs are used.

trip current (I

) must be evaluated carefully. If

TRIP(MAX)

necessary, two resistors with the same R

can be con-

value that fits

TOL

nected in parallel to yield an R

the circuit requirements.

SENSE(NOM)

R

Q1

SENSE

V

OUT

CC

D1*

D2*

POWER MOSFET SELECTION CRITERIA

To start the power MOSFET selection process, choose the

maximumdrain-to-sourcevoltage,V ,andthemaxi-

R

G

200Ω

GATE

*USER SELECTED VOLTAGE CLAMP

DS(MAX)

of the MOSFET. The V

4211 F12

mum drain current, I

D(MAX)

DS(MAX)

rating must exceed the maximum input supply voltage

(A LOW BIAS CURRENT ZENER DIODE IS RECOMMENDED)

1N4688 (5V)

1N4692 (7V): LOGIC-LEVEL MOSFET

1N4695 (9V)

1N4702 (15V): STANDARD-LEVEL MOSFET

(including surges, spikes, ringing, etc.) and the I

D(MAX)

rating must exceed the maximum short-circuit current in

the system during a fault condition. In addition, consider

three other key parameters: 1) the required gate-source

Figure 12. Optional Gate Clamp for Lower V_GS(MAX)MOSFETs

(V ) voltage drive, 2) the voltage drop across the drain-

GS

to-source on resistance, R

junction temperature rating of the MOSFET.

and 3) the maximum

DS(ON)

The R

of the external pass transistor should be low

DS(ON)

to make its drain-source voltage (V ) a small percentage

DS

RSENSE

of V . At a V = 2.5V, V + V

= 0.1V yields 4%

error at the output voltage. This restricts the choice of

MOSFETs to very low R . At higher V voltages, the

Power MOSFETs are classified into three categories:

CC

DS

standard MOSFETs (R

logic-level MOSFETs (R

specified at V = 10V)

DS(ON)

GS

specified at V = 5V), and

DS(ON)

CC

GS

V

DS

requirement can be relaxed in which case MOSFET

package dissipation (P and T ) may limit the value of

sub-logic-levelMOSFETs(R

specifiedatV =2.5V).

DS(ON)

GS

TheabsolutemaximumratingforV istypically 20Vfor

D

J

GS

4211fb

23

LTC4211

OPERATION

R

. Table 5 lists some power MOSFETs that can be The first example is shown in the schematic on the front

DS(ON)

used with the LTC4211.

page of this data sheet. In this case, the LTC4211 is

mounted on the PCB and a 20k/10k resistive divider is

connected to the ON pin. On the edge connector, R1 is

wired to a short pin. Until the connectors are fully mated,

the ON pin is held low, keeping the LTC4211 in an OFF

state.Oncetheconnectorsaremated,theresistivedivider

For reliable circuit operation, the maximum junction

temperature (T

exceed the manufacturer’s recommended value. This

includes normal mode operation, start-up, current-limit

and autoretry mode in a fault condition. Under normal

conditions the junction temperature of a power MOSFET

is given by Equation 13:

) for a power MOSFET should not

J(MAX)

isconnectedtoV ,V >1.316VandtheLTC4211begins

CC ON

a start-up cycle.

InFigure13,anLTC4211isillustratedinabasicconfigura-

tion on a PCB daughter card. The ON pin is connected to

CC

the card is seated into the backplane. R2 bleeds off any

potentialstaticchargewhichmightexistonthebackplane,

the connector or during card installation.

MOSFET Junction Temperature,

T

≤ T

+ θ • P

(13)

J(MAX)

A(MAX)

JA

D

V

on the backplane through a 10k pull-up resistor once

where

2

P = (I

) • R

D

LOAD

DS(ON)

θ

= junction-to-ambient thermal resistance

JA

A third example is shown in Figure 14 where the LTC4211

is mounted on the backplane. In this example, a 2N2222

transistor and a pair of resistors (R4, R5) form the PCB

connection sense circuit. With the card out of the chassis,

T

= maximum ambient temperature

A(MAX)

If a short circuit happens during start-up, the external

MOSFET can experience a big single pulse energy. This

is especially true if the applications only employ a small

gate capacitor or no gate capacitor at all. Consult the safe

operating area (SOA) curve of the selected MOSFET to

Q2’s base is biased to V through R5, biasing Q2 ON

CC

and driving the LTC4211’s ON pin low. The base of Q2 is

also wired to a socket on the backplane connector. When

a card is firmly seated into the backplane, the base of Q2

is then grounded through a short pin connection on the

card. Q2 is biased OFF, the LTC4211’s ON pin is pulled-up

ensure that the T

is not exceeded during start-up.

J(MAX)

USING STAGGERED PIN CONNECTORS

to V and a start-up cycle begins.

CC

The LTC4211 can be used on either a printed circuit board

or on the backplane side of the connector, and examples

for both are shown in Figures 13 and 14. Printed circuit

board edge connectors with staggered pins are recom-

mended as the insertion and removal of circuit boards do

sequence the pin connections. Supply voltage and ground

connections on the printed circuit board should be wired

to the edge connector’s long pins or blades. Control and

statussignals(likeRESET,FAULTandON)passingthrough

the card’s edge connector should be wired to short length

pins or blades.

In the previous three examples, the connection sense was

hard wired with no processor (low) interrupt capability.

As illustrated in Figure 15, the addition of an inexpensive

logic-leveldiscreteMOSFETandacoupleofresistorsoffers

processor interrupt control to the connection sense. R4

keeps the gate of M2 at V until the card is firmly mated

CC

to the backplane. A logic low for the ON/OFF signal turns

M2 OFF, allows the ON pin to pull high and turns on the

LTC4211.

PCB CONNECTION SENSE

There are a number of ways to use the LTC4211’s ON pin

to detect whether the printed circuit board has been fully

seated in the backplane before the LTC4211 commences

a start-up cycle.

4211fb

24

LTC4211

APPLICATIONS INFORMATION

BACKPLANE PCB EDGE

CONNECTOR CONNECTOR

(FEMALE)

(MALE)

V

IN

5V

R

SENSE

Q1

Si4410DY

0.007Ω

V

5V

5A

OUT

LONG

5V

V

CC

R1

10Ω

C1

0.1μF

Z1*

R6

10k

SHORT

1

2

8

7

+

RESET

V

CC

C

OUT

ON

SENSE

LTC4211

R2

10k

R4

6

5

GATE

FB

36k

LONG

4

GND

Z1 = 1SMA10A OR SMAJ10A

* OPTIONAL

R5

TIMER

15k

3

4211 F13

C

10nF

TIMER

Figure 13. Hot Swap Controller On Daughter Board (Staggered Pin Connections)

BACKPLANE PCB EDGE

CONNECTOR CONNECTOR

(FEMALE)

(MALE)

R

SENSE

Q1

Si4410DY

0.007Ω

V

5V

5A

OUT

LONG

V

5V

IN

+

C

R

OUT

X

Z1*

10Ω

X

C

0.1μF

8

7

R1

36k

R5

10k

R4

10k

V

SENSE

GATE

CC

PCB

2

4

6

ON

CONNECTION

SENSE

R3

10k

LTC4211

RESET

Q2

SHORT

1

5

RESET

GND

FB

R2

100k

TIMER

3

R7

15k

4211 F14

C

TIMER

10nF

Z1 = 1SMA10A OR SMAJ10A

* OPTIONAL

Figure 14. Hot Swap Controller on Backplane (Staggered Pin Connections)

A more elaborate connection sense scheme is shown in

Figure 16. The bases of Q1 and Q2 are wired to short pins

located on opposite ends of the edge connector because

the installation/removal of printed circuit cards gener-

pins of Q1 and Q2 finally mate to the backplane, their

bases are grounded, biasing the transistors OFF. The

ON pin voltage is then pulled high by R3 enabling the

LTC4211 and a power-up cycle begins.

ally requires rocking the card back and forth. When V

CC

A software-initiated power-down cycle can be started by

momentarilydrivingtransistorM1withalogichighsignal.

This in turn will drive the LTC4211’s ON pin low. If the ON

pin is held low for more than 8μs, the LTC4211’s GATE

pin is switched to ground.

makes connection, the bases of transistors Q1 and Q2

are pulled high, biasing them ON. When either one of

them is ON, the LTC4211’s ON pin is held low, keeping

the LTC4211 OFF. When both the short base connector

4211fb

25

LTC4211

APPLICATIONS INFORMATION

BACKPLANE PCB EDGE

CONNECTOR CONNECTOR

(FEMALE)

(MALE)

R

M1

Si4410DY

SENSE

V

5V

5A

0.007Ω

OUT

LONG

V

CC

5V

+

R

X

C

LOAD

10Ω

X

Z1*

C

100nF

8

7

6

R5

36k

R7

10k

V

SENSE

GATE

FB

CC

5

1

R1

10k

R4

10k

R6

15k

SHORT

2

μP

LTC4211

ON

LOGIC

RESET

M2

ON/OFF

R2

10k

TIMER

3

GND

4

C

TIMER

10nF

PCB CONNECTION SENSE

LONG

GND

4211 F15

ZZ1 = 1SMA10A OR SMAJ10A

M2: 2N7002LT1

* OPTIONAL

Figure 15. Connection Sense with ON/OFF Control

BACKPLANE PCB EDGE

CONNECTOR CONNECTOR

LAST BLADE OR PIN ON CONNECTOR

(FEMALE)

(MALE)

SHORT

LONG

R

M2

Si4410DY

SENSE

PCB CONNECTION SENSE

V

5V

5A

0.007Ω

OUT

V

CC

+

R

X

C

LOAD

10Ω

Z1*

C

X

0.1μF

R1

R2

R3

10k

8

7

6

10k 10k

R4

36k

R7

10k

V

SENSE

GATE

FB

CC

5

1

R5

15k

2

μP

LOGIC

LTC4211

ON

R8

10k

RESET

Q1

TIMER

3

GND

Q2

4

SHORT

ON/RESET

M1

C

TIMER

10nF

LONG

GND

4211 F16

SHORT

Z1 = 1SMA10A OR SMAJ10A

M1: 2N7002LT1

Q1, Q2: MMBT3904LT1

* OPTIONAL

LAST BLADE OR PIN ON CONNECTOR

Figure 16. Connection Sense for Rocking the Daughter Board Back and Forth

4211fb

26

LTC4211

APPLICATIONS INFORMATION

12V Hot Swap Application

Figure 18. In this case, the autoretry circuitry will attempt

to restart the LTC4211 with a 50% duty cycle, as shown

in the timing diagram of Figure 19. To prevent overheat-

ing the external MOSFET and other components during

Figure 17 shows a 12V, 3A Hot Swap application circuit.

The resistor divider R1/R2 programs the undervoltage

lockout externally and allows the system to start up after

the autoretry sequence, adding a capacitor (C

) to the

AUTO

V

increases above 9.46V. The resistor divider R3/R4

CC

circuit introduces an RC time constant (t ) that adjusts

OFF

monitors V

and signals the RESET pin when V

OUT

the autoretry duty cycle. Equation 14 gives the autoretry

goes above 10.54V. Transient voltage suppressor Z1 and

snubber network (C , R ) are highly recommended to

duty cycle, modified by this external time constant:

X

protect the 12V applications system from ringing and

t_TIMER

t_OFF+ 2 • t_TIMER

(14)

Autoretry Duty Cycle ≈

•100%

voltage spikes. R is recommended for V > 10V and it

G

CC

can minimize high frequency parasitic oscillations in the

power MOSFET.

where t

= LTC4211 system timing(see TIMER func-

TIMER

tion) and t is a time needed to charge capacitor C

OFF

AUTO

from 0V to the ON pin threshold (1.316V).

AUTORETRY AFTER A FAULT

InFigure18withR

=1M,theexternalRCtimeconstant

TIMER

AUTO

To configure the LTC4211 to automatically retry after a

is set at 1 second, the t

delay equals 6.2ms and the

fault condition, the FAULT and ON pins can be connected

autoretry duty cycle drops from 50% to 2.5%.

to a pull-up resistor (R ) to the supply, as shown in

AUTO

BACKPLANE PCB EDGE

CONNECTOR CONNECTOR

(FEMALE)

(MALE)

R

M1

Si4410DY

SENSE

0.012Ω

V

12V

3A

OUT

LONG

V

CC

12V

+

R

X

C

LOAD

10Ω

X

Z1**

R

G

C

100Ω

100nF

8

7

6

R5

R3

93.1k

10k

V

SENSE

GATE

CC

5

1

FB

R1

61.9k

R4

12.4k

SHORT

2

μP

LTC4211

ON

LOGIC

R2

10k

RESET

TIMER

3

GND

4

PCB CONNECTION SENSE

LONG

C

TIMER

8.2nF

GND

4211 F17

Z1 = 1SMA12A OR SMAJ12A

** HIGHLY RECOMMENDED

Figure 17. 12V Hot Swap Application

BACKPLANE PCB EDGE

CONNECTOR CONNECTOR

(FEMALE)

(MALE)

Q1

Si4410DY

R

SENSE

0.007Ω

V

5V

5A

OUT

LONG

V

CC

5V

R3

R

PULL-UP

10k

AUTO

(SEE NOTE)

10Ω

Z1*

C1

0.1μF

R1

36k

+

SHORT

1

2

10

9

RESET

C

LOAD

RESET

FAULT

R2

15k

ON

V

CC

LTC4211MS

3

4

5

8

7

6

FILTER

TIMER

GND

SENSE

GATE

FB

C

FILTER

100pF

NOTE:

2

Q1 MOUNTED TO 300mm COPPER AREA

= 1M YIELDS 2.5%

AUTO

DUTY CYCLE AND Q1 T

= 3.2M YIELDS 0.8%

AUTO

DUTY CYCLE AND Q1 T

C

AUTO

1μF

C

TIMER

10nF

R

= 50°C

= 37°C

CASE

LONG

Z1 = 1SMA10A OR SMAJ10A

* OPTIONAL

R

GND

4211 F18

Figure 18. LTC4211MS Autoretry Application

4211fb

27

LTC4211

APPLICATIONS INFORMATION

FAST COMPARATOR ARMED

SLOW COMPARATOR ARMED

1

2

3

4 5

6

7

8

B

ON/FAULT

V

CC

t

RESET

TIMER

GATE

FPD

GATE

OUT

V

< V

REF

FB

V

OUT

RESET

>50mV

V

= 50mV

SENSE

V

CC

– V

SENSE

REGULATED

LOAD CURRENT

V

REF

10μA

FILTER

2μA

t

OFF

1

2

FILTER

4211 F19

t

2

DUTY CYCLE =

(t

<< t , t AND t

)

OFF

FILTER

1

2

t

+ t + t

OFF

1 2

Figure 19. Autoretry Timing

To increase the RC delay, the user may either increase

up with 20ms delay set by R6 and C2. On the falling edge,

both supplies ramp down together because D1 and D2

bypass R1 and R6.

C

or R

. However, increasing C

> 2μF will

AUTO

actually limit the RC delay due to the reset sink-current

capability of the FAULT pin. Therefore, in order to increase

the RC delay, it is more effective to either increase R

AUTO

to GND.

OVERVOLTAGE TRANSIENT PROTECTION

or to put a bleed resistor in parallel with C

AUTO

Good engineering practice calls for bypassing the supply

railofanyanalogcircuit.Bypasscapacitorsareoftenplaced

at the supply connection of every active device, in addition

tooneormorelargevaluebulkbypasscapacitorspersup-

ply rail. If power is connected abruptly, the large bypass

capacitors slow the rate of rise of the supply voltage and

heavily damp any parasitic resonance of lead or PC track

inductance working against the supply bypass capacitors.

For example, increasing R

in Figure 18 from 1M to

AUTO

3.2M decreases the duty cycle to 0.8%.

HOT SWAPPING TWO SUPPLIES

Using two external pass transistors, the LTC4211 can

switch two supply voltages. In some cases, it is necessary

to bring up the dominant supply first during power-up but

ramp them down together during the power-down phase.

The circuit in Figure 20 shows how to program two dif-

ferent delays for the pass transistors. The 5V supply is

powered up first. R1 and C3 are used to set the rise and

fall times on the 5V supply. Next, the 3.3V supply ramps

TheoppositeistrueforLTC4211HotSwapcircuitsmounted

on plug-in cards. In most cases, there is no supply bypass

capacitor present on the powered supply voltage side of

the MOSFET switch. An abrupt connection, produced by

4211fb

28

LTC4211

APPLICATIONS INFORMATION

BACKPLANE PCB EDGE

CONNECTOR CONNECTOR

5V OUT

3.3V OUT

(FEMALE)

(MALE)

Q2

1/2 Si4936DY

V

3.3V

2A

OUT1

LONG

3.3V

5V

R8

10Ω

C4

+

D3**

Z1*

Z2*

C

LOAD

R2

0.015Ω

5%

R7

10Ω

5%

Q1

CURRENT LIMIT: 3.3A

0.1μF

1/2 Si4936DY

V

5V

2A

OUT2

LONG

R9

10Ω

C5

10k

D1

R3

10Ω

5%

1N4148

D2

1N4148

LTC4211

0.1μF

SHORT

1

2

3

4

8

7

6

5

RESET

V

CC

R6

1M

5%

R1

10k

5%

R4

2.74k

1%

ON

SENSE

R11

10k

R10

10k

TIMER GATE

GND FB

TRIP POINT: 4.06V

R5

C1

10nF

16V

C3

0.047μF

25V

C2

0.022μF

25V

1.2k

1%

LONG

4211 F20

GND

Z1, Z2: 1SMA10A OR SMAJ10A

* OPTIONAL

**D3 IS OPTIONAL AND HELPS DISCHARGE V

IF V

SHORTS

OUT2

OUT1

Figure 20. Switching 5V and 3.3V

insertingtheboardintoabackplaneconnector, resultsina

fast rising edge applied on the supply line of the LTC4211.

supply ringing, although a transient voltage suppressor

mayberequiredforinductiveandhighcurrentapplications.

NotethatinallLTC42115Vapplicationsschematics,tran-

sient suppressor and snubber networks have been added

for protection. The transient suppressor is optional and a

simple short-circuit test can be performed to determine

if it is necessary. These protection networks should be

mounted very close to the LTC4211’s supply input rail

using short lead lengths to minimize lead inductance.

This is shown in Figure 21, and a recommended layout

of the transient protection devices around the LTC4211

is shown in Figure 22.

Since there is no bulk capacitance to damp the para-

sitic track inductance, supply voltage transients excite

parasitic resonant circuits formed by the power MOSFET

capacitance and the combined parasitic inductance from

the wiring harness, the backplane and the circuit board

traces.

I

n these applications, there are two methods that should

be applied together for eliminating these supply voltage

transients: using transient voltage suppressor to clip the

transient to a safe level and snubber networks. Snubber

networksareseriesRCnetworkswhosetimeconstantsare

experimentallydeterminedbasedontheboard’sparasitic

resonance circuits. As a starting point, the capacitors in

these networks are chosen to be 10× to 100× the power

MOSFET’s C_OSSunder bias. The series resistor is a value

determined experimentally and ranges from 1Ω to 50Ω,

depending on the parasitic resonance circuit. For applica-

tions with supply voltages of 12V or higher the ringing

andovershootduringhot-swappingorwhentheoutputis

short-circuited can easily exceed the absolute maximum

specification of the LTC4211. To reduce the danger, tran-

sientvoltagesuppressorsandsnubbernetworksarehighly

recommended.Forapplicationswithlowersupplyvoltages

such as 5V, usually a snubber is adequate to reduce the

R

Q1

Si4410DY

SENSE

0.007Ω

V

OUT

5V

5A

V

IN

5V

R1

36k

+

8

7

6

V

SENSE

LTC4211

TIMER

GATE

FB

CC

5

R

X

C

OUT

10Ω

R2

15k

Z1*

1

2

C

X

0.1μF

RESET

ON

RESET

ON

GND

4

3

C

TIMER

INPUT

GND

OUTPUT

GND

Z1 = 1SMA10A OR SMAJ10A

* OPTIONAL

4211 F21

Figure 21. Placing Transient Protection Devices

Close to the LTC4211’s Input Rail

4211fb

29

LTC4211

APPLICATIONS INFORMATION

CURRENT FLOW

TO LOAD

CURRENT FLOW

TO LOAD

POWER MOSFET

(SO-8)

SENSE RESISTOR

(R

)

SENSE

D

G

S

W

C

X

Z1*

R

*

C

*

GX

TRANSIENT

VOLTAGE

SUPPRESSOR

SNUBBER

NETWORK

VIA TO

GND PLANE

R

R4

15k

R3

36k

NOTES:

LTC4211**

DRAWING IS NOT TO SCALE!

*OPTIONAL COMPONENTS

**ADDITIONAL DETAILS OMITTED

FOR CLARITY

1

C

TIMER

10nF

CURRENT FLOW

FROM LOAD

W

4211 F22

Figure 22. Recommended Layout for LTC4211 Protection Devices, R_SENSE, Power MOSFET and Feedback Network

4211fb

30

LTC4211

APPLICATIONS INFORMATION

SUPPLY OVERVOLTAGE DETECTION/

PROTECTION USING FILTER PIN

operation, internal control logic would trip the electronic

circuit breaker and the GATE would be pulled to ground,

shuttingOFFtheexternalpasstransistor.Ifalowersupply

overvoltage threshold is desired, use a Zener diode with

a smaller breakdown voltage.

In addition to using external protection devices around the

LTC4211 for large scale transient protection, low power

Zener diodes can be used with the LTC4211’s FILTER

pin to act as a supply overvoltage detection/protection AtimingdiagramforillustratingLTC4211operationundera

circuit on either the high side (input) or low side (output) high side overvoltage condition is shown in Figure 24. The

of the external pass transistor. Recall that internal control start-up sequence in this case (between Time Points 1 and

circuitry keeps the LTC4211 GATE voltage from ramping 2)isidenticaltoanyotherstart-upsequenceundernormal

up if V

> 1.156V, or when an external fault condition operating conditions. At Time Point 2A, the input supply

FILTER

(V

> 1.236V) causes FAULT to be asserted low.

voltage causes the Zener diode to conduct thereby forcing

> 1.156V. At Time Point 3, FAULT is asserted low

FILTER

V

FILTER

High Side (Input) Overvoltage Protection

and the TIMER pin voltage ramps down. At Time Point 4,

the LTC4211 checks if V < 1.156V. FAULT is asserted

FILTER

As shown in Figure 23, a low power Zener diode can

be used to sense an overvoltage condition on the input

(high) side of the main 5V supply. In this example, a low

bias current 1N4691 Zener diode is chosen to protect the

low (but not latched) to indicate a start-up failure. The

start-up sequence only resumes with the second timing

cycleatTimePoint5whentheinputovervoltagecondition

is removed. At this point in time, the GATE pin voltage is

allowed to ramp up, FAULT is pulled to logic high and the

circuit breaker is armed. At any time after Time Point 5,

system. Here, the Zener diode is connected from V to

CC

the LTC4211’s FILTER pin (Pin 3 MS). If the input volt-

age to the system is greater than 6.8V during start-up,

the voltage on the FILTER pin is pulled higher than its

1.156V threshold. As a result, the GATE pin is not allowed

to ramp and the second timing cycle will not commence

untilthesupplyovervoltageconditionisremoved.Should

the supply overvoltage condition occur during normal

should a supply overvoltage condition develop (V

>

FILTER

1.236V), the electronic circuit breaker will trip, the GATE

will be pulled low to turn off the external MOSFET and

FAULT will be asserted low and latched. This sequence is

shown in detail at Time Point B.

BACKPLANE PCB EDGE

CONNECTOR CONNECTOR

(FEMALE)

(MALE)

LONG

5V

R3

10Ω

C1

R4

10k

R

SENSE

0.007Ω

Q1

Si4410DY

Z1*

V

5V

5A

OUT

0.1μF

SHORT

FAULT

R1

R5

Z2

LTC4211

36k

10k

+

6.2V

SHORT

1

2

3

4

5

10

9

C

LOAD

RESET

RESET FAULT

R2

15k

ON/OFF

ON

V

CC

R6

10k

R7

10k

8

FILTER SENSE

TIMER GATE

7

C

47pF

C

FILTER

TIMER

6

4211 F23

10nF

GND

FB

LONG

GND

Z1 = 1SMA10A OR SMAJ10A

Z2 = 1N4691

* OPTIONAL

Figure 23. LTC4211MS High Side Overvoltage Protection Implementation

4211fb

31

LTC4211

APPLICATIONS INFORMATION

IF ANY FAULT HAPPENS

AFTER THIS POINT, THE

CIRCUIT BREAKER TRIPS

AND FAULT LATCHES LOW

SLOW COMPARATOR ARMED

IF OVERVOLTAGE GOES

AWAY, SECOND CYCLE

CONTINUES

OVERVOLTAGE CIRCUIT BREAKER

TRIPS, GATE PULLS DOWN AND

FAULT LATCHES LOW

OVERVOLTAGE

2A

1

2

3

4

5

6

7

8

A B C

V

CC

ON

TIMER

GATE

V

FPD

OUT

POWER BAD

< V

GATE

OUT

V

POWER GOOD

> V

FB

REF

V

FB

REF

RESET

FILTER

FAULT

>V

– 80mV

REF

4211 F24

FAULT

LATCHED LOW

FAULT IS PULLED LOW (BUT NOT LATCHED)

DUE TO A START-UP OVERVOLTAGE PROBLEM

Figure 24. High Side Overvoltage Protection

Low Side (Output) Overvoltage Protection

diagram for a low side output overvoltage condition. In

this example, V starts up in an overvoltage condition

CC

A Zener diode can be used in a similar fashion to detect/

protect the system against a supply overvoltage condition

on the load (or low) side of the pass transistor. In this

case, the Zener diode is connected from the load to the

LTC4211’sFILTERpin,asshowninFigure25.Anadditional

diode, D1, preventstheFILTERpinfrompullinglowduring

an output short-circuit. Figure 26 illustrates the timing

but the LTC4211 can only sense the overvoltage supply

condition at Time Point 6 when the GATE pin has ramped

up. At Time Point 6, V

is greater than 1.236V, the

FILTER

circuit breaker is tripped, the GATE pin voltage is pulled

to ground and FAULT is asserted low and latched.

4211fb

32

LTC4211

APPLICATIONS INFORMATION

BACKPLANE PCB EDGE

CONNECTOR CONNECTOR

(FEMALE)

(MALE)

D1

IN4148

LONG

5V

R3

10k

R4

10Ω

C1

R

Q1

Si4410DY

SENSE

Z1*

V

0.007Ω

OUT

5V

0.1μF

SHORT

5A

FAULT

R1

R5

Z2

LTC4211

RESET FAULT

ON

36k

+

10k

6.2V

SHORT

C

1

2

3

4

5

10

9

LOAD

RESET

R2

15k

ON/OFF

V

CC

R6

10k

R7

10k

8

FILTER SENSE

TIMER GATE

7

C

TIMER

10nF

FILTER

6

4211 F25

47pF

GND

FB

LONG

GND

Z1 = 1SMA10A OR SMAJ10A

Z2 = 1N4691

* OPTIONAL

Figure 25. LTC4211MS Low Side Overvoltage Protection Implementation

OVERVOLTAGE SENSED BY FILTER PIN AND CIRCUIT BREAKER TRIPS

1

2

3 4 5

6

V

ON

CC

TIMER

GATE

V

OUT

FPD

RESET

V

REF

FILTER

FAULT

4211 F26

Figure 26. Low Side Overvoltage Protection

4211fb

33

LTC4211

APPLICATIONS INFORMATION

perfoilisapproximately0.54mΩ/square,trackresistances

add up quickly in high current applications. Thus, to keep

PCB track resistance and temperature rise to a minimum,

PCB track width must be appropriately sized. Consult Ap-

pendix A of LTC Application Note 69 for details on sizing

and calculating trace resistances as a function of copper

thickness.

In either case, the LTC4211 can be configured to au-

tomatically initiate a start-up sequence. Please refer

to the section on AutoRetry After a Fault for additional

information.

PCB Layout Considerations

For proper operation of the LTC4211’s circuit breaker

function, a 4-wire Kelvin connection to the sense resis-

tors is highly recommended. A recommended PCB layout

for the sense resistor, the power MOSFET and the GATE

drive components around the LTC4211 is illustrated in

Figure 22. In Hot Swap applications where load currents

can reach 10A or more, narrow PCB tracks exhibit more

resistance than wider tracks and operate at more elevated

temperatures. Since the sheet resistance of 1 ounce cop-

In the majority of applications, it will be necessary to use

plated-through vias to make circuit connections from

component layers to power and ground layers internal

to the PC board. For 1 ounce copper foil plating, a good

starting point is 1A of DC current per via, making sure the

via is properly dimensioned so that solder completely fills

any void. For other plating thicknesses, check with your

PCB fabrication facility.

4211fb

34

LTC4211

APPENDIX

Table 4 lists some current sense resistors that can be used

withthecircuitbreaker.Table5listssomepowerMOSFETs

that are available. Table 6 lists the web sites of several

manufacturers.Sincethisinformationissubjecttochange,

please verify the part numbers with the manufacturer.

Table 4. Sense Resistor Selection Guide

CURRENT LIMIT VALUE

PART NUMBER

LR120601R050

LR120601R025

LR120601R020

WSL2512R015F

LR251201R010F

WSR2R005F

DESCRIPTION

MANUFACTURER

IRC-TT

1A

0.05Ω 0.5W 1% Resistor

0.025Ω 0.5W 1% Resistor

0.02Ω 0.5W 1% Resistor

0.015Ω 1W 1% Resistor

0.01Ω 1.5W 1% Resistor

0.005Ω 2W 1% Resistor

2A

IRC-TT

2.5A

3.3A

5A

IRC-TT

Vishay-Dale

IRC-TT

10A

Vishay-Dale

Table 5. N-Channel Selection Guide

CURRENT LEVEL (A)

PART NUMBER

DESCRIPTION

MANUFACTURER

0 to 2

MMDF3N02HD

MMSF5N02HD

MTB50N06V

Dual N-Channel SO-8

DS(ON)

ON Semiconductor

R

= 0.1Ω, C = 455pF

ISS

2 to 5

Single N-Channel SO-8

= 0.025Ω, C = 1130pF

ON Semiconductor

R

DS(ON)

ISS

5 to 10

10 to 20

Single N-Channel DD Pak

= 0.028Ω, C = 1570pF

R

DS(ON)

ISS

MTB75N05HD

Single N-Channel DD Pak

= 0.0095Ω, C = 2600pF

R

DS(ON)

ISS

Table 6. Manufacturers’ Web Sites

MANUFACTURER

TEMIC Semiconductor

International Rectifier

ON Semiconductor

Harris Semiconductor

IRC-TT

WEB SITE

www.temic.com

www.irf.com

www.onsemi.com

www.semi.harris.com

www.irctt.com

Vishay-Dale

www.vishay.com

www.diodes.com

Vishay-Siliconix

Diodes, Inc.

4211fb

35

LTC4211

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

MS8 Package

8-Lead Plastic MSOP

(Reference LTC DWG # 05-08-1660 Rev F)

3.00 p 0.102

(.118 p .004)

(NOTE 3)

0.52

(.0205)

REF

8

7 6

5

3.00 p 0.102

(.118 p .004)

(NOTE 4)

4.90 p 0.152

(.193 p .006)

0.889 p 0.127

(.035 p .005)

DETAIL “A”

0.254

(.010)

0o – 6o TYP

GAUGE PLANE

5.23

(.206)

MIN

1

2

3

4

3.20 – 3.45

(.126 – .136)

0.53 p 0.152

(.021 p .006)

1.10

(.043)

MAX

0.86

(.034)

REF

DETAIL “A”

0.18

(.007)

0.65

(.0256)

BSC

0.42 p 0.038

(.0165 p .0015)

SEATING

PLANE

TYP

0.22 – 0.38

0.1016 p 0.0508

RECOMMENDED SOLDER PAD LAYOUT

(.009 – .015)

(.004 p .002)

0.65

(.0256)

BSC

TYP

NOTE:

MSOP (MS8) 0307 REV F

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

4211fb

36

LTC4211

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

MS Package

10-Lead Plastic MSOP

(Reference LTC DWG # 05-08-1661 Rev E)

0.889 0.127

(.035 .005)

5.23

3.20 – 3.45

(.206)

(.126 – .136)

MIN

3.00 0.102

(.118 .004)

(NOTE 3)

0.497 0.076

(.0196 .003)

REF

0.50

(.0197)

BSC

0.305 0.038

(.0120 .0015)

TYP

10 9

8

7 6

RECOMMENDED SOLDER PAD LAYOUT

3.00 0.102

(.118 .004)

(NOTE 4)

4.90 0.152

(.193 .006)

DETAIL “A”

0.254

(.010)

0° – 6° TYP

GAUGE PLANE

1

2

3

4 5

0.53 0.152

(.021 .006)

0.86

(.034)

REF

1.10

(.043)

MAX

DETAIL “A”

0.18

(.007)

SEATING

PLANE

0.17 – 0.27

(.007 – .011)

TYP

0.1016 0.0508

(.004 .002)

0.50

(.0197)

BSC

MSOP (MS) 0307 REV E

NOTE:

1. DIMENSIONS IN MILLIMETER/(INCH)

2. DRAWING NOT TO SCALE

3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.

MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.

INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE

5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX

4211fb

37

LTC4211

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.

S8 Package

8-Lead Plastic Small Outline (Narrow .150 Inch)

(Reference LTC DWG # 05-08-1610 Rev G)

.189 – .197

(4.801 – 5.004)

.045 t.005

NOTE 3

.050 BSC

7

5

8

6

.245

MIN

.160 t.005

.150 – .157

(3.810 – 3.988)

NOTE 3

.228 – .244

(5.791 – 6.197)

.030 t.005

TYP

1

3

4

2

RECOMMENDED SOLDER PAD LAYOUT

.010 – .020

(0.254 – 0.508)

w 45s

.053 – .069

(1.346 – 1.752)

.004 – .010

(0.101 – 0.254)

.008 – .010

(0.203 – 0.254)

0s– 8s TYP

.016 – .050

(0.406 – 1.270)

.050

(1.270)

BSC

.014 – .019

(0.355 – 0.483)

TYP

NOTE:

INCHES

1. DIMENSIONS IN

(MILLIMETERS)

2. DRAWING NOT TO SCALE

3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)

4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE

SO8 REV G 0212

4211fb

38

LTC4211

REVISION HISTORY ^{(Revision history begins at Rev B)}

REV

DATE

DESCRIPTION

PAGE NUMBER

B

03/12 Updated Pin description information

10, 11

13

Updated Figure 2 and supporting text

Moved Figure 7 and supporting text to page 16 and renumbered to Figure 6

Updated text under Second Timing (Soft-Start) Cycle

16

Replaced C with C

in Figure 6

GATE

16

GX

Revised Figure 26 and supporting Low Side (Output) Overvoltage Protection text

32, 33

4211fb

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-

tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

39

LTC4211

TYPICAL APPLICATION

LOW COST OVERVOLTAGE PROTECTION

COMP circuit breaker is available and the current limit

level is 150mV/R . During the soft-cycle, the inrush

SENSE

There is an alternative method to implementing the over-

voltage protection using a resistor divider at the FILTER

pin (see Figures 27 and 28). In this implementation, the

SLOW COMP is NULL in Normal Mode. Only the FAST

current servo loop is at 50mV/R

. So, the heavy load

SENSE

should only turn on at/after the end of second cycle where

the RESET pin goes high.

BACKPLANE PCB EDGE

CONNECTOR CONNECTOR

(FEMALE)

(MALE)

LONG

5V

R3

10Ω

C1

R4

10k

R

Q1

Si4410DY

Z1*

SENSE

0.007Ω

V

5V

5A

OUT

0.1μF

SHORT

FAULT

R1

R5

R8

LTC4211

36k

10k

+

4.3k

SHORT

1

2

3

4

5

10

9

C

LOAD

RESET

RESET FAULT

R2

15k

ON/OFF

ON

V

CC

R6

10k

R7

10k

8

FILTER SENSE

TIMER GATE

7

R9

750Ω

C

TIMER

10nF

6

4211 F27

GND

FB

LONG

GND

Z1 = 1SMA10A OR SMAJ10A

* OPTIONAL

Figure 27. LTC4211MS High Side Overvoltage Protection Implementation

(In Normal Mode, SLOW COMP Is Disabled. In Soft-Start Cycle, I_SOFTSTARTIs Still 50mV/R_SENSE

)

BACKPLANE PCB EDGE

CONNECTOR CONNECTOR

(FEMALE)

(MALE)

LONG

5V

R3

10k

R7

10Ω

C1

R

Q1

Si4410DY

SENSE

0.007Ω

Z1*

V

5V

5A

OUT

0.1μF

SHORT

FAULT

R1

R4

LTC4211

3.6k

10k

+

SHORT

1

2

3

4

5

10

9

C

LOAD

RESET

RESET FAULT

R2

750Ω

ON/OFF

ON

V

CC

R5

10k

R6

10k

8

FILTER SENSE

TIMER GATE

7

R8

750Ω

C

TIMER

10nF

6

GND

FB

4211 F28

LONG

GND

Z1 = 1SMA10A OR SMAJ10A

* OPTIONAL

Figure 28. LTC4211MS Low Side Overvoltage Protection Implementation

(In Normal Mode, SLOW COMP Is Disabled. In Soft-Start Cycle, I_SOFTSTARTIs Still 50mV/R_SENSE

)

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4211fb

LT 0312 REV B • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

40

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTC4211_12
厂家：	Linear
描述：	Hot Swap Controller 热插拔控制器控制器
文件：	总40页 (文件大小：312K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTC4211_12 [Linear]

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