LTC4311CSC6-TRPBF [Linear]
Low Voltage I2C/SMBus Accelerator; 低电压I2C / SMBus加速器
| 型号： | LTC4311CSC6-TRPBF |
| 厂家： | 
Linear |
| 描述： | Low Voltage I2C/SMBus Accelerator |
| 文件： | 总12页 (文件大小：138K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC4311
Low Voltage I C/SMBus
Accelerator
2
FEATURES
DESCRIPTION
2
2
The LTC®4311 is a dual I C active pull-up designed to
■
Improves I C Bus Rise Time Transition
■
Ensures Data Integrity with Multiple Devices on the
enhance data transmission speed and reliability for bus
loadingconditionswellbeyondthe400pFI Cspecification
limit. The LTC4311 operates at supply voltages from 1.6V
to 5.5V and is also compatible with SMBus.
2
2
I C Bus.
■
Wide Supply Voltage Range: 1.6V to 5.5V
■
Improves Low State Noise Margin
■
Up to 400kHz Operation
The LTC4311 allows multiple device connections or a lon-
ger, more capacitive interconnect, without compromising
slew rates or bus performance, by using two slew limited
pull-up currents.
■
Auto Detect Low Power Standby Mode
■
Low (<5μA) Supply Current Shutdown
■
Does Not Load Bus When Disabled or Powered Down
■
Strong Slew Limited Pull-up Current
8kV Human Body Model ꢀSD Ruggedness
■
Duringpositivebustransitions,theLTC4311providesslew
limited pull-up currents to quickly slew the I C or SMBus
2
■
2mm × 2mm DFN and SC70 Packages
linestothebuspull-upvoltage.Duringnegativetransitions
or steady DC levels, the currents are disabled to improve
negative slew rate, and improve low state noise margins.
An auto detect standby mode reduces supply current if
both SCL and SDA are high. When disabled, the LTC4311
goes into low (<5μA) current shutdown.
APPLICATIONS
■
Notebook and Palmtop Computers
■
Portable Instruments
■
Battery Chargers
■
Industrial Controls
The LTC4311 is available in the 2mm × 2mm × 0.75mm
DFN, and SC70 packages.
■
TV/Video Products
■
ACPI SMBus Interface
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All
other trademarks are the property of their respective owners. Protected by U.S. Patents
including 6356140 and 6650174.
TYPICAL APPLICATION
Comparison of I2C Waveforms for
the LTC4311 vs Resistor Pull-Up
V
V
CC
CC
LTC4311
2.5V
2.5V
V
CC
BUS1
C1
0.01μF
ꢀNABLꢀ
GND
10k
10k
BUS2
2
LTC4311
1V/DIV
I C
SCL
SDA
CLK
IN
DATA
IN
CLK
IN
DATA
IN
R
= 15.8k
PULL-UP
CLK
OUT
DATA
OUT
CLK
OUT
DATA
OUT
4311 TA01b
V
C
I C
= 5V
1μs/DIV
CC
LD
= 200pF
DꢀVICꢀ 1
DꢀVICꢀ N
f 2 = 100kHz
4311 TA01a
4311fa
1
LTC4311
ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2)
Storage Temperature Range (DFN) ........–65°C to 125°C
Storage Temperature Range (SC70).......–65°C to 125°C
Lead Temperature (Soldering 10, sec)
V
to GND .................................................... –0.3 to 6V
CC
BUS1, BUS2, ꢀNABLꢀ Inputs......................... –0.3 to 6V
Operating Temperature
SC70 ............................................................ 300°C
LTC4311C ................................................ 0°C to 70°C
LTC4311I..............................................–40°C to 85°C
PIN CONFIGURATION
TOP VIꢀW
TOP VIꢀW
6
5
4
GND
ꢀNABLꢀ
NC
1
2
3
V
1
2
3
6
5
4
BUS1
GND
CC
7
BUS2
BUS1
GND
V
CC
ꢀNABLꢀ
BUS2
SC70 PACKAGꢀ
6-LꢀAD PLASTIC SC70
DFN PACKAGꢀ
6-LꢀAD (2mm s 2mm) PLASTIC DFN
T
= 125°C, θ = 150° C/W
JA
JMAX
T
= 125°C, θ = 102°C/W
JMAX
JA
ꢀXPOSꢀD PAD (PIN 7) PCB CONNꢀCTION TO GND IS OPTIONAL (Note 3)
ORDER INFORMATION
Lead Free Finish
TAPE AND REEL (MINI)
LTC4311CDC#TRMPBF
LTC4311IDC#TRMPBF
LTC4311CSC6#TRMPBF
LTC4311ISC6#TRMPBF
TAPE AND REEL
PART MARKING*
LCNG
LCNG
LCNF
LCNF
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC4311CDC#TRPBF
LTC4311IDC#TRPBF
LTC4311CSC6#TRPBF
LTC4311ISC6#TRPBF
0°C to 70°C
–40°C to 85°C
0°C to 70°C
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic DFN
6-Lead (2mm × 2mm) Plastic SC70
6-Lead (2mm × 2mm) Plastic SC70
–40°C to 85°C
TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
4311fa
2
LTC4311
ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating
•
temperature range, otherwise specifications are at TA = 25°C. VCC = 3.3V, unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
5.5
300
45
UNITS
V
●
●
●
●
●
V
CC
Positive Supply Voltage
Supply Current
1.6
I
I
I
I
V
CC
V
CC
V
CC
= 5.5V, ꢀNABLꢀ = 5.5V, V
= 5.5V, ꢀNABLꢀ = 5.5V, V
= V
= V
= 0V
200
26
μA
CC
BUS1
BUS1
BUS2
Supply Current, Standby Mode
Supply Current, Disabled
Transient Boosted Pull-up Current
= 5.5V
μA
CC_STANDBY
CC_DISABLꢀD
PULLUPAC
BUS2
= 5.5V, ꢀNABLꢀ = 0V, V
= V
= 5.5V
BUS2
5
μA
BUS1
Positive Transition on Bus, Slew Rate = 0.5V/μs
2.5
5
mA
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 1.8V, BUS > V
THR
●
●
●
●
●
●
●
●
●
I
I
BUS1,BUS2, Input Leakage Current
ꢀNABLꢀ Input Leakage Current
Bus Input Threshold Voltage
= 0V, V
= 0V, V
= 1.8V
= 2.5V
= V
= 5.5V
5
10
μA
μA
V
BUS(IN)
BUS1
BUS2
= 5.5V
ꢀNABLꢀ(IN)
ꢀNABLꢀ
V
THR
0.45
0.65
0.68
0.4
0.55
0.75
0.78
1
0.65
0.85
0.88
1.5
V
= 2.7V to 5.5V
= 1.6V, 5.5V
V
V
ꢀNABLꢀ Threshold Voltage
V
THR_ꢀNABLꢀ
SR
THRꢀSH
Slew Rate Detector Threshold
BUS > V , V = 1.8V, 5.5V
0.2
0.5
V/μs
ns
kHz
THR CC
2
t
r
Fast Mode I C Bus Rise Time
Bus Capacitance = 400pF, V = 3V (Note 4)
300
CC
f
Bus Maximum Operating Frequency
(Note 5)
400
MAX
2
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. ꢀxposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 4: The rise time of an I C bus line is calculated from V
to
IL(MAX)
V
or 0.9V to 2.1V (with V = 3V). This parameter is guaranteed by
design and not tested. With a minimum boosted pull-up current of 2.5mA:
Rise Time = (2.1V – 0.9V) • 400pF/2.5mA = 0.19μs.
IH(MIN)
CC
Note 2: All currents into pins are positive. All voltages are referenced to
Note 5: Determined by design, not tested in production.
GND unless otherwise specified.
Note 3: Thermal characteristics are determined with exposed pad soldered
to GND plane. If the exposed pad is left open, thermal characteristics can
be drastically different.
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LTC4311
TYPICAL PERFORMANCE CHARACTERISTICS
(TA = 25°C, unless otherwise indicated)
Boost Pull-Up Current vs Bus
Boost Pull-Up Current vs
Capacitance
Temperature
40
60
R
= 2kΩ
V
CC
= 5.5V
R
C
= 4.7kΩ
= 1nF
p
P
BUS
35
30
50
V
CC
= 5.5V
40
30
25
20
15
10
5
V
V
= 3.3V
= 2.5V
CC
CC
V
= 3.3V
CC
20
10
0
V
V
= 2.5V
= 1.8V
CC
CC
V
= 1.8V
CC
0
–20
0
40
60
80 100
–40
20
0
1000
2000
3000
4000
5000
CAPACITANCꢀ (pF)
TꢀMPꢀRATURꢀ (°C)
4311 G02
4311 G01
Rise Time vs Capacitance
Supply Current vs Temperature
210
300
250
V
CC
= 1.8V
V
CC
= 2.5V
V
CC
= 5.5V
200
190
V
CC
= 3.3V
BUS1 = BUS2 = 0V
200
150
V
V
= 3.3V
= 2.5V
CC
CC
180
170
160
150
140
V
CC
= 5.5V
100
50
0
R
= 2kΩ
P
Measured from 0.3•V to 0.7•V
V
= 1.8V
0
CC
CC
CC
130
–20
40
60
80 100
–40
20
0
1000
2000
3000
4000
5000
TꢀMPꢀRATURꢀ (°C)
CAPACITANCꢀ (pF)
4311 G03
4311 G04
Bus Input Threshold Voltage vs
Supply Voltage
Standby Current vs Temperature
30
28
0.8
0.75
0.7
26
24
22
20
18
V
V
= 5.5V
= 3.3V
CC
CC
0.65
0.6
0.55
0.5
0.45
0.4
V
= 2.5V
40
CC
V
= 1.8V
0
CC
16
2
3
5
1
6
80
100
4
–40 –20
20
60
SUPPLY VOLTAGꢀ (V)
TꢀMPꢀRATURꢀ (°C)
4311 G05
4311 G06
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LTC4311
PIN FUNCTIONS
BUS1: Active Pull-up for Bus. Connect to either clock line
or data line for 2-wire bus.
EXPOSED PAD (DFN Package Only): ꢀxposed Pad may
be left open or connected to device ground.
BUS2: Active Pull-up for Bus. Connect to either clock line
or data line for 2-wire bus.
GND: Device Ground. Connect this pin to a ground plane
for best results.
ENABLE: Device ꢀnable Input. This is a 1V nominal digital
threshold input pin. For normal operation drive ꢀNABLꢀ
to a voltage greater than 1.5V. Driving ꢀNABLꢀ below the
0.4V threshold puts the device in a low (<5μA) current
shutdown mode and puts the BUS pins in a high imped-
V : Supply Voltage Input. Connect this pin to bus supply
CC
and place a bypass capacitor of at least 0.01μF close to
V
CC
for best results.
ance state. If unused, connect to V .
CC
BLOCK DIAGRAM
5mA
BUS1
V
CC
SLꢀW RATꢀ
DꢀTꢀCTOR
5mA
BUS2
SLꢀW RATꢀ
DꢀTꢀCTOR
+
–
V
V
THR
THR
CONTROL
LOGIC AND
INTꢀRNAL SLꢀW
COMPARATOR
+
–
+
–
V
V
– 0.4
– 0.4
CC
+
–
CC
+
GND
ꢀNABLꢀ
1V
–
4311 BD
4311fa
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LTC4311
OPERATION
I C and SMBus Overview
2
are optimized for low voltage operation, while still meet-
2
ing standard thresholds for compliant I C and SMBus
2
The I C communication protocol employs open-drain
systems.
pull-down drivers with resistive or current source pull-
ups. This protocol allows multiple devices to drive and
monitor the bus without bus contention. The simplicity
of resistive or fixed current source pull-ups is offset by
the slow rise times resulting when bus capacitance is
high. Rise times can be improved by using lower pull-up
resistor values or higher fixed current source values, but
the additional current increases the low state bus voltage,
decreasing noise margins. Slow rise times can seriously
impact data reliability, enforcing a maximum practical bus
The slew limited pull-up current is only turned on if the
bus line voltage is greater than the supply dependent
comparator threshold voltage and the positive slew rate
of the bus line is greater than the typical 0.2V/μs threshold
of the slew rate detector. The pull-up current remains on
until the voltage on the bus line is within 0.4V of V or
CC
the slew rate drops below 0.2V/μs.
The pull-up current is slew limited to maintain signal
integrity for busses that have very little capacitive load.
In a lightly loaded system a strong pull-up could result in
fast edge rates that cause reflections on the bus. These
reflections can be detected by devices on the bus as extra
clock edges, could result in erroneous data, or cause a
stuck bus. An internal slew limit comparator limits the rate
the pull-up current can slew the bus lines to 100V/μs.
2
speed well below the established I C or SMBus maximum
transmission rate.
The LTC4311 overcomes these limitations by providing a
boostedpull-upcurrentonlyduringpositivebustransitions
toquicklyslewlargebuscapacitances.Therefore,risetime
is dramatically improved, especially with maximum or out
2
of specification I C or SMBus loading conditions.
Auto Detect Standby Mode and Shutdown Mode
The LTC4311 has separate but identical circuitry for each
BUS output pin. The circuitry consists of a positive edge
slew rate detector and a voltage comparator. The voltage
comparator has a supply dependent threshold. At supply
When BUS1 and BUS2 are both high the LTC4311 reduces
the standby supply current. Internal comparators detect
when the bus pins are within 400mV of V , and reduce
CC
the supply current to 26μA. When the ꢀNABLꢀ pin is
grounded, the LTC4311 enters a low (<5μA) supply cur-
rent shutdown mode. Both bus pins are high impedance
in shutdown, regardless of the bus pin voltage.
voltages below 2.7V the comparator threshold is 0.3V ,
CC
and at higher voltages the comparator threshold is a
constant 0.8V. This allows the rise time accelerator to be
used in non-compliant systems where the bus thresholds
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LTC4311
APPLICATIONS INFORMATION
Selecting the values of R and R
Low State Noise Margin
S
P
The typical configuration for the data bus for a 2-wire bus
is shown in Figure 1. The parameters R and R should be
A low value of V , the low state logic level, is desired
OL
for good noise margin. V is calculated as follows:
P
S
OL
chosencarefully.Adescriptionoftheprocessforchoosing
the values of R and R follows.
RL • VCC
VOL =
P
S
RL +RP
(1)
An external pull-up resistor R is required in each bus
P
line to supply a steady state pull-up current if the bus is
at logic zero. This pull-up current is used for slewing the
bus line during the initial portion of the positive transition
in order to activate the LTC4311 pull-up current.
R is the series sum of R and R , the on resistance of
the open-drain driver.
L
S
ON
Increasing the value of R decreases the value of V .
P
OL
Increasing R increases the value of V .
L
OL
Using an external pull-up resistor R to supply steady
P
Initial Slew Rate
state pull-up current provides the freedom to adjust rise
time versus fall time as well as defining the low state
The initial slew rate, SR, of the bus is determined by:
logic-level (V ).
OL
VCC – VOL
SR =
For I/O stage protection from ꢀSD and high voltage spikes
RP •CBUS
on the bus, a series resistor R (Figure 1) is sometimes
S
(2)
added to the open drain driver of the bus agents.
SR must be greater than SR
, the LTC4311 slew rate
THRꢀSH
detector threshold (0.5V/μs max), in order to activate the
pull-up current.
V
CC
LTC4311
DYNAMIC
CURRꢀNT
PULL-UP
R
P
S
2
I C Rise and Fall Time
Bus
2
Rise time of an I C line is derived using equation 3.
C
BUS
R
tr = –Rp •CBUS
•
DATA
IN
⎧
⎪
⎫
⎪
V
IHMIN – VCC –Rp •IPULLUPAC
ln
⎨
⎬
DATA
OUT
R
V
– VCC –Rp •IPULLUPAC ⎪
ON
⎪ ILMAX
⎩
⎭
(3)
4311 F01
2
Fall time of an I C line is derived using equation 4.
Figure 1. Typical 2-Wire Bus Configuration
V
VCC
⎧
⎫
IHMIN •(RP +RL )–RL
⎪
⎪
⎪
⎪
Both the values of R and R must be chosen carefully
tf = RT •CBUS •ln
P
S
⎨
⎪
⎬
⎪
V
ILMAX
to meet the low state noise margin and all bus timing
requirements.
•(RP +RL )–RL
VCC
⎪
⎩
⎪
⎭
(4)
A discussion of the electrical parameters affected by the
values of R and R , as well as the general procedure for
S
P
where R is the parallel equivalent of R and R .
T
P
L
selecting the values of R and R follows.
S
P
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LTC4311
APPLICATIONS INFORMATION
2
For an I C system with fixed input levels, V
= 1.5V
A general procedure for selecting R and R is as fol-
P L
ILMAX
2
and V
= 3V. For I C systems with V related input
lows:
IHMIN
CC
levels, V
= 0.3V and V
= 0.7V .
ILMAX
CC
IHMIN
CC
1. R is first selected based on the I/O protection
L
2
C
BUS
is the total capacitance of the I C line.
requirement. Generally, an R of 100Ω is sufficient for
S
high voltage spikes and ꢀSD protection. R
is
ON
SMBus Rise and Fall Time
determined by the size of the open-drain driver, a large
driver will have a lower R .
ON
Rise time of a SMBus line is derived using equations 5,
6 and 7.
2. The value of R is determined based on the V and
P
OL
minimumslewraterequirements.TheV willdetermine
OL
tr = t1+ t2
(5)
the smallest resistance value that can be used in a
system, and the minimum slew requirement will bound
the resistance on the upper end. Generally the largest
value of resistance that meets the minimum slew rate
with some margin will be selected.
t is the time from when the bus crosses the lower slew
1
ratemeasurementpoint,untilthebusreachesV andthe
THR
accelerators fire. The time from when the accelerators fire
until the bus reaches the upper slew rate measure point is
given by t . ꢀquations for t and t are given here:
2
1
2
2
3. For I C systems incorporating the LTC4311, the rise
⎧
⎨
⎩
⎫
⎬
⎭
VTHR – VCC
ILMAX – 0.15V – VCC
times are met under most loading conditions, due to
the strong accelerator current. The pull-down drivers
are typically low impedance, and therefore fall times
are not generally an issue. Rise and fall time
requirements must be verified using equations 3 and
t1 = –RP •CBUS •ln
V
(6)
If (V
– 0.15V) > V , then t = 0
THR 1
ILMAX
2
4 (for an I C system) or equations 5 to 8 (for an SMBus
t2 = –RP •CBUS
•
system). The value chosen for R must ensure that
P
both the rise and fall time specifications are met
⎧
⎨
⎩
⎫
⎬
⎭
V
+ 0.15V – VCC –RP •IPULLUPAC
VTHR – VCC –RP •IPULLUPAC
IHMIN
ln
simultaneously.
2
(7)
I C Design Example
Fall time of an SMBus line is derived using equation 8:
Given the following conditions and requirements:
tf = RT •CBUS
•
VCC = 3.3V NOMINAL
VOL = 0.4V MAXIMUM
CBUS = 600pF
V
+ 0.15V
⎧
⎫
IHMIN
•(RP +RL )–RL
•(RP +RL )–RL
⎪
⎪
⎪
⎪
VCC
ILMAX – 0.15V
VCC
ln
⎨
⎪
⎬
⎪
V
V
ILMAX = 0.99V,VIHMIN = 2.31V
tr = 0.3µs MAXIMUM,tf = 0.3µs MAXIMUM
If an R of 100Ω is used and the max R of the driver is
⎪
⎪
⎭
⎩
(9)
(8)
S
ON
For an SMBus system, V
= 0.8V and V
= 2.1V.
200Ω, then R = 200Ω + 100Ω = 300Ω. Use equation 1
ILMAX
IHMIN
L
to find the required R to meet V .
P
OL
C
is the total bus capacitance of the SMBus line.
BUS
300Ω•(3.3V –0.4V)
RP =
0.4V
RP = 2.175k
(10)
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LTC4311
APPLICATIONS INFORMATION
This is the lowest resistor value that may be chosen and
SMBus Design Example
still meet V . Next calculate the largest value of R that
OL
P
Given the following conditions and requirements for a low
power SMBus system:
will satisfy SR, the minimum slew rate requirement. Us-
ing V = 0.4V and SR = 0.5V/μs calculate the value of
OL
R with equation 2.
P
VCC = 3.3V NOMINAL
VOL = 0.4V MAXIMUM
CBUS = 400pF
3.3V −0.4V
600pF•0.5V / µs
RP = 9.667k
RP =
VILMAX = 0.8V,VIHMIN = 2.1V
(11)
tr =1µs MAXIMUM,tf = 0.3µs MAXIMUM
(15)
ThisisapproximatelythelargestvalueofR thatwillsatisfy
If an R of 100Ω is used and the max R of the driver is
P
S
ON
the minimum slew rate requirement. Since R is larger
200Ω, then R = 200Ω + 100Ω = 300Ω. Use equation 1
P
L
than 2.175k the V will be below 0.4V, and the slew rate
to find the required R to meet V .
OL
P
300Ω•(3.3V –0.4V)
0.4V
OL
will actually be faster than calculated. Choosing R = 10k,
P
V
OL
and SR are recalculated.
RP =
300Ω•3.3V
300Ω+10kΩ
3.3V – 96mV
RP = 2.175k
VOL =
SR=
=96mV
(16)
(17)
(18)
Calculate Maximum R from equation 2.
P
=0.534V / µs
10kΩ•600pF
3.3V –0.4V
RP =
(12)
400pF•0.5V / µs
The rise and fall times need to be verified using equations
3 and 4.
RP = 14.5k
tr = –10kΩ•600pF•
Choose R = 13k and recalculate V and SR.
P
OL
2.31V – 3.3V –10kΩ •2.5mA
0.99V – 3.3V –10kΩ •2.5mA
⎧
⎨
⎩
⎫
⎬
⎭
300Ω•3.3V
300Ω+13kΩ
3.3V – 74mV
In
= 0.297µs
VOL =
= 74mV
(13)
SR =
= 0.62V / µs
tf = 291Ω•600pF•
13kΩ•400pF
2.31
3.3V
0.99V
⎧
⎪
⎨
⎪
⎩
⎫
⎪
•(10kΩ+ 300Ω)– 300Ω
•(10kΩ+ 300Ω)– 300Ω
The rise and fall times need to be verified using equations
5 to 8.
In
= 0.158µs
⎬
⎪
⎭
t1 = –13kΩ•400pF•
3.3V
0.9V–3.3V
0.8V–0.15V–3.3V
⎧
⎨
⎩
⎫
⎬
⎭
(14)
ln
= 0.515µs
(19)
2
Boththeriseandfalltimesmeetthe0.3μsI Crequirement
and the V is satisfied, while meeting the minimum slew
OL
rate requirement, so R is chosen to be 10k.
P
If t is not met, R should be decreased and if t is not met
r
P
f
then R should be increased.
P
4311fa
9
LTC4311
APPLICATIONS INFORMATION
high) at the end of the last bit sent and the slave device
pulling the SDA line low before the rising edge of the ACK
clock pulse.
t2 = –13kΩ•400pF•
⎧
⎨
⎩
⎫
⎬
⎭
2.1V + 0.15V – 3.3V –13kΩ•2.5mA
0.9V – 3.3V –13kΩ•2.5mA
In
= 0.205µs
The LTC4311 5mA pull-up current is activated when the
host releases the SDA line, allowing the voltage to rise
(20)
above the LTC4311’s comparator threshold (V ). If
THR
tr = t1 + t2 = 0.515µs+ 0.205µs= 0.72µs
tf = 293Ω•400pF•
a slave device has a high value of R , a longer time is
S
required for the slave device to pull SDA low before the
rising edge of the ACK clock pulse. To ensure sufficient
data setup time for ACK, slave devices with high values
(21)
of R should pull the SDA low earlier.
S
2.1V + 0.15V
3.3V
0.8V – 0.15V
⎧
⎪
⎨
⎪
⎩
⎫
⎪
⎬
•(13kΩ+ 300Ω)– 300Ω
•(13kΩ+ 300Ω)– 300Ω
An alternative is the slave device can hold the SCL line low
until the SDA line reaches a stable state. Then, SCL can
be released to generate the ACK clock pulse.
In
⎪
⎭
3.3V
= 0.156µs
Multiple LTC4311s in Parallel
(22)
In very heavily loaded systems, stronger pull up current
may be desired. Two LTC4311’s may be used in parallel
to increase the total pull up current to meet rise time
requirements.
The rise time meets the 1μs SMBus requirement and the
fall time meets the 0.3μs requirement. The V is satisfied
OL
whilemeetingtheminimumslewraterequirements, soR
P
is chosen to be 13kΩ. If the rise time was not met due to
a large t , equation 6 can be used to calculate a maximum
1
Notes on Using the LTC4311 in LTC1694 Applications
value of R that will meet the rise time requirements.
P
AlthoughtheLTC1694andLTC4311arefunctionallysimilar
2
accelerators for I C, SMBus, and other comparable open
ACK Data Setup Time
drain/collectorbusapplications,theLTC4311offersalower
power, higher performance solution in a smaller package
as compared to the LTC1694. These and other differences
are listed in Table 1 and must be accounted for if using
the LTC4311 in LTC1694 applications.
Care must be taken in selecting the value of R (in series
S
with the pull-down driver) to ensure that the data setup
time requirement for ACK (acknowledge) is fulfilled. An
acknowledge is the host releasing the SDA line (pulling
Table 1. Differences Between LTC1694 and LTC4311
SPECIFICATION
LTC1694
N/A
LTC4311
1V
COMMENTS
ꢀnable Pin (typ)
Allows the LTC4311 to be Disabled, Consuming Less than 5μA
Lower Operating Supply Voltage for Low Voltage Systems
Lower Standby Current to Conserve Power
V
CC
2.7V – 6V
60μA
1.6V – 5.5V
26μA
I
(typ), BUS1, BUS2 High
CC
V
(typ)
0.65V
Dependent on V
5mA
Tighter, Higher Noise Margins and Improved Rise Times
Stronger Slew-Limited Source Current for Slewing Higher Bus Capacitances
THRꢀS
CC
I
f
(typ)
2.2mA
100kHz
PULL-UP
MAX
2
400kHz
Higher Operating Frequency for I C’s Fast Mode Bus Specification
4311fa
10
LTC4311
PACKAGE DESCRIPTION
DC Package
6-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1703)
R = 0.115
TYP
0.56 0.05
(2 SIDES)
0.38 0.05
4
6
0.675 0.05
2.50 0.05
1.15 0.05
0.61 0.05
(2 SIDES)
2.00 0.10
(4 SIDES)
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
PIN 1
PACKAGE
OUTLINE
CHAMFER OF
EXPOSED PAD
(DC6) DFN 1103
3
1
0.25 0.05
0.25 0.05
0.50 BSC
0.50 BSC
0.75 0.05
0.200 REF
1.37 0.05
(2 SIDES)
1.42 0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE
M0-229 VARIATION OF (WCCD-2)
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE
SC6 Package
6-Lead Plastic SC70
(Reference LTC DWG # 05-08-1638 Rev B)
0.47
MAX
0.65
REF
1.80 – 2.20
(NOTE 4)
1.00 REF
INDEX AREA
(NOTE 6)
1.15 – 1.35
1.80 – 2.40
2.8 BSC 1.8 REF
(NOTE 4)
PIN 1
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
0.15 – 0.30
6 PLCS (NOTE 3)
0.65 BSC
0.10 – 0.40
0.80 – 1.00
0.00 – 0.10
REF
1.00 MAX
GAUGE PLANE
0.15 BSC
0.26 – 0.46
SC6 SC70 1205 REV B
0.10 – 0.18
(NOTE 3)
NOTE:
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. DETAILS OF THE PIN 1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE INDEX AREA
7. EIAJ PACKAGE REFERENCE IS EIAJ SC-70
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
8. JEDEC PACKAGE REFERENCE IS MO-203 VARIATION AB
4311fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LTC4311
TYPICAL APPLICATION
Application Utilizing Low Current Shutdown
V
V
CC
CC
LTC4311
2.5V
2.5V
V
BUS1
CC
C1
0.01μF
R1
10k
R2
10k
ꢀNABLꢀ
GND
OFF ON
BUS2
2
I C
SCL
SDA
CLK
IN
DATA
IN
CLK
IN
DATA
IN
CLK
OUT
DATA
OUT
CLK
OUT
DATA
OUT
DꢀVICꢀ 1
DꢀVICꢀ N
4311 TA02
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1380/LTC1393
Single-ꢀnded 8-Channel/Differential 4-Channel Analog Low R : 35Ω Single-ꢀnded/70Ω Differential, ꢀxpandable to 32 Single or
ON
MUX with SMBus Interface
16 Differential Channels
LTC1427-50
LTC1623
Micropower, 10-Bit Current Output DAC with SMBus
Interface
Precision 50μA +/– 2.5% Tolerance Over Temperature, 4 Selectable SMBus
Addresses, DAC Powers Up at Zero or Midscale
Dual High Side Switch Controller with
SMBus Interface
8 Selectable Addresses/16 Channel Capability
LTC1663
SMBus Interface 10-Bit Rail-to-Rail Micropower DAC DNL < 0.75 LSB Max, 5-Lead SOT-23 Package
2
LTC1694/LTC1694-1 SMBus Accelerator
Improved SMBus/I C Rise-Time, ꢀnsures Data Integrity with Multiple
2
SMBus/I C Devices
LT1786F
LTC1695
LTC1840
SMBus Controlled CCFL Switching Regulator
1.25A, 200kHz, Floating or Grounded Lamp Configurations
0.75Ω PMOS 180mA Regulator, 6-Bit DAC
2
TM
SMBus/ I C Fan Speed Controller in ThinSOT
2
Dual I C Fan Speed Controller
Two 100μA 8-Bit DACs, two Tach Inputs, Four GPIO
LTC4300A-1/
LTC4300A-2/
LTC4300A-3
Hot Swappable 2-Wire Bus Buffers
-1: Bus Buffer with RꢀADY, ACC and ꢀNABLꢀ
-2: Dual Supply Bus Buffer with RꢀADY and ACC
-3: Dual Supply Bus Buffer with RꢀADY and ꢀNABLꢀ
LTC4301
Supply Independent Hot Swappable 2-Wire Bus Buffer Supply Independent
LTC4301L
Hot Swappable 2-Wire Bus Buffer with Low Voltage
Level Translation
Allows Bus Pull-Up Voltages as Low as 1V on SDAIN and SCLIN
LTC4302-1/
LTC4302-2
Addressable 2-Wire Bus Buffer
Address ꢀxpansion, GPIO, Software Controlled
2
LTC4303/4
LTC4305/6
LTC4307
Hot Swappable 2-Wire Bus Buffers with Stuck Bus
Recovery
Provides Automatic Clocking to Free Stuck I C Busses
2 or 4-Channel, 2 Wire Bus Multiplexers with
Capacitance Buffering
2 or 4 Selectable Downstream Buses, Stuck Bus Disconnect, Rise Time
Accelerators, Fault Reporting, +/– 10kV HBM ꢀSD Tolerance
Low Offset Hot Swappable 2-Wire Bus Buffer with
Stuck Bus Recovery
60mV Buffer Offset with 30ms Stuck Bus Timeout
ThinSOT is a trademark of Linear Technology Corporation
4311fa
LT 0408 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
●
●
© LINEAR TECHNOLOGY CORPORATION 2008
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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