LTC4413-2 [Linear]
Dual 4A Ideal Diodes with Adjustable Current Limit; 双通道4A理想二极管具有可调电流限制型号: | LTC4413-2 |
厂家: | Linear |
描述: | Dual 4A Ideal Diodes with Adjustable Current Limit |
文件: | 总20页 (文件大小:346K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTC4415
Dual 4A Ideal Diodes with
Adjustable Current Limit
FeaTures
DescripTion
The LTC®4415 contains two monolithic PowerPath ideal
diodes, each capable of supplying up to 4A with typical
forwardconductionresistanceof50mΩ.Thediodevoltage
dropsareregulatedto15mVduringforwardconductionat
low currents, extending the power supply operating range
and ensuring no oscillations during supply switchover.
Less than 1µA of reverse current flows from OUT to IN
making this device well suited for power supply ORing
applications.
n
Dual 50mΩ Monolithic Ideal Diodes
n
1.7V to 5.5V Operating Range
n
Up to 4A Adjustable Current Limit for Each Diode
n
Low Reverse Leakage Current (1µA Max)
n
15mV Forward Drop in Regulation
n
Smooth Switchover in Diode ORing
n
Load Current Monitor
n
Precision Enable Thresholds to Set Switchover
n
Soft-Start to Limit Inrush Current on Start-Up
n
Status Pins to Indicate Forward Diode Conduction
The two ideal diodes are independently enabled and
prioritized using inputs EN1 and EN2. The output current
limits can be adjusted independently from 0.5A to 4A
using resistors on the CLIM pins. Furthermore, the ideal
diode currents can be monitored via CLIM pin voltages.
n
Current and Thermal Limit with Warning
n
Thermally Enhanced 16-Lead MSOP and DFN
(3mm × 5mm) Packages
applicaTions
Open-drain status pins indicate when the ideal diodes are
forwardconducting.Whenthedietemperatureapproaches
thermal shutdown, or if the output load exceeds the cur-
rent limit threshold, the corresponding warning pins are
pulled low.
n
High Current PowerPath™ Switch
n
Battery and Wall Adapter Diode ORing
n
Backup Battery Diode ORing
n
Logic Controlled High Current Power Switch
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
PowerPath is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
n
Supercapacitor ORing
n
Multiple Battery Sharing
Typical applicaTion
Forward Characteristics of LTC4415
vs MBRS410E Schottky
Prioritized Power Supply ORing
CURRENT LIMIT
4
IDEAL
PRIMARY
POWER
SOURCE
IN1
OUT1
TO
LOAD
LTC4415
4.7µF
100k
LTC4415
3
2
1
0
EN1
CLIM1
CLIM2
SCHOTTKY
DIODE
STAT1
21.5k
MBRS410E
WARN1
WARN2
STAT2
124Ω 124Ω
R
= 50mΩ
ON
EN2
IDEAL
GND
OUT2
IN2
SECONDARY
POWER
+
4415 TA01a
SOURCE
0
100
200
300
400
500
FORWARD VOLTAGE DROP (mV)
4415 TA01b
4415fa
1
LTC4415
absoluTe MaxiMuM raTings (Note 1)
IN1, IN2, OUT1, OUT2, CLIM1, CLIM2,
Storage Temperature Range .................. –65°C to 150°C
Peak Reflow Temperature .....................................260°C
STAT1, STAT2, WARN1, WARN2 Voltage....... –0.3V to 6V
EN1, EN2 Voltage ................. –0.3V to Max (V , V
Operating Junction Temperature Range
)
INx OUTx
(Notes 3, 4) .............................................–40°C to 125°C
pin conFiguraTion
TOP VIEW
IN1*
IN1*
1
2
3
4
5
6
7
8
16 OUT1*
15 OUT1*
14 STAT1
13 WARN1
12 WARN2
11 STAT2
10 OUT2*
TOP VIEW
1
2
3
4
5
6
7
8
OUT1*
OUT1*
STAT1
WARN1
WARN2
STAT2
OUT2*
OUT2*
IN1*
IN1*
16
15
14
13
12
11
10
9
EN1
EN1
CLIM1
CLIM2
EN2
17
GND
17
GND
CLIM1
CLIM2
EN2
IN2*
IN2*
IN2*
MSE PACKAGE
16-LEAD PLASTIC MSOP
IN2*
9
OUT2*
T
= 125°C, θ = 35°C/W TO 40°C/W
JA
JMAX
DHC PACKAGE
VARIATION A
16-LEAD (5mm × 3mm) PLASTIC DFN
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
*ADJACENT PINS ON THE FOUR CORNERS ARE FUSED TOGETHER INTERNALLY.
T
= 125°C, θ = 43°C/W
JMAX
JA
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
*ADJACENT PINS ON THE FOUR CORNERS ARE FUSED TOGETHER
orDer inForMaTion
LEAD FREE FINISH
LTC4415EDHC#PBF
LTC4415IDHC#PBF
LTC4415EMSE#PBF
LTC4415IMSE#PBF
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
LTC4415EDHC#TRPBF
LTC4415IDHC#TRPBF
LTC4415EMSE#TRPBF
LTC4415IMSE#TRPBF
4415
4415
4415
4415
16-Lead (5mm × 3mm) Plastic DFN
16-Lead (5mm × 3mm) Plastic DFN
16-Lead Plastic MSOP
16-Lead Plastic MSOP
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
4415fa
2
LTC4415
elecTrical characTerisTics The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Notes 2, 3). VIN1 = VIN2 = 3.6V, RCLIM = 250Ω, unless otherwise
specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
l
l
V
V
, V
IN2 OUT2
,
Operating Supply Range
At Least One Input/Output Must Be in This Range
1.7
5.5
V
IN1 OUT1
, V
V
Undervoltage Lockout
V
Rising
1.63
55
1.7
80
28
V
mV
UVLO
INx
Hysteresis
I
I
I
Quiescent Current In Forward Regulation
(Note 5)
V
IN1
V
IN2
= V
= V
= V
OUT2
= 3.6V, I = –1mA,
OUT1
44
µA
QF
EN1
EN2
= 0V, Measured Through GND Pin
Quiescent Current In Shutdown
V
V
= V = V
OUT1
= 3.6V, V
= 0V,
EN1
13
µA
QOFF
IN1
IN2
EN2
= V
= 0V, Measured Through GND Pin
OUT2
l
l
Reverse Turn-Off Current: OUT1
OUT2
V
= 3.6V, V
OUT1
= 3.7V, V = 3.5V, V = 3.6V
OUT2
18
5
40
11
µA
µA
QR(OUT)
IN1
OUT1
IN2
(V
> V
)
OUT2
l
I
I
INx Pin Current In Reverse Turn-Off
INx Pin Leakage Current
V
V
= V = 5.5V
OUT2
4
10
1
µA
µA
QR(IN)
OUT1
= V = 0V, V
= V = 5.5V
OUT2
–1
5
LEAK(IN)
IN1
IN2
OUT1
l
l
V
V
Forward Regulation Voltage (V – V
)
I
= –1mA
15
–30
18
25
–10
30
mV
mV
mΩ
FR
INx
OUTx
OUTx
Reverse Turn-Off Voltage (V – V )
OUTx
–50
RTO
INx
R
Forward Dynamic Resistance in
Regulation
I
I
= –100mA to –300mA
= –1A
FR
OUTx
R
On-Resistance in Constant Resistance
Mode
50
70
mΩ
ON
OUTx
t
PowerPath Turn-On Time (Notes 6, 7)
Before Enable V
Before Enable V
Before Enable V
= 1.5V, Diode 1
= 1.5V, Diode 2
= 0V
10
23
250
µs
µs
µs
ON
OUT1
OUT2
OUTx
t
t
PowerPath Turn-On from Shutdown
(Note 7)
Both Diodes Disabled and V
Both Diodes Disabled and V
= 1.5V Before Enable
= 0V Before Enable
70
µs
µs
ON(SD)
SWITCH
OUTx
OUTx
320
PowerPath Switchover Time
9
µs
V
↑ (2.6V to 4.6V) to V
Starts Rising, Both
OUTx
INx
Diodes Enabled, OUT1 and OUT2 Tied Together
t
t
PowerPath Turn-Off Time
Disable to I Falling from 100mA to 1mA
2
2
µs
OFF
IN
Soft-Start Duration (Note 8)
V
OUTx
= 0V
ms
SS
Current Monitor
Current Monitor Ratio
I
I
/I
When I
When I
= –4A
= –2A
0.9
0.8
1
1
1.1
1.2
mA/A
mA/A
CLIMx OUTx
OUTx
OUTx
/I
CLIMx OUTx
Current Limit
V
CLIM Clamp Voltage
In Current Limit
0.5
V
A
CLIM
l
I
Current Limit Adjustability
0.5
4
4
LIM(ADJ)
l
l
Accuracy of Adjustable Current Limit
Threshold
V
OUTx
V
OUTx
= V – 0.5V, Current Limit = 4A
8
15
%
%
INx
= V – 0.5V, Current Limit = 2A
INx
l
I
Internal Current Limit
R
CLIMx
= 0Ω, V = 0V
OUTx
6
9
A
LIM(INT)
T
Thermal Warning Threshold
Rising Temperature
Hysteresis
130
15
°C
°C
WARN
T
SD
Thermal Shutdown Threshold
Rising Temperature
Hysteresis
160
20
°C
°C
Open-Drain Status Outputs (STAT1, WARN1, STAT2, WARN2)
l
l
V
OL
Open-Drain Output Low Voltage
Current Into Open-Drain Output = 3mA
0.05
0
0.4
1
V
Open-Drain Output High Leakage Current Open-Drain Output Voltage = 5.5V
µA
t
STAT Turn-On Time (Note 6)
EN1 Rising to STAT1 Pull-Down
EN2 Falling to STAT2 Pull-Down
5
18
µs
µs
STAT(ON)
4415fa
3
LTC4415
elecTrical characTerisTics The l denotes the specifications which apply over the specified operating
junction temperature range, otherwise specifications are at TA = 25°C (Notes 2, 3). VIN1 = VIN2 = 3.6V, RCLIM = 250Ω, unless otherwise
specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
2
MAX
UNITS
µs
t
t
t
STAT Turn-Off Time
WARN Turn-On Time
WARN Turn-Off Time
Disable to STAT Pull-Up
STAT(OFF)
WARN(ON)
WARN(OFF)
Current Limit to WARN Pull-Down
Out of Current Limit to WARN Pull-Up
500
5
µs
µs
Enable Inputs (EN1, EN2)
l
l
V
V
EN1 Rising and EN2 Falling Thresholds
EN1 and EN2 Hysteresis
760
800
55
0
840
1
mV
mV
µA
ENTH
ENHYST
Enable Pin Current When Pulled High
V
EN1
= V
= 3.6V
EN2
Note 4: The LTC4415 includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 5: One channel enabled. Quiescent current is identical for each
channel.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Unless otherwise specified, current into a pin is positive and
current out of a pin is negative.
Note 3: The LTC4415 is tested under pulsed load conditions such that
Note 6: Enable inputs are driven to supply levels. Other diode is already
enabled so the chip bias circuits are active.
T ≈ T . The LTC4415E is guaranteed to meet performance specifications
J
A
from 0°C to 85°C. Specifications over the –40°C to 125°C operating
junction temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC4415I is guaranteed
over the full –40°C to 125°C operating junction temperature range.
Note 7: Turn-on time is measured from enable to I
rising through
OUTx
1mA. When the output voltage is more than 1.2V, soft-start is disabled and
turn-on is faster.
The junction temperature (T in °C) is calculated from the ambient
Note 8: Current ramps from zero to the current limit during the soft-start
duration. Soft-start is measured from 10% to 90% of the current limit. If
the load condition is such that the current does not need to go up to the
current limit during start-up, the output voltage may reach steady state
sooner.
J
temperature (T in °C) and power dissipation (P in Watts) according to
A
D
the formula:
T = T + (P • θ )
JA
J
A
D
Note that the maximum ambient temperature consistent with these
specifications is determined by specific operating conditions in
conjunction with board layout, the rated package thermal impedance and
other environmental factors.
Typical perForMance characTerisTics
TA = 25°C, VIN1 = VIN2 = 3.6V, RCLIM = 250Ω unless otherwise noted.
On-Resistance vs Temperature
I-V Characteristics
On-Resistance vs VIN
4
3
2
1
0
80
70
80
70
60
50
40
30
20
R
CLIM
= 124Ω
60
50
40
30
20
125°C
90°C
25°C
–40°C
75 100
0
50
100
150
200
250
–50 –25
0
25 50
125 150
1
2
3
4
5
6
TEMPERATURE (°C)
INPUT VOLTAGE (V)
FORWARD VOLTAGE DROP (mV)
4415 G01
4415 G02
4415 G03
4415fa
4
LTC4415
Typical perForMance characTerisTics
TA = 25°C, VIN1 = VIN2 = 3.6V, RCLIM = 250Ω unless otherwise noted.
Reverse Leakage Current
vs Temperature
Quiescent Current vs Temperature
Quiescent Current vs VIN
100
80
100
80
60
40
20
0
10µ
1µ
V
= 0V
IN
BOTH DIODES ON
BOTH DIODES ON
100n
10n
1n
V
= 5.5V
60
OUT
ONE DIODE ON (I
)
QF
ONE DIODE ON (I
)
QF
V
= 3.6V
OUT
40
20
0
BOTH DIODES OFF (I
)
BOTH DIODES OFF (I
)
QOFF
QOFF
100p
10p
75 100
–50 –25
0
25 50
125 150
50
2
4
–50 –25
0
25
75 100 125 150
1
3
5
6
TEMPERATURE (°C)
TEMPERATURE (°C)
INPUT VOLTAGE (V)
4415 G04
4415 G05
4415 G06
Quiescent Current
vs Output Current
Short-Circuit Current
vs Temperature
Current Limit vs Output Voltage
100
80
60
40
20
0
7
6
5
7
6
V
= 3.6V
V
= 0V
OUT
IN
R
= 0Ω
CLIM
CURRENT LIMIT
R
= 0Ω
CLIM
5
R
= 124Ω
CLIM
R
= 124Ω
= 249Ω
CLIM
4
3
2
1
0
4
3
2
1
R
= 249Ω
CLIM
R
CLIM
R
= 1000Ω
3
R
= 1000Ω
CLIM
CLIM
R
CLIM
= 124Ω
0
0
1
2
3
4
5
0
1
2
4
–25
0
50 75 100 125 150
25
TEMPERATURE (°C)
–50
OUTPUT CURRENT (A)
OUTPUT VOLTAGE (V)
4415 G07
4415 G08
4415 G09
Current Monitor Ratio
vs Temperature
Current Monitor Ratio vs IOUT
1.30
1.20
1.10
1.00
0.90
0.80
0.70
1.30
1.20
1.10
1.00
0.90
0.80
0.70
DEVICE 1 (HIGH RATIO)
DEVICE 1 (HIGH RATIO)
DEVICE 2
DEVICE 2
DEVICE 3 (LOW RATIO)
DEVICE 3 (LOW RATIO)
I
= 2A
CLIM
OUT
R
CLIM
= 124Ω
R
= 124Ω
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
1
2
3
0
4
OUTPUT CURRENT (A)
4415 G10
4415 G11
4415fa
5
LTC4415
Typical perForMance characTerisTics
TA = 25°C, VIN1 = VIN2 = 3.6V, RCLIM = 250Ω unless otherwise noted.
Enable and Disable Response for
Large Load Capacitor
Enable and Disable Response for
Small Load Capacitor
Switchover in Diode-OR
Application
V
V
= 4.6V
= 3.6V
IN2
IN1
V
V
OUT1
OUT1
V
V
,
IN1
2V/DIV
2V/DIV
IN2
1V/DIV
I
IN1
V
= 2.6V
IN2
2A/DIV
I
IN1
2A/DIV
WARN1
5V/DIV
V
OUT1,2
1V/DIV
WARN1
5V/DIV
3.55V
STAT1
5V/DIV
EN1
STAT1
5V/DIV
EN1
STAT1
5V/DIV
5V/DIV
5V/DIV
STAT2
5V/DIV
4415 G12
4415 G13
4415 G17
C
R
= 1200µF 1ms/DIV
= 8Ω
C
= 47µF
= 8Ω
1ms/DIV
C
= 47µF
20µs/DIV
(SHORTED)
OUT1
LOAD1
OUT1
OUT
R
LOAD1
R
= 3.6Ω
LOAD
OUT1
V
= V
OUT2
Short-Circuit Response
at Heavy Load
Load Step Response
Short-Circuit Response
3.6V
V
IN
3.6V
3.6V
V
V
IN
5V/DIV
IN
0.5V/DIV
5V/DIV
V
V
OUT
5V/DIV
OUT
3.6V
5V/DIV
V
OUT
0.5V/DIV
WARN
5V/DIV
3.5A
I
OUT
10A/DIV
I
OUT
I
IN
5A/DIV
2A/DIV
0.1A
10mA
1A
4415 G14
4415 G15
4415 G16
C
R
R
= 47µF
= 8Ω
CLIM
40µs/DIV
C
R
= 4.7µF
= 167Ω
100µs/DIV
C
= 4.7µF
= 167Ω
40µs/DIV
OUT
LOAD
OUT
CLIM
OUT
R
CLIM
= 124Ω
UVLO Thresholds vs Temperature
EN1 Thresholds vs Temperature
EN2 Thresholds vs Temperature
1.650
0.900
0.875
0.850
0.825
0.800
0.775
0.750
0.725
0.700
0.900
0.875
0.850
0.825
0.800
0.775
0.750
0.725
0.700
RISING (TURN OFF)
RISING (TURN ON)
1.630
1.610
FALLING (TURN ON)
RISING (TURN ON)
1.590
1.570
1.550
FALLING (TURN OFF)
FALLING (TURN OFF)
50
TEMPERATURE (°C)
–50 –25
0
25
75 100 125 150
50 75
TEMPERATURE (°C)
50 75
TEMPERATURE (°C)
–50 –25
0
25
100 125 150
–50 –25
0
25
100 125 150
4415 G18
4415 G19
4415 G20
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6
LTC4415
Typical perForMance characTerisTics
TA = 25°C, VIN1 = VIN2 = 3.6V, RCLIM = 250Ω unless otherwise noted.
Power Loss vs Output Current
Efficiency vs Output Current
100
1.0
0.8
0.6
0.4
0.2
0
R
= 124Ω
R
= 124Ω
CLIM
CLIM
99
98
97
96
95
94
93
92
91
90
125°C
25°C
–40°C
125°C
25°C
–40°C
1
2
3
2
4
0
4
0
1
3
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
4415 G21
4415 G22
pin FuncTions
IN1 (Pins 1, 2): Diode 1 Anode and Positive Power Supply
for LTC4415. Bypass IN1 with a ceramic capacitor of at
least4.7µF. Pins1and2arefusedtogetheronthepackage.
These pins can be grounded when not used.
EN2 (Pin 6): Enable Input for Diode 2. A low signal less
than V
enables Diode 2.
ENTH
IN2 (Pins 7, 8): Diode 2 Anode and Positive Power Supply
for LTC4415. Bypass IN2 with a ceramic capacitor of at
least4.7µF. Pins7and8arefusedtogetheronthepackage.
These pins can be grounded when not used.
EN1(Pin3):EnableInputforDiode1. Ahighsignalgreater
than V
enables Diode 1.
ENTH
CLIM1 (Pin 4): Current Limit Adjust and Monitor Pin for
Diode 1. Connect a resistor from CLIM1 to ground to set
thecurrentlimit;thediode1currentcanthenbemonitored
bymeasuringthevoltageonCLIM1pin. Afixed6Ainternal
current limit is active when this pin is shorted to ground.
Do not leave this pin open. Minimize stray capacitance
on this pin to generally less than 200pF (see Applications
Information for more details).
OUT2(Pins9,10):Diode2CathodeandOutputofLTC4415.
Bypass OUT2 with a ceramic capacitor of at least 4.7µF.
Pins 9 and 10 are fused together on the package. Leave
these pins open when not used.
STAT2 (Pin 11): Status Indicator for Diode 2. Open-drain
output pulls down during forward diode conduction. This
pin can be left open or grounded when not used.
WARN2 (Pin 12): Overcurrent and Thermal Warning
Indicator for Diode 2. Open-drain output pulls down when
diode2currentexceedsitscurrentlimitordietemperature
is close to thermal shutdown.
CLIM2 (Pin 5): Current Limit Adjust and Monitor Pin for
Diode 2. Connect a resistor from CLIM2 to ground to set
thecurrentlimit;thediode2currentcanthenbemonitored
bymeasuringthevoltageonCLIM2pin. Afixed6Ainternal
current limit is active when this pin is shorted to ground.
Do not leave this pin open. Minimize stray capacitance
on this pin to generally less than 200pF (see Applications
Information for more details).
WARN1 (Pin 13): Overcurrent and Thermal Warning
Indicator for Diode 1. Open-drain output pulls down when
diode1currentexceedsitscurrentlimitordietemperature
is close to thermal shutdown.
4415fa
7
LTC4415
pin FuncTions
STAT1 (Pin 14): Status Indicator for Diode 1. Open-drain
output pulls down during forward diode conduction. This
pin can be left open or grounded when not used.
GND (Exposed Pad Pin 17): Device Ground. The exposed
pad must be soldered to PCB ground to provide both
electrical connection to ground and good thermal con-
ductivity to PCB.
OUT1 (Pins 15, 16): Diode 1 Cathode and Output of
LTC4415.BypassOUT1withaceramiccapacitorofatleast
4.7µF. Pins 15 and 16 are fused together on the package.
Leave these pins open when not used.
block DiagraM
I
OUT1
1000
CLIM1
4
OUT1
IN1
1, 2
15, 16
P1
UVLO1
OUT1
GATE
DRIVER
CURRENT
WARN1
STAT1
CLIM2
EN1
LIMIT
13
14
5
3
TEMPERATURE
SENSOR
I
OUT2
1000
OUT2
9, 10
IN2
7, 8
P2
UVLO2
OUT2
GATE
DRIVER
CURRENT
LIMIT
WARN2
STAT2
EN2
12
11
6
TEMPERATURE
SENSOR
4415 BD
4415fa
8
LTC4415
operaTion
The LTC4415 consists of two PowerPath ideal diode cir-
cuits within a single package. Each diode in the LTC4415
iscapableofsupplyingamaximumratedoutputcurrentof
4A from its input supply with typical forward conduction
resistance of 50mΩ.
CONSTANT CURRENT
1
I
LIM
SLOPE =
CONSTANT
RESISTANCE
R
ON
The diodes are enabled using level-sensitive enable inputs
EN1 and EN2 with opposite polarity to achieve a prioritizer
function with minimal quiescent current during diode-OR
implementation. The enable threshold on the enable pins
1
FR
SLOPE =
CONSTANT
VOLTAGE
R
(V
) is 800mV (typical) with one-sided hysteresis of
4415 F01
ENTH
V
FORWARD VOLTAGE (V)
FR
55mV (typical). For rising voltage on the EN1 pin, Diode 1
is enabled when V > 800mV (typical), and on the fall-
Figure 1. Forward Characteristics of LTC4415
EN1
ing edge it is disabled when V
< 745mV (typical). For
EN1
When the output of either diode is driven higher than its
inputbyanalternatesupply,conductionthroughthatdiode
is suspended to prevent reverse conduction from OUT1/
OUT2 to IN1/IN2. This function allows implementation of
a power supply OR function by simply tying the outputs
OUT1 and OUT2 together.
falling voltage on the EN2 pin, Diode 2 is enabled when
< 800mV (typical), and on the rising edge it is dis-
V
EN2
abled when V
> 855mV (typical). EN1 or EN2 pin volt-
EN1
ages should not exceed the highest voltage on the input
(IN1, IN2) or output (OUT1, OUT2) pins.
Forward conduction of the LTC4415 diodes has three op-
erating ranges as a function of the load current, as shown
in Figure 1 and described below:
Current Limit Setting
The output current limit of each diode can be set inde-
pendently by connecting resistors from the current limit
adjust pins CLIM1 and CLIM2 to ground. The current out
of the CLIM1 and CLIM2 pins are 1/1000 of the ideal diode
1. For small load current, a low forward voltage drop
(V = 15mV typical) is maintained by modulating the
FR
series resistance offered by the PFETs (P1/P2) in the
output currents I
and I
respectively. When the
OUT1
OUT2
current paths as shown in the Block Diagram. This op-
load currents increase so that the CLIM1 or CLIM2 pin
voltagesexceeds0.5V,theLTC4415detectsanovercurrent
condition and regulates the current to a fixed value. The
erating mode is referred to as constant V regulation.
FR
Inbattery-poweredandlowheadroomapplications,the
low forward drop of the ideal diodes extend the operat-
ing range beyond that of Schottky diodes.
required value of resistor R
for output current limit
CLIM
of I is calculated as follows:
LIM
2. At higher load currents, the LTC4415 gate driver can
no longer modulate the series resistance of the PFETs
(P1/P2) to maintain constantforward drop. This transi-
tion occurs when the gate voltage of the series PFETs
(P1/P2) has been brought down to GND. The ideal
diodes subsequently operate with constant resistance,
0.5V
RCLIM =1000•
ILIM
The allowed range of R
is 125Ω to 1000Ω unless the
CLIM
CLIM1/CLIM2 pins are shorted to GND, in which case
the LTC4415 limits the load current using a fixed internal
current limit of 6A.
R , between inputs and outputs, IN1/IN2 and OUT1/
ON
OUT2, respectively.
3. As the load current exceeds the current limit, the series
PFETs offer higher resistance between IN1/IN2 and
OUT1/OUT2 by reducing the gate drive in order to limit
the load current; so the forward voltage drop increases
rapidly. This operating mode is referred to as constant
current operation.
Overcurrent Status
When either of the ideal diodes is operating in current
limit, the corresponding warning pin, WARN1/WARN2,
is pulled low by an open-drain NFET after a 500µs delay.
Normaloperationresumesandthewarningpinisreleased
4415fa
9
LTC4415
operaTion
when the load current decreases below the current limit.
Power consumption in LTC4415 increases during opera-
tion in current limit due to the large voltage drop across
the PFET devices (P1 or P2).
die temperature exceeds the warning threshold (130°C),
theWARN1/WARN2pinsarepulleddownwithopen-drain
NFETs while the LTC4415 continues to operate normally.
Thisgivessometimefortheusertoreducetheloadcurrent
to avoid thermal shutdown. The warning signal is deas-
sertedwhenthedietemperaturecoolsdownbelow115°C.
Load Current Monitor
The current limit pins output 1/1000th of the ideal diode
output current. The voltage across the current limit resis-
tor can be measured to monitor the current through each
ideal diode as follows:
Thermal shutdown is triggered when the internal die
temperatureincreasesbeyondthefaultthreshold(160°C).
Status pins, STAT1/STAT2, are deasserted during thermal
shutdown to indicate the interruption in forward condi-
tion. Normal operation resumes when the die temperature
cools below 140°C. Note that prolonged operation at the
overtemperature condition degrades device reliability.
VCLIM
IOUT =1000•
RCLIM
Note that the current monitor function via V
available when CLIM pins are grounded to use the fixed
internal current limit.
is not
Figure 2 shows WARN followed by thermal shutdown
caused by an output short-circuit to ground. Time to
thermalshutdownvariesdependingonpowerdissipation,
ambient temperature and board layout. The output cur-
rent ramps up after the device cools down below 140°C,
but shuts down repeatedly as the device overheats due
to persistent short.
CLIM
Soft-Start
An internal soft-start is included for each ideal diode to
minimize the start-up inrush current. When either of the
diodes start forward conduction, the load current ramps
from zero to the set current limit over a period of 2ms. The
soft-start can be monitored by observing the CLIM1 and
CLIM2 pin voltages when they are connected to grounded
resistors. Soft-start duration is reduced to 0.5ms (typical)
when the CLIM pins are grounded. In order to minimize
output droop during switchover between input sources
in power supply ORing applications, soft-start is disabled
when the output voltage is above 1.2V.
V
OUT
OUTPUT SHORTED
TO GND
2V/DIV
I
OUT
2A/DIV
RESTART DUE TO
THERMAL HYSTERESIS
THERMAL
SHUTDOWN
STAT
5V/DIV
WARN
5V/DIV
Forward Conduction Status Monitor
4415 F02
V
R
C
= 3.6V
10ms/DIV
IN
Active low open-drain output status signals, STAT1 and
STAT2, indicate the forward conduction status of each
ideal diode. With resistor pull-ups on these status pins,
a low voltage indicates forward conduction from input to
output, IN1/IN2 to OUT1/OUT2, respectively. The status
pinsgotohighimpedancewhentherespectiveidealdiodes
are disabled, during reverse turn-off conditions, or during
thermal shutdown.
= 124Ω
CLIM
= 4.7µF
OUT
Figure 2. Current Limit Warning and
Thermal Shutdown on Output Short Circuit
The thermal sensors are independent for each diode to
warn of, or shut down the heat generating path so that it
does not hinder the normal operation of the other path.
Depending on the amount of heat generated, the whole
die may still heat up and eventually shut down the other
channel.
Thermal Warning and Shutdown
Thermal sensors within the LTC4415 monitor the die tem-
perature when either of the diodes are enabled. When the
4415fa
10
LTC4415
operaTion
Undervoltage Lockout
The diode conduction path is turned off and the status
signal, STAT1/STAT2, is deasserted during an undervolt-
age condition.
Each ideal diode contains an independent UVLO control
circuitsothatoneinputexperiencingundervoltagelockout
does not hinder normal operation of the other channel.
applicaTions inForMaTion
Stability Considerations
or switching, disable, or even thermal shutdown. Limit
inductance and/or increase bypass capacitors to prevent
pin voltages from exceeding the absolute maximum rat-
ing of 6V. Some ESR in these capacitors may be helpful
in dampening the resonances and minimizing the ringing
caused by hot plugging or load switching. Refer to Ap-
plication Note 88, entitled, “Ceramic Input Capacitors Can
Cause Overvoltage Transients” for a detailed discussion
and mitigation of this phenomenon.
Any capacitance on the CLIM pins adds a pole to the cur-
rent control loop. Therefore, stray capacitance on these
pins must be kept to a minimum. Although the maximum
allowed value of the current limit adjust resistor is 1000Ω,
any additional capacitance on these pins reduces the
maximum allowed resistance, consequently increasing
the minimum allowed current limit. For stable operation,
the pole frequency at the CLIM pins should be kept above
800kHz. Therefore, if the CLIM pin parasitic capacitance
The values of the input and output decoupling capacitors
also depends on the maximum allowable droop during
switchoverinpowersupplyORingapplications.Typicaldu-
rationforLTC4415idealdiodestoswitchoverfromreverse
is C , the following equation should be used to calculate
P
the maximum allowed resistor R
:
CLIM
1
RCLIM
≤
turn-offtoforwardconduction, t
, is9µs. Therefore,
SWITCH
2π •800kHz •CP
the minimum decoupling capacitance, C, required for a
specified maximum output voltage droop, ∆V, when one
of the input voltages drops, can be calculated as follows:
When the voltage at the CLIM pins are monitored using a
long cable, such as an oscilloscope probe, decouple the
parasitic capacitance of the probe and the monitor system
using a series resistor as shown in Figure 3, where a 20k
resistor has been added between the CLIM pin and the
probe to ensure stable operation.
ILOAD •tSWITCH
C=
∆V
where I
is the load current at the time of switchover.
LOAD
For example, the required value of output capacitance for
a 100mV maximum droop in the output voltage during
quickswitchoverat1Aloadwouldbe100µF.Notethatboth
supplies share the load during switchover, and therefore
reduce the droop, when the voltage on the falling supply
pin changes slowly.
Input and Output Capacitors
Highcurrenttransientsthroughparasiticinductanceonthe
input and output sides of the ideal diodes can cause volt-
agespikesontheIN1/IN2/OUT1/OUT2pins.Thesecurrent
transients can occur on power plug-in, load disconnect
20k
CLIM
PIN
MONITOR
C
R
C
P
MONITOR
CLIM
4415 F03
Figure 3. Current Monitor with High Capacitance Probe/Instrument
4415fa
11
LTC4415
applicaTions inForMaTion
Board Layout Considerations
2. The traces to the input supplies, outputs and their
decoupling capacitors should be short and wide to
minimize the impact of parasitic inductance. Connect
the GND side of the capacitors directly to the ground
plane of the board. The decoupling capacitors provide
the transient current to the internal power MOSFETs
and their drivers.
When laying out the printed circuit board, the following
checklist should be followed to ensure proper operation
of the LTC4415:
1. Connecttheexposedpadofthepackage(Pin17)directly
to a large PC board ground to minimize thermal imped-
2
ance.Correctlysolderedtoa2500mm double-sided1oz
3. MinimizetheparasiticcapacitanceonCLIM1andCLIM2
pins for stable operation.
copperboard,theDFNpackagehasathermalresistance
(θ ) of approximately 43°C/W. Failure to make good
JA
contact between the exposed pad on the backside of
the package and an adequately sized ground plane re-
sults in much larger thermal resistance, raising the die
temperature for given power dissipation. An example
layout for double layer board is given in Figure 4. Via
holes are used in the board under and near the device
to conduct heat away from the device to the bottom
layer.
IN1
OUT1
EN1
CLIM1
CLIM2
EN2
STAT1
WARN1
WARN2
STAT2
IN2
OUT2
4415 F04
Figure 4. Example Board Layout for a Double-Sided PCB
4415fa
12
LTC4415
Typical applicaTions
Precision enable inputs and independent status outputs
provide flexibility in power supply back up and load share
applicationsusingthetwohighcurrentidealdiodecircuits
in the LTC4415, as shown in the following examples. The
features shown in these application circuits can be com-
bined in custom applications as needed.
Theenableoverlapminimizestheloadvoltagedroopduring
switchover. Both input power supplies provide power to
the load during the overlap. The status output pins can be
pulled up to the output voltage or to a logic power supply.
Automatic Switchover to a Backup Battery and Keep-
Alive Power Source
Prioritized Switchover to a Backup Battery
Figure 6 illustrates an application circuit for automatic
switchover to the backup battery if the primary power
source voltage falls below the backup battery voltage. The
wired-AND of the status outputs is used to drive the gate
of a pair of back-to-back connected external NMOS (M1
and M2) when both primary and backup power sources
are absent or below UVLO or during thermal shutdown of
LTC4415. Under these conditions, the keep-alive source
supplies power to critical components of the system. At
the same time, the wired-AND status output turns off
The application circuit, Figure 5, illustrates switchover
from a primary power source to backup power at a pre-
cise input voltage using the prioritized power supply-OR
application circuit. Diode 2 is enabled when the primary
power source voltage on diode 1 input falls below the
threshold given as follows:
R1+R2
VIN1<0.8V • 1+
R3
As V falls further, diode 1 is disabled when the primary
KEEP ALIVE/
IN1
IDEAL
PRIMARY
POWER
COIN CELL
IN1
OUT1
powersourcevoltagefallsbelowthethresholddetermined
SOURCE
DMN2215UDM
by the resistor divider on enable pin EN1:
LTC4415
R1
47k
M1
M2
OPTIONAL
EN1
R1
R2+R3
CLIM1
CLIM2
STAT1
WARN1
WARN2
STAT2
VIN1< 0.8V – V
• 1+
(
)
ENHYST
M3
The built-in hysteresis on the enable pins in the LTC4415
provides some overlap of diode enables around the swi-
tchover of power supplies. Resistor R2 can be optionally
used for additional overlap between the two supplies. The
additional overlap is given by:
EN2
IN2
IDEAL
OUT2
LOAD
47µF
GND
+
BACKUP
BAT
4415 F06
Figure 6. Automatic Switchover to a Backup Battery with Provision
for Keep-Alive Power to the Load When Both Are Absent
R2
R3
R2
R3
VOVERLAP ≈ VENTH
•
when
<<1
IDEAL
PRIMARY
IN1
OUT1
TO
LOAD
POWER
SOURCE
4.7µF
R1
R2
LTC4415
470k
EN1
470k
CLIM1
CLIM2
STAT1
WARN1
WARN2
STAT2
470k
470k
R
R
CLIM2
CLIM1
R3
EN2
IDEAL
OUT2
IN2
SECONDAY
POWER
SOURCE
(BAT)
+
4415 F05
GND
Figure 5. Prioritized Power Supply ORing
4415fa
13
LTC4415
Typical applicaTions
non-critical high current loads. If the status resistors are
pulled up through the keep-alive power source itself as
shown in Figure 6, the output voltage is limited to:
Multiple Battery Charging
Figure7illustratesanapplicationcircuitforautomaticdual
battery charging from a single charger. The battery with
lower voltage receives larger charging current until both
battery voltages are equal, then both are charged. While
both batteries are charging simultaneously, the higher
capacity battery gets proportionally higher current from
the charger. For Li-Ion batteries, both batteries achieve
the charger float voltage minus the forward regulation
voltage of 15mV. This concept can be extended to more
than two batteries using additional LTC4415. The STAT1,
STAT2 pins provide information as to when the batteries
are being charged. For intelligent control, the EN1/EN2
input pins can be used with a microcontroller as shown
in Figure 9 later in this section.
V
OUT
= V
– V
KEEP_ALIVE gs(M1,2)
where V
is the voltage drop from gate to source
gs(M1,2)
of the composite NMOS device (M1 and M2). The pull-up
resistor, R1, consumes power from the keep-alive source
when the primary or backup sources supply power to the
load.Theprimarypowersourceorbackupbatterysupplies
power to the load when either of them are higher than the
output voltage.
Current limit on any of the diode power paths can be set
to automatically fold back as the output voltage drops (to
reducepowerconsumption),byswitchingoutaresistoron
the CLIM pin, as shown in Figure 6 for diode 1. The gate
of NMOS M3 can optionally be fed from a resistor divided
output voltage to adjust the output voltage threshold of
current foldback.
L1
1.5µH
50k
IDEAL
SW
SENSE
IN1
OUT1
V
PV
LOAD1
BAT
INSENSE
V
+
1.5k
1.5k
IN
10µF
IN
LTC4415
BAT1
4.5V TO 5.5V
C1
10µF
R1
10k 1k
D1
LED
R2
EN1
CLIM1
CLIM2
STAT1
PGND
WARN1
WARN2
STAT2
LTC4001
CHRG
NTC
EN2
IDEAL
GND
TO µP
FROM µP
FAULT
OUT2
IN2
BATSENS
LOAD2
EN
+
BAT2
PROG IDET
TIMER SS GNDSENS
4415 F07
C2
0.22µF
R5
549Ω
R3
10k
25°C
C3
0.1µF
R4
549Ω
Figure 7. Dual Battery Charging from a Single Charger
4415fa
14
LTC4415
Typical applicaTions
Load Sharing by Multiple Batteries and Automatic
Switchover to a Preferred Power Supply
(Such as a Wall Adapter)
Microcontrolled Power Switch with Reverse Blocking,
Selectable Current Limit, Soft-Start and Monitoring
Figure 9 illustrates an application circuit for microcon-
troller monitoring and control of two power sources. The
microcontroller monitors the input supply voltages and
commands the LTC4415 through EN1/EN2 inputs.
An application circuit for dual battery load sharing with
automatic switchover to a wall adapter (when present)
is shown in Figure 8. In the absence of the wall adapter,
the higher voltage battery provides the load current until
it has discharged to the voltage of the other battery. The
load is then shared between the two batteries according
to their capacities, the higher capacity battery providing
proportionally higher current to the load unless limited
by its current limit.
Currents through the ideal diodes are monitored by the
microcontroller measuring CLIM1/CLIM2 pin voltages
using ADCs. The current limit can be adjusted for either
diode using an external FET as shown in this application
for diode 1 with MN1. The two ideal diode outputs are
connected together for power source ORing, or they may
feed different loads.
When a wall adapter is applied, the output voltage rises
as the body diode of PFET MP1 conducts and both of the
ideal diode paths in the LTC4415 stop conducting due to
reverse turn-off. At this time, the wired-OR status signal
pulls up the gate voltage of NFET MN1, pulling down the
gatevoltageofpowerPFETMP1,turningiton.Thewired-OR
status signal indicates whether the wall adapter or either
of the two batteries is supplying the load current. The two
application circuits described in Figure 7 and Figure 8 can
be cascaded for dual battery charging and load sharing.
Parallel Diodes for Lower Resistance or Higher
Current Output
The two ideal diodes in the LTC4415 can be connected in
parallel as shown in Figure 10 to achieve a low resistance
PowerPath. The master enable input, ENABLE, turns on
diode 2. EN1 is tied to the output so that diode 1 conducts
only afterthe outputhas charged up (bydiode 2according
to its current limit setting). Diode 1 is disabled when the
WALL ADAPTER
MP1 IRFHS9301
IDEAL
IN1
OUT1
+
+
BAT1
4.7µF
470k 470k
MN1
LTC4415
4.7µH
4.7µH
137k
PV
SW1A
V
PV
IN IN2
V
1.8V
0.6A
IN1
OUT2
EN1
SW2
STAT
IRLML2402
CLIM1
CLIM2
STAT1
10µF
10µF
SW1B
WARN1
WARN2
STAT2
V
OUT1
3.3V
0.8A
FB2
V
OUT1
68.1k
4.7µH
1.0M
221k
LTC3521
EN2
IN2
FB1
V
1.2V
0.6A
OUT3
IDEAL
GND
OUT2
SW3
FB3
PGOOD1
PGOOD2
PGOOD3
SHDN1
SHDN2
SHDN3
PWM
ON
OFF
100k
100k
BAT2
PWM
BURST
PGND1A
PGND1B GND PGND2
4415 F08
Figure 8. Dual Battery Load Sharing with Automatic Switchover to a Wall Adapter
4415fa
15
LTC4415
Typical applicaTions
IDEAL
PRIMARY
POWER
SOURCE
IN1
OUT1
LOAD
LTC4415
470k
EN1
CLIM1
CLIM2
STAT1
WARN1
WARN2
STAT2
MICRO-
CONTROLLER
MN1
IRLML2402
EN2
IDEAL
GND
AUXILLIARY
POWER
SOURCE
OUT2
IN2
4.7µF
4415 F09
Figure 9. Microcontrolled PowerPath Monitoring and Control
IDEAL
IN1
OUT1
POWER
SOURCE
LOAD
LTC4415
470k
EN1
CLIM1
CLIM2
STAT1
WARN1
WARN2
STAT2
ENABLE
EN2
IN2
IDEAL
GND
OUT2
4415 F10
D1
1N5817
Figure 10. Parallel Diodes with Current Limit Foldback and Reverse Polarity Protection
output falls below a threshold set by the resistor divider
power(V )isavailable,possiblyfromawalladapter.When
DD
on EN1 pin. This arrangement results in current limit
foldback, reducing the current limit of the parallel diodes
to that of only diode 2 when the output voltage falls, thus
controlling power dissipation.
the input power falls below the supercapacitor voltage,
the supercapcitor provides power to the LTC3521. The
supercapacitorcharger(LTC3625)providesapowerfailure
comparator output signal (PFO) when its input voltage
falls below a preset voltage defined by the resistive divider
on the PFI input. The PFO signal is available to start the
shutdown of high current applications. When the super-
capacitor discharges to a voltage level determined by the
resistor divider on EN1 input of LTC4415, the wired-AND
status signal of LTC4415 pulls up because neither of the
diode paths in LTC4415 are conducting and the coin cell
provides power through a back-to-back connected pair
of NFETs, M1 and M2. The wired-AND status signal is
available to signal that only low current circuits such as
real-timeclockormemoryremainenabledwhileoperating
from the coin cell.
An optional Schottky diode can be inserted in series with
the chip ground as shown in Figure 10 to protect LTC4415
against input power source reverse polarity. The presence
of the Schottky shifts the UVLO and enable pin thresholds
by a voltage equal to the forward voltage drop of the
Schottky diode.
Power Backup Using Supercapacitors and Optional
Keep-Alive Cell
An application of dual backup power is shown on the last
page of this data sheet. Diode 2 provides power to the
triple DC/DC converter (LTC3521) when the primary input
4415fa
16
LTC4415
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
DHC Package
16-Lead Plastic DFN (5mm × 3mm)
(Reference LTC DWG # 05-08-1872 Rev Ø)
Variation A
0.65 ±0.05
1.29 ±0.05
3.50 ±0.05
1.65 ±0.05
2.20 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
4.40 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
0.40 ±0.10
5.00 ±0.10
(2 SIDES)
TYP
9
16
R = 0.20
TYP
1.29 REF
3.00 ±0.10
(2 SIDES)
1.65 ±0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PIN 1
NOTCH
(DHC16 Var A) DFN 0410
8
1
0.25 ±0.05
0.50 BSC
0.75 ±0.05
0.200 REF
4.40 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
4415fa
17
LTC4415
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev E)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
1
8
0.35
REF
5.23
(.206)
MIN
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102
(.065 ±.004)
3.20 – 3.45
(.126 – .136)
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
DETAIL “B”
16
9
0.305 ±0.038
0.50
(.0197)
BSC
NO MEASUREMENT PURPOSE
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
(.0120 ±.0015)
TYP
0.280 ±0.076
(.011 ±.003)
RECOMMENDED SOLDER PAD LAYOUT
16151413121110
9
REF
DETAIL “A”
0.254
(.010)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
0° – 6° TYP
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
1 2 3 4 5 6 7 8
DETAIL “A”
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE16) 0911 REV E
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
4415fa
18
LTC4415
revision hisTory
REV
DATE
DESCRIPTION
PAGE NUMBER
A
4/12
Clarified footnotes and added new Note 5 for quiescent current
Changed FET MP1 part number on Figure 8
3, 4
15
4415fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC4415
Typical applicaTion
Power Backup Using Supercapacitors and Optional Keep-Alive Cell
KEEP-ALIVE/COIN CELL
M1
DMN2215UDM
M2
IDEAL
IN1
OUT1
V
V
V
OUT
DD
IN
L1 3.3µH
L2 3.3µH
47µF
C
300k
200k
TOP
360F
LTC4415
4.7µH
4.7µH
137k
294k
100k
EN
SW1
PV
SW1A
V
PV
IN IN2
V
1.8V
0.6A
IN1
OUT2
LTC3625
EN1
SW2
PFI
CTL
SW2
STAT1
10µF
10µF
C
BOT
360F
SW1B
V
MID
WARN1
WARN2
STAT2
V
OUT1
3.3V 1A
47k
FB2
V
SEL
GND
GND
V
OUT1
68.1k
4.7µH
PFO
CLIM1
CLIM2
22µF
1.0M
LTC3521
PROG
R
125Ω
FB1
V
1.2V
0.6A
OUT3
PROG
78.7k
125Ω
SW3
FB3
PGOOD1
PGOOD2
PGOOD3
SHDN1
SHDN2
SHDN3
PWM
221k
ON
IDEAL
GND
OFF
100k
100k
OUT2
IN2
PWM
EN2
BURST
PGND1A
PGND1B GND PGND2
4415 TA02
relaTeD parTs
PART NUMBER DESCRIPTION
COMMENTS
LTC4411
LTC4412
2.6A Low Loss Ideal Diode
PowerPath Controller
Monolithic Low Loss PowerPath, ThinSOT Package
3V to 28V Input Voltage Range, ThinSOT Package
LTC4413-1/
LTC4413-2
140mΩ On-Resistance, Overvoltage Protection Sensor with Drive Output
Dual 2.6A, 2.5V to 5.5V, Ideal Diodes in 3mm × 3mm DFN
LTC4414
LTC4416
LTC4352
LTC4354
LTC4355
LTC4357
LTC4358
LTC4066
36V, Low Loss PowerPath Controller for Large PFETs
36V, Low Loss Dual PowerPath Controllers
Low Voltage Ideal Diode Controller With Monitoring
Negative High Voltage Diode-OR Controller and Monitor
Positive High Voltage Diode-OR Controller and Monitor
Positive High Voltage Ideal Diode Controller
5A Monolithic Ideal Diode
Drives Large Q PFETs, 3.5V to 36V
G
Designed to Drive Large and Small Q PFETs, 3.5V to 36V
G
Controls Single N-Channel MOSFET, Input Supply Monitors, 2.9V to 18V
Controls Two N-Channel MOSFETs, 4.5V to 80V
Controls Two N-Channel MOSFETs, 9V to 80V
Controls Single N-Channel MOSFET, 9V to 80V
20mΩ N-Channel MOSFET, 9V to 26.5V
USB Power Controller and Li-Ion Linear Charger with Low
Loss Ideal Diode
Seamless Transition Between Input Power Sources: Li-Ion Battery,
USB and 5V Wall Adapter
LTC4425
LTC2952
Linear Supercapacitor Charger with Current-Limited Ideal
Diode and V/I Monitor
50mΩ On-Resistance, 2.7V to 5.5V, Programmable Current Limit,
Programmable Output Voltage Mode
Pushbutton Ideal Diode PowerPath Controller with
Supervisor
Controls Two P-Channel MOSFETs, 2.7V to 28V
4415fa
LT 0412 REV A • PRINTED IN USA
20 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
●
LINEAR TECHNOLOGY CORPORATION 2011
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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