LTC4441MPMSE#TRPBF [Linear]
LTC4441 - N-Channel MOSFET Gate Driver; Package: MSOP; Pins: 10; Temperature Range: -55°C to 125°C;
| 型号： | LTC4441MPMSE#TRPBF |
| 厂家： | 
Linear |
| 描述： | LTC4441 - N-Channel MOSFET Gate Driver; Package: MSOP; Pins: 10; Temperature Range: -55°C to 125°C 驱动器 栅极 MOSFET栅极驱动 |
| 文件： | 总12页 (文件大小：154K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC4441/LTC4441-1
N-Channel MOSFET
Gate Driver
U
FEATURES
DESCRIPTIO
The LTC®4441/LTC4441-1 is an N-channel MOSFET gate
driver that can supply up to 6A of peak output current. The
chip is designed to operate with a supply voltage of up to
25V and has an adjustable linear regulator for the gate
drive. The gate drive voltage can be programmed between
5V and 8V.
■
6A Peak Output Current
■
Wide VIN Supply Range: 5V to 25V
■
Adjustable Gate Drive Voltage: 5V to 8V
■
Logic Input can be Driven Below Ground
■
30ns Propagation Delay
■
Supply Independent CMOS/TTL Input Thresholds
■
Undervoltage Lockout
The LTC4441/LTC4441-1 features a logic threshold driver
input. This input can be driven below ground or above the
driver supply. A dual function control input is provided to
disable the driver or to force the chip into shutdown mode
with <12µA of supply current. Undervoltage lockout and
overtemperature protection circuits will disable the driver
output when activated. The LTC4441 also comes with an
open-drain output that provides adjustable leading edge
blanking to prevent ringing when sensing the source
current of the power MOSFETs.
■
Low Shutdown Current: <12µA
■
Overtemperature Protection
■
Adjustable Blanking Time for MOSFET’s
Current Sense Signal (LTC4441)
■
Available in SO-8 and 10-Lead MSOP
(Exposed Pad) Packages
U
APPLICATIO S
■
Power Supplies
The LTC4441 is available in a thermally enhanced 10-lead
MSOP package. The LTC4441-1 is the SO-8 version with-
out the blanking function.
, LTC and LT are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners. Protected by U.S. Patents
including 6677210.
■
Motor/Relay Control
■
Line Drivers
Charge Pumps
■
U
TYPICAL APPLICATIO
D1
L1
10µH 20A
MBR10100
V
52V
2A
OUT
V
IN
6V TO 24V
+
+
22µF
25V
X7R
RISE/FALL Time vs CLOAD
C
OUT
R1
R5
200
180
160
140
120
100
80
330k
V
IN
T = 25°C
A
FB
DRV
CC
DRV = 5V
C
CC
VCC
R2
86.6k
SHUTDOWN
Q2 R6
10µF
X5R
Si7370
×2
SGND
OUT
LTC4441
EN/SHDN
R3
5mΩ
RISE TIME
R7
LTC3803
RBLANK
IN
PGND
SWITCHING
60
CONTROLLER
BLANK
GATE
R4
100Ω
40
FALL TIME
+
20
SENSE
0
R8
GND
FB
0
5
10 15 20 25 30 35 40 45 50
(nF)
511k
C
LOAD
4441 TA01b
R9
8.06k
4441 TA01
44411f
1
LTC4441/LTC4441-1
W W U W
ABSOLUTE MAXIMUM RATINGS (Note 1)
Supply Voltage
RBLANK, BLANK (LTC4441 Only) .......... –0.3V to 5V
OUT Output Current ............................................ 100mA
Operating Temperature Range (Note 2) .. – 40°C to 85°C
Junction Temperature (Note 8)............................ 125°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
VIN ...................................................................... 28V
DRVCC .................................................................. 9V
Input Voltage
IN .......................................................... –15V to 15V
FB, EN/SHDN ........................ –0.3V to DRVCC + 0.3V
U
W U
PACKAGE/ORDER INFORMATION
ORDER PART
ORDER PART
TOP VIEW
TOP VIEW
NUMBER
NUMBER
PGND
BLANK
RBLANK
SGND
IN
1
2
3
4
5
10 OUT
PGND
SGND
1
2
3
4
8
7
6
5
OUT
DRV
9
8
7
6
DRV
CC
LTC4441EMSE
LTC4441IMSE
LTC4441ES8-1
LTC4441IS8-1
11
V
IN
FB
EN/SHDN
CC
IN
V
IN
EN/SHDN
FB
MSE PACKAGE
10-LEAD PLASTIC MSOP
MSE PART
MARKING
S8 PART
MARKING
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 125°C, θJA = 38°C/W (NOTE 3)
EXPOSED PAD (PIN 11) IS GND
MUST BE SOLDERED TO PCB
LTBJQ
LTBJP
44411
4441I1
TJMAX = 125°C, θJA = 150°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 7.5V, DRVCC = 5V, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
Driver Supply Programmable Range
●
5
8
V
DRVCC
VIN
I
V
Supply Current
EN/SHDN = 0V, IN = 0V
EN/SHDN = 5V, IN = 0V
●
●
5
250
3
12
500
6
µA
µA
mA
IN
f
= 100kHz, C
= 4.7nF (Note 4)
IN
OUT
DRV Regulator
CC
V
Regulator Feedback Voltage
Regulator Line Regulation
Load Regulation
V
V
= 7.5V
●
1.11
1.21
9
1.31
40
V
mV
%
FB
IN
IN
∆V
∆V
= 7.5V to 25V
DRVCC(LINE)
DRVCC(LOAD)
DROPOUT
Load = 0mA to 40mA
Load = 40mA
–0.1
370
V
V
Regulator Dropout Voltage
FB Pin UVLO Voltage
mV
Rising Edge
Falling Edge
1.09
0.97
V
V
UVLO
Input
V
V
IN Pin High Input Threshold
IN Pin Low Input Threshold
IN Pin Input Voltage Hysteresis
IN Pin Input Current
Rising Edge
●
●
2
1
2.4
1.4
2.8
1.8
V
V
IH
IL
Falling Edge
V -V
Rising-Falling Edge
1
V
IH IL
I
I
V
V
= ±10V
●
●
±0.01
±0.01
0.45
±10
±1
µA
µA
V
INP
IN
EN/SHDN
EN/SHDN Pin Input Current
EN/SHDN Pin Shutdown Threshold
EN/SHDN Pin Enable Threshold
= 9V
EN/SHDN
V
V
Falling Edge
SHDN
EN
Rising Edge
Falling Edge
1.21
1.09
V
V
●
1.036
1.145
V
EN/SHDN Pin Enable Hysteresis
Rising-Falling Edge
0.12
V
EN(HYST)
44411f
2
LTC4441/LTC4441-1
ELECTRICAL CHARACTERISTICS
The ● indicates specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 7.5V, DRVCC = 5V, unless otherwise specified.
SYMBOL
Output
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
R
Driver Output Pull-Down Resistance
Driver Output Peak Pull-Up Current
Driver Output Peak Pull-Down Current
BLANK Pin Pull-Down Resistance
RBLANK Pin Voltage
I
= 100mA
OUT
●
0.35
6
0.8
Ω
A
ONL
I
I
DRV = 8V
CC
PU
PD
DRV = 8V
6
A
CC
R
IN = 0V, I
= 100mA LTC4441 Only
BLANK
11
1.3
Ω
V
ON(BLANK)
V
R
= 200kΩ LTC4441 Only
BLANK
RBLANK
Switching Timing
t
t
t
t
t
Driver Output High-Low Propagation Delay
Driver Output Low-High Propagation Delay
Driver Output Rise Time
C
C
C
C
= 4.7nF (Note 5)
= 4.7nF (Note 5)
= 4.7nF (Note 5)
= 4.7nF (Note 5)
30
36
13
8
ns
ns
ns
ns
ns
PHL
OUT
OUT
OUT
OUT
PLH
r
Driver Output Fall Time
f
Driver Output High to BLANK Pin High
R
= 200kΩ (Note 6)
BLANK
200
BLANK
current will vary with supply voltage, switching frequency and the external
MOSFETs used.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 5: Rise and fall times are measured using 10% and 90% levels. Delay
times are measured from 50% of input to 20%/80% levels at driver
output.
Note 6: Blanking time is measured from 50% of OUT leading edge to 10%
of BLANK with a 1kΩ pull-up at BLANK pin. LTC4441 only.
Note 2: The LTC4441E/LTC4441E-1 are guaranteed to meet performance
specifications from 0°C to 70°C. Specifications over the –40°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls. The LTC4441I/LTC4441I-1 are
guaranteed and tested over the –40°C to 85°C operating temperature
range.
Note 3: Failure to solder the Exposed Pad of the MSE package to the PC
board will result in a thermal resistance much higher than 38°C/W.
Note 4: Supply current in normal operation is dominated by the current
Note 7: Guaranteed by design, not subject to test.
Note 8: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. The junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the maximum operating junction temperature
may impair device reliability.
needed to charge and discharge the external power MOSFET gate. This
U W
TYPICAL PERFOR A CE CHARACTERISTICS
IN Low Threshold Voltage
vs Temperature
IN High Threshold Voltage
vs Temperature
EN Pin Input Threshold Voltage
vs Temperature
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
2.8
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2.0
1.26
1.24
1.22
1.20
1.18
1.16
1.14
1.12
1.10
1.08
1.06
1.04
V
= 7.5V
CC
V
= 7.5V
CC
V
= 7.5V
IN
IN
IN
DRV = 5V
DRV = 5V
DRV = 5V
CC
RISING EDGE
FALLING EDGE
–25
0
50
75 100 125
–25
0
50
75 100 125
–25
0
50
75 100 125
–50
25
–50
25
–50
25
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
4441 G01
4441 G02
4441 G03
44411f
3
LTC4441/LTC4441-1
U W
TYPICAL PERFOR A CE CHARACTERISTICS
FB Pin UVLO Threshold
vs Temperature
SD Pin Input Threshold Voltage
vs Temperature
DRVCC Voltage vs Temperature
1.20
1.16
1.12
1.08
1.04
1.00
0.96
0.92
0.88
0.84
0.80
0.75
0.70
0.65
0.60
0.55
0.50
0.45
0.40
0.35
0.30
5.50
5.45
5.40
5.35
5.30
5.25
5.20
5.15
5.10
5.05
5.00
V
IN
= 7.5V
V
= 7.5V
CC
R1 = 330k
R2 = 100k
IN
DRV = 5V
RISING EDGE
RISING EDGE
V
= 25V
IN
V
IN
= 7.5V
FALLING EDGE
FALLING EDGE
–25
0
50
75 100 125
–25
0
50
75 100 125
–25
0
50
75 100 125
–50
25
–50
25
–50
25
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
4441 G04
4441 G05
4441 G06
DRVCC Dropout Voltage vs
Temperature
DRVCC Load Regulation
DRVCC Line Regulation
1000
900
800
700
600
500
400
300
200
100
0
5.50
5.45
5.40
5.35
5.30
5.25
5.20
5.15
5.10
5.05
5.00
5.30
5.25
5.20
5.15
5.10
5.05
5.00
T
= 25°C
V
= 7.5V
CC
= 40mA
V
T
= 7.5V
A
IN
IN
A
R1 = 330k
R2 = 100k
DRV = 5V
= 25°C
I
R1 = 330k
R2 = 100k
LOAD
–25
0
50
75 100 125
–50
25
20 40
80 100 120 140 160 180 200
5
10
15
(V)
20
25
30
0
60
0
TEMPERATURE (°C)
I
(mA)
V
LOAD
IN
4441 G09
4441 G07
4441 G08
OUT Pin Pull-Down Resistance vs
Temperature
tPLH, tPHL vs DRVCC
tPLH, tPHL vs Temperature
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
60
50
40
30
20
10
0
60
50
40
30
20
10
0
V
= 7.5V
CC
DRV = 5V
CC
T
= 25°C
LOAD
IN
DRV = 5V
A
C
LOAD
= 4.7nF
C
= 4.7nF
t
PLH
t
t
PLH
t
PHL
PHL
–25
0
50
75 100 125
–25
0
50
75 100 125
–50
25
–50
25
5.0 5.5
6.5 7.0 7.5 8.0 8.5 9.0
6.0
4.5
TEMPERATURE (°C)
TEMPERATURE (°C)
DRV (V)
CC
4441 G10
4441 G12
4441 G11
44411f
4
LTC4441/LTC4441-1
U W
TYPICAL PERFOR A CE CHARACTERISTICS
RISE/FALL Time vs Temperature
tPLH, tPHL vs CLOAD
RISE/FALL Time vs DRVCC
100
90
80
70
60
50
40
30
20
10
0
30
30
25
20
15
10
5
T
= 25°C
CC
DRV = 5V
CC
T
= 25°C
LOAD
A
A
DRV = 5V
C
LOAD
= 4.7nF
C
= 4.7nF
25
20
15
10
5
t
PLH
RISE TIME
FALL TIME
RISE TIME
FALL TIME
t
PHL
0
0
–25
0
50
75 100 125
0
5
10 15 20 25 30 35 40 45 50
(nF)
–50
25
5.0 5.5
6.5 7.0 7.5 8.0 8.5 9.0
6.0
4.5
C
TEMPERATURE (°C)
DRV (V)
CC
LOAD
4441 G13
4441 G15
4441 G14
RISE/FALL Time vs CLOAD
Blanking Time vs RBLANK
Blanking Time vs Temperature
200
180
160
140
120
100
80
500
450
400
350
300
250
200
150
100
50
250
240
230
220
210
200
190
180
170
160
150
T
= 25°C
CC
T
= 25°C
V
= 7.5V
CC
A
A
IN
DRV = 5V
DRV = 5V
CC
DRV = 5V
LTC4441
LTC4441
RISE TIME
60
40
FALL TIME
20
0
0
100 200
400 500 600 700
–25
0
50
75 100 125
0
300
–50
25
0
5
10 15 20 25 30 35 40 45 50
R
BLANK
(kΩ)
TEMPERATURE (°C)
C
(nF)
LOAD
4441 G17
4441 G18
4441 G16
VIN Operating Supply Current vs
Temperature
VIN Standby Supply Current vs
Temperature
500
450
400
350
300
250
200
150
100
50
15
14
13
12
11
10
9
EN = 5V
IN = 0V
EN = 0V
IN = 0V
V
IN
= 25V
V
IN
= 25V
V
= 7.5V
IN
8
7
V
= 7.5V
IN
6
5
4
0
3
–25
0
50
75 100 125
–25
0
50
75 100 125
–50
25
–50
25
TEMPERATURE (°C)
TEMPERATURE (°C)
4441 G19
4441 G20
44411f
5
LTC4441/LTC4441-1
U W
TYPICAL PERFOR A CE CHARACTERISTICS
IVIN vs fIN
IVIN vs CLOAD
50
45
40
35
30
25
20
15
10
5
60
50
40
30
20
10
0
T
= 25°C
LOAD
T
f
= 25°C
= 100kHz
A
A
IN
C
= 4.7nF
DRV = 5V
CC
DRV = 9V
CC
DRV = 9V
CC
DRV = 5V
CC
0
0
100 200 300 400 500 600 700 800 9001000
(kHz)
0
5
10 15 20 25 30 35 40 45 50
(nF)
f
IN
C
LOAD
4441 G21
4441 G22
U
U
U
PI FU CTIO S
MSOP/SO-8
PGND (Pin 1/Pin 1): Driver Ground. Connect the DRVCC
bypass capacitor directly to this pin, as close as possible
to the IC. In addition, connect the PGND and SGND pins
together close to the IC, and then connect this node to the
source of the power MOSFET (or current sense resistor)
with as short and wide a PCB trace as possible.
EN/SHDN (Pin 6/Pin 4): Enable/Shutdown Input. Pulling
this pin above 1.21V allows the driver to switch. Pulling
this pin below 1.09V forces the driver output to go
low. Pulling this pin below 0.45V forces the LTC4441/
LTC4441-1 into shutdown mode; the DRVCC regulator
turns off and the supply current drops below 12µA.
BLANK (Pin 2/NA): Current Sense Blanking Output. Use
this pin to assert a blanking time in the power MOSFET’s
source current sense signal. The LTC4441 pulls this
open-drain output to SGND if the driver output is low. The
output becomes high impedance after a programmable
blanking time from the driver leading edge output. This
blanking time can be adjusted with the RBLANK pin.*
FB (Pin 7/Pin 5): DRVCC Regulator Feedback Input. Con-
nect this pin to the center tap of an external resistive
divider between DRVCC and SGND to program the DRVCC
regulator output voltage. To ensure loop stability, use the
value of 330kΩ for the top resistor, R1.
VIN (Pin 8/Pin 6): Main Supply Input. This pin powers the
DRVCC linearregulator.BypassthispintoSGNDwitha1µF
ceramic, tantalum or other low ESR capacitor in close
proximity to the LTC4441/LTC4441-1.
RBLANK (Pin 3/NA):Blanking Time Adjust Input. Connect
a resistor from this pin to SGND to set the blanking time.
A small resistor value gives a shorter delay. Leave this pin
floating if the BLANK pin is not used.*
DRVCC (Pin9/Pin7): LinearRegulatorOutput. Thisoutput
pinpowersthedriverandthecontrolcircuitry. Bypassthis
pin to PGND using a 10µF ceramic, low ESR (X5R or X7R)
capacitor in close proximity to the LTC4441/LTC4441-1.
SGND (Pin 4/Pin 2):Signal Ground. Ground return for the
DRVCC regulator and low power circuitry.
IN (Pin 5/Pin 3): Driver Logic Input. This is the non-
inverting driver input under normal operating conditions.
OUT (Pin 10/Pin 8): Driver Output.
Exposed Pad (Pin 11/NA): Ground. The Exposed Pad
must be soldered to the PCB ground.
*Available only on the lo-lead version of the LTC4441.
44411f
6
LTC4441/LTC4441-1
W
BLOCK DIAGRA
V
IN
–
+
BIAS
1.21V
REG
M
REG
FB
UVLO
DRV
CC
1.09V
IN
Q1
INB
P1
N1
OUT
EN/SHDN
PGND
EN
THERMAL
1.21V
0.45V
SHUTDOWN
RBLANK
LEADING
EDGE DELAY
BLANK
MB
SHUTDOWN
SHDN
SGND
FOR 10-LEAD
LTC4441
ONLY
4441 BD
W U U
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APPLICATIO S I FOR ATIO
Overview
provides the flexibility to use either standard threshold or
logic level MOSFETs.
Power MOSFETs generally account for the majority of
powerlostinaconverter.Itisimportanttochoosenotonly
the type of MOSFET used, but also its gate drive circuitry.
The LTC4441/LTC4441-1 is designed to drive an N-chan-
nelpowerMOSFETwithlittleefficiencyloss.TheLTC4441/
LTC4441-1 can deliver up to 6A of peak current using a
combined NPN Bipolar and MOSFET output stage. This
helps to turn the power MOSFET fully “on” or “off” with a
very brief transition region.
DRVCC Regulator
An internal, P-channel low dropout linear regulator pro-
vides the DRVCC supply to power the driver and the pre-
driver logic circuitry as shown in Figure 1. The regulator
output voltage can be programmed between 5V and 8V
with an external resistive divider between DRVCC and
SGND and a center tap connected to the FB pin. The
regulatorneedsanR1valueofaround330ktoensureloop
The LTC4441/LTC4441-1 includes a programmable linear
regulator to regulate the gate drive voltage. This regulator
44411f
7
LTC4441/LTC4441-1
W U U
U
APPLICATIO S I FOR ATIO
signal to drive standard power MOSFETs. The LTC4441/
LTC4441-1 contains an internal voltage regulator that
biases the input buffer, allowing the input thresholds (VIH
= 2.4V, VIL = 1.4V) to be independent of the programmed
driver supply, DRVCC, or the input supply, VIN. The 1V
hysteresis between VIH and VIL eliminates false triggering
due to noise during switching transitions. However, care
should be taken to isolate this pin from any noise pickup,
especially in high frequency, high voltage applications.
The LTC4441/LTC4441-1 input buffer has high input
impedanceanddrawsnegligibleinputcurrent,simplifying
the drive circuitry required for the input. This input can
withstand voltages up to 15V above and below ground.
This makes the chip more tolerant to ringing on the input
digital signal caused by parasitic inductance.
V
LTC4441
IN
–
+
1.21V
R1
330k
REG
M
REG
FB
R2
ENABLE
DRIVER
UVLO
DRV
CC
1.09V
C
VCC
OUT
DRIVER
PGND
4441 F01
Figure 1. DRVCC Regulator
Driver Output Stage
stability; the value of R2 can be varied to achieve the
required DRVCC voltage:
A simplified version of the LTC4441/LTC4441-1’s driver
output stage is shown in Figure 2.
406k
R2 =
V
IN
DRVCC – 1.21V
LOAD
DRV
CC
LTC4441
OUT
Q1
INDUCTOR
TheDRVCC regulatorcansupplyupto100mAandisshort-
circuit protected. The output must be bypassed to the
PGND pin in very close proximity to the IC pins with a
minimum of 10µF ceramic, low ESR (X5R or X7R) capaci-
tor. Good bypassing is necessary as high transient supply
currents are required by the driver. If the input supply
voltage, VIN,isclosetotherequiredgatedrivevoltage, this
regulatorcanbedisabledbyconnectingtheDRVCC andFB
pins to VIN.
P1
C
C
GD
POWER
MOSFET
R
N1
O
GS
N2
N3
DRV
CC
PGND
4441 F02
Figure 2. Driver Output Stage
The pull-up device is the combination of an NPN transis-
tor, Q1, andaP-channelMOSFET, P1. Thisprovidesboth
the ability to swing to rail (DRVCC) and deliver large peak
charging currents.
TheLTC4441/LTC4441-1monitorstheFBpinforDRVCC’s
UVLO condition (UVLO in Figure 1). During power-up, the
driver output is held low until the DRVCC voltage reaches
90% of the programmed value. Thereafter, if the DRVCC
voltage drops more than 20% below the programmed
value, the driver output is forced low.
The pull-down device is an N-channel MOSFET, N1, with
a typical on resistance of 0.35Ω. The low impedance of N1
provides fast turn-off of the external power MOSFET and
holdsthepowerMOSFET’sgatelowwhenitsdrainvoltage
switches. When the power MOSFET’s gate is pulled low
(gate shorted to source through N1) by the LTC4441/
LTC4441-1,itsdrainvoltageispulledhighbyitsload(e.g.,
Logic Input Stage
TheLTC4441/LTC4441-1driveremploysTTL/CMOScom-
patible input thresholds that allow a low voltage digital
44411f
8
LTC4441/LTC4441-1
W U U
APPLICATIO S I FOR ATIO
U
inductor or resistor). The slew rate of the drain voltage
causes current to flow to the MOSFET’s gate through its
gate-to-drain capacitance. If the MOSFET driver does not
have sufficient sink current capability (low output imped-
ance), the current through the power MOSFET’s CGD can
momentarily pull the gate high and turn the MOSFET
back on.
driver starts switching according to the input logic signal.
The driver enable comparator has a small hysteresis of
120mV.
Blanking
In some switcher applications, a current sense resistor is
placed between the low side power MOSFET’s source
terminal and ground to sense the current in the MOSFET.
With this configuration, the switching controller must
incorporate some timing interval to blank the ringing on
the current sense signal immediately after the MOSFET is
turned on. This ringing is caused by the parasitic induc-
tance and capacitance of the PCB trace and the MOSFET.
The duration of the ringing is thus dependent on the PCB
layout and the components used and can be longer than
the blanking interval provided by the controller.
A similar situation occurs during power-up when VIN is
ramping up with the DRVCC regulator output still low. N1
is off and the driver output, OUT, may momentarily pull
high through the power MOSFET’s CGD, turning on the
power MOSFET. The N-channel MOSFETs N2 and N3,
shown in Figure 2, prevent the driver output from going
high in this situation. If DRVCC is low, N3 is off. If OUT is
pulled high through the power MOSFET’s CGD, the gate of
N2 gets pulled high through RO. This turns N2 on, which
then pulls OUT low. Once DRVCC is >1V, N3 turns on to
hold the N2 gate low, thus disabling N2.
The 10-Lead LTC4441 includes an open-drain output that
can be used to extend this blanking interval. The 8-Lead
LTC4441-1 does not have this blanking function. Figure 3
shows the BLANK pin connection. The BLANK pin is
connected directly to the switching controller’s SENSE+
input. Figure 4 shows the blanking waveforms. If the
driver input is low, the external power MOSFET is off and
MB turns on to hold SENSE+ low. If the driver input goes
high, the power MOSFET turns on after the driver’s propa-
gation delay. MB remains on, attenuating the ringing seen
by the controller’s SENSE+ input. After the programmed
blanking time, MB turns off to enable the current sense
The predriver that drives Q1, P1 and N1 uses an adaptive
method to minimize cross-conduction currents. This is
done with a 5ns nonoverlapping transition time. N1 is fully
turned off before Q1 is turned on and vice-versa using this
5ns buffer time. This minimizes any cross-conduction
currents while Q1 and N1 are switching on and off without
affecting their rise and fall times.
Thermal Shutdown
The LTC4441/LTC4441-1 has a thermal detector that
disables the DRVCC regulator and pulls the driver output
low when activated. If the junction temperature exceeds
150°C,thedriverpull-updevices,Q1andP1,turnoffwhile
the pull-down device, N1, turns on briskly for 200ns to
quickly pull the output low. The thermal shutdown circuit
has 20°C of hysteresis.
V
IN
TO
LOAD
LTC4441
OUT
SWITCHING
CONTROLLER’S
CURRENT
SENSE
INDUCTOR
POWER
MOSFET
R4
DRIVER
INPUT
+
SENSE
LEADING
EDGE DELAY
R3
–
SENSE
Enable/Shutdown Input
BLANK
The EN/SHDN pin serves two functions. Pulling this pin
below 0.45V forces the LTC4441/LTC4441-1 into shut-
down mode. In shutdown mode, the internal circuitry and
the DRVCC regulator are off and the supply current drops
to <12µA. If the input voltage is between 0.45V and 1.21V,
the DRVCC regulator and internal circuit power up but the
driver output stays low. If the input goes above 1.21V, the
MB
SGND
PGND
KEEP THIS
TRACE SHORT
RBLANK
4441 F03
R7
Figure 3. Blanking Circuit
44411f
9
LTC4441/LTC4441-1
W U U
U
APPLICATIO S I FOR ATIO
where:
IN
IQ =LTC4441/LTC4441-1staticquiescentcurrent,typi-
cally 250µA
OUT
POWER
MOSFET’s
CURRENT
f = Logic input switching frequency
QG =PowerMOSFETtotalgatechargeatcorresponding
VGS voltage equal to DRVCC
POWER MOSFET’s
SOURCE TERMINAL
VIN = LTC4441/LTC4441-1 input supply voltage
TJ = Junction temperature
MB GATE
TA = Ambient temperature
+
BLANK/SENSE
θJA = Junction-to-ambient thermal resistance. The
10-pin MSOP package has a thermal resistance of
θJA = 38°C/W.
4441 F04
BLANKING TIME
Figure 4. Blanking Waveforms
The total supply current, IQ(TOT), consists of the LTC4441/
LTC4441-1’s static quiescent current, IQ, and the current
required to drive the gate of the power MOSFET, with the
latter usually much higher than the former. The dissipated
power, PD, includes the efficiency loss of the DRVCC
regulator. With a programmed DRVCC, a high VIN results
in higher efficiency loss.
signal. MB is designed to turn on and turn off at a
controlled slew rate. This is to prevent the gate switching
noise from coupling into the current sense signal.
The blanking interval can be adjusted using resistor R7
connected to the RBLANK pin. A small resistance value
gives a shorter interval with a default minimum of 75ns.
Asanexample,consideranapplicationwithVIN =12V.The
switching frequency is 300kHz and the maximum ambient
temperature is 70°C. The power MOSFET chosen is three
pieces of IRFB31N20D, which has a maximum RDS(ON) of
82mΩ (at room temperature) and a typical total gate
charge of 70nC (the temperature coefficient of the gate
charge is low).
The value of the resistor R4 and the on-resistance of MB
(typically 11Ω) form a resistive divider attenuating the
ringing. R4needstobelargeforeffectiveblanking, butnot
so large as to cause delay to the sense signal. A resistance
value of 1k to 10k is recommended.
For optimum performance, the LTC4441/LTC4441-1
should be placed as close as possible to the power
MOSFET and current sense resistor, R3.
IQ(TOT) = 500µA + 210nC • 300kHz = 63.5mA
PIC = 12V • 63.5mA = 0.762W
TJ = 70°C + 38°C/W • 0.762W = 99°C
Power Dissipation
This demonstrates how significant the gate charge cur-
rent can be when compared to the LTC4441/LTC4441-1’s
static quiescent current. To prevent the maximum junc-
tion temperature from being exceeded, the input supply
current must be checked when switching at high VIN. A
tradeoff between the operating frequency and the size of
the power MOSFET may be necessary to maintain a
reliable LTC4441/LTC4441-1 junction temperature. Prior
to lowering the operating frequency, however, be sure to
To ensure proper operation and long-term reliability, the
LTC4441/LTC4441-1 must not operate beyond its maxi-
mumtemperaturerating. Thejunctiontemperaturecanbe
calculated by:
IQ(TOT) = IQ + f • QG
PD = VIN • (IQ + f • QG)
TJ = TA + PD • θJA
44411f
10
LTC4441/LTC4441-1
W U U
APPLICATIO S I FOR ATIO
U
check with power MOSFET manufacturers for their
innovations on low QG, low RDS(ON) devices. Power
MOSFET manufacturing technologies are continually im-
proving, with newer and better performing devices being
introduced.
C. Keep the PCB ground trace between the LTC4441/
LTC4441-1 ground pins (PGND and SGND) and the exter-
nal current sense resistor as short and wide as possible.
D. Planthegroundroutingcarefully. Knowwherethelarge
loadswitchingcurrentpathsare.Maintainseparateground
return paths for the input pin and output pin to avoid
sharing small-signal ground with large load ground re-
turn. Terminate these two ground traces only at the GND
pin of the driver (STAR network).
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC4441/LTC4441-1:
E. Keep the copper trace between the driver output pin and
the load short and wide.
A. Mount the bypass capacitors as close as possible
between the DRVCC and PGND pins and between the VIN
and SGND pins. The PCB trace loop areas should be
tightened as much as possible to reduce inductance.
F. Place the small-signal components away from the high
frequency switching nodes. These components include
the resistive networks connected to the FB, RBLANK and
EN/SHDN pins.
B. Use a low inductance, low impedance ground plane to
reduce any ground drop. Remember that the LTC4441/
LTC4441-1 switches 6A peak current and any significant
ground drop will degrade signal integrity.
U
PACKAGE DESCRIPTIO
MSE Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1663)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.06 ± 0.102
(.081 ± .004)
2.794 ± 0.102
(.110 ± .004)
0.889 ± 0.127
(.035 ± .005)
1
1.83 ± 0.102
(.072 ± .004)
5.23
(.206)
MIN
2.083 ± 0.102 3.20 – 3.45
(.082 ± .004) (.126 – .136)
10
DETAIL “A”
0° – 6° TYP
0.254
(.010)
0.50
(.0197)
BSC
0.305 ± 0.038
(.0120 ± .0015)
TYP
GAUGE PLANE
RECOMMENDED SOLDER PAD LAYOUT
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.497 ± 0.076
(.0196 ± .003)
REF
0.53 ± 0.152
(.021 ± .006)
0.86
(.034)
REF
1.10
(.043)
MAX
10 9
8
7 6
DETAIL “A”
0.18
(.007)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.127 ± 0.076
(.005 ± .003)
0.50
(.0197)
BSC
MSOP (MSE) 0603
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
1
2
3
4 5
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
44411f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
11
LTC4441/LTC4441-1
U
PACKAGE DESCRIPTIO
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.189 – .197
(4.801 – 5.004)
.045 ±.005
.160 ±.005
NOTE 3
.050 BSC
7
5
8
6
.245
MIN
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
.030 ±.005
TYP
1
3
4
2
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
(0.254 – 0.508)
× 45°
.053 – .069
(1.346 – 1.752)
.004 – .010
(0.101 – 0.254)
.008 – .010
(0.203 – 0.254)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
.050
(1.270)
BSC
.014 – .019
(0.355 – 0.483)
TYP
NOTE:
INCHES
1. DIMENSIONS IN
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
SO8 0303
RELATED PARTS
PART NUMBER
LTC1154
LTC1155
LT®1161
DESCRIPTION
COMMENTS
High Side Micropower MOSFET Driver
Dual Micropower High/Low Side Driver
Quad Protected High Side MOSFET Driver
Triple 1.8V to 6V High Side MOSFET Driver
High Speed Single/Dual N-Channel MOSFET Driver
Synchronous Rectifier Driver for Forward Converter
Internal Charge Pump, 4.5V to 48V Supply Range
Internal Charge Pump, 4.5V to 18V Supply Range
8V to 48V Supply Range, t = 200ms, t = 28ms
ON
OFF
LTC1163
LTC1693
LTC3900
LTC3901
1.8V to 48V Supply Range, t = 95ms, t = 45ms
ON OFF
CMOS Compatible Input, V Range: 4.5V to 12V
CC
Pulse Transformer Synchronization Input
Gate Drive Transformer Synchronous Input
Secondary Side Synchronous Driver for Push-Pull and
Full-Bridge Converter
LTC4440
High Speed, High Voltage, High Side Gate Driver
Wide Operating V Range: Up to 80V DC, 100V Transient
IN
44411f
LT/TP 1104 1K • PRINTED IN THE USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
●
●
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
©LINEAR TECHNOLOGY CORPORATION 2004
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