LTC4441_15 [Linear]
N-Channel MOSFET Gate Driver;
| 型号： | LTC4441_15 |
| 厂家： | 
Linear |
| 描述： | N-Channel MOSFET Gate Driver 栅 |
| 文件： | 总16页 (文件大小：203K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC4441/LTC4441-1
N-Channel MOSFET
Gate Driver
FeaTures
DescripTion
The LTC®4441/LTC4441-1 is an N-channel MOSFET gate
driver that can supply up to 6A of peak output current.
The chip is designed to operate with a supply voltage of
up to 25V and has an adjustable linear regulator for the
gate drive. The gate drive voltage can be programmed
between 5V and 8V.
n
6A Peak Output Current
n
Wide V Supply Range: 5V to 25V
IN
n
n
n
n
n
n
n
n
Adjustable Gate Drive Voltage: 5V to 8V
Logic Input Can Be Driven Below Ground
30ns Propagation Delay
Supply Independent CMOS/TTL Input Thresholds
Undervoltage Lockout
Low Shutdown Current: <12µA
Overtemperature Protection
Adjustable Blanking Time for MOSFET’s
Current Sense Signal (LTC4441)
Available in SO-8 and 10-Lead MSOP
(Exposed Pad) Packages
The LTC4441/LTC4441-1 features a logic threshold driver
input. This input can be driven below ground or above the
driver supply. A dual function control input is provided to
disable the driver or to force the chip into shutdown mode
with <12µA of supply current. Undervoltage lockout and
overtemperature protection circuits will disable the driver
output when activated. The LTC4441 also comes with an
open-drain output that provides adjustable leading edge
blanking to prevent ringing when sensing the source cur-
rent of the power MOSFETs.
n
applicaTions
n
Power Supplies
The LTC4441 is available in a thermally enhanced 10-lead
MSOPpackage.TheLTC4441-1istheSO-8versionwithout
the blanking function.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 6677210.
n
Motor/Relay Control
n
Line Drivers
Charge Pumps
n
Typical applicaTion
D1
L1
MBR10100
10µH 20A
V
52V
2A
OUT
V
IN
RISE/FALL Time vs CLOAD
6V TO 24V
+
+
22µF
25V
X7R
200
180
160
140
120
100
80
C
OUT
T
= 25°C
A
R1
330k
R5
DRV = 5V
CC
V
IN
FB
DRV
CC
C
VCC
10µF
X5R
R2
86.6k
SHUTDOWN
Q2 R6
Si7370
×2
SGND
OUT
LTC4441
EN/SHDN
RISE TIME
R3
5mΩ
R7
LTC3803
RBLANK
IN
60
PGND
SWITCHING
CONTROLLER
40
FALL TIME
BLANK
GATE
R4
20
100Ω
+
SENSE
0
0
5
10 15 20 25 30 35 40 45 50
(nF)
GND
FB
R8
C
LOAD
511k
4441 TA01b
R9
8.06k
4441 TA01a
44411fa
1
LTC4441/LTC4441-1
(Notes 1, 8)
absoluTe MaxiMuM raTings
Supply Voltage
IN
OUT Output Current ............................................ 100mA
Operating Junction Temperature Range
(Note 2).................................................. –55°C to 125°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
V ............................................................................28V
DRV .........................................................................9V
CC
Input Voltage
IN.............................................................–15V to 15V
FB, EN/SHDN ..........................–0.3V to DRV + 0.3V
CC
RBLANK, BLANK (LTC4441 Only)............ –0.3V to 5V
pin conFiguraTion
TOP VIEW
TOP VIEW
PGND
BLANK
RBLANK
SGND
IN
1
2
3
4
5
10 OUT
PGND
SGND
1
2
3
4
8
7
6
5
OUT
DRV
9
8
7
6
DRV
CC
CC
11
V
IN
FB
EN/SHDN
IN
V
IN
EN/SHDN
FB
MSE PACKAGE
10-LEAD PLASTIC MSOP
S8 PACKAGE
8-LEAD PLASTIC SO
T
= 125°C, θ = 38°C/W (Note 3)
JA
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
JMAX
T
JMAX
= 125°C, θ = 150°C/W
JA
orDer inForMaTion
LEAD FREE FINISH
LTC4441EMSE#PBF
LTC4441IMSE#PBF
LTC4441MPMSE#PBF
LTC4441ES8-1#PBF
LTC4441IS8-1#PBF
LEAD BASED FINISH
LTC4441EMSE
TAPE AND REEL
PART MARKING*
LTBJQ
PACKAGE DESCRIPTION
10-Lead Plastic MSOP
10-Lead Plastic MSOP
10-Lead Plastic MSOP
8-Lead Plastic SO
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 125°C
–55°C to 125°C
–40°C to 125°C
–40°C to 125°C
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 125°C
–55°C to 125°C
–40°C to 125°C
–40°C to 125°C
LTC4441EMSE#TRPBF
LTC4441IMSE#TRPBF
LTBJP
LTC4441MPMSE#TRPBF LTBJP
LTC4441ES8-1#TRPBF
LTC4441IS8-1#TRPBF
TAPE AND REEL
44411
4441I1
8-Lead Plastic SO
PART MARKING*
LTBJQ
PACKAGE DESCRIPTION
10-Lead Plastic MSOP
10-Lead Plastic MSOP
10-Lead Plastic MSOP
8-Lead Plastic SO
LTC4441EMSE#TR
LTC4441IMSE#TR
LTC4441MPMSE#TR
LTC4441ES8-1#TR
LTC4441IS8-1#TR
LTC4441IMSE
LTBJP
LTC4441MPMSE
LTC4441ES8-1
LTBJP
44411
LTC4441IS8-1
4441I1
8-Lead Plastic SO
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
44411fa
2
LTC4441/LTC4441-1
elecTrical characTerisTics The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = 7.5V, DRVCC = 5V, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
V
Driver Supply Programmable Range
5
8
V
DRVCC
VIN
l
l
I
V
Supply Current
EN/SHDN = 0V, IN = 0V
EN/SHDN = 5V, IN = 0V
IN
5
250
3
12
500
6
μA
μA
mA
IN
f
= 100kHz, C
= 4.7nF (Note 4)
OUT
DRV Regulator
CC
l
V
Regulator Feedback Voltage
Regulator Line Regulation
Load Regulation
V
V
= 7.5V
1.11
1.21
9
1.31
40
V
mV
%
FB
IN
ΔV
ΔV
= 7.5V to 25V
DRVCC(LINE)
DRVCC(LOAD)
DROPOUT
IN
Load = 0mA to 40mA
Load = 40mA
–0.1
370
V
V
Regulator Dropout Voltage
FB Pin UVLO Voltage
mV
Rising Edge
Falling Edge
1.09
0.97
V
V
UVLO
Input
l
l
V
V
IN Pin High Input Threshold
IN Pin Low Input Threshold
IN Pin Input Voltage Hysteresis
IN Pin Input Current
Rising Edge
2
1
2.4
1.4
2.8
1.8
V
V
IH
IL
Falling Edge
V -V
IH IL
Rising-Falling Edge
1
V
l
l
I
I
V
V
= 10V
0.01
0.01
0.45
10
1
μA
μA
V
INP
IN
EN/SHDN Pin Input Current
EN/SHDN Pin Shutdown Threshold
EN/SHDN Pin Enable Threshold
= 9V
EN/SHDN
EN/SHDN
V
V
Falling Edge
SHDN
Rising Edge
Falling Edge
1.21
1.09
V
V
EN
l
l
1.036
1.145
0.8
V
EN/SHDN Pin Enable Hysteresis
Rising-Falling Edge
0.12
V
EN(HYST)
Output
R
Driver Output Pull-Down Resistance
Driver Output Peak Pull-Up Current
Driver Output Peak Pull-Down Current
BLANK Pin Pull-Down Resistance
RBLANK Pin Voltage
I
= 100mA
0.35
6
Ω
A
ONL
OUT
I
PU
I
PD
DRV = 8V
CC
DRV = 8V
6
A
CC
R
IN = 0V, I
= 100mA LTC4441 Only
11
1.3
Ω
V
ON(BLANK)
RBLANK
BLANK
V
RBLANK = 200kΩ LTC4441 Only
Switching Timing
t
t
t
t
t
Driver Output High-Low Propagation Delay
Driver Output Low-High Propagation Delay
Driver Output Rise Time
C
C
C
C
= 4.7nF (Note 5)
= 4.7nF (Note 5)
= 4.7nF (Note 5)
= 4.7nF (Note 5)
30
36
13
8
ns
ns
ns
ns
ns
PHL
OUT
OUT
OUT
OUT
PLH
r
Driver Output Fall Time
f
Driver Output High to BLANK Pin High
RBLANK = 200kΩ (Note 6)
200
BLANK
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
guaranteed over the –40°C to 125°C operating junction temperature
range. The LTC4441MP is guaranteed and tested over the full –55°C to
125°C operating junction temperature range. Note that the maximum
ambient temperature consistent with these specifications is determined by
specific operating conditions in conjunction with board layout, the rated
package thermal impedance and other environmental factors. The junction
Note 2: The LTC4441/LTC4441-1 are tested under pulsed load conditions
such that T ≈ T . The LTC4441E/LTC4441E-1 are guaranteed to meet
J
A
temperature (T , in °C) is calculated from the ambient temperature
J
performance specifications from 0°C to 85°C operating junction
temperature. Specifications over the –40°C to 125°C operating junction
temperature range are assured by design characterization and correlation
with statistical process controls. The LTC4441I/LTC4441I-1 grade are
(T , in °C) and power dissipation (P , in Watts) according to the formula:
A
D
T = T + (P • θ )
JA
J
A
D
where θ (in °C/W) is the package thermal impedance.
JA
44411fa
3
LTC4441/LTC4441-1
elecTrical characTerisTics
Note 3: Failure to solder the Exposed Pad of the MSE package to the PC
Note 6: Blanking time is measured from 50% of OUT leading edge to 10%
board will result in a thermal resistance much higher than 38°C/W.
of BLANK with a 1kΩ pull-up at BLANK pin. LTC4441 only.
Note 4: Supply current in normal operation is dominated by the current
needed to charge and discharge the external power MOSFET gate. This
current will vary with supply voltage, switching frequency and the external
MOSFETs used.
Note 5: Rise and fall times are measured using 10% and 90% levels.
Delay times are measured from 50% of input to 20%/80% levels at driver
output.
Note 7: Guaranteed by design, not subject to test.
Note 8: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. The junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the maximum operating junction temperature
may impair device reliability.
Typical perForMance characTerisTics
IN Pin Low Threshold Voltage
vs Temperature
IN Pin High Threshold Voltage
vs Temperature
EN Pin Input Threshold Voltage
vs Temperature
1.8
1.7
1.6
1.5
1.4
1.3
1.2
1.1
1.0
2.8
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2.0
1.30
1.28
1.26
1.24
1.22
1.20
1.18
1.16
1.14
1.12
1.10
1.08
1.06
1.04
V
= 7.5V
CC
V
= 7.5V
CC
V
= 7.5V
CC
IN
IN
IN
DRV = 5V
DRV = 5V
DRV = 5V
RISING EDGE
FALLING EDGE
–25
0
50 75 100 125
–25
0
50 75 100 125
–25
0
50 75 100 125
–75 –50
25
–75 –50
25
–75 –50
25
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
4441 G01
4441 G02
4441 G03
FB Pin UVLO Threshold
vs Temperature
SD Pin Input Threshold Voltage
vs Temperature
DRVCC Voltage vs Temperature
1.20
1.16
1.12
1.08
1.04
1.00
0.96
0.92
0.88
0.84
0.80
0.75
0.70
0.65
0.60
0.55
0.50
0.45
0.40
0.35
0.30
5.50
5.45
5.40
5.35
5.30
5.25
5.20
5.15
5.10
5.05
5.00
V
= 7.5V
V
= 7.5V
IN
CC
R1 = 330k
R2 = 100k
IN
DRV = 5V
RISING EDGE
RISING EDGE
V
= 25V
IN
FALLING EDGE
V
= 7.5V
IN
FALLING EDGE
–25
0
50 75 100 125
–25
0
50 75 100 125
–25
0
50 75 100 125
–75 –50
25
–75 –50
25
–75 –50
25
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
4441 G04
4441 G05
4441 G06
44411fa
4
LTC4441/LTC4441-1
Typical perForMance characTerisTics
DRVCC Dropout Voltage
vs Temperature
1000
DRVCC Load Regulation
DRVCC Line Regulation
5.50
5.45
5.40
5.35
5.30
5.25
5.20
5.15
5.10
5.05
5.00
5.30
5.25
5.20
5.15
5.10
5.05
5.00
T
= 25°C
V
A
= 7.5V
V
= 7.5V
IN
A
IN
R1 = 330k
R2 = 100k
900
800
700
600
500
400
300
200
100
0
T
= 25°C
DRV = 5V
CC
LOAD
R1 = 330k
R2 = 100k
I
= 40mA
20 40
80 100 120 140 160 180 200
5
10
15
(V)
20
25
30
–25
0
50 75 100 125
0
60
0
–75 –50
25
I
(mA)
V
TEMPERATURE (°C)
LOAD
IN
4441 G07
4441 G08
4441 G09
OUT Pin Pull-Down Resistance
vs Temperature
tPLH, tPHL vs DRVCC
tPLH, tPHL vs Temperature
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
60
50
40
30
20
10
0
60
50
40
30
20
10
0
V
= 7.5V
CC
T
= 25°C
LOAD
V
C
= 5V
DRVCC
IN
A
DRV = 5V
C
= 4.7nF
= 4.7nF
LOAD
t
PLH
t
t
PLH
t
PHL
PHL
–25
0
50 75 100 125
5.0 5.5
6.5 7.0 7.5 8.0 8.5 9.0
–25
0
50 75 100 125
–75 –50
25
4.5
6.0
–75 –50
25
TEMPERATURE (°C)
DRV (V)
TEMPERATURE (°C)
CC
4441 G10
4441 G11
4441 G12
tPLH, tPHL vs CLOAD
RISE/FALL Time vs DRVCC
RISE/FALL Time vs Temperature
100
90
80
70
60
50
40
30
20
10
0
30
25
20
15
10
5
30
25
20
15
10
5
T
= 25°C
CC
T
= 25°C
LOAD
V
C
= 5V
DRVCC
A
A
DRV = 5V
C
= 4.7nF
= 4.7nF
LOAD
t
PLH
RISE TIME
RISE TIME
FALL TIME
t
PHL
FALL TIME
0
0
5.0 5.5
6.5 7.0 7.5 8.0 8.5 9.0
–25
0
50
75 100 125
0
5
10 15 20 25 30 35 40 45 50
(nF)
4.5
6.0
–50
25
C
DRV (V)
CC
TEMPERATURE (°C)
LOAD
4441 G13
4441 G14
4441 G15
44411fa
5
LTC4441/LTC4441-1
Typical perForMance characTerisTics
RISE/FALL Time vs CLOAD
Blanking Time vs RBLANK
Blanking Time vs Temperature
200
180
160
140
120
100
80
500
450
400
350
300
250
200
150
100
50
250
240
230
220
210
200
190
180
170
160
150
V
= 7.5V
T
= 25°C
CC
T = 25°C
A
IN
A
DRV = 5V
CC
DRV = 5V
DRV = 5V
CC
LTC4441
LTC4441
RISE TIME
60
40
FALL TIME
20
0
0
100 200
400 500 600 700
(k)
–25
0
50 75 100 125
0
5
10 15 20 25 30 35 40 45 50
(nF)
0
300
–75 –50
25
C
R
BLANK
TEMPERATURE (°C)
LOAD
4441 G16
4441 G17
4441 G18
VIN Operating Supply Current
vs Temperature
VIN Standby Supply Current
vs Temperature
500
15
14
13
12
11
10
9
8
7
6
5
EN = 5V
IN = 0V
EN = 0V
IN = 0V
450
400
350
300
250
200
150
100
50
V
= 25V
IN
V
= 25V
IN
V
= 7.5V
IN
V
= 7.5V
IN
4
3
2
1
0
0
–25
0
50 75 100 125
–25
0
50 75 100 125
–75 –50
25
–75 –50
25
TEMPERATURE (°C)
TEMPERATURE (°C)
4441 G19
4441 G20
IVIN vs fIN
IVIN vs CLOAD
50
45
40
35
30
25
20
15
10
5
60
50
40
30
20
10
0
T
= 25°C
LOAD
T
IN
= 25°C
= 100kHz
A
A
C
= 4.7nF
f
DRV = 5V
CC
DRV = 9V
CC
DRV = 9V
CC
DRV = 5V
CC
0
0
100 200 300 400 500 600 700 800 9001000
(kHz)
0
5
10 15 20 25 30 35 40 45 50
(nF)
f
C
LOAD
IN
4441 G21
4441 G22
44411fa
6
LTC4441/LTC4441-1
pin FuncTions (MSOP/SO-8)
PGND (Pin 1/Pin 1): Driver Ground. Connect the DRV
bypass capacitor directly to this pin, as close as possible
to the IC. In addition, connect the PGND and SGND pins
together close to the IC, and then connect this node to the
source of the power MOSFET (or current sense resistor)
with as short and wide a PCB trace as possible.
EN/SHDN (Pin 6/Pin 4): Enable/Shutdown Input. Pulling
this pin above 1.21V allows the driver to switch. Pulling
this pin below 1.09V forces the driver output to go low.
Pullingthispinbelow0.45VforcestheLTC4441/LTC4441-1
CC
into shutdown mode; the DRV regulator turns off and
CC
the supply current drops below 12μA.
BLANK (Pin 2/NA): Current Sense Blanking Output. Use
this pin to assert a blanking time in the power MOSFET’s
source current sense signal. The LTC4441 pulls this open-
drainoutputtoSGNDifthedriveroutputislow. Theoutput
becomes high impedance after a programmable blanking
time from the driver leading edge output. This blanking
time can be adjusted with the RBLANK pin.*
FB(Pin7/Pin5):DRV RegulatorFeedbackInput.Connect
CC
this pin to the center tap of an external resistive divider
betweenDRV andSGNDtoprogramtheDRV regulator
CC
CC
output voltage. To ensure loop stability, use the value of
330kΩ for the top resistor, R1.
V (Pin 8/Pin 6): Main Supply Input. This pin powers the
IN
DRV linear regulator. Bypass this pin to SGND with a
CC
RBLANK (Pin 3/NA): Blanking Time Adjust Input. Connect
a resistor from this pin to SGND to set the blanking time.
A small resistor value gives a shorter delay. Leave this pin
floating if the BLANK pin is not used.*
1μF ceramic, tantalum or other low ESR capacitor in close
proximity to the LTC4441/LTC4441-1.
DRV (Pin9/Pin7):LinearRegulatorOutput. Thisoutput
CC
pin powers the driver and the control circuitry. Bypass this
pin to PGND using a 10μF ceramic, low ESR (X5R or X7R)
capacitor in close proximity to the LTC4441/LTC4441-1.
SGND (Pin 4/Pin 2): Signal Ground. Ground return for the
DRV regulator and low power circuitry.
CC
IN(Pin5/Pin3):DriverLogicInput.Thisisthenoninverting
OUT (Pin 10/Pin 8): Driver Output.
driver input under normal operating conditions.
GND (Exposed Pad Pin 11/NA): Ground. The exposed pad
must be soldered to the PCB ground.
*Available only on the 10-lead version of the LTC4441.
44411fa
7
LTC4441/LTC4441-1
block DiagraM
V
IN
–
+
BIAS
1.21V
REG
M
REG
FB
UVLO
DRV
CC
1.09V
IN
Q1
INB
P1
N1
OUT
EN/SHDN
PGND
EN
THERMAL
1.21V
0.45V
SHUTDOWN
RBLANK
LEADING
EDGE DELAY
BLANK
MB
SHUTDOWN
SHDN
SGND
FOR 10-LEAD
LTC4441
ONLY
4441 BD
44411fa
8
LTC4441/LTC4441-1
applicaTions inForMaTion
Overview
V
LTC4441
IN
Power MOSFETs generally account for the majority of
powerlostinaconverter. Itisimportanttochoosenotonly
the type of MOSFET used, but also its gate drive circuitry.
TheLTC4441/LTC4441-1isdesignedtodriveanN-channel
power MOSFET with little efficiency loss. The LTC4441/
LTC4441-1 can deliver up to 6A of peak current using a
combined NPN Bipolar and MOSFET output stage. This
helps to turn the power MOSFET fully “on” or “off” with
a very brief transition region.
–
1.21V
R1
330k
REG
M
REG
FB
+
R2
ENABLE
DRIVER
UVLO
DRV
CC
1.09V
C
VCC
OUT
DRIVER
TheLTC4441/LTC4441-1includesaprogrammablelinear-
regulator to regulate the gate drive voltage. This regulator
provides the flexibility to use either standard threshold or
logic level MOSFETs.
PGND
4441 F01
Figure 1. DRVCC Regulator
DRV Regulator
The LTC4441/LTC4441-1 monitors the FB pin for DRV ’s
CC
CC
UVLO condition (UVLO in Figure 1). During power-up, the
Aninternal,P-channellowdropoutlinearregulatorprovides
driver output is held low until the DRV voltage reaches
CC
the DRV supply to power the driver and the pre-driver
CC
90% of the programmed value. Thereafter, if the DRV
CC
logic circuitry as shown in Figure 1. The regulator output
voltage drops more than 20% below the programmed
voltage can be programmed between 5V and 8V with an
value, the driver output is forced low.
external resistive divider between DRV and SGND and a
CC
center tap connected to the FB pin. The regulator needs an
Logic Input Stage
R1 value of around 330k to ensure loop stability; the value
of R2 can be varied to achieve the required DRV voltage:
The LTC4441/LTC4441-1 driver employs TTL/CMOS com-
patible input thresholds that allow a low voltage digital
signal to drive standard power MOSFETs. The LTC4441/
LTC4441-1 contains an internal voltage regulator that
CC
406k
DRVCC −1.21V
R2 =
biases the input buffer, allowing the input thresholds (V
IH
The DRV regulator can supply up to 100mA and is
CC
= 2.4V, V = 1.4V) to be independent of the programmed-
IL
short-circuit protected. The output must be bypassed
to the PGND pin in very close proximity to the IC pins
with a minimum of 10µF ceramic, low ESR (X5R or X7R)
capacitor. Good bypassing is necessary as high transient
supply currents are required by the driver. If the input
driver supply, DRV , or the input supply, V . The 1V
CC
IN
hysteresis between V and V eliminates false triggering
IH
IL
due to noise during switching transitions. However, care
should be taken to isolate this pin from any noise pickup,
especiallyinhighfrequency,highvoltageapplications.The
LTC4441/LTC4441-1inputbufferhashighinputimpedance
and draws negligible input current, simplifying the drive
circuitry required for the input. This input can withstand
voltages up to 15V above and below ground. This makes
the chip more tolerant to ringing on the input digital signal
caused by parasitic inductance.
supply voltage, V , is close to the required gate drive
IN
voltage, this regulator can be disabled by connecting the
DRV and FB pins to V .
CC
IN
44411fa
9
LTC4441/LTC4441-1
applicaTions inForMaTion
Driver Output Stage
The pre-driver that drives Q1, P1 and N1 uses an adap-
tive method to minimize cross-conduction currents. This
is done with a 5ns nonoverlapping transition time. N1 is
fullyturnedoffbeforeQ1isturnedonandvice-versausing
this5nsbuffertime. Thisminimizesanycross-conduction
currents while Q1 and N1 are switching on and off without
affecting their rise and fall times.
A simplified version of the LTC4441/LTC4441-1’s driver-
output stage is shown in Figure 2.
V
IN
LOAD
DRV
CC
LTC4441
OUT
Q1
INDUCTOR
P1
C
C
GD
POWER
MOSFET
Thermal Shutdown
R
N1
O
GS
N2
The LTC4441/LTC4441-1 has a thermal detector that dis-
N3
DRV
CC
ables the DRV regulator and pulls the driver output low
PGND
CC
whenactivated.Ifthejunctiontemperatureexceeds150°C,
the driver pull-up devices, Q1 and P1, turn off while the
pull-downdevice, N1, turnsonbrisklyfor200nstoquickly
pulltheoutputlow.Thethermalshutdowncircuithas20°C
of hysteresis.
4441 F02
Figure 2. Driver Output Stage
The pull-up device is the combination of an NPN transis-
tor, Q1, and a P-channel MOSFET, P1. This provides both
the ability to swing to rail (DRV ) and deliver large peak
CC
Enable/Shutdown Input
charging currents.
The EN/SHDN pin serves two functions. Pulling this pin
below0.45VforcestheLTC4441/LTC4441-1intoshutdown
mode. In shutdown mode, the internal circuitry and the
The pull-down device is an N-channel MOSFET, N1, with
a typical on resistance of 0.35Ω. The low impedance of
N1 provides fast turn-off of the external power MOSFET
and holds the power MOSFET’s gate low when its drain
voltageswitches.WhenthepowerMOSFET’sgateispulled
low (gate shorted to source through N1) by the LTC4441/
LTC4441-1, itsdrainvoltageispulledhighbyitsload(e.g.,
inductor or resistor). The slew rate of the drain voltage
causes current to flow to the MOSFET’s gate through its
gate-to-drain capacitance. If the MOSFET driver does not
have sufficient sink current capability (low output imped-
DRV regulator are off and the supply current drops to
CC
<12µA. If the input voltage is between 0.45V and 1.21V,
the DRV regulator and internal circuit power up but the
CC
driver output stays low. If the input goes above 1.21V, the
driver starts switching according to the input logic signal.
The driver enable comparator has a small hysteresis of
120mV.
Blanking
ance), the current through the power MOSFET’s C can
GD
In some switcher applications, a current sense resistor
is placed between the low side power MOSFET’s source
terminal and ground to sense the current in the MOSFET.
With this configuration, the switching controller must
incorporate some timing interval to blank the ringing
onthe current sense signal immediately after the MOSFET
is turned on. This ringing is caused by the parasitic induc-
tance and capacitance of the PCB trace and the MOSFET.
The duration of the ringing is thus dependent on the PCB
layout and the components used and can be longer than
the blanking interval provided by the controller.
momentarily pull the gate high and turn the MOSFET
back on.
A similar situation occurs during power-up when V is-
IN
rampingupwiththeDRV regulatoroutputstilllow. N1is
CC
off and the driver output, OUT, may momentarily pull high
through the power MOSFET’s C , turning on the power
GD
MOSFET. The N-channel MOSFETs N2 and N3,shown in
Figure 2, prevent the driver output from going high in this
situation. If DRV is low, N3 is off. If OUT is pulled high
CC
through the power MOSFET’s C , the gate of N2 gets
GD
pulled high through RO. This turns N2 on, which then
pulls OUT low. Once DRV is >1V, N3 turns on to hold
CC
the N2 gate low, thus disabling N2.
44411fa
10
LTC4441/LTC4441-1
applicaTions inForMaTion
The 10-Lead LTC4441 includes an open-drain output that
can be used to extend this blanking interval. The 8-Lead
LTC4441-1 does not have this blanking function. Figure 3
shows the BLANK pin connection. The BLANK pin is con-
IN
OUT
+
POWER
MOSFET’s
CURRENT
nected directly to the switching controller’s SENSE input.
Figure 4 shows the blanking waveforms. If the driver input
is low, the external power MOSFET is off and MB turns
POWER MOSFET’s
SOURCE TERMINAL
+
on to hold SENSE low. If the driver input goes high, the
power MOSFET turns on after the driver’s propagation
delay. MB remains on, attenuating the ringing seen by the
MB GATE
+
controller’sSENSE input. Aftertheprogrammedblanking
time, MB turns off to enable the current sense signal. MB
isdesignedtoturnonandturnoffatacontrolledslewrate.
This is to prevent the gate switching noise from coupling
into the current sense signal.
+
BLANK/SENSE
4441 F04
BLANKING TIME
V
IN
Figure 4. Blanking Waveforms
TO
SWITCHING
CONTROLLER’S
CURRENT
SENSE
LOAD
LTC4441
OUT
Power Dissipation
INDUCTOR
POWER
MOSFET
R4
To ensure proper operation and long-term reliability, the
LTC4441/LTC4441-1 must not operate beyond its maxi-
mum temperature rating. The junction temperature can
be calculated by:
DRIVER
INPUT
+
SENSE
LEADING
EDGE DELAY
R3
–
SENSE
I
= I + ƒ • Q
Q G
Q(TOT)
BLANK
P = V • (I + ƒ • Q )
D
IN
Q
G
MB
SGND
PGND
T = T + P • θ
J
A
D
JA
KEEP THIS
TRACE SHORT
RBLANK
4441 F03
where:
R7
I = LTC4441/LTC4441-1 static quiescent current,
Q
Figure 3. Blanking Circuit
typically 250µA
ƒ = Logic input switching frequency
The blanking interval can be adjusted using resistor R7
connected to the RBLANK pin. A small resistance value
gives a shorter interval with a default minimum of 75ns.
Q = Power MOSFET total gate charge at corre-
G
sponding V voltage equal to DRV
GS
CC
The value of the resistor R4 and the on-resistance of MB
(typically 11Ω) form a resistive divider attenuating the
ringing. R4needstobelargeforeffectiveblanking, butnot
so large as to cause delay to the sense signal. A resistance
value of 1k to 10k is recommended.
V = LTC4441/LTC4441-1 input supply voltage
IN
T = Junction temperature
J
T = Ambient temperature
A
θ
JA
= Junction-to-ambient thermal resistance. The
Foroptimumperformance,theLTC4441/LTC4441-1should
be placed as close as possible to the powerMOSFET and
current sense resistor, R3.
10-pin MSOP package has a thermal resistance of
= 38°C/W.
θ
JA
44411fa
11
LTC4441/LTC4441-1
applicaTions inForMaTion
The total supply current, I
, consists of the LTC4441/
PC Board Layout Checklist
Q(TOT)
LTC4441-1’s static quiescent current, I , and the current
Q
When laying out the printed circuit board, the following-
checklist should be used to ensure proper operation of
the LTC4441/LTC4441-1:
required to drive the gate of the power MOSFET, with
thelatter usually much higher than the former. The dissi-
pated power, P , includes the efficiency loss of the DRV
D
CC
A. Mount the bypass capacitors as close as possible be-
tween the DRV and PGND pins and between the V
regulator. With a programmed DRV , a high V results
CC
IN
in higher efficiency loss.
CC
IN
and SGND pins. The PCB trace loop areas should be
tightened as much as possible to reduce inductance.
As an example, consider an application with V = 12V.
IN
The switching frequency is 300kHz and the maximum
ambient temperature is 70°C. The power MOSFET chosen
is three pieces of IRFB31N20D, which has a maximum
B. Use a low inductance, low impedance ground plane to
reduce any ground drop. Remember that the LTC4441/
LTC4441-1switches6Apeakcurrentandanysignificant
ground drop will degrade signal integrity.
R
of 82mΩ (at room temperature) and a typical
DS(ON)
total gatecharge of 70nC (the temperature coefficient of
the gate charge is low).
C. Keep the PCB ground trace between the LTC4441/
LTC4441-1 ground pins (PGND and SGND) and the
external current sense resistor as short and wide as
possible.
I
= 500µA + 210nC • 300kHz = 63.5mA
Q(TOT)
P = 12V • 63.5mA = 0.762W
IC
T = 70°C + 38°C/W • 0.762W = 99°C
J
D. Planthegroundroutingcarefully. Knowwherethelarge
load switching current paths are. Maintain separate
ground return paths for the input pin and output pin
to avoid sharing small-signal ground with large load
ground return. Terminate these two ground traces only
at the GND pin of the driver (STAR network).
This demonstrates how significant the gate charge cur-
rent can be when compared to the LTC4441/LTC4441-1’s
static quiescent current. To prevent the maximum junc-
tion temperature from being exceeded, the input supply
current must be checked when switching at high V . A
IN
tradeoff between the operating frequency and the size of
thepowerMOSFETmaybenecessarytomaintainareliable
LTC4441/LTC4441-1 junction temperature. Prior to lower-
ingtheoperatingfrequency,however,besuretocheckwith
powerMOSFETmanufacturersfortheirinnovationsonlow
E. Keep the copper trace between the driver output pin
andthe load short and wide.
F. Place the small-signal components away from the high
frequencyswitchingnodes. Thesecomponentsinclude
the resistive networks connected to the FB, RBLANK
and EN/SHDN pins.
Q , low R
devices. Power MOSFET manufacturing
G
DS(ON)
technologies are continually improving, with newer and
better performing devices being introduced.
44411fa
12
LTC4441/LTC4441-1
package DescripTion
MSE Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1664 Rev G)
BOTTOM VIEW OF
EXPOSED PAD OPTION
1.88
(.074)
1.88 ± 0.102
(.074 ± .004)
0.889 ± 0.127
(.035 ± .005)
1
0.29
REF
1.68
(.066)
0.05 REF
5.23
(.206)
MIN
1.68 ± 0.102 3.20 – 3.45
(.066 ± .004) (.126 – .136)
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
DETAIL “B”
10
NO MEASUREMENT PURPOSE
0.50
(.0197)
BSC
0.305 ± 0.038
(.0120 ± .0015)
TYP
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.497 ± 0.076
(.0196 ± .003)
10 9
8
7 6
RECOMMENDED SOLDER PAD LAYOUT
REF
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0° – 6° TYP
0.254
(.010)
1
2
3
4 5
GAUGE PLANE
0.53 ± 0.152
(.021 ± .006)
0.86
(.034)
REF
1.10
(.043)
MAX
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 ± 0.0508
(.004 ± .002)
0.50
(.0197)
BSC
MSOP (MSE) 0910 REV G
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD
SHALL NOT EXCEED 0.254mm (.010") PER SIDE.
44411fa
13
LTC4441/LTC4441-1
package DescripTion
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
.189 – .197
(4.801 – 5.004)
.045 .005
NOTE 3
.050 BSC
7
5
8
6
.245
MIN
.160 .005
.150 – .157
(3.810 – 3.988)
NOTE 3
.228 – .244
(5.791 – 6.197)
.030 .005
TYP
1
3
4
2
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
(0.254 – 0.508)
× 45°
.053 – .069
(1.346 – 1.752)
.004 – .010
(0.101 – 0.254)
.008 – .010
(0.203 – 0.254)
0°– 8° TYP
.016 – .050
(0.406 – 1.270)
.050
(1.270)
BSC
.014 – .019
(0.355 – 0.483)
TYP
NOTE:
INCHES
1. DIMENSIONS IN
(MILLIMETERS)
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
SO8 0303
44411fa
14
LTC4441/LTC4441-1
revision hisTory
REV
DATE
DESCRIPTION
PAGE NUMBER
A
03/11 Added MP-grade part. Changes reflected throughout the data sheet.
1-16
44411fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC4441/LTC4441-1
relaTeD parTs
PART NUMBER DESCRIPTION
COMMENTS
LTC4440/
LTC4440-5
High Voltage, High Speed, High Side N-Channel
Gate Driver
Up to 80V Supply Voltage, 8V ≤ V ≤ 15V,
CC
2.4A Peak Pull-Up/1.5Ω Peak Pull-Down
LTC4442
LTC4449
High Speed Synchronous N-Channel MOSFET Driver
High Speed Synchronous N-Channel MOSFET Driver
Up to 38V Supply Voltage, 6V ≤ V ≤ 9.5V
CC
Up to 38V Supply Voltage, 4.5V ≤ V ≤ 6.5V
CC
LTC4444/
LTC4444-5
High Voltage Synchronous N-Channel MOSFET Driver
with Shoot Thru Protection
Up to 100V Supply Voltage, 4.5V/7.2V ≤ V ≤ 13.5V,
CC
3A Peak Pull-Up/0.55Ω Peak Pull-Down
LTC4446
LTC1154
High Voltage Synchronous N-Channel MOSFET Driver
without Shoot Thru Protection
Up to 100V Supply Voltage, 7.2V ≤ V ≤ 13.5V,
CC
3A Peak Pull-Up/0.55Ω Peak Pull-Down
High Side Micropower MOSFET Driver
Up to 18V Supply Voltage, 85µA Quiescent Current, Internal Charge Pump
44411fa
LT 0311 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
16
●
●
LINEAR TECHNOLOGY CORPORATION 2004
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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