LTC6078AHMS8#TR [Linear]
LTC6078 - Micropower Precision, Dual CMOS Rail-to-Rail Input/Output Amplifiers; Package: MSOP; Pins: 8; Temperature Range: -40°C to 125°C;
| 型号： | LTC6078AHMS8#TR |
| 厂家： | 
Linear |
| 描述： | LTC6078 - Micropower Precision, Dual CMOS Rail-to-Rail Input/Output Amplifiers; Package: MSOP; Pins: 8; Temperature Range: -40°C to 125°C 放大器 功率放大器 光电二极管 |
| 文件： | 总20页 (文件大小：327K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC6078/LTC6079
Micropower Precision,
Dual/Quad CMOS
Rail-to-Rail Input/Output Amplifiers
U
DESCRIPTIO
FEATURES
■
Maximum Offset Voltage of 25µV (25°C)
The LTC®6078/LTC6079 are dual/quad, low offset, low
noise operational amplifiers with low power consumption
and rail-to-rail input/output swing.
■
Maximum Offset Drift of 0.7µV/°C
■
Maximum Input Bias:
1pA (25°C)
50pA (≤85°C)
Input offset voltage is trimmed to less than 25µV and the
CMOS inputs draw less than 50pA of bias current. The low
offset drift, excellent CMRR, and high voltage gain make
it a good choice for precision signal conditioning.
■
Micropower: 54µA per Amp
95dB CMRR (Min)
100dB PSRR (Min)
Input Noise Voltage Density: 16nV/√Hz
Rail-to-Rail Inputs and Outputs
2.7V to 5.5V Operation Voltage
LTC6078 Available in 8-Lead MSOP and 10-Lead DFN
Packages; LTC6079 Available in 16-Lead SSOP and
DFN Packages
■
■
■
■
■
■
Eachamplifierdrawsonly54µAcurrentona3Vsupply.The
micropower,rail-to-railoperationoftheLTC6078/LTC6079
is well suited for portable instruments and single supply
applications.
The LTC6078/LTC6079 are specified on power supply
voltages of 3V and 5V from –40 to 125°C. The dual am-
plifier LTC6078 is available in 8-lead MSOP and 10-lead
DFN packages. The quad amplifier LTC6079 is available
in 16-lead SSOP and DFN packages.
U
APPLICATIO S
■
Photodiode Amplifier
High Impedance Sensor Amplifier
Microvolt Accuracy Threshold Detection
Instrumentation Amplifiers
Battery Powered Applications
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners. Patent Pending.
■
■
■
■
U
TYPICAL APPLICATIO
Thermocouple Signal Conditioner
V
Distribution
OS
14
12
10
8
LTC6078MS8
5V
SMT
1/4W
150k
V
V
= 3V
S
CM
NORMALLY
FLOATING
= 0.5V
T
= 25°C
A
+
1/2
LTC6078
0.1µF
OUT = 10mV/°C
0°C TO 500°C 0.5°C
OMEGA
5TC-TT-K-30-36
THERMOCOUPLE
–
SMT
1/4W
150k
5V
6
2.49M
1k
K
40.6µV/°C
4
10k
LT1025
100pF
2
5.6pF
60789 TA01a
0
AMPLIFIER PROTECTED TO 190V, ACCIDENTAL CONTACT
–11 –9 –7 –5 –3 –1
1
3
5
7
9
V
(µV)
OS
60789 TA01b
60789fa
1
LTC6078/LTC6079
W W U W
ABSOLUTE AXI U RATI GS
(Note 1)
+
–
Total Supply Voltage (V to V )...................................6V
Specified Temperature Range (Note 4)
–
+
Input Voltage...................................................... V to V
LTC6078C, LTC6079C.............................. 0°C to 70°C
LTC6078I, LTC6079I ............................ –40°C to 85°C
LTC6078H, LTC6079H........................ –40°C to 125°C
Junction Temperature
DFN Packages................................................... 125°C
All Other Packages............................................ 150°C
Storage Temperature Range
Output Short Circuit Duration (Note 2) ............ Indefinite
Operating Temperature Range (Note 3)
LTC6078C, LTC6079C.......................... –40°C to 85°C
LTC6078I, LTC6079I ............................ –40°C to 85°C
LTC6078H, LTC6079H........................ –40°C to 125°C
(Not Available in DFN Package)
DFN Packages.................................... –65°C to 125°C
All Other Packages............................. –65°C to 150°C
Lead Temperature (Soldering, 10 Sec).................. 300°C
U
W
U
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
DD PART
MARKING*
TOP VIEW
LTC6078CDD
LTC6078IDD
LBBB
LBBB
+
OUTA
–INA
+INA
1
2
3
4
5
10
9
V
TOP VIEW
+
OUTB
–INB
+INB
SHDN_B
OUTA 1
–INA 2
8 V
7 OUTB
6
5
A
ORDER PART
NUMBER
MS8 PART
MARKING*
8
A
B
+INA 3
–INB
+INB
–
B
V
7
–
V
4
SHDN_A
6
MS8 PACKAGE
8-LEAD PLASTIC MSOP
LTC6078ACMS8
LTC6078CMS8
LTC6078AIMS8
LTC6078IMS8
LTC6078AHMS8
LTC6078HMS8
LTAJZ
LTAJZ
LTAJZ
LTAJZ
LTAJZ
LTAJZ
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
T
= 150°C, θ = 200°C/W
JMAX
JA
T
= 125°C, θ = 43°C/W
JMAX
JA
–
UNDERSIDE METAL CONNECTED TO V
TOP VIEW
ORDER PART
NUMBER
DHC PART
MARKING*
TOP VIEW
OUTA
–INA
+INA
1
2
3
4
5
6
7
8
16 OUTD
15 –IND
OUTA
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
OUTD
A
B
D
C
–INA
+INA
–IND
+IND
A
B
D
C
LTC6079CDHC
LTC6079IDHC
6079
6079
14 +IND
–
+
V
13 V
+
–
V
V
+INB
–INB
OUTB
NC
12 +INC
11 –INC
10 OUTC
ORDER PART
NUMBER
GN PART
MARKING
+INB
–INB
OUTB
NC
+INC
–INC
OUTC
NC
LTC6079CGN
LTC6079IGN
LTC6079HGN
6079
6079I
6079H
9
NC
DHC PACKAGE
16-LEAD (5mm × 3mm) PLASTIC DFN
= 125°C, θ = 43°C/W
GN PACKAGE
16-LEAD PLASTIC SSOP
= 150°C, θ = 110°C/W
T
JMAX
JA
T
JMAX
JA
–
UNDERSIDE METAL CONNECTED TO V
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
*The temperature grades and parametric grades are identified by a label on the shipping container.
60789fa
2
LTC6078/LTC6079
The
●
denotes the specifications which apply over the full operating
ELECTRICAL CHARACTERISTICS
+
–
temperature range, otherwise specifications are at T = 25°C. Test conditions are V = 3V, V = 0V, V = 0.5V unless otherwise noted.
A
CM
SYMBOL PARAMETER
CONDITIONS
C, I SUFFIXES
H SUFFIX
TYP
UNITS
MIN
TYP
MAX
MIN
MAX
V
Offset Voltage (Note 5)
LTC6078MS8, LTC6078AMS8, LTC6079GN
OS
V
CM
V
CM
V
CM
V
CM
V
CM
V
CM
V
CM
= 0.5V, 2.5V
= 0.5V, 2.5V
= 0.5V
7
25
30
7
25
μV
μV
μV
μV
μV
μV
μV
LTC6078DD, LTC6079DHC
LTC6078AMS8
LTC6078MS8
7
●
●
●
●
●
20
25
30
30
35
70
25
30
35
95
135
165
= 0.5V
97
LTC6079GN
= 0.5V
115
120
150
LTC6078DD
LTC6079DHC
= 0.5V
= 0.5V
●
●
●
●
ΔV ⁄ΔT Input Offset Voltage Drift
LTC6078AMS8
LTC6078MS8
LTC6078DD, LTC6079GN
LTC6079DHC
+
0.2
0.7
1.1
1.4
1.8
0.2
0.3
0.7
1.1
1.4
μV/°C
μV/°C
μV/°C
μV/°C
OS
(Note 5)
0.3
0.3
I
I
Input Bias Current
(Note 6)
V
V
= V /2
0.2
10
1
50
0.2
150
1
350
pA
pA
B
CM
CM
+
●
●
= V /2
+
Input Offset Current
(Note 6)
V
V
= V /2
0.1
0.5
0.1
10
pA
pA
OS
CM
CM
+
= V /2
25
100
e
n
Input Noise Voltage
0.1Hz to 10Hz
1
1
µV
P-P
Input Noise Voltage Density
f = 1kHz
f = 10kHz
18
16
18
16
nV/√Hz
nV/√Hz
i
Input Noise Current Density
(Note 8)
0.56
0.56
fA/√Hz
n
–
+
–
+
●
Input Common Mode Range
Differential Input Capacitance
V
V
V
V
V
pF
pF
C
C
10
18
10
18
DIFF
Common Mode Input
Capacitance
CM
CMRR
Common Mode Rejection
Ratio
All Packages
V
CM
V
CM
V
CM
V
CM
V
CM
V
CM
V
CM
V
CM
V
CM
= 0V to 3V
= 0V to 3V
= 0V to 1.7V
= 0V to 3V
= 0V to 1.7V
= 0V to 3V
= 0V to 1.7V
= 0V to 3V
= 0V to 1.7V
95
87
91
85
89
84
88
83
87
110
105
103
102
102
102
102
100
102
95
87
91
85
89
84
88
110
103
103
100
102
100
102
dB
dB
dB
dB
dB
dB
dB
dB
dB
●
●
●
●
●
●
●
●
LTC6078AMS8
LTC6078AMS8
LTC6078MS8
LTC6078MS8
LTC6079GN
LTC6079GN
LTC6078DD, LTC6079DHC
LTC6078DD, LTC6079DHC
PSRR
Power Supply Rejection Ratio V = 2.7V to 5.5V
100
97
120
100
97
120
dB
dB
S
●
V
OUT
Output Voltage, High
No Load
SOURCE
SOURCE
1
1
mV
mV
mV
+
●
●
(Referred to V )
I
I
= 0.2mA
= 2mA
35
350
15
40
400
15
150
150
Output Voltage, Low
No Load
1
1
mV
mV
mV
–
●
●
(Referred to V )
I
I
= 0.2mA
10
30
300
10
35
350
SINK
SINK
= 2mA
= 10k, 0.5V ≤ V ≤ 2.5V
OUT
100
100
●
A
VOL
Large-Signal Voltage Gain
R
LOAD
115
130
110
125
dB
●
●
I
Output Short-Circuit Current Source
Sink
5
7
10
14
4
6
10
14
mA
mA
SC
SR
Slew Rate
A = 1
0.05
750
0.05
750
V/μs
V
GBW
Gain-Bandwidth Product
R = 100k
L
420
360
420
320
kHz
kHz
●
(f
TEST
= 10kHz)
Φ
Phase Margin
R = 10k, C = 200pF
66
24
66
24
Deg
μs
0
L
L
t
Settling Time 0.1%
A = 1, 1V Step
V
S
60789fa
3
LTC6078/LTC6079
ELECTRICAL CHARACTERISTICS The
●
denotes the specifications which apply over the full operating
+
–
temperature range, otherwise specifications are at T = 25°C. Test conditions are V = 3V, V = 0V, V = 0.5V unless otherwise noted.
A
CM
SYMBOL PARAMETER
CONDITIONS
C, I SUFFIXES
H SUFFIX
TYP
UNITS
MIN
TYP
MAX
MIN
MAX
I
Supply Current
(per Amplifier)
No Load
54
72
78
54
72
80
μA
μA
S
●
●
Shutdown Current
(per Amplifier)
Shutdown, V
≤ 0.8V, LTC6078DD
0.3
1
μA
SHDN
●
V
S
Supply Voltage Range
Channel Separation
Shutdown Logic
Guaranteed by the PSRR Test
f = 10kHz, R = 10k
2.7
2
5.5
2.7
2
5.5
0.8
V
–110
–110
dB
s
L
●
●
SHDN High, LTC6078DD
SHDN Low, LTC6078DD
V
V
0.8
t
t
Turn on Time
V
SHDN
V
SHDN
V
SHDN
= 0.8V to 2V, LTC6078DD
= 2V to 0.8V, LTC6078DD
= 0V, LTC6078DD
50
2
50
2
µs
µs
μA
ON
Turn off Time
OFF
Leakage of SHDN Pin
0.6
The
●
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25°C. Test
A
+
–
conditions are V = 5V, V = 0V, V = 0.5V unless otherwise noted.
CM
SYMBOL PARAMETER
CONDITIONS
C, I SUFFIXES
H SUFFIX
TYP
UNITS
MIN
TYP
MAX
MIN
MAX
V
Offset Voltage
LTC6078MS8, LTC6078AMS8, LTC6079GN
OS
V
CM
V
CM
V
CM
V
CM
V
CM
V
CM
V
CM
= 0.5V
= 0.5V
= 0.5V
= 0.5V
= 0.5V
= 0.5V
= 0.5V
10
10
20
25
30
30
35
30
35
10
30
μV
μV
μV
μV
μV
μV
μV
LTC6078DD, LTC6079DHC
LTC6078AMS8
LTC6078MS8
●
●
●
●
●
75
25
30
35
100
140
170
102
120
125
155
LTC6079GN
LTC6078DD
LTC6079DHC
●
●
●
●
ΔV ⁄ΔT Input Offset Voltage Drift
LTC6078AMS8
0.2
0.7
1.1
1.4
1.8
0.2
0.3
0.7
1.1
1.4
μV/°C
μV/°C
μV/°C
μV/°C
OS
(Note 7)
LTC6078MS8
LTC6078DD, LTC6079GN
LTC6079DHC
0.3
0.3
+
I
I
Input Bias Current
Input Offset Current
V
V
= V /2
0.2
10
1
0.2
1
pA
pA
B
CM
CM
+
●
●
= V /2
50
150
350
+
V
CM
V
CM
= V /2
0.1
0.5
0.1
10
pA
pA
OS
+
= V /2
25
100
e
n
Input Noise Voltage
0.1Hz to 10Hz
1
1
µV
P-P
Input Noise Voltage Density
f = 1kHz
f = 10kHz
18
16
18
16
nV/√Hz
nV/√Hz
i
n
Input Noise Current Density
(Note 8)
0.56
0.56
fA/√Hz
–
+
–
+
●
Input Common Mode Range
Differential Input Capacitance
V
V
V
V
V
pF
pF
C
C
10
18
10
18
DIFF
Common Mode Input
Capacitance
CM
60789fa
4
LTC6078/LTC6079
ELECTRICAL CHARACTERISTICS The
●
denotes the specifications which apply over the full operating
+
–
temperature range, otherwise specifications are at T = 25°C. Test conditions are V = 5V, V = 0V, V = 0.5V unless otherwise noted.
A
CM
SYMBOL PARAMETER
CONDITIONS
C, I SUFFIXES
H SUFFIX
TYP
UNITS
MIN
TYP
MAX
MIN
MAX
CMRR
Common Mode Rejection
Ratio
All Packages
LTC6078AMS8
LTC6078AMS8
LTC6078MS8
LTC6078MS8
LTC6079GN
V
CM
V
CM
V
CM
V
CM
V
CM
V
CM
V
CM
V
CM
V
CM
= 0V to 5V
= 0V to 5V
= 0V to 3.7V
= 0V to 5V
= 0V to 3.7V
= 0V to 5V
= 0V to 3.7V
= 0V to 5V
= 0V to 3.7V
91
90
94
88
90
86
90
86
90
105
105
105
100
105
100
105
100
105
91
90
94
88
90
86
90
105
105
105
100
105
100
105
dB
dB
dB
dB
dB
dB
dB
dB
dB
●
●
●
●
●
●
●
●
LTC6079GN
LTC6078DD, LTC6079DHC
LTC6078DD, LTC6079DHC
PSRR
Power Supply Rejection Ratio V = 2.7V to 5.5V
100
97
120
120
dB
dB
S
●
97
V
Output Voltage, High
No Load
2
2
mV
mV
mV
OUT
+
(Referred to V )
I
= 0.5mA
= 5mA
50
500
20
55
550
20
●
●
SOURCE
I
200
200
SOURCE
Output Voltage, Low
No Load
1
1
mV
mV
mV
–
(Referred to V )
I
I
= 0.5mA
15
40
400
15
45
450
●
●
SINK
SINK
= 5mA
= 10k, 0.5V ≤ V ≤ 4.5V
OUT
150
150
●
A
VOL
Large-Signal Voltage Gain
R
LOAD
115
130
110
125
dB
●
●
I
Output Short-Circuit Current Source
Sink
14
14
25
25
12
12
25
25
mA
mA
SC
SR
Slew Rate
A = 1
0.05
750
0.05
750
V/μs
V
GBW
Gain-Bandwidth Product
R = 100k
L
420
360
420
320
kHz
kHz
●
(f
TEST
= 10kHz)
Φ
Phase Margin
R = 10k, C = 200pF
66
24
55
66
24
55
Deg
μs
0
L
L
t
I
Settling Time 0.1%
A = 1, 1V Step
V
S
Supply Current
(per Amplifier)
No Load
74
82
74
84
μA
μA
S
●
●
Shutdown Current
(per Amplifier)
Shutdown, V
≤ 1.2V, LTC6078DD
1.5
5
1.5
5
μA
SHDN
●
V
S
Supply Voltage Range
Channel Separation
Shutdown Logic
Guaranteed by the PSRR Test
f = 10kHz, R = 10k
2.7
3.5
5.5
2.7
3.5
5.5
V
–110
–110
dB
s
L
●
●
SHDN High, LTC6078DD
SHDN Low, LTC6078DD
V
V
1.2
1.2
t
t
Turn on Time
V
SHDN
V
SHDN
V
SHDN
= 1.2V to 3.5V, LTC6078DD
= 1.2V to 3.5V, LTC6078DD
= 0V, LTC6078DD
50
2
50
2
µs
µs
μA
ON
Turn off Time
OFF
Leakage of SHDN Pin
0.6
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: A heat sink may be required to keep the junction temperature
below the absolute maximum. This depends on the power supply voltage
and how many amplifiers are shorted.
performance from 0°C to 70°C. The LTC6078C/LTC6079C are designed,
characterized and expected to meet specified performance from –40°C
to 85°C but are not tested or QA sampled at these temperatures. The
LTC6078I/LTC6079I are guaranteed to meet specified performance from
–40°C to 85°C. The LTC6078H/LTC6079H are guaranteed to meet specified
performance from –40°C to 125°C.
Note 5: V and V drift are 100% tested at 25°C and 125°C.
OS
OS
Note 3: The LTC6078C/LTC6079C and LTC6078I/LTC6079I are guaranteed
functional over the operating temperature range of –40°C to 85°C. The
LTC6078H/LTC6079H are guaranteed functional over the operating
temperature range of –40°C to 125°C.
Note 6: I and I are guaranteed by the V = 5V test.
B OS S
Note 7: V drift is guaranteed by the V = 3V test.
OS
S
–19
Note 8: Current noise is calculated from i = √2qI , where q = 1.6 • 10
n
B
coulomb.
Note 4: The LTC6078C/LTC6079C are guaranteed to meet specified
60789fa
5
LTC6078/LTC6079
U W
TYPICAL PERFOR A CE CHARACTERISTICS
V
vs V
V
vs V
CM
V
Distribution
OS
CM
OS
OS
14
12
10
8
40
30
100
80
LTC6078MS8
V
T
= 3V
= 25°C
V
T
= 5V
= 25°C
S
A
S
A
V
V
T
= 3V
S
CM
A
= 0.5V
REPRESENTATIVE PARTS
REPRESENTATIVE PARTS
60
= 25°C
20
40
10
20
0
0
6
–20
–40
–60
–80
–100
–10
–20
–30
–40
4
2
0
–11 –9 –7 –5 –3 –1
1
(µV)
3
5
7
9
0.5
1.0
2.0
0.5 1.0
2.0
4.0
4.5 5.0
3.5
0
2.5
3.0
0
2.5 3.0
1.5
(V)
1.5
V
OS
V
V
(V)
CM
CM
60789 G01
60789 G02
60789 G03
V
Drift Distribution
Input Bias vs Temperature
Input Bias vs V
CM
OS
50
45
40
35
30
25
20
15
10
5
180
160
140
120
100
80
30
24
LTC6078MS8
V
V
= 5V
V
= 5V
S
S
V
V
T
= 3V
= 0.5V
= –40°C TO 125°C
= 2.5V
CM
S
CM
A
18
12
6
T
= 70°C
–0
A
–6
60
–12
–18
–24
–30
T
= 85°C
A
40
20
0
0
–0.8 –0.6 –0.4 –0.2
0
0.2 0.4 0.6 0.8
0
25
50
75
100
125
0
1
2
3
4
5
µV/°C
TEMPERATURE (°C)
V
(V)
CM
60789 G04
60789 G06
60789 G05
0.1Hz to 10Hz Output Voltage
Noise
Input Bias vs V
Voltage Noise Spectrum
CM
400
300
90
80
70
60
50
40
30
20
10
0
V
= 5V
= 125°C
V
V
= 5V
S
S
A
T
= 0.5V
CM
200
100
–0
–100
–200
–300
–400
V
V
= 3V
CM
S
= 0.5V
V
V
= 5V
S
= 0.5V
CM
0
1
2
3
4
5
1
10
100
1k
10k
100k
TIME (5s/DIV)
FREQUENCY (Hz)
60789 G09
V
(V)
CM
60789 G07
60789 G08
60789fa
6
LTC6078/LTC6079
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Output Voltage Swing vs
Load Current
Supply Current vs Supply Voltage
Supply Current vs Temperature
+V
60
50
40
30
20
10
0
65
S
PER AMPLIFIER
V
= 0.5V
CM
+V –0.5
S
SOURCE
60
55
50
45
40
+V –1.0
V
V
= 5V
= 3V
S
S
S
+V –1.5
S
+V –2.0
S
V
V
= 5V
CM
S
= 0.7V
–V +2.0
S
–V +1.5
S
T
T
T
= 125°C
–V +1.0
S
A
A
A
PER AMPLIFIER
= 25°C
SINK
–V +0.5
S
V
A
= 0.5V
= –55°C
CM
T
= 25°C
–V
S
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
SUPPLY VOLTAGE (V)
–40 –25 –10
5
20 35 50 65 80 95 110 125
0.01
0.1
1
10
100
LOAD CURRENT (mA)
TEMPERATURE (°C)
60789 G10
60789 G11
60789 G12
Open Loop Gain vs Frequency
CMRR vs Frequency
PSRR vs Frequency
100
80
100
120
100
80
140
120
100
80
R
R
= 10k
= 100k
V
V
A
R
= 5V
V
V
= 5V
CM
T = 25°C
A
L
L
S
S
= 0.5V
= 0.5V
CM
80
60
40
20
0
T
= 25°C
= 1k
L
60
PHASE
GAIN
40
60
20
40
60
0
20
40
V
V
C
= 5V
S
= 0.5V
CM
–20
–40
–20
0
20
= 200pF
L
T
= 25°C
A
–40
10M
–20
0
1k
10k
100k
FREQUENCY (Hz)
1M
100
1k
10k
100k
1M
10M
1
10 100 1k 10k 100k 1M 10M
FREQUENCY (Hz)
FREQUENCY (Hz)
60789 G13
60789 G14
60789 G15
Output Impedance vs Frequency
Small Signal Transient
Large Signal Transient
10000
1000
100
10
V
V
A
= 5V
CM
= 25°C
S
= 0.5V
T
A
= 100
V
A
= 10
V
20mV/DIV
1V/DIV
A
= 1
V
1
60789 G17
60789 G18
0.1
20µs/DIV
200µs/DIV
V
R
C
= 5V
V
R
C
= 5V
S
L
L
S
L
L
= 10k
= 10k
0.01
= 100pF
= 100pF
100
1k
10k
FREQUENCY (Hz)
100k
1M
60789 G16
60789fa
7
LTC6078/LTC6079
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Disabled Output Impedence vs
Frequency
Overshoot vs C
Channel Separation vs Frequency
L
50
45
40
35
30
25
20
15
10
5
–100
–105
–110
–115
–120
–125
–130
–135
1000
100
10
V
V
= 5V
CM
= 10k
V
V
T
= 5V
CM
= 25°C
V
V
T
= 5V
S
S
S
= 0.5V
= 0.5V
= 0.5V
CM
R
L
= 25°C
A
A
A
= 1
V
A
= 1
V
1
A
= 10
V
0.1
0.01
0
100
1k
10k
100k
1M
10M
10
100
CAPACITIVE LOAD (pF)
1000
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
60789 G19
60789 G20
60789 G21
U
U
U
PI FU CTIO S
OUT: Amplifier Output
–IN: Inverting Input
SHDN_A:ShutdownPinofAmplifierA,activelowandonly
valid for LTC6078DD. An internal current source pulls the
+
pin to V when floating.
+IN: Noninverting Input
V+: Positive Supply
SHDN_B:ShutdownPinofAmplifierB,activelowandonly
valid for LTC6078DD. An internal current source pulls the
+
pin to V when floating.
V–: Negative Supply
NC: Not internally connected.
–
Exposed Pad: Connected to V .
60789fa
8
LTC6078/LTC6079
U
W U U
APPLICATIO S I FOR ATIO
Preserving Input Precision
Capacitive Load
Preserving input accuracy of the LTC6078/LTC6079 re-
quires that the application circuit and PC board layout do
not introduce errors comparable or greater than the 10µV
typical offset of the amplifiers. Temperature differentials
across the input connections can generate thermocouple
voltages of 10’s of microvolts so the connections to the
input leads should be short, close together and away from
heatdissipatingcomponents. Aircurrentacrosstheboard
can also generate temperature differentials.
LTC6078/LTC6079 can drive capactive load up to 200pF in
unity gain. The capacitive load driving capability increases
as the amplifier is used in higher gain configurations. A
small series resistance between the ouput and the load
further increases the amount of capacitance the amplifier
can drive.
SHDN Pins
Pins5and6areusedforpowershutdownontheLTC6078
in the DD package. If they are floating, internal current
sources pull Pins 5 and 6 to V+ and the amplifiers operate
normally. Inshutdown, theamplifieroutputishighimped-
ance, and each amplifier draws less than 2µA current.
The extremely low input bias currents (0.2pA typical) al-
low high accuracy to be maintained with high impedance
sources and feedback resistors. Leakage currents on the
PC board can be higher than the input bias current. For
example, 10GΩ of leakage between a 5V supply lead and
an input lead will generate 500pA! Surround the input
leads with a guard ring driven to the same potential as the
input common mode to avoid excessive leakage in high
impedance applications.
Whenthechipisturnedon,thesupplycurrentperamplifier
is about 35µA larger than its normal values for 50µs.
Rail-to-Rail Input
TheinputstageofLTC6078/LTC6079combinesbothPMOS
and NMOS differential pairs, extending its input common
mode voltage range to both positive and negative supply
voltages. At high input common mode range, the NMOS
pair is on. At low common mode range, the PMOS pair is
on. The transition happens when the common voltage is
between 1.3V and 0.9V below the positive supply.
Input Clamps
Large differential voltages across the inputs over very
long time periods can impact the precisely trimmed input
offset voltage of the LTC6078/LTC6079. As an example,
a 2V differential voltage between the inputs over a period
of 100 hours can shift the input offset voltage by tens
of microvolts. If the amplifier is to be subjected to large
differential input voltages, adding back-to-back diodes
between the two inputs will minimize this shift and retain
the DC precision. If necessary, current-limiting series
resistors can be added in front of the diodes, as shown
in Figure 1. These diodes are not necessary for normal
closed loop applications.
Thermal Hysteresis
Figure2showstheinputoffsethysteresisofLTC6078MS8
for3thermalcyclesfrom–45°Cto90°C. Thetypicaloffset
shift after the 3 cycles is only 1µV.
50
V
V
= 3V
CM
S
= 0.5V
45
40
35
30
25
20
15
10
5
1ST CYCLE
2ND CYCLE
3RD CYCLE
500Ω
+
500Ω
–
60789 F01
Figure 1. Op Amp with Input Voltage Clamp
0
–5 –4 –3 –2 –1
0
1
2
3
4
5
6
V
CHANGE FROM INITIAL VALUE
OS
60789 F02
Figure 2. V Thermal Hysteresis of LTC6078MS8
OS
60789fa
9
LTC6078/LTC6079
U
W U U
APPLICATIO S I FOR ATIO
PC Board Layout
the fourth side. Figure 3 shows the layout of a LTC6078DD
with slots at three sides.
Mechanical stress on a PC board and soldering-induced
stress can cause the V and V drift to shift. The DD
OS
OS
and DHC packages are more sensitive to stress. A simple
way to reduce the stress-related shifts is to mount the IC
near the short edge of the PC board, or in a corner. The
board edge acts as a stress boundary, or a region where
the flexure of the board is minimum. The package should
always be mounted so that the leads absorb the stress and
not the package. The package is generally aligned with the
leads paralled to the long side of the PC board.
LONG DIMENSION
SLOTS
ThemosteffectivetechniquetorelievethePCboardstress
is to cut slots in the board around the op amp. These slots
can be cut on three sides of the IC and the leads can exit on
60789 F03
Figure 3. Vertical Orientation of LTC6078DD with Slots
W
W
SI PLIFIED SCHE ATIC
+
V
R1
R2
M10
M11
M8
C1
I1
1µA
+
I2
V
A1
–
+
V
V
BIAS
M5
V
D4
+IN
D7
+
V
D3
OUTPUT
CONTROL
M6 M7
M1 M2
OUT
D6
–
D8
V
+
V
–IN
–
V
D5
D2
A2
BIAS
GENERATION
SHDN
–
V
C2
D1
NOTE: SHDN IS ONLY AVAILABLE
IN THE DFN10 PACKAGE
M3
M4
M9
–
V
R3
R4
–
60789 SS
V
Simplified Schematic of the Amplifier
60789fa
10
LTC6078/LTC6079
U
TYPICAL APPLICATIO S
2.7V High Side Current Sense
V
DD
V
DD
R1
+
R
S
1/2
2N7002
LTC6078
–
V
OUT
I
L
R2
LOAD
R2
R1
R2
R1
V
= I
•
• R – V
S
•
OS
OUT
L
0V ≤ V
≤ V – V
DD
60789 TA02
OUT
GS, MOSFET
Low Average Power IR LED Driver
V
DD
V
DD
ON/OFF
HSDL-4220
2N7002
909k
5V
0V
+
1/2
LTC6078
100k
–
SHDN
49.9Ω
VARYING ON DUTY CYCLE REDUCES
AVERAGE POWER CONSUMPTION
60789 TA03
Accelerometer Signal Conditioner
2.5V
COLUMBIA RESEARCH LABS
3021 ACCELERATOR
+
1/2
LTC6078
V
OUT
–
1M
–2.5V
1000pF
V
= 60mV/g
OUT
WHERE g = EARTH'S GRAVITATIONAL CONSTANT
60789 TA04
Photodiode Amplifier
2.5V
1M
–
3.8pF
1/2
TEMD1000
IR PHOTODIODE
V
OUT
LTC6078
+
–2.5V
AT 870nm (IR),
OUT
V
= 600mV/µW RECEIVED POWER
60789 TA05
60789fa
11
LTC6078/LTC6079
U
TYPICAL APPLICATIO S
6 Decade Current Log Amplifier
–
C
+
100Ω
+
–
B
100Ω
33µF
Q1
Q2
100k
133k
V
DD
–
1000pF
A
–
1.58k
D
+
PRECISION
+
RESISTOR PT146
1k
I
IN
V
OUT
LT6650
V
CC
+3500ppm/°C
IN
OUT
GND
60789 TA07
10nA ≤ I ≤ 10mA
IN
1µF
1µF
Q1, Q2: DIODES INC. DMMT3906W
A TO D: LTC6079
V
≈ 150mV • log (I ) + 1.23V, I IN AMPS
OUT
IN IN
Humidity Sensor Signal Conditioner
V
V
DD
5V
SUP
IN
OUT
5.2V TO 20V
LT1761-5
1µF
0.01µF
1µF
SHDN BYP
V
V
DD
DD
49.9k
100k
V
BIAS
49.9k
100k
M1
GAIN TRIM
1k
BAT54S
75pF
H
V
DD
34.8k
1000pF
100k
–
+
LTC6906
OUT
499k
1k
V
–
B
–
DD
V
100k
OUT
0.1µF
GRD GND
0V TO 5V
A
C
0% TO 100% RH
0.1µF
V
+
+
BIAS
V
SET DIV
DD
V
DD
10k 47.5k
1M
A TO C: LTC6079
60789 TA08
H: GE PARAMETRICS G-CAP 2 HUMIDITY SENSOR
148pF TO 178pF, 0% TO 90% RH
M1: VN2222L
100k
OFFSET TRIM
60789fa
12
LTC6078/LTC6079
U
TYPICAL APPLICATIO S
LDO Load Balancing
V
BALLAST RESISTANCE:
IN
IN
OUT
1.8V TO 20V
IDENTICAL LENGTH
THERMALLY MATED
WIRE OR PCB TRACE
+
LT1763
0.01µF
10µF
10µF
SHDN BYP
FB
R1
2k
R2
2k
⎛
1.22V⎜1 +
⎝
⎞
R1
V
⎟
IN
OUT
LT1763
OUT =
⎠
R2
0.01µF
10µF
SHDN BYP
FB
100Ω
I
LOAD
LOAD
2k
2k
1k
A
0.1µF
–
+
10k
IN
OUT
LT1763
0.01µF
10µF
SHDN BYP
FB
100Ω
2k
2k
0 ≤ I
≤ 1.5A
OUT
1k
LOAD
0.1µF
1.22V ≤ V
≤ V
DD
V
DD
LDO LOADS MATCH TO WITHIN
1mA WITH 10mΩ OF BALLAST
RESISTANCE (2 INCHES OF AWG
28 GAUGE STRANDED WIRE)
A, B: LTC6078
–
+
B
10k
60789 TA09
pH Probe Amplifier
PRECISION
RESISTOR PT146
1k
+3500ppm/°C
+
–
1k
A
pH
V
CC
–
+
57.6k
V
OUT
B
LT1634
1.25V
1000pF
SENSOR: SENSOREX S200C pH PROBE
LTC6078 INPUT IMPEDANCE ≈ 1TΩ OR GREATER
= 1.25V + 59.2mV • (pH – 7)
60789 TA10
V
OUT
A, B: LTC6078
60789fa
13
LTC6078/LTC6079
U
TYPICAL APPLICATIO S
Thermistor Amplifier with Overtemperature Alarm
V
DD
–
+
1k
T
D
OV
LT1634
1.25V
29.4k
71.5k
0.01µF
200k
+
B
+
–
3200Ω
V
C
–
OUT
+
YSI #44201
THERMOLINEAR
NETWORK
A
6250Ω
100k
100k
–
100k
60789 TA12
143k
20k
178k
50k
H
B
OFFSET TRIM
GAIN TRIM
A TO D: LTC6079, V = 2.7V TO 5.5V, V = GND
DD
SS
V
OV
= 0 → 1V FOR 0°C TO 100°C, LINEAR
OUT
T
→ HIGH WHEN T ≥ 90°C
Precision Sample-and-Hold
LTC6943
V
DD
6
7
9
1
–
–
LTC6078
A
LTC6078
V
OUT
B
5
4
V
+
+
IN
0.1µF
I
< 200µA
SUPPLY
14
VOLTAGE DROOP = 130nV/ms TYP
SLEW RATE = 0.05V/ms TYP
ACQ TIME = 84µs TYP TO 0.1%
60789 TA13
S/H
60789fa
14
LTC6078/LTC6079
U
TYPICAL APPLICATIO S
Precision Voltage-Controlled Current Source
V
DD
+
V
IN
1/2
LTC6078
V
IN
–
I
I
=
OUT
R
SET
< 0.1% AT I
= 1µA
ERROR
OUT
0.68µF
1k
6
7
9
R
SET
1µF
1µF
1k
10
I
OUT
11 12
15
LTC6943
14
0.001µF
60789 TA14
60Hz Notch
R2
2.5V
–
R1
1/2
V
OUT
LTC6078
10M
10M
+
V
IN
540pF
270pF
–2.5V
270pF
R2
R1
V
= 1 +
• V
IN
OUT
(
)
5M
NOTCH DEPTH = –60dB AT 60Hz, RTI
60789 TA15
60789fa
15
LTC6078/LTC6079
U
PACKAGE DESCRIPTIO
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699)
0.675 0.05
3.50 0.05
2.15 0.05 (2 SIDES)
1.65 0.05
PACKAGE
OUTLINE
0.25 0.05
0.50
BSC
2.38 0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
TYP
6
0.38 0.10
10
3.00 0.10
(4 SIDES)
1.65 0.10
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
(DD10) DFN 1103
5
1
0.25 0.05
0.50 BSC
0.75 0.05
0.200 REF
2.38 0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
60789fa
16
LTC6078/LTC6079
U
PACKAGE DESCRIPTIO
DHC Package
16-Lead Plastic DFN (5mm × 3mm)
(Reference LTC DWG # 05-08-1706)
0.65 0.05
3.50 0.05
1.65 0.05
2.20 0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 0.05
0.50 BSC
4.40 0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
0.40 0.10
5.00 0.10
(2 SIDES)
TYP
16
9
R = 0.20
TYP
3.00 0.10 1.65 0.10
(2 SIDES)
(2 SIDES)
PIN 1
TOP MARK
(SEE NOTE 6)
PIN 1
NOTCH
(DHC16) DFN 1103
8
1
0.25 0.05
0.50 BSC
0.75 0.05
0.200 REF
4.40 0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC
PACKAGE OUTLINE MO-229
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
60789fa
17
LTC6078/LTC6079
U
PACKAGE DESCRIPTIO
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660)
0.889 0.127
(.035 .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
3.00 0.102
(.118 .004)
(NOTE 3)
0.52
(.0205)
REF
0.65
(.0256)
BSC
0.42 0.038
(.0165 .0015)
TYP
8
7 6 5
RECOMMENDED SOLDER PAD LAYOUT
3.00 0.102
(.118 .004)
(NOTE 4)
4.90 0.152
(.193 .006)
DETAIL “A”
0.254
(.010)
0° – 6° TYP
GAUGE PLANE
1
2
3
4
0.53 0.152
(.021 .006)
1.10
(.043)
MAX
0.86
(.034)
REF
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
0.127 0.076
(.009 – .015)
(.005 .003)
0.65
(.0256)
BSC
TYP
MSOP (MS8) 0204
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
60789fa
18
LTC6078/LTC6079
U
PACKAGE DESCRIPTIO
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.189 – .196*
(4.801 – 4.978)
.045 .005
.009
(0.229)
REF
16 15 14 13 12 11 10 9
.254 MIN
.150 – .165
.229 – .244
.150 – .157**
(5.817 – 6.198)
(3.810 – 3.988)
.0165 .0015
.0250 BSC
RECOMMENDED SOLDER PAD LAYOUT
1
2
3
4
5
6
7
8
.015 .004
(0.38 0.10)
× 45°
.0532 – .0688
(1.35 – 1.75)
.004 – .0098
(0.102 – 0.249)
.007 – .0098
(0.178 – 0.249)
0° – 8° TYP
.016 – .050
(0.406 – 1.270)
.0250
(0.635)
BSC
.008 – .012
GN16 (SSOP) 0204
(0.203 – 0.305)
TYP
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
60789fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC6078/LTC6079
U
TYPICAL APPLICATIO
DC Accurate Composite Amplifier, Gain of 1000
V
CC
+
–
V
IN
LT1226
V
OUT
1M
V
DD
0.1µF
V
EE
10k
–
100Ω
1/2
LTC6078
V
CC
+
10Ω
10k
2.49k
V
SS
V
DD
LT1634BCS8-5
10Ω
V
SS
CIRCUIT BW ≈ 1.25MHz
e
= 2.6nV/√Hz (RTI) AT 1kHz
n
2.49k
CIRCUIT V = 25µV (MAX) RTI
OS
V
60789 TA06
EE
RELATED PARTS
PART NUMBER
LTC2051/LTC2052 Dual/Quad Zero-Drift Op Amps
LT6011/LT6012 Dual/Quad Precision Op Amps
DESCRIPTION
COMMENTS
3µV V , 30nV/°C V Drift
OS
OS
60µV V , I = 300pA, I = 135µA
OS
B
S
60789fa
LT 0506 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
●
© LINEAR TECHNOLOGY CORPORATION 2005
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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