LTC6404 [Linear]
600MHz, Low Noise, High Precision Fully Differential Input/Output Amplifi er/Driver; 为600MHz ，低噪声，高精度全差动输入/输出功率放大器器/驱动器
| 型号： | LTC6404 |
| 厂家： | 
Linear |
| 描述： | 600MHz, Low Noise, High Precision Fully Differential Input/Output Amplifi er/Driver |
| 文件： | 总28页 (文件大小：340K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC6404
600MHz, Low Noise,
High Precision Fully Differential
Input/Output Amplifier/Driver
FEATURES
DESCRIPTION
The LTC®6404 is a family of AC precision, very low noise,
low distortion, fully differential input/output amplifiers
optimized for 3V, single supply operation.
n
Fully Differential Input and Output
n
Low Noise: 1.5nV/√Hz RTI
n
Very Low Distortion:
LTC6404-1 (2V , 10MHz): –91dBc
P-P
P-P
P-P
The LTC6404-1 is unity-gain stable. The LTC6404-2 is
designed for closed-loop gains greater than or equal to
2V/V. The LTC6404-4 is designed for closed-loop gains
greater than or equal to 4V/V. The LTC6404 closed-loop
bandwidth extends from DC to 600MHz. In addition to the
LTC6404-2 (2V , 10MHz): –96dBc
LTC6404-4 (2V , 10MHz): –101dBc
n
n
n
n
n
n
n
n
n
Closed-Loop –3dB Bandwidth: 600MHz
Slew Rate: 1200V/μs (LTC6404-4)
Adjustable Output Common Mode Voltage
Rail-to-Rail Output Swing
Input Range Extends to Ground
Large Output Current: 85mA (Typ)
DC Voltage Offset < 2mV (Max)
+
–
normal unfiltered outputs (OUT and OUT ), the LTC6404
has a built-in 88.5MHz differential single-pole lowpass
+
filter and an additional pair of filtered outputs (OUTF ,
–
OUTF ). An input referred voltage noise of 1.5nV/√Hz
make the LTC6404 able to drive state-of-the-art 16-/18-bit
ADCs while operating on the same supply voltage, saving
systemcostandpower. TheLTC6404ischaracterized, and
maintains its performance for supplies as low as 2.7V and
canoperateonsuppliesupto5.25V. Itdrawsonly27.3mA,
and has a hardware shutdown feature which reduces cur-
rent consumption to 250μA.
Low Power Shutdown
Tiny 3mm × 3mm × 0.75mm 16-Pin QFN Package
APPLICATIONS
n
Differential Input A/D Converter Driver
n
Single-Ended to Differential Conversion/Amplification
The LTC6404 family is available in a compact 3mm × 3mm
16-pin leadless QFN package and operates over a –40°C
to 125°C temperature range.
n
Common Mode Level Translation
Low Voltage, Low Noise, Signal Processing
n
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
LTC6404-4 Distortion vs Frequency
Single-Ended Input to Differential Output
with Common Mode Level Shifting
–40
V
V
V
= V
= MID-SUPPLY
OCM
CM
= 3V
0.5V
P-P
–50
–60
S
= 2V
OUT
P-P
F
0V
R = 100Ω, R = 402Ω
I
V
S
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
100Ω
402Ω
0.1μF
50Ω
–70
–80
3V
71.5Ω
–90
SIGNAL
HD2
HD2
1V
1V
P-P
–100
–110
–120
–130
GENERATOR
1.5VDC
1.5VDC
+
1.5VDC
V
OCM
HD3
0.1μF
130Ω
HD3
1
–
P-P
0.1
10
100
402Ω
6404 TA01
FREQUENCY (MHz)
64044 G16
6404f
1
LTC6404
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
+
–
Total Supply Voltage (V to V )................................5.5V
Input Voltage:
+
–
+
–
16 15 14 13
IN , IN , V
, SHDN (Note 2)...................... V to V
OCM
–
+
+
–
SHDN
1
2
3
4
12
11
10
9
V
V
V
V
Input Current:
+
V
+
–
IN , IN , V
, SHDN (Note 2)........................ 10mA
17
OCM
–
V
Output Short-Circuit Duration (Note 3) ............ Indefinite
V
OCM
Output Current (Continuous):
5
6
7
8
+
–
(OUTF , OUTF ) DC + AC
........................... 40mA
RMS
Operating Temperature Range (Note 4).. –40°C to 125°C
Specified Temperature Range (Note 5) .. –40°C to 125°C
Junction Temperature ........................................... 150°C
Storage Temperature Range................... –65°C to 150°C
UD PACKAGE
16-LEAD (3mm s 3mm) PLASTIC QFN
T
= 150°C, θ = 68°C/W, θ = 4.2°C/W
JA JC
JMAX
–
EXPOSED PAD (PIN 17) IS V , MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC6404CUD-1#PBF LTC6404CUD-1#TRPBF
LTC6404IUD-1#PBF LTC6404IUD-1#TRPBF
TAPE AND REEL
PART MARKING* PACKAGE DESCRIPTION
SPECIFIED TEMPERATURE RANGE
LCLW
LCLW
LCLW
LCLX
LCLX
LCLX
LCLY
LCLY
LCLY
0°C to 70°C
16-Lead (3mm × 3mm) Plastic QFN
16-Lead (3mm × 3mm) Plastic QFN
16-Lead (3mm × 3mm) Plastic QFN
16-Lead (3mm × 3mm) Plastic QFN
16-Lead (3mm × 3mm) Plastic QFN
16-Lead (3mm × 3mm) Plastic QFN
16-Lead (3mm × 3mm) Plastic QFN
16-Lead (3mm × 3mm) Plastic QFN
16-Lead (3mm × 3mm) Plastic QFN
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
LTC6404HUD-1#PBF LTC6404HUD-1#TRPBF
LTC6404CUD-2#PBF LTC6404CUD-2#TRPBF
LTC6404IUD-2#PBF
LTC6404IUD-2#TRPBF
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
LTC6404HUD-2#PBF LTC6404HUD-2#TRPBF
LTC6404CUD-4#PBF LTC6404CUD-4#TRPBF
LTC6404IUD-4#PBF
LTC6404IUD-4#TRPBF
–40°C to 85°C
–40°C to 125°C
LTC6404HUD-4#PBF LTC6404HUD-4#TRPBF
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
6404f
2
LTC6404
LTC6404 DC ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over
the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 3V, V– = 0V, VCM = VOCM = VICM = Mid-Supply,
VSHDN = OPEN, RL = OPEN, RBAL = 100k (See Figure 1). For the LTC6404-1: RI = 100Ω, RF = 100Ω. For the LTC6404-2: RI = 100Ω,
RF = 200Ω. For the LTC6404-4: RI = 100Ω, RF = 402Ω, unless otherwise noted. VS is defined (V+ – V–). VOUTCM = (VOUT+ + VOUT–)/2.
VICM is defined (VIN+ + VIN–)/2. VOUTDIFF is defined (VOUT+ – VOUT–). VINDIFF = (VINP – VINM
)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
0.5
1
MAX
UNITS
mV
l
l
l
V
Differential Offset Voltage (Input Referred)
Differential Offset Voltage Drift (Input Referred)
Input Bias Current (Note 6)
Input Bias Current Drift (Note 6)
Input Offset Current (Note 6)
Input Resistance
V = 2.7V to 5.25V
S
2
OSDIFF
V = 2.7V to 5.25V
S
μV/°C
μA
ΔV
/ΔT
OSDIFF
I
B
V = 2.7V to 5.25V
S
–60
–23
0.01
1
0
V = 2.7V to 5.25V
S
μA/°C
μA
ΔI /ΔT
B
I
OS
V = 2.7V to 5.25V
S
10
R
IN
Common Mode
Differential Mode
1000
3
kΩ
kΩ
C
Input Capacitance
1
1.5
3
pF
nV/√Hz
pA/√Hz
IN
e
n
Differential Input Referred Noise Voltage Density
Input Noise Current Density
f = 1MHz
f = 1MHz
i
n
e
Input Referred Common Mode Noise Voltage
Density
f = 1MHz, Referred to V
Pin
OCM
nVOCM
LTC6404-1
9
10.5
27
nV/√Hz
nV/√Hz
nV/√Hz
LTC6404-2
LTC6404-4
l
l
V
Input Signal Common Mode Range
V = 3V
0
0
1.6
3.6
V
V
ICMR
S
(Note 7)
V = 5V
S
CMRRI
(Note 8)
Input Common Mode Rejection Ratio
60
60
dB
dB
V = 3V, ΔV = 0.75V
S
CM
(Input Referred) ΔV /ΔV
V = 5V, ΔV = 1.25V
ICM
OSDIFF
S
CM
CMRRIO
(Note 8)
Output Common Mode Rejection Ratio
(Input Referred) ΔV /ΔV
66
dB
V = 5V, ΔV
S
= 1V
OCM
OCM
OSDIFF
l
PSRR
(Note 9)
Differential Power Supply Rejection
(ΔV /ΔV
V = 2.7V to 5.25V
S
60
94
dB
)
OSDIFF
S
PSRRCM
(Note 9)
Output Common Mode Power Supply Rejection
(ΔV /ΔV
V = 2.7V to 5.25V
S
l
l
l
)
OSCM
LTC6404-1
LTC6404-2
LTC6404-4
50
50
40
63
63
51
dB
dB
dB
S
G
CM
Common Mode Gain (ΔV
/ΔV
)
V = 5V, ΔV
= 1V
OCM
OUTCM
OCM
S
l
l
l
1
1
0.99
V/V
V/V
V/V
LTC6404-1
LTC6404-2
LTC6404-4
Common Mode Gain Error
V = 5V, ΔV
= 1V
OCM
S
l
l
l
–0.6
–0.6
–1.6
–0.125
–0.25
–1
0.1
0.1
–0.4
%
%
%
LTC6404-1
LTC6404-2
LTC6404-4
BAL
Output Balance (ΔV /ΔV
OUTCM
)
ΔV
= 2V, Single-Ended Input
OUTDIFF
OUTDIFF
l
l
l
–60
–60
–53
–40
–40
–40
dB
dB
dB
LTC6404-1
LTC6404-2
LTC6404-4
ΔV
= 2V, Differential Input
OUTDIFF
l
l
l
–66
–66
–66
–40
–40
–40
dB
dB
dB
LTC6404-1
LTC6404-2
LTC6404-4
V
Common Mode Offset Voltage (V
– V
)
V = 2.7V to 5.25V
OSCM
OUTCM
OCM
S
l
l
l
LTC6404-1
LTC6404-2
LTC6404-4
10
20
40
25
50
100
mV
mV
mV
6404f
3
LTC6404
LTC6404 DC ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over
the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 3V, V– = 0V, VCM = VOCM = VICM = Mid-Supply,
VSHDN = OPEN, RL = OPEN, RBAL = 100k (See Figure 1). For the LTC6404-1: RI = 100Ω, RF = 100Ω. For the LTC6404-2: RI = 100Ω,
RF = 200Ω. For the LTC6404-4: RI = 100Ω, RF = 402Ω, unless otherwise noted. VS is defined (V+ – V–). VOUTCM = (VOUT+ + VOUT–)/2.
VICM is defined (VIN+ + VIN–)/2. VOUTDIFF is defined (VOUT+ – VOUT–). VINDIFF = (VINP – VINM
)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Common Mode Offset Voltage Drift
V = 2.7V to 5.25V
ΔV
/ΔT
OSCM
S
LTC6404-1
LTC6404-2
LTC6404-4
10
20
20
μV/°C
μV/°C
μV/°C
V
Output Signal Common Mode Range
V = 3V
OUTCMR
S
l
l
l
(Note 7)
(Voltage Range for the V
Pin)
LTC6404-1
LTC6404-2
LTC6404-4
1.1
1.1
1.1
2
2
1.7
V
V
V
OCM
V = 5V
S
l
l
l
LTC6404-1
LTC6404-2
LTC6404-4
1.1
1.1
1.1
4
4
3.7
V
V
V
l
l
l
R
Input Resistance, V
Pin
LTC6404-1
LTC6404-2
LTC6404-4
15
8
4
23.5
14
7
32
20
10
kΩ
kΩ
kΩ
INVOCM
OCM
l
V
V
Voltage at the V
Pin
V = 3V
1.45
1.5
1.55
V
MID
OCM
S
l
l
l
Output Voltage High, Either Output Pin (Note 10)
V = 3V, I = 0mA
325
360
480
550
600
750
mV
mV
mV
OUT
S
L
L
L
V = 3V, I = 5mA
S
V = 3V, I = 20mA
S
l
l
l
V = 5V, I = 0mA
460
500
650
700
750
1000
mV
mV
mV
S
L
V = 5V, I = 5mA
S
L
V = 5V, I = 20mA
S
L
l
l
l
Output Voltage Low, Either Output Pin (Note 10)
V = 3V, I = 0mA
120
140
200
230
260
350
mV
mV
mV
S
L
V = 3V, I = –5mA
S
L
V = 3V, I = –20mA
S
L
l
l
l
V = 5V, I = 0mA
175
200
285
320
350
550
mV
mV
mV
S
L
V = 5V, I = –5mA
S
L
V = 5V, I = –20mA
S
L
l
l
l
I
Output Short-Circuit Current, Either Output Pin
(Note 11)
V = 2.7V
35
40
55
60
65
85
mA
mA
mA
SC
S
V = 3V
S
V = 5V
S
A
Large-Signal Voltage Gain
Supply Voltage Range
V = 3V
S
90
dB
V
VOL
l
V
2.7
5.25
S
l
l
l
I
Supply Current (LTC6404-1)
V = 2.7V, V
= V – 0.6V
27.2
27.3
27.8
35.5
35.5
36.5
mA
mA
mA
S
S
SHDN
S
V = 3V, V
= V – 0.6V
S
SHDN
SHDN
S
V = 5V, V
= V – 0.6V
S
S
l
l
l
Supply Current (LTC6404-2)
V = 2.7V, V
= V – 0.6V
29.7
29.8
30.4
38.5
38.5
39.5
mA
mA
mA
S
SHDN
S
V = 3V, V
= V – 0.6V
S
SHDN
SHDN
S
V = 5V, V
= V – 0.6V
S
S
l
l
l
Supply Current (LTC6404-4)
V = 2.7V, V
= V – 0.6V
30.0
30.2
31.0
39
39
40
mA
mA
mA
S
SHDN
S
V = 3V, V
= V – 0.6V
S
SHDN
SHDN
S
V = 5V, V
= V – 0.6V
S
S
l
l
l
I
Supply Current in Shutdown (LTC6404-1)
Supply Current in Shutdown (LTC6404-2)
Supply Current in Shutdown (LTC6404-4)
V = 2.7V, V
= V – 2.1V
0.22
0.25
0.35
1
1
2
mA
mA
mA
SHDN
S
SHDN
S
V = 3V, V
= V – 2.1V
S
S
SHDN
SHDN
S
V = 5V, V
= V – 2.1V
S
l
l
l
V = 2.7V, V
= V – 2.1V
0.22
0.25
0.35
1
1
2
mA
mA
mA
S
SHDN
S
V = 3V, V
S
= V – 2.1V
S
SHDN
SHDN
S
V = 5V, V
= V – 2.1V
S
l
l
l
V = 2.7V, V
= V – 2.1V
0.28
0.30
0.50
1.2
1.2
2.4
mA
mA
mA
S
SHDN
S
V = 3V, V
S
= V – 2.1V
S
SHDN
SHDN
S
V = 5V, V
= V – 2.1V
S
6404f
4
LTC6404
LTC6404 DC ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over
the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 3V, V– = 0V, VCM = VOCM = VICM = Mid-Supply,
VSHDN = OPEN, RL = OPEN, RBAL = 100k (See Figure 1). For the LTC6404-1: RI = 100Ω, RF = 100Ω. For the LTC6404-2: RI = 100Ω,
RF = 200Ω. For the LTC6404-4: RI = 100Ω, RF = 402Ω, unless otherwise noted. VS is defined (V+ – V–). VOUTCM = (VOUT+ + VOUT–)/2.
VICM is defined (VIN+ + VIN–)/2. VOUTDIFF is defined (VOUT+ – VOUT–). VINDIFF = (VINP – VINM
)
SYMBOL
PARAMETER
CONDITIONS
V = 2.7V to 5V
MIN
TYP
MAX
UNITS
V
+
l
l
l
V
V
SHDN Input Logic Low
SHDN Input Logic High
SHDN Pin Input Impedance
Turn-On Time
V – 2.1
IL
S
+
V = 2.7V to 5V
S
V – 0.6
38
V
IH
R
SHDN
V = 5V, V
= 2.9V to 0V
= 0.5V to 3V
= 3V to 0.5V
66
94
kΩ
ns
S
SHDN
SHDN
SHDN
t
t
V = 3V, V
S
750
300
ON
OFF
Turn-Off Time
V = 3V, V
S
ns
LTC6404-1 AC ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply
over the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 3V, V– = 0V, VCM = VOCM = VICM = Mid-Supply,
V
SHDN = OPEN, RI = 100Ω, RF = 100Ω, RL = 200Ω (See Figure 2) unless otherwise noted. VS is defined (V+ – V–).
VOUTCM = (VOUT+ + VOUT–)/2. VICM is defined as (VIN+ + VIN–)/2. VOUTDIFF is defined as (VOUT+ – VOUT–). VINDIFF = (VINP – VINM).
SYMBOL
SR
PARAMETER
CONDITIONS
V = 3V to 5V
MIN
TYP
450
500
MAX
UNITS
V/μs
Slew Rate
S
GBW
Gain-Bandwidth Product
V = 3V to 5V, R = 100Ω, R = 499Ω,
MHz
S
TEST
I
F
f
= 500MHz
l
f
–3dB Frequency (See Figure 2)
10MHz Distortion
V = 3V to 5V
300
600
MHz
3dB
S
HD
V = 3V, V
= 2V
SEIN
S
OUTDIFF
P-P
P-P
P-P
Single-Ended Input
2nd Harmonic
–88
–91
dBc
dBc
3rd Harmonic
HD
10MHz Distortion
V = 3V, V
OUTDIFF
= 2V
DIFFIN
S
Differential Input
2nd Harmonic
3rd Harmonic
–102
–91
dBc
dBc
IMD
Third-Order IMD at 10MHz
V = 3V, V
S OUTDIFF
= 2V
–93
dBc
10M
f = 9.5MHz, f = 10.5MHz
1
2
OIP3
OIP3 at 10MHz (Note 12)
50
dBm
10M
t
S
Settling Time
2V Step at Output
1% Settling
0.1% Settling
0.01% Settling
10
13
17
ns
ns
ns
NF
f = 10MHz
13.4
88.5
dB
Noise Figure, R = 50Ω
Differential Filter 3dB Bandwidth (Note 13)
S
f
MHz
3dBFILTER
6404f
5
LTC6404
LTC6404-2 AC ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply
over the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 3V, V– = 0V, VCM = VOCM = VICM = Mid-Supply,
VSHDN = OPEN, RI = 100Ω, RF = 200Ω, RL = 200Ω (See Figure 2) unless otherwise noted. VS is defined (V+ – V–).
VOUTCM = (VOUT+ + VOUT–)/2. VICM is defined as (VIN+ + VIN–)/2. VOUTDIFF is defined as (VOUT+ – VOUT–). VINDIFF = (VINP – VINM).
SYMBOL
SR
PARAMETER
CONDITIONS
V = 3V to 5V
MIN
TYP
700
900
MAX
UNITS
V/μs
Slew Rate
S
GBW
Gain-Bandwidth Product
V = 3V to 5V, R = 100Ω, R = 499Ω,
MHz
S
TEST
I
F
f
= 500MHz
l
f
–3dB Frequency (See Figure 2)
10MHz Distortion
V = 3V to 5V
300
600
MHz
3dB
S
HD
V = 3V, V
= 2V
SEIN
S
OUTDIFF
P-P
P-P
P-P
Single-Ended Input
2nd Harmonic
–95
–96
dBc
dBc
3rd Harmonic
HD
10MHz Distortion
V = 3V, V
OUTDIFF
= 2V
DIFFIN
S
Differential Input
2nd Harmonic
3rd Harmonic
–98
–99
dBc
dBc
IMD
Third-Order IMD at 10MHz
V = 3V, V
S OUTDIFF
= 2V
–100
dBc
10M
f = 9.5MHz, f = 10.5MHz
1
2
OIP3
OIP3 at 10MHz (Note 12)
53
dBm
10M
t
S
Settling Time
2V Step at Output
1% Settling
0.1% Settling
0.01% Settling
9
12
15
ns
ns
ns
NF
Noise Figure, R = 50Ω
f = 10MHz
10
dB
S
f
Differential Filter 3dB Bandwidth (Note 13)
88.5
MHz
3dBFILTER
LTC6404-4 AC ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply
over the full operating temperature range, otherwise specifications are at TA = 25°C. V+ = 3V, V– = 0V, VCM = VOCM = VICM = Mid-Supply,
VSHDN = OPEN, RI = 100Ω, RF = 402Ω, RL = 200Ω (See Figure 2) unless otherwise noted. VS is defined (V+ – V–).
VOUTCM = (VOUT+ + VOUT–)/2. VICM is defined as (VIN+ + VIN–)/2. VOUTDIFF is defined as (VOUT+ – VOUT–). VINDIFF = (VINP – VINM).
SYMBOL
SR
PARAMETER
CONDITIONS
V = 3V to 5V
MIN
TYP
1200
1700
MAX
UNITS
V/μs
Slew Rate
S
GBW
Gain-Bandwidth Product
V = 3V to 5V, R = 100Ω, R = 499Ω,
MHz
S
TEST
I
F
f
= 500MHz
l
f
–3dB Frequency (See Figure 2)
10MHz Distortion
V = 3V to 5V
300
530
MHz
3dB
S
HD
V = 3V, V
= 2V
SEIN
S
OUTDIFF
P-P
P-P
P-P
Single-Ended Input
2nd Harmonic
–97
–98
dBc
dBc
3rd Harmonic
HD
10MHz Distortion
V = 3V, V
OUTDIFF
= 2V
DIFFIN
S
Differential Input
2nd Harmonic
3rd Harmonic
–100
–101
dBc
dBc
IMD
Third-Order IMD at 10MHz
V = 3V, V
S OUTDIFF
= 2V
–101
dBc
10M
f = 9.5MHz, f = 10.5MHz
1
2
OIP3
OIP3 at 10MHz (Note 12)
54
dBm
10M
t
S
Settling Time
2V Step at Output
1% Settling
0.1% Settling
0.01% Settling
8
11
14
ns
ns
ns
NF
Noise Figure, R = 50Ω
f = 10MHz
8
dB
S
f
Differential Filter 3dB Bandwidth (Note 13)
88.5
MHz
3dBFILTER
6404f
6
LTC6404
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
The voltage range for the output common mode range is tested using the
test circuit of Figure 1 by applying a voltage on the V
pin and testing at
OCM
both mid-supply and at the Electrical Characteristics table limits to verify
that the the common mode offset (V ) has not deviated by more than
OSCM
+
–
15mV (LTC6404-1), 20mV (LTC6404-2) or 40mV (LTC6404-4).
Note 2: The inputs IN , IN are protected by a pair of back-to-back diodes.
If the differential input voltage exceeds 1.4V, the input current should be
Note 8: Input CMRR is defined as the ratio of the change in the input
common mode voltage at the pins IN or IN to the change in differential
input referred voltage offset. Output CMRR is defined as the ratio of the
+
–
+
–
limited to less than 10mA. Input pins (IN , IN , V
and SHDN) are also
OCM
protected by steering diodes to either supply. If the inputs should exceed
either supply voltage, the input current should be limited to less than
10mA.
Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefinitely. Long-term application of output currents in excess of the
absolute maximum ratings may impair the life of the device.
Note 4: The LTC6404C/LTC6404I are guaranteed functional over the
operating temperature range –40°C to 85°C. The LTC6404H is guaranteed
functional over the operating temperature range –40°C to 125°C.
Note 5: The LTC6404C is guaranteed to meet specified performance from
0°C to 70°C. The LTC6404C is designed, characterized, and expected
to meet specified performance from –40°C to 85°C but is not tested or
QA sampled at these temperatures. The LTC6404I is guaranteed to meet
specified performance from –40°C to 85°C. The LTC6404H is guaranteed
to meet specified performance from –40°C to 125°C.
change in the voltage at the V
pin to the change in differential input
OCM
referred voltage offset. These specifications are strongly dependent on
feedback ratio matching between the two outputs and their respective
inputs, and is difficult to measure actual amplifier performance. (See “The
Effects of Resistor Pair Mismatch” in the Applications Information section
of this data sheet. For a better indicator of actual amplifier performance
independent of feedback component matching, refer to the PSRR
specification.
Note 9: Differential power supply rejection (PSRR) is defined as the ratio
of the change in supply voltage to the change in differential input referred
voltage offset. Common mode power supply rejection (PSRRCM) is
defined as the ratio of the change in supply voltage to the change in the
common mode offset, V
– V
.
OUTCM
OCM
Note 10: This parameter is pulse tested. Output swings are measured as
differences between the output and the respective power supply rail.
Note 11: This parameter is pulse tested. Extended operation with the
output shorted may cause junction temperatures to exceed the 125°C limit
and is not recommended. See Note 3 for more details.
Note 12: Since the LTC6404 is a voltage feedback amplifier with low
output impedance, a resistive load is not required when driving an ADC.
Therefore, typical output power is very small. In order to compare the
LTC6404 with amplifiers that require 50Ω output loads, output swing of
the LTC6404 driving an ADC is converted into an “effective” OIP3 as if the
LTC6404 were driving a 50Ω load.
Note 6: Input bias current is defined as the average of the input currents
–
+
flowing into Pin 6 and Pin 15 (IN and IN ). Input offset current is defined
as the difference of the input currents flowing into Pin 15 and Pin 6
+
–
(I = I – I )
OS
B
B
Note 7: Input common mode range is tested using the test circuit of
Figure 1 by measuring the differential gain with a 1V differential output
with V
= mid-supply, and with V
at the input common mode range
ICM
ICM
limits listed in the Electrical Characteristics table, verifying the differential
gain has not deviated from the mid-supply common mode input case
by more than 1%, and the common mode offset (V
deviated from the zero bias common mode offset by more than 15mV
(LTC6404-1), 20mV (LTC6404-2) or 40mV (LTC6404-4).
) has not
Note 13: The capacitors used to set the filter pole might have up to 15%
variation. The resistors used to set the filter pole might have up to 12%
variation.
OSCM
6404f
7
LTC6404
LTC6404-1 TYPICAL PERFORMANCE CHARACTERISTICS
Active Supply Current vs
Temperature
Shutdown Supply Current vs
Temperature
Differential Voltage Offset (Input
Referred) vs Temperature
1.0
0.8
30
29
0.5
0.4
5 REPRESENTATIVE UNITS
V
= V
= MID-SUPPLY
OCM
V
= V
= MID-SUPPLY
OCM
CM
CM
V
V
= V
= MID-SUPPLY
CM
S
OCM
= 3V
0.6
V
= 5V
S
V
= 5V
0.4
S
28
V
= 3V
0.2
S
0.3
V
= 2.7V
S
0
27
26
V
= 3V
S
–0.2
–0.4
–0.6
–0.8
–1.0
0.2
0.1
0
V
= 2.7V
S
25
24
–75 –50 –25
0
25 50 75 100 125 150
–75 –50 –25
0
25 50 75 100 125 150
–75 –50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
64041 G03
64041 G01
64041 G02
Common Mode Voltage Offset vs
Temperature
Active Supply Current vs Supply
Voltage and Temperature
SHDN Supply Current vs Supply
Voltage and Temperature
10
8
0.5
0.4
0.3
0.2
0.1
0
30
25
20
15
10
5
V
= V
=
OCM
5 REPRESENTATIVE UNITS
T
T
T
T
T
T
T
T
T
= 125°C
= 105°C
= 90°C
CM
A
A
A
A
A
A
A
A
A
MID-SUPPLY
V
V
= V
= MID-SUPPLY
CM
S
OCM
+
SHDN = V
= 3V
6
= 75°C
= 50°C
= 25°C
= –10°C
= –45°C
= –60°C
4
2
T
T
T
T
T
T
T
T
T
= 125°C
= 105°C
= 90°C
A
A
A
A
A
A
A
A
A
0
–2
–4
–6
–8
–10
= 75°C
= 50°C
= 25°C
= –10°C
= –45°C
= –60°C
V
= V
= MID-SUPPLY
4 5
CM
OCM
–
SHDN = V
0
0
1
2
3
0
1
2
3
4
5
–75 –50 –25
0
25 50 75 100 125 150
V
(V)
V
(V)
TEMPERATURE (°C)
SUPPLY
SUPPLY
64041 G06
64041 G05
64041 G04
SHDN Pin Current vs SHDN Pin
Voltage and Temperature
Supply Current vs SHDN Pin
Voltage and Temperature
Small-Signal Frequency
Response
30
25
20
15
10
5
5
0
0
–5
V
V
= V
= MID-SUPPLY
OCM
V
V
= V
= MID-SUPPLY
OCM
CM
S
V
V
= 3V
= 5V
C = 0pF
CM
S
S
S
F
= 3V
= 3V
C = 1.8pF
F
–10
–15
–20
–25
–30
–5
T
T
T
T
T
T
T
T
T
= 125°C
A
A
A
A
A
A
A
A
A
T
T
T
T
T
T
T
T
T
= 125°C
= 105°C
= 90°C
A
A
A
A
A
A
A
A
A
= 105°C
= 90°C
= 75°C
= 50°C
= 25°C
= –10°C
= –45°C
= –60°C
–10
–15
–20
= 75°C
= 50°C
= 25°C
= –10°C
= –45°C
= –60°C
UNFILTERED OUTPUTS
V
T
= V
= MID-SUPPLY
CM
A
F
OCM
= 25°C
R = R = 100Ω, C IN PARALLEL WITH R
F
I
F
0
0
0.5
1.0
1.5
2.0
2.5
3.0
0
0.5
1.0
1.5
2.0
2.5
3.0
10
100
FREQUENCY (MHz)
1000
SHDN PIN VOLTAGE (V)
SHDN PIN VOLTAGE (V)
64041 G08
64041 G07
64041 G09
6404f
8
LTC6404
LTC6404-1 TYPICAL PERFORMANCE CHARACTERISTICS
Small-Signal Frequency Response
vs Gain Setting Resistor Values
and Supply Voltage
Small-Signal Frequency
Response vs CLOAD
Small-Signal Frequency
Response vs Temperature
10
5
10
5
5
0
C
= 10pF
LOAD
T
= –45°C
A
R = R = 100Ω
F
I
–5
0
0
C
= 5pF
R = R = 200Ω
LOAD
F
I
T
= 25°C
A
–10
–15
–20
–25
–30
C
= 0pF
LOAD
–5
–5
R = R = 499Ω
F
I
UNFILTERED OUTPUTS
T
= 90°C
A
V
V
= 3V
= 5V
S
S
V
T
= V
= MID-SUPPLY
–10
–15
–20
CM
A
OCM
–10
–15
–20
= 25°C
I
R = R = 100Ω
UNFILTERED OUTPUTS
UNFILTERED OUTPUTS
= V = MID-SUPPLY
F
V
= 3V AND V = 5V
V
T
= V
= MID-SUPPLY
V
S
S
CM
A
S
OCM
CM
OCM
R
= 200Ω,
= 25°C
R = R = 100Ω
LOAD
F
S
I
(EACH OUTPUT TO GROUND)
V
= 3V AND V = 5V
V
= 3V AND V = 5V
S
S
10
100
1000
10
100
FREQUENCY (MHz)
1000
10
100
FREQUENCY (MHz)
1000
FREQUENCY (MHz)
64041 G11
64041 G12
64041 G10
Small-Signal Frequency
Response vs Temperature
Large-Signal Step Response
Small-Signal Step Response
0.50
0.25
0
5
0
1.5
1.0
UNFILTERED DIFFERENTIAL
OUTPUT
T
= 25°C
A
V
INDIFF
–5
FILTERED
DIFFERENTIAL
OUTPUT
0.5
–10
–15
–20
–25
–30
–35
V
V
V
OUTDIFF
OUTDIFF
INDIFF
T
= 90°C
A
0
T
= 25°C
A
T
= –45°C
–0.5
–1.0
–1.5
A
–0.25
–0.50
FILTERED OUTPUT
= V = MID-SUPPLY
V
CM
OCM
R = R = 100Ω
V
= V
I
= MID-SUPPLY
V
= V
I
= MID-SUPPLY
OCM
F
I
CM
F
OCM
CM
F
V
= 3V AND V = 5V
S
R = R = 100Ω
R = R = 100Ω
S
10
100
FREQUENCY (MHz)
1000
0
3
6
9
12
15
0
3
6
9
12
15
TIME (ns)
TIME (ns)
64041 G15
64041 G14
64041 G13
Distortion vs Input Common Mode
Voltage
Distortion vs Output Amplitude
Distortion vs Frequency
–40
–50
–30
–40
–40
–50
V
= 3V
I
V
V
= V
= MID-SUPPLY
OCM
S
F
CM
S
A
V
V
V
= V
= MID-SUPPLY
CM
S
OCM
R = R = 100Ω
= 3V
= 3V
V
= 2V
IN
= 10MHz
T
= 25oC
P-P
= 2V
OUTDIFF
P-P
f
C = 0pF
IN
F
R = R = 100Ω
F
I
–50
–60
R = R = 1007
–60
F
I
DIFFERENTIAL
INPUT
SINGLE-ENDED
INPUT
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
V
= FULLY DIFFERENTIAL INPUT
IN
–60
–70
f
= 10MHz
IN
–70
–70
–80
–80
HD2
–80
–90
HD3
HD2
–90
HD3
HD2
HD2
–90
–100
–110
–120
HD2
HD3
–100
–110
–100
–110
HD3
1.0
HD3
1.5
0
0.5
1.0
2.0
+
2.5
–
3.0
0
1
2
3
4
5
6
0.1
10
100
DC COMMON MODE INPUT (AT IN AND IN PINS) (V)
V
(V
)
FREQUENCY (MHz)
OUTDIFF P-P
64041 G17
64041 G18
64041 G16
6404f
9
LTC6404
LTC6404-1 TYPICAL PERFORMANCE CHARACTERISTICS
LTC6404-1 Driving LTC2207
16-Bit ADC
LTC6404-1 Driving LTC2207
Distortion vs Output Amplitude
16-Bit ADC
–30
–40
0
–20
0
–20
V
V
T
= V
= MID-SUPPLY
OCM
V
V
= V
= 1.7V
OCM
V
V
= V
= 1.5V
CM
S
A
F
CM
S
F
IN
CM
S
F
IN
OCM
= 3V
= 3.3V
= 3V
= 25°C
R = R = 100Ω
R = R = 100Ω
I
I
R = R = 100Ω
V
f
= 2V DIFFERENTIAL
V
f
= 2V DIFFERENTIAL
I
P-P
= 105Msps
P-P
–50
V
f
= SINGLE-ENDED INPUT
= 105Msps
IN
SAMPLE
SAMPLE
–40
–40
= 10MHz
10MHz, 4092 POINT FFT
10MHz, 65536 POINT FFT
IN
–60
FUNDAMENTAL = –1dBFS
HD2 = –98.8dBc
HD3 = –90.2dBc
FUNDAMENTAL = –1dBFS
HD2 = –90.7dBc
HD3 = –86.6dBc
–60
–70
–60
–80
–80
HD3
–80
HD2
HD8
HD2
HD3
HD3
HD5
–90
HD4
40
HD5
HD7
–100
–120
HD7
HD2
HD9
HD9
–100
–120
HD4
40
–100
–110
0
1
2
3
4
5
0
10
20
30
50
0
10
20
30
50
V
(V
)
FREQUENCY (MHz)
FREQUENCY (MHz)
OUTDIFF P-P
64041 G19
64041 G20
64041 G21
Voltage Noise Density vs
Frequency
LTC6404-1 Noise Figure vs
Frequency
100
10
1
28
V
V
= V
= MID-SUPPLY
OCM
CM
S
A
V
V
= V
= MID-SUPPLY
OCM
CM
S
A
= 3V
= 3V
24
20
16
12
8
T
= 25°C
I
T
= 25°C
R = R = 100Ω
F
SEE FIGURE 2 CIRCUIT
COMMON MODE
DIFFERENTIAL INPUT
REFERRED
4
0
0.01
0.1
1
10
100
1000
10
1000
100
FREQUENCY (MHz)
FREQUENCY (MHz)
64041 G22
64041 G23
6404f
10
LTC6404
LTC6404-2 TYPICAL PERFORMANCE CHARACTERISTICS
Active Supply Current vs
Temperature
Shutdown Supply Current vs
Temperature
Differential Voltage Offset (Input
Referred) vs Temperature
1.0
0.8
33
32
0.5
0.4
5 REPRESENTATIVE UNITS
V
= V
= MID-SUPPLY
OCM
V
= V
= MID-SUPPLY
CM
CM
OCM
V
V
= V
= MID-SUPPLY
CM
S
OCM
= 3V
0.6
V
= 5V
V
= 5V
S
S
0.4
31
0.2
V
= 3V
0.3
S
0
30
29
V
= 3V
S
V
= 2.7V
–0.2
–0.4
–0.6
–0.8
–1.0
S
0.2
0.1
0
V
= 2.7V
S
28
27
–75 –50 –25
0
25 50 75 100 125 150
–75 –50 –25
0
25 50 75 100 125 150
100
125 150
25 50 75
–75 –50 –25
0
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
64042 G03
64042 G01
64042 G02
Common Mode Voltage Offset
(Input Referred) vs Temperature
Active Supply Current vs Supply
Voltage and Temperature
SHDN Supply Current vs Supply
Voltage and Temperature
10
8
0.5
0.4
0.3
0.2
0.1
0
40
35
30
25
T
T
T
T
T
T
T
T
T
= 125°C
= 105°C
= 90°C
5 REPRESENTATIVE UNITS
A
A
A
A
A
A
A
A
A
V
= V
= MID-SUPPLY
CM
OCM
+
V
V
= V
= MID-SUPPLY
CM
S
OCM
SHDN = V
= 3V
6
= 75°C
= 50°C
= 25°C
= –10°C
= –45°C
= –60°C
4
2
T
T
T
T
T
T
T
T
T
= 125°C
= 105°C
= 90°C
A
A
A
A
A
A
A
A
A
0
20
15
–2
–4
–6
–8
–10
= 75°C
= 50°C
= 25°C
= –10°C
= –45°C
= –60°C
10
5
V
= V
= MID-SUPPLY
4 5
CM
OCM
–
SHDN = V
0
–75 –50 –25
0
25 50 75 100 125 150
0
1
2
3
1
2
3
4
0
5
TEMPERATURE (°C)
V
(V)
V
(V)
SUPPLY
SUPPLY
64042 G06
64042 G03
64042 G05
SHDN Pin Current vs SHDN Pin
Voltage and Temperature
Supply Current vs SHDN Pin
Voltage and Temperature
Small-Signal Frequency
Response
15
10
0
–5
35
30
25
20
15
10
5
V
V
= V
= MID-SUPPLY
OCM
V
V
= 3V
= 5V
CM
S
V
V
= V
= MID-SUPPLY
OCM
S
S
CM
S
= 3V
= 3V
C = 0pF
F
5
–10
–15
–20
–25
–30
C = 1pF
F
0
T
T
T
T
T
T
T
T
T
= 125°C
= 105°C
A
A
A
A
A
A
A
A
A
T
T
T
T
T
T
T
T
T
= 125°C
= 105°C
= 90°C
A
A
A
A
A
A
A
A
A
= 90°C
= 75°C
= 50°C
= 25°C
= –10°C
= –45°C
= –60°C
–5
= 75°C
= 50°C
= 25°C
= –10°C
= –45°C
= –60°C
UNFILTERED OUTPUTS
–10
–15
–20
V
T
= V
= MID-SUPPLY
CM
A
I
F
OCM
= 25°C
R = 100ꢀ, R = 200ꢀ,
C IN PARALLEL WITH R
F
F
0
0
0.5
1.0
1.5
2.0
2.5
3.0
10
100
FREQUENCY (MHz)
1000
0
0.5
1.0
1.5
2.0
2.5
3.0
SHDN PIN VOLTAGE (V)
SHDN PIN VOLTAGE (V)
64042 G07
64042 G08
64042 G09
6404f
11
LTC6404
LTC6404-2 TYPICAL PERFORMANCE CHARACTERISTICS
Small-Signal Frequency
Response vs CLOAD
Small-Signal Frequency
Response vs Temperature
Small-Signal Frequency Response
vs Gain Setting Resistor Values
15
10
25
20
15
10
5
15
10
5
T
= –45°C
A
R = 100ꢀ, R = 200ꢀ
C
= 10pF
I
F
LOAD
C
= 5pF
LOAD
5
T
= 25°C
A
R = 200ꢀ, R = 402ꢀ
I
F
0
T
= 90°C
A
R = 499ꢀ, R = 1k
C
= 0pF
0
I
F
LOAD
–5
UNFILTERED OUTPUTS
UNFILTERED OUTPUTS
= V = MID-SUPPLY
0
V
V
= 3V
= 5V
S
S
V
T
= V
= MID-SUPPLY
V
CM
A
OCM
–5 CM
OCM
= 25°C
–10
–20
–25
T
= 25°C
A
–5
–10
–15
UNFILTERED OUTPUTS
R = 100ꢀ, R = 200ꢀ
R = 100ꢀ, R = 200ꢀ
I
S
F
I
S
F
V
T
= V
= MID-SUPPLY
V
R
= 3V AND V = 5V
–10
–15
CM
A
S
OCM
V
= 3V AND V = 5V
S
S
= 25°C
= 200ꢀ,
R
LOAD
= 200ꢀ,
LOAD
V
= 3V AND V = 5V
(EACH OUTPUT TO GROUND)
S
(EACH OUTPUT TO GROUND)
10
100
FREQUENCY (MHz)
1000
10
100
1000
10
100
FREQUENCY (MHz)
1000
FREQUENCY (MHz)
64042 G10
64042 G11
64042 G12
Small-Signal Frequency
Response vs Temperature
Large-Signal Step Response
Small-Signal Step Response
1.00
0.75
0.50
0.25
0
15
10
1.5
1.0
UNFILTERED DIFFERENTIAL
OUTPUT
V
OUTDIFF
V
OUTDIFF
T
= 25°C
A
5
0
0.5
FILTERED
DIFFERENTIAL
OUTPUT
V
INDIFF
V
INDIFF
–5
T
= 90°C
0
A
–10
–15
–20
–25
–30
–0.25
–0.50
–0.75
–1.00
T
= 25°C
–0.5
–1.0
–1.5
A
T
= –45°C
A
V
= V
= MID-SUPPLY
OCM
CM
I
S
V
= V
= MID-SUPPLY
OCM
R = 100ꢀ, R = 200ꢀ
V
= V
= MID-SUPPLY
OCM
F
CM
CM
I
R = 100ꢀ, R = 200ꢀ
I F
R = 100ꢀ, R = 200ꢀ
V
= 3V
F
10
100
FREQUENCY (MHz)
1000
0
3
6
9
12
15
0
3
6
9
12
15
TIME (ns)
TIME (ns)
64042 G14
64042 G15
64042 G13
Distortion vs Input Common Mode
Voltage
Distortion vs Frequency
Distortion vs Output Amplitude
–40
–50
–60
–70
–40
–50
–40
–50
V
V
= 3V
= V
V
V
= 3V
= V
V
V
V
= V
= MID-SUPPLY
OCM
S
CM
S
CM
CM
S
= MID-SUPPLY
F
= MID-SUPPLY
OCM
= 3V
OCM
R = 100ꢀ, R = 200ꢀ
R = 100ꢀ, R = 200ꢀ
= 2V
I
I
F
OUTDIFF
R = 100Ω, R = 200Ω
P-P
V
f
= 1V
V
f
= DIFFERENTIAL INPUT
IN
P-P
IN
F
I
–60
–60
= 10MHz
= 10MHz
IN
IN
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
–70
–80
–90
–70
HD3
–80
HD2
HD3
–80
HD2
–100
–110
–120
–130
–140
–90
HD2
–90
–100
–110
–120
HD2
HD3
HD3
–100
–110
HD2
2.0
HD3
0.1
1
10
100
0
1
2
3
4
5
6
0
0.5
1.0
1.5
2.5
+
–
V
(V
)
DC COMMON MODE INPUT (AT IN AND IN PINS) (V)
FREQUENCY (MHz)
OUTDIFF P-P
64042 G18
64042 G17
64042 G16
6404f
12
LTC6404
LTC6404-2 TYPICAL PERFORMANCE CHARACTERISTICS
LTC6404-2 Driving LTC2207
16-Bit ADC (Two Tones)
LTC6404-2 Driving LTC2207
16-Bit ADC (Single Tone)
Distortion vs Output Amplitude
–40
–50
0
–20
0
–20
V
V
= 3V
= V
V
V
V
= 3.3V
V
= 3.3V
INDIFF
S
CM
S
S
= MID-SUPPLY
OCM
= 2V
V
= 1V
OUTDIFF
= V
P-P
P-P
R = 100ꢀ, R = 200ꢀ
= 1.25V
FULLY DIFFERENTIAL
I
F
CM
OCM
V
f
= SINGLE-ENDED INPUT
= 10MHz
R = 1007, R = 2007
V
V
= 2V
IN
I
F
OUTDIFF
= V
P-P
–60
10.1MHz, 16184 POINT FFT
= 105Msps
= 1.25V
OCM
IN
CM
–40
–40
f
R = 100ꢀ, R = 200ꢀ
SAMPLE
I
F
–70
FUNDAMENTAL = –1dBFS
HD2 = –92.4dBc
16184 POINT FFT
= 105Msps
–60
f
SAMPLE
–80
–60
HD3 = –93.02dBc
TONE1, TONE2 = –7dBFS
IM3U = –106.8dBc
IM3U
IM3L
–80
–90
IM3L = –107.7dBc
HD2
HD3
–80
HD2
HD3
HD7
–100
–110
–120
HD4
40
HD5
–100
–120
–100
–120
0
1
2
3
4
5
6
0
10
20
30
50
0
10
20
30
40
50
V
(V
)
FREQUENCY (MHz)
FREQUENCY (MHz)
OUTDIFF P-P
64042 G19
64042 G20
64042 G21
Voltage Noise Density vs
Frequency
LTC6404-2 Noise Figure vs
Frequency
100
10
1
28
V
V
= 3V
= V
V
V
T
= V
= MID-SUPPLY
OCM
S
CM
CM
S
A
= MID-SUPPLY
OCM
= 3V
24
20
16
12
8
R = 100Ω, R = 200Ω
= 25°C
SEE FIGURE 2 CIRCUIT
I
F
T
= 25°C
A
COMMON MODE
DIFFERENTIAL INPUT
REFERRED
4
0
0.01
0.1
1
10
100
1000
10
1000
100
FREQUENCY (MHz)
FREQUENCY (MHz)
64042 G22
64042 G23
6404f
13
LTC6404
LTC6404-4 TYPICAL PERFORMANCE CHARACTERISTICS
Active Supply Current vs
Temperature
Shutdown Supply Current vs
Temperature
Differential Voltage Offset (Input
Referred) vs Temperature
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
1.0
0.8
33
32
V
= V
= MID-SUPPLY
OCM
5 REPRESENTATIVE UNITS
V
= V
= MID-SUPPLY
OCM
CM
CM
V
V
= V
= MID-SUPPLY
CM
S
OCM
= 3V
0.6
V
= 5V
S
V
= 5V
S
0.4
31
V
S
= 3V
0.2
V
= 3V
30
29
0
S
V
= 2.7V
S
–0.2
–0.4
–0.6
–0.8
–1.0
V
= 2.7V
S
28
27
–75 –50 –25
0
25 50 75 100 125 150
–75 –50 –25
0
25 50 75 100 125 150
–75 –50 –25
0
25 50
150
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
64044 G03
64044 G01
64044 G02
Common Mode Voltage Offset
(Input Referred) vs Temperature
Active Supply Current vs Supply
Voltage and Temperature
SHDN Supply Current vs Supply
Voltage and Temperature
50
40
40
0.7
0.6
V
= V
=
OCM
5 REPRESENTATIVE UNITS
T
T
T
T
T
T
T
T
T
= 125°C
= 105°C
= 90°C
CM
A
A
A
A
A
A
A
A
A
MID-SUPPLY
V
V
= V
= MID-SUPPLY
CM
S
OCM
35
30
25
+
SHDN = V
= 3V
30
= 75°C
0.5
0.4
0.3
0.2
0.1
0
= 50°C
= 25°C
= –10°C
= –45°C
= –60°C
20
10
T
T
T
T
T
T
T
T
T
= 125°C
A
A
A
A
A
A
A
A
A
0
20
15
= 105°C
= 90°C
= 75°C
= 50°C
= 25°C
= –10°C
= –45°C
= –60°C
–10
–20
–30
–40
–50
10
5
V
= V
= MID-SUPPLY
5
4
CM
OCM
+
SHDN = V
0
1
2
4
0
5
–75 –50 –25
0
25 50 75 100 125 150
3
0
1
2
3
TEMPERATURE (°C)
V
(V)
V
(V)
SUPPLY
SUPPLY
64044 G05
64044 G04
64044 G06
SHDN Pin Current vs SHDN Pin
Voltage and Temperature
Supply Current vs SHDN Pin
Voltage and Temperature
Small-Signal Frequency
Response
35
30
25
20
15
10
5
0
–5
20
15
10
5
V
V
= 3V
= 5V
V
V
= V
= MID-SUPPLY
V
V
= V
= MID-SUPPLY
OCM
S
S
CM
S
OCM
C = 0pF
F
CM
S
= 3V
= 3V
–10
–15
–20
–25
–30
C = 1pF
F
T
T
T
T
T
T
T
T
T
= 125°C
= 105°C
A
A
A
A
A
A
A
A
A
T
T
T
T
T
T
T
T
T
= 125°C
= 105°C
= 90°C
A
A
A
A
A
A
A
A
A
= 90°C
= 75°C
= 50°C
= 25°C
= –10°C
= –45°C
= –60°C
0
= 75°C
= 50°C
= 25°C
= –10°C
= –45°C
= –60°C
–5
–10
–15
V
= V
= MID-SUPPLY
OCM
CM
I
F
R = 100ꢀ, R = 402ꢀ,
F
C IN PARALLEL WITH R
F
0
2.0
3.0
0
0.5
1.0
1.5
2.5
0
1.0
1.5
2.0
2.5
3.0
0.5
10
100
FREQUENCY (MHz)
1000
SHDN PIN VOLTAGE (V)
SHDN PIN VOLTAGE (V)
64044 G09
64044 G08
64044 G07
6404f
14
LTC6404
LTC6404-4 TYPICAL PERFORMANCE CHARACTERISTICS
Small-Signal Frequency
Response vs CLOAD
Small-Signal Frequency
Response vs Temperature
Small-Signal Frequency Response
vs Gain Setting Resistor Values
20
15
10
5
20
15
10
5
25
20
15
10
5
C
= 10pF
LOAD
R = 100ꢀ, R = 402ꢀ
I
F
C
= 5pF
LOAD
T
= –45°C
A
R = 140ꢀ, R = 562ꢀ
I
F
T = 25°C
A
C
= 0pF
LOAD
T
= 90°C
A
R = 200ꢀ, R = 800Ω
I
F
0
0
0
V
V
= 3V
= 5V
= MID-SUPPLY
S
S
–5
–10
–15
–5
–10
–15
V
V
= 3V
= 5V
= MID-SUPPLY
–5
–10
–15
S
S
V
= V
= MID-SUPPLY
OCM
V
= V
CM
I
S
CM
I
S
OCM
R = 100ꢀ, R = 402ꢀ
R = 100ꢀ, R = 402ꢀ
V
V
= V
OCM
F
F
CM
S
V
= 3V AND V = 5V
S
V
= 3V AND V = 5V
S
= 3V AND V = 5V
S
10
1000
10
100
FREQUENCY (MHz)
1000
10
100
FREQUENCY (MHz)
1000
100
FREQUENCY (MHz)
64044 G10
64044 G11
64044 G12
Small-Signal Frequency
Response vs Temperature
Large-Signal Step Response
Small-Signal Step Response
20
15
0.75
0.50
2.5
2.0
UNFILTERED DIFFERENTIAL
OUTPUT AT 25°C
V
OUTDIFF
V
OUTDIFF
1.5
10
1.0
5
0.25
0
V
V
INDIFF
INDIFF
0.5
FILTERED
0
DIFFERENTIAL OUTPUT
0
–5
T
= 25°C
A
–0.5
–1.0
–1.5
–2.0
–2.5
–10
–15
–20
–25
T
= –45°C
–0.25
–0.50
–0.75
A
T
= 90°C
A
V
= V
= MID-SUPPLY
OCM
V
V
= V
= 3V
= MID-SUPPLY
OCM
V
= V
= MID-SUPPLY
CM
S
I
CM
S
I
CM
I
S
OCM
V
= 3V
R = 100ꢀ, R = 402ꢀ
F
R = 100ꢀ, R = 402ꢀ
R = 100ꢀ, R = 402ꢀ
V
= 3V
F
F
10
100
FREQUENCY (MHz)
1000
0
3
6
9
12
15
0
3
6
9
12
15
TIME (ns)
TIME (ns)
64044 G13
64044 G15
64044 G14
Distortion vs Input Common Mode
Voltage
Distortion vs Frequency
Distortion vs Output Amplitude
–40
–50
–40
–50
–60
–70
–40
–50
–60
–70
V
V
= V
= MID-SUPPLY
OCM
V
V
= V
= MID-SUPPLY
OCM
V
V
V
= V
= MID-SUPPLY
OCM
CM
S
I
CM
S
I
CM
S
= 3V
= 3V
= 3V
R = 100Ω, R = 402Ω
= 10MHz
R = 100Ω, R = 402Ω
= 10MHz
= 2V
F
F
OUT
P-P
F
–60
f
f
R = 100Ω, R = 402Ω
IN
IN
I
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
DIFFERENTIAL INPUT
SINGLE-ENDED INPUT
–70
–80
–80
–90
–80
–90
HD3
HD3
HD2
–90
HD2
HD3
HD2
HD2
–100
–110
–120
–130
–100
–110
–120
–100
–110
–120
HD2
HD2
HD3
1.0
HD3
HD3
1
0.1
10
100
0
0.5
2.0
2.5
0
1
2
4
)
5
6
1.5
3
+
–
FREQUENCY (MHz)
DC COMMON MODE INPUT (AT IN AND IN PINS) (V)
V
(V
OUTDIFF P-P
64044 G16
64044 G17
64044 G18
6404f
15
LTC6404
LTC6404-4 TYPICAL PERFORMANCE CHARACTERISTICS
LTC6404-4 Driving LTC2207
16-Bit ADC (Two Tones)
LTC6404-4 Driving LTC2207
16-Bit ADC (Single Tone)
0
0
V
V
V
= 3.3V
V
V
V
= 3.3V
S
S
= 2V
= 2V
OUTDIFF
= V
P-P
OUTDIFF
= V
P-P
–20
–20
= 1.25V
= 1.4V
CM
OCM
CM
OCM
R = 100Ω, R = 402Ω
R = 100Ω, R = 402Ω
I
F
I
F
10.1MHz, 64k POINT FFT
= 105Msps
64k POINT FFT
= 105Msps
–40
–60
–40
–60
f
f
SAMPLE
SAMPLE
FUNDAMENTAL = –1dBFS
HD2 = –98.9dBc
9.5MHz, 10.5MHz = –7dBFS
IMD3L = –100.8dBc
HD3 = –99.6dBc
IMD3U = –102dBc
–80
–80
IMD3L
IMD3U
–100
–120
–140
–100
–120
–140
10
20
30
50
0
40
10
20
30
50
0
40
FREQUENCY (MHz)
FREQUENCY (MHz)
64044 G19
64044 G20
LTC6404-4 Noise Figure vs
Frequency
Voltage Noise Density vs
Frequency
100
10
1
28
24
20
16
12
8
V
V
= V
= MID-SUPPLY
OCM
V
V
T
= V
= MID-SUPPLY
OCM
CM
S
I
CM
S
A
= 3V
= 3V
R = 100Ω, R = 402Ω
= 25°C
= 25°C
SEE FIGURE 2 CIRCUIT
F
T
A
COMMON MODE
DIFFERENTIAL INPUT
REFERRED
4
0
0.01
0.1
1
10
100
1000
10
1000
100
FREQUENCY (MHz)
FREQUENCY (MHz)
64044 G21
64044 G22
PIN FUNCTIONS
SHDN (Pin 1): When SHDN is floating or directly tied to
V
(Pin 4): Output Common Mode Reference Voltage.
OCM
+
V , the LTC6404 is in the normal (active) operating mode.
The voltage on V
sets the output common mode
OCM
+
When Pin 1 is pulled a minimum of 2.1V below V , the
voltage level (which is defined as the average of the volt-
ages on the OUT and OUT pins). The V
+
–
LTC6404 enters into a low power shutdown state. See
Applications Information for more details.
pin is the
OCM
midpoint of an internal resistive voltage divider between
the supplies, developing a (default) mid-supply voltage
potential to maximize output signal swing. In general, the
+
–
V , V (Pins 2, 10, 11 and Pins 3, 9, 12): Power Supply
Pins.Threepairsofpowersupplypinsareprovidedtokeep
the power supply inductance as low as possible to prevent
degradation of amplifier 2nd harmonic performance. See
the Layout Considerations section for more detail.
V
OCM
pin can be overdriven by an external voltage refer-
ence capable of driving the input impedance presented
by the V
pin. On the LTC6404-1, the V
pin has a
OCM
OCM
input resistance of approximately 23.5k to a mid-supply
6404f
16
LTC6404
PIN FUNCTIONS
potential. On the LTC6404-2, the V
resistance of approximately 14k. On the LTC6404-4, the
pin has a input
thatthecontinuous(DC+AC
to under 50mA.
)outputcurrentbelimited
OCM
RMS
V
V
pin has a input resistance of approximately 7k. The
pin should be bypassed with a high quality ceramic
OCM
OCM
+
–
OUTF , OUTF (Pins 8, 13): Filtered Output Pins. These
pins have a series 50Ω resistor connected between the
filtered and unfiltered outputs and three 12pF capacitors.
bypass capacitor of at least 0.01ꢁF, (unless you are using
split supplies, then connect directly to a low impedance,
lownoisegroundplane)tominimizecommonmodenoise
from being converted to differential noise by impedance
mismatches both externally and internally to the IC.
+
–
–
BothOUTF andOUTF have12pFtoV , plusanadditional
+
–
12pF differentially between OUTF and OUTF . This filter
creates a differential lowpass frequency response with
a –3dB bandwidth of 88.5MHz. For long-term device
reliability, it is recommended that the continuous (DC +
NC (Pins 5, 16): No Connection. These pins are not con-
nected internally.
AC ) output current be limited to under 40mA.
RMS
+
–
+
–
OUT , OUT (Pins 7, 14): Unfiltered Output Pins. Besides
driving the feedback network, each pin can drive an ad-
ditional 50Ω to ground with typical short-circuit current
limiting of 65mA. Each amplifier output is designed to
drive a load capacitance of 10pF. This basically means
the amplifier can drive 10pF from each output to ground
or 5pF differentially. Larger capacitive loads should be
decoupled with at least 25Ω resistors in series with each
output. For long-term device reliability, it is recommended
IN ,IN (Pins15,6):NoninvertingandInvertingInputPins
of the Amplifier, Respectively. For best performance, it is
highly recommended that stray capacitance be kept to an
absolute minimum by keeping printed circuit connections
asshortaspossible,andifnecessary,strippingbacknearby
surrounding ground plane away from these pins.
–
ExposedPad(Pin17):TiethepadtoV (Pins3,9,and12).
If split supplies are used, do not tie the pad to ground.
BLOCK DIAGRAM
16
15
14
13
+
–
–
IN
OUT
OUTF
NC
+
V
–
–
+
+
V
V
V
V
–
+
V
V
+
V
12pF
–
V
V
66k
SHDN
12
1
2
+
V
50Ω
50Ω
–
–
+
+
V
V
V
+
–
+
11
V
2 • R
2 • R
VOCM
VOCM
–
+
V
V
+
12pF
V
V
OCM
–
+
V
V
V
3
4
10
V
–
–
12pF
V
OCM
–
V
9
–
–
+
+
V
V
V
V
–
V
–
+
V
V
–
+
+
NC
IN
OUT
OUTF
5
6
7
8
6404 BD
IC
2 • R
VOCM
LTC6404-1
LTC6404-2
LTC6404-4
47k
28k
14k
6404f
17
LTC6404
APPLICATIONS INFORMATION
I
L
+
–
R
R
F
I
V
V
OUT
IN
+
–
–
V
OUTF
13
V
INP
16
15
14
+
–
–
NC
IN
OUT
OUTF
LTC6404
SHDN
12pF
–
R
BAL
V
SHDN
–
12
V
V
1
2
SHDN
–
–
0.1μF
50Ω
50Ω
0.1μF
0.1μF
+
+
V
V
V
V
+
+
–
11
V
V
+
V
12pF
OUTCM
+
+
V
V
V
0.1μF
V
OCM
CM
–
+
V
V
V
0.1μF
–
–
3
4
10
V
V
–
12pF
V
OCM
R
BAL
–
V
9
V
OCM
0.1μF
0.01μF
–
+
+
NC
IN
OUT
OUTF
–
+
5
6
7
8
V
+
INM
V
OUTF
I
L
–
+
R
R
F
I
V
V
OUT
IN
6404 F01
Figure 1. DC Test Circuit
0.01μF
0.01μF
+
–
R
R
100Ω
I
F
V
V
OUT
IN
–
V
OUTF
13
16
15
14
+
–
–
NC
IN
OUT
OUTF
LTC6404
SHDN
12pF
–
V
MINI-CIRCUITS
TCM4-19
MINI-CIRCUITS
TCM4-19
SHDN
–
12
V
50Ω
V
1
2
SHDN
–
–
0.1μF
50Ω
50Ω
0.1μF
+
+
V
V
V
+
–
+
+
–
11
V
V
+
12pF
V
50Ω
IN
+
+
V
V
V
0.1μF
OCM
–
+
V
V
V
0.1μF
–
–
3
10
V
V
V
–
12pF
0.1μF
V
OCM
–
V
4
9
V
OCM
0.1μF
0.01μF
–
+
+
NC
IN
OUT
OUTF
5
6
7
8
+
0.01μF
0.01μF
V
OUTF
–
+
R
R
F
100Ω
I
V
V
OUT
IN
6404 F02
Figure 2. AC Test Circuit (–3dB BW testing)
6404f
18
LTC6404
APPLICATIONS INFORMATION
Functional Description
on-chipsinglepoleRCpassivefilterbandlimitsthefiltered
outputs to a –3dB frequency of 88.5MHz. The user has a
choice of using the unfiltered outputs, the filtered outputs,
or modifying the filtered outputs to adjust the frequency
response by adding additional components.
The LTC6404 is a small outline, wide band, low noise,
andlowdistortionfully-differentialamplifierwithaccurate
outputphasebalancing. TheLTC6404isoptimizedtodrive
lowvoltage,single-supply,differentialinput14-bitto18-bit
analog-to-digitalconverters(ADCs).TheLTC6404’soutput
is capable of swinging rail-to-rail on supplies as low as
2.7V,whichmakestheamplifieridealforconvertingground
referenced, single-ended signals into DC level-shifted
differential signals in preparation for driving low voltage,
single-supply, differential input ADCs. Unlike traditional
op amps which have a single output, the LTC6404 has
two outputs to process signals differentially. This allows
for two times the signal swing in low voltage systems
when compared to single-ended output amplifiers. The
balanced differential nature of the amplifier also provides
even-order harmonic distortion cancellation, and less
susceptibility to common mode noise (e.g., power supply
noise). The LTC6404 can be used as a single-ended input
to differential output amplifier, or as a differential input to
differential output amplifier.
In applications where the full bandwidth of the LTC6404 is
+
–
desired,theunfilteredoutputs(OUT andOUT )shouldbe
+
–
used. The unfiltered outputs OUT and OUT are designed
todrive10pFtoground(or5pFdifferentially).Capacitances
greater than 10pF will produce excess peaking, and can
be mitigated by placing at least 25Ω in series with each
output pin.
Input Pin Protection
The LTC6404’s input stage is protected against differential
input voltages which exceed 1.4V by two pairs of back-
to-back diodes connected in anti-parallel series between
+
–
IN and IN (Pins 6 and 15). In addition, the input pins
have steering diodes to either power supply. If the input
pair is overdriven, the current should be limited to under
10mA to prevent damage to the IC. The LTC6404 also has
steering diodes to either power supply on the V
and
The LTC6404’s output common mode voltage, defined
as the average of the two output voltages, is independent
of the input common mode voltage, and is adjusted by
OCM
SHDN pins (Pins 4 and 1), and if forced to voltages which
exceed either supply, they too, should be current-limited
to under 10mA.
applying a voltage on the V
pin. If the pin is left open,
OCM
there is an internal resistive voltage divider that develops
+
–
SHDN Pin
a potential halfway between the V and V pins. Whenever
this pin is not hard tied to a low impedance ground plane,
it is recommended that a high quality ceramic capacitor is
If the SHDN pin (Pin 1) is pulled 2.1V below the posi-
tive supply, circuitry is activated which powers down
the LTC6404. The pin will have the Thevenin equivalent
used to bypass the V
pin to a low impedance ground
OCM
+
plane (See Layout Considerations in this document). The
LTC6404’s internal common mode feedback path forces
accurate output phase balancing to reduce even order
harmonics, and centers each individual output about the
impedance of approximately 66kΩ to V . If the pin is left
unconnected, an internal pull-up resistor of 150k will
keep the part in normal active operation. Care should
be taken to control leakage currents at this pin to under
1μA to prevent inadvertently putting the LTC6404 into
shutdown. In shutdown, all biasing current sources are
potential set by the V
pin.
OCM
–
VOUT+ + VOUT
+
–
shut off, and the output pins, OUT and OUT , will each
appear as open collectors with a non-linear capacitor in
parallel and steering diodes to either supply. Because of
thenon-linearcapacitance,theoutputsstillhavetheability
to sink and source small amounts of transient current if
VOUTCM = VOCM
=
2
+
–
The outputs (OUT and OUT ) of the LTC6404 are capable
of swinging rail-to-rail. They can source or sink up to ap-
proximately 65mA of current.
+
driven by significant voltage transients. The inputs (IN ,
+
–
–
Additional outputs (OUTF and OUTF ) are available that
and IN ) appear as anti-parallel diodes which can conduct
+
–
providefilteredversionsoftheOUT andOUT outputs.An
6404f
19
LTC6404
APPLICATIONS INFORMATION
if voltage transients at the input exceed 1.4V. The inputs
alsohavesteeringdiodestoeithersupply. Theturn-onand
turn-off time between the shutdown and active states is
typically less than 1μs.
of single ended signals to differential output signals to
drive differential input ADCs.
Effects of Resistor Pair Mismatch
In the circuit of Figure 3, it is possible the gain setting
resistors will not perfectly match. Assuming infinite open
loop gain, the differential output relationship is given by
the equation:
General Amplifier Applications
As levels of integration have increased and correspond-
ingly, system supply voltages decreased, there has been
a need for ADCs to process signals differentially in order
to maintain good signal to noise ratios. These ADCs are
typically supplied from a single supply voltage which
can be as low as 3V (2.7V min), and will have an optimal
commonmodeinputrangenearmid-supply.TheLTC6404
makes interfacing to these ADCs easy, by providing both
single-ended to differential conversion as well as com-
mon mode level shifting. The front page of this data sheet
shows a typical application. Referring to Figure 1, the gain
RF
RI
–
VOUTDIFF = VOUT+ – VOUT
≅
• V
+
INDIFF
Δβ
βAVG
Δβ
βAVG
• V
–
• VOCM
INCM
where:
⎛
⎞
RI1
RI2
RI2 +RF2
1
AVG = •
2
β
+
⎜
⎟
R +R
⎝
⎠
I1
F1
to V
from V
and V is:
OUTDIFF
INM
INP
R is the average of R , and R , and R is the average
F
F1
F2
I
RF
RI
–
VOUTDIFF = VOUT+ – VOUT
≈
• VINP – V
(
)
of R , and R .
INM
I1
I2
β
is defined as the average feedback factor (or gain)
AVG
Note from the above equation, the differential output volt-
from the outputs to their respective inputs:
+
–
age (V
– V
) is completely independent of input
OUT
OUT
Δβ is defined as the difference in feedback factors:
and output common mode voltages, or the voltage at
the common mode pin. This makes the LTC6404 ideally
suited for pre-amplification, level shifting and conversion
RI2
RI1
Δβ =
–
RI2 +RF2 RI1+RF1
R
R
I2
F2
–
V
OUT
–
V
OUTF
13
+
–
V
INP
16
15
14
+
–
–
NC
IN
OUT
OUTF
LTC6404
SHDN
–
V
SHDN
–
12
V
V
1
2
SHDN
–
0.1μF
0.1μF
+
+
V
V
V
+
+
–
11
V
V
+
+
+
V
V
V
0.1μF
OCM
–
+
V
V
V
0.1μF
–
–
3
4
10
V
V
–
V
–
0.1μF
V
OCM
–
V
9
V
VOCM
0.1μF
0.01μF
–
+
+
–
+
NC
IN
OUT
OUTF
5
6
7
8
6404 F03
V
INM
+
R
R
F1
I1
V
OUTF
+
V
OUT
Figure 3. Basic Differential Amplifier with Feedback Resistor Pair Mismatch
6404f
20
LTC6404
APPLICATIONS INFORMATION
V
is defined as the average of the two input voltages
Using the LTC6404-1 in a single supply application on a
single5Vsupplywith1%resistors, andtheinputcommon
INCM
V , and V
(also called the source-referred input com-
INP
INM
mon mode voltage):
mode grounded, with the V
pin biased at mid-supply,
OCM
the worst-case DC offset can induce 25mV of apparent
offset voltage. With 0.1% resistors, the worst case appar-
ent offset reduces to 2.5mV.
1
2
V
= • VINP + V
(
)
INCM
INM
and V
voltages:
is defined as the difference of the input
INDIFF
Input Impedance and Loading Effects
The input impedance looking into the V or V
input
INM
INP
V
= V – V
INP INM
INP
INDIFF
of Figure 1 depends on whether the sources V
and
When the feedback ratios mismatch (Δβ), common mode
to differential conversion occurs.
V
are fully differential. For balanced input sources
INM
(V = –V ), the input impedance seen at either input
INP
INM
Setting the differential input to zero (V
gree of common mode to differential conversion is given
by the equation:
= 0), the de-
is simply:
INDIFF
R
INP
= R = R
INM I
For single ended inputs, because of the signal imbalance
at the input, the input impedance increases over the bal-
anced differential case. The input impedance looking into
either input is:
–
VOUTDIFF = VOUT+ – VOUT
Δβ
β
•
AVG
≈ VINCM – VOCM
(
)
⏐
VINDIFF = 0
RI
⎛
RINP =RINM
=
In general, the degree of feedback pair mismatch is a
sourceofcommonmodetodifferentialconversionofboth
signalsandnoise.Using1%resistorsorbetterwillmitigate
mostproblems,andwillprovideabout34dBworst-caseof
commonmoderejection.Using0.1%resistorswillprovide
about 54dB of common mode rejection. A low impedance
ground plane should be used as a reference for both the
⎛
⎞
⎞
RF
1
1– •
2
⎜
⎟
⎜
⎟
R +R
⎝
⎠
⎝
⎠
I
F
Inputsignalsourceswithnon-zerooutputimpedancescan
alsocausefeedbackimbalancebetweenthepairoffeedback
networks. For the best performance, it is recommended
that the source’s output impedance be compensated for.
If input impedance matching is required by the source,
R1 should be chosen (see Figure 4):
input signal source, and the V
pin. A direct short of
OCM
V
to this ground or bypassing the V
with a high
OCM
OCM
quality 0.1μF ceramic capacitor to this ground plane, will
further prevent common mode signals from being con-
verted to differential.
RINM •RS
R1=
RINM –RS
There may be concern on how feedback ratio mismatch
affectsdistortion.Distortioncausedbyfeedbackratiomis-
match using 1% resistors or better is negligible. However,
in single supply level shifting applications where there is
a voltage difference between the input common mode
voltage and the output common mode voltage, resistor
mismatch can make the apparent voltage offset of the
amplifier appear higher than specified.
R
INM
R
R
R
R
F
S
I
R1
V
S
–
+
–
R1 CHOSEN SO THAT R1 || R
= R
S
+
INM
S
R2 CHOSEN TO BALANCE R1 || R
R
I
F
6404 F04
The apparent input referred offset induced by feedback
ratio mismatch is derived from the following equation:
R2 = R || R1
S
V
≈ (V
– V
) • Δβ
OCM
OSDIFF(APPARENT)
ICM
Figure 4. Optimal Compensation for Signal Source Impedance
6404f
21
LTC6404
APPLICATIONS INFORMATION
With singled ended inputs, there is an input signal com-
ponent to the input common mode voltage. Applying only
According to Figure 4, the input impedance looking into
thedifferentialamp(R )reflectsthesingleendedsource
INM
V
(setting V
to zero), the input common voltage is
case, thus:
INP
INM
approximately:
RI
⎛
RINM
=
–
V
+ + V
2
RI
R +R
⎛
⎞
⎛
⎞
⎞
RF
1
1– •
2
IN
IN
V
=
≈ VOCM
•
+
ICM
⎜
⎟
⎜
⎟
⎜
⎟
⎝
⎠
R +R
I
F
⎝
⎠
⎝
⎠
I
F
⎛
⎞
⎛
⎞
RF
R +R
V
RF
R +R
INP
2
VCM
•
+
•
R2 is chosen to balance R1 || R :
S
⎜
⎟
⎜
⎟
⎝
⎠
⎝
⎠
F
I
F
I
RI •RS
R2 =
RI +RS
Output Common Mode Voltage Range
The output common mode voltage is defined as the aver-
age of the two outputs:
Input Common Mode Voltage Range
The LTC6404’s input common mode voltage (V ) is
ICM
–
VOUT+ + VOUT
+
defined as the average of the two input voltages, V , and
VOUTCM = VOCM
The V
=
IN
–
–
+
2
V
. It extends from V to 1.4V below V . The operating
IN
input common mode range depends on the circuit con-
pin sets this average by an internal common
OCM
figuration (gain), V
and V (Refer to Figure 5). For
+
–
OCM
CM
modefeedbackloopwhichinternallyforcesV
=–V
.
OUT
OUT
fully differential input applications, where V = –V
,
INM
INP
Theoutputcommonmoderangeextendsfrom1.1Vabove
the common mode input voltage is approximately:
–
+
V to 1V below V (see the Electrical Characteristics table
for the LTC6404-4 output common mode voltage range).
–
V
+ + V
2
RI
R +R
⎛
⎞
IN
IN
The V
pin sits in the middle of a voltage divider which
sets the default mid-supply open circuit potential.
V
=
≈ VOCM
•
+
OCM
ICM
⎜
⎟
⎝
⎠
I
F
⎛
⎞
RF
R +R
VCM
•
⎜
⎟
⎝
⎠
F
I
R
R
F
I
–
V
OUT
–
V
OUTF
13
+
V
INP
16
15
14
+
–
–
–
NC
IN
OUT
OUTF
LTC6404
SHDN
–
V
SHDN
–
12
V
V
1
2
SHDN
–
0.1μF
0.1μF
+
+
V
V
V
+
+
–
11
V
V
+
V
CM
+
+
V
V
V
0.1μF
OCM
–
+
V
V
V
0.1μF
–
–
3
4
10
V
V
–
V
–
0.1μF
V
OCM
–
V
9
V
VOCM
0.01μF
–
+
+
0.1μF
–
+
NC
IN
OUT
OUTF
5
6
7
8
6404 F05
V
INM
+
R
R
F
V
I
OUTF
+
V
OUT
Figure 5. Circuit for Common Mode Range
6404f
22
LTC6404
APPLICATIONS INFORMATION
In single supply applications, where the LTC6404 is used
to interface to an ADC, the optimal common mode input
range to the ADC is often determined by the ADC’s refer-
ence. If the ADC makes a reference available for setting
the input common mode voltage, it can be directly tied
88.5MHz, and a noise bandwidth of 139MHz. The filter
cutoff frequency is easily modified with just a few external
components.Toincreasethecutofffrequency,simplyadd2
+
+
equalvalueresistors,onebetweenOUT andOUTF andthe
–
–
otherbetweenOUT andOUTF (Figure7).Theseresistors,
in parallel with the internal 50Ω resistor, lower the overall
resistance and therefore increase filter bandwidth. For
example, to double the filter bandwidth, add two external
50Ω resistors to lower the series filter resistance to 25Ω.
The 36pF of capacitance remains unchanged, so filter
bandwidth doubles. Keep in mind, the series resistance
alsoservestodecoupletheoutputsfromloadcapacitance.
The unfiltered outputs of the LTC6404 are designed to
drive 10pF to ground or 5pF differentially, so care should
be taken to not lower the effective impedance between
to the V
pin, but must be capable of driving the input
OCM
impedance presented by the V
as listed in the Electri-
OCM
cal Characteristics Table. This impedance can be assumed
to be connected to a mid-supply potential. If an external
reference drives the V
pin, it should still be bypassed
OCM
with a high quality 0.01μF or larger capacitor to a low
impedance ground plane to filter any thermal noise and
to prevent common mode signals on this pin from being
inadvertently converted to differential signals.
+
+
–
–
Output Filter Considerations and Use
OUT and OUTF or OUT and OUTF below 25Ω.
Filtering at the output of the LTC6404 is often desired to
provide either anti-aliasing or improved signal to noise
ratio. To simplify this filtering, the LTC6404 includes an
additional pair of differential outputs (OUTF and OUTF )
which incorporate an internal lowpass filter network with
a –3dB bandwidth of 88.5MHz (Figure 6).
To decrease filter bandwidth, add two external capacitors,
+
–
one from OUTF to ground, and the other from OUTF to
ground. A single differential capacitor connected between
+
–
+
–
OUTF and OUTF can also be used, but since it is being
driven differentially it will appear at each filtered output
as a single-ended capacitance of twice the value. To halve
the filter bandwidth, for example, two 36pF capacitors
could be added (one from each filtered output to ground).
Alternatively, one 18pF capacitor could be added between
the filtered outputs, again halving the filter bandwidth.
Combinations of capacitors could be used as well; a three
These pins each have a DC output impedance of 50Ω. In-
–
ternal capacitances are 12pF to V on each filtered output,
plus an additional 12pF capacitor connected differentially
between the two filtered outputs. This resistor/capacitor
combination creates filtered outputs that look like a series
50Ω resistor with a 36pF capacitor shunting each filtered
output to AC ground, providing a –3dB bandwidth of
49.9Ω
14
13
–
–
OUT
OUTF
12pF
LTC6404
14
13
–
–
–
LTC6404
OUT
OUTF
12pF
V
12
–
V
–
–
50Ω
50Ω
V
12
–
–
50Ω
50Ω
+
–
V
FILTERED OUTPUT
(176MHz)
12pF
+
–
FILTERED OUTPUT
(88.5MHz)
12pF
V
–
12pF
V
9
V
–
12pF
V
+
+
9
OUT
OUTF
7
8
6404 F07
+
+
OUT
OUTF
49.9Ω
7
8
6404 F06
Figure 7. LTC6404 Filter Topology Modified for 2x Filter
Bandwidth (2 External Resistors)
Figure 6. LTC6404 Internal Filter Topology
6404f
23
LTC6404
APPLICATIONS INFORMATION
capacitor solution of 12pF from each filtered output to
ground plus a 12pF capacitor between the filtered outputs
would also halve the filter bandwidth (Figure 8).
Noise Considerations
The LTC6404’s input referred voltage noise is on the
order of 1.5nV/√Hz. Its input referred current noise is on
the order of 3pA/√Hz. In addition to the noise generated
by the amplifier, the surrounding feedback resistors also
contribute noise. A noise model is shown in Figure 9.
The output noise generated by both the amplifier and the
feedback components is governed by the equation:
14
13
–
–
OUT
OUTF
12pF
LTC6404
12pF
–
V
12
–
–
50Ω
50Ω
V
2
+
–
⎛
⎞
FILTERED OUTPUT
(44.25MHz)
⎛
⎞
RF
RI
2
12pF
eni • 1+
+ 2• I •R
+
12pF
(
)
n
F
⎜
⎟
⎜
⎝
⎟
⎠
⎝
⎠
eno =
2
V
12pF
–
12pF
V
⎛
⎞
⎛
⎞
RF
2
9
2• enRI
•
+ 2•enRF
⎜
⎟
⎜
⎟
R
⎝
⎠
⎝
⎠
I
+
+
OUT
OUTF
7
8
6404 F08
A plot of this equation, and a plot of the noise generated
by the feedback components for the LTC6404 is shown
in Figure 10.
Figure 8. LTC6404 Filter Topology Modified for 1/2x Filter
Bandwidth (3 External Capacitors)
2
2
e
e
nRF2
nRI2
R
I2
R
F2
+2
i
n
16
15
14
13
+
–
–
NC
IN
OUT
OUTF
LTC6404
SHDN
–
V
SHDN
–
+
–
12
V
V
V
1
2
–
–
+
+
V
V
V
+
–
+
–
11
V
V
V
+
+
2
2
V
V
OCM
e
e
no
nof
–
+
V
V
–
3
4
10
V
2
V
e
ncm
–
V
V
OCM
9
–
+
+
NC
IN
OUT
OUTF
5
6
7
8
6404 F09
–2
i
n
2
e
ni
2
2
e
e
nRF1
nRI1
R
I1
R
F1
Figure 9. Noise Model of the LTC6404
6404f
24
LTC6404
APPLICATIONS INFORMATION
100
Layout Considerations
TOTAL (AMPLIFIER AND
FEEDBACK NETWORK)
OUTPUT NOISE
Because the LTC6404 is a very high speed amplifier, it is
sensitive to both stray capacitance and stray inductance.
Three pairs of power supply pins are provided to keep the
power supply inductance as low as possible to prevent
degradation of amplifier 2nd Harmonic performance. It is
criticalthatcloseattentionbepaidtosupplybypassing.For
single supply applications (Pins 3, 9 and 12 grounded) it
is recommended that 3 high quality 0.1μF surface mount
ceramic bypass capacitor be placed between pins 2 and
3, between pins 11and 12, and between pins10 and 9 with
direct short connections. Pins 3, 9 and 10 should be tied
directly to a low impedance ground plane with minimal
routing.Fordual(split)powersupplies,itisrecommended
that at least two additional high quality, 0.1μF ceramic
capacitors are used to bypass pin V to ground and V to
ground,againwithminimalrouting.Fordrivinglargeloads
(<200Ω),additionalbypasscapacitancemaybeneededfor
optimal performance. Keep in mind that small geometry
(e.g.0603)surfacemountceramiccapacitorshaveamuch
higher self resonant frequency than do leaded capacitors,
and perform best in high speed applications.
10
FEEDBACK RESISTOR
NETWORK NOISE ALONE
1
0.1
10
100
1k
10k
R = R (Ω)
F
I
6404 F10
Figure 10. LTC6404-1 Output Spot Noise vs Spot Noise
Contributed by Feedback Network Alone
TheLTC6404’sinputreferredvoltagenoisecontributesthe
equivalent noise of a 140Ω resistor. When the feedback
network is comprised of resistors whose values are less
than this, the LTC6404’s output noise is voltage noise
dominant (See Figure 10.):
+
–
⎛
⎜
⎝
⎞
RF
RI
eno ≈eni • 1+
⎟
⎠
Any stray parasitic capacitances to ground at the sum-
Feedback networks consisting of resistors with values
greater than about 200Ω will result in output noise which
is resistor noise and amplifier current noise dominant.
+
–
ming junctions IN , and IN should be kept to an absolute
minimum even if it means stripping back the ground plane
away from any trace attached to this node. This becomes
especially true when the feedback resistor network uses
⎛
⎞
RF
RI
eno ≈ 2 • I •R 2 + 1+
• 4•k • T •RF
(
)
n
F
⎜
⎟
resistor values >400Ω in circuits with R = R . Excessive
F
I
⎝
⎠
peakinginthefrequencyresponsecanbemitigatedbyadd-
ing small amounts of feedback capacitance (0.5pF to 2pF)
Lowerresistorvalues(<100Ω)alwaysresultinlowernoise
atthepenaltyofincreaseddistortionduetoincreasedload-
ing of the feedback network on the output. Higher resistor
values(butstilllessthan400Ω)willresultinhigheroutput
noise, but improved distortion due to less loading on the
output. The optimal feedback resistance for the LTC6404
runs between 100Ω to 400Ω. Higher resistances are not
recommended.
around R . Always keep in mind the differential nature of
F
theLTC6404, andthatitiscriticalthattheloadimpedances
seen by both outputs (stray or intended) should be as bal-
anced and symmetric as possible. This will help preserve
the natural balance of the LTC6404, which minimizes the
generation of even order harmonics, and preserves the
rejection of common mode signals and noise.
+
–
It is highly recommended that the V
pin be either hard
OCM
ThedifferentialfilteredoutputsOUTF andOUTF willhave
alittlehigherspotnoisethantheunfilteredoutputs(dueto
the two 50Ω resistors which contribute 0.9nV/√Hz each),
but actually will provide superior Signal-to-Noise in noise
bandwidths exceeding 139MHz due to the noise-filtering
function the filter provides.
tied to a low impedance ground plane (in split supply
applications), or bypassed to ground with a high quality
ceramic capacitor whose value exceeds 0.01μF. This will
help stabilize the common mode feedback loop as well as
preventthermalnoisefromtheinternalvoltagedividerand
6404f
25
LTC6404
APPLICATIONS INFORMATION
other external sources of noise from being converted to
differentialnoiseduetodividermismatchesinthefeedback
networks. It is also recommended that the resistive feed-
back networks be comprised of 1% resistors (or better)
to enhance the output common mode rejection. This will
Interfacing the LTC6404 to A/D Converters
TheLTC6404’srail-to-railoutputandfastsettlingtimemake
the LTC6404 ideal for interfacing to low voltage, single
supply, differential input ADCs. The sampling process of
ADCs create a sampling glitch caused by switching in the
samplingcapacitorontheADCfrontendwhichmomentarily
“shorts”theoutputoftheamplifieraschargeistransferred
between the amplifier and the sampling cap. The amplifier
must recover and settle from this load transient before
this acquisition period ends for a valid representation of
the input signal. In general, the LTC6404 will settle much
more quickly from these periodic load impulses than
from a 2V input step, but it is a good idea to either use
the filtered outputs to drive the ADC (Figure 11 shows an
example of this), or to place a discrete R-C filter network
between the differential unfiltered outputs of the LTC6404
andtheinputoftheADCtohelpabsorbthechargetransfer
required during the ADC sampling process. The capaci-
tance of the filter network serves as a charge reservoir
to provide high frequency charging during the sampling
process, while the two resistors of the filter network are
used to dampen and attenuate any charge kickback from
the ADC. The selection of the R-C time constant is trial
and error for a given ADC, but the following guidelines
are recommended: Choosing too large of a resistor in the
decoupling network (leaving insufficient settling time)
also prevent V
referred common mode noise of the
OCM
common mode amplifier path (which cannot be filtered)
from being converted to differential noise, degrading the
differential noise performance.
Feedback factor mismatch has a weak effect on distortion.
Using 1% or better resistors should prevent mismatch
from impacting amplifier linearity. However, in single
supply level shifting applications where there is a voltage
difference between the input common mode voltage and
the output common mode voltage, resistor mismatch can
make the apparent voltage offset of the amplifier appear
worse than specified.
In general, the apparent input referred offset induced by
feedback factor mismatch is given by the equation:
V
≈ (V
– V ) • Δβ
OCM
OSDIFF(APPARENT)
INCM
where
RI2
RI1
Δβ =
–
RI2 +RF2 RI1+RF1
V
2V
IN
P-P
100Ω
NC
100Ω
16
15
14 13
–
+
–
IN
OUT
OUTF
LTC6404-1
SHDN
SHDN
CONTROL
–
V
V
CM
12
2.2μF
1
2
–
–
+
+
V
V
V
D15
•
0.1μF
3.3V
+
+
–
AIN
AIN
11
3.3V
V
V
+
•
+
0.1μF
V
LTC2207
GND
V
D0
OCM
–
+
V
V
V
–
–
3
4
10
3.3V
1μF
V
DD
0.1μF
V
–
1μF
V
OCM
9
0.1μF
–
+
+
NC
IN
OUT
OUTF
5
6
7
8
6404 F11
100Ω
100Ω
Figure 11. Interfacing the LTC6404-1 to a High Speed 105Msps ADC
6404f
26
LTC6404
APPLICATIONS INFORMATION
settling. 16-bit applications typically require a minimum
of 11 R-C time constants. It is recommended that the ca-
pacitor chosen have a high quality dielectric (for example,
C0G multilayer ceramic).
will create a voltage divider between the dynamic input
impedance of the ADC and the decoupling resistors.
Choosing too small of a resistor will possibly prevent the
resistor from properly damping the load transient caused
by the sampling process, prolonging the time required for
PACKAGE DESCRIPTION
UD Package
16-Lead Plastic QFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1691)
0.70 0.05
3.50 0.05
2.10 0.05
1.45 0.05
(4 SIDES)
PACKAGE OUTLINE
0.25 0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
BOTTOM VIEW—EXPOSED PAD
PIN 1 NOTCH R = 0.20 TYP
OR 0.25 × 45° CHAMFER
R = 0.115
TYP
0.75 0.05
3.00 0.10
(4 SIDES)
15 16
PIN 1
TOP MARK
(NOTE 6)
0.40 0.10
1
2
1.45 0.10
(4-SIDES)
(UD16) QFN 0904
0.200 REF
0.25 0.05
0.50 BSC
0.00 – 0.05
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
6404f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LTC6404
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1809/LT1810
Single/Dual 180Mhz, 350V/μs Rail-to-Rail Input and Output
Low Distortion Op Amps
180MHz, 350V/μs Slew Rate, Shutdown
LTC1992/LTC1992-x Fully Differential Input/Output Amplifiers
Programmable Gain or Fixed Gain (G = 1, 2, 5, 10)
LT1994
Low Noise, Low Distortion Fully differential Input/Output
Amplifier/Driver
Low Distortion, 2V , 1MHz: –94dBc, 13mA, Low Noise: 3nV/√Hz
P-P
LTC6400-20
LTC6400-26
LTC6401-8
LTC6401-20
LTC6401-26
LT6402-12
1.8GHz Low Noise, Low Distortion, Differential ADC Driver
1.9GHz Low Noise, Low Distortion, Differential ADC Driver
2.2GHz Low Noise, Low Distortion, Differential ADC Driver
1.3GHz Low Noise, Low Distortion, Differential ADC Driver
1.6GHz Low Noise, Low Distortion, Differential ADC Driver
A = 20dB, 90mA Supply Current, IMD3 = –65dBc at 300MHz
V
A = 26dB, 85mA Supply Current, IMD3 = –71dBc at 300MHz
V
A = 8dB, 45mA Supply Current, IMD3 = –80dBc at 140MHz
V
A = 20dB, 50mA Supply Current, IMD3 = –74dBc at 140MHz
V
A = 26dB, 45mA Supply Current, IMD3 = –72dBc at 140MHz
V
300MHz Low Distortion, Low Noise Differential Amplifier/ADC A = 4V/V, NF = 15dB, OIP3 = 43dBm at 20MHz
Driver
V
LTC6406
3GHz Low Noise, Rail-to-Rail Input Differential ADC Driver
Very Low Noise, Fully Differential Amplifier and 2.5MHz Filter 86dB S/N with 3V Supply, SO-8 Package
Very Low Noise, Fully Differential Amplifier and 5MHz Filter 82dB S/N with 3V Supply, SO-8 Package
Low Noise: 1.6nV/√Hz, Low Power: 18mA
LT6600-2.5
LT6600-5
LT6600-10
LT6600-15
LT6600-20
LTC6403-1
Very Low Noise, Fully Differential Amplifier and 10MHz Filter 82dB S/N with 3V Supply, SO-8 Package
Very Low Noise, Fully Differential Amplifier and 15MHz Filter 76dB S/N with 3V Supply, SO-8 Package
Very Low Noise, Fully Differential Amplifier and 20MHz Filter 76dB S/N with 3V Supply, SO-8 Package
200MHz Low Noise, Low Distortion Differential ADC Driver
10.8mA Supply Current, –95dB Distortion at 3MHz
6404f
LT 0608 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
28
●
●
© LINEAR TECHNOLOGY CORPORATION 2008
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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