LTC6431-15 [Linear]
High Linearity Differential RF/IF Amplifier/ADC Driver; 高线性差分RF / IF放大器/ ADC驱动器
| 型号： | LTC6431-15 |
| 厂家： | 
Linear |
| 描述： | High Linearity Differential RF/IF Amplifier/ADC Driver |
| 文件： | 总28页 (文件大小：1703K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC6430-15
High Linearity Differential
RF/IF Amplifier/ADC Driver
FeaTures
DescripTion
The LTC®6430-15 is a differential gain block amplifier
designed to drive high resolution, high speed ADCs with
excellent linearity beyond 1000MHz and with low associ-
atedoutputnoise. TheLTC6430-15operatesfromasingle
5V power supply and consumes only 800mW.
n
50.0dBm OIP3 at 240MHz into a 100Ω Diff Load
n
NF = 3.0dB at 240MHz
n
20MHz to 2000MHz Bandwidth
15.2dB Gain
n
n
A-Grade 100% OIP3 Tested at 240MHz
n
1.0nV/√Hz Total Input Noise
Initsdifferentialconfiguration,theLTC6430-15candirectly
drive the differential inputs of an ADC. Using 1:2 baluns,
the device makes an excellent 50Ω wideband balanced
amplifier. While using 1:1.33 baluns, the device makes
a high fidelity 50MHz to 1000MHz 75Ω CATV amplifier.
n
S11 < –15dB Up to 1.2GHz
n
S22 < –15dB Up to 1.2GHz
n
>2.75V Linear Output Swing
P-P
n
n
n
n
n
n
n
n
P1dB = 24.0dBm
Insensitive to V Variation
CC
The LTC6430-15 is designed for ease of use, requiring a
minimum of support components. The device is internally
matched to 100Ω differential source/load impedance. On-
chipbiasandtemperaturecompensationensureconsistent
performance over environmental changes.
100Ω Differential Gain-Block Operation
Input/Output Internally Matched to 100Ω Diff
Single 5V Supply
DC Power = 800mW
Unconditionally Stable
4mm × 4mm, 24-Lead QFN Package
The LTC6430-15 uses a high performance SiGe BiCMOS
process for excellent repeatability compared with similar
GaAsamplifiers.AllA-gradeLTC6430-15devicesaretested
and guaranteed for OIP3 at 240MHz. The LTC6430-15 is
housed in a 4mm × 4mm, 24-lead, QFN package with an
exposedpadforthermalmanagementandlowinductance.
For a single-ended 50Ω IF gain block with similar perfor-
applicaTions
n
Differential ADC Driver
n
Differential IF Amplifier
n
OFDM Signal Chain Amplifier
n
50Ω Balanced IF Amplifier
n
75Ω CATV Amplifier
mance, see the related LTC6431-15.
.
n
700MHz to 800MHz LTE Amplifier
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
OIP3 vs Frequency
Typical applicaTion
50
48
46
44
42
40
38
36
Differential 16-Bit ADC Driver
5V
V
CM
R
F
V
= 5V
CC
CHOKES
1:2
BALUN
ADC
V
P
= 5V
LTC6430-15
R
CC
50Ω
= 2dBm/TONE
OUT
IN
Z
T
= Z
= 100Ω DIFF.
OUT
= 25°C
= 100Ω
R
= 100Ω
FILTER
LOAD
A
SOURCE
643015 TA01a
DIFFERENTIAL
DIFFERENTIAL
0
200
400
600
800 1000 1200
FREQUENCY (MHz)
643015 TA01b
643015f
1
LTC6430-15
absoluTe MaxiMuM raTings
pin conFiguraTion
(Note 1)
TOP VIEW
Total Supply Voltage (V to GND)...........................5.5V
CC
Amplifier Output Current (+OUT) .........................105mA
Amplifier Output Current (–OUT).........................105mA
RF Input Power, Continuous, 50Ω (Note 2)........ +15dBm
RF Input Power, 100µs Pulse, 50Ω (Note 2) ......+20dBm
24 23 22 21 20 19
DNC
DNC
DNC
DNC
DNC
DNC
1
2
3
4
5
6
18 +OUT
GND
17
16
Operating Temperature Range (T
) ...–40°C to 85°C
CASE
T_DIODE
25
GND
Storage Temperature Range .................. –65°C to 150°C
15 DNC
GND
Junction Temperature (T ) .................................... 150°C
J
14
13 –OUT
Lead Temperature (Soldering, 10 sec)...................300°C
7
8
9 10 11 12
UF PACKAGE
24-LEAD (4mm × 4mm) PLASTIC QFN
T
= 150°C,
θ
= 40°C/W
JMAX
JC
EXPOSED PAD (PIN 25) IS GND, MUST BE SOLDERED TO PCB
orDer inForMaTion
The LTC6430-15 is available in two grades. The A-grade guarantees a minimum OIP3 at 240MHz while the B-grade does not.
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 85°C
LTC6430AIUF-15#PBF
LTC6430BIUF-15#PBF
LTC6430AIUF-15#TRPBF 43015
LTC6430BIUF-15#TRPBF 43015
24-Lead (4mm × 4mm) Plastic QFN
24-Lead (4mm × 4mm) Plastic QFN
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
Dc elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 100Ω. Typical measured DC electrical
performance using Test Circuit A (Note 3).
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
5.0
MAX
UNITS
V
Operating Supply Range
Total Supply Current
4.75
5.25
V
S
I
I
I
All V Pins Plus +OUT and –OUT
126
93
160
190
216
mA
mA
S,TOT
CC
l
l
l
Total Supply Current to OUT Pins
Current to +OUT and –OUT
112
79
146
14
176
202
mA
mA
S,OUT
VCC
Current to V Pin
Either V Pin May Be Used
12
11
22
26
mA
mA
CC
CC
643015f
2
LTC6430-15
ac elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 100Ω, unless otherwise noted (Note 3).
Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without de-embedding (Note 4).
SYMBOL PARAMETER
Small Signal
CONDITIONS
MIN
TYP
MAX
UNITS
BW
–3dB Bandwidth
De-Embedded to Package (Low Frequency Cut-Off,
20MHz)
2000
MHz
S11
S21
Differential Input Match, 25MHz to 2000MHz De-Embedded to Package
–10
dB
dB
Forward Differential Power Gain, 100MHz to De-Embedded to Package
400MHz
15.1
S12
S22
Reverse Differential Isolation, 25MHz to
4000MHz
De-Embedded to Package
–19
–10
dB
dB
Differential Output Match, 25MHz to 1600MHz De-Embedded to Package
Frequency = 50MHz
S21
Differential Power Gain
De-Embedded to Package
15.2
dB
OIP3
Output Third-Order Intercept Point
P
OUT
= 2dBm/Tone, Δf = 1MHz, Z = 100Ω A-Grade
46.6
45.6
dBm
dBm
O
B-Grade
IM3
Third-Order Intermodulation
P
OUT
= 2dBm/Tone, Δf = 1MHz, Z = 100Ω A-Grade
–89.2
–87.2
dBc
dBc
O
B-Grade
HD2
HD3
P1dB
NF
Second Harmonic Distortion
Third Harmonic Distortion
Output 1dB Compression Point
Noise Figure
P
P
= 8dBm
= 8dBm
–82.0
–95.3
23.8
3.0
dBc
dBc
dBm
dB
OUT
OUT
De-Embedded to Package for Balun Input Loss
Frequency = 140MHz
S21
Differential Power Gain
De-Embedded to Package
15.1
dB
OIP3
Output Third-Order Intercept Point
P
P
= 2dBm/Tone, Δf = 1MHz, Z = 100Ω A-Grade
47.2
46.2
dBm
dBm
OUT
O
B-Grade
IM3
Third-Order Intermodulation
= 2dBm/Tone, Δf = 1MHz, Z = 100Ω A-Grade
–90.4
–88.4
dBc
dBc
OUT
O
B-Grade
HD2
HD3
P1dB
NF
Second Harmonic Distortion
Third Harmonic Distortion
Output 1dB Compression Point
Noise Figure
P
P
= 8dBm
= 8dBm
–82.6
–94.7
23.8
3.0
dBc
dBc
dBm
dB
OUT
OUT
De-Embedded to Package for Balun Input Loss
De-Embedded to Package
Frequency = 240MHz
S21
OIP3
IM3
Differential Power Gain
14.5
14.3
15.1
16.5
16.5
dB
dB
l
Output Third-Order Intercept Point
Third-Order Intermodulation
P
P
= 2dBm/Tone, Δf = 8MHz, Z = 100Ω A-Grade
47.0
50.0
47.0
dBm
dBm
OUT
O
B-Grade
= 2dBm/Tone, Δf = 8MHz, Z = 100Ω A-Grade
–90.0
–96.0
–90.0
dBc
dBc
OUT
O
B-Grade
HD2
HD3
P1dB
NF
Second Harmonic Distortion
Third Harmonic Distortion
Output 1dB Compression Point
Noise Figure
P
P
= 8dBm
= 8dBm
–80.5
–87.0
24.1
3.0
dBc
dBc
dBm
dB
OUT
OUT
De-Embedded to Package for Balun Input Loss
643015f
3
LTC6430-15
ac elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 100Ω, unless otherwise noted (Note 3).
Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without de-embedding (Note 4).
SYMBOL PARAMETER
Frequency = 300MHz
CONDITIONS
MIN
TYP
MAX
UNITS
S21
Differential Power Gain
De-Embedded to Package
15.1
dB
OIP3
Output Third-Order Intercept Point
P
OUT
= 2dBm/Tone, Δf = 1MHz, Z = 100Ω A-Grade
48.5
47.5
dBm
dBm
O
B-Grade
IM3
Third-Order Intermodulation
P
OUT
= 2dBm/Tone, Δf = 1MHz, Z = 100Ω A-Grade
–93.0
–91.0
dBc
dBc
O
B-Grade
HD2
HD3
P1dB
NF
Second Harmonic Distortion
Third Harmonic Distortion
Output 1dB Compression Point
Noise Figure
P
P
= 8dBm
= 8dBm
–76.9
–84.4
23.7
3.2
dBc
dBc
dBm
dB
OUT
OUT
De-Embedded to Package for Balun Input Loss
Frequency = 380MHz
S21
Differential Power Gain
De-Embedded to Package
15.1
dB
OIP3
Output Third-Order Intercept Point
P
P
= 2dBm/Tone, Δf = 1MHz, Z = 100Ω A-Grade
47.5
46.5
dBm
dBm
OUT
O
B-Grade
IM3
Third-Order Intermodulation
= 2dBm/Tone, Δf = 1MHz, Z = 100Ω A-Grade
–91.0
–89.0
dBc
dBc
OUT
O
B-Grade
HD2
HD3
P1dB
NF
Second Harmonic Distortion
Third Harmonic Distortion
Output 1dB Compression Point
Noise Figure
P
P
= 8dBm
= 8dBm
–81.9
–88.0
23.2
3.2
dBc
dBc
dBm
dB
OUT
OUT
De-Embedded to Package for Balun Input Loss
Frequency = 500MHz
S21
Differential Power Gain
De-Embedded to Package
15.0
dB
OIP3
Output Third-Order Intercept Point
P
P
= 2dBm/Tone, Δf = 1MHz, Z = 100Ω A-Grade
47.2
46.2
dBm
dBm
OUT
O
B-Grade
IM3
Third-Order Intermodulation
= 2dBm/Tone, Δf = 1MHz, Z = 100Ω A-Grade
–90.4
–88.4
dBc
dBc
OUT
O
B-Grade
HD2
HD3
P1dB
NF
Second Harmonic Distortion
Third Harmonic Distortion
Output 1dB Compression Point
Noise Figure
P
P
= 8dBm
= 8dBm
–79.0
–90.0
23.4
3.5
dBc
dBc
dBm
dB
OUT
OUT
De-Embedded to Package for Balun Input Loss
Frequency = 600MHz
S21
Differential Power Gain
De-Embedded to Package
15.0
dB
OIP3
Output Third-Order Intercept Point
P
P
= 2dBm/Tone, Δf = 1MHz, Z = 100Ω A-Grade
46.5
45.5
dBm
dBm
OUT
O
B-Grade
IM3
Third-Order Intermodulation
= 2dBm/Tone, Δf = 1MHz, Z = 100Ω A-Grade
–89.0
–87.0
dBc
dBc
OUT
O
B-Grade
HD2
HD3
P1dB
NF
Second Harmonic Distortion
Third Harmonic Distortion
Output 1dB Compression Point
Noise Figure
P
P
= 8dBm
= 8dBm
–72.7
–81.4
23.1
3.5
dBc
dBc
dBm
dB
OUT
OUT
De-Embedded to Package for Balun Input Loss
De-Embedded to Package
Frequency = 700MHz
S21
Differential Power Gain
14.9
dB
643015f
4
LTC6430-15
ac elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 100Ω, unless otherwise noted (Note 3).
Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without de-embedding (Note 4).
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
OIP3
Output Third-Order Intercept Point
P
OUT
= 2dBm/Tone, Δf = 1MHz, Z = 100Ω A-Grade
45.3
44.3
dBm
dBm
O
B-Grade
IM3
Third-Order Intermodulation
P
OUT
= 2dBm/Tone, Δf = 1MHz, Z = 100Ω A-Grade
–86.6
–84.6
dBc
dBc
O
B-Grade
HD2
HD3
P1dB
NF
Second Harmonic Distortion
Third Harmonic Distortion
Output 1dB Compression Point
Noise Figure
P
P
= 8dBm
= 8dBm
–71.4
–79.5
23.0
3.8
dBc
dBc
dBm
dB
OUT
OUT
De-Embedded to Package for Balun Input Loss
Frequency = 800MHz
S21
Differential Power Gain
De-Embedded to Package
14.8
dB
OIP3
Output Third-Order Intercept Point
P
P
= 2dBm/Tone, Δf = 1MHz, Z = 100Ω A-Grade
44.5
43.5
dBm
dBm
OUT
O
B-Grade
IM3
Third-Order Intermodulation
= 2dBm/Tone, Δf = 1MHz, Z = 100Ω A-Grade
–85.0
–83.0
dBc
dBc
OUT
O
B-Grade
HD2
HD3
P1dB
NF
Second Harmonic Distortion
Third Harmonic Distortion
Output 1dB Compression Point
Noise Figure
P
P
= 8dBm
= 8dBm
–71.2
–76.7
22.6
4.0
dBc
dBc
dBm
dB
OUT
OUT
De-Embedded to Package for Balun Input Loss
Frequency = 900MHz
S21
Differential Power Gain
De-Embedded to Package
14.8
dB
OIP3
Output Third-Order Intercept Point
P
P
= 2dBm/Tone, Δf = 1MHz, Z = 100Ω A-Grade
43.7
42.7
dBm
dBm
OUT
O
B-Grade
IM3
Third-Order Intermodulation
= 2dBm/Tone, Δf = 1MHz, Z = 100Ω A-Grade
–83.4
–81.4
dBc
dBc
OUT
O
B-Grade
HD2
HD3
P1dB
NF
Second Harmonic Distortion
Third Harmonic Distortion
Output 1dB Compression Point
Noise Figure
P
P
= 8dBm
= 8dBm
–71.7
–76.5
22.3
4.2
dBc
dBc
dBm
dB
OUT
OUT
De-Embedded to Package for Balun Input Loss
Frequency = 1000MHz
S21
Differential Power Gain
De-Embedded to Package
14.7
dB
OIP3
Output Third-Order Intercept Point
P
P
= 2dBm/Tone, Δf = 1MHz, Z = 100Ω A-Grade
43.5
42.5
dBm
dBm
OUT
O
B-Grade
IM3
Third-Order Intermodulation
= 2dBm/Tone, Δf = 1MHz, Z = 100Ω A-Grade
–83.0
–81.0
dBc
dBc
OUT
O
B-Grade
HD2
HD3
P1dB
NF
Second Harmonic Distortion
Third Harmonic Distortion
Output 1dB Compression Point
Noise Figure
P
P
= 8dBm
= 8dBm
–74.2
–86.0
22.3
4.2
dBc
dBc
dBm
dB
OUT
OUT
De-Embedded to Package for Balun Input Loss
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 3: The LTC6430-15 is guaranteed functional over the case operating
temperature range of –40°C to 85°C.
Note 4: Small signal parameters S and noise are de-embedded to the
package pins, while large signal parameters are measured directly from the
Note 2: Guaranteed by design and characterization. This parameter is not tested.
test circuit.
643015f
5
LTC6430-15
Typical perForMance characTerisTics TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 100Ω,
unless otherwise noted (Note 3). Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without
de-embedding (Note 4).
Differential S Parameters
vs Frequency
Differential Stability Factor K
vs Frequency Over Temperature
Noise Figure vs Frequency
Over Temperature
25
20
8
7
6
5
4
3
2
1
0
10
9
8
7
6
5
4
3
2
1
0
T
=
CASE
T
=
CASE
100°C
–40°C
25°C
85°C
15
85°C
60°C
35°C
25°C
0°C
S11
S21
S12
S22
10
5
0
–20°C
–40°C
–5
–10
–15
–20
–25
–30
0
500 1000 1500 2000 2500 3000
0
1000
3000
2000
FREQUENCY (MHz)
4000
5000
50
250
450
650
850 1050 1250
FREQUENCY (MHz)
FREQUENCY (MHz)
643015 G01
643015 G02
643015 G03
Differential Reverse Isolation
(S12DD) vs Frequency Over
Temperature
Differential Input Match (S11DD
)
Differential Gain (S21DD
)
vs Frequency Over Temperature
vs Frequency Over Temperature
0
–5
16
15
14
13
12
11
10
0
–5
T
=
T
=
CASE
CASE
100°C
100°C
85°C
60°C
35°C
25°C
0°C
85°C
60°C
35°C
25°C
0°C
–10
–15
–20
–25
–30
–10
–15
–20
–25
T
=
CASE
–20°C
–40°C
–20°C
–40°C
100°C
85°C
60°C
35°C
25°C
0°C
–20°C
–40°C
0
1000
1500
2000
500
0
1000
1500
2000
500
0
1000
1500
2000
500
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
643015 G04
643015 G05
643015 G06
Differential Output Match (S22DD
)
Common Mode Gain (S21CC
)
CM-DM Gain (S21DC
)
vs Frequency Over Temperature
vs Frequency Over Temperature
vs Frequency Over Temperature
0
–5
16
15
14
13
12
11
10
9
0
–5
T
=
CASE
100°C
85°C
60°C
35°C
25°C
0°C
–10
–15
–20
–25
–30
–35
–40
–45
–50
–10
–15
–20
–25
–30
T
=
CASE
T
=
CASE
–20°C
–40°C
100°C
100°C
85°C
60°C
35°C
25°C
0°C
85°C
60°C
35°C
25°C
0°C
8
7
–20°C
–40°C
6
–20°C
–40°C
5
0
1000
1500
2000
0
1000
1500
2000
500
500
0
500
1500
FREQUENCY (MHz)
2000
1000
FREQUENCY (MHz)
FREQUENCY (MHz)
643015 G07
643015 G08
643015 G09
643015f
6
LTC6430-15
Typical perForMance characTerisTics TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 100Ω,
unless otherwise noted (Note 3). Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without
de-embedding (Note 4).
OIP3 vs RF Power Out/Tone
Over Frequency
OIP3 vs Frequency Over
VCC Voltage
OIP3 vs Frequency
50
48
46
44
42
40
38
36
34
32
30
50
48
46
44
42
40
38
36
50
48
46
44
42
40
38
36
34
32
30
V
= 5V
OUT
= 25°C
CC
IN
Z
T
= Z
= 100Ω
A
T
=
CASE
V
CC
V
CC
V
CC
V
CC
= 4.5V
= 4.75V
= 5V
50MHz
100MHz
200MHz
300MHz
400MHz
600MHz
800MHz
1000MHz
= 5.25V
V
P
= 5V
CC
= 2dBm/TONE
P
= 2dBm/TONE
OUT
OUT
IN
Z
T
= Z
= 100Ω DIFF.
Z
T
= Z
= 100Ω
OUT
OUT
IN
A
= 25°C
= 25°C
A
–10 –6 –4 –2
–8
0
2
4
6
8
10
0
200
400
600
800 1000 1200
0
200 300 400 500 600 700 800 9001000
100
FREQUENCY (MHz)
RF P
OUT
(dBm/TONE)
FREQUENCY (MHz)
643015 G10
643015 G11
643015 G12
OIP3 vs Tone Spacing Over
Frequency
OIP3 vs Frequency Over
Temperature
HD2 vs Frequency Over POUT
51
50
49
48
47
46
45
44
43
42
41
40
55
50
45
40
35
30
25
20
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
P
P
P
= 6dBm
= 8dBm
= 10dBm
OUT
OUT
OUT
V
= 5V
OUT
= 25°C
CC
IN
Z
T
= Z
= 100Ω
A
T
=
CASE
85°C
60°C
25°C
0°C
–20°C
–30°C
–40°C
50MHz
400MHz
600MHz
800MHz
1000MHz
V
P
f
= 5V
SUP
OUT
100MHz
200MHz
300MHz
= 2dBm/TONE
= 1MHz
SPACE
Z
= Z
= 100Ω
IN
OUT
0
200 300 400
500
600
9001000
700 800
0
300 400 500 600 700 800 9001000
0
10
30
TONE SPACING (MHz)
40
50
100 200
20
100
FREQUENCY (MHz)
FREQUENCY (MHz)
643015 G13
643015 G14
643015 G15
V
P
= 5V
OUT
Z
T
= Z
= 100Ω
OUT
CC
IN
A
= 2dBm/TONE
= 25°C
HD3 vs Frequency Over POUT
HD4 vs Frequency Over POUT
–30
–40
–50
–60
–70
–80
–90
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
P
P
P
= 6dBm
= 8dBm
= 10dBm
P
P
P
= 6dBm
= 8dBm
= 10dBm
OUT
OUT
OUT
OUT
OUT
OUT
V
Z
= 5V
= Z
V
Z
= 5V
= Z
CC
CC
IN
= 100Ω
= 100Ω
IN
A
OUT
OUT
T
= 25°C
NOISE FLOOR LIMITED
–100
–110
0
200 300 400 500 600 700 800 9001000
100
0
200 300 400 500 600 700 800 9001000
100
FREQUENCY (MHz)
FREQUENCY (MHz)
643015 G16
643015 G17
643015f
7
LTC6430-15
Typical perForMance characTerisTics TA = 25°C, VCC = 5V, ZSOURCE = ZLOAD = 100Ω,
unless otherwise noted (Note 3). Measurements are performed using Test Circuit A, measuring from 50Ω SMA to 50Ω SMA without
de-embedding (Note 4).
Output Power vs Input Power
Over Frequency
P1dB vs Frequency
Total Current (ITOT) vs VCC
25
24
23
22
21
20
19
18
17
16
15
25
24
23
22
21
20
180
170
160
150
140
130
120
110
100
T
= 25°C
V
= 5V
OUT
= 25°C
CASE
CC
IN
Z
T
= Z
= 100Ω
A
3
4
4.5
V
5
(V)
5.5
6
6.5
2
4
5
6
7
8
9
10 11 12
0
200 300 400 500 600 700 800 9001000
100
3.5
3
INPUT POWER (dBm)
FREQUENCY (MHz)
CC
643015 G20
643015 G18
643015 G19
100MHz, P1dB = 23.8dBm
200MHz, P1dB = 24.1dBm
400MHz, P1dB = 23.5dBm
600MHz, P1dB = 23.1dBm
800MHz, P1dB = 22.6dBm
1000MHz, P1dB = 22.3dBm
Total Current (ITOT
)
Total Current vs RF Input Power
vs Case Temperature
170
150
130
110
90
175
170
165
160
155
150
145
140
70
V
T
= 5V
CC
A
V
= 5V
= 25°C
CC
50
–5
0
5
10
15
20
–20
0
20 40 60 80 100
–15 –10
–60 –40
RF INPUT POWER (dBm)
CASE TEMPERATURE (°C)
643015 G21
643015 G22
643015f
8
LTC6430-15
pin FuncTions
GND (Pins 8, 14, 17, 23, Exposed Pad Pin 25): Ground.
For best RF performance, all ground pins should be con-
nected to the printed circuit board ground plane. The
exposed pad (Pin 25) should have multiple via holes to
an underlying ground plane for low inductance and good
thermal dissipation.
+OUT(Pin18):PositiveAmplifierOutputPin.Atransformer
with a center tap tied to V or a choke inductor tied to 5V
CC
supply is required to provide DC current and RF isolation.
For best performance select a choke with low loss and
high self resonant frequency (SRF). See the Applications
Information section for more information.
+IN (Pin 24): Positive Signal Input Pin. This pin has an
internally generated 2V DC bias. A DC-blocking capacitor
is required. See the Applications Information section for
specific recommendations.
–OUT (Pin 13): Negative Amplifier Output Pin. A trans-
former with a center tap tied to V or a choke inductor is
CC
required to provide DC current and RF isolation. For best
performance select a choke with low loss and high SRF.
–IN (Pin 7): Negative Signal Input Pin. This pin has an
internally generated 2V DC bias. A DC-blocking capacitor
is required. See the Applications Information section for
specific recommendations.
DNC (Pins 1 to 6, 10 to 12, 15, 19 to 21): Do Not Connect.
Do not connect these pins, allow them to float. Failure
to float these pins may impair the performance of the
LTC6430-15.
V
CC
(Pins 9, 22): Positive Power Supply. Either or both
T_DIODE(Pin16):Optional.Adiodewhichcanbeforward
biasedtogroundwithupto1mAofcurrent. Themeasured
voltage will be an indicator of the chip temperature.
CC
V
pins should be connected to the 5V supply. Bypass
theV pinwith1000pFand0.1µFcapacitors. The1000pF
CC
capacitor should be physically close to a V pin.
CC
block DiagraM
V
CC
9, 22
BIAS AND TEMPERATURE
COMPENSATION
+IN
+OUT
T_DIODE
–OUT
15dB
GAIN
24
18
16
13
–IN
15dB
GAIN
7
GND
8, 14, 17, 23 AND PADDLE 25
643015 BD
643015f
9
LTC6430-15
Differential Application Test Circuit A (Balanced Amp)
TesT circuiT a
C7
60pF
C1
1000pF
R1
350Ω
L1
560nH
C3
1000pF
PORT
T1
DNC
DNC
DNC
DNC
DNC
DNC
+OUT
GND
T2
INPUT
1:2
2:1
•
•
RF
IN
T_DIODE
DNC
PORT
OUTPUT
50Ω, SMA
LTC6430-15
C4
1000pF
BALUN_A
GND
BALUN_A
RF
C8
OUT
–OUT
60pF
50Ω, SMA
C2
1000pF
L2
560nH
R2
350Ω
C5
1nF
C6
0.1µF
V
= 5V
643015 F01
CC
BALUN_A = ADT2-IT FOR 50MHz TO 300MHz
BALUN_A = ADT2-1P FOR 300MHz TO 400MHz
BALUN_A = ADTL2-18 FOR 400MHz TO 1000MHz
ALL ARE MINI-CIRCUITS CD542 FOOTPRINT
Figure 1. Test Circuit A
operaTion
The LTC6430-15 is a highly linear, fixed-gain amplifier
for differential signals. It can be considered a pair of 50Ω
single-endeddevicesoperating180degreesapart.Itscore
signal path consists of a single amplifier stage minimiz-
ing stability issues. The input is a Darlington pair for high
input impedance and high current gain. Additional circuit
enhancements increase the output impedance commen-
surate with the input impedance and minimize the effects
of internal Miller capacitance.
The LTC6430-15 uses a classic RF gain block topology,
with enhancements to achieve excellent linearity. Shunt
andseriesfeedbackelementsareaddedtolowertheinput/
output impedance and match them simultaneously to the
source and load. An internal bias controller optimizes the
bias point for peak linearity over environmental changes.
Thiscircuitarchitectureprovideslownoise,goodRFpower
handling capability and wide bandwidth; characteristics
that are desirable for IF signal-chain applications.
643015f
10
LTC6430-15
applicaTions inForMaTion
The LTC6430-15 is a highly linear fixed-gain amplifier
which is designed for ease of use. Both the input and
output are internally matched to 100Ω differential source
andloadimpedancefrom20MHzto1700MHz.Biasingand
temperature compensation are also handled internally to
deliver optimized performance. The designer need only
supply input/output blocking capacitors, RF chokes and
decouplingcapacitorsforthe5Vsupply.However,because
the device is capable of such wideband operation, a single
application circuit will probably not result in optimized
performance across the full frequency band.
Choosing the Right RF Choke
Not all choke inductors are created equal. It is always im-
portant to select an inductor with low R
as resistance
LOSS
will drop the available voltage to the device. Also look for
aninductorwithhighselfresonantfrequency(SRF)asthis
will limit the upper frequency where the choke is useful.
Above the SRF, the parasitic capacitance dominates and
the choke’s impedance will drop. For these reasons, wire-
wound inductors are preferred, while multilayer ceramic
chip inductors should be avoided for an RF choke if pos-
sible. Since the LTC6430-15 is capable of such wideband
operation, a single choke value will not result in optimized
performance across its full frequency band. Table 1 lists
common frequency bands and suggested corresponding
inductor values.
Differential circuits minimize the common mode noise
and 2nd harmonic distortion issues that plague many
designs. Additionally, the LTC6430’s differential topol-
ogy matches well with the differential inputs of an ADC.
However, evaluation of these differential circuits is dif-
ficult, as high resolution, high frequency, differential test
equipment is lacking.
Table 1. Target Frequency and Suggested Inductor Value
INDUCTOR
FREQUENCY
BAND (MHz)
VALUE
(nH)
SRF
(MHz)
MODEL
NUMBER MANUFACTURER
Our test circuit is designed for evaluation with standard
single ended 50Ω test equipment. Therefore, 1:2 balun
transformers have been added to the input and output to
transformtheLTC6430-15’s100Ωdifferentialsource/load
impedance to 50Ω single-ended impedance compatible
with most test equipment.
20 to 100
1500nH
560nH
100nH
51nH
100
525
0603LS Coilcraft
www.coilcraft.com
100 to 500
500 t o 1000
1000 to 2000
0603LS
1150
1400
0603LS
0603LS
DC-Blocking Capacitor
Other than the balun, the evaluation circuit requires a
minimum of external components. Input and output DC-
blockingcapacitorsarerequiredasthisdeviceisinternally
biased for optimal operation. A frequency appropriate
choke and de-coupling capacitors provide DC bias to the
RF OUT nodes. Only a single 5V supply is necessary to
The role of a DC-blocking capacitor is straightforward:
block the path of DC current and allow a low series imped-
ance path for the AC signal. Lower frequencies require a
highervalueofDC-blockingcapacitance.Generally,1000pF
to 10,000pF will suffice for operation down to 20MHz.
The LTC6430-15 linearity is insensitive to the choice of
blocking capacitor.
either of the V pins on the device. Both V pins are
CC
CC
connected inside the package. Two V pins are provided
CC
for the convenience of supply routing on the PCB. An op-
tional parallel 60pF, 350Ω input network has been added
to ensure low frequency stability.
RF Bypass Capacitor
RF bypass capacitors act to shunt the AC signals to
ground with a low impedance path. They prevent the AC
signal from getting into the DC bias supply. It is best to
place the bypass capacitor as close as possible to the DC
supply pins of the amplifier. Any extra distance translates
into additional series inductance which lowers the effec-
tiveness of the bypass capacitor network. The suggested
bypass capacitor network consists of two capacitors:
The particular element values shown in Test Circuit A are
chosen for wide bandwidth operation. Depending on the
desired frequency, performance may be improved by
custom selection of these supporting components.
a low value 1000pF capacitor to shunt high frequencies
643015f
11
LTC6430-15
applicaTions inForMaTion
and a larger 0.1µF capacitor to handle lower frequencies.
Use ceramic capacitors of appropriate physical size for
each capacitance value (e.g., 0402 for the 1000pF, 0805
for the 0.1µF) to minimize the equivalent series resistance
(ESR) of the capacitor.
backside of the PCB to prevent the solder from wicking
away from the critical PCB to exposed pad interface. One
to two ounces of copper plating is suggested to improve
heat spreading from the device.
Frequency Limitations
Low Frequency Stability
The LTC6430-15 is a wide bandwidth amplifier but it is not
intended for operation down to DC. The lower frequency
cutoff is limited by on-chip matching elements. The cutoff
may be arbitrarily pushed lower with off chip elements;
however, the translation between the low fixed DC com-
mon mode input voltage and the higher open collector
DC common mode output bias point make DC-coupled
operation impractical.
Most RF gain blocks suffer from low frequency instabil-
ity. To avoid stability issues, the LTC6430-15, contains
an internal feedback network that lowers the gain and
matches the input and output impedance of the intrinsic
amplifier. This feedback network contains a series capaci-
tor, whose value is limited by physical size. So, at some
lowfrequencies,thisfeedbackcapacitorlookslikeanopen
circuit;thefeedbackfails,gainincreasesandgrossimped-
ance mismatches occur which can create instability. This
situation is easily resolved with a parallel capacitor and a
resistor network on the input. This is shown in Figure 1.
This network provides resistive loss at low frequencies
and is bypassed by the capacitor at the desired band of
operation. However, if the LTC6430-15 is preceded by
a low frequency termination, such as a choke or balun
transformer, the input stability network is not required.
A choke at the output can also terminate low frequencies
out-of-band and stabilize the device.
Test Circuit A
Test Circuit A, shown in Figure 1, is designed to allow for
the evaluation of the LTC6430-15 with standard single-
ended 50Ω test equipment. This allows the designer to
verify the performance when the device is operated dif-
ferentially. This evaluation circuit requires a minimum of
externalcomponents.SincetheLTC6430-15operatesover
averywideband,theevaluationtestcircuitisoptimizedfor
widebandoperation.Obviously,fornarrowbandoperation,
the circuit can be further optimized.
Input and output DC-blocking capacitors are required, as
thisdeviceisinternallyDCbiasedforoptimalperformance.
A frequency appropriate choke and decoupling capacitors
are required to provide DC bias to the RF output nodes
(+OUT and –OUT). A 5V supply should also be applied to
Exposed Pad and Ground Plane Considerations
AswithanyRFdevice,minimizingthegroundinductanceis
critical. Care should be taken with PC board layouts using
exposed pad packages, as the exposed pad provides the
lowest inductive path to ground. The maximum allowable
number of minimum diameter via holes should be placed
underneath the exposed pad and connected to as many
ground plane layers as possible. This will provide good RF
groundandlowthermalimpedance.Maximizingthecopper
ground plane at the signal and microstrip ground will also
improve the heat spreading and lower inductance. It is a
good idea to cover the via holes with solder mask on the
one of the V pins on the device.
CC
Components for a suggested parallel 60pF, 350Ω stabil-
ity network have been added to ensure low frequency
stability.The60pFcapacitancecanbeincreasedtoimprove
low frequency (<150 MHz) performance, however the
designer needs to be sure that the impedance presented
at low frequency will not create an instability.
643015f
12
LTC6430-15
applicaTions inForMaTion
Balanced Amplifier Circuit, 50Ω Input and 50Ω Output
the circuit as a comprehensive protection for any passive
element placed at the LTC6430-15 input. Its performance
degradationatlowfrequenciescanbemitigatedbyincreas-
ing the 60pF capacitor’s value.
This balanced amplifier circuit is a replica of the Test
CircuitA.Itisusefulforsingle-ended50Ωamplifierrequire-
ments and is surprisingly wideband. Using this balanced
arrangement and the frequency appropriate baluns, one
canachievetheintermodulationandharmonicperformance
listed in the AC Electrical Characteristics specifications
of this data sheet. Besides its impressive intermodula-
tion performance, the LTC6430-15 has impressive 2nd
harmonic suppression as well. This makes it particularly
well suited for multioctave applications where the 2nd
harmonic cannot be filtered.
Demo Boards 1774A-A and 1774A-B implement this
balanced amplifier circuit. It is shown in Figure 18 and
Figure 19.
Please note that a number of DNC pins are connected on
theevaluationboard.Theseconnectionsarenotnecessary
for normal circuit operation.
The evaluation board also includes an optional back to
back pair of baluns so that their losses may be measured.
Thisallowsthedesignertode-embedthebalunlossesand
more accurately predict the LTC6430-15 performance in
a differential circuit.
This balanced circuit example uses two Mini-Circuits 1:2
baluns. The baluns were chosen for their bandwidth and
frequency options that utilize the same package footprint
(see Table 2). A pair of these baluns, back-to-back has
less than 1.5dB of loss, so the penalty for this level of
performance is minimal. Any suitable 1:2 balun may be
used to create a balanced amplifier with the LTC6430-15.
Table 2. Target Frequency and Suggested 2:1 Balun
FREQUENCY BAND (MHz)
50 to 300
MODEL NUMBER
ADT2-1T
MANUFACTURER
Mini-Circuits
www.minicircuits.com
300 to 400
ADT2-1P
The optional stability network is only required when the
balun’s bandwidth reaches below 20MHz. It is included in
400 to 1300
ADTL2-18
C7
60pF
C1
1000pF
R1
350Ω
L1
560nH
C3
1000pF
PORT
T1
T2
INPUT
DNC
DNC
DNC
DNC
DNC
DNC
+OUT
GND
1:2
2:1
100Ω
•
•
RF
IN
50Ω, SMA
100Ω
T_DIODE
DNC
DIFFERENTIAL
PORT
OUTPUT
DIFFERENTIAL
C4
1000pF
LTC6430-15
BALUN_A
GND
BALUN_A
RF
OUT
50Ω, SMA
C8
60pF
–OUT
C2
1000pF
L2
560nH
R2
350Ω
C5
1000pF
C6
0.1µF
643015 F02
V
= 5V
CC
OPTIONAL STABILITY
NETWORK
BALUN_A = ADT2-1T FOR 50MHz TO 300MHz
BALUN_A = ADT2-1P FOR 300MHz TO 400MHz
BALUN_A = ADTL2-18 FOR 400MHz TO 1300MHz
ALL ARE MINI-CIRCUITS CD542 FOOTPRINT
Figure 2. Balanced Amplifier Circuit, 50Ω Input and 50Ω Output
643015f
13
LTC6430-15
applicaTions inForMaTion
Driving the LTC2158, 14-Bit, 310Msps ADC with
1.25GHz of Bandwidth
by internal clock jitter and high input signal amplitude.
Table 3 shows noise and linearity performance. Example
outputs at 380MHz and 1000MHz are shown in Figure 5,
Figure 6, Figure 7, Figure 8 and Figure 9.
Boasting high linearity, low associated noise and wide
bandwidth, the LTC6430-15 is well suited to drive high
speed, high resolution ADCs with over a GHz of input
bandwidth.To demonstrateitsperformance,theLTC6430-
15 was used to drive an LTC2158 14-bit, 310Msps ADC
with 1.25GHz of input bandwidth in an undersampling
application. Typically, a filter is used between the ADC
driver amplifier and ADC input to minimize the noise
contribution from the amplifier. However, with the typical
SNR of higher sample rate ADCs, the LTC6430-15 can
drive them without any intervening filter, and with very
little penalty in SNR. This system approach has the added
benefit of allowing over two octaves of usable frequency
range. The LTC6430-15 driving the LTC2158, as shown
in the circuit in Figure 3, with band limiting provided
only by the 1.25GHz input BW of the ADC, still produces
64.4dB SNR, and offers IM performance that varies little
from 300MHz to 1GHz. At the lower end of this frequency
range, the IM contribution of the ADC and amplifier are
comparable, and the third-order IM products may be ad-
ditive, or may see cancelation. At 1GHz input, the ADC is
dominant in terms of IM and noise contribution, limited
AsafinaldisplayoftheutilityofthisLTC6430-15/LTC2158
combination with real world signals, Figure 9 shows a
wideband code division multiple access (WCDMA) signal
wasintroducedtotheLTC6430-15/LTC2158combination
at 830MHz. The output indicates an ACPR near 60dB cal-
culated from the adjacent power on the upper side where
the filter stop band suppresses the contribution from
the generator. Please note that the adjacent channels on
the lower side are not suppressed as they are within the
passband of the filter.
The LTC6430-15 can directly drive the high speed ADC
inputsandsettlesquickly.Mostfeedbackamplifiersrequire
protection from the sampling disturbances, the mixing
products that result from direct sampling. This is in part
due to the fact that unless the ADC input driving circuitry
offers settling in less than one-half clock cycle, the ADC
may not exhibit the expected linearity. If the ADC samples
the recovery process of an amplifier it will be seen as
distortion. If an amplifier exhibits envelope detection in
Table 3. LTC6430-15 and LTC2158 Combined Performance
IM3
(Low, Hi)
(dBFS)
HD3
(3rd Harmonic)
(dBc)
Frequency
(MHz)
Sample Rate
(Msps)
SFDR
(dB)
SNR
(dB)
380
533
656
690
842
1000
310
(–98, –105)
–80.2
–82.2
68.7
79.3
61.8
59.4
307.2
291.8
307.2
307.2
307.2
(–94, –92)
(–93, –92)
–80.8
–78
70.5
66.7
69.3
58.2
57.1
56.0
(–83,–83)
–89.7
643015f
14
LTC6430-15
applicaTions inForMaTion
V
5V
CM
49.9Ω
560nH
0402AF
60pF
1nF
GUANELLA
BALUN
V
= 5V
CC
1nF
150Ω
350Ω
100nH
0402CS
LTC6430-15
LTC2158
MA/COM
ETC1-1-13
643015 F03
200ps
Figure 3. Wideband ADC Driver, LTC6430-15 Directly Driving the LTC2158 ADC
V
5V
CM
49.9Ω
560nH
0402AF
60pF
1nF
V
= 5V
CC
1nF
MINI-CIRCUITS
ADTL2-18
2:1 BALUN
350Ω
100nH
0402CS
LTC6430-15
LTC2158
643015 F04
200ps
Figure 4. Wideband ADC Driver, LTC6430-15 Directly Driving the LTC2158 ADC—Alternative Using Mini Circuits 2:1 Balun
the presence of multi GHz mixing products, it will distort.
A band limiting filter would provide suppression from
those products beyond the capability of the amplifier, as
well as limit the noise bandwidth, however the settling of
the filter can be an issue. The LTC2158, at 310Msps only
allows 1.5ns settling time for any driver that is disturbed
by these transients.
mission line distances shown in the schematic are part
of the design, and are devised such that there are no
impedance discontinuities, and therefore no reflections,
in the distances between 75ps to 200ps from the ADC.
End termination can be immediately prior to, or preferably
after the ADC, and the amplifier should either be within
the 75ps inner boundary, or outside the 200ps distance.
Similarly, any shunt capacitor or resonator, including the
large pads required by some inductors with more than a
small fraction of 1pF, incorporated into a filter, should not
be in this range of distances from the ADC where reflec-
tions will impair performance. Transformers with large
643015f
This approach of removing the filter between the ADC
and driver amplifier offers many advantages. It opens
the opportunity to precede the amplifier with switchable
bandpass filters, without any need to change the critical
network between the drive amplifier and ADC. The trans-
15
LTC6430-15
applicaTions inForMaTion
pads should be avoided within these distances.
place the termination resistors on the back of the PCB. If
the input signal path is buried or on the back of the PCB,
termination resistors should be placed on the top of the
PCB to properly terminate after the ADC.
A 100nH shunt inductor at the ADC input approximates
the complex conjugate of the ADC sampling circuit, and in
doingso,improvespowertransferandsuppressesthelow
frequencydifferenceproductsproducedbydirectsampling
ADCs. If the entire frequency range from 300MHz to 1GHz
wereofinterest,a100nHinductorattheinputisacceptable,
but if interest is only in higher frequencies, performance
would be better if the input inductor is reduced in value.
If lower frequencies are of interest, a higher value up to
some 200nH may be practical, but beyond that range the
SRF of the inductor becomes an issue. As this inductor
is placed at different distances either before or after the
ADC inputs, the optimal value may change. In all cases, it
should be within 50ps of the ADC inputs. End termination
may be more than 200ps distant if after the ADC. If the
end termination were perfect, it could be at any distance
after the ADC. To terminate the input path after the ADC,
Although the ADC is isolated by a driver amplifier, care
must be taken when filtering at the amplifier input. Much
likeMESFETs,highfrequencymixingproductsarehandled
well by the LTC6430. However, if there is no band limiting
after the LTC6430, these mixing products, reduced by
reverse isolation but subsequently reflected from a filter
prior to the LTC6430 and reamplified, can cause distor-
tion. In such cases, the network will then be sensitive to
transmission line lengths and impedance characteristics
of the filter prior to the LTC6430. Diplexers or absorptive
filters can produce more robust results. An absorptive
filter or diplexer-like structure after the amplifier reduces
the sensitivity to the network prior to the amplifier, but the
same constraints previously outlined apply to the filter.
Figure 5. ADC Output: 1-Tone Test at 380MHz with 310Msps Sampling Rate Undersampled in the Third Nyquist Zone
643015f
16
LTC6430-15
applicaTions inForMaTion
Figure 6. ADC Output: 2-Tone Test at 380MHz with 310Msps Sampling Rate Undersampled in the Third Nyquist Zone
Figure 7. ADC Output: 1-Tone Test at 1000MHz with 307.2Msps Sampling Rate Undersampled in the Seventh Nyquist Zone
643015f
17
LTC6430-15
applicaTions inForMaTion
Figure 8. ADC Output: 2-Tone Test at 1000MHz with 307.2Msps Sampling Rate Undersampled in the Seventh Nyquist Zone
Figure 9. ADC Output: WCDMA Test at 830MHz IF Using 30MHz Wide Diplexer Prior to the LTC6430-15
643015f
18
LTC6430-15
applicaTions inForMaTion
50MHz to 1000MHz CATV Push-Pull Amplifier:
75Ω Input and 75Ω Output
C1
0.047µF
L1
560nH
C3
0.047µF
PORT
T1
T2
1.33:1
INPUT
DNC
DNC
DNC
DNC
DNC
DNC
+OUT
GND
1:1.33
100Ω
DIFFERENTIAL
100Ω
•
•
RF
IN
T_DIODE
DNC
DIFFERENTIAL
PORT
OUTPUT
75Ω,
CONNECTOR
LTC6430-15
C4
0.047µF
GND
BALUN_A
BALUN_A
RF
OUT
–OUT
75Ω,
CONNECTOR
C2
0.047µF
L2
560nH
C5
1000pF
C6
0.1µF
BALUN_A = TC1.33-282+ FOR 50MHz TO 1000MHz
MINI-CIRCUITS 1:1.33 BALUN
643015 F10
V
= 5V
CC
Figure 10. CATV Amplifier: 75Ω Input and 75Ω Output
Wide bandwidth, excellent linearity and low output noise
makes the LTC6430-15 an exceptional candidate for CATV
amplifier applications.
selectingachoke.AnSMTwirewoundferritecoreinductor
was chosen for its low series resistance, high self reso-
nant frequency (SRF) and compact size. An input stability
network is not required for this application as the balun
presents a low impedance to the LTC6430-15’s input at
low frequencies. Our resulting push-pull CATV amplifier
circuit is simple, compact, completely SMT and extremely
power efficient.
As expected, the LTC6430-15 works well in a push-pull
circuit to cover the entire 40MHz to 1000MHz CATV band.
Using readily available SMT baluns, the LTC6430-15 of-
fers high linearity and low noise across the whole CATV
band. Remarkably, this performance is achieved with
only 800mW of power at 5V. Its low power dissipation
greatly reduces the heat sinking requirements relative to
traditional “block” CATV amplifiers.
The LTC6430-15 push-pull circuit has 14.1dB of gain with
0.4dB of flatness across the entire 50MHz to 1000MHz
band. It sports an OIP3 of 46dBm and a noise figure of
only 4.5dB. The CTB and CSO measurements have not
been taken as of this writing.
The native LTC6430-15 device is well matched to 100Ω
differential impedance at both the input and the output.
Therefore, we can employ 1:1.33 surface mount (SMT)
baluns to transform its native 100Ω impedance to the
standard 75Ω CATV impedance, while retaining all the
exceptionalcharacteristicsoftheLTC6430-15.Inaddition,
the balun’s excellent phase balance and the 2nd order
linearity of the LTC6430-15 combine to further suppress
2nd order products across the entire CATV band. As with
any wide bandwidth application, care must be taken when
These characteristics make the LTC6430-15 an ideal
amplifier for head-end cable modem applications or CATV
distribution amplifiers. The circuit is shown in Figure 10,
with 75Ω “F” connectors at both input and output. The
evaluation board may be loaded with either 75Ω “F” con-
nectors, or 75Ω BNC connectors, depending on the users
preference. Please note that the use of substandard con-
nectors can limit usable bandwidth of the circuit.
643015f
19
LTC6430-15
applicaTions inForMaTion
50MHz to 1000MHz CATV Push-Pull Amplifier:
75Ω Input and 75Ω Output
Figure 11. CATV Circuit, Input and
Output Return Loss vs Frequency
Figure 12. CATV Amplifier Circuit,
Figure 13. CATV Amplifier Circuit,
Noise Figure vs Frequency
Gain (S21) vs Frequency
15
14
13
12
11
10
9
8
7
6
5
0
–5
10
8
V
= 5V, T = 25°C
S21
CC
INCLUDES BALUN LOSS
–10
–15
–20
–25
–30
S22
S11
6
4
4
3
2
1
2
0
0
0
200
400
600
800
1000 1200
0
200
400
600
800
1000 1200
0
200
400
600
800
1000 1200
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
643015 F12
643015 F11
643015 F13
Figure 14. CATV Amplifier Circuit,
OIP3 vs Frequency
Figure 15. HD2 and HD3 Products
vs Frequency
54
50
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
V
P
= 5V, T = 25°C
OUT
V
P
= 5V, T = 25°C
OUT
CC
CC
= 2dBm/TONE
= 8dBm/TONE
46
42
38
34
30
HD2 AVG
–100
–110
HD3 AVG
400
26
0
200
400
600
800
1000
0
200
600
800
1000
FREQUENCY (MHz)
FREQUENCY (MHz)
643015 F14
643015 F15
643015f
20
LTC6430-15
applicaTions inForMaTion
50MHz to 1000MHz CATV Push-Pull Amplifier:
75Ω Input and 75Ω Output
5
4
3
2
1
REVISION HISTORY
DESCRIPTION
ECO REV
APPROVED
DATE
__
1
1ST PROTOTYPE
JOHN C. 06-26-12
D
C
B
A
D
C
B
A
L1=L2=560nH=COILCRAFT, PART#:0603LS-561XJLB
VCC
VCC
C5
1000pF
C9
C10
1000pF
0603
0.1uF
0603
C1
0.047uF
C19
OPT
T4
L1
C7
T3
560nH
MINI CIRCUIT
TC1.33-282+
0.047uF
1
2
3
4
5
6
18
17
16
15
14
13
MINI CIRCUIT
TC1.33-282+
DNC
DNC
DNC
DNC
DNC
DNC
+OUT
GND
6
4
1
3
3
1
4
6
R3
0
+IN
T_DIODE
DNC
U1
LTC6430IUF-15
J1
OPT
CON-RF-75 OHM
C8
GND
0.047uF
OUT
-OUT
J2
L2
560nH
CON-RF-75 OHM
C2
0.047uF
C20
OPT
VCC
VCC
+5V
E6
C11
0.1uF
0603
C12
1000pF
0603
C6
1000pF
NOTE: UNLESS OTHERWISE SPECIFIED
1. ALL RESISTORS ARE IN OHMS, 0402.
ALL CAPACITORS ARE 0402.
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900
Fax: (408)434-0507
CUSTOMER NOTICE
APPROVALS
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
www.linear.com
TECHNOLOGY
PCB DES.
APP ENG.
AK.
LTC Confidential-For Customer Use Only
TITLE: SCHEMATIC
JOHN C.
CATV AMPLIFIER
SIZE
N/A
IC NO.
REV.
1
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
LTC6430IUF-15
DEMO CIRCUIT 2032A
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
DATE:
Thursday, September 06, 2012
SHEET
1
OF
1
5
4
3
2
1
Figure 16. LTC6430-15 CATV Circuit Schematic
Figure 17. LTC6430-15 CATV Evaluation Board
643015f
21
LTC6430-15
applicaTions inForMaTion
5
4
3
2
1
REVISION HISTORY
DESCRIPTION
ECO REV
APPROVED
DATE
__
OPTIONAL CIRCUIT
C10
2
PRODUCTION
JOHN C. 12-13-11
62pF
C11
C16
T1
SEE BOM
T2
1000pF
1000pF
J5
R5
SEE BOM
348
1
6
5
4
4
5
6
3
1
CAL IN
C19
1000pF
C18
SMA-R
J18
1000pF
D
C
B
A
D
C
B
A
C12
62pF
J6
3
C13
1000pF
C17
GND
CAL OUT
1000pF
R6
E6
SMA-R
348
GND
VCC
C7
C8
1000pF
VCC
62pF
C1
1000pF
R2
348
R4
R13
R17
L11
L1
C22
C21
1000pF
OPT
560nH 0.1uF
*
*
0603
*
1008
U1
0603
0603
T3
*
C3
J7
*
J10
1000pF
T4
*
1
2
3
4
5
6
18
17
16
15
14
13
DNC
+OUT
GND
1
3
6
5
4
4
5
6
3
1
+OUT
SMA-R
+IN
*
DNC
DNC
DNC
DNC
DNC
C14
C15
1000pF
SMA-R
1000pF
T_DIODE
DNC
J9
OPT
-IN
J8
*
C4
GND
1000pF
-OUT
-OUT
R18
SMA-R
SMA-R
R14
*
*
C9
L22
L2
0603
0603
62pF
OPT
1008
560nH
C2
1000pF
R3
VCC
J11
+5V
R1
*
0603
348
C23
C5
1000pF
E3
VCC
0.1uF
+5V
C20
NOTE: UNLESS OTHERWISE SPECIFIED
1. ALL RESISTORS ARE IN OHMS, 0402.
ALL CAPACITORS ARE 0402.
1000pF
*
ASSY
-A
U1
FREQ.
T3, T4
R3, R4 R13,R14,R17,R18
ADT2-1T+ 0 OHM
ADTL2-18 0 OHM
J8
J10
OPT
OPT
LTC6430IUF-15
LTC6430IUF-15
LTC6431IUF-15
100-300 MHz
400-1000 MHz
100-1200 MHz
OPT
OPT
0 OHM
STUFF
STUFF
OPT
1630 McCarthy Blvd.
Milpitas, CA 95035
Phone: (408)432-1900
Fax: (408)434-0507
LTC Confidential-For Customer Use Only
CUSTOMER NOTICE
-B
-C
APPROVALS
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
www.linear.com
OPT
OPT
STUFF
TECHNOLOGY
PCB DES.
APP ENG.
KIM T.
TITLE: SCHEMATIC
JOHN C.
ASSY
-A
-B
C2,C4
1000pF, 0402
1000pF, 0402
OPT
C5
C9
C14,C15
1000pF, 0402
OPT
C23
0.1uF
0.1uF
OPT
L2
R1
IF AMP/ADC DRIVER
1000pF, 0603
1000pF, 0603
OPT
62pF
62pF
OPT
560nH
560nH
OPT
348
348
OPT
SIZE
IC NO.
REV.
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
LTC643XIUF FAMILY
DEMO CIRCUIT 1774A
N/A
DATE:
1
-C
OPT
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
SCALE = NONE
Wednesday, July 11, 2012
SHEET
1
OF
1
5
4
3
2
1
Figure 18. Demo Board 1774A Schematic
643015f
22
LTC6430-15
applicaTions inForMaTion
Figure 19. Demo Board 1774A PCB
643015f
23
LTC6430-15
DiFFerenTial s paraMeTers 5V, ZDIFF = 100Ω, T = 25°C, De-Embedded to Package Pins,
DD: Differential In to Differential Out
FREQUENCY
(MHz)
S11
S11
S21
S21
S12
S12
S22
S22
DD
GTU
STABILITY
(K)
DD
DD
(Ph)
DD
DD
(Ph)
DD
DD
(Ph)
DD
(Mag)
–14.79
–22.74
–23.62
–23.66
–22.92
–22.64
–21.56
–20.69
–19.70
–18.85
–18.10
–17.59
–17.07
–16.67
–16.24
–15.80
–15.42
–15.03
–14.74
–14.47
–14.22
–13.96
–13.71
–13.46
–13.21
–12.93
–12.69
–12.44
–12.08
–11.83
–11.59
–11.26
–11.04
–10.77
–10.50
–10.25
–9.95
(Mag)
15.59
15.16
15.14
15.13
15.11
15.09
15.06
15.04
15.00
14.98
14.94
14.91
14.88
14.82
14.80
14.75
14.72
14.67
14.62
14.59
14.52
14.50
14.40
14.36
14.25
14.12
14.00
13.83
13.61
13.48
13.15
13.04
12.74
12.52
12.44
12.13
12.17
11.95
11.86
(Mag)
–18.75
–18.67
–18.74
–18.81
–18.85
–18.93
–18.97
–19.05
–19.12
–19.21
–19.28
–19.37
–19.46
–19.57
–19.67
–19.82
–19.95
–20.06
–20.21
–20.36
–20.49
–20.64
–20.82
–20.97
–21.14
–21.31
–21.46
–21.67
–21.85
–22.08
–22.27
–22.43
–22.77
–22.94
–23.20
–23.47
–23.67
–23.98
–24.24
(Mag)
–14.74
–22.99
–24.91
–25.64
–26.20
–26.12
–25.59
–24.66
–23.61
–22.75
–21.89
–21.10
–20.20
–19.19
–18.27
–17.40
–16.63
–15.88
–15.22
–14.53
–13.84
–13.21
–12.56
–11.95
–11.38
–10.84
–10.38
–9.88
(Ph)
(Max)
23.5
83.5
143
–83.75
–107.27
–121.45
–133.07
–142.28
–151.62
–157.35
–162.14
–166.01
–170.61
–175.10
–179.62
176.30
171.92
168.04
163.82
160.15
156.56
153.02
149.97
147.29
144.60
142.54
140.50
138.25
136.52
134.85
132.91
130.90
128.75
126.05
123.96
121.35
118.82
116.06
113.21
110.44
107.44
103.84
166.68
170.23
167.23
163.30
159.19
154.85
150.64
146.31
142.01
137.67
133.32
128.98
124.59
120.28
115.83
111.55
107.07
102.65
98.25
9.35
–66.63
–48.57
–37.10
–33.28
–29.50
–31.14
–33.23
–32.63
–32.94
–33.85
–36.24
–40.64
–45.87
–50.45
–55.85
–60.20
–65.14
–70.73
–76.33
–82.33
–88.47
–94.61
–100.71
–106.83
–113.18
–119.34
–125.57
–131.85
–138.66
–145.10
–151.89
–158.77
–165.44
–172.29
–178.95
174.30
167.79
161.17
154.86
15.88
15.21
15.18
15.16
15.15
15.13
15.11
15.09
15.07
15.06
15.04
15.02
15.01
14.97
14.97
14.94
14.94
14.92
14.91
14.90
14.87
14.89
14.84
14.84
14.79
14.72
14.65
14.56
14.41
14.35
14.10
14.05
13.83
13.67
13.66
13.41
13.51
13.37
13.33
0.99
1.07
1.08
1.08
1.08
1.09
1.09
1.09
1.10
1.10
1.10
1.10
1.10
1.11
1.11
1.11
1.12
1.12
1.12
1.13
1.13
1.13
1.14
1.14
1.14
1.15
1.16
1.17
1.18
1.20
1.23
1.23
1.28
1.31
1.33
1.38
1.38
1.42
–3.01
–8.44
203
–12.91
–17.06
–21.05
–25.11
–29.05
–32.90
–36.89
–40.59
–44.51
–48.37
–52.05
–56.02
–59.92
–63.56
–67.32
–71.16
–74.78
–78.43
–82.16
–85.95
–89.58
–93.14
–96.91
–100.58
–104.18
–107.65
–111.59
–114.99
–118.70
–122.54
–125.55
–129.50
–132.67
–136.37
–139.65
–143.03
263
323
383
443
503
563
623
683
743
803
863
923
983
1040
1100
1160
1220
1280
1340
1400
1460
1520
1580
1640
1700
1760
1820
1880
1940
2000
2060
2120
2180
2240
2300
93.56
89.20
84.43
79.82
75.06
70.23
65.45
60.83
55.62
51.75
–9.44
46.46
–9.05
42.83
–8.66
38.17
–8.39
34.51
–8.09
30.70
–7.86
27.13
–7.71
23.32
–7.50
20.08
–7.38
–9.66
15.44
–7.21
–9.43
11.58
–7.10
1.45
643015f
24
LTC6430-15
Typical applicaTions
50Ω Input/Output Balanced Amplifier
C7
60pF
C1
1000pF
L1
560nH
R1
350Ω
C3
1000pF
PORT
T1
T2
INPUT
DNC
DNC
DNC
DNC
DNC
DNC
+OUT
GND
1:2
2:1
100Ω
•
•
RF
IN
50Ω, SMA
100Ω
DIFFERENTIAL
C4
T_DIODE
DNC
DIFFERENTIAL
PORT
OUTPUT
LTC6430-15
1000pF
BALUN_A
GND
BALUN_A
RF
OUT
50Ω, SMA
C8
60pF
–OUT
C2
1000pF
L2
560nH
R2
350Ω
C5
1000pF
C6
0.1µF
BALUN_A = ADT2-1T FOR 50MHz TO 300MHz
BALUN_A = ADT2-1P FOR 300MHz TO 400MHz
BALUN_A = ADTL2-18 FOR 400MHz TO 1300MHz
ALL ARE MINI-CIRCUITS CD542 FOOTPRINT
643015 TA02
V
= 5V
CC
OPTIONAL STABILITY
NETWORK
16-Bit ADC Driver
C1
1000pF
L1
220nH
C3
1000pF
PORT
T1
ETC1-1-13
1:1 TRANSFORMER
M/A-COM
INPUT
DNC
DNC
DNC
DNC
DNC
DNC
+OUT
GND
1:2
RF
IN
50Ω, SMA
100Ω
+IN
–IN
T_DIODE
LOWPASS
FILTER
DIFFERENTIAL
C4
LTC6430-15
DNC
GND
BALUN_A
1000pF
14- TO 16-BIT
ADC
–OUT
C2
1000pF
L2
220nH
C5
1000pF
C6
0.1µF
BALUN_A = ADT2-1T FOR 50MHz TO 300MHz
BALUN_A = ADT2-1P FOR 300MHz TO 400MHz
BALUN_A = ADTL2-18 FOR 400MHz TO 1300MHz
ALL ARE MINI-CIRCUITS CD542 FOOTPRINT
V
= 5V
643015 TA03
CC
643015f
25
LTC6430-15
Typical applicaTions
75Ω 50MHz to 1000MHz CATV Amplifier
C1
0.047µF
L1
560nH
C3
0.047µF
PORT
T1
T2
INPUT
DNC
+OUT
GND
1:1.33
1.33:1
DNC
DNC
DNC
DNC
DNC
100Ω
•
•
RF
IN
100Ω
T_DIODE
DNC
DIFFERENTIAL
75Ω,
PORT
OUTPUT
DIFFERENTIAL
LTC6430-15
CONNECTOR
C4
0.047µF
GND
BALUN_A
BALUN_A
RF
OUT
–OUT
75Ω,
CONNECTOR
C2
0.047µF
L2
560nH
C5
1000pF
C6
0.1µF
BALUN_A = TC1.33-282+
FOR 50MHz TO 1000MHz
643015 TA04
V
= 5V
CC
MINI-CIRCUITS 1:1.33
643015f
26
LTC6430-15
package DescripTion
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
UF Package
24-Lead Plastic QFN (4mm × 4mm)
(Reference LTC DWG # 05-08-ꢀ697 Rev B)
0.70 0.05
4.50 0.05
3.ꢀ0 0.05
2.45 0.05
(4 SIDES)
PACKAGE OUTLINE
0.25 0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
BOTTOM VIEW—EXPOSED PAD
PIN ꢀ NOTCH
R = 0.20 TYP OR
0.35 × 45° CHAMFER
R = 0.ꢀꢀ5
TYP
0.75 0.05
4.00 0.ꢀ0
(4 SIDES)
23 24
PIN ꢀ
TOP MARK
(NOTE 6)
0.40 0.ꢀ0
ꢀ
2
2.45 0.ꢀ0
(4-SIDES)
(UF24) QFN 0ꢀ05 REV B
0.200 REF
0.25 0.05
0.50 BSC
0.00 – 0.05
NOTE:
ꢀ. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGD-X)—TO BE APPROVED
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.ꢀ5mm ON ANY SIDE, IF PRESENT
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN ꢀ LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
643015f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LTC6430-15
Typical applicaTion
Wideband Balanced Amplifier
5V
V
= 5V
CC
R
F
1:2
TRANSFORMER
V
IN
LTC6430-15
R
R
S
50Ω
2:1
R
R = 100Ω
SOURCE
DIFFERENTIAL
= 100Ω
LOAD
L
TRANSFORMER
50Ω
DIFFERENTIAL
643015 TA05
relaTeD parTs
PART NUMBER
DESCRIPTION
COMMENTS
Fixed Gain IF Amplifiers/ADC Drivers
LTC6431-15
LTC6417
50Ω Gain Block IF Amplifier
Single-Ended Version of LTC6431-15, 15.5dB Gain, 47dBm OIP3 at
240MHz into a 50Ω Load
1.6GHz Low Noise High Linearity Differential Buffer/ OIP3 = 41dBm at 300MHz, Can Drive 50W Differential Output High
ADC Driver Speed Voltage Clamping Protects Subsequent Circuitry
LTC6400-8/LTC6400-14/ 1.8GHz Low Noise, Low Distortion Differential
LTC6400-20/LTC6400-26 ADC Drivers
–71dBc IM3 at 240MHz 2V Composite, I = 90mA, A = 8dB, 14dB,
P-P S V
20dB, 26dB
LTC6401-8/LTC6401-14/ 1.3GHz Low Noise, Low Distortion Differential
LTC6401-20/LTC6401-26 ADC Drivers
–74dBc IM3 at 140MHz 2V Composite, I = 50mA, A = 8dB, 14dB,
P-P
S
V
20dB, 26dB
LT6402-6/LT6402-12/
LT6402-20
300MHz Differential Amplifier/ADC Drivers
–71dBc IM3 at 20MHz 2V Composite, A = 6dB, 12dB, 20dB
P-P
V
LTC6410-6
1.4GHz Differential IF Amplifier with Configurable
Input Impedance
OIP3 = 36dBm at 70MHz, Flexible Interface to Mixer IF Port
–72dBc IM2 at 300MHz 2V Composite, I = 42mA, eN = 2.8nV/√Hz,
LTC6416
2GHz, 16-Bit Differential ADC Buffer
P-P
S
A = 0dB, 300MHz } 0.1dB Bandwidth
V
LTC6420-20
Dual 1.8GHz Low Noise, Low Distortion Differential Dual Version of the LTC6400-20, A = 20dB
V
ADC Drivers
Variable Gain IF Amplifiers/ADC Drivers
LT6412
800MHz, 31dB Range Analog-Controlled VGA
OIP3 = 35dBm at 240MHz, Continuously Adjustable Gain Control
Baseband Differential Amplifiers
LTC6409
1.1nV/√Hz Single Supply Differential Amplifier/ADC 88dB SFDR at 100MHz, AC- or DC-Coupled Inputs
Driver
LTC6406
3GHz Rail-to-Rail Input Differential Amplifier/
ADC Driver
–65dBc IM3 at 50MHz 2V Composite, Rail-to-Rail Inputs,
P-P
eN = 1.6nV/√Hz, 18mA
LTC6404-1/LTC6404-2
LTC6403-1
Low Noise Rail-to-Rail Output Differential Amplifier/ 16-Bit SNR, SFDR at 10MHz, Rail-to-Rail Outputs, eN = 1.5nV/√Hz,
ADC Driver LTC6404-1 Is Unity-Gain Stable, LTC6404-2 Is Gain-of-Two Stable
Low Noise Rail-to-Rail Output Differential Amplifier/ 16-Bit SNR, SFDR at 3MHz, Rail-to-Rail Outputs, eN = 2.8nV/√Hz
ADC Driver
High Speed ADCs
LTC2208/LTC2209
LTC2259-16
16-Bit, 13Msps/160Msps ADC
74dBFS Noise Floor, SFDR > 89dB at 140MHz, 2.25V Input
P-P
16-Bit, 80Msps ADC, Ultralow Power
72dBFS Noise Floor, SFDR > 82dB at 140MHz, 2.00V Input
P-P
LTC2160-14/LTC2161-14/ 14-bit, 25Msps/40Msps/60Msps ADC Low Power
LTC2162-14
76.2 dBFS Noise Floor, SFDR > 84dB at 140MHz, 2.00V Input
P-P
LTC2155-14/LTC2156-14/ 14-bit, 170Msps/210Msps/250Msps/310Msps
LTC2157-14/LTC2158-14 ADC 2-Channel
69dBFS Noise Floor, SFDR > 80dB at 140MHz, 1.50V Input,
P-P
>1GHz Input BW
LTC2216
16-Bit, 80Msps ADC
79dBFS Noise Floor, SFDR > 91dB at 140MHz, 75V Input
P-P
643015f
LT 1212 • PRINTED IN USA
28 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
●
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(408) 432-1900 FAX: (408) 434-0507 www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2012
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