LTC6910-3CTS8#TRPBF [Linear]

LTC6910 - Digitally Controlled Programmable Gain Amplifiers in SOT-23; Package: SOT; Pins: 8; Temperature Range: 0°C to 70°C;
LTC6910-3CTS8#TRPBF
型号: LTC6910-3CTS8#TRPBF
厂家: Linear    Linear
描述:

LTC6910 - Digitally Controlled Programmable Gain Amplifiers in SOT-23; Package: SOT; Pins: 8; Temperature Range: 0°C to 70°C

仪表放大器 放大器电路 光电二极管
文件: 总24页 (文件大小:251K)
中文:  中文翻译
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LTC6910-1  
LTC6910-2/LTC6910-3  
Digitally Controlled  
Programmable  
Gain Amplifiers in SOT-23  
U
FEATURES  
DESCRIPTIO  
The LTC®6910 family are low noise digitally program-  
mable gain amplifiers (PGAs) that are easy to use and  
occupy very little PC board space. The inverting gain is  
adjustable using a 3-bit digital input to select gains of 0, 1,  
2, 5, 10, 20, 50 and 100V/V in the LTC6910-1; 0, 1, 2, 4,  
8, 16, 32 and 64V/V in the LTC6910-2; and 0, 1, 2, 3, 4, 5,6  
and 7V/V in the LTC6910-3.  
3-Bit Digital Gain Control in Three Gain-Code  
Options  
Rail-to-Rail Input Range  
Rail-to-Rail Output Swing  
Single or Dual Supply: 2.7V to 10.5V Total  
11MHz Gain Bandwidth Product  
Input Noise Down to 8nV/Hz  
System Dynamic Range to 120dB  
The LTC6910-Xs are inverting amplifiers with rail-to-rail  
output. When operated with unity gain, they will also  
process rail-to-rail input signals. A half-supply reference  
generated internally at the AGND pin supports single  
power supply applications. Operating from single or split  
supplies from 2.7V to 10.5V, the LTC6910-X family is  
offered in an 8-lead SOT-23 package.  
Input Offset Voltage: 1.5mV  
8-Pin Low Profile (1mm) SOT-23  
(ThinSOT™) Package  
U
APPLICATIO S  
Data Acquisition Systems  
, LTC and LT are registered trademarks of Linear Technology Corporation.  
ThinSOT is a trademark of Linear Technology Corporation.  
Dynamic Gain Changing  
U.S. Patent Number 6121908.  
Automatic Ranging Circuits  
Automatic Gain Control  
U
TYPICAL APPLICATIO  
Single Supply Programmable Amplifier  
Frequency Response (LTC6910-1)  
50  
+
V
V
= 10V, V = 5mV  
IN  
S
RMS  
2.7V TO 10.5V  
GAIN OF 100 (DIGITAL INPUT 111)  
0.1µF  
40  
30  
DIGITAL INPUTS GAIN IN VOLTS/VOLT  
G2 G1 G0 6910-1 6910-2 6910-3  
GAIN OF 50 (DIGITAL INPUT 110)  
8
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
0
4
–1  
–1  
–1  
–2  
–3  
–4  
–5  
–6  
–7  
GAIN OF 20 (DIGITAL INPUT 101)  
GAIN OF 10 (DIGITAL INPUT 100)  
GAIN OF 5 (DIGITAL INPUT 011)  
3
1
–2  
–5  
–10  
–20  
–50  
–100  
–2  
20  
10  
V
V
= GAIN • V  
LTC6910-X  
IN  
OUT IN  
–4  
2
–8  
5
–16  
–32  
–64  
AGND  
1µF OR LARGER  
6
7
GAIN OF 2 (DIGITAL INPUT 010)  
GAIN OF 1 (DIGITAL INPUT 001)  
G2 G1 G0  
6910 TA01  
0
PIN 2 (AGND) PROVIDES BUILT-IN HALF-SUPPLY  
REFERENCE WITH INTERNAL RESISTANCE OF 5k.  
AGND CAN ALSO BE DRIVEN BY A SYSTEM ANALOG  
GROUND REFERENCE NEAR HALF SUPPLY  
–10  
100  
1k  
10k  
100k  
1M  
10M  
FREQUENCY (Hz)  
6910 TA01b  
6910123fa  
1
LTC6910-1  
LTC6910-2/LTC6910-3  
W W U W  
U W  
U
ABSOLUTE AXI U RATI GS  
(Note 1)  
PACKAGE/ORDER I FOR ATIO  
Total Supply Voltage (V+ to V–) ............................. 11V  
Input Current ..................................................... ±25mA  
Operating Temperature Range (Note 2)  
LTC6910-1C, -2C, -3C ........................ 40°C to 85°C  
LTC6910-1I, -2I, -3I ........................... 40°C to 85°C  
LTC6910-1H, -2H, -3H .................... 40°C to 125°C  
Specified Temperature Range (Note 3)  
LTC6910-1C, -2C, -3C ........................ 40°C to 85°C  
LTC6910-1I, -2I, -3I ........................... 40°C to 85°C  
LTC6910-1H, -2H, -3H .................... 40°C to 125°C  
Storage Temperature Range ................. 65°C to 150°C  
Lead Temperature (Soldering, 10 sec).................. 300°C  
ORDER PART NUMBER  
LTC6910-1CTS8  
LTC6910-1ITS8  
LTC6910-1HTS8  
LTC6910-2CTS8  
LTC6910-2ITS8  
LTC6910-2HTS8  
LTC6910-3CTS8  
LTC6910-3ITS8  
LTC6910-3HTS8  
TOP VIEW  
+
OUT 1  
AGND 2  
8 V  
7 G2  
6 G1  
5 G0  
IN 3  
V
4
TS8 PACKAGE  
8-LEAD PLASTIC TSOT-23  
TJMAX = 150°C, θJA = 230°C/W  
TS8 PART MARKING*  
LTB5 (6910-1)  
LTACQ (6910-2)  
LTACS (6910-3)  
Consult LTC Marketing for parts specified with wider operating temperature ranges.  
*The temperature grades are identified by a label on the shipping container.  
U
U
U
GAI SETTI GS A D PROPERTIES  
Table 1. LTC6910-1  
NOMINAL  
NOMINAL  
NOMINAL LINEAR INPUT RANGE (V  
)
P-P  
INPUT  
IMPEDANCE  
(k)  
VOLTAGE GAIN  
Dual 5V  
Supply  
Single 5V  
Supply  
Single 3V  
Supply  
G2  
0
G1  
0
G0  
0
Volts/Volt  
0
(dB)  
–120  
0
10  
10  
5
5
5
3
(Open)  
0
0
1
–1  
3
10  
5
0
1
0
–2  
6
2.5  
1
1.5  
0.6  
0.3  
0.15  
0.06  
0.03  
0
1
1
–5  
14  
20  
26  
34  
40  
2
2
1
0
0
–10  
–20  
–50  
–100  
1
0.5  
0.25  
0.1  
0.05  
1
1
0
1
0.5  
0.2  
0.1  
1
1
1
0
1
1
1
1
1
6910123fa  
2
LTC6910-1  
LTC6910-2/LTC6910-3  
U
U
U
GAI SETTI GS A D PROPERTIES  
Table 2. LTC6910-2  
NOMINAL  
NOMINAL  
NOMINAL LINEAR INPUT RANGE (V  
)
P-P  
INPUT  
IMPEDANCE  
(k)  
VOLTAGE GAIN  
Dual 5V  
Supply  
Single 5V  
Supply  
Single 3V  
Supply  
G2  
0
G1  
0
G0  
0
Volts/Volt  
0
(dB)  
–120  
0
10  
10  
5
3
(Open)  
10  
0
0
1
–1  
5
3
0
1
0
–2  
6
5
2.5  
1.5  
5
0
1
1
–4  
12  
2.5  
1.25  
0.625  
0.313  
0.156  
0.078  
0.75  
0.375  
0.188  
0.094  
0.047  
2.5  
1
0
0
–8  
18.1  
24.1  
30.1  
36.1  
1.25  
0.625  
0.313  
0.156  
1.25  
1.25  
1.25  
1.25  
1
0
1
–16  
–32  
–64  
1
1
0
1
1
1
Table 3. LTC6910-3  
NOMINAL  
INPUT  
IMPEDANCE  
(k)  
NOMINAL  
VOLTAGE GAIN  
Volts/Volt  
NOMINAL LINEAR INPUT RANGE (V  
)
P-P  
Dual 5V  
Supply  
Single 5V  
Supply  
Single 3V  
Supply  
G2  
0
G1  
0
G0  
0
(dB)  
–120  
0
0
10  
10  
5
3
3
(Open)  
10  
0
0
1
–1  
–2  
–3  
–4  
–5  
–6  
–7  
5
0
1
0
6
5
2.5  
1.67  
1.25  
1
1.5  
1
5
0
1
1
9.5  
12  
3.33  
2.5  
2
3.3  
2.5  
2
1
0
0
0.75  
0.6  
0.5  
0.43  
1
0
1
14  
1
1
0
15.6  
16.9  
1.67  
1.43  
0.83  
0.71  
1.7  
1.4  
1
1
1
6910123fa  
3
LTC6910-1  
LTC6910-2/LTC6910-3  
ELECTRICAL CHARACTERISTICS  
to midsupply point, unless otherwise noted.  
The denotes the specifications that apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k  
C, I SUFFIXES  
MIN TYP MAX  
H SUFFIX  
MIN TYP MAX  
PARAMETER  
CONDITIONS  
UNIT  
Specifications for the LTC6910-1, LTC6910-2 and LTC6910-3  
Total Supply Voltage  
2.7  
10.5  
2.7  
10.5  
V
Supply Current  
V = 2.7V, V = 1.35V  
2
3
2
3
mA  
mA  
mA  
mA  
S
IN  
V = 5V, V = 2.5V  
2.4  
3
3.5  
4.5  
4.9  
2.4  
3
3.5  
4.5  
4.9  
S
IN  
V = ±5V, V = 0V, Pins 5, 6, 7 = 5V or 5V  
S
IN  
V = ±5V, V = 0V, Pin 5 = 4.5V,  
3.5  
3.5  
S
IN  
Pins 6, 7 = 0.5V (Note 4)  
Output Voltage Swing LOW (Note 5)  
V = 2.7V, R = 10k to Midsupply Point  
12  
50  
30  
100  
12  
50  
30  
100  
mV  
mV  
S
L
V = 2.7V, R = 500to Midsupply Point  
S
L
V = 5V, R = 10k to Midsupply Point  
20  
90  
40  
160  
20  
90  
40  
160  
mV  
mV  
S
L
V = 5V, R = 500to Midsupply Point  
S
L
V = ±5V, R = 10k to 0V  
30  
50  
30  
50  
mV  
mV  
S
L
V = ±5V, R = 500to 0V  
180 250  
180 270  
S
L
Output Voltage Swing HIGH (Note 5)  
V = 2.7V, R = 10k to Midsupply Point  
10  
50  
20  
80  
10  
50  
20  
85  
mV  
mV  
S
L
V = 2.7V, R = 500to Midsupply Point  
S
L
V = 5V, R = 10k to Midsupply Point  
10  
80  
30  
150  
10  
80  
30  
150  
mV  
mV  
S
L
V = 5V, R = 500to Midsupply Point  
S
L
V = ±5V, R = 10k to 0V  
20  
40  
20  
40  
mV  
mV  
S
L
V = ±5V, R = 500to 0V  
180 250  
180 250  
S
L
Output Short-Circuit Current (Note 6)  
AGND Open-Circuit Voltage  
V = 2.7V  
S
±27  
±35  
±27  
±35  
mA  
mA  
S
V = ±5V  
V = 5V  
S
2.45 2.5 2.55  
2.45 2.5 2.55  
V
AGND Rejection (i.e., Common Mode  
Rejection or CMRR)  
V = 2.7V, V  
V = ±5V, V  
S
= 1.1V to Upper AGND Limit  
= –2.5V to 2.5V  
55  
55  
80  
75  
50  
50  
80  
75  
dB  
dB  
S
AGND  
AGND  
Power Supply Rejection Ratio (PSRR)  
Signal Attenuation at Gain = 0 Setting  
Slew Rate  
V = 2.7V to ±5V  
60  
80  
60  
80  
dB  
dB  
S
Gain = 0 (Digital Inputs 000), f = 20kHz  
V = 5V, V = 2.8V  
122  
122  
12  
16  
12  
16  
V/µs  
V/µs  
S
OUT  
P-P  
V = ±5V, V  
S
= 2.8V  
OUT  
P-P  
Digital Input “High” Voltage  
V = 2.7V  
2.43  
4.5  
4.5  
2.43  
4.5  
4.5  
V
V
V
S
V = 5V  
S
V = ±5V  
S
Digital Input “Low” Voltage  
V = 2.7V  
0.27  
0.5  
0.5  
0.27  
0.5  
0.5  
V
V
V
S
V = 5V  
S
V = ±5V  
S
+
Digital Input Leakage Current Magnitude  
V (Digital Input) V  
2
2
µA  
6910123fa  
4
LTC6910-1  
LTC6910-2/LTC6910-3  
ELECTRICAL CHARACTERISTICS  
to midsupply point, unless otherwise noted.  
The denotes the specifications that apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k  
LTC6910-1C/LTC6910-1I  
MIN TYP MAX  
LTC6910-1H  
MIN TYP MAX  
PARAMETER  
CONDITIONS  
UNIT  
Specifications for LTC6910-1 Only  
Voltage Gain (Note 7)  
V = 2.7V, Gain = 1, R = 10k  
0.05  
0
0.07 0.06  
0
0.07  
dB  
dB  
S
L
V = 2.7V, Gain = 1, R = 500Ω  
0.1 0.02 0.06 0.12 0.02 0.08  
S
L
V = 2.7V, Gain = 2, R = 10k  
5.96 6.02 6.08 5.96 6.02 6.08  
13.85 13.95 14.05 13.83 13.95 14.05  
dB  
dB  
S
L
V = 2.7V, Gain = 5, R = 10k  
S
L
V = 2.7V, Gain = 10, R = 10k  
19.7 19.9 20.1  
19.6 19.85 20.1  
19.7 19.9 20.1  
19.4 19.85 20.1  
dB  
dB  
S
L
V = 2.7V, Gain = 10, R = 500Ω  
S
L
V = 2.7V, Gain = 20, R = 10k  
25.7 25.9 26.1  
33.5 33.8 34.1  
25.65 25.9 26.1  
33.4 33.8 34.1  
dB  
dB  
S
L
V = 2.7V, Gain = 50, R = 10k  
S
L
V = 2.7V, Gain = 100, R = 10k  
39 39.6 40.2  
37.4 39 40.1  
38.7 39.6 40.2  
36.4 39 40.1  
dB  
dB  
S
L
V = 2.7V, Gain = 100, R = 500Ω  
S
L
V = 5V, Gain = 1, R = 10k  
0.05  
0
0.07 0.05  
0
0.07  
dB  
dB  
S
L
V = 5V, Gain = 1, R = 500Ω  
0.1 0.01 0.08 0.11 0.01 0.08  
S
L
V = 5V, Gain = 2, R = 10k  
5.96 6.02 6.08  
13.8 13.95 14.1  
5.955 6.02 6.08  
13.75 13.95 14.1  
dB  
dB  
S
L
V = 5V, Gain = 5, R = 10k  
S
L
V = 5V, Gain = 10, R = 10k  
19.8 19.9 20.1  
19.6 19.85 20.1  
19.75 19.9 20.1  
19.45 19.85 20.1  
dB  
dB  
S
L
V = 5V, Gain = 10, R = 500Ω  
S
L
V = 5V, Gain = 20, R = 10k  
25.8 25.9 26.1  
33.5 33.8 34.1  
25.70 25.9 26.1  
33.4 33.8 34.1  
dB  
dB  
S
L
V = 5V, Gain = 50, R = 10k  
S
L
V = 5V, Gain = 100, R = 10k  
39.3 39.7 40.1  
38 39.2 40.1  
39.1 39.7 40.1  
37 39.2 40.1  
dB  
dB  
S
L
V = 5V, Gain = 100, R = 500Ω  
S
L
V = ±5V, Gain = 1, R = 10k  
0.05  
0
0.07 0.05  
0
0.07  
dB  
dB  
S
L
V = ±5V, Gain = 1, R = 500Ω  
0.1 0.01 0.08  
5.96 6.02 6.08  
13.80 13.95 14.1  
0.1 0.01 0.08  
5.96 6.02 6.08  
13.80 13.95 14.1  
S
L
V = ±5V, Gain = 2, R = 10k  
dB  
dB  
S
L
V = ±5V, Gain = 5, R = 10k  
S
L
V = ±5V, Gain = 10, R = 10k  
19.8 19.9 20.1  
19.7 19.9 20.1  
19.75 19.9 20.1  
19.6 19.9 20.1  
dB  
dB  
S
L
V = ±5V, Gain = 10, R = 500Ω  
S
L
V = ±5V, Gain = 20, R = 10k  
25.8 25.95 26.1  
33.7 33.85 34  
25.75 25.95 26.1  
33.6 33.85 34  
dB  
dB  
S
L
V = ±5V, Gain = 50, R = 10k  
S
L
V = ±5V, Gain = 100, R = 10k  
39.4 39.8 40.2  
38.8 39.6 40.1  
39.25 39.8 40.2  
38 39.6 40.1  
dB  
dB  
S
L
V = ±5V, Gain = 100, R = 500Ω  
S
L
Offset Voltage Magnitude (Internal Op Amp)  
1.5  
9
1.5  
11  
mV  
(V ) (Note 8)  
OS(OA)  
Offset Voltage Drift (Internal Op Amp) (Note 8)  
6
8
µV/°C  
Offset Voltage Magnitude  
Gain = 1  
Gain = 10  
3
1.7  
15  
10  
3
1.7  
18  
12  
mV  
mV  
(Referred to “IN” Pin) (V  
)
OS(IN)  
DC Input Resistance (Note 9)  
DC V = 0V  
Gain = 0  
Gain = 1  
Gain = 2  
Gain = 5  
Gain = 10, 20, 50, 100  
IN  
>100  
10  
5
2
1
>100  
10  
5
2
1
MΩ  
kΩ  
kΩ  
kΩ  
kΩ  
6910123fa  
5
LTC6910-1  
LTC6910-2/LTC6910-3  
ELECTRICAL CHARACTERISTICS  
to midsupply point, unless otherwise noted.  
The denotes the specifications that apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k  
LTC6910-1C/LTC6910-1I  
MIN TYP MAX  
LTC6910-1H  
MIN TYP MAX  
PARAMETER  
CONDITIONS  
UNIT  
Specifications for LTC6910-1 Only  
DC Small-Signal Output Resistance  
Gain = 0  
Gain = 1  
Gain = 2  
Gain = 5  
Gain = 10  
Gain = 20  
Gain = 50  
Gain = 100  
0.4  
0.7  
1
1.9  
3.4  
6.4  
15  
30  
0.4  
0.7  
1
1.9  
3.4  
6.4  
15  
30  
Gain-Bandwidth Product  
Gain = 100, f = 200kHz  
8
6
11  
11  
14  
16  
8
5
11  
11  
14  
16  
MHz  
MHz  
IN  
Wideband Noise (Referred to Input)  
f = 1kHz to 200kHz  
Gain = 0 Output Noise  
Gain = 1  
Gain = 2  
Gain = 5  
Gain = 10  
Gain = 20  
Gain = 50  
Gain = 100  
3.8  
10.7  
7.3  
5.2  
4.5  
4.2  
3.9  
3.4  
3.8  
10.7  
7.3  
5.2  
4.5  
4.2  
3.9  
3.4  
µV  
RMS  
RMS  
RMS  
RMS  
RMS  
RMS  
RMS  
RMS  
µV  
µV  
µV  
µV  
µV  
µV  
µV  
Voltage Noise Density (Referred to Input)  
f = 50kHz  
Gain = 1  
Gain = 2  
24  
16  
12  
24  
16  
12  
nV/Hz  
nV/Hz  
nV/Hz  
nV/Hz  
nV/Hz  
nV/Hz  
nV/Hz  
Gain = 5  
Gain = 10  
Gain = 20  
Gain = 50  
Gain = 100  
10  
10  
9.4  
8.7  
7.6  
9.4  
8.7  
7.6  
Total Harmonic Distortion  
Gain = 10, f = 10kHz, V  
= 1V  
RMS  
–90  
0.003  
–90  
0.003  
dB  
%
IN  
OUT  
Gain = 10, f = 100kHz, V  
= 1V  
RMS  
–77  
0.014  
–77  
0.014  
dB  
%
IN  
OUT  
AGND (Common Mode) Input Voltage Range V = 2.7V  
0.55  
0.7  
4.3  
1.6  
3.65  
3.5  
0.7  
1
4.3  
1.5  
3.25  
3.35  
V
V
V
S
(Note 10)  
V = 5V  
S
V = ±5V  
S
6910123fa  
6
LTC6910-1  
LTC6910-2/LTC6910-3  
ELECTRICAL CHARACTERISTICS  
to midsupply point, unless otherwise noted.  
The denotes the specifications that apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k  
LTC6910-2C/LTC6910-2I  
MIN TYP MAX  
LTC6910-2H  
MIN TYP MAX  
PARAMETER  
CONDITIONS  
UNIT  
Specifications for LTC6910-2 Only  
Voltage Gain (Note 7)  
V = 2.7V, Gain = 1, R = 10k  
0.06  
0
0.08 0.07  
0
0.08  
dB  
dB  
S
L
V = 2.7V, Gain = 1, R = 500Ω  
0.1 0.02 0.06 0.11 0.02 0.06  
S
L
V = 2.7V, Gain = 2, R = 10k  
5.96 6.02 6.1 5.95 6.02 6.1  
dB  
dB  
S
L
V = 2.7V, Gain = 4, R = 10k  
11.9 12.02 12.12 11.9 12.02 12.12  
S
L
V = 2.7V, Gain = 8, R = 10k  
17.8 17.98 18.15 17.8 17.98 18.15  
17.65 17.95 18.15 17.55 17.95 18.15  
dB  
dB  
S
L
V = 2.7V, Gain = 8, R = 500Ω  
S
L
V = 2.7V, Gain = 16, R = 10k  
23.75 24 24.2  
29.7 30 30.2  
23.75 24 24.2  
29.65 30 30.2  
dB  
dB  
S
L
V = 2.7V, Gain = 32, R = 10k  
S
L
V = 2.7V, Gain = 64, R = 10k  
35.3 35.75 36.2  
34.2 35.3 36.2  
35.2 35.75 36.2  
33.7 35.3 36.2  
dB  
dB  
S
L
V = 2.7V, Gain = 64, R = 500Ω  
S
L
V = 5V, Gain = 1, R = 10k  
0.06  
0.1 0.01 0.08 0.11 0.01 0.08  
5.96 6.02 6.1 5.96 6.02 6.1  
0
0.08 0.06  
0
0.08  
dB  
dB  
S
L
V = 5V, Gain = 1, R = 500Ω  
S
L
V = 5V, Gain = 2, R = 10k  
dB  
dB  
S
L
V = 5V, Gain = 4, R = 10k  
11.85 12.02 12.15 11.85 12.02 12.15  
S
L
V = 5V, Gain = 8, R = 10k  
17.85 18 18.15 17.85 18 18.15  
17.65 17.9 18.15 17.6 17.9 18.15  
dB  
dB  
S
L
V = 5V, Gain = 8, R = 500Ω  
S
L
V = 5V, Gain = 16, R = 10k  
23.85 24 24.15 23.78 24 24.15  
dB  
dB  
S
L
V = 5V, Gain = 32, R = 10k  
29.7 30 30.2  
29.7 30 30.2  
S
L
V = 5V, Gain = 64, R = 10k  
35.6 35.9 36.2  
34.8 35.5 36  
35.5 35.9 36.2  
34.2 35.5 36  
dB  
dB  
S
L
V = 5V, Gain = 64, R = 500Ω  
S
L
V = ±5V, Gain = 1, R = 10k  
0.05  
0.1 0.01 0.08  
0
0.07 0.05  
0
0.07  
dB  
dB  
S
L
V = ±5V, Gain = 1, R = 500Ω  
0.1 0.01 0.08  
S
L
V = ±5V, Gain = 2, R = 10k  
5.96 6.02 6.1  
5.96 6.02 6.1  
dB  
dB  
S
L
V = ±5V, Gain = 4, R = 10k  
11.9 12.02 12.15 11.9 12.02 12.15  
17.85 18 18.15 17.85 18 18.15  
17.80 17.95 18.1  
S
L
V = ±5V, Gain = 8, R = 10k  
dB  
dB  
S
L
V = ±5V, Gain = 8, R = 500Ω  
17.72 17.95 18.1  
S
L
V = ±5V, Gain = 16, R = 10k  
23.85 24 24.15 23.8 24 24.15  
29.85 30 30.15 29.78 30 30.15  
dB  
dB  
S
L
V = ±5V, Gain = 32, R = 10k  
S
L
V = ±5V, Gain = 64, R = 10k  
35.7 35.95 36.2  
35.2 35.8 36.2  
35.7 35.95 36.2  
34.8 35.8 36.2  
dB  
dB  
S
L
V = ±5V, Gain = 64, R = 500Ω  
S
L
Offset Voltage Magnitude (Internal Op Amp)  
1.5  
9
1.5  
11  
mV  
(V ) (Note 8)  
OS(OA)  
Offset Voltage Drift (Internal Op Amp) (Note 8)  
6
8
µV/°C  
Offset Voltage Magnitude  
Gain = 1  
Gain = 8  
3
2
15  
10  
3
2
17  
12  
mV  
mV  
(Referred to “IN” Pin) (V  
)
OS(IN)  
DC Input Resistance (Note 9)  
DC V = 0V  
Gain = 0  
Gain = 1  
Gain = 2  
Gain = 4  
Gain = 8, 16, 32, 64  
IN  
>100  
10  
5
2.5  
1.25  
>100  
10  
5
2.5  
1.25  
MΩ  
kΩ  
kΩ  
kΩ  
kΩ  
6910123fa  
7
LTC6910-1  
LTC6910-2/LTC6910-3  
ELECTRICAL CHARACTERISTICS  
to midsupply point, unless otherwise noted.  
The denotes the specifications that apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k  
LTC6910-2C/LTC6910-2I  
MIN TYP MAX  
LTC6910-2H  
MIN TYP MAX  
PARAMETER  
CONDITIONS  
UNIT  
Specifications for LTC6910-2 Only  
DC Small-Signal Output Resistance  
Gain = 0  
Gain = 1  
Gain = 2  
Gain = 4  
Gain = 8  
Gain = 16  
Gain = 32  
Gain = 64  
0.4  
0.7  
1
1.6  
2.8  
5
0.4  
0.7  
1
1.6  
2.8  
5
10  
20  
10  
20  
Gain-Bandwidth Product  
Gain = 64, f = 200kHz  
9
7
13  
13  
16  
19  
9
7
13  
13  
16  
19  
MHz  
MHz  
IN  
Wideband Noise (Referred to Input)  
f = 1kHz to 200kHz  
Gain = 0 Output Noise  
Gain = 1  
Gain = 2  
Gain = 4  
Gain = 8  
Gain = 16  
Gain = 32  
Gain = 64  
3.8  
10.7  
7.3  
5.3  
4.6  
4.2  
4
3.8  
10.7  
7.3  
5.3  
4.6  
4.2  
4
µV  
RMS  
RMS  
RMS  
RMS  
RMS  
RMS  
RMS  
RMS  
µV  
µV  
µV  
µV  
µV  
µV  
µV  
3.6  
3.6  
Voltage Noise Density (Referred to Input)  
f = 50kHz  
Gain = 1  
Gain = 2  
Gain = 4  
Gain = 8  
Gain = 16  
Gain = 32  
Gain = 64  
24  
16  
12  
10.3  
9.4  
9
24  
16  
12  
10.3  
9.4  
9
nV/Hz  
nV/Hz  
nV/Hz  
nV/Hz  
nV/Hz  
nV/Hz  
nV/Hz  
8.1  
8.1  
Total Harmonic Distortion  
Gain = 8, f = 10kHz, V  
= 1V  
RMS  
–90  
0.003  
–90  
0.003  
dB  
%
IN  
OUT  
Gain = 8, f = 100kHz, V  
= 1V  
RMS  
–77  
0.014  
–77  
0.014  
dB  
%
IN  
OUT  
AGND (Common Mode) Input Voltage Range V = 2.7V  
0.85  
0.7  
4.3  
1.55  
3.6  
3.4  
0.85  
0.7  
4.3  
1.55  
3.6  
3.4  
V
V
V
S
(Note 10)  
V = 5V  
S
V = ±5V  
S
6910123fa  
8
LTC6910-1  
LTC6910-2/LTC6910-3  
ELECTRICAL CHARACTERISTICS  
to midsupply point, unless otherwise noted.  
The denotes the specifications that apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k  
LTC6910-3C/LTC6910-3I  
MIN TYP MAX  
LTC6910-3H  
MIN TYP MAX  
PARAMETER  
CONDITIONS  
UNIT  
Specifications for LTC6910-3 Only  
Voltage Gain (Note 7)  
V = 2.7V, Gain = 1, R = 10k  
0.05  
0
0.07 0.05  
0
0.09  
dB  
dB  
S
L
V = 2.7V, Gain = 1, R = 500Ω  
0.1 0.02 0.06 0.11 0.02 0.06  
S
L
V = 2.7V, Gain = 2, R = 10k  
5.93 6.02 6.08  
9.35 9.5 9.7  
5.93 6.02 6.09  
9.35 9.5 9.75  
dB  
dB  
S
L
V = 2.7V, Gain = 3, R = 10k  
S
L
V = 2.7V, Gain = 4, R = 10k  
11.9 11.98 12.2  
11.8 11.98 12.2  
11.9 11.98 12.2  
11.75 11.98 12.2  
dB  
dB  
S
L
V = 2.7V, Gain = 4, R = 500Ω  
S
L
V = 2.7V, Gain = 5, R = 10k  
13.85 13.92 14.05 13.8 13.92 14.05  
dB  
dB  
S
L
V = 2.7V, Gain = 6, R = 10k  
15.4 15.5 15.6  
15.4 15.5 15.6  
S
L
V = 2.7V, Gain = 7, R = 10k  
16.7 16.85 17  
16.55 16.8 17  
16.7 16.85 17  
16.47 16.8 17  
dB  
dB  
S
L
V = 2.7V, Gain = 7, R = 500Ω  
S
L
V = 5V, Gain = 1, R = 10k  
0.05  
0
0.07 0.05  
0
0.07  
dB  
dB  
S
L
V = 5V, Gain = 1, R = 500Ω  
0.1 0.01 0.08  
5.96 6.02 6.08  
9.45 9.54 9.65  
0.1 0.01 0.08  
5.96 6.02 6.08  
9.45 9.54 9.65  
S
L
V = 5V, Gain = 2, R = 10k  
dB  
dB  
S
L
V = 5V, Gain = 3, R = 10k  
S
L
V = 5V, Gain = 4, R = 10k  
11.85 12.02 12.15 11.85 12.02 12.15  
11.8 11.95 12.15 11.75 11.95 12.15  
dB  
dB  
S
L
V = 5V, Gain = 4, R = 500Ω  
S
L
V = 5V, Gain = 5, R = 10k  
13.8 13.95 14.05 13.8 13.95 14.05  
15.35 15.5 15.65 15.35 15.5 15.65  
dB  
dB  
S
L
V = 5V, Gain = 6, R = 10k  
S
L
V = 5V, Gain = 7, R = 10k  
16.7 16.85 17  
16.6 16.8 17  
16.7 16.85 17  
16.5 16.8 17  
dB  
dB  
S
L
V = 5V, Gain = 7, R = 500Ω  
S
L
V = ±5V, Gain = 1, R = 10k  
0.06  
0
0.07 0.06  
0
0.07  
dB  
dB  
S
L
V = ±5V, Gain = 1, R = 500Ω  
0.1 0.01 0.08 0.12 0.01 0.08  
S
L
V = ±5V, Gain = 2, R = 10k  
5.96 6.02 6.08  
9.4 9.54 9.65  
5.96 6.02 6.08  
9.4 9.54 9.65  
dB  
dB  
S
L
V = ±5V, Gain = 3, R = 10k  
S
L
V = ±5V, Gain = 4, R = 10k  
11.85 12 12.2  
11.8 12 12.2  
11.85 12 12.2  
11.8 12 12.2  
dB  
dB  
S
L
V = ±5V, Gain = 4, R = 500Ω  
S
L
V = ±5V, Gain = 5, R = 10k  
13.8 13.95 14.1  
15.35 15.5 15.7  
13.8 13.95 14.1  
15.35 15.5 15.7  
dB  
dB  
S
L
V = ±5V, Gain = 6, R = 10k  
S
L
V = ±5V, Gain = 7, R = 10k  
16.7 16.85 17.05 16.7 16.85 17.05  
16.65 16.8 17 16.6 16.8 17  
dB  
dB  
S
L
V = ±5V, Gain = 7, R = 500Ω  
S
L
Offset Voltage Magnitude (Internal Op Amp)  
1.5  
8
1.5  
8
mV  
(V ) (Note 8)  
OS(OA)  
Offset Voltage Drift (Internal Op Amp) (Note 8)  
6
8
µV/°C  
Offset Voltage Magnitude  
Gain = 1  
Gain = 4  
3
1.9  
15  
10  
3
1.9  
15  
10  
mV  
mV  
(Referred to “IN” Pin) (V  
)
OS(IN)  
DC Input Resistance (Note 9)  
DC V = 0V  
IN  
Gain = 0  
Gain = 1  
Gain = 2  
Gain = 3  
Gain = 4  
Gain = 5  
Gain = 6  
Gain = 7  
>100  
10  
5
3.3  
2.5  
2
1.7  
1.4  
>100  
10  
5
3.3  
2.5  
2
1.7  
1.4  
MΩ  
kΩ  
kΩ  
kΩ  
kΩ  
kΩ  
kΩ  
kΩ  
6910123fa  
9
LTC6910-1  
LTC6910-2/LTC6910-3  
ELECTRICAL CHARACTERISTICS  
to midsupply point, unless otherwise noted.  
The denotes the specifications that apply over the full operating  
temperature range, otherwise specifications are at TA = 25°C. VS = 5V, AGND = 2.5V, Gain = 1 (Digital Inputs 001), RL = 10k  
LTC6910-3C/LTC6910-3I  
MIN TYP MAX  
LTC6910-3H  
MIN TYP MAX  
PARAMETER  
CONDITIONS  
UNIT  
Specifications for LTC6910-3 Only  
DC Small-Signal Output Resistance  
Gain = 0  
Gain = 1  
Gain = 2  
Gain = 3  
Gain = 4  
Gain = 5  
Gain = 6  
Gain = 7  
0.4  
0.7  
1
1.3  
1.6  
1.9  
2.2  
2.5  
0.4  
0.7  
1
1.3  
1.6  
1.9  
2.2  
2.5  
Gain-Bandwidth Product  
Gain = 7, f = 200kHz  
11  
11  
MHz  
IN  
Wideband Noise (Referred to Input)  
f = 1kHz to 200kHz  
Gain = 0 Output Noise  
Gain = 1  
Gain = 2  
Gain = 3  
Gain = 4  
Gain = 5  
Gain = 6  
Gain = 7  
3.8  
10.7  
7.3  
6.1  
5.3  
5.2  
4.9  
4.7  
3.8  
10.7  
7.3  
6.1  
5.3  
5.2  
4.9  
4.7  
µV  
RMS  
RMS  
RMS  
RMS  
RMS  
RMS  
RMS  
RMS  
µV  
µV  
µV  
µV  
µV  
µV  
µV  
Voltage Noise Density (Referred to Input)  
f = 50kHz  
Gain = 1  
Gain = 2  
Gain = 3  
Gain = 4  
Gain = 5  
Gain = 6  
Gain = 7  
24  
16  
14  
24  
16  
14  
nV/Hz  
nV/Hz  
nV/Hz  
nV/Hz  
nV/Hz  
nV/Hz  
nV/Hz  
12  
12  
11.6  
11.2  
10.5  
11.6  
11.2  
10.5  
Total Harmonic Distortion  
Gain = 4, f = 10kHz, V  
= 1V  
RMS  
90  
0.003  
90  
0.003  
dB  
%
IN  
OUT  
Gain = 4, f = 100kHz, V  
= 1V  
RMS  
80  
0.01  
80  
0.01  
dB  
%
IN  
OUT  
AGND (Common Mode) Input Voltage Range V = 2.7V  
0.85  
0.7  
4.3  
1.55  
3.6  
3.4  
0.85  
0.7  
4.3  
1.55  
3.6  
3.4  
V
V
V
S
(Note 10)  
V = 5V  
S
V = ±5V  
S
Note 1: Absolute Maximum Ratings are those values beyond which the life  
of the device may be impaired.  
Note 2: The LTC6910-XC and LTC6910-XI are guaranteed functional over  
the operating temperature range of 40°C to 85°C. The LTC6910-XH are  
guaranteed functional over the operating temperature range of –40°C to  
125°C.  
Note 3: The LTC6910-XC are guaranteed to meet specified performance  
from 0°C to 70°C. The LTC6910-XC are designed, characterized and  
expected to meet specified performance from 40°C to 85°C but are not  
tested or QA sampled at these temperatures. LTC6910-XI are guaranteed  
to meet specified performance from 40°C to 85°C. The LTC6910-XH are  
guaranteed to meet specified performance from 40°C to 125°C.  
Note 4: Operating all three logic inputs at 0.5V causes the supply current  
to increase typically 0.1mA from this specification.  
Note 5: Output voltage swings are measured as differences between the  
output and the respective supply rail.  
Note 6: Extended operation with output shorted may cause junction  
temperature to exceed the 150°C limit and is not recommended.  
Note 7: Gain is measured with a DC large-signal test using an output  
excursion between approximately 30% and 70% of supply voltage.  
Note 8: Offset voltage referred to “IN” pin is (1 + 1/G) times offset voltage  
of the internal op amp, where G is nominal gain magnitude. See Applica-  
tions Information.  
Note 9: Input resistance can vary by approximately ±30% part-to-part at a  
given gain setting.  
Note 10: At limits of AGND input range, open-loop gain of internal op amp  
may be greater than, or as much as 15dB below, its value at nominal  
AGND value.  
6910123fa  
10  
LTC6910-1  
LTC6910-2/LTC6910-3  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS (LTC6910-1)  
LTC6910-1 Gain Shift  
LTC6910-1 –3dB Bandwidth  
vs Gain Setting  
vs Temperature  
LTC6910-1 Frequency Response  
50  
8.0  
7.5  
7.0  
6.5  
6.0  
5.5  
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
0.2  
0.1  
0
V
= ±5V, V = 5mV  
IN  
V
IN  
V
V
= 5mV  
RMS  
V
= ±2.5V  
S
RMS  
S
= 2.7V  
OUTPUT UNLOADED  
S
S
GAIN OF 100  
GAIN OF 50  
= ±5V  
40  
30  
GAIN = 100  
GAIN = 10  
GAIN OF 20  
GAIN OF 10  
GAIN OF 5  
20  
10  
GAIN = 1  
GAIN OF 2  
GAIN OF 1  
–0.1  
0
–10  
–0.2  
100  
1k  
10k  
100k  
1M  
10M  
1
10  
100  
–50  
0
50  
100  
150  
FREQUENCY (Hz)  
GAIN  
TEMPERATURE (°C)  
6910 G02  
6910 G03  
6910 G01  
LTC6910-1 Output Voltage Swing  
vs Load Current  
LTC6910-1 Power Supply  
Rejection vs Frequency  
LTC6910-1 Noise Density  
vs Frequency  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
+V  
100  
S
V
= ±2.5V  
S
INPUT-REFERRED  
V
S
= ±2.5V  
125°C  
25°C  
GAIN = 1  
+V – 0.5  
S
V
T
= ±2.5V  
= 25°C  
S
A
SOURCE  
+V – 1.0  
S
–40°C  
GAIN = 1  
+SUPPLY  
+V – 1.5  
S
–SUPPLY  
+V – 2.0  
S
GAIN = 10  
10  
–V + 2.0  
S
GAIN = 100  
–V + 1.5  
S
–V + 1.0  
S
SINK  
10  
–V + 0.5  
S
–V  
S
1
0.01  
0.1  
1
100  
0.1  
1
10  
FREQUENCY (kHz)  
100  
1000  
10  
FREQUENCY (kHz)  
1
100  
OUTPUT CURRENT (mA)  
6910 G04  
6910 G05  
6910 G06  
LTC6910-1 Distortion with Light  
Loading (RL = 10k)  
LTC6910-1 Distortion with Heavy  
LTC6910-1 THD + Noise  
vs Input Voltage  
Loading (RL = 500)  
–30  
3
–30  
–40  
–50  
3
1
–20  
V
V
= ±2.5V  
f
= 1kHz  
= ±5V  
S
IN  
S
= 1V  
(2.83V )  
P-P  
V
–30  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
–110  
OUT  
RMS  
–40  
–50  
1
THD MEASURES HD2 AND HD3  
NOISE BW = 22kHz  
GAIN SETTING = 100  
GAIN SETTING = 10  
GAIN =100  
GAIN =10  
0.3  
0.3  
–60  
–70  
0.1  
–60  
–70  
0.1  
GAIN =100  
GAIN =10  
GAIN =1  
0.03  
0.01  
0.003  
0.001  
0.03  
0.01  
0.003  
0.001  
GAIN =1  
–80  
–80  
V
V
= ±2.5V  
S
–90  
–90  
= 1V  
(2.83V )  
P-P  
OUT  
RMS  
GAIN SETTING = 1  
0.1  
INPUT VOLTAGE (V  
THD MEASURES HD2 AND HD3  
–100  
–100  
50  
100  
200  
0
150  
50  
100  
200  
0.01  
1
10  
0
150  
FREQUENCY (kHz)  
FREQUENCY (kHz)  
)
P-P  
6910 G09  
6910 G08  
6910 G07  
6910123fa  
11  
LTC6910-1  
LTC6910-2/LTC6910-3  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS (LTC6910-2)  
LTC6910-2 Gain Shift  
LTC6910-2 –3dB Bandwidth  
vs Gain Setting  
vs Temperature  
LTC6910-2 Frequency Response  
50  
8.0  
7.5  
7.0  
6.5  
6.0  
5.5  
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
0.2  
0.1  
0
V
V
= ±5V  
IN  
V
IN  
V
V
= 10mV  
RMS  
V
S
= ±2.5V  
S
= 10mV  
= 2.7V  
OUTPUT UNLOADED  
RMS  
S
= ±5V  
40  
30  
S
GAIN OF 64  
GAIN OF 32  
GAIN OF 16  
GAIN OF 8  
GAIN OF 4  
GAIN OF 2  
GAIN = 64  
GAIN = 8  
20  
10  
GAIN = 1  
–0.1  
GAIN OF 1  
0
–10  
100  
–0.2  
1k  
10k  
100k  
1M  
10M  
1
10  
GAIN  
100  
–50  
0
50  
100  
150  
FREQUENCY (Hz)  
TEMPERATURE (°C)  
6910 G11  
6910 G12  
6910 G10  
LTC6910-2 Output Voltage Swing  
vs Load Current  
LTC6910-2 Power Supply  
Rejection vs Frequency  
LTC6910-2 Noise Density  
vs Frequency  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
+V  
100  
S
V
= ±2.5V  
S
INPUT-REFERRED  
V
S
= ±2.5V  
125°C  
25°C  
+SUPPLY  
GAIN = 1  
+V – 0.5  
S
V
T
= ±2.5V  
= 25°C  
S
A
SOURCE  
+V – 1.0  
S
–40°C  
GAIN = 1  
+V – 1.5  
S
–SUPPLY  
+V – 2.0  
S
GAIN = 8  
10  
–V + 2.0  
S
GAIN = 64  
–V + 1.5  
S
–V + 1.0  
S
SINK  
10  
–V + 0.5  
S
–V  
S
1
0.01  
0.1  
1
100  
0.1  
1
10  
100  
1000  
10  
FREQUENCY (kHz)  
1
100  
OUTPUT CURRENT (mA)  
FREQUENCY (kHz)  
6910 G13  
6910 G14  
6910 G15  
LTC6910-2 Distortion with Light  
Loading (RL = 10k)  
LTC6910-2 Distortion with Heavy  
LTC6910-2 THD + Noise  
vs Input Voltage  
Loading (RL = 500)  
–30  
3
–30  
–40  
–50  
3
1
–20  
V
V
= ±2.5V  
S
GAIN  
SETTING = 64  
= 1V  
(2.83V )  
P-P  
–30  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
–110  
OUT  
RMS  
–40  
–50  
1
THD MEASURES HD2 AND HD3  
GAIN = 64  
GAIN = 8  
0.3  
0.3  
–60  
–70  
0.1  
–60  
–70  
0.1  
GAIN = 64  
GAIN  
0.03  
0.01  
0.003  
0.001  
0.03  
0.01  
0.003  
0.001  
SETTING = 8  
GAIN = 8  
GAIN =1  
GAIN =1  
–80  
–80  
V
V
= ±2.5V  
f
= 1kHz  
S
IN  
S
–90  
–90  
= 1V  
(2.83V )  
P-P  
V
= ±5V  
OUT  
RMS  
THD MEASURES HD2 AND HD3  
NOISE BW = 22kHz  
GAIN SETTING = 1  
–100  
–100  
50  
100  
200  
0
150  
50  
100  
200  
0.01  
0.1  
1
10  
0
150  
FREQUENCY (kHz)  
FREQUENCY (kHz)  
INPUT VOLTAGE (V  
)
P-P  
6910 G18  
6910 G17  
6910 G16  
6910123fa  
12  
LTC6910-1  
LTC6910-2/LTC6910-3  
U W  
TYPICAL PERFOR A CE CHARACTERISTICS (LTC6910-3)  
LTC6910-3 Gain Shift  
LTC6910-3 –3dB Bandwidth  
vs Gain Setting  
vs Temperature  
LTC6910-3 Frequency Response  
20  
8.0  
7.0  
6.0  
5.0  
4.0  
3.0  
2.0  
1.0  
0
0.02  
0.01  
0
V
= 10mV  
RMS  
V
= ±2.5V  
IN  
V
S
GAIN OF 7 GAIN OF 6  
= 2.7V  
OUTPUT UNLOADED  
S
S
V
= ±5V  
15  
10  
GAIN OF 5  
GAIN OF 4  
GAIN = 7  
GAIN OF 3  
GAIN OF 2  
GAIN OF 1  
GAIN = 4  
5
0
GAIN = 1  
–0.01  
–5  
V
V
= ±5V  
IN  
S
= 10mV  
RMS  
–10  
–0.02  
100  
1k  
10k  
100k  
1M  
10M  
1
3
6
9 10  
7 8  
2
4
5
–50  
0
50  
100  
150  
FREQUENCY (Hz)  
GAIN  
TEMPERATURE (°C)  
6910 G20  
6910 G21  
6910 G19  
LTC6910-3 Output Voltage Swing  
vs Load Current  
LTC6910-3 Power Supply  
Rejection vs Frequency  
LTC6910-3 Noise Density  
vs Frequency  
90  
80  
70  
60  
50  
40  
30  
20  
10  
0
+V  
100  
S
V
= ±2.5V  
S
INPUT-REFERRED  
V
S
= ±2.5V  
125°C  
25°C  
+SUPPLY  
GAIN = 1  
+V – 0.5  
S
V
T
= ±2.5V  
= 25°C  
S
A
SOURCE  
+V – 1.0  
S
–40°C  
GAIN = 1  
+V – 1.5  
S
–SUPPLY  
GAIN = 4  
GAIN = 7  
+V – 2.0  
S
10  
–V + 2.0  
S
–V + 1.5  
S
–V + 1.0  
S
SINK  
10  
–V + 0.5  
S
–V  
S
1
0.01  
0.1  
1
100  
0.1  
1
10  
100  
1000  
10  
FREQUENCY (kHz)  
1
100  
OUTPUT CURRENT (mA)  
FREQUENCY (kHz)  
6910 G22  
6910 G23  
6910 G24  
LTC6910-3 Distortion with Light  
Loading (RL = 10k)  
LTC6910-3 Distortion with Heavy  
LTC6910-3 THD + Noise  
vs Input Voltage  
Loading (RL = 500)  
–30  
3
–30  
–40  
–50  
3
1
–20  
V
V
= ±2.5V  
f
= 1kHz  
S
IN  
S
= 1V  
(2.83V )  
P-P  
V
= ±5V  
–30  
–40  
–50  
–60  
–70  
–80  
–90  
–100  
–110  
OUT  
RMS  
–40  
–50  
1
THD MEASURES HD2 AND HD3  
NOISE BW = 22kHz  
0.3  
GAIN SETTING = 7  
GAIN SETTING = 4  
0.3  
GAIN = 7  
GAIN = 4  
–60  
–70  
0.1  
–60  
–70  
0.1  
GAIN = 7  
GAIN = 4  
0.03  
0.01  
0.003  
0.001  
0.03  
0.01  
0.003  
0.001  
GAIN =1  
–80  
GAIN =1  
–80  
V
V
= ±2.5V  
S
–90  
–90  
= 1V  
(2.83V )  
P-P  
OUT  
RMS  
THD MEASURES HD2 AND HD3  
GAIN SETTING = 1  
–100  
–100  
50  
100  
200  
0
150  
50  
100  
200  
0.01  
0.1  
1
10  
0
150  
FREQUENCY (kHz)  
FREQUENCY (kHz)  
INPUT VOLTAGE (V  
)
P-P  
6910 G27  
6910 G26  
6910 G25  
6910123fa  
13  
LTC6910-1  
LTC6910-2/LTC6910-3  
U
U
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PI FU CTIO S  
Recommended analog ground plane connection depends  
on how power is applied to the LTC6910-X (Figures 1, 2,  
and 3). Single power supply applications typically use V–  
for the system signal ground. The analog ground plane in  
single-supply applications should therefore tie to V, and  
the AGND pin should be bypassed to this ground plane by  
a high quality capacitor of at least 1µF (Figure 1). The  
AGND pin then provides an internal analog reference  
voltage at half the supply voltage (with internal resistance  
of approximately 5k) which is the center of the swing  
range for both input and output. Dual supply applications  
with symmetrical supplies (such as ±5V) have a natural  
system ground at zero volts, which can drive the analog  
ground plane; AGND then connects directly to the ground  
plane, making zero volts the input and output reference  
voltage for the LTC6910-X (Figure 2). Finally, if a dual  
power supply is asymmetrical, the supply ground is still  
the natural ground plane voltage. To maximize signal  
swing capability with an asymmetrical supply, however, it  
is often desirable to refer the LTC6910-X’s analog input  
and output to a voltage equidistant from the two supply  
rails V+ and V. The AGND pin will provide such a potential  
when open-circuited and bypassed with a capacitor (Fig-  
ure 3), just as with a single power supply, but now the  
ground plane connection is different and the LTC6910-X’s  
V+ and Vpins are both isolated from this ground plane.  
OUT (Pin 1): Analog Output. This is the output of an  
internal operational amplifier and swings to near the  
powersupplyrails(V+ andV)asspecifiedintheElectrical  
Characteristics table. The internal op amp remains active  
at all times, including the zero gain setting (digital input  
000).Aswithotheramplifiercircuits,loadingtheoutputas  
lightly as possible will minimize signal distortion and gain  
error. The Electrical Characteristics table shows perfor-  
mance at output currents up to 10mA and current limits  
thatoccurwhentheoutputisshortedtomidsupplyat2.7V  
and ±5V supplies. Signal outputs above 10mA are pos-  
sible but current-limiting circuitry will begin to affect  
amplifierperformanceatapproximately20mA.Long-term  
operation above 20mA output is not recommended. Do  
not exceed maximum junction temperature of 150°C. The  
outputwilldrivecapacitiveloadsupto50pF. Capacitances  
higher than 50pF should be isolated by a series resistor to  
preserve AC stability.  
AGND (Pin 2): Analog Ground. The AGND pin is at the  
midpoint of an internal resistive voltage divider, develop-  
ing a potential halfway between the V+ and Vpins, with an  
equivalent series resistance to the pin of nominally 5kΩ  
(Figure 4). AGND is also the noninverting input of the  
internal op amp, which makes it the ground reference  
voltage for the IN and OUT pins. Because of this, very  
“cleangroundingisimportant,includingananalogground  
plane surrounding the package.  
+
+
+
V
V
V
0.1µF  
0.1µF  
0.1µF  
8
7
6
5
8
7
6
5
4
8
1
7
6
5
4
LTC6910-X  
LTC6910-X  
LTC6910-X  
1
2
3
4
1
2
3
2
3
0.1µF  
0.1µF  
MID-SUPPLY  
REFERENCE  
ANALOG  
GROUND  
PLANE  
ANALOG  
GROUND  
PLANE  
ANALOG  
GROUND  
PLANE  
+
V
1µF  
REFERENCE  
2
1µF  
V
V
SINGLE-POINT  
SYSTEM GROUND  
SINGLE-POINT  
SYSTEM GROUND  
SINGLE-POINT  
SYSTEM GROUND  
DIGITAL GROUND PLANE  
(IF ANY)  
DIGITAL GROUND PLANE  
(IF ANY)  
DIGITAL GROUND PLANE  
(IF ANY)  
6910 F02  
6910 F03  
6910 F01  
Figure 1. Single Supply  
Ground Plane Connection  
Figure 2. Symmetrical Dual Supply  
Ground Plane Connection  
Figure 3. Asymmetrical Dual  
Supply Ground Plane Connection  
6910123fa  
14  
LTC6910-1  
LTC6910-2/LTC6910-3  
U
U
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PI FU CTIO S  
Where AGND does not connect to a ground plane, as in  
Figures1and3,itisimportanttoAC-bypasstheAGNDpin.  
This is especially true when AGND is used as a reference  
voltage for other circuitry. Also, without a bypass capaci-  
tor, wideband noise will enter the signal path from the  
internalvoltagedividerresistorsthatsettheDCvoltageon  
AGND. This noise can reduce SNR by 3dB at high gain  
settings. The resistors present a Thévenin equivalent of  
approximately 5k to the AGND pin. An external capacitor  
from AGND to the ground plane, whose impedance is well  
below 5k at frequencies of interest, will suppress this  
noise.A1µFhighqualitycapacitoriseffectiveinsuppress-  
ing resistor noise for frequencies down to 1kHz. Larger  
capacitors extend this suppression to proportionately  
lower frequencies. This issue does not arise in symmetri-  
cal dual supply applications (Figure 2) because AGND  
goes directly to ground.  
tance.Theinputmayvaryfromrailtorailinthezerogain  
settingbuttheoutputisinsensitivetoitandremainsatthe  
AGNDpotential.CircuitrydrivingtheINpinmustconsider  
the LTC6910-X’s input resistance and the variation of this  
resistance when used at multiple gain settings. Signal  
sources with significant output resistance may introduce  
a gain error as the source’s output resistance and the  
LTC6910-X’sinputresistanceformavoltagedivider. This  
is especially true at the higher gain settings where the  
input resistance is lowest.  
In single supply voltage applications at elevated gain  
settings (digital input 010 or higher), it is important to  
remember that the LTC6910-X’s DC ground reference for  
both input and output is AGND, not V. With increasing  
gains, the LTC6910-X’s input voltage range for unclipped  
output is no longer rail-to-rail but shrinks toward AGND.  
The OUT pin also swings positive or negative with respect  
toAGND. Atunitygain(digitalinput001), bothINandOUT  
voltages can swing from rail to rail (Tables 1, 2, 3).  
Inapplicationsrequiringananaloggroundreferenceother  
than halfway between the supply rails, the user can over-  
ride the built-in analog ground reference by tying the  
AGND pin to a reference voltage within the AGND voltage  
range specified in the Electrical Characteristics table. The  
AGND pin will load the external reference with approxi-  
mately 5k returned to the mid-supply potential. AGND  
should still be capacitively bypassed to a ground plane as  
noted above. Do not connect the AGND pin to the Vpin.  
G2  
7
G1  
6
G0  
5
CMOS LOGIC  
IN (Pin 3): Analog Input. The input signal to the amplifier  
in the LTC6910-X is the voltage difference between the IN  
andAGNDpins.TheINpinconnectsinternallytoadigitally  
controlled resistance whose other end is a current sum-  
ming point at the same potential as the AGND pin (Fig-  
ure 4). At unity gain (digital input 001), the value of this  
inputresistanceisapproximately10kandtheINvoltage  
range is rail-to-rail (V+ to V). At gain settings above unity  
(digital input 010 or higher), the input resistance falls.  
Also, thelinearinputvoltagerangefallsininversepropor-  
tiontogain.(Thehighergainsaredesignedtoboostlower  
level signals with good noise performance.) Tables 1, 2,  
and 3 summarize this behavior. In the “zero” gain state  
(digital input 000), analog switches disconnect the IN pin  
internally and this pin presents a very high input resis-  
IN  
3
INPUT R ARRAY  
FEEDBACK R ARRAY  
MOS-INPUT  
1
OUT  
OP AMP  
+
10k  
10k  
+
V
V
8
2
4
6910 F04  
+
V
AGND  
V
Figure 4. Block Diagram  
6910123fa  
15  
LTC6910-1  
LTC6910-2/LTC6910-3  
U
U
U
PI FU CTIO S  
V, V+ (Pins 4, 8): Power Supply Pins. The V+ and Vpins  
should be bypassed with 0.1µF capacitors to an adequate  
analog ground plane using the shortest possible wiring.  
Electrically clean supplies and a low impedance ground  
are important for the high dynamic range available from  
the LTC6910-X (see further details under AGND). Low  
noise linear power supplies are recommended. Switching  
power supplies require special care to prevent switching  
noise coupling into the signal path, reducing dynamic  
range.  
Table1,Table2andTable3).Digitalinputcode000causes  
azerogainwithverylowoutputnoise. Inthiszerogain  
state the IN pin is disconnected internally, but the OUT pin  
remains active and forced by the internal op amp to the  
voltage present on the AGND pin. Note that the voltage  
gain from IN to OUT is inverting: OUT and IN pins always  
swing on opposite sides of the AGND potential. The G pins  
are high impedance CMOS logic inputs and must be  
connected(theywillfloattounpredictablevoltagesifopen  
circuited). No speed limitation is associated with the  
digital logic because it is memoryless and much faster  
than the analog signal path.  
G0, G1, G2 (Pins 5, 6, 7): CMOS-Level Digital Gain-  
ControlInputs. G2isthemostsignificantbit(MSB). These  
pins control the voltage gain from IN to OUT pins (see  
6910123fa  
16  
LTC6910-1  
LTC6910-2/LTC6910-3  
W U U  
APPLICATIO S I FOR ATIO  
U
Functional Description  
with finite speed, toward a differently scaled version of the  
input signal. Varying the gain faster than the output can  
settle produces a garbled output signal. The LTC6910-X  
analog path settles with a characteristic time constant or  
time scale, τ, that is roughly the standard value for a first  
order band limited response:  
The LTC6910 family are small outline, wideband inverting  
DC amplifiers whose voltage gain is digitally program-  
mable. Each delivers a choice of eight voltage gains,  
controlled by the 3-bit digital inputs to the G pins, which  
accept CMOS logic levels. The gain code is always mono-  
tonic; an increase in the 3-bit binary number (G2 G1 G0)  
causesanincreaseinthegain. Table1, Table2andTable 3  
list the nominal voltage gains for LTC6910-1, LTC6910-2  
and LTC6910-3 respectively. Gain control within each  
amplifier occurs by switching resistors from a matched  
array in or out of a closed-loop op amp circuit using MOS  
analog switches (Figure 4). Bandwidth depends on gain  
setting. CurvesintheTypicalPerformanceCharacteristics  
section show measured frequency responses.  
τ = 1 / (2 π f-3dB),  
where f-3dB is the –3dB bandwidth of the amplifier. For  
example, when the upper –3dB frequency is 1MHz, τ is  
about 160ns. The bandwidth, and therefore τ, varies with  
gain(seeFrequencyResponseand3dBBandwidthcurves  
inTypicalPerformanceCharacteristics).Afteragainchange  
it is the new gain value that determines the settling time  
constant.Exactsettlingtimingdependsonthegainchange,  
the input signal and the possibility of slew limiting at the  
output.Howeverasabasicguideline,therangeofτ is20ns  
to 1400ns for the LTC6910-1, 20ns to 900ns for the  
LTC6910-2 and 20ns to 120ns for the LTC6910-3. These  
numbers correspond to the ranges of –3dB Bandwidth in  
theplotsofthattitleunderTypicalPerformanceCharacter-  
istics.  
Digital Control  
Logic levels for the LTC6910-X digital gain control inputs  
(Pins5,6,7)arenominallyrail-to-railCMOS.Logic1isV+,  
logic 0 is Vor alternatively 0V when using ±5V supplies.  
The part is tested with the values listed in the Electrical  
Characteristics table (Digital Input “High” and “Low” Volt-  
ages), which are 10% and 90% of full excursion on the  
inputs. That is, the tested logic levels are 0.27V and 2.43V  
with a 2.7V supply, 0.5V and 4.5V levels with 0V and 5V  
supply rails, and 0.5V and 4.5V logic levels at ±5V sup-  
plies. Do not attempt to drive the digital inputs with TTL  
logic levels (such as HCT or LS logic), which normally do  
not swing near +5V. TTL sources should be adapted with  
CMOS drivers or suitable pull-up resistors to 5V so that  
they will swing to the positive rail.  
Offset Voltage vs Gain Setting  
The electrical tables list DC offset (error) voltage at the  
inputs of the internal op-amp in Figure 4, VOS(OA), which  
is the source of DC offsets in the LTC6910-X. The tables  
also show the resulting, gain dependent offset voltage  
referred to the IN pin, VOS(IN). These two measures are  
related through the feedback/input resistor ratio, which  
equals the nominal gain-magnitude setting, G:  
VOS(IN) = (1 + 1/G) VOS(OA)  
Timing Constraints  
Offsetvoltagesatanygainsettingcanbeinferredfromthis  
relationship. For example, an internal offset VOS(OA) of  
1mV will appear referred to the IN pin as 2mV at a gain  
settingGof1, or1.5mVatagainsettingof2. Athighgains,  
VOS(IN) approaches VOS(OA). (Offset voltage can be of  
either polarity; it is a statistical parameter centered on  
zero.) The MOS input circuitry of the internal op amp in  
Figure 4 draws negligible input currents (unlike some op  
amps), so only VOS(OA) and G affect the overall amplifier’s  
offset.  
Settling time in the CMOS gain-control logic is typically  
several nanoseconds and faster than the analog signal  
path. When amplifier gain changes, the limiting timing is  
analog, not digital, because the effects of digital input  
changes are observed only through the analog output  
(Figure 4). The LTC6910-X’s logic is static (not latched)  
and therefore lacks bus timing requirements. However, as  
with any programmable-gain amplifier, each gain change  
causesanoutputtransientastheamplifier’soutputmoves,  
6910123fa  
17  
LTC6910-1  
LTC6910-2/LTC6910-3  
W U U  
U
APPLICATIO S I FOR ATIO  
Offset Nulling and Drift  
these internal 10k resistors also have an absolute toler-  
ance of up to ±30% and a temperature coefficient of  
typically –30ppm/°C.) Also, as described under Pin Func-  
tions for AGND, a bypass capacitor C1 is always advisable  
when AGND is not connected directly to a ground plane.  
Because internal op amp offset voltage VOS(OA) is gain  
independent as noted above, offset trimming can be  
readilyaddedattheAGNDpin,whichdrivesthenoninverting  
input of the internal op amp. Such a trim shifts the AGND  
voltage slightly from the system’s analog ground refer-  
ence, where AGND would otherwise connect directly. This  
is convenient when a low resistance analog ground poten-  
tial or analog ground reference exists, for the return of a  
voltage divider as in Figure 5a. When adjusted for zero DC  
output voltage when the LTC6910-X has zero DC input  
voltage,thisDCnullingwillholdatothergainsettingsalso.  
With this trim technique in place, the remaining DC offset  
sources are drifts with temperature (typically 6µV/°C  
referred to VOS(OA)), shifts in the LTC6910-X’s supply  
voltage divided by the PSRR factors, supply voltage shifts  
coupling through the two 10k internal resistors of  
Figure 4, and of course any shifts in the reference voltages  
that supply +VREF and –VREF in Figure 5a.  
Figure 5a shows the basic arrangement for dual-supply  
applications. A voltage divider (R1 and R2) scales external  
reference voltages +VREF and –VREF to a range equaling or  
slightly exceeding the approximately ±10mV op amp off-  
set-voltage range. Resistor R1 is chosen to drop the  
±10mV maximum trim voltage when the potentiometer is  
set to either end. Thus if VREF is 5V, R1 should be about  
100. Note also that the two internal 10k resistors in  
Figure 4 tend to bias AGND toward the mid-point of V+ and  
V. TheexternalvoltagedividerwillswampthiseffectifR1  
is much less than 5k. When considering the effect of the  
internal 10k resistors, note that they form a Thévenin  
equivalent of 5k in series with an open-circuit voltage at  
thehalfwaypotential(V++V)/2.(Althoughtightlymatched,  
Figure 5b illustrates how to make an offset voltage adjust-  
ment relative to the mid-supply potential in single supply  
applications. Resistor values shown provide at least a  
±10mV adjustment range assuming the minimum values  
for the internal resistors at pin 2 and a supply potential of  
5V. For single supply systems where all circuitry is DC  
referenced to some other fixed bias potential, an offset  
adjustment scheme is shown in Figure 5c. A low value for  
R1 overrides the internal resistors at pin 2 and applies the  
system DC bias to the LTC6910. Actual values for the  
adjustment components depend on the magnitude of the  
DC bias voltage. Offset adjustment component values  
shown are an example with a single 5V VCC supply and a  
1.25V system DC reference voltage.  
1.25V  
SYSTEM DC REFERENCE  
VOLTAGE  
5V  
V
5V  
CC  
V
5V  
CC  
V
CC  
8
8
+V  
REF  
R1  
100Ω  
LTC6910-X  
AGND  
17.4k  
LTC6910-X  
LTC6910-X  
AGND  
4.64k  
500Ω  
976Ω  
R2  
49.9k  
2
2
2
AGND  
20k  
500Ω  
1µF  
1µF  
R1  
C1  
1µF  
17.4k  
–V  
REF  
6910 F05a  
6910 F05b  
6910 F05c  
4
4
ANALOG GROUND  
REFERENCE  
Figure 5a. Offset Nulling  
(Dual Supplies)  
Figure 5b. Offset Nulling  
(Single Supply, Half Supply Reference)  
Figure 5c. Offset Nulling  
(Single Supply, External Reference)  
6910123fa  
18  
LTC6910-1  
LTC6910-2/LTC6910-3  
W U U  
APPLICATIO S I FOR ATIO  
U
Analog Input and DC Levels  
demands some care if employed with a series input  
capacitor. When the chip enters the zero gain mode, the  
opened IN pin tends to freeze the voltage across the  
capacitorto the value itheld just beforethe zerogainstate.  
This can place the IN pin at or near the DC potential of a  
supply rail (the IN pin may also drift to a supply potential  
in this state due to small junction leakage currents). To  
prevent driving the IN pin outside the supply limit and  
potentially damaging the chip, avoid AC input signals in  
the zero gain state with a series capacitor. Also, switching  
later to a nonzero gain value will cause a transient pulse at  
the output of the LTC6910-X (with a time constant set by  
the capacitor value and the new LTC6910-X input resis-  
tance value). This occurs because the IN pin returns to the  
AGND potential and transient current flows to charge the  
capacitor to a new DC drop.  
As described in Tables 1, 2 and 3 and under Pin Functions,  
the IN pin presents a variable input resistance returned  
internally to a potential equal to that at the AGND pin  
(within a small offset-voltage error). This input resistance  
varies with digital gain setting, becoming infinite (open  
circuit)atzerogain(digitalinput000),andaslowas1kΩ  
at high gain settings. It is important to allow for this  
input-resistance variation with gain, when driving the  
LTC6910-X from other circuitry. Also, as the gain in-  
creases above unity, the DC linear input-voltage range  
(correspondingtorail-to-railswingattheOUTpin)shrinks  
toward the AGND potential. The output swings positive or  
negative around the AGND potential (in the opposite  
direction from the input, because the gain is inverting).  
AC-Coupled Operation  
SNR and Dynamic Range  
Adding a capacitor in series with the IN pin makes the  
LTC6910-X into an AC-coupled amplifier, suppressing the  
source’s DC level (and even minimizing the offset voltage  
from the LTC6910-X itself). No further components are  
required because the input of the LTC6910-X biases itself  
correctly when a series capacitor is added. The IN pin  
connects to an internal variable resistor (and floats when  
DC open-circuited to a well defined voltage equal to the  
AGND input voltage at nonzero gain settings). The value of  
this internal input resistor varies with gain setting over a  
total range of about 1k to 10k, depending on version (the  
rightmost columns of Table 1, Table 2 and Table 3).  
Therefore, with a series input capacitor the low frequency  
cutoff will also vary with gain. For example, for a low  
frequency corner of 1kHz or lower, use a series capacitor  
of 0.16µF or larger. A 0.16µF capacitor has a reactance of  
1kat 1kHz, giving a 1kHz lower –3dB frequency for gain  
settings of 10V/V through 100V/V in the LTC6910-1. If the  
LTC6910-1 is operated at lower gain settings with an  
0.16µF input capacitor, the higher input resistance will  
reducethelowercornerfrequencydownto100Hzatagain  
setting of 1V/V. These frequencies scale inversely with the  
value of the input capacitor.  
The term “dynamic range” is much used (and abused)  
with signal paths. Signal-to-noise ratio (SNR) is an unam-  
biguous comparison of signal and noise levels, measured  
in the same way and under the same operating conditions.  
In a variable gain amplifier, however, further characteriza-  
tion is useful because both noise and maximum signal  
level in the amplifier will vary with the gain setting, in  
general. In the LTC6910-X, maximum output signal is  
independent of gain (and is near the full power supply  
voltage, as detailed in the Swing sections of the Electrical  
Characteristics table). The maximum input level falls with  
increasing gain, and the input-referred noise falls as well  
(aslistedalsointhetable). Tosummarizetheusefulsignal  
rangeinsuchanamplifier, wedefineDynamicRange(DR)  
as the ratio of maximum input (at unity gain) to minimum  
input-referred noise (at maximum gain). (These two num-  
bers are measured commensurately, in RMS Volts.  
For deterministic signals such as sinusoids, 1VRMS  
=
2.828VP-P.) This DR has a physical interpretation as the  
range of signal levels that will experience an SNR above  
unity V/V or 0dB. At a 10V total power supply, DR in the  
LTC6910-1 (gains 0V to 100V/V) is typically 120dB (the  
ratio of a nominal 9.9VP-P, or 3.5VRMS, maximum input to  
the 3.4µVRMS high gain input noise). The corresponding  
DR for the LTC6910-2 (gains 0V to 64V) is also 120dB; for  
Note that operating the LTC6910-X in zero gain mode  
(digital inputs 000) open circuits the IN pin and this  
6910123fa  
19  
LTC6910-1  
LTC6910-2/LTC6910-3  
U
TYPICAL APPLICATIO S  
the LTC6910-3 (gains 0V to 7V/V) it is 117dB. The SNR  
from an amplifier is the ratio of input level to input-  
referrednoise, andcanbe110dBwiththeLTC6910family  
at unity gain.  
8-lead MSOP. This ADC has 16-bit resolution and a maxi-  
mum sampling rate of 250ksps. An LTC6910-1, for ex-  
ample, expands the ADC’s input amplitude range by 40dB  
whileoperatingfromthesamesingle5Vsupply. The499Ω  
resistor and 270pF capacitor couple cleanly between the  
LTC6910-X’s output and the switched-capacitor input of  
the LTC1864. The 270pF capacitor should be an NPO or  
X7R type, and lead length and inductance in the connec-  
tions to the LTC1864 inputs must be minimized, to achieve  
the full performance capability of this circuit. (See LTC  
1864 data sheet for further general information.)  
Construction and Instrumentation Cautions  
Electricallycleanconstructionisimportantinapplications  
seeking the full dynamic range of the LTC6910-X ampli-  
fier. Short, direct wiring will minimize parasitic capaci-  
tance and inductance. High quality supply bypass capaci-  
tors of 0.1µF near the chip provide good decoupling from  
a clean, low inductance power source. But several cm of  
wire (i.e., a few microhenrys of inductance) from the  
power supplies, unless decoupled by substantial capaci-  
tance (10µF) near the chip, can cause a high-Q LC  
resonance in the hundreds of kHz in the chip’s supplies or  
ground reference. This may impair circuit performance at  
those frequencies. A compact, carefully laid out printed  
circuit board with a good ground plane makes a  
significant difference in minimizing distortion. Finally,  
equipment to measure amplifier performance can itself  
introduce distortion or noise floors. Checking for these  
limits with a wire replacing the chip is a prudent routine  
procedure.  
At a gain setting of 10V/V in an LTC6910-1 (digital input  
100)anda250kspssamplingrateintheLTC1864, a10kHz  
input signal at 60% of full scale shows a THD of  
–87dB at the digital output of the ADC. 100kHz input  
signals under the same conditions produce THD values  
around 75dB. Noise effects (both random and quantiza-  
tion) in the ADC are divided by the gain of the amplifier  
when referred to VIN in Figure 4. Because of this, the circuit  
can acquire a signal that is 40dB down from full scale of  
5VP-P with an SNR of over 70dB. Such performance from  
an ADC alone (70 + 40 = 110dB of useful dynamic range at  
250ksps), if available, would be far more expensive.  
Low Noise AC Amplifier with Programmable Gain  
and Bandwidth  
Expanding an ADC’s Dynamic Range  
Figure 6 shows a compact data acquisition system for  
wide ranging input levels. This figure combines an  
LTC6910-X programmable amplifier (8-lead TSOT-23)  
with an LTC1864 analog-to-digital converter (ADC) in an  
Analog data acquisition can exploit band limiting as well as  
gain to suppress unwanted signals or noise. Tailoring an  
analog front end to both the level and bandwidth of each  
source maximizes the resulting SNR.  
1µF  
5V  
5V  
0.1µF  
LTC1864  
8
4
V
V
CC  
REF  
+
499Ω  
1
3
IN  
IN  
SCK  
SDO  
V
LTC6910-X  
IN  
5
270pF  
6
7
GND CONV  
2
6910 F04  
AGND  
1µF  
GAIN  
CONTROL  
ADC  
CONTROL  
Figure 6. Expanding an ADC’s Dynamic Range  
6910123fa  
20  
LTC6910-1  
LTC6910-2/LTC6910-3  
U
TYPICAL APPLICATIO  
Figure 7 shows a block diagram and Figure 8 the practical  
circuit for a low noise amplifier with gain and bandwidth  
independently programmable over 100:1 ranges. One  
LTC6910-X controls the gain and another controls the  
bandwidth. An LT1884 dual op amp forms an integrating  
lowpass loop with capacitor C2 to set the programmable  
uppercornerfrequency.TheLT1884alsosupportsrail-to-  
rail output swings over the total supply voltage range of  
2.7V to 10.5V. AC coupling through capacitor C1 estab-  
lishes a fixed low frequency corner of 1Hz, which can be  
adjustedbychangingC1.Alternatively,shortingC1makes  
the amplifier DC coupled. (If DC gain is not needed,  
however,theACcouplingsuppressesseveralerrorsources:  
any shifts in DC levels, low frequency noise and all  
amplifier DC offset voltages other than the low internally  
trimmed LT1884 offset in the integrating amplifier. If  
desired,anothercouplingcapacitorinserieswiththeinput  
can relax the requirements on DC input level as well.)  
R2  
C2  
C1  
V
IN  
R1  
+
+
+
GAIN CONTROL PGA  
(GAIN A)  
V
OUT  
6910 F05  
+
BANDWIDTH CONTROL PGA  
(GAIN B)  
GAIN = –1  
1
1
V
= (GAIN A)V  
BANDWIDTH ≤  
2πR1C1  
OUT  
IN  
R2  
2π  
C2  
(GAIN B)  
Figure 7. Block Diagram of an AC Amplifier with Programmable Gain and Bandwidth  
6910123fa  
21  
LTC6910-1  
LTC6910-2/LTC6910-3  
U
TYPICAL APPLICATIO S  
Measured frequency responses in Figure 8 with  
LTC6910-1PGAsdemonstratebandwidthsettingsof10Hz,  
100Hz and 1kHz, with digital codes at the BW inputs of  
respectively001, 100and111, andunitygainineachcase.  
By scaling C2, this circuit can serve other bandwidths,  
such as a maximum of 10kHz with 0.1µF using LT1884  
(gain-bandwidth product around 1MHz). Noise floor from  
internalsourcesyieldsanoutputSNRof76dBwith10mVP-  
P input, gain of 100 and 100Hz bandwidth; for 100mVP-P  
input, gain of 10 and 1000Hz bandwidth it is 64dB.  
+
+
V
V
V
V
V
OUT  
0.1µF  
0.1µF  
0.1µF  
0.1µF  
R2  
15.8k  
C2  
1µF  
+
V
0.1µF  
8
LT1884  
8
C1  
1
2
3
4
8
7
6
5
+
R1  
15.8k  
4
4
10µF  
1
V
R4 15.8k  
+
3
3
1
V
LTC6910-1  
6
LTC6910-1  
6
IN  
5
5
+
R3  
15.8k  
7
7
V
2
2
0.1µF  
V
GAIN  
CONTROL  
BANDWIDTH  
CONTROL  
GN2 GN1 GN0  
BW2BW1BW0  
0
0
0
1
1
1
1
0
1
1
0
0
1
1
1
0
1
0
1
0
1
GAIN = 1  
BANDWIDTH 1Hz TO 10Hz  
BANDWIDTH 1Hz TO 20Hz  
BANDWIDTH 1Hz TO 50Hz  
BANDWIDTH 1Hz TO 100Hz  
BANDWIDTH 1Hz TO 200Hz  
BANDWIDTH 1Hz TO 500Hz  
BANDWIDTH 1Hz TO 1000Hz  
0
0
0
1
1
1
1
0
1
1
0
0
1
1
1
0
1
0
1
0
1
GAIN = 2  
GAIN = 5  
GAIN = 10  
GAIN = 20  
GAIN = 50  
GAIN = 100  
Gain vs Frequency  
10  
0
GN2 GN1 GN0 = 001  
BW2 BW1 BW0  
–10  
–20  
–30  
–40  
–50  
–60  
–70  
–80  
1
1
1
BW2 BW1 BW0  
0
0
1
BW2 BW1 BW0  
1
0
0
1
10  
100  
1k  
10k  
100k  
FREQUENCY (Hz)  
6910 F06b  
Figure 8. Low Noise AC Amplifier with Programmable Gain and Bandwidth  
6910123fa  
22  
LTC6910-1  
LTC6910-2/LTC6910-3  
U
PACKAGE DESCRIPTIO  
TS8 Package  
8-Lead Plastic TSOT-23  
(Reference LTC DWG # 05-08-1637)  
2.90 BSC  
(NOTE 4)  
0.52  
MAX  
0.65  
REF  
1.22 REF  
1.50 – 1.75  
(NOTE 4)  
2.80 BSC  
1.4 MIN  
3.85 MAX 2.62 REF  
PIN ONE ID  
RECOMMENDED SOLDER PAD LAYOUT  
PER IPC CALCULATOR  
0.22 – 0.36  
8 PLCS (NOTE 3)  
0.65 BSC  
0.80 – 0.90  
0.09 – 0.20  
(NOTE 3)  
0.20 BSC  
NOTE:  
0.01 – 0.10  
1.00 MAX  
DATUM ‘A’  
0.30 – 0.50 REF  
TS8 TSOT-23 0802  
1.95 BSC  
1. DIMENSIONS ARE IN MILLIMETERS  
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR  
5. MOLD FLASH SHALL NOT EXCEED 0.254mm  
6. JEDEC PACKAGE REFERENCE IS MO-193  
2. DRAWING NOT TO SCALE  
3. DIMENSIONS ARE INCLUSIVE OF PLATING  
6910123fa  
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.  
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-  
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.  
23  
LTC6910-1  
LTC6910-2/LTC6910-3  
U
TYPICAL APPLICATIO  
AC-Coupled Single Supply Amplifiers  
+
V
2.7V TO 10.5V  
0.1µF  
LTC6910-1  
LTC6910-2  
LTC6910-3  
DIGITAL INPUTS PASSBAND LOWER –3dB  
PASSBAND LOWER –3dB  
PASSBAND LOWER –3dB  
G2 G1 G0  
GAIN  
FREQ (C1 = 1µF)  
GAIN  
FREQ (C1 = 1µF)  
GAIN  
FREQ (C1 = 1µF)  
8
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
–1  
0
–1  
0
–1  
–2  
–3  
–4  
–5  
–6  
–7  
4
C1  
16Hz  
16Hz  
16Hz  
32Hz  
48Hz  
64Hz  
80Hz  
95Hz  
111Hz  
3
1
V
V = GAIN • V  
OUT IN  
LTC6910-X  
–2  
32Hz  
80Hz  
160Hz  
160Hz  
160Hz  
160Hz  
–2  
32Hz  
64Hz  
127Hz  
127Hz  
127Hz  
127Hz  
IN  
–5  
–4  
–8  
–16  
–32  
–64  
2
5
–10  
–20  
–50  
–100  
AGND  
1µF OR LARGER  
6
7
G2 G1 G0  
6910 TA02  
C1 VALUE SETS LOWER CORNER FREQUENCY.  
THE TABLE SHOWS THIS FREQUENCY WITH  
C1 = 1µF. THIS FREQUENCY SCALES INVERSELY  
WITH C1  
PIN 2 (AGND) SETS DC OUTPUT VOLTAGE AND HAS  
BUILT-IN HALF-SUPPLY REFERENCE WITH INTERNAL  
RESISTANCE OF 5k. AGND CAN ALSO BE DRIVEN BY A  
SYSTEM ANALOG GROUND REFERENCE NEAR HALF SUPPLY  
Frequency Response, LTC6910-1  
Frequency Response, LTC6910-2  
Frequency Response, LTC6910-3  
50  
40  
30  
20  
10  
0
20  
G2, G1, G0 = 110  
G2, G1, G0 = 111  
G2, G1, G0 = 111  
G2, G1, G0 = 110  
G2, G1, G0 = 111  
40  
15  
G2, G1, G0 = 110  
G2, G1, G0 = 101  
G2, G1, G0 = 100  
G2, G1, G0 = 101  
G2, G1, G0 = 100  
G2, G1, G0 = 011  
G2, G1, G0 = 010  
G2, G1, G0 = 001  
30  
10  
G2, G1, G0 = 101  
G2, G1, G0 = 011  
G2, G1, G0 = 100  
20  
5
G2, G1, G0 = 010  
G2, G1, G0 = 011  
10  
0
G2, G1, G0 = 010  
G2, G1, G0 = 001  
G2, G1, G0 = 001  
0
–5  
V
V
= 10V  
S
IN  
V
= 10V, V = 5mV  
IN RMS  
V
= 10V, V = 5mV  
= 10mV  
S
S
IN RMS  
RMS  
1k  
C1 = 1µF  
C1 = 1µF  
C1 = 1µF  
–10  
100  
–10  
–10  
1k  
10k  
100k  
1M  
100  
1k  
10k  
100k  
1M  
10  
100  
10k 100k  
1M  
10M  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
FREQUENCY (Hz)  
6910 TA03  
6910 TA04  
6910 TA05  
RELATED PARTS  
PART NUMBER  
LT®1228  
DESCRIPTION  
COMMENTS  
100MHz Gain Controlled Transconductance Amplifier  
40MHz Video Fader and Gain Controlled Amplifier  
10kHz to 150kHz Digitally Controlled Filter and PGA  
Dual Matched Programmable Gain Amplifier  
Differential Input, Continuous Analog Gain Control  
Two Input, One Output, Continuous Analog Gain Control  
Continuous Time, Low Noise 8th Order Filter and 4-Bit PGA  
Dual 6910 in a 10 Lead MSOP  
LT1251/LT1256  
LTC1564  
LTC6911  
LTC6915  
Zero Drift Instrumentation Amplifier with Programmable Gain Zero Drift, Digitally Programmable Gain Up to 4096 V/V  
6910123fa  
LT/TP 0404 1K REV A • PRINTED IN USA  
24 Linear Technology Corporation  
1630 McCarthy Blvd., Milpitas, CA 95035-7417  
(408) 432-1900 FAX: (408) 434-0507 www.linear.com  
LINEAR TECHNOLOGY CORPORATION 2002  

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