LTM4600HVEV#PBF_技术文档

LTM4600

10A High Efﬁciency

DC/DC µModule

U

DESCRIPTIO

FEATURES

TheLTM^®4600isacomplete10A,DC/DCstepdownpower

supply. Included in the package are the switching control-

ler, power FETs, inductor, and all support components.

Operating over an input voltage range of 4.5V to 20V, the

LTM4600 supports an output voltage range of 0.6V to 5V,

setbyasingleresistor. Thishighefﬁciencydesigndelivers

10Acontinuouscurrent(14Apeak), needingnoheatsinks

or airﬂow to meet power speciﬁcations. Only bulk input

and output capacitors are needed to ﬁnish the design.

■

Complete Switch Mode Power Supply

■

Wide Input Voltage Range: 4.5V to 20V

■

10A DC, 14A Peak Output Current

Parallel Two µModule™ DC/DC Converters for 20A

■

Output Current

0.6V to 5V Output Voltage

■

1.5% Output Voltage Regulation

■

Ultrafast Transient Response

■

Current Mode Control

■

Pb-Free (e4) RoHS Compliant Package with Gold-

The low proﬁle package (2.8mm) enables utilization of

unused space on the bottom of PC boards for high density

point of load regulation. High switching frequency and an

adaptiveon-timecurrentmodearchitectureenablesavery

fast transient response to line and load changes without

sacriﬁcing stability. Fault protection features include

integrated overvoltage and short circuit protection with

a defeatable shutdown timer. A built-in soft-start timer is

adjustable with a small capacitor.

Pad Finish

Up to 92% Efﬁciency

Programmable Soft-Start

Output Overvoltage Protection

■

Optional Short-Circuit Shutdown Timer

■

Small Footprint, Low Proﬁle (15mm × 15mm ×

2.8mm) Surface Mount LGA Package

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APPLICATIO S

TheLTM4600ispackagedinathermallyenhanced,compact

(15mm × 15mm) and low proﬁle (2.8mm) over-molded

Land Grid Array (LGA) package suitable for automated

assembly by standard surface mount equipment. The

LTM4600 is Pb-free and RoHS compliant.

■

Telecom and Networking Equipment

■

Servers

■

Industrial Equipment

Point of Load Regulation

■

, LTC, LT and LTM are registered trademarks of Linear Technology Corporation.

µModule is a trademark of Linear Technology Corporation. All other trademarks are the

property of their respective owners. Protected by U.S. Patents including 5481178,

6100678, 6580258, 5847554, 6304066.

U

Efﬁciency vs Load Current

with 12V_IN(FCB = 0)

TYPICAL APPLICATIO

100

90

10A µModule Power Supply with 4.5V to 20V Input

V

1.5V

10A

OUT

80

V

IN

4.5V TO 20V

V

IN

OUT

C

70

IN

OUT

LTM4600

60

50

V

OSET

PGND SGND

66.5k

40

30

20

1.2V

1.5V

2.5V

3.3V

OUT

4600 TA01a

2

4

8

0

10

12

6

LOAD CURRENT (A)

4600 TA01b

4600fa

1

LTM4600

W W U W

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W

U

ABSOLUTE AXI U RATI GS

PACKAGE/ORDER I FOR ATIO

(Note 1)

TOP VIEW

FCB, EXTV , PGOOD, RUN/SS, V .......... –0.3V to 6V

CC

OUT

V , SV , f ............................................ –0.3V to 20V

IN

OSET

IN ADJ

COMP

V

, COMP............................................. –0.3V to 2.7V

V

IN

SGND

RUN/SS

FCB

Operating Temperature Range (Note 2) ... –40°C to 85°C

Junction Temperature ........................................... 125°C

Storage Temperature Range................... –45°C to 125°C

PGOOD

PGND

V

OUT

LGA PACKAGE

104-LEAD (15mm × 15mm × 2.8mm)

T

= 125°C, θ = 15°C/W, θ = 6°C/W,

JMAX

JA JC

θ

DERIVED FROM 95mm × 76mm PCB WITH 4 LAYERS

JA

WEIGHT = 1.7g

ORDER PART NUMBER

LGA PART MARKING

LTM4600EV#PBF

LTM4600IV#PBF

LTM4600EV

LTM4600IV

Consult LTC Marketing for parts speciﬁed with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS ^The● denotes the speciﬁcations which apply over the –40°C to 85°C

temperature range, otherwise speciﬁcations are at T_A= 25°C, V_IN= 12V. External C_IN= 120µF, C_OUT= 200µF/Ceramic per typical

application (front page) conﬁguration.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

●

V

Input DC Voltage

Output Voltage

4.5

20

V

IN(DC)

V

FCB = 0V

OUT(DC)

V

= 5V or 12V, V

= 1.5V, I = 0A

OUT

1.478

1.470

1.50

1.522

1.530

V

IN

OUT

Input Speciﬁcations

V

Under Voltage Lockout Threshold

Input Inrush Current at Startup

I

= 0A

3.4

4

V

IN(UVLO)

OUT

I

= 0A. V

= 1.5V, FCB = 0

OUT

INRUSH(VIN)

OUT

V

= 5V

= 12V

0.6

0.7

A

IN

V

I

Input Supply Bias Current

I

= 0A, EXTV Open

OUT CC

Q(VIN)

V

= 12V, V

= 1.5V, FCB = 5V

1.2

42

mA

µA

IN

OUT

V

= 1.5V, FCB = 0V

= 5V, V

= 1.5V, FCB = 5V

= 1.5V, FCB = 0V

1.0

52

OUT

Shutdown, RUN = 0.8V, V = 12V

35

75

IN

I

Input Supply Current

V

= 12V, V

= 1.5V, I

= 3.3V, I

= 10A

1.52

3.13

3.64

A

S(VIN)

IN

OUT

= 5V, V

= 1.5V, I

= 10A

OUT

4600fa

2

LTM4600

ELECTRICAL CHARACTERISTICS ^The● denotes the speciﬁcations which apply over the –40°C to 85°C

temperature range, otherwise speciﬁcations are at T_A= 25°C, V_IN= 12V. Per typical application (front page) conﬁguration.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Output Speciﬁcations

I

Output Continuous Current Range

V

IN

= 12V, V = 1.5V

OUT

0

10

A

OUTDC

(See Output Current Derating Curves for

Different V , V

and T )

A

IN OUT

●

ΔV /ΔV

Line Regulation Accuracy

V

= 1.5V, I = 0A, FCB = 0V,

OUT

0.15

0.3

%

OUT

IN

OUT

IN

= 4.5V to 20V

ΔV /ΔI

OUT OUT

Load Regulation Accuracy

V

OUT

= 1.5V, I = 0A to 10A, FCB = 0V

OUT

V

= 5V

= 12V (Note 3)

1

1.5

%

IN

V

Output Ripple Voltage

Output Ripple Voltage Frequency

Turn-On Time

V

= 12V, V

= 1.5V, I

= 0A, FCB = 0V

10

15

mV

P-P

OUT(AC)

IN

OUT

fs

= 1.5V, I

= 5A, FCB = 0V

= 10A

800

kHz

OUT

t

= 1.5V, I

IN

START

OUT

V

= 12V

= 5V

0.5

0.7

ms

V

ΔV

OUTLS

Voltage Drop for Dynamic Load Step

V

C

= 1.5V, Load Step: 0A/µs to 5A/µs

= 3 • 22µF 6.3V, 470µF 4V Pos Cap,

36

mV

OUT

See Table 2

t

I

Settling Time for Dynamic Load Step

Output Current Limit

Load: 10% to 90% to 10% of Full Load

25

µs

SETTLE

Output Voltage in Foldback

OUTPK

V

= 12V, V

= 1.5V

14

A

IN

OUT

= 5V, V

= 1.5V

OUT

Control Stage

●

V

Voltage at V

I

= 0A, V = 1.5V

OUT

0.591

0.594

0.6

0.609

0.606

V

OSET

OUT

V

RUN ON/OFF Threshold

0.8

–0.5

0.8

1.5

–1.2

1.8

2

–3

3

V

µA

RUN/SS

I

Soft-Start Charging Current

Soft-Start Discharging Current

V

= 0V

= 4V

RUN(C)/SS

RUN(D)/SS

RUN/SS

µA

V

– SV

EXTV = 0V, FCB = 0V

100

16

mV

mA

IN

CC

I

Current into EXTV Pin

EXTV = 5V, FCB = 0V, V

= 1.5V,

EXTVCC

CC

= 0A

OUT

I

OUT

R

Resistor Between V

and FB Pins

OUT

100

0.6

–1

kΩ

V

FBHI

V

FCB

Forced Continuous Threshold

Forced Continuous Pin Current

0.57

0.63

–2

I

V

= 0.6V

µA

FCB

PGOOD Output

ΔV

PGOOD Upper Threshold

PGOOD Lower Threshold

PGOOD Hysteresis

V

Rising

7.5

10

–10

2

12.5

%

V

OSETH

OSET

Falling

–7.5

–12.5

OSETL

Returning

OSET(HYS)

OSET

V

PGOOD Low Voltage

I

= 5mA

0.15

0.4

PGL

PGOOD

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LTM4600E is guaranteed to meet performance speciﬁcations

from 0°C to 85°C. Speciﬁcations over the –40°C to 85°C operating

temperature range are assured by design, characterization and correlation

with statistical process controls. The LTM4600I is guaranteed and tested

over the –40°C to 85°C temperature range.

Note 3: Test assumes current derating verses temperature.

4600fa

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LTM4600

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TYPICAL PERFOR A CE CHARACTERISTICS ^{(See Figure 17 for all curves)}

Efﬁciency vs Load Current

with 18V_IN(FCB = 0)

Efﬁciency vs Load Current

with 5V_IN(FCB = 0)

Efﬁciency vs Load Current

with 12V_IN(FCB = 0)

100

90

100

90

80

70

60

50

40

30

100

90

80

70

60

50

40

30

70

60

50

0.6V

1.2V

1.5V

2.5V

3.3V

OUT

40

30

20

1.5V

1.8V

2.5V

3.3V

OUT

0.6V

1.2V

1.5V

2.5V

OUT

2

4

8

0

10

12

8

12

2

4

8

6

0

2

4

6

10

0

10

12

6

LOAD CURRENT (A)

4600 G03

4600 G01

4600 G02

Efﬁciency vs Load Current

with Different FCB Settings

1.2V Transient Response

1.5V Transient Response

90

80

70

60

50

40

30

20

FCB > 0.7V

V

= 50mV/DIV

OUT

FCB = GND

I

= 5A/DIV

OUT

4600 G05

4600 G06

25µs/DIV

1.2V AT 5A/µs LOAD STEP

= 3 • 22µF 6.3V CERAMICS

25µs/DIV

V

= 12V

OUT

1.5V AT 5A/µs LOAD STEP

OUT

IN

= 1.5V

C

OUT

C

= 3 • 22µF 6.3V CERAMICS

470µF 4V SANYO POS CAP

C3 = 100pF

470µF 4V SANYO POS CAP

C3 = 100pF

0.1

10

1

LOAD CURRENT (A)

4600 G04

1.8V Transient Response

2.5V Transient Response

3.3V Transient Response

4600 G07

4600 G08

4600 G09

25µs/DIV

1.8V AT 5A/µs LOAD STEP

OUT

2.5V AT 5A/µs LOAD STEP

OUT

3.3V AT 5A/µs LOAD STEP

OUT

C

= 3 • 22µF 6.3V CERAMICS

470µF 4V SANYO POS CAP

C3 = 100pF

C

= 3 • 22µF 6.3V CERAMICS

470µF 4V SANYO POS CAP

C3 = 100pF

C

= 3 • 22µF 6.3V CERAMICS

470µF 4V SANYO POS CAP

C3 = 100pF

4600fa

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LTM4600

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TYPICAL PERFOR A CE CHARACTERISTICS ^{(See Figure 17 for all curves)}

Short-Circuit Protection,

I_OUT= 0A

Start-Up, I_OUT= 10A

(Resistive Load)

Start-Up, I_OUT= 0A

V

OUT

(0.5V/DIV)

OUT

(0.5V/DIV)

V

OUT

(0.5V/DIV)

I

IN

I

IN

(0.5A/DIV)

(0.2A/DIV)

4600 G11

4600 G12

4600 G10

200µs/DIV

20µs/DIV

200µs/DIV

V

C

= 12V

V

C

= 12V

OUT

V

C

= 12V

IN

= 1.5V

OUT

= 200µF

= 2× 200µF/X5R

NO EXTERNAL SOFT-START CAPACITOR

= 200µF

OUT

NO EXTERNAL SOFT-START CAPACITOR

Short-Circuit Protection,

I_OUT= 10A

V_INto V_OUTStepdown Ratio

5.5

f

= OPEN

ADJ

5V

5.0

4.5

4.0

3.5

3.0

2.5

V

OUT

(0.5V/DIV)

I

3.3V

IN

(0.5A/DIV)

2.5V

1.8V

4600 G13

2.0

1.5

1.0

0.5

0

20µs/DIV

1.5V

V

C

= 12V

IN

= 1.5V

OUT

1.2V

= 2× 200µF/X5R

NO EXTERNAL SOFT-START CAPACITOR

0.6V

10

(V)

20

0

5

15

V

IN

SEE FREQUENCY ADJUSTMENT DISCUSSION

FOR 12V TO 5V

AND 5V TO 3.3V

IN

OUT

IN OUT

CONVERSION

4600 G14

4600fa

5

LTM4600

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PI FU CTIO S

(See Package Description for Pin Assignment)

V

(Bank 1): Power Input Pins. Apply input voltage

SGND (Pin D23): Signal Ground Pin. All small-signal

components should connect to this ground, which in turn

connects to PGND at one point.

IN

between these pins and GND pins. Recommend placing

input decoupling capacitance directly between V pins

and GND pins.

IN

RUN/SS (Pin F23): Run and Soft-Start Control. Forcing

this pin below 0.8V will shut down the power supply.

Inside the power module, there is a 1000pF capacitor

which provides approximately 0.7ms soft-start time with

200µF output capacitance. Additional soft-start time can

be achieved by adding additional capacitance between the

RUN/SSandSGNDpins. Theinternalshort-circuitlatchoff

can be disabled by adding a resistor between this pin and

f

(Pin A15): A 110k resistor from V to this pin sets

IN

ADJ

the one-shot timer current, thereby setting the switching

frequency. The LTM4600 switching frequency is typically

850kHz. An external resistor to ground can be selected to

reducetheone-shottimercurrent,thuslowertheswitching

frequency to accommodate a higher duty cycle step down

requirement. See the applications section.

the V pin. This pullup resistor must supply a minimum

IN

SV (PinA17):SupplyPinforInternalPWMController.Leave

this pin open or add additional decoupling capacitance.

IN

5µA pull up current.

FCB (Pin G23): Forced Continuous Input. Grounding this

pin enables forced continuous mode operation regardless

of load conditions. Tying this pin above 0.63V enables

discontinuousconductionmodetoachievehighefﬁciency

operation at light loads. There is an internal 4.75K resistor

between the FCB and SGND pins.

EXTV (Pin A19): External 5V supply pin for controller. If

CC

left open or grounded, the internal 5V linear regulator will

power the controller and MOSFET drivers. For high input

voltage applications, connecting this pin to an external

5V will reduce the power loss in the power module. The

EXTV voltage should never be higher than V .

CC

IN

PGOOD (Pin J23): Output Voltage Power Good Indicator.

When the output voltage is within 10% of the nominal

voltage, the PWRGD is open drain output. Otherwise, this

pin is pulled to ground.

V

(Pin A21): The Negative Input of The Error Ampliﬁer.

OSET

Internally,thispinisconnectedtoV witha100kprecision

OUT

resistor.Differentoutputvoltagescanbeprogrammedwith

additional resistors between the V

and SGND pins.

OSET

PGND (Bank 2): Power ground pins for both input and

output returns.

COMP (Pin B23): Current Control Threshold and Error

Ampliﬁer Compensation Point. The current comparator

threshold increases with this control voltage. The voltage

ranges from 0V to 2.4V with 0.8V corresponding to zero

sense voltage (zero current).

V

OUT

(Bank 3): Power Output Pins. Apply output load

between these pins and GND pins. Recommend placing

High Frequency output decoupling capacitance directly

between these pins and GND pins.

TOP VIEW

2

3

4

5

6

7

16

17

18

19

A

C

E

1

20

21

22

23

24

B

D

F

COMP

SGND

RUN/SS

FCB

9

10

14

11

15

V

IN

8

BANK 1

13

12

25

32

G

J

26

33

27

34

28

35

29

36

30

37

31

38

H

K

PGOOD

48

59

39

50

61

40

51

62

41

52

63

42

53

64

43

54

65

44

55

66

45

56

67

46

57

68

47

58

69

49

60

71

PGND

BANK 2

L

M

N

70

73

84

95

74

85

96

75

86

97

76

87

98

77

88

99

78

89

79

90

80

91

81

92

72

83

94

82

93

P

R

T

V

OUT

BANK 3

100

101

102

103

104

1

3

5

7

9

11

13

15

17

19

21

23

2

4

6

8

10

12

14

16

18

20

22

4600 PN01

4600fa

6

LTM4600

W

SI PLIFIED BLOCK DIAGRA

SV

IN

RUN/SS

LTM4600

V

4.5V TO 20V

IN

1000pF

C

1.5µF

IN

PGOOD

Q1

COMP

FCB

INT

COMP

1.5V/10A MAX

OUT

C

OUT

4.75k

15µF

6.3V

CONTROLLER

f

ADJ

PGND

Q2

10Ω

SGND

EXTV

CC

100k

0.5%

V

OSET

R6

66.5k

4600 F01

Figure 1. Simpliﬁed LTM4600 Block Diagram

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DECOUPLI G REQUIRE E TS

T_A= 25°C, V_IN= 12V. Use Figure 1 conﬁguration.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

C

External Input Capacitor Requirement

I

= 10A

20

µF

IN

OUT

(V = 4.5V to 15V, V

= 1.5V)

IN

OUT

C

External Output Capacitor Requirement

(V = 4.5V to 15V, V = 1.5V)

I

= 10A, Refer to Table 2 in the

100

200

µF

OUT

Applications Information Section

IN

OUT

4600fa

7

LTM4600

U

OPERATIO

µModule Description

10% window around the regulation point. Furthermore,

in an overvoltage condition, internal top FET Q1 is turned

off and bottom FET Q2 is turned on and held on until the

overvoltage condition clears.

The LTM4600 is a standalone non-isolated synchronous

switching DC/DC power supply. It can deliver up to 10A of

DC output current with only bulk external input and output

capacitors. This module provides a precisely regulated

outputvoltageprogrammableviaoneexternalresistorfrom

Pulling the RUN/SS pin low forces the controller into its

shutdown state, turning off both Q1 and Q2. Releasing the

pin allows an internal 1.2µA current source to charge up

the softstart capacitor. When this voltage reaches 1.5V,

the controller turns on and begins switching.

0.6V to 5.0V , not to exceed 80% of the input voltage.

DC

The input voltage range is 4.5V to 20V. A simpliﬁed block

diagram is shown in Figure 1 and the typical application

schematic is shown in Figure 17.

At low load current the module works in continuous cur-

rent mode by default to achieve minimum output voltage

ripple. It can be programmed to operate in discontinuous

current mode for improved light load efﬁciency when the

FCB pin is pulled up above 0.8V and no higher than 6V.

The FCB pin has a 4.75k resistor to ground, so a resistor

TheLTM4600containsanintegratedLTCconstanton-time

current-mode regulator, ultra-low R

FETs with fast

DS(ON)

switchingspeedandintegratedSchottkydiode.Thetypical

switching frequency is 800kHz at full load. With current

mode control and internal feedback loop compensation,

the LTM4600 module has sufﬁcient stability margins and

good transient performance under a wide range of operat-

ing conditions and with a wide range of output capacitors,

even all ceramic output capacitors (X5R or X7R).

to V can set the voltage on the FCB pin.

IN

When EXTV pin is grounded or open, an integrated 5V

CC

linear regulator powers the controller and MOSFET gate

drivers. If a minimum 4.7V external bias supply is ap-

Current mode control provides cycle-by-cycle fast current

limit.Inaddition,foldbackcurrentlimitingisprovidedinan

over-currentconditionwhileV drops.Also,theLTM4600

has defeatable short circuit latch off. Internal overvolt-

age and undervoltage comparators pull the open-drain

PGOOD output low if the output feedback voltage exits a

plied on the EXTV pin, the internal regulator is turned

CC

off, and an internal switch connects EXTV to the gate

CC

driver voltage. This eliminates the linear regulator power

FB

loss with high input voltage, reducing the thermal stress

on the controller. The maximum voltage on EXTV pin is

CC

6V. The EXTV voltage should never be higher than the

CC

V voltage. Also EXTV must be sequenced after V .

IN

CC

IN

4600fa

8

LTM4600

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APPLICATIO S I FOR ATIO

The typical LTM4600 application circuit is shown in Figure

17. External component selection is primarily determined

by the maximum load current and output voltage.

down when Q

is on and Q is off. If the output

UP

DOWN

voltage V needs to be margined up/down by M%, the

O

resistor values of R and R

the following equations:

can be calculated from

UP

DOWN

Output Voltage Programming and Margining

(R_SETR_UP)•V_O•(1+ M%)

(R_SETR_UP)+100kΩ

The PWM controller of the LTM4600 has an internal

0.6V 1%referencevoltage.Asshownintheblockdiagram,

= 0.6V

a100k/0.5%internalfeedbackresistorconnectsV

and

OUT

pin to SGND

R_SET•V_O•(1– M%)

R_SET+ (100kΩ R_DOWN

FB pins. Adding a resistor R from V

SET

OSET

= 0.6V

)

pin programs the output voltage:

100k +R_SET

V_O= 0.6V •

Input Capacitors

R_SET

The LTM4600 µModule should be connected to a low

ac-impedance DC source. High frequency, low ESR input

capacitors are required to be placed adjacent to the mod-

Table 1 shows the standard vaules of 1% R

for typical output voltages:

Table 1.

resistor

SET

ule. In Figure 20, the bulk input capacitor C is selected

IN

for its ability to handle the large RMS current into the

converter. For a buck converter, the switching duty-cycle

can be estimated as:

R

SET

Open 100

0.6 1.2

66.5

1.5

49.9

1.8

43.2

2

31.6

2.5

22.1

3.3

13.7

5

(kΩ)

V

(V)

O

V_O

V

IN

Voltagemarginingisthedynamicadjustmentoftheoutput

voltage to its worst case operating range in production

testing to stress the load circuitry, verify control/protec-

tion functionality of the board and improve the system

reliability. Figure 2 shows how to implement margining

function with the LTM4600. In addition to the feedback

D =

Without considering the inductor current ripple, the RMS

current of the input capacitor can be estimated as:

I_O(MAX)

η%

I_CIN(RMS)

=

• D•(1−D)

resistor R , several external components are added.

SET

Turn off both transistor Q and Q

margining. When Q is on and Q

voltage is margined up. The output voltage is margined

to disable the

UP

DOWN

In the above equation, η% is the estimated efﬁciency of

the power module. C1 can be a switcher-rated electrolytic

aluminum capacitor, OS-CON capacitor or high volume

ceramic capacitors. Note the capacitor ripple current

ratings are often based on only 2000 hours of life. This

makes it advisable to properly derate the input capacitor,

or choose a capacitor rated at a higher temperature than

required. Always contact the capacitor manufacturer for

derating requirements.

is off, the output

UP

DOWN

V

OUT

LTM4600

R

DOWN

Q

100k

DOWN

2N7002

V

OSET

PGND

SGND

R

SET

UP

In Figure 16, the input capacitors are used as high fre-

quency input decoupling capacitors. In a typical 10A

output application, 1-2 pieces of very low ESR X5R or

X7R, 10µF ceramic capacitors are recommended. This

decoupling capacitor should be placed directly adjacent

Q

UP

2N7002

4600 F02

Figure 2.

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the module input pins in the PCB layout to minimize the

trace inductance and high frequency AC noise.

Soft-Start and Latchoff with the RUN/SS pin

The RUN/SS pin provides a means to shut down the

LTM4600 as well as a timer for soft-start and over-cur-

rent latchoff. Pulling the RUN/SS pin below 0.8V puts

Output Capacitors

The LTM4600 is designed for low output voltage ripple.

the LTM4600 into a low quiescent current shutdown (I

Q

ThebulkoutputcapacitorsC ischosenwithlowenough

≤ 75µA). Releasing the pin allows an internal 1.2µA cur-

rent source to charge up the timing capacitor CSS. Inside

LTM4600, there is an internal 1000pF capacitor from

RUN/SS pin to ground. If RUN/SS pin has an external

capacitor CSS_EXT to ground, the delay before starting

is about:

OUT

effectiveseriesresistance(ESR)tomeettheoutputvoltage

ripple and transient requirements. C

can be low ESR

OUT

tantalumcapacitor, lowESRpolymercapacitororceramic

capacitor (X5R or X7R). The typical capacitance is 200µF

if all ceramic output capacitors are used. The internally

optimized loop compensation provides sufﬁcient stability

margin for all ceramic capacitors applications. Additional

output ﬁltering may be required by the system designer,

if further reduction of output ripple or dynamic transient

spike is required. Refer to Table 2 for an output capaci-

tance matrix for each output voltage Droop, peak to peak

deviation and recovery time during a 5A/µs transient with

a speciﬁc output capacitance.

1.5V

1.2µA

t_DELAY

=

•(C_{SS_EXT}+1000pF)

When the voltage on RUN/SS pin reaches 1.5V, the

LTM4600 internal switches are operating with a clamping

of the maximum output inductor current limited by the

RUN/SSpintotalsoft-startcapacitance.AstheRUN/SSpin

voltage rises to 3V, the soft-start clamping of the inductor

current is released.

Fault Conditions: Current Limit and Over current

Foldback

V to V

Stepdown Ratios

IN

OUT

The LTM4600 has a current mode controller, which inher-

ently limits the cycle-by-cycle inductor current not only in

steady state operation, but also in transient.

There are restrictions in the maximum V to V

step

IN

OUT

down ratio that can be achieved for a given input voltage.

These contraints are shown in the Typical Performance

To further limit current in the event of an over load condi-

tion,theLTM4600providesfoldbackcurrentlimiting.Ifthe

output voltage falls by more than 50%, then the maximum

output current is progressively lowered to about one sixth

of its full current limit value.

Characteristics curves labeled “V to V

Stepdown

IN

OUT

Ratio”. Note that additional thermal de-rating may apply.

See the Thermal Considerations and Output Current De-

Rating sections of this data sheet.

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Table 2. Output Voltage Response Verses Component Matrix (Refer to Figure 17)

TYPICAL MEASURED VALUES

C

OUT1

VENDORS

PART NUMBER

C

OUT2

VENDORS

PART NUMBER

TDK

C4532X5R0J107MZ (100UF,6.3V)

JMK432BJ107MU-T ( 100µF, 6.3V)

JMK316BJ226ML-T501 ( 22µF, 6.3V)

SANYO POS CAP

6TPE330MIL (330µF, 6.3V)

2R5TPE470M9 (470µF, 2.5V)

4TPE470MCL (470µF, 4V)

TAIYO YUDEN

V

C

C3

V

IN

(V)

DROOP

(mV)

PEAK TO PEAK

RECOVERY TIME

(µs)

LOAD STEP

(A/µs)

OUT

IN

OUT1

OUT2

COMP

(V)

1.2

1.5

1.8

2.5

3.3

5

(CERAMIC)

2 × 10µF 25V

(BULK)

(CERAMIC)

(BULK)

470µF 4V

470µF 2.5V

330µF 6.3V

NONE

(mV)

150µF 35V

3 × 22µF 6.3V

1 × 100µF 6.3V

2 × 100µF 6.3V

4 × 100µF 6.3V

3 × 22µF 6.3V

1 × 100µF 6.3V

2 × 100µF 6.3V

4 × 100µF 6.3V

3 × 22µF 6.3V

1 × 100µF 6.3V

2 × 100µF 6.3V

4 × 100µF 6.3V

3 × 22µF 6.3V

1 × 100µF 6.3V

2 × 100µF 6.3V

4 × 100µF 6.3V

3 × 22µF 6.3V

1 × 100µF 6.3V

2 × 100µF 6.3V

4 × 100µF 6.3V

3 × 22µF 6.3V

1 × 100µF 6.3V

2 × 100µF 6.3V

4 × 100µF 6.3V

1 × 100µF 6.3V

2 × 100µF 6.3V

3 × 22µF 6.3V

4 × 100µF 6.3V

1 × 100µF 6.3V

3 × 22µF 6.3V

2 × 100µF 6.3V

4 × 100µF 6.3V

2 × 100µF 6.3V

1 × 100µF 6.3V

3 × 22µF 6.3V

4 × 100µF 6.3V

1 × 100µF 6.3V

3 × 22µF 6.3V

2 × 100µF 6.3V

4 × 100µF 6.3V

NONE 100pF

5

35

40

49

35

40

49

36

37

44

61

36

37

44

54

40

44

46

62

40

44

62

48

56

57

60

48

51

56

70

64

66

82

100

52

64

76

188

159

68

25

20

25

20

25

20

25

20

30

20

30

20

30

25

30

25

30

35

25

30

35

30

25

5

70

5

80

5

98

470µF 4V

470µF 2.5V

330µF 6.3V

NONE

12

5

68

70

80

98

470µF 4V

470µF 2.5V

330µF 6.3V

NONE

75

5

79

5

84

5

118

75

470µF 4V

470µF 2.5V

330µF 6.3V

NONE

12

5

79

89

108

81

470µF 4V

470µF 2.5V

330µF 6.3V

NONE

5

88

5

91

5

128

81

470µF 4V

470µF 2.5V

330µF 6.3V

NONE

12

5

85

91

125

103

113

116

115

103

102

113

159

126

132

166

200

106

129

126

144

375

320

470µF 4V

330µF 6.3V

470µF 4V

NONE

5

470µF 4V

330µF 6.3V

NONE

12

7

330µF 6.3V

470µF 4V

NONE

7

470µF 4V

330µF 6.3V

NONE

12

15

20

NONE

5

NONE

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After the controller has been started and given adequate

time to charge up the output capacitor, CSS is used as a

short-circuittimer.AftertheRUN/SSpinchargesabove4V,

if the output voltage falls below 75% of its regulated value,

then a short-circuit fault is assumed. A 1.8µA current then

beginsdischargingCSS.Ifthefaultconditionpersistsuntil

the RUN/SS pin drops to 3.5V, then the controller turns

off both power MOSFETs, shuting down the converter

permanently. The RUN/SS pin must be actively pulled

down to ground in order to restart operation.

to defeat latchoff. Any pull-up network must be able to

maintain RUN/SS above 4V maximum latchoff threshold

andovercomethe4µAmaximumdischargecurrent.Figure

3 shows a conceptual drawing of V

short circuit.

during startup and

RUN

V

RUN/SS

4V

3.5V

3V

1.5V

The over-current protection timer requires the soft-start

timing capacitor CSS be made large enough to guarantee

thattheoutputisinregulationbythetimeCSShasreached

the 4V threshold. In general, this will depends upon the

size of the output capacitance, output voltage and load

current characteristic. A minimum external soft-start

capacitor can be estimated from:

SHORT-CIRCUIT

LATCH ARMED

t

SHORT-CIRCUIT

LATCHOFF

SOFT-START

OUTPUT

OVERLOAD

HAPPENS

CLAMPING

OF I RELEASED

L

V

O

75%V

O

C_{SS_EXT}+1000pF > C_OUT•V_OUT(10^–3[F /V_S])

t

SWITCHING

STARTS

4600 F03

Generally 0.1µF is more than sufﬁcient.

Figure 3. RUN/SS Pin Voltage During Startup and

Short-Circuit Protection

Since the load current is already limited by the current

mode control and current foldback circuitry during a

shortcircuit,over-currentlatchoffoperationisNOTalways

needed or desired, especially the output has large amount

of capacitance or the load draw huge current during start

up. The latchoff feature can be overridden by a pull-up

currentgreaterthan5µAbutlessthan80µAtotheRUN/SS

pin. The additional current prevents the discharge of CSS

during a fault and also shortens the soft-start period. Us-

V

IN

500k

LTM4600

RUN/SS

PGND SGND

4600 F04

Figure 4. Defeat Short-Circuit Latchoff with a Pull-Up

Resistor to V_IN

ing a resistor from RUN/SS pin to V is a simple solution

IN

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Enable

cident, ratiometric and offset tracking for V rising and

falling can be implemented with different sets of resistor

values. See the LTC2923 data sheet for more details.

O

The RUN/SS pin can be driven from logic as shown in

Figure 5. This function allows the LTM4600 to be turned

on or off remotely. The ON signal can also control the

sequence of the output voltage.

EXTV Connection

CC

An internal low dropout regulator produces an internal 5V

supply that powers the control circuitry and FET drivers.

Therefore, if the system does not have a 5V power rail,

RUN/SS

LTM4600

ON

the LTM4600 can be directly powered by V . The gate

IN

driver current through LDO is about 18mA. The internal

PGND SGND

LDO power dissipation can be calculated as:

2N7002

4600 F05

P

= 18mA • (V – 5V)

IN

LDO_LOSS

Figure 5. Enable Circuit with External Logic

The LTM4600 also provides an external gate driver volt-

age pin EXTV . If there is a 5V rail in the system, it is

CC

Output Voltage Tracking

recommended to connect EXTV pin to the external 5V

CC

For the applications that require output voltage tracking,

several LTM4600 modules can be programmed by the

power supply tracking controller such as the LTC2923.

Figure 6 shows a typical schematic with LTC2923. Coin-

rail. Whenever the EXTV pin is above 4.7V, the internal

CC

5V LDO is shut off and an internal 50mA P-channel switch

connectstheEXTV tointernal5V. Internal5Vissupplied

CC

from EXTV until this pin drops below 4.5V. Do not apply

CC

more than 6V to the EXTV pin and ensure that EXTV

CC

Q1

V

IN

DC/DC

3.3V

< V . The following list summaries the possible connec-

IN

5V

tions for EXTV :

CC

V

IN

1. EXTV grounded. Internal 5V LDO is always powered

CC

IN

from the internal 5V regulator.

R

V

GATE

RAMP

FB1

ONB

CC

LTM4600

V

1.8V

ON

OSET

OUT

2. EXTV connected to an external supply. Internal LDO

CC

R

ONA

49.9k

LTC2923

is shut off. A high efﬁciency supply compatible with the

MOSFET gate drive requirements (typically 5V) can im-

prove overall efﬁciency. With this connection, it is always

STATUS

SDO

RAMPBUF

TRACK1

TRACK2

V

IN

R

TB1

TA1

required that the EXTV voltage can not be higher than

IN

CC

R

TB2

LTM4600

V

V pin voltage.

IN

V

FB2

1.5V

OSET

OUT

GND

R

66.5k

TA2

Discontinuous Operation and FCB Pin

4600 F06

The FCB pin determines whether the internal bottom

MOSFET remains on when the inductor current reverses.

Thereisaninternal4.75kpullingdownresistorconnecting

this pin to ground. The default light load operation mode

is forced continuous (PWM) current mode. This mode

provides minimum output voltage ripple.

Figure 6. Output Voltage Tracking with the LTC2923 Controller

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In the application where the light load efﬁciency is im-

portant, tying the FCB pin above 0.6V threshold enables

discontinuous operation where the bottom MOSFET turns

offwheninductorcurrentreverses.Therefore,theconduc-

tion loss is minimized and light load efﬁcient is improved.

The penalty is that the controller may skip cycle and the

output voltage ripple increases at light load.

Thermal Considerations and Output Current Derating

The power loss curves in Figures 8 and 13 can be used

in coordination with the load current derating curves in

Figures 9 to 12, and Figures 14 to 15 for calculating an

approximate θ for the module with various heatsink-

JA

ing methods. Thermal models are derived from several

temperature measurements at the bench, and thermal

modelinganalysis.ApplicationNote103providesadetailed

explanationoftheanalysisforthethermalmodels, andthe

derating curves. Tables 3 and 4 provide a summary of the

Paralleling Operation with Load Sharing

TwoormoreLTM4600modulescanbeparalleledtoprovide

higher than 10A output current. Figure 7 shows the neces-

saryinterconnectionbetweentwoparalleledmodules.The

OPTI-LOOP™ current mode control ensures good current

sharing among modules to balance the thermal stress.

The new feedback equation for two or more LTM4600s

in parallel is:

equivalent θ for the noted conditions. These equivalent

JA

θ

JA

parameters are correlated to the measure values, and

improvedwithair-ﬂow.Thecasetemperatureismaintained

at 100°C or below for the derating curves. This allows for

4W maximum power dissipation in the total module with

top and bottom heatsinking, and 2W power dissipation

through the top of the module with an approximate θ

JC

100k

between 6°C/W to 9°C/W. This equates to a total of 124°C

+R_SET

N

V_OUT= 0.6V •

at the junction of the device.

R_SET

Safety Considerations

where N is the number of LTM4600s in parallel.

TheLTM4600modulesdonotprovideisolationfromV to

OUT

with a rating twice the maximum input current should be

provided to protect each unit from catastrophic failure.

IN

V

OUT

IN

OUT

V

.Thereisnointernalfuse.Ifrequired,aslowblowfuse

(20A

)

MAX

LTM4600

PGND COMP

V

SGND

OSET

R

SET

COMP

V

SGND

OSET

V

LTM4600

V

OUT

IN

PGND

4600 F07

Figure 7. Parallel Two µModules with Load Sharing

OPTI-LOOP is a trademark of Linear Technology Corporation.

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4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

10

9

10

9

V

= 1.5V

V

= 5V

V

= 5V

OUT

IN

O

IN

O

= 1.5V

8

7

12V LOSS

6

5V LOSS

5

0 LFM

200 LFM

400 LFM

5

0 LFM

200 LFM

400 LFM

4

0

2

4

6

8

10

50

60

70

80

90

50

60

70

80

90

100

OUTPUT CURRENT (A)

AMBIENT TEMPERATURE (°C)

4600 F08

4600 F09

4600 F10

Figure 8. Power Loss vs Load Current

Figure 9. No Heatsink

Figure 10. BGA Heatsink

10

9

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0

V

= 12V

OUT

V

= 12V

V

= 12V

IN

O

IN

O

= 3.3V

= 1.5V

V

= 1.5V

9

8

7

6

5

4

8

7

6

5

0 LFM

200 LFM

400 LFM

0 LFM

200 LFM

400 LFM

4

3

0

2

4

6

8

10

50 55 60 65 70 75 80 85 90

AMBIENT TEMPERATURE (°C)

4600 F11

50

60

70

80

90

100

OUTPUT CURRENT (A)

AMBIENT TEMPERATURE (°C)

4600 F13

4600 F12

Figure 11. No Heatsink

Figure 12. BGA Heatsink

Figure 13. Power Loss vs Load Current

10

9

10

V

= 12V

= 3.3V

V

= 12V

= 3.3V

IN

O

IN

O

9

8

7

6

5

4

8

7

6

5

4

3

2

0 LFM

200 LFM

400 LFM

200 LFM

1

400 LFM

0

40

50

60

70

80

90

40

50

60

70

80

90

100

AMBIENT TEMPERATURE (°C)

4600 F14

4600 F15

Figure 14. No Heatsink

Figure 15. BGA Heatsink

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Table 3. 1.5V Output

DERATING CURVE

Figures 9, 11

V

(V)

POWER LOSS CURVE

Figure 8

AIR FLOW (LFM)

HEATSINK

None

θ

JA

(°C/W)

IN

5, 12

0

15.2

14

Figures 9, 11

Figure 8

200

400

0

None

Figures 9, 11

Figure 8

None

12

Figures 10, 12

Figure 8

BGA Heatsink

13.9

11.3

10.25

Figure 8

200

400

Figure 8

Table 4. 3.3V Output

DERATING CURVE

Figure 14

V

IN

(V)

POWER LOSS CURVE

Figure 13

AIR FLOW (LFM)

HEATSINK

None

θ

JA

(°C/W)

12

0

15.2

14.6

13.4

13.9

11.1

10.5

Figure 14

12

Figure 13

200

400

0

None

Figure 14

Figure 13

None

Figure 15

Figure 13

BGA Heatsink

Figure 15

Figure 13

200

400

Figure 15

Figure 13

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Layout Checklist/Example

Frequency Adjustment

The LTM4600 is designed to typically operate at 800kHz

across most input and output conditions. The f pin is

The high integration of the LTM4600 makes the PCB board

layoutverysimpleandeasy.However,tooptimizeitselectri-

cal and thermal performance, some layout considerations

are still necessary.

ADJ

typically left open or decoupled with an optional 1000pf

capacitor. Theswitchingfrequencyhasbeenoptimizedfor

maintainingconstantoutputripplenoiseovertheoperating

ranges.Theswitchingfrequencywillincreaseuptotypically

1.2MHz for 5V and 3.3V outputs to limit increase output

ripple noise. The switching frequency can be adjusted

lower to accommodate high duty cycle requirements like

5V to 3.3V, and 12V to 5V. There are limitations to input

voltage range for the higher duty cycle designs that limit

the internal inductor ripple current so that the inductor will

not saturate at higher load current. Examples:

• Use large PCB copper areas for high current path, in-

cluding V , PGND and V . It helps to minimize the

IN

OUT

PCB conduction loss and thermal stress

• Place high frequency ceramic input and output capaci-

tors next to the V , PGND and V

pins to minimize

IN

OUT

high frequency noise

• Place a dedicated power ground layer underneath

the unit

LTM4600 minimum on-time = 100ns

LTM4600 minimum off-time = 400ns

Equations for setting frequency:

• To minimize the via conduction loss and reduce module

thermal stress, use multiple vias for interconnection

between top layer and other power layers

• Do not put via directly on pad

I

= V – 0.7V/110k; for 12V input, I = 103µA

IN ON

ON

• Use a separated SGND ground copper area for compo-

nents connected to signal pins. Connect the SGND to

PGND underneath the unit

frequency = (I /[2.4V • 10pF]) • DC; DC = duty cycle,

ON

duty cycle is (V /V )

OUT IN

t = t + t , t = on-time, t = off-time of the

OFF

ON

OFF ON

Figure 16 gives a good example of the recommended

layout.

switching period; t = 1/frequency

t

must be greater than 400ns, or t – t > 400ns.

OFF

ON

V

SGND

IN

t

= DC • t

ON

1MHz frequency or 1µs period is chosen for 12V to 5V.

t

= 0.41 • 1µs ≅ 410ns

ON

C

IN

= 1µs – 410ns ≅ 590ns

OFF

t

and t are above the minimums with adquate guard

OFF

ON

band.

PGND

Using the frequency = (I /[2.4V • 10pF]) • DC, solve for

ON

I

= (1MHz • 2.4V • 10pF) • (1/0.41) ≅ 58µA. I current

ON

calculated from 12V input was 103µA, so a resistor from

V

OUT

f

to ground = (0.7V/15k) = 46µA. 103µA – 46µA =

ADJ

57µA, sets the adequate I current for proper frequency

LOAD

ON

range for the higher duty cycle conversion of 12V to

TOP LAYER

4600 F16

5V. Input voltage range is limited to 9V to 16V. Higher

Figure 16. Recommended PCB Layout

input voltages can be used without the 15k on f . The

ADJ

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inductor ripple current gets too high above 16V, and the

t

= 2µs – 1.32ns ≅ 760ns

OFF

400ns minimum off-time is limited below 9V.

t

and t are above the minimums with adquate guard

OFF

ON

band.

Equations for setting frequency:

I

= V – 0.7V/110k; for 5V input, I = 39µA

IN ON

Using the frequency = (I /[2.4V • 10pF]) • DC, solve for

ON

I

= (450kHz • 2.4V • 10pF) • (1/0.66) ≅ 16µA. I current

ON

frequency = (I /[2.4V • 10pF]) • DC; DC = duty cycle,

duty cycle is (V /V )

ON

OUT IN

calculated from5V input was39µA, so a resistorfrom f

ADJ

to ground = (0.7V/30.1k) = 23µA. 39µA – 23µA = 16µA,

t = t + t , t = on-time, t = off-time of the

OFF

switching period; t = 1/frequency

sets the adequate I current for proper frequency range

ON

OFF ON

ON

for the higher duty cycle conversion of 5V to 3.3V. Input

voltagerangeislimitedto4.5Vto7V.Higherinputvoltages

t

must be greater than 400ns, or t – t > 400ns.

ON

OFF

can be used without the 30.1k on f . The inductor ripple

ADJ

t

= DC • t

ON

current gets too high above 7V, and the 400ns minimum

off-time is limited below 4.5V.

~450kHz frequency or 2.22µs period is chosen for 5V to

3.3V. Frequency range is about 450kHz to 650kHz from

4.5V to 7V input.

t

= 0.66 • 2.22µs ≅ 1.46ns

ON

5V to 3.3V at 8A

R1

30.1k

4.5V TO 7V

C5

100pF

C3

10µF

25V

C1

10µF

25V

V

f

ADJ

IN

3.3V AT 8A EFFICIENCY = 93%

EXTV

FCB

V

CC

OUT

+

C2

22µF

C4

330µF

6.3V

V

OSET

R2

22.1k

1%

LTM4600EV

RUN/SOFT-START

RUN/SS

COMP

SV

IN

PGOOD

PGND

OPEN DRAIN

SGND

4600 F18

5V TO 3.3V AT 8A WITH f

= 30.1k

C1, C3: TDK C3216X5R1E106MT

C2: TAIYO YUDEN, JMK316BJ226ML

C4: SANYO POS CAP, 6TPE330MIL

ADJ

12V to 5V at 8A

R1

15k

9V TO 16V

C5

100pF

C3

10µF

25V

C1

10µF

25V

V

f

ADJ

IN

5V AT 8A

EFFICIENCY = 93%

EXTV

CC

V

OUT

+

C2

22µF

C4

330µF

6.3V

FCB

V

OSET

R2

13.7k

1%

LTM4600EV

RUN/SOFT-START

RUN/SS

COMP

SV

IN

PGOOD

PGND

OPEN DRAIN

SGND

4600 F19

12V TO 5V AT 8A WITH f

= 15k

C1, C3: TDK C3216X5R1E106MT

C2: TAIYO YUDEN, JMK316BJ226ML

C4: SANYO POS CAP, 6TPE330MIL

ADJ

4600fa

18

LTM4600

U

W U U

APPLICATIO S I FOR ATIO

V_INto V_OUTStepdown Ratio for 12V_IN

to 5V_OUTand 5V_INto 3.3V_OUT

5.0

3.3V: f

= 30.1k

ADJ

4.5 5V: f

= 15k

ADJ

4.0

3.5

3.0

2.5

2.0

1.5

1.0

3.3V AT 8A

5V AT 8A

0.5

0

1

3

5

7

9

11 13 15 17

V

(V)

IN

4600 F20

U

TYPICAL APPLICATIO

V

IN

+

C

(BULK)

C

(CER)

IN

5V TO 20V

GND

150µF

10µF

V

IN

2x

(MULTIPLE PINS)

EXTV

V

OUT

CC

OUT

(MULTIPLE PINS)

C3

100pF

SV

IN

C

+

OUT1

C

OUT2

22µF

6.3V

×3

f

ADJ

470µF

V

REFER TO

TABLE 2

V

OSET

OUT

LTM4600

COMP

FCB

REFER TO

TABLE 2

RUN/SS

PGOOD

0.6V TO 5V

SGND

REFER TO STEP DOWN

RATIO GRAPH

PGND

(MULTIPLE PINS)

C4

OPT

R1

66.5k

REFER TO

TABLE 1

GND

4600 F17

Figure 17. Typical Application, 5V to 20V Input, 0.6V to 5V Output, 10A Max

4600fa

19

LTM4600

U

TYPICAL APPLICATIO

Parallel Operation and Load Sharing

4.5V TO 20V

V

= 0.6V • ([100k/N] + R )/R

SET SET

OUT

WHERE N = 2

C8

10µF

25V

C7

10µF

25V

V

f

ADJ

IN

2.5V

EXTV

FCB

V

CC

OUT

+

C9

C10

470µF

4V

V

22µF

OSET

x3

LTM4600

R4

15.8k

1%

RUN

SV

IN

COMP

PGOOD

PGND

SGND

2.5V AT 20A

RUN/SOFT-START

C4

220pF

C3

10µF

25V

C1

10µF

V

f

ADJ

IN

25V

2.5V

R1

EXTV

V

CC

OUT

+

C2

22µF

x3

C5

470µF

4V

FCB

V

OSET

LTM4600

RUN

SV

IN

100k

COMP

PGOOD

PGND

SGND

C1, C3, C7, C8: TDK C3216X5R1E106MT

C2, C9: TAIYO YUDEN, JMK316BJ226ML-T501

C5, C10: SANYO POS CAP, 4TPE470MCL

4600 TA02

Current Sharing Between Two

LTM4600 Modules

12

10

8

12V

IN

OUT

MAX

2.5V

20A

I

OUT2

I

OUT1

6

4

2

0

10

15

20

25

5

TOTAL LOAD

4600 TA03

4600fa

20

LTM4600

U

PACKAGE DESCRIPTIO

Z

b b b

Z

6 . 9 8 6 5

5 . 7 1 4 2

6 . 3 5 0 0

3 . 8 1 0 0

1 . 2 7 0 0

5 . 0 8 0 0

4 . 4 4 4 2

3 . 1 7 4 2

1 . 9 0 4 2

2 . 5 4 0 0

0 . 0 0 0 0

0 . 6 3 4 2

0 . 0 0 0 0

0 . 3 1 7 5

0 . 6 3 5 8

1 . 2 7 0 0

3 . 8 1 0 0

6 . 3 5 0 0

1 . 9 0 5 8

3 . 1 7 5 8

2 . 5 4 0 0

5 . 0 8 0 0

4 . 4 4 5 8

5 . 7 1 5 8

6 . 9 4 2 1

4600fa

21

LTM4600

U

PACKAGE DESCRIPTIO

Pin Assignment Tables

(Arranged by Pin Number)

PIN NAME

E1

PIN NAME

A1

-

B1

V

-

C1

-

V

-

V

-

V

-

D1

V

-

V

-

V

-

V

-

F1

V

-

G1 PGND

H1

-

IN

A2

-

B2

C2

D2

E2

F2

G2

-

H2

H3

H4

H5

H6

A3

V

-

B3

C3

D3

E3

F3

G3

IN

A4

B4

C4

D4

E4

F4

G4

A5

V

-

B5

C5

D5

E5

F5

G5

IN

A6

B6

C6

D6

E6

F6

G6

A7

V

-

B7

C7

D7

E7

F7

G7

H7 PGND

H8

H9 PGND

H10

H11 PGND

H12

H13 PGND

H14

H15 PGND

H16

H17 PGND

IN

A8

B8

C8

D8

E8

F8

G8

-

A9

V

-

B9

C9

D9

E9

F9

G9

IN

A10

A11

A12

A13

A14

A15

A16

B10

B11

B12

B13

B14

B15

B16

B17

B18

B19

B20

B21

B22

C10

C11

C12

C13

C14

C15

C16

C17

C18

C19

C20

C21

C22

C23

D10

D11

D12

D13

D14

D15

D16

D17

D18

D19

D20

D21

D22

E10

E11

E12

E13

E14

E15

E16

E17

E18

E19

E20

E21

E22

E23

F10

F11

F12

F13

F14

F15

F16

F17

F18

F19

F20

F21

F22

G10

G11

G12

G13

G14

G15

G16

G17

G18

G19

G20

G21

G22

-

IN

V

-

IN

-

V

-

IN

-

f

ADJ

-

A17 SV

IN

A18

-

H18

H19

H20

H21

H22

H23

-

A19 EXTV

CC

A20

A21

A22

A23

-

V

-

OSET

-

B23 COMP

D23 SGND

F23 RUN/SS G23 FCB

PIN NAME

PIN NAME PIN NAME

PIN NAME

J1 PGND

K1

K2

K3

K4

K5

K6

-

L1

-

M1

M2 PGND

M3

M4 PGND

M5

M6 PGND

M7

M8 PGND

M9

-

N1

-

P1

-

R1

-

T1

-

J2

-

L2 PGND

N2 PGND

P2

V

-

R2

V

-

T2

V

-

OUT

J3

L3

L4 PGND

L5

L6 PGND

L7

L8 PGND

L9

L10 PGND

L11

L12 PGND

L13

L14 PGND

L15

L16 PGND

L17

L18 PGND

L19

L20 PGND

L21

L22 PGND

L23

-

N3

N4 PGND

N5

N6 PGND

N7

N8 PGND

N9

N10 PGND

N11

N12 PGND

N13

N14 PGND

N15

N16 PGND

N17

N18 PGND

N19

N20 PGND

N21

N22 PGND

N23

-

P3

R3

T3

J4

P4

V

-

R4

V

-

T4

V

-

J5

-

P5

R5

T5

J6

P6

V

-

R6

V

-

T6

V

-

J7

K7 PGND

K8

-

P7

R7

T7

J8

P8

V

-

R8

V

-

T8

V

-

J9

K9 PGND

K10

-

P9

R9

T9

J10

J11

J12

J13

J14

J15

J16

J17

J18

J19

J20

J21

J22

M10 PGND

M11 -

P10

P11

P12

P13

P14

P15

P16

P17

P18

P19

P20

P21

P22

P23

V

-

R10

R11

R12

R13

R14

R15

R16

R17

R18

R19

R20

R21

R22

R23

V

-

T10

T11

T12

T13

T14

T15

T16

T17

T18

T19

T20

T21

T22

T23

V

-

K11 PGND

-

K12

K13 PGND

K14

K15 PGND

K16

K17 PGND

-

M12 PGND

M13 -

V

-

V

-

V

-

M14 PGND

M15 -

V

-

V

-

V

-

M16 PGND

M17 -

V

-

V

-

V

-

K18

K19

K20

K21

K22

-

M18 PGND

M19 -

V

-

V

-

V

-

M20 PGND

M21 -

V

-

V

-

V

-

M22 PGND

M23 -

V

-

V

-

V

-

J23 PGOOD K23

-

4600fa

22

LTM4600

U

PACKAGE DESCRIPTIO

Pin Assignment Tables

(Arranged by Pin Number)

PIN NAME

G1

PGND

P2

V

A3

V

A15

A17

A19

A21

B23

D23

F23

G23

J23

f

ADJ

OUT

IN

P4

V

A5

H7

H9

H11

H13

H15

H17

PGND

SV

IN

P6

P8

A7

A9

A11

A13

EXTV

V

CC

P10

P12

P14

P16

P18

P20

P22

OSET

COMP

B1

V

IN

SGND

RUN/SS

FCB

J1

PGND

C10

C12

C14

V

IN

V

IN

V

IN

K7

K9

K11

K13

K15

K17

PGND

D1

V

R2

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

IN

PGOOD

R4

E10

E12

E14

V

IN

V

IN

V

IN

R6

R8

R10

R12

R14

R16

R18

R20

R22

L2

PGND

F1

V

IN

L4

L6

L8

L10

L12

L14

L16

L18

L20

L22

T2

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

V

OUT

T4

T6

T8

T10

T12

T14

T16

T18

T20

T22

M2

PGND

M4

M6

M8

M10

M12

M14

M16

M18

M20

M22

N2

PGND

N4

N6

N8

N10

N12

N14

N16

N18

N20

N22

4600fa

InformationfurnishedbyLinearTechnologyCorporationisbelievedtobeaccurateandreliable.However,

no responsibility is assumed for its use. Linear Technology Corporation makes no representation that

the interconnection of its circuits as described herein will not infringe on existing patent rights.

23

LTM4600

U

TYPICAL APPLICATIO

1.8V, 10A Regulator

4.5V AT 20V

C5

100pF

C2

10µF

25V

C1

10µF

25V

V

f

ADJ

IN

1.8V AT 10A

EXTV

FCB

V

CC

OUT

+

C3

22µF

x3

C4

470µF

4V

V

OSET

R1

100k

LTM4600

RUN

SV

IN

COMP

PGOOD

PGND

PGOOD

R2

49.9k

1%

SGND

C1, C2: TDK C3216X5R1E106MT

C3: TAIYO YUDEN, JMK316BJ226ML-T501

C4: SANYO POS CAP, 4TPE470MCL

4600 TA04

RELATED PARTS

PART NUMBER

DESCRIPTION

COMMENTS

LTC2900

Quad Supply Monitor with Adjustable

Reset Timer

Monitors Four Supplies; Adjustable Reset Timer

LTC2923

Power Supply Tracking Controller

Tracks Both Up and Down; Power Supply Sequencing

LT3825/LT3837

Synchronous Isolated Flyback

Controllers

No Optocoupler Required; 3.3V, 12A Output; Simple Design

®

This product contains technology licensed from Silicon Semiconductor Corporation.

4600fa

LT 0206 REV A • PRINTED IN USA

LinearTechnology Corporation

1630 McCarthy Blvd., Milpitas, CA 95035-7417

24

●

(408) 432-1900 FAX: (408) 434-0507 www.linear.com


型号：	LTM4600HVEV#PBF
厂家：	Linear
描述：	LTM4600HV - 10A, 28VIN High Efficiency DC/DC µModule (Power Module); Package: LGA; Pins: 104; Temperature Range: -40°C to 85°C
文件：	总24页 (文件大小：356K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTM4600HVEV#PBF [Linear]

相关型号：

LTM4600HVEV-PBF

LTM4600HVEV-TRPBF

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LTM4600HVIV#PBF

LTM4600HVIV-PBF

LTM4600HVIV-TRPBF

LTM4600HVMP

LTM4600HVMPV

LTM4600HVMPV#PBF

LTM4600HVMPV-PBF

LTM4600HVMPV-TRPBF

LTM4600IV