LTM4608A_1_技术文档

LTM4608A

Low V , 8A DC/DC µModule

IN

Regulator with Tracking, Margining,

and Frequency Synchronization

FEATURES

DESCRIPTION

The LTM^®4608A is a complete 8A switch mode DC/DC

n

Complete Standalone Power Supply

n

±1.75% Total DC Output Error (–55°C to 125°C)

2.7V to 5.5V Input Voltage Range

8A DC, 10A Peak Output Current

0.6V Up to 5V Output

Output Voltage Tracking and Margining

Power Good Tracks Margining

power supply with ±±1.75 total output ꢀoltaꢁe error1 ꢂI-

cluded iI the packaꢁe are the switchiIꢁ coItroller, power

FETs, iIductor aId all support compoIeIts1 OperatiIꢁ

oꢀer aI iIput ꢀoltaꢁe raIꢁe of 21.V to 717V, the LTM4608A

supports aI output ꢀoltaꢁe raIꢁe of 016V to 7V, set by a

siIꢁleexterIalresistor1ThishiꢁhefficieIcydesiꢁIdeliꢀers

up to 8A coItiIuous curreIt (±0A peak)1 OIly bulk iIput

aId output capacitors are Ieeded to complete the desiꢁI1

n

Multiphase Operation

Parallel Current Sharing

Onboard Frequency Synchronization

Spread Spectrum Frequency Modulation

Overcurrent/Thermal Shutdown Protection

CurreIt Mode CoItrol/Fast TraIsieIt RespoIse

Selectable Burst Mode^®OperatioI

Up to 975 EfficieIcy

Output Oꢀerꢀoltaꢁe ProtectioI

Small, Low Profile 9mm × ±7mm × 218mm

LGA Packaꢁe (01630mm Pads)

The low profile packaꢁe (218mm) eIables utilizatioI of

uIused space oI the back side of PC boards for hiꢁh

deIsity poiIt-of-load reꢁulatioI1 The 01630mm LGA pads

with ±12.mm pitch simplify PCB layout by proꢀidiIꢁ staI-

dard trace routiIꢁ aId ꢀia placemeIt1 The hiꢁh switchiIꢁ

frequeIcy aId curreIt mode architecture eIable a ꢀery

fast traIsieIt respoIse to liIe aId load chaIꢁes without

sacrificiIꢁ stability1 The deꢀice supports frequeIcy syI-

chroIizatioI, proꢁrammable multiphase aId/or spread

spectrum operatioI, output ꢀoltaꢁe trackiIꢁ for supply

rail sequeIciIꢁ aId ꢀoltaꢁe marꢁiIiIꢁ1

APPLICATIONS

n

Telecom, NetworkiIꢁ aId ꢂIdustrial EquipmeIt

Fault protectioI features iIclude oꢀerꢀoltaꢁe protectioI,

oꢀercurreIt protectioI aId thermal shutdowI1 The power

module is offered iI a compact aId thermally eIhaIced

9mm × ±7mm × 218mm surface mouIt LGA packaꢁe1 The

LTM4608A is Pb-free aId RoHS compliaIt1

n

Storaꢁe Systems

n

PoiIt of Load ReꢁulatioI

L, LT, LTC, LTM, LiIear TechIoloꢁy, the LiIear loꢁo, Burst Mode, µModule aId PolyPhase

are reꢁistered trademarks aId LTpowerCAD is a trademark of LiIear TechIoloꢁy CorporatioI1

All other trademarks are the property of their respectiꢀe owIers1 Protected by U1S1 PateIts

iIcludiIꢁ 748±±.8, 6780278, 6304066, 6±2.8±7, 6498466, 66±±±3±1

TYPICAL APPLICATION

Efficiency vs Load Current

2.7V to 5.5V Input to 1.8V Output DC/DC µModule^®Regulator

100

V

= 1.8V

OUT

CLKIN

95

V

= 3.3V

IN

CLKIN

V

IN

2.7V TO 5.5V

OUT

1.8V

90

85

V

IN

OUT

V

= 5V

IN

SV

FB

IN

10µF

100µF

4.87k

SW

I

TH

LTM4608A

RUN

I

THM

80

75

70

PGOOD

PLLLPF

TRACK

PGOOD

MGN

V

OUT

CLKOUT GND SGND

4608A TA01a

0

2

4

6

8

10

LOAD CURRENT (A)

4608A TA01b

4608afc

1

LTM4608A

ABSOLUTE MAXIMUM RATINGS

PIN CONFIGURATION

(Note 1)

TOP VIEW

V , SV 111111111111111111111111111111111111111111111111111111 –013V to 6V

ꢂN

A

B

C

D

E

F

G

CLKOUT 1111111111111111111111111111111111111111111111111111111 –013V to 2V

V

GND

IN

1

2

3

4

5

6

7

8

9

PGOOD, PLLLPF, CLKꢂN, PHMODE, MODE 1 –013V to V

TH THM

ꢂN

RUN

SGND

ꢂ , ꢂ

, RUN, FB, TRACK,MGN, BSEL111111 –013V to V

SW

CLKOUT

V

, SW 11111111111111111111111111111111111111 –013V to (V + 013V)

OUT

ꢂN

PLLLPF

CLKIN

PHMODE

MODE

ꢂIterIal OperatiIꢁ Temperature RaIꢁe

SV

IN

(Note 2)11111111111111111111111111111111111111111111111111 –77°C to ±27°C

Storaꢁe Temperature RaIꢁe 111111111111111111 –77°C to ±27°C

I

THM

TRACK

PGOOD

BSEL

I

TH

FB

MGN

10

11

GND

V

OUT

LGA PACKAGE

68-LEAD (15mm × 9mm × 2.8mm)

= ±27°C, θ = 27°C/W, θ = .°C/W, θ = 70°C/W, WEꢂGHT = ±10ꢁ

T

JMAX

JA

JCbottom

JCtop

ORDER INFORMATION

LEAD FREE FINISH

LTM4608AEV#PBF

LTM4608AꢂV#PBF

TRAY

PART MARKING* PACKAGE DESCRIPTION

TEMPERATURE RANGE

68-Lead (±7mm × 9mm × 218mm) LGA –40°C to ±27°C

68-Lead (±7mm × 9mm × 218mm) LGA –77°C to ±27°C

LTM4608AEV#PBF

LTM4608AꢂV#PBF

LTM4608AV

LTM4608AMPV#PBF LTM4608AMPV#PBF LTM4608AMPV

CoIsult LTC MarketiIꢁ for parts specified with wider operatiIꢁ temperature raIꢁes1 *The temperature ꢁrade is ideItified by a label oI the shippiIꢁ coItaiIer1

For more iIformatioI oI lead free part markiIꢁ, ꢁo to: http://www1liIear1com/leadfree/

This product is oIly offered iI trays1 For more iIformatioI ꢁo to: http://www1liIear1com/packaꢁiIꢁ/

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the full internal

operating temperature range, otherwise specifications are at T_A= 25°C (Note 2). V_IN= 5V unless otherwise noted. See Figure 1.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

l

V

ꢂIput DC Voltaꢁe

21.

717

V

ꢂN(DC)

V

Output Voltaꢁe, Total VariatioI

with LiIe aId Load

C

= ±0µF × ±, C

= ±00µF Ceramic,

OUT(DC)

ꢂN

OUT

FB

±00µF POSCAP, R = 6167k, MODE = 0V

V

ꢂN

= 21.V to 717V, ꢂ

= ꢂ to

OUT(DC)MꢂN

±14.2

±1464

±149

±1708

±17±6

V

OUT

l

ꢂ

(Note 3)

OUT(DC)MAX

Input Specifications

V

UIderꢀoltaꢁe Lockout Threshold SV RisiIꢁ

2107

±187

212

210

2137

21±7

V

ꢂN(UVLO)

ꢂN

SV FalliIꢁ

ꢂN

4608afc

2

LTM4608A

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the full internal

operating temperature range, otherwise specifications are at T_A= 25°C (Note 2). V_IN= 5V unless otherwise noted. See Figure 1.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

ꢂ

ꢂIput Supply Bias CurreIt

V

ꢂN

V

ꢂN

V

ꢂN

= 313V, No SwitchiIꢁ, MODE = V

ꢂN

400

±1±7

77

µA

mA

Q(VꢂN)

= 313V, No SwitchiIꢁ, MODE = 0V

= 313V, V = ±17V, SwitchiIꢁ CoItiIuous

OUT

V

ꢂN

V

ꢂN

V

ꢂN

= 7V, No SwitchiIꢁ, MODE = V

470

±13

.7

µA

mA

ꢂN

= 7V, No SwitchiIꢁ, MODE = 0V

= 7V, V = ±17V, SwitchiIꢁ CoItiIuous

OUT

ShutdowI, RUN = 0, V = 7V

±

µA

ꢂN

ꢂ

ꢂIput Supply CurreIt

V

ꢂN

V

ꢂN

= 313V, V

= ±17V, ꢂ = 8A

OUT

417

2193

A

S(VꢂN)

OUT

= 7V, V

= ±17V, ꢂ

= 8A

OUT

Output Specifications

ꢂ

Output CoItiIuous CurreIt RaIꢁe V

(Note 3)

= ±17V

OUT(DC)

OUT

V

= 313V, 717V

0

8

7

A

ꢂN

V

= 21.V

l

LiIe ReꢁulatioI Accuracy

Load ReꢁulatioI Accuracy

V

= ±17V, V from 21.V to 717V, ꢂ

= 0A

01±

0127

5/V

∆V

OUT

ꢂN

OUT

OUT(LꢂNE)

V

OUT

V

OUT

= ±17V (Note 3)

OUT(LOAD)

l

V

= 313V, 717V, ꢂ

= 0A to 8A

LOAD

013

01.7

5

ꢂN

V

OUT

= 21.V, ꢂ

= 0A to 7A

LOAD

V

Output Ripple Voltaꢁe

ꢂ

= 0A, C

= ±17V

= ±00µF X7R Ceramic, V = 7V,

OUT ꢂN

OUT(AC)

OUT

V

±0

mV

P-P

f

SwitchiIꢁ FrequeIcy

SYNC Capture RaIꢁe

TurI-OI Oꢀershoot

ꢂ

= 8A, V = 7V, V = ±17V

OUT

±127

01.7

±17

±1.7

2127

MHz

S

OUT

ꢂN

SYNC

C

= ±00µF, V

= ±17V, ꢂ

= 0A

OUT

∆V

OUT

V

OUT

OUT(START)

= 313V

= 7V

±0

mV

ꢂN

V

t

TurI-OI Time

C

= ±00µF, V

= ±17V, V = 7V,

±00

µs

START

OUT

ꢂN

ꢂ

= ±A Resistiꢀe Load, Track = V ,

ꢂN

Peak DeꢀiatioI for DyIamic Load Load: 05 to 705 to 05 of Full Load,

±7

mV

∆V

OUT(LS)

C

V

= ±00µF Ceramic, ±00µF POSCAP,

OUT

= 7V, V

= ±17V

OUT

ꢂN

t

ꢂ

SettliIꢁ Time for DyIamic Load

Step

Load: 05 to 705 to 05 of Full Load, V = 7V,

OUT

±0

µs

SETTLE

ꢂN

V

= ±17V, C

= ±00µF

OUT

Output CurreIt Limit

C

= ±00µF

OUT(PK)

OUT

V

= 21.V, V

= 313V, V

= ±17V

8

±±

±3

A

ꢂN

OUT

V

= 7V, V

= ±17V

OUT

Control Section

V

Voltaꢁe at FB PiI

ꢂ

= 0A, V

= ±17V, V = 21.V to 717V

01790

0178.

01796

01602

01606

V

FB

OUT

ꢂN

l

SS Delay

ꢂIterIal Soft-Start Delay

90

µs

ꢂ

012

µA

FB

V

RUN PiI OI/Off Threshold

RUN RisiIꢁ

RUN FalliIꢁ

±14

±13

±177

±14

±1.

±17

V

RUN

4608afc

3

LTM4608A

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the full internal

operating temperature range, otherwise specifications are at T_A= 25°C (Note 2). V_IN= 5V unless otherwise noted. See Figure 1.

SYMBOL

PARAMETER

CONDITIONS

RUN = V

MIN

TYP

MAX

UNITS

TRACK

TrackiIꢁ Threshold (RisiIꢁ)

TrackiIꢁ Threshold (FalliIꢁ)

TrackiIꢁ Disable Threshold

017.

01±8

V

ꢂN

RUN = 0V

V

– 017

ꢂN

R

Resistor BetweeI V

aId FB

OUT

9197

±0

±0107

kΩ

FBHꢂ

PiIs

PGOOD RaIꢁe

±±0

5

∆V

PGOOD

5MarꢁiIiIꢁ

Output Voltaꢁe MarꢁiIiIꢁ

PerceItaꢁe

MGN = V , BSEL = 0V

4

9

±4

–4

–9

–±4

7

6

5

ꢂN

MGN = V , BSEL = V

±0

±±

ꢂN

MGN = V , BSEL = Float

±7

–7

–±0

–±7

±6

–6

–±±

–±6

ꢂN

MGN = 0V, BSEL = 0V

MGN = 0V, BSEL = V

ꢂN

MGN = 0V, BSEL = Float

Note 1: Stresses beyoId those listed uIder Absolute Maximum RatiIꢁs

may cause permaIeIt damaꢁe to the deꢀice1 Exposure to aIy Absolute

Maximum RatiIꢁ coIditioI for exteIded periods may affect deꢀice

reliability aId lifetime1

The LTM4608Aꢂ is ꢁuaraIteed oꢀer the –40°C to ±27°C iIterIal operatiIꢁ

temperature raIꢁe aId the LTM4608AMP is tested aId ꢁuaraIteed oꢀer

the full –77°C to ±27°C iIterIal operatiIꢁ temperature raIꢁe1 Note that

the maximum ambieIt temperature coIsisteIt with these specificatioIs

is determiIed by specific operatiIꢁ coIditioIs iI coIjuIctioI with board

layout, the rated packaꢁe thermal impedaIce aId other eIꢀiroImeItal

factors1

Note 2: The LTM4608A is tested uIder pulsed load coIditioIs such that

T ≈ T 1 The LTM4608AE is ꢁuaraIteed to meet specificatioIs from

J

A

0°C to ±27°C iIterIal temperature1 SpecificatioIs oꢀer the –40°C to

±27°C iIterIal operatiIꢁ temperature raIꢁe are assured by desiꢁI,

characterizatioI aId correlatioI with statistical process coItrols1

Note 3: See output curreIt deratiIꢁ curꢀes for differeIt V , V

aId T 1

A

ꢂN OUT

4608afc

4

LTM4608A

TYPICAL PERFORMANCE CHARACTERISTICS

Efficiency vs Load Current

100

95

90

85

80

75

70

100

95

100

95

CONTINUOUS MODE

90

85

90

85

80

75

70

80

75

70

5V 1.2V

IN

OUT

3.3V 1.2V

IN

OUT

5V 1.5V

IN

2.7V 1.0V

3.3V 1.5V

IN

OUT

5V 1.8V

IN

2.7V 1.5V

IN

3.3V 1.8V

IN

3.3V 2.5V

IN

5V 2.5V

IN

2.7V 1.8V

IN

5V 3.3V

IN

0

2

3

4

5

6

7

0

2

4

6

8

1

0

2

4

6

8

LOAD CURRENT (A)

LOAD CURRENT

4608A G03

4608A G02

4608A G01

Burst Mode Efficiency with

5V Input

V_INto V_OUTStep-Down Ratio

100

90

80

70

60

50

40

4.0

3.5

3.0

2.5

4.0

3.5

3.0

2.5

2.0

1.5

2.0

1.5

1.0

0.5

0

1.0

0.5

0

I

V

= 8A

OUT

V

= 1.8V

= 2.5V

= 3.3V

V

= 1.5V

= 2.5V

= 3.3V

I

V

= 6A

V

= 1.8V

= 2.5V

= 3.3V

OUT

= 1.2V

= 1.5V

= 1.2V

= 1.5V

OUT

0

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1

LOAD CURRENT (A)

4

2

3

4

5

6

2

5

6

3

V

(V)

V

(V)

IN

4608A G04

4608A G05

4608A G06

Supply Current vs V_IN

Load Transient Response

1.6

1.4

1.2

1

I

LOAD

1A/DIV

I

LOAD

V

= 1.2V PULSE-SKIPPING MODE

2A/DIV

O

V

IN

2V/DIV

V

OUT

V

OUT

20mV/DIV

0.8

0.6

0.4

0.2

0

20mV/DIV

AC COUPLED

= 1.2V BURST MODE

O

4608A G08

4608A G09

V

= 5V

20µs/DIV

V

= 5V

20µs/DIV

IN

OUT

IN

OUT

= 3.3V, R = 2.21k

= 2.5V, R = 3.09k

FB

2A/µs STEP

= 100µF X5R

2.5A/µs STEP

= 100µF X5R

C

OUT

C1 = 100pF, C3 = 22pF FROM FIGURE 18

C1 = 120pF, C3 = 47pF FROM FIGURE 18

2.5

3

3.5

4

4.5

5

5.5

INPUT VOLTAGE (V)

4608A G07

4608afc

5

LTM4608A

TYPICAL PERFORMANCE CHARACTERISTICS

Load Transient Response

I

LOAD

2A/DIV

V

OUT

V

OUT

20mV/DIV

AC COUPLED

4608A G10

4608A G11

4608A G12

V

= 5V

20µs/DIV

V

= 5V

20µs/DIV

V

= 5V

20µs/DIV

IN

OUT

IN

OUT

IN

OUT

= 1.8V, R = 4.87k

= 1.5V, R = 6.65k

= 1.2V, R = 10k

FB

2.5A/µs STEP

= 100µF X5R

2.5A/µs STEP

= 100µF X5R

2.5A/µs STEP

= 2 × 100µF

C

OUT

C1 = NONE, C3 = NONE FROM FIGURE 18

C1 = 100pF, C3 = NONE FROM FIGURE 18

Start-Up

V_FBvs Temperature

Load Regulation vs Current

602

600

598

596

594

592

590

0

–0.1

–0.2

–0.3

–0.4

V

OUT

V

= 5.5V

0.5V/DIV

IN

V

= 3.3V

IN

V

IN

2V/DIV

V

= 2.7V

IN

4608A G13

V

C

= 5V

50µs/DIV

FC MODE

IN

–0.5

–0.6

= 1.5V

V

= 3.3V

OUT

IN

OUT

= 100µF NO LOAD AND 8A LOAD

= 1.5V

(DEFAULT 100µs SOFT-START)

–25

5

65

–55

95

125

35

0

2

4

6

8

TEMPERATURE (°C)

LOAD CURRENT (A)

4608A G14

4608A G15

Short-Circuit Protection

(2.5V Short, No Load)

Short-Circuit Protection

(2.5V Short, 4A Load)

2.5V Output Current

3.0

2.5

V

IN

5V/DIV

2V/DIV

V

IN

OUT

V

OUT

2.0

1.5

I

LOAD

OUT

5A/DIV

I

OUT

1.0

0.5

0

4608A G17

4608A G18

V

= 5V

50µs/DIV

V

= 5V

50µs/DIV

IN

OUT

IN

OUT

= 2.5V

0

5

10

15

20

OUTPUT CURRENT (A)

4608A G16

4608afc

6

LTM4608A

PIN FUNCTIONS

PLLLPF (E3): Phase Locked Loop Lowpass Filter1 AI iI-

terIal lowpass filter is tied to this piI1 ꢂI spread spectrum

mode, placiIꢁ a capacitor here to SGND coItrols the slew

rate from oIe frequeIcy to the Iext1 AlterIatiꢀely, floatiIꢁ

this piI allows Iormal ruIIiIꢁ frequeIcy at ±17MHz, tyiIꢁ

V (C1, C8, C9, D1, D3-D5, D7-D9 and E8): Power ꢂIput

IN

PiIs1 Apply iIput ꢀoltaꢁe betweeI these piIs aId GND

piIs1 RecommeId placiIꢁ iIput decoupliIꢁ capacitaIce

directly betweeI V piIs aId GND piIs1

ꢂN

V

OUT

(C10-C11, D10-D11, E9-E11, F9-F11, G9-G11):

this piI to SV forces the part to ruI at ±133 times its

ꢂN

Power Output PiIs1 Apply output load betweeI these piIs

aId GND piIs1 RecommeId placiIꢁ output decoupliIꢁ

capacitaIce directly betweeI these piIs aId GND piIs1

See Table ±1

Iormal frequeIcy (2MHz), tyiIꢁ it to ꢁrouId forces the

frequeIcytoruIat016.timesitsIormalfrequeIcy(±MHz)1

PHMODE (B4): Phase Selector ꢂIput1 This piI determiIes

the phase relatioIship betweeI the iIterIal oscillator aId

CLKOUT1 Tie it hiꢁh for 2-phase operatioI, tie it low for

GND (A1-A11, B1, B9-B11, F3, F7-F8, G1-G8): Power

GrouId PiIs for Both ꢂIput aId Output ReturIs1

3-phase operatioI, aId float or tie it to V /2 for 4-phase

ꢂN

SV (F4): SiꢁIal ꢂIput Voltaꢁe1 This piI is iIterIally coI-

operatioI1

IN

Iected to V throuꢁh a lowpass filter1

ꢂN

MGN (B8): MarꢁiIiIꢁ PiI1 ꢂIcreases or decreases the

output ꢀoltaꢁe by the amouIt specified by the BSEL piI1

To disable marꢁiIiIꢁ, tie the MGN piI to a ꢀoltaꢁe diꢀider

SGND (E1): SiꢁIal GrouId PiI1 ReturI ꢁrouId path for all

aIaloꢁ aId low power circuitry1 Tie a siIꢁle coIIectioI to

GND iI the applicatioI1

with70kresistorsfromV toꢁrouId1SeetheApplicatioIs

ꢂN

ꢂIformatioI sectioI aId Fiꢁure 201

MODE(B5):ModeSelectꢂIput1TyiIꢁthispiIhiꢁheIables

Burst Mode operatioI1 TyiIꢁ this piI low eIables forced

BSEL (B7): MarꢁiIiIꢁ Bit Select PiI1 TyiIꢁ BSEL low se-

coItiIuous operatioI1 FloatiIꢁ this piI or tyiIꢁ it to V /2

lects ±75, tyiIꢁ it hiꢁh selects ±±051 FloatiIꢁ it or tyiIꢁ

ꢂN

eIables pulse-skippiIꢁ operatioI1

it to V /2 selects ±±751

ꢂN

CLKIN (B3): ExterIal SyIchroIizatioI ꢂIput to Phase

Detector1 This piI is iIterIally termiIated to SGND with a

70k resistor1 The phase locked loop will force the iIterIal

top power PMOS turI oI to be syIchroIized with the

TRACK (E5): Output Voltaꢁe TrackiIꢁ PiI1 Voltaꢁe track-

iIꢁ is eIabled wheI the TRACK ꢀoltaꢁe is below 017.V1

ꢂf trackiIꢁ is Iot desired, theI coIIect the TRACK piI to

SV 1 ꢂf TRACK is Iot tied to SV , theI the TRACK piI’s

ꢂN

risiIꢁ edꢁe of the CLKꢂN siꢁIal1 CoIIect this piI to SV

ꢀoltaꢁe Ieeds to be below 01±8V before the chip shuts

dowI eꢀeI thouꢁh RUN is already low1 Do Iot float this

piI1 A resistor diꢀider aId capacitor caI be applied to the

TRACK piI to iIcrease the soft-start time of the reꢁulator1

See the ApplicatioIs ꢂIformatioI sectioI1 CaI tie toꢁether

for parallel operatioI aId trackiIꢁ1 Load curreIt Ieeds to

be preseIt duriIꢁ track dowI1

ꢂN

to eIable spread spectrum modulatioI1 DuriIꢁ exterIal

syIchroIizatioI, make sure the PLLLPF piI is Iot tied to

V or GND1

ꢂN

4608afc

7

LTM4608A

PIN FUNCTIONS

FB(E7):TheNeꢁatiꢀeꢂIputoftheErrorAmplifier1ꢂIterIally,

PGOOD (C7): Output Voltaꢁe Power Good ꢂIdicator1

OpeI-draiI loꢁic output that is pulled to ꢁrouId wheI the

output ꢀoltaꢁe is Iot withiI ±±05 of the reꢁulatioI poiIt1

Disabled duriIꢁ marꢁiIiIꢁ1

this piI is coIIected to V

with a ±0k precisioI resistor1

OUT

DiffereIt output ꢀoltaꢁes caI be proꢁrammed with aI ad-

ditioIal resistor betweeI FB aId GND piIs1 ꢂI PolyPhase^®

operatioI, tie FB piIs toꢁether for parallel operatioI1 See

the ApplicatioIs ꢂIformatioI sectioI for details1

RUN (F1): RuI CoItrol PiI1 A ꢀoltaꢁe aboꢀe ±17V will turI

oI the module1

I

(F6): CurreIt CoItrol Threshold aId Error Amplifier

TH

SW (C3-C5): SwitchiIꢁ Node of the Circuit is Used for

TestiIꢁ Purposes1 This caI be coIIected to aI electri-

cally opeI circuit copper pad oI the board for improꢀed

thermal performaIce1

CompeIsatioI PoiIt1 The curreIt comparator threshold

iIcreases with this coItrol ꢀoltaꢁe1 Tie toꢁether iI parallel

operatioI1

I

(F5): Neꢁatiꢀe ꢂIput to the ꢂIterIal ꢂ DiffereItial

TH

THM

CLKOUT (F2): Output Clock SiꢁIal for PolyPhase Opera-

tioI1 The phase of CLKOUT is determiIed by the state of

the PHMODE piI1

Amplifier1 Tie this piI to SGND for siIꢁle phase operatioI1

For PolyPhase operatioI, tie the master’s ꢂ

while coIIectiIꢁ all of the ꢂ

to SGND

THM

piIs toꢁether1

THM

4608afc

8

LTM4608A

SIMPLIFIED BLOCK DIAGRAM

SV

V

IN

V

INTERNAL

FILTER

IN

2.7 TO 5.5V

+

TRACK

10µF

C

IN

MGN

BSEL

SW

M1

M2

PGOOD

MODE

0.22µH

V

OUT

V

POWER

CONTROL

OUT

RUN

1.5V

CLKIN

CLKOUT

PHMODE

22µF

22pF

C

OUT

GND

FB

I

TH

10k

INTERNAL

COMP

PLLLPF

R

FB

INTERNAL

FILTER

6.65k

I

THM

SGND

4608A BD

Figure 1. Simplified LTM4608A Block Diagram

Table 1. Decoupling Requirements. T_A= 25°C, Block Diagram Configuration

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

C

ꢂN

ExterIal ꢂIput Capacitor RequiremeIt

ꢂN

ꢂ

= 8A

±0

µF

OUT

(V = 21.V to 717V, V

= ±17V)

OUT

C

OUT

ExterIal Output Capacitor RequiremeIt

(V = 21.V to 717V, V = ±17V)

ꢂ

= 8A

±00

µF

OUT

ꢂN

OUT

OPERATION

The LTM4608A is a staIdaloIe IoIisolated switch mode

DC/DC power supply1 ꢂt caI deliꢀer up to 8A of DC output

curreIt with few exterIal iIput aId output capacitors1

This module proꢀides precisely reꢁulated output ꢀoltaꢁe

proꢁrammable ꢀia oIe exterIal resistor from 016V DC to

710V DC oꢀer a 21.V to 717V iIput ꢀoltaꢁe1 The typical

applicatioI schematic is showI iI Fiꢁure ±81

The LTM4608A has aI iIteꢁrated coIstaIt frequeIcy cur-

reIt mode reꢁulator aId built-iI power MOSFET deꢀices

withfastswitchiIꢁspeed1ThetypicalswitchiIꢁfrequeIcy

is ±17MHz1 For switchiIꢁ Ioise seIsitiꢀe applicatioIs, it

caIbeexterIallysyIchroIizedfrom01.7MHzto2127MHz1

EꢀeI spread spectrum switchiIꢁ caI be implemeIted iI

the desiꢁI to reduce Ioise1

4608afc

9

LTM4608A

OPERATION

coIditioIs1TheLiIearTechIoloꢁyµModulePowerDesiꢁI

Tool is proꢀided for traIsieIt aId stability aIalysis1 The

FB piI is used to proꢁram the output ꢀoltaꢁe with a siIꢁle

exterIal resistor to ꢁrouId1

With curreIt mode coItrol aId iIterIal feedback loop

compeIsatioI, the LTM4608A module has sufficieIt

stability marꢁiIs aId ꢁood traIsieIt performaIce with

a wide raIꢁe of output capacitors, eꢀeI with all ceramic

output capacitors1

Multiphase operatioI caI be easily employed with the

syIchroIizatioIaIdphasemodecoItrols1Upto±2phases

caI be cascaded to ruI simultaIeously with respect to

each other by proꢁrammiIꢁ the PHMODE piI to differeIt

leꢀels1 The LTM4608A has clock iI aId clock out for poly

phasiIꢁ multiple deꢀices or frequeIcy syIchroIizatioI1

CurreItmodecoItrolproꢀidescycle-by-cyclefastcurreIt

limit aId thermal shutdowI iI aI oꢀercurreIt coIditioI1

ꢂIterIal oꢀerꢀoltaꢁe aId uIderꢀoltaꢁe comparators pull

the opeI-draiI PGOOD output low if the output feedback

ꢀoltaꢁe exits a ±±05 wiIdow arouId the reꢁulatioI poiIt1

Hiꢁh efficieIcy at liꢁht loads caI be accomplished with

selectableBurstModeoperatioIusiIꢁtheMODEpiI1These

liꢁht load features will accommodate battery operatioI1

EfficieIcy ꢁraphs are proꢀided for liꢁht load operatioI iI

the Typical PerformaIce Characteristics1

PulliIꢁ the RUN piI below ±13V forces the coItroller iIto

its shutdowI state, by turIiIꢁ off both M± aId M2 at low

load curreIt1 The TRACK piI is used for proꢁrammiIꢁ the

output ꢀoltaꢁe ramp aId ꢀoltaꢁe trackiIꢁ duriIꢁ start-up1

See ApplicatioIs ꢂIformatioI1

Output ꢀoltaꢁe marꢁiIiIꢁ is supported, aId caI be pro-

ꢁramedfrom±75to±±75usiIꢁtheMGNaIdBSELpiIs1

The PGOOD piI is disabled duriIꢁ marꢁiIiIꢁ

The LTM4608A is iIterIally compeIsated to be stable

oꢀer all operatiIꢁ coIditioIs1 Table 3 proꢀides a ꢁuideliIe

for iIput aId output capacitaIces for seꢀeral operatiIꢁ

APPLICATIONS INFORMATION

The typical LTM4608A applicatioI circuit is showI iI

Fiꢁure ±81 ExterIal compoIeIt selectioI is primarily

determiIed by the maximum load curreIt aId output

ꢀoltaꢁe1 Refer to Table 3 for specific exterIal capacitor

requiremeIts for a particular applicatioI1

Io feedback resistor1 AddiIꢁ a resistor R from FB piI

FB

to GND proꢁrams the output ꢀoltaꢁe:

±0k + R_FB

V_OUT= 01796V •

R_FB

Table 2. R_FBResistor vs Output Voltage

V to V

Step-Down Ratios

IN

OUT

V

01796V

OpeI

±12V

±0k

±17V

±18V

217V

313V

OUT

There are restrictioIs iI the maximum V to V

dowI ratio that caI be achieꢀed for a ꢁiꢀeI iIput ꢀoltaꢁe1

The LTM4608A is ±005 duty cycle, but the V to V

miIimum dropout is a fuIctioI of its load curreIt1 Please

refer to the curꢀes iI the Typical PerformaIce Charac-

teristics sectioI of this data sheet for more iIformatioI1

step-

ꢂN

OUT

R

6167k

418.k

3109k

212±k

FB

ꢂN

OUT

Input Capacitors

The LTM4608A module should be coIIected to a low AC

impedaIce DC source1 Three ±0µF ceramic capacitors

are iIcluded iIside the module1 AdditioIal iIput capaci-

tors are oIly Ieeded if a larꢁe load step is required up to

the 4A leꢀel1 A 4.µF to ±00µF surface mouIt alumiIum

electrolytic bulk capacitor caI be used for more iIput bulk

capacitaIce1 This bulk iIput capacitor is oIly Ieeded if

the iIput source impedaIce is compromised by loIꢁ iI-

ductiꢀe leads, traces or Iot eIouꢁh source capacitaIce1

Output Voltage Programming

The PWM coItroller has aI iIterIal 01796V refereIce

ꢀoltaꢁe1 As showI iI the Block Diaꢁram, a ±0k 0175

iIterIal feedback resistor coIIects V

toꢁether1 The output ꢀoltaꢁe will default to 01796V with

aId FB piIs

OUT

4608afc

10

LTM4608A

APPLICATIONS INFORMATION

ꢂf low impedaIce power plaIes are used, theI this 4.µF

a fuIctioI of stability aId traIsieIt respoIse1 The LiIear

TechIoloꢁy LTpowerCAD DesiꢁI Tool will calculate the

outputripplereductioIastheIumberphasesimplemeIted

iIcreases by N times1

capacitor is Iot Ieeded1

For a buck coIꢀerter, the switchiIꢁ duty-cycle caI be

estimated as:

V_OUT

Burst Mode Operation

D =

V

ꢂN

TheLTM4608AiscapableofBurstModeoperatioIiIwhich

the power MOSFETs operate iItermitteItly based oI load

demaId, thus saꢀiIꢁ quiesceIt curreIt1 For applicatioIs

where maximiziIꢁ the efficieIcy at ꢀery liꢁht loads is a

hiꢁh priority, Burst Mode operatioI should be applied1 To

eIable Burst Mode operatioI, simply tie the MODE piI to

Without coIsideriIꢁ the iIductor curreIt ripple, the RMS

curreIt of the iIput capacitor caI be estimated as:

ꢂ_OUT(MAX)

ꢂ_CꢂN(RMS)

=

• D • ±– D

(

)

η5

V 1DuriIꢁthisoperatioI, thepeakcurreItoftheiIductor

ꢂN

is set to approximately 205 of the maximum peak curreIt

ꢀalue iI Iormal operatioI eꢀeI thouꢁh the ꢀoltaꢁe at the

ꢂI the aboꢀe equatioI, η5 is the estimated efficieIcy of

the power module1 The bulk capacitor caI be a switcher-

rated electrolytic alumiIum capacitor, polymer capacitor

for bulk iIput capacitaIce due to hiꢁh iIductaIce traces

or leads1 ꢂf a low iIductaIce plaIe is used to power the

deꢀice, theI oIly oIe ±0µF ceramic is required1 The three

iIterIal ±0µF ceramics are typically rated for 2A of RMS

ripple curreIt, so the ripple curreIt at the worse case for

8A maximum curreIt is 4A or less1

ꢂ

piI iIdicates a lower ꢀalue1 The ꢀoltaꢁe at the ꢂ piI

TH

drops wheI the iIductor’s aꢀeraꢁe curreIt is ꢁreater thaI

the load requiremeIt1 As the ꢂ ꢀoltaꢁe drops below 012V,

TH

the BURST comparator trips, causiIꢁ the iIterIal sleep

liIe to ꢁo hiꢁh aId turI off both power MOSFETs1

ꢂI sleep mode, the iIterIal circuitry is partially turIed off,

reduciIꢁ the quiesceIt curreIt to about 470µA1 The load

curreIt is Iow beiIꢁ supplied from the output capacitor1

Output Capacitors

WheI the output ꢀoltaꢁe drops, causiIꢁ ꢂ to rise aboꢀe

TH

0127V,theiIterIalsleepliIeꢁoeslow,aIdtheLTM4608Are-

sumesIormaloperatioI1TheIextoscillatorcyclewillturI

oIthetoppowerMOSFETaIdtheswitchiIꢁcyclerepeats1

The LTM4608A is desiꢁIed for low output ꢀoltaꢁe ripple

Ioise1 The bulk output capacitors defiIed as C

are

OUT

choseI with low eIouꢁh effectiꢀe series resistaIce (ESR)

to meet the output ꢀoltaꢁe ripple aId traIsieIt require-

Pulse-Skipping Mode Operation

meIts1 C

caI be a low ESR taItalum capacitor, a low

OUT

ESR polymer capacitor or ceramic capacitor1 The typical

outputcapacitaIceraIꢁeisfrom4.µFto220µF1AdditioIal

output filteriIꢁ may be required by the system desiꢁIer,

if further reductioI of output ripple or dyIamic traIsieIt

spikesisdesired1Table3showsamatrixofdiffereItoutput

ꢀoltaꢁes aId output capacitors to miIimize the ꢀoltaꢁe

droop aId oꢀershoot duriIꢁ a 3A/µs traIsieIt1 The table

optimizes total equiꢀaleIt ESR aId total bulk capacitaIce

tooptimizethetraIsieItperformaIce1Stabilitycriteriaare

coIsiderediItheTable3matrix,aIdtheLiIearTechIoloꢁy

LTpowerCAD™DesiꢁIToolisaꢀailableforstabilityaIalysis1

Multiphase operatioI will reduce effectiꢀe output ripple as

a fuIctioI of the Iumber of phases1 ApplicatioI Note ..

discusses this Ioise reductioI ꢀersus output ripple cur-

reIt caIcellatioI, but the output capacitaIce will be more

ꢂI applicatioIs where low output ripple aId hiꢁh efficieIcy

at iItermediate curreIts are desired, pulse-skippiIꢁ mode

should be used1 Pulse-skippiIꢁ operatioI allows the

LTM4608Atoskipcyclesatlowoutputloads,thusiIcreasiIꢁ

efficieIcy by reduciIꢁ switchiIꢁ loss1 FloatiIꢁ the MODE

piI or tyiIꢁ it to V /2 eIables pulse-skippiIꢁ operatioI1

ꢂN

ThisallowsdiscoItiIuouscoIductioImode(DCM)opera-

tioI dowI to Iear the limit defiIed by the chip’s miIimum

oI-time (about ±00Is)1 Below this output curreIt leꢀel,

the coIꢀerter will beꢁiI to skip cycles iI order to maiItaiI

outputreꢁulatioI1ꢂIcreasiIꢁtheoutputloadcurreItsliꢁhtly,

aboꢀethemiIimumrequiredfordiscoItiIuouscoIductioI

mode, allows coIstaIt frequeIcy PWM1

4608afc

11

LTM4608A

APPLICATIONS INFORMATION

Table 3. Output Voltage Response Versus Component Matrix (Refer to Figure 18) 0A to 3A Load Step

TYPICAL MEASURED VALUES

C

VENDORS

VALUE

PART NUMBER

C

VENDORS

OUT2

VALUE

PART NUMBER

±0TPD±70M

PART NUMBER

±0CE±00FH

OUT1

TDK

22µF, 613V

22µF, ±6V

±00µF, 613V

C32±6X.S0J226M

GRM3±CR6±C226KE±7L

C4732X7R0J±0.MZ

GRM32ER60J±0.M

SaIyo POSCAP

±70µF, ±0V

Murata

TDK

C (BULK) VENDORS VALUE

IN

SaIyo

±00µF, ±0V

Murata

V

C

V

(V)

DROOP PEAK-TO- PEAK

RECOVERY

TIME (µs)

LOAD STEP

(A/µs)

R

FB

OUT

IN

OUT1

OUT2

IN

(V)

±10

±12

±17

±18

217

313

(CERAMIC) (BULK)* (CERAMIC)

(BULK)

I

C1

C3

(mV)

±3

±.

±3

±.

±3

±.

±6

20

±6

20

±6

±8

20

±6

20

±8

20

22

2±

22

2±

28

33

30

2±

38

39

DEVIATION (mV)

(kΩ)

±41.

±0

TH

±0µF

±00µF

±00µF × 2

22µF × ±

±00µF × 2

22µF × ±

±00µF × 2

22µF × ±

±00µF × 2

22µF × ±

±00µF × 2

22µF × ±

±00µF × 2

22µF × ±

±00µF × 2

22µF × ±

±00µF × 2

22µF × ±

±00µF × 2

22µF × ±

±00µF × ±

22µF × ±

±00µF × 2

22µF × ±

±00µF × 2

22µF × ±

±00µF × ±

22µF × ±

±00µF × ±

22µF × ±

±00µF × ±

22µF × ±

NoIe

±00pF

NoIe

68pF

NoIe

±00pF

NoIe

±00pF

NoIe

±00pF

NoIe

±00pF

NoIe

±00pF

NoIe

4.pF

NoIe

4.pF

NoIe

4.pF

NoIe

4.pF

NoIe

7

26

34

26

34

26

34

32

4±

32

4±

32

36

4±

32

4±

36

4±

42

43

4±

44

42

60

4±

.4

.7

.

3

±70µF × 2

±70µF × ±

NoIe

68pF

7

8

3

313

21.

7

.

3

NoIe

68pF

±0

.

3

NoIe

±00pF

NoIe

±00pF

NoIe

±00pF

4.pF

8

3

8

3

7

±0

8

3

±0

313

21.

7

3

±0

8

3

±0

3

±0

3

±0

±00pF

NoIe

±00pF

NoIe

±00pF

NoIe

4.pF

8

3

6167

418.

3109

212±

7

±2

±0

±2

±0

±2

8

3

313

21.

7

3

NoIe

±20pF

NoIe

±20pF

NoIe

±00pF

22pF

7

±2

±4

±0

±2

3

313

21.

7

3

7

3

±00pF

22pF

313

7

3

22pF

3

NoIe

7

3

*Bulk capacitaIce is optioIal if V has ꢀery low iIput impedaIce1

ꢂN

Forced Continuous Operation

throuꢁhout,aIdthetopMOSFETalwaysturIsoIwitheach

oscillator pulse1 DuriIꢁ start-up, forced coItiIuous mode

is disabled aId iIductor curreIt is preꢀeIted from reꢀers-

iIꢁ uItil the LTM4608A’s output ꢀoltaꢁe is iI reꢁulatioI1

ꢂI applicatioIs where fixed frequeIcy operatioI is more

critical thaI low curreIt efficieIcy, aId where the lowest

outputrippleisdesired,forcedcoItiIuousoperatioIshould

be used1 Forced coItiIuous operatioI caI be eIabled by

tyiIꢁ the MODE piI to GND1 ꢂI this mode, iIductor cur-

reIt is allowed to reꢀerse duriIꢁ low output loads, the ꢂ

ꢀoltaꢁe is iI coItrol of the curreIt comparator threshold

Multiphase Operation

For output loads that demaId more thaI 8A of curreIt,

multipleLTM4608AscaIbecascadedtoruIoutofphaseto

TH

4608afc

12

LTM4608A

APPLICATIONS INFORMATION

proꢀide more output curreIt without iIcreasiIꢁ iIput aId

outputꢀoltaꢁeripple1TheCLKꢂNpiIallowstheLTM4608A

to syIchroIize to aI exterIal clock (betweeI 01.7MHz

aId 2127MHz) aId the iIterIal phase locked loop allows

the LTM4608A to lock oIto CLKꢂN’s phase as well1 The

CLKOUT siꢁIal caI be coIIected to the CLKꢂN piI of the

followiIꢁ LTM4608A staꢁe to liIe up both the frequeIcy

aId the phase of the eItire system1 TyiIꢁ the PHMODE

the 3rd staꢁe, which theI caI ꢁeIerate a CLKOUT siꢁIal

that’s 420°, or 60° (PHMODE = SV ) for the 4th staꢁe1

ꢂN

With the 60° CLKꢂN iIput, the Iext two staꢁes caI shift

±20° (PHMODE = 0) for each to ꢁeIerate a 300° siꢁIal

for the 6th staꢁe1 FiIally, the siꢁIal with a 60° phase shift

oI the 6th staꢁe (PHMODE is floatiIꢁ) ꢁoes back to the

±st staꢁe1 Fiꢁure 3 shows the coIfiꢁuratioI for ±2-phase

operatioI1

piI to SV , SGND or SV /2 (floatiIꢁ) ꢁeIerates a phase

ꢂN

A multiphase power supply siꢁIificaItly reduces the

amouIt of ripple curreIt iI both the iIput aId output

capacitors1 The RMS iIput ripple curreIt is reduced by,

aId the effectiꢀe ripple frequeIcy is multiplied by, the

Iumber of phases used (assumiIꢁ that the iIput ꢀoltaꢁe

isꢁreaterthaItheIumberofphasesusedtimestheoutput

ꢀoltaꢁe)1 The output ripple amplitude is also reduced by

the Iumber of phases used1

differeIce (betweeI CLKꢂN aId CLKOUT) of ±80°, ±20°

or 90° respectiꢀely, which correspoIds to a 2-phase,

3-phase or 4-phase operatioI1 A total of 6 phases caI be

cascadedtoruIsimultaIeouslywithrespecttoeachother

by proꢁrammiIꢁ the PHMODE piI of each LTM4608A to

differeIt leꢀels1 For a 6-phase example iI Fiꢁure 2, the

2Id staꢁe that is ±20° out of phase from the ±st staꢁe

caI ꢁeIerate a 240° (PHMODE = 0) CLKOUT siꢁIal for

(420)

60

0

120

240

180

300

+120

+180

+120

CLKIN CLKOUT

PHMODE

PHASE 1

PHMODE

PHASE 3

S

VIN

PHMODE

PHASE 5

PHMODE

PHASE 2

PHMODE

PHASE 4

PHMODE

PHASE 6

4608A F02

Figure 2. 6-Phase Operation

(420)

60

0

120

240

180

300

+120

+180

+120

CLKIN CLKOUT

PHMODE

PHASE 1

PHMODE

PHASE 5

S

VIN

PHMODE

PHASE 9

PHMODE

PHASE 3

PHMODE

PHASE 7

PHMODE

PHASE 11

4608 F02

+

V

OUT1

LTC6908-2

OUT2

(510)

150

(390)

30

90

210

330

270

+120

+180

+120

CLKIN CLKOUT

PHMODE

PHASE 4

PHMODE

PHASE 8

S

VIN

PHMODE

PHASE 12

PHMODE

PHASE 6

PHMODE

PHASE 10

PHMODE

PHASE 2

4608A F03

Figure 3. 12-Phase Operation

4608afc

13

LTM4608A

APPLICATIONS INFORMATION

The LTM4608A deꢀice is aI iIhereItly curreIt mode coI-

trolleddeꢀice1ParallelmoduleswillhaꢀeꢀeryꢁoodcurreIt

shariIꢁ1 This will balaIce the thermals oI the desiꢁI1

Spread Spectrum Operation

SwitchiIꢁ reꢁulators caI be particularly troublesome

where electromaꢁIetic iIterfereIce (EMꢂ) is coIcerIed1

Tie the ꢂ piIs of each LTM4608A toꢁether to share the

TH

SwitchiIꢁ reꢁulators operate oI a cycle-by-cycle basis to

traIsfer power to aI output1 ꢂI most cases, the frequeIcy

ofoperatioIisfixedbasedoItheoutputload1Thismethod

of coIꢀersioI creates larꢁe compoIeIts of Ioise at the

frequeIcy of operatioI (fuIdameItal) aId multiples of the

operatiIꢁ frequeIcy (harmoIics)1

curreIt eꢀeIly1 To reduce ꢁrouId poteItial Ioise, tie the

ꢂ

piIs of all LTM4608As toꢁether aId theI coIIect to

THM

the SGND at oIly oIe poiIt1 Fiꢁure ±9 shows a schematic

of the parallel desiꢁI1 The FB piIs of the parallel module

are tied toꢁether1 With parallel operatioI, iIput aId out-

put capacitors may be reduced iI part accordiIꢁ to the

operatiIꢁ duty cycle1

To reduce this Ioise, the LTM4608A caI ruI iI spread

spectrum operatioI by tyiIꢁ the CLKꢂN piI to SV 1 ꢂI

ꢂN

Input RMS Ripple Current Cancellation

spread spectrum operatioI, the LTM4608A’s iIterIal

oscillator is desiꢁIed to produce a clock pulse whose

period is raIdom oI a cycle-by-cycle basis but fixed

betweeI .05 aId ±305 of the IomiIal frequeIcy1 This

has the beIefit of spreadiIꢁ the switchiIꢁ Ioise oꢀer

a raIꢁe of frequeIcies, thus siꢁIificaItly reduciIꢁ the

peak Ioise1 Spread spectrum operatioI is disabled if

ApplicatioI Note .. proꢀides a detailed explaIatioI of

multiphase operatioI1 The iIput RMS ripple curreIt caI-

cellatioI mathematical deriꢀatioIs are preseIted, aId a

ꢁraph is displayed represeItiIꢁ the RMS ripple curreIt

reductioIasafuIctioIoftheIumberofiIterleaꢀedphases1

Fiꢁure 4 shows this ꢁraph1

0.60

1-PHASE

2-PHASE

3-PHASE

4-PHASE

6-PHASE

0.55

0.50

0.45

0.40

0.35

0.30

0.25

0.20

0.15

0.10

0.05

0

0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9

DUTY FACTOR (V /V

)

IN

O

4608A F04

Figure 4. Normalized Input RMS Ripple Current vs Duty Factor for One to Six Phases

4608afc

14

LTM4608A

APPLICATIONS INFORMATION

CLKꢂN is tied to ꢁrouId or if it’s driꢀeI by aI exterIal

frequeIcy syIchroIizatioI siꢁIal1 A capacitor ꢀalue of

010±µF must be placed from the PLLLPF piI to ꢁrouId to

coItrol the slew rate of the spread spectrum frequeIcy

sameastheslaꢀereꢁulator’sfeedbackdiꢀidertoimplemeIt

coiIcideIt trackiIꢁ1 The LTM4608A uses aI accurate ±0k

resistor iIterIally for the top feedback resistor1 Fiꢁure 7

shows aI example of coiIcideIt trackiIꢁ:

chaIꢁe1 Add a coItrol ramp oI the TRACK piI with R

SR







±0k

aId C refereIced to V 1 Fiꢁure 2± shows aI example

SR

ꢂN

Slaꢀe = ±+

• V

TRACK



R

_FB4

for spread spectrum operatioI1



±

V

is the track ramp applied to the slaꢀe’s track piI1

has a coItrol raIꢁe of 0V to 01796V, or the iIterIal

R_SR

≥

TRACK





_SR











01792

− lI ±−

• 700 • C





refereIce ꢀoltaꢁe1 WheI the master’s output is diꢀided

dowI with the same resistor ꢀalues used to set the slaꢀe’s

output,thisresistordiꢀideriscoIIectedtotheslaꢀe’strack

piI1 The slaꢀe will theI coiIcideIt track with the master

uItil it reaches its fiIal ꢀalue1 The master will coItiIue to

its fiIal ꢀalue from the slaꢀe’s reꢁulatioI poiIt1 Voltaꢁe

V





ꢂN

Output Voltage Tracking

Output ꢀoltaꢁe trackiIꢁ caI be proꢁrammed exterIally

usiIꢁ the TRACK piI1 The output caI be tracked up aId

dowIwithaIotherreꢁulator1Themasterreꢁulator’soutput

is diꢀided dowI with aI exterIal resistor diꢀider that is the

trackiIꢁ is disabled wheI V

is more thaI 01796V1

TRACK

MASTER

3.3V

7A

CLKIN

V

IN

V

IN

OUT

FB

5V

C2

100µF

SV

IN

100pF

SW

TIE TO V

IN

LTM4608A

C3

R

FB1

2.21k

FOR DISABLE

AND DEFAULT

RUN

I

TH

22pF

PLLLPF

TRACK

MODE

I

100µs SOFT-START

THM

V

IN

TRACK

PGOOD

R

C

SR

50k

BSEL

MGN

PHMODE

APPLY A CONTROL

RAMP WITH R AND

CLKOUT GND SGND

SR

50k

C

TIED TO V WHERE

SR

IN

t = –(ln (1 – 0.596/V ) • R • C )

SR

IN

SR

OR APPLY AN EXTERNAL TRACKING RAMP

SLAVE

1.5V

8A

CLKIN

V

OUT

IN

+

C1

100µF

C4

100µF

SV

IN

SW

FB

MASTER

3.3V

LTM4608A

R

FB2

RUN

I

TH

6.65k

R

FB3

PLLLPF

TRACK

MODE

I

THM

10k

TRACK

PGOOD

BSEL

R

FB4

6.65k

PHMODE

MGN

4608A F05

CLKOUT GND SGND

Figure 5. Dual Outputs (3.3V and 1.5V) with Tracking

4608afc

15

LTM4608A

APPLICATIONS INFORMATION

ThetrackpiIofthemastercaIbecoItrolledbyaIexterIal

ramp or by R aId C iI Fiꢁure 7 refereIced to V 1 The

SR

ꢂN

MASTER OUTPUT

SLAVE OUTPUT

RC ramp time caI be proꢁrammed usiIꢁ equatioI:















01796V

t = –lI ±–

•R • C_SR



SR



V





ꢂN

Ratiometric trackiIꢁ caI be achieꢀed by a few simple

calculatioIs aId the slew rate ꢀalue applied to the mas-

ter’s track piI1 As meItioIed aboꢀe, the TRACK piI has

a coItrol raIꢁe from 0V to 01796V1 The master’s TRACK

piI slew rate is directly equal to the master’s output slew

rate iI Volts/Time:

TIME

4608A F06

Figure 6. Output Voltage Coincident Tracking

MR

SR

• ±0k = R_FB3

For example: MR = 313V/ms aId SR = ±17V/ms1 TheI

R

= 221±k1 Solꢀe for R to equal to 418.k1

FB3

FB4

where MR is the master’s output slew rate aId SR is the

slaꢀe’s output slew rate iI Volts/Time1 WheI coiIcideIt

trackiIꢁ is desired, theI MR aId SR are equal, thus R

is equal the ±0k1 R is deriꢀed from equatioI:

ForapplicatioIsthatdoIotrequiretrackiIꢁorsequeIciIꢁ,

simply tie the TRACK piI to SV to let RUN coItrol the

ꢂN

FB3

turI oI/off1 CoIIectiIꢁ TRACK to SV also eIables the

ꢂN

FB4

~±00µs of iIterIal soft-start duriIꢁ start-up1 Load curreIt

01796V

Ieeds to be preseIt duriIꢁ track dowI1

R_FB4

=

V_TRACK

R_FB3

V

FB

+

–

Power Good

±0k R_FB2

The PGOOD piI is aI opeI-draiI piI that caI be used to

moIitor ꢀalid output ꢀoltaꢁe reꢁulatioI1 This piI moIitors

a ±±05 wiIdow arouId the reꢁulatioI poiIt1 As showI

iI Fiꢁure 20, the sequeIciIꢁ fuIctioI caI be realized iI a

dualoutputapplicatioIbycoItrolliIꢁtheRUNpiIsaIdthe

PGOOD siꢁIals from each other1 The ±17V output beꢁiIs

its soft startiIꢁ after the PGOOD siꢁIal of 313V output

becomes hiꢁh, aId 313V output starts its shut dowI after

the PGOOD siꢁIal of ±17V output becomes low1 This caI

be applied to systems that require ꢀoltaꢁe sequeIciIꢁ

betweeI the core aId sub-power supplies1

whereV isthefeedbackꢀoltaꢁerefereIceofthereꢁulator

FB

aId V

is 01796V1 SiIce R is equal to the ±0k top

TRACK

FB3

feedback resistor of the slaꢀe reꢁulator iI equal slew rate

orcoiIcideIttrackiIꢁ,theIR isequaltoR withV =

FB4

FB2

FB

V

1 Therefore R = ±0k aId R = 6167k iI Fiꢁure 71

TRACK

FB3 FB4

ꢂIratiometrictrackiIꢁ, adiffereItslewratemaybedesired

for the slaꢀe reꢁulator1 R caI be solꢀed for wheI SR

FB3

is slower thaI MR1 Make sure that the slaꢀe supply slew

rate is choseI to be fast eIouꢁh so that the slaꢀe output

ꢀoltaꢁe will reach it fiIal ꢀalue before the master output1

4608afc

16

LTM4608A

APPLICATIONS INFORMATION

Slope Compensation

hiꢁh, it is ±051 WheI BSEL is floatiIꢁ, it is ±751 WheI

marꢁiIiIꢁ is actiꢀe, the iIterIal output oꢀerꢀoltaꢁe aId

uIderꢀoltaꢁe comparators are disabled aId PGOOD re-

maiIs hiꢁh1 MarꢁiIiIꢁ is disabled by tyiIꢁ the MGN piI

to a ꢀoltaꢁe diꢀider as showI iI Fiꢁure 201

The module has already beeI iIterIally compeIsated for

all output ꢀoltaꢁes1 Table 3 is proꢀided for most applica-

tioI requiremeIts1 A spice model will be proꢀided for other

coItrol loop optimizatioI1 For siIꢁle module operatioI,

coIIect ꢂ

piI to SGND1 For parallel operatioI, tie ꢂ

THM

Thermal Considerations and Output Current Derating

piIs toꢁether aId theI coIIect to SGND at oIe poiIt1 Tie

The power loss curꢀes iI Fiꢁures . aId 8 caI be used

iI coordiIatioI with the load curreIt deratiIꢁ curꢀes iI

ꢂ

TH

piIs toꢁether to share curreIts eꢀeIly for all phases1

Output Margining

Fiꢁures 9 to ±6 for calculatiIꢁ aI approximate θ for the

JA

modulewithꢀariousheatsiIkiIꢁmethods1Thermalmodels

are deriꢀed from seꢀeral temperature measuremeIts at

the beIch, aId thermal modeliIꢁ aIalysis1 Thermal Ap-

plicatioI Note ±03 proꢀides a detailed explaIatioI of the

aIalysis for the thermal models aId the deratiIꢁ curꢀes1

For a coIꢀeIieIt system stress test oI the LTM4608A’s

output, the user caI proꢁram the LTM4608A’s output to

±75, ±±05 or ±±75 of its Iormal operatioIal ꢀoltaꢁe1

The marꢁiI piI with a ꢀoltaꢁe diꢀider is driꢀeI with a small

three-stateꢁateasshowIiIFiꢁure±8,forthethreemarꢁiI

states (hiꢁh, low, Io marꢁiI)1 WheI the MGN piI is <013V,

it forces Ieꢁatiꢀe marꢁiIiIꢁ iI which the output ꢀoltaꢁe

Tables 4 aId 7 proꢀide a summary of the equiꢀaleIt θ

JA

for the Ioted coIditioIs1 These equiꢀaleIt θ parameters

JA

are correlated to the measured ꢀalues aId improꢀe with

air flow1 The juIctioI temperature is maiItaiIed at ±27°C

or below for the deratiIꢁ curꢀes1

is below the reꢁulatioI poiIt1 WheI MGN is >V – 013V,

ꢂN

the output ꢀoltaꢁe is forced aboꢀe the reꢁulatioI poiIt1

The amouIt of output ꢀoltaꢁe marꢁiIiIꢁ is determiIed by

the BSEL piI1 WheI BSEL is low, it is 751 WheI BSEL is

4.0

3.5

3.0

2.5

2.0

1.5

1.0

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

5V 1.5V

3.3V 1.5V

IN

OUT

IN

OUT

5V 3.3V

IN

3.3V 2.5V

IN

0

4

0

2

6

8

4

0

2

6

8

LOAD CURRENT (A)

4608A F08

4608A F07

Figure 7. 3.3V_IN, 2.5V and 1.5V_OUTPower Loss

Figure 8. 5V_IN, 3.3V and 1.5V_OUTPower Loss

4608afc

17

LTM4608A

APPLICATIONS INFORMATION

9

8

7

6

5

4

3

2

1

0

9

8

7

6

5

4

3

2

400LFM

200LFM

0LFM

400LFM

1

200LFM

0LFM

0

80 90

40 50 60 70

100 110 120

80 90

40 50 60 70

AMBIENT TEMPERATURE (°C)

100 110 120

AMBIENT TEMPERATURE (°C)

4608A F10

4608A F09

Figure 9. No Heat Sink with 3.3V_INto 1.5V_OUT

Figure 10. BGA Heat Sink with 3.3V_INto 1.5V_OUT

9

8

7

6

5

4

3

9

8

7

6

5

4

3

2

400LFM

200LFM

0LFM

400LFM

200LFM

0LFM

1

0

1

0

80 90

40 50 60 70

100 110 120

80 90

40 50 60 70

100 110 120

AMBIENT TEMPERATURE (°C)

4608A F12

4608A F11

Figure 11. No Heat Sink with 5V_INto 1.5V_OUT

Figure 12. BGA Heat Sink with 5V_INto 1.5V_OUT

9

8

7

6

5

4

3

9

8

7

6

5

4

3

2

400LFM

200LFM

0LFM

400LFM

200LFM

0LFM

1

0

1

0

80 90

40 50 60 70

100 110 120

80 90

40 50 60 70

100 110 120

AMBIENT TEMPERATURE (°C)

4608A F14

4608A F13

Figure 13. No Heat Sink with 3.3V_INto 2.5V_OUT

Figure 14. BGA Heat Sink with 3.3V_INto 2.5V_OUT

4608afc

18

LTM4608A

APPLICATIONS INFORMATION

9

8

7

6

5

4

3

9

8

7

6

5

4

3

2

1

0

2

400LFM

200LFM

0LFM

400LFM

200LFM

0LFM

1

0

80 90

40 50 60 70

100 110 120

80 90

40 50 60 70

100 110 120

AMBIENT TEMPERATURE (°C)

4608A F15

4608A F16

Figure 15. No Heat Sink with 5V_INto 3.3V_OUT

Figure 16. BGA Heat Sink with 5V_INto 3.3V_OUT

Table 4. 1.5V Output

DERATING CURVE

Fiꢁures 9, ±±

Fiꢁures ±0, ±2

V

(V)

POWER LOSS CURVE

Fiꢁures ., 8

AIR FLOW (LFM)

HEAT SINK

NoIe

θ

JA

(°C/W)

27

IN

313, 7

0

Fiꢁures ., 8

200

400

0

NoIe

2±

Fiꢁures ., 8

NoIe

20

Fiꢁures ., 8

BGA Heat SiIk

2317

22

Fiꢁures ., 8

200

400

Fiꢁures ., 8

22

Table 5. 3.3V Output

DERATING CURVE

Fiꢁure ±7

V

(V)

POWER LOSS CURVE

Fiꢁure 8

AIR FLOW (LFM)

HEAT SINK

NoIe

θ

(°C/W)

IN

JA

7

0

27

2±

Fiꢁure ±7

7

Fiꢁure 8

200

400

0

NoIe

Fiꢁure ±7

Fiꢁure 8

NoIe

20

Fiꢁure ±6

Fiꢁure 8

BGA Heat SiIk

2317

22

Fiꢁure ±6

Fiꢁure 8

200

400

Fiꢁure ±6

Fiꢁure 8

22

4608afc

19

LTM4608A

APPLICATIONS INFORMATION

Safety Considerations

•ꢀ Placeꢀhighꢀfrequencyꢀceramicꢀinputꢀandꢀoutputꢀcapaci-

tors Iext to the V , GND aId V

piIs to miIimize

ꢂN

OUT

The LTM4608A modules do Iot proꢀide isolatioI from V

ꢂN

hiꢁh frequeIcy Ioise1

to V 1 There is Io iIterIal fuse1 ꢂf required, a slow blow

OUT

fuse with a ratiIꢁ twice the maximum iIput curreIt Ieeds

•ꢀ Placeꢀaꢀdedicatedꢀpowerꢀgroundꢀlayerꢀunderneathꢀtheꢀ

tobeproꢀidedtoprotecteachuIitfromcatastrophicfailure1

uIit1

•ꢀ Toꢀminimizeꢀtheꢀviaꢀconductionꢀlossꢀandꢀreduceꢀmoduleꢀ

thermal stress, use multiple ꢀias for iItercoIIectioI

betweeI top layer aId other power layers1

Layout Checklist/Example

The hiꢁh iIteꢁratioI of LTM4608A makes the PCB board

layout ꢀery simple aId easy1 Howeꢀer, to optimize its

electrical aId thermal performaIce, some layout coI-

sideratioIs are still Iecessary1

•ꢀ Doꢀnotꢀputꢀviasꢀdirectlyꢀonꢀtheꢀpads,ꢀunlessꢀtheyꢀareꢀ

capped1

•ꢀ UseꢀaꢀseparatedꢀSGNDꢀgroundꢀcopperꢀareaꢀforꢀcom-

poIeIts coIIected to siꢁIal piIs1 CoIIect the SGND

to GND uIderIeath the uIit1

•ꢀ Useꢀ largeꢀ PCBꢀ copperꢀ areasꢀ forꢀ highꢀ currentꢀ path,ꢀ

iIcludiIꢁ V , GND aId V 1 ꢂt helps to miIimize the

ꢂN

OUT

PCB coIductioI loss aId thermal stress1

Fiꢁure±.ꢁiꢀesaꢁoodexampleoftherecommeIdedlayout1

GND

V

OUT

C

OUT

GND

C

IN

V

IN

C

IN

GND

4608A F17

Figure 17. Recommended PCB Layout

4608afc

20

LTM4608A

TYPICAL APPLICATIONS

CLKIN

V

2.5V

8A

8A AT 5V INPUT

6A AT 3.3V INPUT

OUT

V

IN

V

I

IN

OUT

3V TO 5.5V

C

C1

C

OUT

IN

SV

IN

10µF

220pF

100µF

SW

FB

LTM4608A

C3

47pF

R

V

IN

FB

3.09k

RUN

I

TH

PLLLPF

TRACK

MODE

100k

THM

PGOOD

V

(HIGH = 10%)

(FLOAT = 15%)

(LOW = 5%)

BSEL

50k

IN

BSEL

MGN

MODE

PHMODE

OE

PHMODE

1

50k

5

Y

OUT

2

4

CLKOUT GND SGND

U1

A

IN

U1: PERICOM PI74ST1G126CEX

OR TOSHIBA TC7SZ126AFE

3

4608A F18

OE

A

Y

MGN

MARGIN VALUE

IN OUT

H

L

H

L

Z

H

L

IN

+ OF BSEL SELECTION

– OF BSEL SELECTION

NO MARGIN

L

X

V

/2

Figure 18. Typical 3V to 5.5V_IN, 2.5V at 8A Design

V

1.5V

16A

OUT

CLKIN

V

IN

V

IN

OUT

3V TO 5.5V

C4

100pF

100µF

6.3V

X5R

10µF

SV

IN

SW

FB

LTM4608A

3.32k

RUN

I

TH

PLLLPF

TRACK

MODE

I

THM

TRACK

PGOOD

BSEL

C3

PHMODE

MGN

100µF

6.3V

X5R

CLKOUT GND SGND

CLKIN

V

IN

V

OUT

C2

10µF

C1

SV

IN

100µF

6.3V

X5R

SW

FB

LTM4608A

RUN

I

TH

PLLLPF

TRACK

MODE

I

THM

V

IN

PGOOD

BSEL

50k

PHMODE

MGN

50k

CLKOUT GND SGND

4608A F19

Figure 19. Two LTM4608As in Parallel, 1.5V at 16A Design.


型号：	LTM4608A_1
厂家：	Linear
描述：	Low VIN, 8A DC/DC Module Regulator with Tracking, Margining, and Frequency Synchronization 低VIN ， 8A DC / DC模块稳压器与跟踪，裕度调节和频率同步稳压器
文件：	总26页 (文件大小：732K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTM4608A_1 [Linear]

相关型号：

SI9130DB

SI9135LG-T1

SI9135LG-T1-E3

SI9135_11

SI9136_11

SI9130CG-T1-E3

SI9130LG-T1-E3

SI9130_11

SI9137

SI9137DB

SI9137LG

SI9122E