LTM4612EV#PBF [Linear]
LTM4612 - Ultralow Noise 36VIN, 15VOUT, 5A, DC/DC µModule (Power Module) Regulator; Package: LGA; Pins: 133; Temperature Range: -40°C to 85°C;
| 型号： | LTM4612EV#PBF |
| 厂家： | 
Linear |
| 描述： | LTM4612 - Ultralow Noise 36VIN, 15VOUT, 5A, DC/DC µModule (Power Module) Regulator; Package: LGA; Pins: 133; Temperature Range: -40°C to 85°C 开关 |
| 文件： | 总28页 (文件大小：1088K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTM4612
EN55022B Compliant
36V , 15V , 5A,
IN
OUT
DC/DC µModule Regulator
FEATURES
DESCRIPTION
The LTM®4612 is a EN55022 Class B certified high voltage
inputandoutput,5AswitchingmodeDC/DCpowersupply.
Includedinthepackagearetheswitchingcontroller,power
FETs, inductor and all support components. Operating
over an input voltage range of 5V to 36V, the LTM4612
supports an output voltage range of 3.3V to 15V, set by a
single resistor. Only bulk input and output capacitors are
needed to finish the design.
n
Complete Low EMI Switch Mode Power Supply
n
EN55022 Class B Compliant
n
Wide Input Voltage Range: 5V to 36V
n
3.3V to 15V Output Voltage Range
n
5A DC, 7A Peak Output Current
n
Low Input and Output Referred Noise
n
Output Voltage Tracking and Margining
n
Power Good Tracks with Margining
n
PLL Frequency Synchronization
High switching frequency and an adaptive on-time current
mode architecture enables a very fast transient response
to line and load changes without sacrificing stability.
n
1.5% Set Point Accuracy
n
Current Foldback Protection (Disabled at Start-Up)
n
Parallel/Current Sharing
n
n
n
n
n
The onboard input filter and noise cancellation circuits
achieve low noise coupling, thus effectively reducing the
electromagnetic interference (EMI)—see Figures 4 and 8.
Furthermore, the DC/DC µModule® regulator can be syn-
chronized with an external clock to reduce undesirable
frequency harmonics and allow PolyPhase® operation for
high load currents.
Ultrafast Transient Response
Current Mode Control
Programmable Soft-Start
Output Overvoltage Protection
–55°C to 125°C Operating Temperature Range
(LTM4612MPV)
n
Small Surface Mount Footprint, Low Profile
(15mm × 15mm × 2.8mm) LGA Package
The LTM4612 is offered in a space saving and thermally
enhanced 15mm × 15mm × 2.8mm LGA package, which
enables utilization of unused space on the bottom of PC
boards for high density point-of-load regulation. The
LTM4612 is Pb-free and RoHS compliant.
APPLICATIONS
n
Telecom and Networking Equipment
n
Industrial and Avionic Equipment
L, LT, LTC, LTM, Linear Technology, the Linear logo, PolyPhase and µModule are registered
trademarks and LTpowerCAD is a trademark of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
n
RF Systems
TYPICAL APPLICATION
Radiated Emission Scan at 24VIN, 5VOUT/5A
70
5V/5A Ultralow Noise µModule with 7V to 36V Input
60
50
CLOCK SYNC
V
IN
7V
TO 36V
2M
100k
V
PLLIN
V
5V
5A
IN
OUT
40
30
20
10
0
EN55022 CLASS B LIMIT
V
OUT
PGOOD
RUN
COMP
LTM4612
100pF
13.7k
C
OUT
V
FB
INTV
DRV
CC
C
IN
CC
FCB
f
SET
MARG0
MARG1
MPGM
MARGIN
TRACK/SS
CONTROL
V
D
0.01µF
10µF
392k
5% MARGIN
–10
SGND PGND
30
226.2 422.4 618.6 814.8
128.1 324.3 520.5 716.7 912.9
FREQUENCY (MHz)
1010
4612 TA01
4612 TA01b
4612fc
1
For more information www.linear.com/LTM4612
LTM4612
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
INTV DRV ............................................. –0.3V to 6V
CC,
CC
V
........................................................... –0.3V to 16V
OUT
PLLIN, FCB, TRACK/SS, MPGM, MARG0,
A
B
C
D
E
V
MARG1, PGOOD ....................–0.3V to INTV + 0.3V
IN
CC
f
SET
MARG0
MARG1
V
BANK 1
D
RUN .............................................................–0.3V to 5V
SGND
V , COMP................................................ –0.3V to 2.7V
FB
IN
DRV
CC
PGND
BANK 2
V , V ....................................................... –0.3V to 36V
F
V
FB
D
G
H
J
PGOOD
SGND
NC
NC
NC
Internal Operating Temperature Range (Note 2)
E and I Grades ...................................–40°C to 125°C
MP Grade........................................... –55°C to 125°C
Junction Temperature ........................................... 125°C
Storage Temperature Range .................. –55°C to 125°C
V
K
L
OUT
BANK 3
FCB
M
1
2 3 4 5 6 7 8 9 10 11 12
LGA PACKAGE
133-LEAD (15mm × 15mm × 2.8mm)
T
= 125°C, θ = 15°C/W, θ = 6°C/W
JA JC
JMAX
θ
DERIVED FROM 95mm × 76mm PCB WITH 4 LAYERS
JA
WEIGHT = 1.7g
ORDER INFORMATION http://www.linear.com/product/LTM4612#orderinfo
LEAD FREE FINISH
LTM4612EV#PBF
LTM4612IV#PBF
LTM4612MPV#PBF
TRAY
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 125°C
LTM4612EV#PBF
LTM4612IV#PBF
LTM4612MPV#PBF
LTM4612V
133-Lead (15mm × 15mm × 2.8mm) LGA
133-Lead (15mm × 15mm × 2.8mm) LGA
133-Lead (15mm × 15mm × 2.8mm) LGA
LTM4612V
–40°C to 125°C
LTM4612MPV
–55°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified internal
operating temperature range, otherwise specifications are at TA = 25°C, VIN = 24V, unless otherwise noted (Note 2). Per Typical
Application (front page) configuration.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
V
Input DC Voltage
Output Voltage
5
36
V
IN(DC)
V
C
= 10µF × 3, C
= 300µF; FCB = 0
OUT(DC)
IN
OUT
l
l
V
V
= 24V, V
= 12V, I = 0A
OUT
11.83
11.83
12.07
12.07
12.31
12.31
V
V
IN
IN
OUT
OUT
= 36V, V =12V, I
= 0A
OUT
Input Specifications
V
Undervoltage Lockout Threshold
Input Inrush Current at Start-Up
I
I
= 0A
3.2
4.8
V
IN(UVLO)
OUT
OUT
I
= 0A; C = 10µF × 2, C
= 200µF;
INRUSH(VIN)
IN
OUT
V
= 12V
OUT
V
V
= 24V
= 36V
0.6
0.7
A
A
IN
IN
4612fc
2
For more information www.linear.com/LTM4612
LTM4612
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified internal
operating temperature range, otherwise specifications are at TA = 25°C, VIN = 24V, unless otherwise noted (Note 2). Per Typical
Application (front page) configuration.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I
Input Supply Bias Current
V
V
= 36V, V
= 24V, V
= 12V, Switching Continuous
= 12V, Switching Continuous
57
48
50
mA
mA
µA
Q(VIN)
IN
IN
OUT
OUT
Shutdown, RUN = 0, V = 36V
IN
I
Input Supply Current
V
IN
V
IN
= 36V, V
= 24V, V
= 12V, I
= 12V, I
= 5A
= 5A
1.85
2.72
A
A
S(VIN)
OUT
OUT
OUT
OUT
V
Internal V Voltage
V
= 36V, RUN > 2V, I = 0A
OUT
4.7
0
5
5.5
V
INTVCC
CC
IN
Output Specifications
I
Output Continuous Current Range
Line Regulation Accuracy
V
V
= 24V, V
= 12V (Note 4)
OUT
5
A
OUT(DC)
IN
DV
= 12V, FCB = 0V, V = 22V to 36V,
OUT(LINE)
OUT
OUT
IN
l
I
= 0A
0.05
0.3
%
V
OUT
DV
Load Regulation Accuracy
Input Ripple Voltage
V
= 12V, FCB = 0V, I
IN
IN
= 0A to 5A (Note 4)
OUT(LOAD)
OUT
V
V
OUT
l
l
= 36V
= 24V
0.3
0.3
0.6
0.6
%
%
V
OUT
V
V
I
= 0A,
IN(AC)
OUT
C
= 2 × 10µF X5R Ceramic and 1 × 100µF
IN
Electrolytic, 1 × 10µF X5R Ceramic on V Pins
D
V
V
= 24V, V
= 24V, V
= 5V
= 12V
7.2
3.4
mV
mV
IN
IN
OUT
OUT
P-P
P-P
Output Ripple Voltage
I
= 0A,
OUT
OUT(AC)
C
= 2 × 22µF, 2 × 47µF X5R Ceramic
OUT
V
V
= 24V, V
= 24V, V
= 5V
= 12V
17.5
12.5
mV
mV
IN
IN
OUT
OUT
P-P
P-P
f
S
Output Ripple Voltage Frequency
I
= 1A, V = 24V, V = 12V
OUT
940
kHz
OUT
IN
DV
Turn-On Overshoot,
TRACK/SS = 10nF
C
= 200µF, V
IN
IN
= 12V, I
= 0A
OUT(START)
OUT
V
V
OUT
OUT
= 36V
= 24V
20
20
mV
mV
t
Turn-On Time, TRACK/SS = Open
C
= 300µF, V
OUT
= 12V, I
= 1A
START
OUT
OUT
Resistive Load
V
IN
V
IN
= 36V
= 24V
0.5
0.5
ms
ms
DV
Peak Deviation for Dynamic Load
Load: 0% to 50% to 0% of Full Load
= 2 × 22µF Ceramic, 150µF Bulk
OUT(LS)
C
153
37
mV
µs
OUT
V
= 24V, V
= 12V
OUT
IN
t
I
Settling Time for Dynamic Load Step Load: 0% to 50% to 0% of Full Load, V = 24V
IN
SETTLE
OUT(PK)
Output Current Limit
C
= 200µF
IN
IN
OUT
V
V
= 36V, V
= 24V, V
= 12V
= 12V
9
9
A
A
OUT
OUT
Control Section
l
V
V
Voltage at V Pin
I
= 0A, V = 12V
OUT
0.591
1
0.6
1.5
–1.5
0.6
–1
0.609
1.9
V
V
FB
FB
OUT
RUN Pin On/Off Threshold
Soft-Start Charging Current
Forced Continuous Threshold
Forced Continuous Pin Current
Minimum On-Time
RUN
I
V
V
= 0V
–1
–2
µA
V
SS/TRACK
SS/TRACK
V
FCB
0.57
0.63
–2
I
t
t
= 0V
FCB
µA
ns
ns
kW
FCB
(Note 3)
(Note 3)
50
100
400
ON(MIN)
OFF(MIN)
Minimum Off-Time
250
50
R
PLLIN Input Resistor
PLLIN
4612fc
3
For more information www.linear.com/LTM4612
LTM4612
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified internal
operating temperature range, otherwise specifications are at TA = 25°C, VIN = 24V, unless otherwise noted (Note 2). Per Typical
Application (front page) configuration.
SYMBOL
PARAMETER
Current into DRV Pin
CONDITIONS
MIN
TYP
22
MAX
30
UNITS
mA
kW
V
I
V
OUT
= 12V, I
= 1A
OUT
DRVCC
CC
R
FBHI
Resistor Between V
and V Pins
99.5
100
1.18
1.4
100.5
OUT
FB
V
V
Margin Reference Voltage
MPGM
, V
MARG0, MARG1 Voltage Thresholds
V
MARG0 MARG1
PGOOD
DV
DV
DV
PGOOD Upper Threshold
PGOOD Lower Threshold
PGOOD Hysteresis
V
V
V
Rising
Falling
7
10
–10
1.5
13
%
%
%
V
FBH
FB
–7
–13
FBL
FB
Returning
FB(HYS)
FB
V
PGOOD Low Voltage
I
= 5mA
0.15
0.4
PGL
PGOOD
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM4612E is guaranteed to meet performance specifications
over the 0°C to 125°C internal operating temperature range. Specifications
over the –40°C to 125°C internal operating temperature range are assured
by design, characterization and correlation with statistical process
controls. The LTM4612I is guaranteed to meet specifications over the
–40°C to 125°C internal operating temperature range. The LTM4612MP
is guaranteed and tested over the full –55°C to 125°C internal operating
temperature range. Note that the maximum ambient temperature
consistent with these specifications is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
resistance and other environmental factors.
Note 3: 100% tested at die level only.
Note 4: See the Output Current Derating curves for different V , V
IN OUT
and T .
A
4612fc
4
For more information www.linear.com/LTM4612
LTM4612
TYPICAL PERFORMANCE CHARACTERISTICS (Refer to Figure 18)
Efficiency vs Load Current with
3.3VOUT (FCB = 0)
Efficiency vs Load Current with
5VOUT (FCB = 0)
Efficiency vs Load Current with
12VOUT (FCB = 0)
95
90
85
80
75
70
65
60
55
50
100
95
90
85
80
75
70
65
60
55
50
100
95
90
85
80
75
70
65
60
55
50
5V 3.3V
20V 12V
IN
IN
OUT
OUT
OUT
OUT
OUT
12V 3.3V
12V 5V
24V 12V
IN
IN
OUT
OUT
OUT
IN
OUT
OUT
OUT
24V 3.3V
24V 5V
28V 12V
IN
IN
IN
36V 3.3V
IN
36V 5V
IN
36V 12V
IN
0
1
2
3
4
5
0
1
2
3
5
0
1
2
3
4
5
4
LOAD CURRENT (A)
LOAD CURRENT (A)
LOAD CURRENT (A)
4612 G02
4612 G03
4612 G01
Efficiency vs Load Current with
15VOUT (FCB = 0, Refer to Figure 20)
Transient Response from 12VIN
to 3.3VOUT
Transient Response from 12VIN
to 5VOUT
100
95
90
85
80
75
70
65
60
2A/DIV
2A/DIV
100mV/DIV
100mV/DIV
28V 15V
IN
OUT
OUT
OUT
32V 15V
IN
36V 15V
IN
50µs/DIV
4612 G06
50µs/DIV
LOAD STEP: 0A to 3A
4612 G05
0
1
2
3
4
5
LOAD CURRENT (A)
LOAD STEP: 0A to 3A
4612 G04
C
= 2 × 22µF CERAMIC CAPACITORS AND
C
= 2 × 22µF CERAMIC CAPACITORS AND
OUT
OUT
2 × 47µF CERAMIC CAPACITORS
2 × 47µF CERAMIC CAPACITORS
Transient Response from 24VIN
to 12VOUT
Start-Up with 24VIN to 12VOUT
at IOUT = 0A
Start-Up with 24VIN to 12VOUT at
IOUT = 5A
I
IN
2A/DIV
0.2A/DIV
I
IN
1A/DIV
200mV/
DIV
V
OUT
V
OUT
5V/DIV
5V/DIV
50µs/DIV
4612 G07
500µs/DIV
4612 G08
500µs/DIV
4612 G09
LOAD STEP: 0A to 3A
SOFT-START CAPACITOR: 3.9nF
SOFT-START CAPACITOR: 3.9nF
C
= 2 × 22µF CERAMIC CAPACITORS AND
C
= 3 × 10µF CERAMIC CAPACITORS AND
C
= 3 × 10µF CERAMIC CAPACITORS AND
OUT
IN
IN
2 × 47µF CERAMIC CAPACITORS
1 × 47µF OSCON CAPACITOR
1 × 47µF OSCON CAPACITOR
4612fc
5
For more information www.linear.com/LTM4612
LTM4612
TYPICAL PERFORMANCE CHARACTERISTICS
Start-Up with 24VIN to 12VOUT at
IOUT = 5A, TA = –55°C
Short-Circuit with 24VIN to 12VOUT
at IOUT = 0A
Short-Circuit with 24VIN to 12VOUT
at IOUT = 5A
I
IN
2A/DIV
I
IN
V
OUT
0.2A/DIV
5V/DIV
V
OUT
V
OUT
5V/DIV
5V/DIV
I
IN
1A/DIV
50µs/DIV
4612 G11
500µs/DIV
4612 G10
20µs/DIV
4612 G12
C
= 2 × 22µF CERAMIC CAPACITORS AND
SOFT-START CAPACITOR: 3.9nF
C
= 2 × 22µF CERAMIC CAPACITORS AND
OUT
OUT
2 × 47µF CERAMIC CAPACITORS
C
= 3 × 10µF CERAMIC CAPACITORS AND
2 × 47µF CERAMIC CAPACITORS
IN
1 × 47µF OSCON CAPACITOR
VIN to VOUT Step-Down Ratio
Input Ripple
Output Ripple
36
30
24
18
12
6
SEE FREQUENCY ADJUSTMENT SECTION
FOR OPERATIONS OUTSIDE THIS REGION
OPERATING REGION
WITH DEFAULT FREQUENCY
50mV/DIV
10mV/DIV
0
1µs/DIV
4612 G14
1µs/DIV
4612 G15
6
8
V
10
(V)
12
14 15
3.3
4
V
V
C
= 24V
V
V
C
= 24V
IN
OUT
OUT
OUT
IN
OUT
IN
4612 G13
= 12V AT 5A RESISTIVE LOAD
= 3 × 10µF 50V CERAMIC 1 × 100µF BULK
= 12V AT 5A RESISTIVE LOAD
= 2 × 22µF 16V CERAMIC AND
2 × 47µF 16V CERAMIC
4612fc
6
For more information www.linear.com/LTM4612
LTM4612
PIN FUNCTIONS (See Package Description for Pin Assignments)
V (Bank 1): Power Input Pins. Apply input voltage be-
FCB(PinM12):ForcedContinuousInput.Connectthispin
IN
tween these pins and PGND pins. Recommend placing
to SGND to force continuous synchronization operation at
input decoupling capacitance directly between V pins
low load, to INTV to enable discontinuous mode opera-
IN
CC
and PGND pins.
tion at low load or to a resistive divider from a secondary
output when using a secondary winding.
PGND (Bank 2): Power Ground Pins for Both Input and
Output Returns.
TRACK/SS(PinA9):OutputVoltageTrackingandSoft-Start
Pin. When the module is configured as a master output,
then a soft-start capacitor is placed on this pin to ground
to control the master ramp rate. A soft-start capacitor can
be used for soft-start turn-on as a standalone regulator.
Slave operation is performed by putting a resistor divider
from the master output to the ground, and connecting the
center point of the divider to this pin. See the Applications
Information section.
V
(Bank 3): Power Output Pins. Apply output load
OUT
betweenthesepinsandPGNDpins.Recommendplacingout-
putdecouplingcapacitancedirectlybetweenthesepinsand
GND pins (see the LTM4612 Pin Configuration below).
V (Pins B7, C7): Top FET Drain Pins. Add more capa-
D
citors between V and ground to handle the input RMS
D
current and reduce the input ripple further.
DRV (PinsC10,E11,E12):Thesepinsnormallyconnect
CC
MPGM (Pins A12, B11): Programmable Margining In-
put. A resistor from these pins to ground sets a current
that is equal to 1.18V/R. This current multiplied by 10k
will equal a value in millivolts that is a percentage of the
0.6V reference voltage. May be left open if margining is
not desired. See the Applications Information section. To
parallel LTM4612s, each requires an individual MPGM
resistor. Do not tie MPGM pins together.
to INTV for powering the internal MOSFET drivers. They
CC
can be biased up to 6V from an external supply with about
50mA capability. This improves efficiency at higher input
voltages by reducing power dissipation in the module.
INTV (Pin A7): This pin is for additional decoupling of
CC
the 5V internal regulator.
PLLIN(PinA8):ExternalClockSynchronizationInputtothe
Phase Detector. This pin is internally terminated to SGND
with a 50k resistor. Apply a clock above 2V and below
f
(Pin B12): Frequency Set Internally to ~850kHz to
SET
900kHz at 12V Output. An external resistor can be placed
from this pin to ground to increase frequency. See the
ApplicationsInformationsectionforfrequencyadjustment.
INTV . See the Applications Information section.
CC
TOP VIEW
A
B
C
V
IN
f
SET
V
D
SGND
BANK 1
MARG0
MARG1
D
E
F
G
H
J
DRV
CC
V
FB
PGOOD
SGND
NC
PGND
BANK 2
V
K
L
NC
NC
OUT
BANK 3
FCB
M
1
2 3 4 5 6 7 8 9 10 11 12
LGA PACKAGE
133-LEAD (15mm × 15mm × 2.8mm)
LTM4612 Pin Configuration
4612fc
7
For more information www.linear.com/LTM4612
LTM4612
PIN FUNCTIONS
V
(Pin F12): The Negative Input of the Error Ampli-
COMP (Pins A11, D11): Current Control Threshold and
Error Amplifier Compensation Point. The current com-
parator threshold increases with this control voltage. The
voltage ranges from 0V to 2.4V with 0.7V corresponding
to zero sense voltage (zero current).
FB
fier. Internally, this pin is connected to V
with a 100k
OUT
0.5% precision resistor. Different output voltages can be
programmed with an additional resistor between the V
FB
and SGND pins. See the Applications Information section.
MARG0 (Pin C12): LSB Logic Input for the Margining
Function. Together with the MARG1 pin, the MARG0 pin
will determine if a margin high, margin low, or no margin
state is applied. The pin has an internal pull-down resistor
of 50k. See the Applications Information section.
PGOOD (Pin G12): Output Voltage Power Good Indicator.
Open-drain logic output that is pulled to ground when the
output voltage is not within 10% of the regulation point,
after a 25µs power bad mask timer expires.
RUN (Pins A10, B9): Run Control Pins. A voltage above
1.9V will turn on the module, and below 1V will turn off
the module. A programmable UVLO function can be ac-
MARG1(PinsC11, D12):MSBLogicInputfortheMargin-
ingFunction.TogetherwiththeMARG0pin,theMARG1pin
will determine if a margin high, margin low, or no margin
stateisapplied.Thepinshaveaninternalpull-downresistor
of 50k. See the Applications Information section.
complished with a resistor from V to this pin that is has
IN
a 5.1V zener to ground. Maximum pin voltage is 5V.
NC(PinsJ12, K12, L12):NoConnectPins. Leavefloating.
SGND (Pins D9, H12): Signal Ground Pins. These pins
connect to PGND at output capacitor point.
4612fc
8
For more information www.linear.com/LTM4612
LTM4612
BLOCK DIAGRAM
> 1.9V = ON
< 1V = OFF
MAX = 5V
V
OUT
RUN
PGOOD
COMP
INPUT
FILTER
V
IN
20V TO 36V
+
5.1V
ZENER
1µF
C
C
IN
100k
V
D
INTERNAL
COMP
D
POWER CONTROL
M1
M2
SGND
2.7µH
V
OUT
12V
MARG1
MARG0
AT 4A
NOISE
CANCEL-
LATION
V
FB
10µF
50k 50k
+
f
SET
R
FB
C
OUT
5.23k
93.1k
PGND
FCB
10k
MPGM
TRACK/SS
PLLIN
C
SS
50k
4.7µF
INTV
DRV
CC
CC
Figure 1. Simplified Block Diagram
DECOUPLING REQUIREMENTS Specifications are at TA = 25°C. Use Figure 1 configuration.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
C
IN
External Input Capacitor Requirement
IN
I
= 4A
20
µF
OUT
(V = 20V to 36V, V
= 12V)
OUT
C
External Output Capacitor Requirement
(V = 20V to 36V, V = 12V)
I
= 4A
100
150
µF
OUT
OUT
IN
OUT
4612fc
9
For more information www.linear.com/LTM4612
LTM4612
OPERATION
Power Module Description
Inputfilterandnoisecancellationcircuitryreducethenoise
coupling to I/O sides, and ensure the electromagnetic
interference (EMI) meets the limits of EN55022 Class B.
The LTM4612 is a standalone nonisolated switching mode
DC/DC power supply. It can deliver 5A of DC output
current with some external input and output capacitors.
This module provides precisely regulated output voltage
Pulling the RUN pin below 1V forces the controller into
its shutdown state, turning off both M1 and M2. At light
load currents, discontinuous mode (DCM) operation can
be enabled to achieve higher efficiency compared to con-
tinuous mode (CCM) by setting FCB pin higher than 0.6V.
programmable via one external resistor from 3.3V to
DC
15V over a 5V to 36V wide input voltage. The typical
DC
application schematic is shown in Figure 18.
The LTM4612 has an integrated constant on-time current
WhentheDRV pinisconnectedtoINTV , anintegrated
CC CC
mode regulator, ultralow R
FETs with fast switching
5V linear regulator powers the internal gate drivers. If a
DS(ON)
speedandintegratedSchottkydiodes.Thetypicalswitching
frequencyis850kHzatfullloadat12Voutput.Withcurrent
mode control and internal feedback loop compensation,
the LTM4612 module has sufficient stability margins and
good transient performance under a wide range of operat-
ing conditions and with a wide range of output capacitors,
even all ceramic output capacitors.
5V external bias supply is applied on DRV pin, then an
CC
efficiencyimprovementwilloccurduetothereducedpower
loss in the internal linear regulator. This is especially true
at higher input voltages.
The MPGM, MARG0, and MARG1 pins are used to sup-
port output voltage margining, where the percentage of
margin is programmed by the MPGM pin, and the MARG0
and MARG1 select margining. The PLLIN pin provides
frequency synchronization of the device to an external
clock. The TRACK/SS pin is used for power supply track-
ing and soft-start programming.
Currentmodecontrolprovidescycle-by-cyclefastcurrent
limiting. Moreover, foldback current limiting is provided in
an overcurrent condition while V drops. Internal over-
FB
voltageandundervoltagecomparatorspulltheopen-drain
PGOOD output low if the output feedback voltage exits a
10% window around the regulation point. Furthermore,
in an overvoltage condition, internal top FET M1 is turned
off and bottom FET M2 is turned on and held on until the
overvoltage condition clears.
APPLICATIONS INFORMATION
The typical LTM4612 application circuit is shown in Figure
18. External component selection is primarily determined
by the maximum load current and output voltage. Refer
to Table 2 for specific external capacitor requirements for
a particular application.
V to V
Stepdown Ratios
IN
OUT
There are restrictions in the maximum V and V
step
IN
OUT
down ratio that can be achieved for a given input voltage.
These constraints are shown in the Typical Performance
Characteristic curve labeled “V to V
Step-Down
IN
OUT
Ratio.” Note that additional thermal derating may be ap-
plied. See the Thermal Considerations and Output Current
Derating section in this data sheet.
4612fc
10
For more information www.linear.com/LTM4612
LTM4612
APPLICATIONS INFORMATION
Output Voltage Programming and Margining
R
resistor on the MPGM pin programs the current.
PGM
Calculate V
:
OUT(MARGIN)
ThePWMcontrollerhasaninternal0.6Vreferencevoltage.
As shown in the Block Diagram, a 100k internal feedback
%VOUT
100
VOUT(MARGIN)
=
• VOUT
resistorconnectstheV
andV pinstogether. Addinga
OUT
FB
resistor, R , from the V pin to the SGND pin programs
FB
FB
Where %V
and V
is the percentage of V
OUT(MARGIN)
to be margined,
OUT
the output voltage.
OUT
is the margin quantity in volts:
100k +RFB
VOUT = 0.6V •
VOUT
1.18V
• 10k
RFB
RPGM
=
•
0.6V VOUT(MARGIN)
or equivalently,
Where R
pin to ground.
is the resistor value to place on the MPGM
PGM
100k
RFB =
VOUT
0.6V
The output margining will be margining of the value.
This is controlled by the MARG0 and MARG1 pins. See
the truth table below:
−1
Table 1. RFB Standard 1% Resistor Values vs VOUT
MARG1
LOW
MARG0
LOW
MODE
V
(V)
3.3
5
6
8
10
12
14
15
OUT
NO MARGIN
MARGIN UP
MARGIN DOWN
NO MARGIN
R
(kW) 22.1 13.7
11
8.06 6.34 5.23 4.42 4.12
FB
LOW
HIGH
LOW
The MPGM pin programs a current that when multiplied
by an internal 10k resistor sets up the 0.6V reference
offset for margining. A 1.18V reference divided by the
HIGH
HIGH
HIGH
Table 2. Output Voltage Response vs Component Matrix (Refer to Figure 20)
TYPICAL MEASURED VALUES
VENDORS
Murata
PART NUMBER
VENDORS
PART NUMBER
GRM32ER61C476KEI5L (47µF, 16V)
GRM32ER61C226KE20L (22µF, 16V)
Murata
TDK
GRM32ER71H106K (10µF, 50V)
C3225X5RIC226M (22µF, 16V)
Murata
V
(V)
C
C
C
C
V
DROOP
(mV)
PEAK-TO-
PEAK (mV)
RECOVERY
TIME (µs)
LOAD STEP
(A/µs)
R
FB
OUT
IN
IN
OUT1
OUT2
IN
(CERAMIC)
(BULK)
(CERAMIC)
2 × 22µF 16V
4 × 47µF 16V
2 × 22µF 16V
4 × 47µF 16V
2 × 22µF 16V
4 × 47µF 16V
2 × 22µF 16V
4 × 47µF 16V
2 × 22µF 16V
4 × 47µF 16V
2 × 22µF 16V
4 × 47µF 16V
2 × 22µF 16V
4 × 47µF 16V
(BULK)
150µF 25V
None
(V)
12
12
24
24
36
36
24
24
36
36
24
36
28
36
(kΩ)
13.7
13.7
13.7
13.7
13.7
13.7
6.34
6.34
6.34
6.34
5.23
5.23
4.12
4.12
5
2 × 10µF 50V 100µF 50V
2 × 10µF 50V 100µF 50V
2 × 10µF 50V 100µF 50V
2 × 10µF 50V 100µF 50V
2 × 10µF 50V 100µF 50V
2 × 10µF 50V 100µF 50V
2 × 10µF 50V 100µF 50V
2 × 10µF 50V 100µF 50V
2 × 10µF 50V 100µF 50V
2 × 10µF 50V 100µF 50V
2 × 10µF 50V 100µF 50V
2 × 10µF 50V 100µF 50V
2 × 10µF 50V 100µF 50V
2 × 10µF 50V 100µF 50V
86
156
178
166
169
178
172
209
325
197
288
281
375
338
250
26
14.8
27
3
3
3
3
3
3
3
3
3
3
3
3
3
3
5
86
5
150µF 25V
None
83
5
86
14.8
25
5
150µF 25V
None
86
5
86
15.2
30
10
10
10
10
12
12
15
15
150µF 25V
None
111
171
108
153
153
184
178
134
35
150µF 25V
None
35
39
150µF 25V
None
37
34.4
70
150µF 25V
None
70
4612fc
11
For more information www.linear.com/LTM4612
LTM4612
APPLICATIONS INFORMATION
Operating Frequency
For output voltages more than 12V, the frequency can be
higherthan1MHz,thusreducingtheefficiencysignificantly.
Additionally, the 500ns minimum off time (400ns + 100ns
for margin) normally limits the operation when the input
voltage is close to the output voltage. Therefore, it is rec-
ommended to lower the frequency in these conditions by
The operating frequency of the LTM4612 is optimized to
achieve the compact package size and the minimum
output ripple voltage while still providing high efficiency.
As shown in Figure 2, the frequency is linearly increased
with larger output voltages to keep the low output cur-
rent ripple. Figure 3 shows the inductor current ripple DI
with different output voltages. In most applications, no
additional frequency adjusting is required.
connecting a resistor (R ) from the f pin to V , as
fSET
SET
IN
shown in Figure 20.
VOUT
f =
⎛
⎜
⎝
⎞
⎟
⎠
3 •RfSET • 93.1k
5 • 10−11
If lower output ripple is required, the operating frequency
R
− 2 • 93.1k
f can be increased by adding a resistor R
pin and SGND, as shown in Figure 19.
between f
fSET
fSET
SET
Theloadcurrentcanaffectthefrequencyduetoitsconstant
on-time control. If constant frequency is a necessity, the
PLLIN pin can be used to synchronize the frequency of
the LTM4612 to an external clock, as shown in Figures
21 to 23.
VOUT
f =
1.5 • 10−10
R
|| 93.1k
fSET
(
)
1200
1000
800
3.5
3.0
V
= 36V
IN
2.5
2.0
1.5
1.0
0.5
V
IN
= 28V
V
= 20V
600
IN
400
200
2
10
14
16
4
6
8
12
6
8
10
12
14
16
2
4
V
(V)
V
(V)
OUT
OUT
4612 F03
4612 F02
Figure 2. Operating Frequency vs Output Voltage
Figure 3. Inductor Current Ripple vs Output Voltage
4612fc
12
For more information www.linear.com/LTM4612
LTM4612
APPLICATIONS INFORMATION
Input Capacitors
Toattenuatethehighfrequencynoise,extrainputcapacitors
should be connected to the V pads and placed before the
IN
LTM4612isdesignedtoachievethelowinputradiatedEMI
noise due to the fast switching of turn-on and turn-off.
In the LTM4612, a high-frequency inductor is integrated
high frequency inductor to form the π filter. One of these
low ESR ceramic input capacitors is recommended to be
close to the connection into the system board. A large
bulk 100µF capacitor is only needed if the input source
impedance is compromised by long inductive leads or
traces. Figure 4 shows the radiated EMI test results to
meet the EN55022 Class B limit. For different applica-
tions, input capacitance may be varied to meet different
radiated EMI limits.
into the input line for noise attenuation. V and V pins
D
IN
are available for external input capacitors to form a high
frequency π filter. As shown in Figure 18, the ceramic
capacitor C1 on the V pins is used to handle most of
D
the RMS current into the converter, so careful attention
is needed for capacitor C1 selection.
For a buck converter, the switching duty cycle can be
estimated as:
70
60
50
VOUT
D =
V
IN
40
30
20
10
0
Without considering the inductor current ripple, the RMS
current of the input capacitor can be estimated as:
IOUT(MAX)
ICIN(RMS)
=
• D • 1– D
(
)
h
–10
In this equation, h is the estimated efficiency of the
power module. Note the capacitor ripple current ratings
are often based on temperature and hours of life. This
makes it advisable to properly derate the input capacitor,
or choose a capacitor rated at a higher temperature than
required. Always contact the capacitor manufacturer for
derating requirements.
30
226.2 422.4 618.6 814.8
128.1 324.3 520.5 716.7 912.9
FREQUENCY (MHz)
1010
4612 F04
Figure 4. Radiated Emission Scan with 24VIN to
5VOUT at 5A (2 10µF Ceramic Capacitors on VIN
Pads and 1 10µF Ceramic Capacitor on VD Pads)
×
×
In a typical 5A output application, one very low ESR, X5R
or X7R, 10µF ceramic capacitor is recommended for C1.
This decoupling capacitor should be placed directly adja-
cent to the module V pins in the PCB layout to minimize
D
the trace inductance and high frequency AC noise. Each
10µF ceramic is typically good for 2A to 3A of RMS ripple
current. Refer to your ceramics capacitor catalog for the
RMS current ratings.
4612fc
13
For more information www.linear.com/LTM4612
LTM4612
APPLICATIONS INFORMATION
1.00
0.95
0.90
0.85
0.80
0.75
0.70
0.65
0.60
0.55
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
1-PHASE
2-PHASE
3-PHASE
4-PHASE
6-PHASE
0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9
DUTY CYCLE (V /V
)
IN
4612 F05
O
Figure 5. Normalized Output Ripple Current vs Duty Cycle, Dlr = VOT/LI
Output Capacitors
cycle. Figure 5 provides a ratio of peak-to-peak output
ripple current to the inductor ripple current as functions
of duty cycle and the number of paralleled phases. Pick
the corresponding duty cycle and the number of phases
to get the correct output ripple current value. For example,
each phase’s inductor ripple current DIr at zero duty cycle
is ~4.3A for a 36V to 12V design. The duty cycle is about
0.33. The 2-phase curve has a ratio of ~0.33 for a duty
cycle of 0.33. This 0.33 ratio of output ripple current to
the inductor ripple current DIr at 4.3A equals 1.4A of the
The LTM4612 is designed for low output voltage ripple.
The bulk output capacitors defined as C
with low enough effective series resistance (ESR) to meet
theoutputvoltagerippleandtransientrequirements. C
can be low ESR tantalum capacitor, low ESR polymer
capacitor or ceramic capacitor. The typical capacitance is
150µF if all ceramic output capacitors are used. Additional
output filtering may be required by the system designer,
if further reduction of output ripple or dynamic transient
spikeisrequired.Table2showsamatrixofdifferentoutput
voltages and output capacitors to minimize the voltage
droop and overshoot during a 2A/µs transient. The table
optimizes total equivalent ESR and total bulk capacitance
to maximize transient performance.
are chosen
OUT
OUT
output ripple current (DI ).
L
The output voltage ripple has two components that are
related to the amount of bulk capacitance and effective
series resistance (ESR) of the output bulk capacitance.
The equation is:
⎛
⎜
⎝
⎞
⎟
⎠
Multiphase operation with multiple LTM4612 devices in
parallel will also lower the effective output ripple current
due to the phase interleaving operation. Refer to Figure 5
for the normalized output ripple current versus the duty
DIL
8 • f •N • C
DVOUT(P-P)
≈
+ESR • DI
L
OUT
where f is the frequency and N is the number of paralleled
phases.
4612fc
14
For more information www.linear.com/LTM4612
LTM4612
APPLICATIONS INFORMATION
Fault Conditions: Current Limit and
Overcurrent Foldback
Output Voltage Tracking
Output voltage tracking can be programmed externally
usingtheTRACK/SSpin. Theoutputcanbetrackedupand
down with another regulator. Figure 6 shows an example
of coincident tracking where the master regulator’s output
is divided down with an external resistor divider that is the
sameastheslaveregulator’sfeedbackdivider.Ratiometric
modes of tracking can be achieved by selecting different
resistor values to change the output tracking ratio. The
master output must be greater than the slave output for
the tracking to work. Figure 7 shows the coincident output
tracking.
LTM4612 has a current mode controller, which inherently
limitsthecycle-by-cycleinductorcurrentnotonlyinsteady
state operation, but also in transient.
To further limit current in the event of an overload condi-
tion,theLTM4612providesfoldbackcurrentlimiting.Ifthe
output voltage falls by more than 50%, then the maximum
output current is progressively lowered to about one sixth
of its full current limit value.
Soft-Start and Tracking
Tracking can be achieved by a few simple calculations
and the slew rate value applied to the master’s TRACK
pin. The TRACK pin has a control range from 0 to 0.6V.
The master’s TRACK pin slew rate is directly equal to the
master’s output slew rate in Volts/Time. The equation:
The TRACK/SS pin provides a means to either soft-start
the regulator or track it to a different power supply. A
capacitor on this pin will program the ramp rate of the
output voltage. A 1.5µA current source will charge up the
external soft-start capacitor to 80% of the 0.6V internal
voltage reference plus or minus any margin delta. This will
control the ramp of the internal reference and the output
voltage. The total soft-start time can be calculated as:
MR
• 100k = R2
SR
where MR is the master’s output slew rate and SR is the
slave’s output slew rate in Volts/Time. When coincident
tracking is desired, then MR and SR are equal, thus R2 is
equal the 100k. R1 is derived from equation:
CSS
1.5µA
tSOFTSTART ≅ 0.8 • 0.6± 0.6 • V Margin % •
(
)
OUT
If the RUN pin falls below 2.5V, then the soft-start pin
is reset to allow for the proper soft-start again. Current
foldback and force continuous mode are disabled during
the soft-start process. The soft-start function can also
be used to control the output ramp rising time, so that
another regulator can be easily tracked.
0.6V
R1=
VTRACK
R2
V
V
FB
FB
+
−
100k RFB
V
IN
10µF
100k
V
V
PLLIN
D
IN
SLAVE
MASTER OUTPUT
SLAVE OUTPUT
PGOOD
V
OUT
OUTPUT
RUN
V
FB
C
OUT
C
IN
COMP
FCB
MARG0
MARG1
MPGM
LTM4612
OUTPUT
VOLTAGE
INTV
CC
CC
MASTER
OUTPUT
DRV
R2
f
SET
100k
TRACK
CONTROL
R
FB
TRACK/SS
SGND PGND
5.23k
R1
5.23k
4612 F06
4612 F07
TIME
Figure 6. Coincident Tracking
Figure 7. Coincident Output Tracking
4612fc
15
For more information www.linear.com/LTM4612
LTM4612
APPLICATIONS INFORMATION
where V is the feedback voltage reference of the regula-
COMP Pin
FB
tor, and V
is 0.6V. Since R2 is equal to the 100k top
TRACK
The pin is the external compensation pin. The module has
already been internally compensated for most output volt-
ages. LTpowerCAD™ from Linear Technology is available
for more control loop optimization.
feedback resistor of the slave regulator in equal slew rate
or coincident tracking, then R1 is equal to R with V
TRACK
=
FB
FB
V
. Therefore R2 = 100k, and R1 = 5.23k in Figure 6.
Inratiometrictracking, adifferentslewratemaybedesired
for the slave regulator. R2 can be solved for when SR is
slower than MR. Make sure that the slave supply slew
rate is chosen to be fast enough so that the slave output
voltage will reach it final value before the master output.
FCB Pin
The FCB pin determines whether the bottom MOSFET re-
mains on when current reverses in the inductor. Tying this
pinaboveits0.6Vthresholdenablesdiscontinuousoperation
where the bottom MOSFET turns off when inductor current
reverses. FCB pin below the 0.6V threshold forces continu-
ous synchronous operation, allowing current to reverse
at light loads and maintaining high frequency operation.
For example, MR = 1.5V/1ms, and SR = 1.2V/1ms. Then
R2 = 125k. Solve for R1 to equal to 5.18k.
Each of the TRACK pins will have the 1.5µA current source
on when a resistive divider is used to implement tracking
on that specific channel. This will impose an offset on the
TRACK pin input. Smaller values resistors with the same
ratios as the resistor values calculated from the above
equation can be used. For example, where the 100k is
used then a 10k can be used to reduce the TRACK pin
offset to a negligible value.
PLLIN Pin
The power module has a phase-locked loop comprised
of an internal voltage controlled oscillator and a phase
detector. This allows the internal top MOSFET turn-on
to be locked to the rising edge of the external clock.
The frequency range is 30% around the set operating
frequency. A pulse detection circuit is used to detect a
clock on the PLLIN pin to turn on the phase-locked loop.
The pulse width of the clock has to be at least 400ns. The
clock high level must be greater than 1.7V and clock low
level below 0.3V. During the start-up of the regulator, the
phase-locked loop function is disabled.
RUN Enable
The RUN pin is used to enable the power module. The
pin has an internal 5.1V Zener to ground. The pin can be
driven with 5V logic levels.
The RUN pin can also be used as an undervoltage lockout
(UVLO) function by connecting a resistor divider from
the input supply to the RUN pin. The equation for UVLO
threshold:
INTV and DRV Connection
CC
CC
An internal low dropout regulator produces an internal
5V supply that powers the control circuitry and DRV
for driving the internal power MOSFETs. Therefore, if
the system does not have a 5V power rail, the LTM4612
can be directly powered by V . The gate driver current
through the LDO is about 20mA. The internal LDO power
dissipation can be calculated as:
CC
RA +RB
VUVLO
=
• 1.5V
RB
IN
where R is the top resistor, and R is the bottom resistor.
A
B
Power Good
P
= 20mA • (V – 5V)
IN
LDO_LOSS
The PGOOD pin is an open-drain pin that can be used to
monitor valid output voltage regulation. This pin monitors
a 10% window around the regulation point, and tracks
with margining.
TheLTM4612alsoprovidestheexternalgatedrivervoltage
pin DRV . If there is a 5V rail in the system, it is recom-
CC
mended to connect the DRV pin to the external 5V rail.
CC
This is especially true for higher input voltages. Do not
apply more than 6V to the DRV pin.
CC
4612fc
16
For more information www.linear.com/LTM4612
LTM4612
APPLICATIONS INFORMATION
Parallel Operation
Thermal Considerations and Output Current Derating
The LTM4612 device is an inherently current mode con-
trolled device. This allows the paralleled modules to have
very good current sharing and balanced thermal on the
design.Figure21showsaschematicoftheparalleldesign.
The voltage feedback equation changes with the variable
N as modules are paralleled. The equation:
In different applications, LTM4612 operates in a variety
of thermal environments. The maximum output current is
limited by the environment thermal condition. Sufficient
cooling should be provided to help ensure reliable opera-
tion. When the cooling is limited, proper output current
derating is necessary, considering ambient temperature,
airflow, input/output condition, and the needfor increased
reliability.
100k
N
RFB
=
VOUT
0.6V
The power loss curves in Figures 9 and 10 can be used
in coordination with the load current derating curves in
−1
Figures 11 to 16 for calculating an approximate θ for
JA
N is the number of paralleled modules.
the module. Graph designation delineates between no
heat sink, and a BGA heat sink. Each of the load current
derating curves will lower the maximum load current as a
function of the increased ambient temperature to keep the
maximum junction temperature of the power module at
125°C maximum. This will maintain the maximum operat-
ing temperature below 125°C. Each of the derating curves
and the power loss curve that corresponds to the correct
output voltage can be used to solve for the approximate
Radiated EMI Noise
High radiated EMI noise is a disadvantage for switching
regulators by nature. Fast switching turn-on and turn-off
make the large di/dt change in the converters, which act
as the radiation sources in most systems. LTM4612 inte-
grates the feature to minimize the radiated EMI noise to
meet the most applications with low noise requirements.
An optimized gate driver for the MOSFET and a noise
cancellation network are installed inside the LTM4612
to achieve the low radiated EMI noise. Figure 8 shows a
typical example for the LTM4612 to meet the Class B of
EN55022 radiated emission limit.
θ of the condition. Each figure has three curves that are
JA
taken at three different air flow conditions. Each of the
derating curves in Figures 11 to 16 can be used with the
appropriate power loss curve in either Figure 9 or Figure
10 to derive an approximate θ . Table 3 provides the ap-
JA
proximateθ forFigures11to16.Acompleteexplanation
JA
70
60
50
of the thermal characteristics is provided in the thermal
application note, AN110.
40
30
20
10
0
–10
30
226.2 422.4 618.6 814.8
128.1 324.3 520.5 716.7 912.9
FREQUENCY (MHz)
1010
4612 F08
Figure 8. Radiated Emission Scan with 24VIN to
5VOUT at 5A Measured in 10 Meter Chamber
4612fc
17
For more information www.linear.com/LTM4612
LTM4612
APPLICATIONS INFORMATION
6
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
6
200
LFM
5
4
3
2
1
0
5
4
3
2
1
0
36V TO 15V
IN
OUT
0LFM
400LFM
36V TO 5V
IN
OUT
24V TO 12V
IN
OUT
2
3
4
5
0
1
25 35
55 65 75 85 95 105
45
AMBIENT TEMPERATURE (°C)
2
3
4
5
0
1
LOAD CURRENT (A)
LOAD CURRENT (A)
4612 F09
4612 F10
4612 F11
Figure 9. Power Loss at
12VOUT and 15VOUT
Figure 10. Power Loss at 5VOUT
Figure 11. No Heat Sink
with 36VIN to 5VOUT
5.0
5.0
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
200
200
200
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
LFM
LFM
LFM
0LFM
400LFM
0LFM
400LFM
0LFM
400LFM
25 35
55 65 75 85 95 105
AMBIENT TEMPERATURE (°C)
25 35
55 65 75 85 95 105
AMBIENT TEMPERATURE (°C)
25 35
55 65 75 85 95 105
AMBIENT TEMPERATURE (°C)
45
45
45
4612 F12
4612 F13
4612 F14
Figure 12. BGA Heat Sink
with 36VIN to 5VOUT
Figure 13. No Heat Sink
with 24VIN to 12VOUT
Figure 14. BGA Heat Sink
with 24VIN to 12VOUT
5.0
4.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
4.0
0LFM
200LFM
400LFM
0LFM
200LFM
400LFM
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
25
35
45
55
65
75
85
95
25
35
45
55
65
75
85
95
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
4612 F15
4612 F16
Figure 15. No Heat Sink
with 36VIN to 15VOUT
Figure 16. BGA Heat Sink
with 36VIN to 15VOUT
4612fc
18
For more information www.linear.com/LTM4612
LTM4612
APPLICATIONS INFORMATION
Table 3. 12V and 15V Outputs
DERATING CURVE
Figures 11, 13, 15
Figures 11, 13, 15
Figures 11, 13, 15
Figures 12, 14, 16
Figures 12, 14, 16
Figures 12, 14, 16
V
(V)
POWER LOSS CURVE
Figure 9
AIR FLOW (LFM)
HEAT SINK
None
θ
JA
(°C/W)
13
IN
24, 36
24, 36
24, 36
24, 36
24, 36
24, 36
0
Figure 9
200
400
0
None
9.3
Figure 9
None
8.3
Figure 9
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
12.2
8.6
Figure 9
200
400
Figure 9
7.7
Table 4. 5V Output
DERATING CURVE
Figure 11
V
(V)
POWER LOSS CURVE
Figure 10
AIR FLOW (LFM)
HEAT SINK
None
θ
(°C/W)
JA
IN
36
0
14.9
11.1
10
Figure 11
36
36
36
36
36
Figure 10
200
400
0
None
Figure 11
Figure 10
None
Figure 12
Figure 10
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
14
Figure 12
Figure 10
200
400
10.4
9.3
Figure 12
Figure 10
Heat Sink Manufacturer
Wakefield Engineering
Part No: LTN20069
Phone: 603-635-2800
4612fc
19
For more information www.linear.com/LTM4612
LTM4612
APPLICATIONS INFORMATION
Safety Considerations
• Place a dedicated power ground layer underneath the
unit.
The LTM4612 modules do not provide isolation from V
IN
• UseroundcornersforthePCBcopperlayertominimize
the radiated noise.
to V . There is no internal fuse. If required, a slow blow
OUT
fuse with a rating twice the maximum input current needs
to be provided to protect each unit from catastrophic
failure.
• To minimize the EMI noise and reduce module thermal
stress, use multiple vias for interconnection between
top layer and other power layers.
Layout Checklist/Example
• Do not put vias directly on pads.
The high integration of LTM4612 makes the PCB board
layout very simple and easy. However, to optimize its
electrical and thermal performance, some layout consid-
erations are still necessary.
• If vias are placed onto the pads, the the vias must be
capped.
• Interstitialvia placementcan also beused ifnecessary.
• Use large PCB copper areas for high current path, in-
• Use a separated SGND ground copper area for com-
ponents connected to signal pins. Connect the SGND
to PGND underneath the unit.
cluding V , PGND and V . It helps to minimize the
IN
OUT
PCB conduction loss and thermal stress.
• Place high frequency ceramic input and output capaci-
• Place one or more high frequency ceramic capacitors
close to the connection into the system board.
tors next to the V , PGND and V
pins to minimize
D
OUT
high frequency noise.
Figure 17 gives a good example of the recommended
layout.
V
IN
C
IN
C
IN
GND
SIGNAL
GND
C
C
OUT
OUT
V
OUT
4612 F17
Figure 17. Recommended PCB Layout
4612fc
20
For more information www.linear.com/LTM4612
LTM4612
APPLICATIONS INFORMATION
PULL-UP SUPPLY ≤ 5V
CLOCK SYNC
V
IN
22V TO 36V
C1
10µF
50V
R4
100k
R3
100k
R5
2M
V
V
IN
PLLIN
D
V
12V
5A
OUT
V
OUT
PGOOD
RUN
COMP
C3
C
22µF
16V
C
OUT2
220µF
16V
LTM4612
OUT1
22pF
+
ON/OFF
V
FB
R
FB
5.23k
INTV
CC
CC
FCB
DRV
MARG0
MARG1
MPGM
f
MARGIN
SET
C
IN
CONTROL
TRACK/SS
REFER TO TABLE 2
10µF
50V CERAMIC
C4
0.01µF
SGND PGND
R1
392k
5% MARGIN
4612 F18
Figure 18. Typical 22V to 36VIN, 12V at 5A Design
PULL-UP SUPPLY ≤ 5V
CLOCK SYNC
V
IN
5V TO 36V
C1
10µF
50V
R4
100k
R3
100k
V
D
V
PLLIN
IN
V
3.3V
5A
OUT
V
OUT
PGOOD
RUN
C3
C
22µF
6.3V
C
OUT1
OUT2
22pF
+
220µF
6.3V
ON/OFF
V
COMP
INTV
CC
FB
C
IN
LTM4612
R
FB
22.1k
10µF
50V CERAMIC
FCB
DRV
CC
EXTERNAL 5V SUPPLY
IMPROVES EFFICIENCY—
ESPECIALLY FOR HIGH
INPUT VOLTAGES
REFER TO TABLE 2
MARG0
MARG1
MPGM
f
MARGIN
SET
CONTROL
TRACK/SS
R
191k
1%
fSET
SGND PGND
R1
392k
5% MARGIN
C4
0.01µF
4612 F19
Figure 19. Typical 5V to 36VIN, 3.3V at 5A Design with 400kHz Frequency
4612fc
21
For more information www.linear.com/LTM4612
LTM4612
APPLICATIONS INFORMATION
PULL-UP SUPPLY ≤ 5V
CLOCK SYNC
V
IN
26V TO 36V
C1
10µF
50V
R4
100k
R3
100k
V
D
V
PLLIN
IN
V
15V
4A
OUT
V
OUT
PGOOD
RUN
COMP
C3
C
22µF
16V
C
OUT2
220µF
16V
LTM4612
OUT1
22pF
+
ON/OFF
V
FB
R
FB
4.12k
INTV
DRV
CC
CC
R
fSET
FCB
806k, 1%
MARG0
MARG1
MPGM
f
MARGIN
SET
CONTROL
TRACK/SS
C
IN
10µF
SGND PGND
R1
392k
5% MARGIN
50V
CERAMIC
C4
0.01µF
4612 F20
Figure 20. 26V to 36VIN, 15V at 4A Design with Reduced Frequency
PULL-UP SUPPLY ≤ 5V
V
IN
20V TO 36V
C1
10µF
50V
CLOCK SYNC
0° PHASE
R2
100k
R4
100k
V
OUT
V
V
PLLIN
V
OUT
D
IN
12V, 10A
PGOOD
RUN
COMP
INTV
DRV
C6
47pF
LTM4612
C3
22µF
16V
+
C4
220µF
16V
V
FB
FCB
CC
CC
C2
10µF
50V
f
MARG0
MARG1
MPGM
MARGIN
CONTROL
SET
TRACK/SS
C5
100µF
50V
+
C7
0.33µF
R1
392k
R
FB
2.61k
SGND PGND
2-PHASE
OSCILLATOR
+
5% MARGIN
V
OUT1
100k/N
GND OUT2
SET MOD
C11
0.1µF
R5
124k
R
FB
=
V
OUT
– 1
0.6V
C11
10µF
50V
LTC6908-1
CLOCK SYNC
180° PHASE
V
D
V
IN
PLLIN
V
OUT
PGOOD
RUN
LTM4612
C9
22µF
16V
C10
220µF
16V
+
V
FCB
COMP
INTV
CC
FB
C8
10µF
50V
MARG0
MARG1
MPGM
DRV
CC
f
SET
TRACK/SS
R6
392k
SGND PGND
4612 F21
Figure 21. 2-Phase, Parallel 12V at 10A Design
4612fc
22
For more information www.linear.com/LTM4612
LTM4612
APPLICATIONS INFORMATION
PULL-UP SUPPLY ≤ 5V
V
IN
22V TO 36V
C1
10µF
50V
CLOCK SYNC
0° PHASE
R4
100k
R2
100k
V
V
IN
PLLIN
D
12V AT 5A
C3
PGOOD
RUN
COMP
V
OUT
C6
22pF
LTM4612
C4
+
22µF
220µF
16V
V
FB
FCB
16V
INTV
CC
CC
DRV
C2
10µF
50V
f
MARG0
MARG1
MPGM
MARGIN
SET
CONTROL
TRACK/SS
C5
100µF
50V
+
R1
392k
R
FB1
5.23k
C7
0.15µF
SGND PGND
2-PHASE
OSCILLATOR
+
5% MARGIN
PULL-UP SUPPLY ≤ 5V
V
OUT1
GND OUT2
SET MOD
C11
0.1µF
R5
118k
C11
10µF
50V
LTC6908-1
CLOCK SYNC
180° PHASE
R7
100k
R3
100k
V
D
V
IN
PLLIN
10V AT 5A
V
OUT
PGOOD
RUN
C1
22pF
C9
LTM4612
C10
+
22µF
220µF
16V
V
FB
COMP
16V
FCB
INTV
CC
12V TRACK
MARG0
MARG1
MPGM
MARGIN
DRV
R8
CC
C8
10µF
50V
CONTROL
100k
f
SET
TRACK/SS
R6
392k
R
R9
6.34k
FB2
SGND PGND
6.34k
4612 F22
Figure 22. 2-Phase, 12V and 10V at 5A Design
4612fc
23
For more information www.linear.com/LTM4612
LTM4612
APPLICATIONS INFORMATION
5V
V
IN
7V TO 36V
C1
CLOCK SYNC
0° PHASE
10µF
50V
R4
100k
R2
100k
V
D
V
IN
PLLIN
OUT
5V AT 5A
V
PGOOD
RUN
C6
22pF
LTM4612
C3
22µF
6.3V
C4
220µF
6.3V
+
V
FB
COMP
INTV
CC
C2
FCB
10µF
50V
DRV
CC
MARG0
MARG1
MPGM
f
MARGIN
SET
CONTROL
TRACK/SS
C5
100µF
50V
+
R
fSET1
150k
R1
392k
R
FB1
13.7k
C7
0.15µF
SGND PGND
2-PHASE
OSCILLATOR
+
5% MARGIN
3.3V
V
OUT1
GND OUT2
SET MOD
C11
0.1µF
R5
200k
C11
10µF
50V
CLOCK SYNC
180° PHASE
LTC6908-1
R7
100k
R3
100k
V
D
V
PLLIN
IN
3.3V AT 5A
V
OUT
PGOOD
RUN
C1
22pF
C9
22µF
6.3V
C10
220µF
6.3V
+
V
FB
COMP
LTM4612
FCB
INTV
CC
5V TRACK
MARG0
MARG1
MPGM
MARGIN
DRV
R8
CC
C8
10µF
50V
CONTROL
100k
f
SET
TRACK/SS
R6
392k
R
R9
R
fSET2
FB2
SGND PGND
22.1k
22.1k 100k
4612 F23
Figure 23. 2-Phase, 5V and 3.3V at 5A Design with 500kHz Frequency
4612fc
24
For more information www.linear.com/LTM4612
LTM4612
PACKAGE DESCRIPTION
Pin Assignment Tables
(Arranged by Pin Function)
PIN NAME
PIN NAME
PGND
PIN NAME
PIN NAME
A1
A2
A3
A4
A5
A6
V
IN
V
IN
V
IN
V
IN
V
IN
V
IN
D1
D2
D3
D4
D5
D6
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
A7
INTV
CC
PLLIN
PGND
PGND
PGND
PGND
PGND
A8
A9
TRACK/SS
RUN
A10
A11
A12
COMP
MPGM
B1
B2
B3
B4
B5
B6
V
V
V
V
V
V
E1
E2
E3
E4
E5
E6
E7
E8
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
B7
V
-
IN
IN
IN
IN
IN
IN
D
B8
B9
RUN
-
B10
B11
B12
MPGM
K1
K2
K3
K4
K5
K6
K7
K8
K9
K10
K11
V
V
V
V
V
V
V
V
V
V
V
f
SET
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
C1
C2
C3
C4
C5
C6
V
V
V
V
V
V
C7
V
-
IN
IN
IN
IN
IN
IN
D
C8
F1
F2
F3
F4
F5
F6
F7
F8
F9
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
C9
-
C10
C11
C12
DRV
CC
MARG1
MARG0
D7
-
-
D8
D9
SGND
-
D10
D11
D12
L1
L2
L3
L4
L5
L6
L7
L8
L9
L10
L11
V
V
V
V
V
V
V
V
V
V
V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
COMP
MARG1
G1
G2
G3
G4
G5
G6
G7
G8
G9
G10
G11
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
E9
-
-
E10
E11
E12
DRV
DRV
CC
CC
F10
F11
F12
-
-
V
FB
G12
H12
J12
K12
L12
M12
PGOOD
SGND
NC
M1
M2
M3
M4
M5
M6
M7
M8
M9
M10
M11
V
V
V
V
V
V
V
V
V
V
V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
H1
H2
H3
H4
H5
H6
H7
H8
H9
H10
H11
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
NC
NC
FCB
4612fc
25
For more information www.linear.com/LTM4612
LTM4612
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTM4612#packaging for the most recent package drawings.
Z
b b b
Z
6 . 9 8 5 0
5 . 7 1 5 0
4 . 4 4 5 0
3 . 1 7 5 0
1 . 9 0 5 0
0 . 6 3 5 0
0 . 0 0 0 0
0 . 6 3 5 0
1 . 9 0 5 0
3 . 1 7 5 0
4 . 4 4 5 0
5 . 7 1 5 0
6 . 9 8 5 0
4612fc
26
For more information www.linear.com/LTM4612
LTM4612
REVISION HISTORY
REV
DATE
DESCRIPTION
PAGE NUMBER
A
03/10 Changes to Title and Description
Changes to Absolute Maximum Ratings
1
1
Changes to Electrical Characteristics
2, 3
Text Changes to Operation Section
10
Text Changes to Applications Information Section
Changes to Figures 18, 19, 20, 21, 22
12, 14
19, 20, 21, 22
Changes to Related Parts
26
B
05/11 Changes to the Title, Description, Features and Typical Application sections.
1
Changes to “The
l
denotes...” statement and Note 2.
2, 3, 4
Changes to the Pin Functions.
7, 8
Changes to the Block Diagram.
9
Text changes to the Operation section.
Text changes to the Applications Information section.
Changes to Figures 17, 19, 21, 22.
Changes to the Related Parts.
10
10–20
20, 21, 22, 23
28
3
C
09/16 Changed Max value of V
from 5.3V to 5.5V
INTVCC
4612fc
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
27
LTM4612
PACKAGE PHOTOGRAPH
15mm
2.8mm
15mm
4612 F24
DESIGN RESOURCES
SUBJECT
DESCRIPTION
Design:
• Selector Guides
µModule Design and Manufacturing Resources
Manufacturing:
• Quick Start Guide
• PCB Design, Assembly and Manufacturing Guidelines
• Package and Board Level Reliability
• Demo Boards and Gerber Files
• Free Simulation Tools
µModule Regulator Products Search
1. Sort table of products by parameters and download the result as a spread sheet.
2. Search using the Quick Power Search parametric table.
TechClip Videos
Quick videos detailing how to bench test electrical and thermal performance of µModule products.
Digital Power System Management
Linear Technology’s family of digital power supply management ICs are highly integrated solutions that
offer essential functions, including power supply monitoring, supervision, margining and sequencing,
and feature EEPROM for storing user configurations and fault logging.
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTM4606
EN55022B Compliant 6A, DC/DC µModule
Regulator
EN55022B Compliant with PLL, Output Tracking and Margining,
LTM4612 Pin Compatible
LTM4613
EN55022B Compliant 36V, 8A, Step-Down µModule 5V ≤ V ≤ 36V, 3.3V ≤ V
≤ 15V, 15mm × 15mm × 4.3mm LGA Package
IN
OUT
Regulator with PLL, Output Tracking
LTM4601/LTM4601A 12A DC/DC µModule Regulator with PLL, Output
Tracking/Margining and Remote Sensing
Synchronizable, PolyPhase Operation, LTM4601-1/LTM4601A-1 Version Has
No Remote Sensing, LGA Package
LTM4604A
LTM4608A
Low V 4A DC/DC µModule Regulator
2.375V ≤ V ≤ 5.5V, 0.8V ≤ V
≤ 5V, 9mm × 15mm × 2.3mm LGA Package
IN
IN
OUT
Low V 8A DC/DC µModule Regulator
2.7V ≤ V ≤ 5.5V, 0.6V ≤ V
≤ 5V, 9mm × 15mm × 2.8mm LGA Package
OUT
IN
IN
LTM8022/LTM8023 36V , 1A and 2A DC/DC µModule Regulator
Pin Compatible, 4.5V ≤ V ≤ 36V; 9mm × 11.25mm × 2.8mm LGA Package
IN
IN
LTM4627
LTM4618
20V , 15A DC/DC Step-Down µModule Regulator
4.5V ≤ V ≤ 20V, 0.6V ≤ V
≤ 5V, 15mm × 15mm × 4.3mm LGA Package
OUT
IN
IN
26V , 6A DC/DC Step-Down µModule Regulator
4.5V ≤ V ≤ 26.5V, 0.8V ≤ V
≤ 5V, Synchronizable,
IN
IN
OUT
with PLL, Output Tracking
9mm × 15mm × 4.3mm LGA Package
LTM8033
EN55022B Compliant 36V , 3A DC/DC Step-Down 3.6V ≤ V ≤ 36V, 0.8V ≤ V
OUT
≤ 24V, Synchronizable,
IN
IN
µModule Regulator
11.25mm × 15mm × 4.3mm LGA Package
4612fc
LT 0916 REV C • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
28
(408)432-1900 FAX: (408) 434-0507 www.linear.com/LTM4612
●
●
LINEAR TECHNOLOGY CORPORATION 2008
相关型号：
LTM4612IV#PBF
LTM4612 - Ultralow Noise 36VIN, 15VOUT, 5A, DC/DC µModule (Power Module) Regulator; Package: LGA; Pins: 133; Temperature Range: -40°C to 85°C
Linear
LTM4613
符合 EN55022B 規格的36VIN、15VOUT、8A、DC/DC μModule 穩壓器,LTM®4613 是一款完整、超低噪聲、8A 開關模式 DC/DC電源。
Linear
LTM4613EV#PBF
LTM4613 - EN55022B Compliant 36VIN, 15VOUT, 8A, DC/DC µModule (Power Module) Regulator; Package: LGA; Pins: 133; Temperature Range: -40°C to 85°C
Linear
LTM4613IV#PBF
LTM4613 - EN55022B Compliant 36VIN, 15VOUT, 8A, DC/DC µModule (Power Module) Regulator; Package: LGA; Pins: 133; Temperature Range: -40°C to 85°C
Linear
LTM4613IY
LTM4613 - EN55022B Compliant 36VIN, 15VOUT, 8A, DC/DC µModule (Power Module) Regulator; Package: BGA; Pins: 133; Temperature Range: -40°C to 85°C
Linear
©2020 ICPDF网 联系我们和版权申明