LTM4614 [Linear]
Dual 4A per Channel Low VIN DC/DC μModule Regulator; 每通道低输入电压DC / DCμModule稳压器双4A型号: | LTM4614 |
厂家: | Linear |
描述: | Dual 4A per Channel Low VIN DC/DC μModule Regulator |
文件: | 总20页 (文件大小:347K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LTM4614
Dual 4A per Channel
Low V DC/DC
IN
µModule Regulator
FEATURES
DESCRIPTION
The LTM®4614 is a complete 4A dual output switching
mode DC/DC power supply. Included in the package are
the switching controllers, power FETs, inductors and all
support components. The dual 4A DC/DC converters
operate over an input voltage range of 2.375V to 5.5V.
TheLTM4614supportsoutputvoltagesrangingfrom0.8V
to 5V. The regulator output voltages are set by a single
resistor for each output. Only bulk input and output ca-
pacitors are needed to complete the design.
n
Dual 4A Output Power Supply
n
Input Voltage Range: 2.375V to 5.5V
n
4A DC Typical, 5A Peak Output Current Each
n
0.8V Up to 5V Output Each, Parallelable
n
2% Total DC Output Error (0°C ≤ T ≤ 125°C)
J
n
n
n
n
n
n
Output Voltage Tracking
Up to 95% Efficiency
Programmable Soft-Start
Short-Circuit and Overtemperature Protection
Power Good Indicators
The low profile package (2.82mm) enables utilization of
unused space on the bottom of PC boards for high density
point of load regulation.
Small and Very Low Profile Package:
15mm × 15mm × 2.82mm
Additional features include overvoltage protection, foldback
overcurrentprotection,thermalshutdownandprogrammable
soft-start. The power module is offered in a space saving
and thermally enhanced 15mm × 15mm × 2.82mm LGA
package. The LTM4614 is Pb-free and RoHS compliant.
APPLICATIONS
n
Telecom and Networking Equipment
n
FPGA Power
n
SERDES and Other Low Noise Applications
L, LT, LTC, LTM, μModule, Linear Technology and the Linear logo are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners. Protected by U.S. Patents including 5481178, 6580258, 6304066, 6127815, 6498466,
6611131, 6724174.
Different Combinations of Input and Output Voltages
NUMBER OF INPUTS
NUMBER OF OUTPUTS
I
OUT(MAX)
2
2
1
4A, 4A
2 (Current Share,
Ex. 3.3V and 5V)
8A
1
1
2
1
4A, 4A
8A, see LTM4608A
TYPICAL APPLICATION
Efficiency vs Output Current
Dual Output 4A DC/DC μModule® Regulator
91
89
87
85
83
81
79
77
75
V
IN
= 3.3V
V
V
V
OUT1
V
V
OUT
IN1
IN1
OUT1
FB1
1.5V
3.3V TO 5V
1.2V/4A
10μF
10μF
100μF
100μF
10k
V
LTM4614
OUT
1.2V
V
V
OUT2
IN2
V
V
IN2
OUT2
FB2
1.5V/4A
3.3V TO 5V
5.76k
GND1
GND2
4614 F01a
2
0
1
3
4
LOAD CURRENT (A)
4614 TA01b
4614fa
1
LTM4614
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(See Pin Functions, Pin Configuration Table)
(Note 1)
V
, V , PGOOD1, PGOOD2 .....................–0.3V to 6V
IN1 IN2
TOP VIEW
COMP1, COMP2, RUN/SS1, RUN/SS2
M
L
K
J
FB1, FB2,TRACK1, TRACK2 ........................ –0.3V to V
SW1, SW2, V
IN
, V
.............. –0.3V to (V + 0.3V)
OUT1 OUT2 IN
Internal Operating Temperature Range
H
G
F
(Note 2)..................................................–40°C to 125°C
Junction Temperature ........................................... 125°C
Storage Temperature Range...................–55°C to 125°C
Body Temperature, Solder Reflow (Note 3)........... 245°C
E
D
C
B
A
1
2
3
4
5
6
7
8
9
10
11
12
LGA PACKAGE
144-LEAD (15mm s 15mm s 2.8mm)
T
JMAX
= 125°C, θ
= 2-3°C/W, θ = 15°C/W, θ = 25°C/W, Weight = 1.61g
JC-BOT
JA
JC-TOP
ORDER INFORMATION
LEAD FREE FINISH
LTM4614EV#PBF
LTM4614IV#PBF
TRAY
PART MARKING*
LTM4614V
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 125°C
LTM4614EV#PBF
LTM4614IV#PBF
144-Lead (15mm × 15mm × 2.8mm) LGA
144-Lead (15mm × 15mm × 2.8mm) LGA
LTM4614V
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full internal
operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V unless otherwise noted. Refer to Figure 1.
Specified as each channel (Note 6).
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
V
V
Input DC Voltage
Output Voltage
2.375
5.5
V
IN(DC)
C
IN
= 22μF, C
IN
= 100μF, R = 5.76k
OUT FB
OUT(DC)
V
= 2.375V to 5.5V, I
= 0A to 4A (Note 5)
OUT
0°C ≤ T ≤ 125°C
1.460
1.45
1.49
1.49
1.508
1.512
V
V
J
l
V
Undervoltage Lockout Threshold
Input Inrush Current at Start-Up
I
I
= 0A
1.6
2
2.3
12
V
IN(UVLO)
OUT
I
= 0A, C = 22μF, C
= 100μF, V
= 1.5V
OUT
INRUSH(VIN)
OUT
IN
OUT
V
IN
= 5.5V
0.35
A
I
Input Supply Bias Current
Input Supply Current
V
V
= 2.375V, V = 1.5V, Switching Continuous
OUT
= 5.5V, V
20
35
7
mA
mA
μA
Q(VIN)
S(VIN)
IN
IN
= 1.5V, Switching Continuous
OUT
Shutdown, RUN = 0, V = 5V
IN
I
V
V
= 2.375V, V
= 5.5V, V
= 1.5V, I = 4A
OUT
3.15
1.35
A
A
IN
IN
OUT
= 1.5V, I
= 4A
OUT
OUT
4614fa
2
LTM4614
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full internal
operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V unless otherwise noted. Refer to Figure 1.
Specified as each channel (Note 6).
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
4
UNITS
I
Output Continuous Current Range
Line Regulation Accuracy
V
V
= 3.3V, V = 1.5V (Note 5)
OUT
0
A
OUT(DC)
IN
l
l
= 1.5V, V from 2.375V to 5.5V, I = 0A
OUT
0.1
0.3
%
ΔV
OUT(LINE)
OUT
IN
V
OUT
Load Regulation Accuracy
Output Ripple Voltage
V
= 1.5V, 0A to 4A (Note 5), V = 2.375V to 5.5V
ΔV
OUT IN
OUT(LOAD)
0°C ≤ T ≤ 125°C
0.7
1.2
1.25
1.5
%
%
J
V
OUT
V
I
I
= 0A, C
IN
= 100μF (X5R)
OUT
OUT(AC)
OUT
V
= 5V, V
= 1.5V
12
mV
P-P
OUT
f
Output Ripple Voltage Frequency
Turn-On Overshoot
= 4A, V = 5V, V = 1.5V
OUT
1.25
MHz
s
OUT
IN
C
OUT
= 100μF, V
= 0A
= 1.5V, RUN/SS = 10nF,
ΔV
OUT(START)
OUT
OUT
I
V
= 3.3V
= 5V
20
20
mV
mV
IN
IN
V
t
Turn-On Time
C
= 100μF, V
= 1.5V, I
= 1A Resistive Load,
OUT
START
OUT
OUT
TRACK = V and RUN/SS = Float
IN
V
= 5V
0.5
25
ms
mV
IN
Peak Deviation for Dynamic Load
Load: 0% to 50% to 0% of Full Load,
= 100μF, V = 5V, V = 1.5V
ΔV
OUT(LS)
C
OUT
IN
OUT
t
Settling Time for Dynamic Load
Step
Load: 0% to 50% to 0% of Full Load,
10
μs
SETTLE
V
= 5V, V
= 1.5V
IN
OUT
I
Output Current Limit
C
OUT
V
= 100μF
IN
OUT(PK)
= 5V, V
= 1.5V
8
A
OUT
V
Voltage at FB Pin
I
= 0A, V = 1.5V
OUT
0.792
0.788
0.8
0.8
0.808
0.810
V
V
FB
OUT
l
I
0.2
0.75
0.2
μA
V
FB
V
RUN Pin On/Off Threshold
TRACK Pin Current
Offset Voltage
0.6
0.9
RUN
I
μA
mV
V
TRACK
V
TRACK = 0.4V
30
TRACK(OFFSET)
V
Tracking Input Range
0
0.8
TRACK(RANGE)
R
Resistor Between V
and FB Pins
OUT
4.96
4.99
7.5
90
5.025
kΩ
%
FBHI
PGOOD Range
ΔV
PGOOD
R
PGOOD Resistance
Open-Drain Pull-Down
150
Ω
PGOOD
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM4614E is guaranteed to meet performance specifications
over the 0°C to 125°C internal operating temperature range. Specifications
over the –40°C to 125°C internal operating temperature range are assured
by design, characterization and correlation with statistical process
controls. The LTM4614I is guaranteed to meet specifications over the full
internal operating temperature range. Note that the maximum ambient
temperature is determined by specific operating conditions in conjunction
with board layout, the rated package thermal resistance and other
environmental factors.
Note 3: See Application Note 100.
Note 4: The IC has overtemperature protection that is intended to protect
the device during momentary overload conditions. Junction temperatures
will exceed 125°C when overtemperature is activated. Continuous
overtemperature activation can impair long-term reliability.
Note 5: See output current derating curves for different V , V
Note 6: Two channels are tested separately and the specified test
and T .
A
IN OUT
conditions are applied to each channel.
4614fa
3
LTM4614
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Output Current
VIN = 2.5V
Efficiency vs Output Current
VIN = 3.3V
Efficiency vs Output Current
VIN = 5V
100
95
95
90
100
95
90
90
85
80
85
80
75
85
80
75
70
65
V
V
V
V
V
V
= 3.3V
= 2.5V
= 1.8V
= 1.5V
= 1.2V
= 0.8V
OUT
OUT
OUT
OUT
OUT
OUT
75
70
65
V
V
V
V
V
= 2.5V
= 1.8V
= 1.5V
= 1.2V
= 0.8V
OUT
OUT
OUT
OUT
OUT
V
V
V
V
= 1.8V
= 1.5V
= 1.2V
= 0.8V
OUT
OUT
OUT
OUT
70
65
1
2
4
1
2
4
0
3
0
1
2
3
4
0
3
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
4614 G02
4614 G03
4614 G01
Minimum Input Voltage
at 4A Load
Load Transient Response
Load Transient Response
3.5
3.0
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
V
OUT
= 3.3V
= 2.5V
= 1.8V
= 1.5V
= 1.2V
= 0.8V
I
I
LOAD
LOAD
2.5
2A/DIV
2A/DIV
V
OUT
2.0
1.5
1.0
0.5
V
OUT
20mV/DIV
20mV/DIV
4614 G06
V
V
C
= 5V
20μs/DIV
IN
4614 G05
V
V
C
= 5V
20μs/DIV
IN
= 1.5V
OUT
OUT
= 1.2V
OUT
OUT
= 100μF, 6.3V CERAMICS
= 100μF, 6.3V CERAMICS
0
0
1.5
2.5
2
3
3.5
4 4.5
5 5.5
0.5
1
V
(V)
IN
4614 G04
Load Transient Response
Load Transient Response
Load Transient Response
I
I
LOAD
LOAD
2A/DIV
2A/DIV
I
LOAD
2A/DIV
V
OUT
V
V
OUT
20mV/DIV
OUT
20mV/DIV
20mV/DIV
4614 G07
4614 G08
4614 G09
V
V
C
= 5V
20μs/DIV
V
V
C
= 5V
20μs/DIV
V
V
C
= 5V
OUT
OUT
20μs/DIV
= 100μF, 6.3V CERAMICS
IN
IN
IN
= 1.8V
= 2.5V
= 3.3V
OUT
OUT
OUT
OUT
= 100μF, 6.3V CERAMICS
= 100μF, 6.3V CERAMICS
4614fa
4
LTM4614
TYPICAL PERFORMANCE CHARACTERISTICS
Start-Up
Start-Up
VFB vs Temperature
806
804
V
V
OUT
1V/DIV
OUT
1V/DIV
802
800
I
IN
I
IN
1A/DIV
1A/DIV
798
796
794
4614 G10
4614 G11
V
V
C
= 5V
200μs/DIV
V
V
C
= 5V
200μs/DIV
IN
IN
= 2.5V
= 2.5V
OUT
OUT
OUT
OUT
= 100μF
= 100μF
NO LOAD
4A LOAD
(0.01μF SOFT-START CAPACITOR)
(0.01μF SOFT-START CAPACITOR)
–50 –25
0
25
50
75 100 125
TEMPERATURE (°C)
4614 G12
Short-Circuit Protection
1.5V Short, No Load
Short-Circuit Protection
1.5V Short, 4A Load
Current Limit Foldback
1.6
1.4
1.2
1.0
V
V
OUT
OUT
0.5V/DIV
0.5V/DIV
I
IN
I
IN
1A/DIV
0.8
0.6
4A/DIV
V
= 1.5V
0.4
0.2
0
OUT
4614 G15
4614 G14
100μs/DIV
20μs/DIV
V
IN
V
IN
V
IN
= 5V
= 3.3V
= 2.5V
4
5
7
3
8
6
OUTPUT CURRENT (A)
4614 G13
4614fa
5
LTM4614
PIN FUNCTIONS
V
, V (J1-J6, K1-K6); (C1-C6, D1-D6): Power Input
FB1, FB2 (L6, E6): The Negative Input of the Switching
IN1 IN2
Pins. Apply input voltage between these pins and GND
Regulators’ Error Amplifier. Internally, these pins are con-
pins. Recommend placing input decoupling capacitance
directly between V pins and GND pins.
nected to V
with a 4.99k precision resistor. Different
OUT
output voltages can be programmed with an additional
resistorbetweentheFBandGNDpins.Twopowermodules
can current share when this pin is connected in parallel
with the adjacent module’s FB pin. See Applications In-
formation section.
IN
V
,V
(K9-K12,J9-J12,L9-L12,M9-M12);(C9-C12,
OUT1 OUT2
D9-D12, E9-E12, F9-F12): Power Output Pins. Apply out-
put load between these pins and GND pins. Recommend
placing output decoupling capacitance directly between
these pins and GND pins. Review Table 4.
COMP1, COMP2 (L5, E5): Current Control Threshold
and Error Amplifier Compensation Point. The current
comparator threshold increases with this control voltage.
Two power modules can current share when this pin is
connected in parallel with the adjacent module’s COMP
pin. Each channel has been internally compensated. See
Applications Information section.
GND1, GND2, (G1-G12, H1, H7-H12, J7-J8, K7-K8, L1,
L7-L8, M1-M8); (A1-A12, B1, B7-B12, C7-C8, D7-D8,
E1, E7-E8, F1-F8): Power Ground Pins for Both Input
and Output Returns.
TRACK1, TRACK2 (L3, E3): Output Voltage Tracking Pins.
When the module is configured as a master output, then a
soft-start capacitor is placed on the RUN/SS pin to ground
to control the master ramp rate, or an external ramp can
be applied to the master regulator’s track pin to control it.
Slave operation is performed by putting a resistor divider
from the master output to the ground, and connecting the
center point of the divider to this pin on the slave regulator.
If tracking is not desired, then connect the TRACK pin to
PGOOD1, PGOOD2 (L4, E4): Output Voltage Power
Good Indicator. Open-drain logic output that is pulled to
ground when the output voltage is not within 7.5% of
the regulation point.
RUN/SS1, RUN/SS2 (L2, E2): Run Control and Soft-Start
Pin.Avoltageabove0.8Vwillturnonthemodule,andbelow
0.5V will turn off the module. This pin has a 1M resistor
V . Load current must be present for tracking. See Ap-
plications Information section.
to V and a 1000pF capacitor to GND. See Applications
IN
IN
Information section for soft-start information.
SW1, SW2 (H2-H6, B2-B6): The switching node of the
circuitisusedfortestingpurposes.Thiscanbeconnectedto
copper on the board for improved thermal performance.
4614fa
6
LTM4614
SIMPLIFIED BLOCK DIAGRAM
V
PGOOD
IN
V
IN
2.375V TO 5.5V
22μF
6.3V
4.7μF
6.3V
R
SS
1M
RUN/SS
C
C
SS
1000pF
SSEXT
M1
M2
V
L
V
OUT
OUT
CONTROL, DRIVE
POWER FETS
4.99k
TRACK
COMP
1.5V
TRACK
SUPPLY
C2
470pF
4.7μF
6.3V
4A
5.76k
100μF
X5R
R1
4.99k
INTERNAL
COMP
GND
FB
SW
4614 F01
R
FB
5.76k
Figure 1. Simplified LTM4614 Block Diagram of Each Switching Regulator Channel
DECOUPLING REQUIREMENTS TA = 25°C. Use Figure 1 configuration for each channel.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
C
External Input Capacitor Requirement
I
= 4A
22
μF
IN
OUT
(V = 2.375V to 5.5V, V
= 1.5V)
IN
OUT
C
OUT
External Output Capacitor Requirement
(V = 2.375V to 5.5V, V = 1.5V)
I
= 4A
66
100
μF
OUT
IN
OUT
4614fa
7
LTM4614
OPERATION
LTM4614 POWER MODULE DESCRIPTION
open-drain PGOOD outputs low if the particular output
feedback voltage exits a 7.5% window around the regu-
lation point. Furthermore, in an overvoltage condition,
internal top FET, M1, is turned off and bottom FET, M2,
is turned on and held on until the overvoltage condition
clears, or current limit is exceeded.
The LTM4614 is a standalone dual nonisolated switching
mode DC/DC power supply. It can deliver up to 4A of DC
output current for each channel with few external input
andoutputcapacitors.Thismoduleprovidestwoprecisely
regulated output voltages programmable via one external
resistor for each channel from 0.8V DC to 5V DC over
a 2.375V to 5.5V input voltage. The typical application
schematic is shown in Figure 12.
Pulling each specific RUN pin below 0.8V forces the spe-
cific regulator controller into its shutdown state, turning
off both M1 and M2 for each power stage. At low load
current, each regulator works in continuous current mode
by default to achieve minimum output voltage ripple.
The LTM4614 has two integrated constant frequency cur-
rent mode regulators, with built-in power MOSFETs with
fast switching speed. The typical switching frequency is
1.25MHz.Withcurrentmodecontrolandinternalfeedback
loop compensation, these switching regulators have suf-
ficient stability margins and good transient performance
under a wide range of operating conditions, and with a
wide range of output capacitors, even all ceramic output
capacitors.
The TRACK/SS pins are used for power supply tracking
and soft-start programming for each specific regulator.
See Applications Information section.
The LTM4614 is internally compensated to be stable over
the operating conditions. Table 4 provides a guideline for
input and output capacitance for several operating condi-
tions. The Linear Technology ꢀModule Power Design Tool
will be provided for transient and stability analysis.
Current mode control provides cycle-by-cycle fast cur-
rent limit. Besides, current limiting is provided in an
overcurrent condition with thermal shutdown. In addition,
internalovervoltageandundervoltagecomparatorspullthe
The FB pins are used to program the specific output volt-
age with a single resistor to ground.
4614fa
8
LTM4614
APPLICATIONS INFORMATION
Dual Switching Regulator
For a buck converter, the switching duty cycle can be
estimated as:
AtypicalLTM4614applicationcircuitisshowninFigure 12.
External component selection is primarily determined by
the maximum load current and output voltage. Refer to
Table 4 for specific external capacitor requirements for a
particular application.
VOUT
D=
VIN
Without considering the inductor current ripple, the RMS
current of the input capacitor can be estimated as:
V to V
Step-Down Ratios
IN
OUT
IOUT(MAX)
There are restrictions in the maximum V and V
step-
ICIN(RMS)
=
• D• 1–D
(
)
IN
OUT
η%
down ratio than can be achieved for a given input voltage
on the two switching regulators. The LTM4614 is 100%
In the above equation, η% is the estimated efficiency of
the power module. The bulk capacitor can be a switcher-
rated electrolytic aluminum OS-CON capacitor for bulk
input capacitance due to high inductance traces or leads.
If a low inductance plane is used to power the device,
then no input capacitance is required. The internal 4.7μF
ceramicsoneachchannelinputaretypicallyratedfor1Aof
RMS ripple current up to 85°C operation. The worst-case
ripple current for the 4A maximum current is 2A or less.
An additional 10μF or 22μF ceramic capacitor can be used
to supplement the internal capacitor with an additional 1A
to 2A ripple current rating.
duty cycle, but the V to V
minimum dropout will be
OUT
IN
a function the load current. A typical 0.5V minimum is
sufficient.
Output Voltage Programming
Each regulator channel has an internal 0.8V reference
voltage. As shown in the Block Diagram, a 4.99k internal
feedback resistor connects the V
and FB pins together.
OUT
The output voltage will default to 0.8V with no feedback
resistor. Adding a resistor R from the FB pin to GND
FB
programs the output voltage:
4.99k +RFB
VOUT = 0.8V •
RFB
Output Capacitors
The LTM4614 switchers are designed for low output volt-
age ripple on each channel. The bulk output capacitors are
chosen with low enough effective series resistance (ESR)
to meet the output voltage ripple and transient require-
ments. The output capacitors can be a low ESR tantalum
capacitor,lowESRpolymercapacitororceramiccapacitor.
The typical output capacitance range is 66μF to 100μF.
Additional output filtering may be required by the system
designer, if further reduction of output ripple or dynamic
transient spike is required. Table 4 shows a matrix of dif-
ferent output voltages and output capacitors to minimize
the voltage droop and overshoot during a 2A/μs transient.
The table optimizes total equivalent ESR and total bulk
capacitance to maximize transient performance.
Table 1. FB Resistor Table vs Various Output Voltages
V
0.8V
1.2V
10k
1.5V
1.8V
2.5V
3.3V
OUT
R
Open
5.76k
3.92k
2.37k
1.62k
FB
Input Capacitors
The LTM4614 module should be connected to a low AC
impedance DC source. One 4.7μF ceramic capacitor is
included inside the module for each regulator channel.
Additional input capacitors are needed if a large load step
is required up to the full 4A level and for RMS ripple cur-
rent requirements. A 47μF bulk capacitor can be used for
more input bulk capacitance. This 47μF capacitor is only
needed if the input source impedance is compromised by
long inductive leads or traces.
4614fa
9
LTM4614
APPLICATIONS INFORMATION
Fault Conditions: Current Limit and Overcurrent
where R and C are shown in the Block Diagram of
SS SS
Foldback
Figure 1, and 1.8V is the soft-start upper range. The
soft-start function can also be used to control the output
ramp-up time, so that another regulator can be easily
tracked to it.
The LTM4614 has current mode control, which inher-
ently limits the cycle-by-cycle inductor current not only
in steady-state operation, but also in transient.
Along with foldback current limiting in the event of an
overload condition, the LTM4614 has overtemperature
shutdown protection that inhibits switching operation
around 150°C for each channel.
Output Voltage Tracking
Output voltage tracking can be programmed externally
using the TRACK pins. Either output can be tracked up
or down with another regulator. The master regulator’s
output is divided down with an external resistor divider
thatisthesameastheslaveregulator’sfeedbackdividerto
implement coincident tracking. The LTM4614 uses a very
accurate4.99kresistorfortheinternaltopfeedbackresistor.
Figure 2 shows an example of coincident tracking.
Run Enable and Soft-Start
The RUN/SS pins provide a dual function of enable and
soft-start control for each channel. The RUN/SS pins are
used to control turn on of the LTM4614. While each enable
pin is below 0.5V, the LTM4614 will be in a low quiescent
current state. At least a 0.8V level applied to the enable
pins will turn on the LTM4614 regulators. This pin can be
used to sequence the regulator channels. The soft-start
Equations:
⎛
⎞
RFB1
4.99k +R
TRACK1=
•Master
⎜
⎟
⎝
⎠
FB1
control is provided by a 1M pull-up resistor (R ) and a
SS
⎛
⎞
1000pF capacitor (C ) as drawn in the Block Diagram for
4.99k
RFB1
SS
Slave = 1+
• TRACK1
⎜
⎝
⎟
each channel. An external capacitor can be applied to the
RUN/SS pin to increase the soft-start time. A typical value
is 0.01μF. The approximate equation for soft-start:
⎠
⎛
⎞
VIN
V –1.8V
tSOFTSTART =In
•RSS •CSS
⎜
⎟
⎝
⎠
IN
V
3V TO 5.5V
IN
C1
22μF
6.3V
C2
22μF
6.3V
PGOOD1
PGOOD2
V
IN1
V
IN2
R3
10k
R4
10k
PGOOD1
PGOOD2
1.2V
4A
1.5V
4A
V
V
OUT1
OUT2
FB2
FB1
LTM4614
C7
100μF
6.3V
R
C4
TB
4.99k
22μF
COMP1
TRACK1
RUN/SS1
COMP2
TRACK2
RUN/SS2
1.5V
V
OR
IN
6.3V
C3
100μF
6.3V
C9
22μF
6.3V
CONTROL
RAMP
R
R
FB2
FB1
R
TA
5.76k
10k
10k
GND1
GND2
C
SSEXT1
4614 F02
Figure 2. Dual Outputs (1.5V and 1.2V) with Tracking
4614fa
10
LTM4614
APPLICATIONS INFORMATION
TRACK1 is the track ramp applied to the slave’s track pin.
TRACK1appliesthetrackreferencefortheslaveoutputup
to the point of the programmed value at which TRACK1
proceeds beyond the 0.8V reference value. The TRACK1
pin must go beyond the 0.8V to ensure the slave output
has reached its final value.
feedback resistor of the slave regulator in equal slew rate
or coincident tracking, then R is equal to R with V =
TA
FB
FB
V
. Therefore R = 4.99k and R = 10k in Figure 2.
TRACK
TB TA
Figure 3 shows the output voltage tracking waveform for
coincident tracking.
Inratiometrictracking, adifferentslewratemaybedesired
Ratiometric tracking can be achieved by a few simple
calculationsandtheslewratevalueappliedtothemaster’s
TRACK pin. As mentioned above, the TRACK pin has a
control range from 0V to 0.8V. The control ramp slew rate
applied to the master’s TRACK pin is directly equal to the
master’s output slew rate in Volts/Time.
for the slave regulator. R can be solved for when SR is
TB
slower than MR. Make sure that the slave supply slew rate
ischosentobefastenoughsothattheslaveoutputvoltage
will reach it final value before the master output.
For example, MR = 2.5V/ms and SR = 1.8V/1ms. Then
R = 6.98k. Solve for R to equal to 3.24k. The master
TB
TA
The equation:
output must be greater than the slave output for the
tracking to work. Output load current must be present
for tracking to operate properly during power down.
MR
SR
• 4.99k =RTB
Power Good
where MR is the master’s output slew rate and SR is the
slave’s output slew rate in Volts/Time. When coincident
PGOOD1 and PGOOD2 are open-drain pins that can be
usedtomonitorvalidoutputvoltageregulation.Thesepins
monitor a 7.5% window around the regulation point.
tracking is desired, then MR and SR are equal, thus R
TB
is equal to 4.99k. R is derived from equation:
TA
0.8V
COMP Pin
RTA
=
VTRACK
RTB
VFB
VFB
4.99k RFB
+
–
This pin is the external compensation pin. The module has
alreadybeeninternallycompensatedforalloutputvoltages.
Table 4 is provided for most application requirements.
The Linear Technology μModule Power Design Tool will
be provided for other control loop optimization.
where V is the feedback voltage reference of the regula-
FB
TRACK
tor, and V
is 0.8V. Since R is equal to the 4.99k top
TB
MASTER OUTPUT
SLAVE OUTPUT
TIME
4614 F03
Figure 3. Output Voltage Coincident Tracking
4614fa
11
LTM4614
APPLICATIONS INFORMATION
Parallel Switching Regulator Operation
and airflow conditions. Both of the LTM4614 outputs
are at full 4A load current, and the power loss curves in
Figures 5 and 6 are combine power losses plotted for both
output voltages up to 4A each. The 4A output voltages are
1.2V and 3.3V. These voltages are chosen to include the
lower and higher output voltage ranges for correlating
the thermal resistance. Thermal models are derived from
several temperature measurements in a controlled tem-
perature chamber along with thermal modeling analysis.
The junction temperatures are monitored while ambient
temperature is increased with and without airflow. The
junctions are maintained at ~120°C while lowering output
current or power while increasing ambient temperature.
The 120°C is chosen to allow for a 5°C margin window
relative to the maximum 125°C. The decreased output
current will decrease the internal module loss as ambi-
ent temperature is increased. The power loss curves in
Figures 5 and 6 show this amount of power loss as a
function of load current that is specified for both chan-
nels The monitored junction temperature of 120°C minus
the ambient operating temperature specifies how much
The LTM4614 switching regulators are inherently current
mode control. Paralleling will have very good current
sharing. This will balance the thermals on the design.
Figure 13 shows a schematic of a parallel design. The
voltage feedback equation changes with the variable N
as channels are paralleled.
The equation:
4.99k
+RFB
N
VOUT = 0.8V •
RFB
N is the number of paralleled channels.
Thermal Considerations and Output Current Derating
The power loss curves in Figures 5 and 6 can be used
in coordination with the load current de-rating curves in
Figures 7 to 10 for calculating an approximate θ thermal
resistance for the LTM4614 with various heat sinking
JA
2.5
2.0
1.5
1.0
0.5
3.0
2.5
2.0
1.5
1.0
0.5
V
= 5V
V
= 5V
IN
IN
0
0
0
1
2
3
4
0
1
2
3
4
LOAD CURRENT (A)
LOAD CURRENT (A)
4614 F05
4614 F06
Figure 5. 1.2V Power Loss
Figure 6. 3.3V Power Loss
4614fa
12
LTM4614
APPLICATIONS INFORMATION
module temperature rise can be allowed. As an example in
Figure 7 the load current is de-rated to 3A for each chan-
nel with 0LFM at ~ 90°C and the power loss for both
channels at 5V to 1.2V at 3A output are ~1.5 watts. If the
90°C ambient temperature is subtracted from the 120°C
maximum junction temperature, then the difference of
30°C divided 1.5W equals a 20°C/W thermal resistance.
Table 2 specifies a 15°C/W value which is close. Table 2
and Table 3 provide equivalent thermal resistances for
1.2V and 3.3V outputs with and without air flow and
heat sinking. The combine power loss for the two 4A
outputs can be summed together and multiplied by the
thermal resistance values in Tables 2 and 3 for module
temperature rise under the specified conditions. The
printed circuit board is a 1.6mm thick four layer board
with 2 ounce copper for the two outer layers and 1 ounce
copper for the two inner layers. The PCB dimensions are
95mm × 76mm. The data sheet list the θ (junction to
JP
pin) and θ (junction to case) thermal resistances under
JC
the Pin Configuration diagram.
4.5
4.0
3.5
4.5
4.0
3.5
200LFM NO HEAT SINK
3.0
3.0
200LFM HEAT SINK
2.5
2.5
400LFM HEAT SINK
400LFM NO HEAT SINK
2.0
2.0
1.5
1.5
0LFM NO HEAT SINK
1.0
1.0
0.5
0LFM HEAT SINK
0.5
0
0
40 50 60 70 80 90 100 110 120
40 50 60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
4614 F08
4614 F07
Figure 7. 1.2V No Heat Sink (VIN = 5V)
Figure 8. 1.2V Heat Sink (VIN = 5V)
4.5
4.0
3.5
4.5
4.0
3.5
3.0
3.0
200LFM NO HEAT SINK
2.5
400LFM HEAT SINK
2.5
400LFM NO HEAT SINK
200LFM HEAT SINK
2.0
2.0
0LFM HEAT SINK
1.5
1.5
0LFM NO HEAT SINK
1.0
1.0
0.5
0.5
0
0
40 50 60 70 80 90 100 110 120
40 50 60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
4614 F09
4614 F10
Figure 9. 3.3V No Heat Sink (VIN = 5V)
Figure 10. 3.3V Heat Sink (VIN = 5V)
4614fa
13
LTM4614
APPLICATIONS INFORMATION
Table 2. 1.2V Output
DERATING CURVE
Figure 7
V
IN
(V)
POWER LOSS CURVE
Figure 5
AIRFLOW (LFM)
HEAT SINK
None
θ
JA
(°C/W)
15
5
0
Figure 7
5
5
5
5
5
Figure 5
200
400
0
None
12
Figure 7
Figure 5
None
10
Figure 8
Figure 5
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
12
Figure 8
Figure 5
200
400
9
Figure 8
Figure 5
7
Table 3. 3.3V Output
DERATING CURVE
Figure 9
V
IN
(V)
POWER LOSS CURVE
Figure 6
AIRFLOW (LFM)
HEAT SINK
None
θ
JA
(°C/W)
15
5
5
5
5
5
5
0
Figure 9
Figure 6
200
400
0
None
12
Figure 9
Figure 6
None
10
Figure 10
Figure 6
BGA Heat Sink
BGA Heat Sink
BGA Heat Sink
12
Figure 10
Figure 6
200
400
9
Figure 10
Figure 6
7
HEAT SINK MANUFACTURER
PART NUMBER
PHONE NUMBER
Aavid
375424b00034G
603-635-2800
4614fa
14
LTM4614
APPLICATIONS INFORMATION
Safety Considerations
• Place high frequency ceramic input and output capaci-
tors next to the V , GND and V
pins to minimize
IN
OUT
TheLTM4614modulesdonotprovideisolationfromV to
IN
high frequency noise.
V
.Thereisnointernalfuse.Ifrequired,aslowblowfuse
OUT
with a rating twice the maximum input current needs to be
• Place a dedicated power ground layer underneath the
unit.
provided to protect each unit from catastrophic failure.
• Tominimizetheviaconductionlossandreducemodule
thermal stress, use multiple vias for interconnection
between the top layer and other power layers.
Layout Checklist/Example
The high integration of LTM4614 makes the PCB board
layoutverysimpleandeasy.However,tooptimizeitselectri-
cal and thermal performance, some layout considerations
are still necessary.
• Do not put via directly on pads unless the via is
capped.
Figure 11 gives a good example of the recommended
layout.
• Use large PCB copper areas for high current path,
including V , GND and V . It helps to minimize the
IN
OUT
PCB conduction loss and thermal stress.
I/O PINS
V
GND1
OUT1
GND1
M
L
V
OUT1
C
IN1
C
C
OUT1 OUT2
K
J
V
IN1
H
G
F
GND1
GND2
GND1
V
OUT2
C
IN2
E
C
C
OUT3 OUT4
D
C
B
A
V
IN2
GND2
GND2
1
2
3
4
5
6
7
8
9
10 11 12
GND2
4614 F11
GND2
I/O PINS
Figure 11. Recommended PCB Layout
4614fa
15
LTM4614
APPLICATIONS INFORMATION
V
2.375V TO 5.5V
IN
C2
C1
22μF
6.3V
22μF
6.3V
X5R OR X7R
V
IN1
V
IN2
PGOOD1
PGOOD2
1V
4A
1.2V
4A
V
V
OUT1
OUT2
FB2
FB1
LTM4614
C5
100μF
6.3V
C4
100μF
6.3V
COMP1
COMP2
TRACK2
RUN/SS2
+
C6
22μF
6.3V
R2
10k
V
V
IN
C3
470μF
TRACK1
IN
R1
20k
RUN/SS1
C
SSEXT1
GND1
GND2
0.1μF
4614 F12
Figure 12. Typical 2.375VIN to 5.5VIN, 1.2V and 1V at 4A
Table 4. Output Voltage Response vs Component Matrix (Refer to Figure 12) 0A to 2.5A Load Step Typical Measured Values
C
AND C
CERAMIC VENDORS VALUE
PART NUMBER
C
AND C BULK VENDORS VALUE
PART NUMBER
150μF 10V 10TPD150M
OUT1
OUT2
OUT1
OUT2
TDK
22μF 6.3V
22μF 16V
C3216X7SOJ226M
Sanyo POSCAP
Murata
TDK
GRM31CR61C226KE15L Sanyo POSCAP
220μF 4V
4TPE220MF
100μF 6.3V C4532X5R0J107MZ
100μF 6.3V GRM32ER60J107M
C
IN
BULK VENDORS
VALUE
PART NUMBER
Murata
Sanyo POSCAP
100μF 10V 10CE100FH
V
C
C
C
AND C
C
AND C
V
DROOP PEAK-TO-PEAK RECOVERY LOAD STEP
R
FB
(kΩ)
10
10
10
OUT
IN
IN
OUT1
OUT2
OUT1
OUT2
IN
(V)
1.2
1.2
1.2
1.2
1.5
1.5
1.5
1.5
1.8
1.8
1.8
2.5
2.5
2.5
3.3
(CERAMIC) (BULK)*
(CER) EACH
(POSCAP) EACH
I
(V)
(mV)
33
25
33
25
30
28
30
27
34
30
30
50
33
50
50
DEVIATION
TIME (μs)
(A/μs)
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
2.5
TH
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
100μF
None
None
220μF
None
220μF
None
220μF
None
220μF
None
220μF
220μF
None
150μF
150μF
150μF
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
5
5
3.3
3.3
5
68
50
68
50
60
60
60
56
68
60
60
90
60
95
90
11
9
8
10μF ×2
10μF ×2
10μF ×2
10μF ×2
10μF ×2
10μF ×2
10μF ×2
10μF ×2
10μF ×2
10μF ×2
10μF ×2
10μF ×2
10μF ×2
10μF ×2
10μF ×2
100μF, 22μF ×2
22μF ×1
100μF, 22μF ×2
22μF ×1
100μF, 22μF ×2
22μF ×1
100μF, 22μF ×2
22μF ×1
10
11
11
10
10
12
12
12
10
10
12
12
10
5.76
5.76
5.76
5.76
3.92
3.92
3.92
3.09
3.09
3.09
1.62
5
3.3
3.3
5
5
3.3
5
5
3.3
5
100μF, 22μF ×2
22μF ×1
22μF ×1
22μF ×1
22μF ×1
22μF ×1
100μF
100μF
100μF
22μF ×1
*Bulk capacitance is optional if V has very low input impedance.
IN
4614fa
16
LTM4614
APPLICATIONS INFORMATION
V
3V TO 5.5V
IN
C2
C1
22μF
6.3V
22μF
6.3V
X5R OR X7R
R2
5k
V
IN1
V
IN2
PGOOD
PGOOD1
PGOOD2
1.2V
8A
V
V
OUT1
OUT2
FB2
FB1
C5
100μF
6.3V
C4
LTM4614
100μF
6.3V
COMP1
TRACK1
RUN/SS1
COMP2
TRACK2
RUN/SS2
X5R OR X7R
R1
V
V
IN
IN
4.99k
C
SSEXT1
GND1
GND2
0.01μF
4614 F13
Figure 13. LTM4614 Parallel 1.2V at 8A Design (Also, See the LTM4608A)
V
2.375V TO 5.5V
IN
C1
22μF
6.3V
C2
22μF
6.3V
X5R OR X7R
X5R OR X7R
R3
10k
R4
10k
V
IN1
V
IN2
PGOOD1
PGOOD2
1.8V
4A
1.5V
4A
V
V
OUT1
OUT2
FB2
FB1
LTM4614
C5
22μF
6.3V
C4
22μF
6.3V
1.8V
4.99k
COMP1
TRACK1
RUN/SS1
COMP2
TRACK2
RUN/SS2
C6
100μF
6.3V
V
IN
C3
100μF
6.3V
R1
4.02k
R2
5.76k
C
SSEXT
0.01μF
GND1
GND2
5.76k
X5R OR X7R
REFER TO TABLE 4
X5R OR X7R
REFER TO TABLE 4
4614 F14
Figure 14. 1.8V and 1.5V at 4A with Output Voltage Tracking Design
4614fa
17
LTM4614
PACKAGE DESCRIPTION
Z
b b b
Z
6 . 9 8 5 0
5 . 7 1 5 0
4 . 4 4 5 0
3 . 1 7 5 0
1 . 9 0 5 0
0 . 6 3 5 0
0 . 0 0 0 0
0 . 6 3 5 0
1 . 9 0 5 0
3 . 1 7 5 0
4 . 4 4 5 0
5 . 7 1 5 0
6 . 9 8 5 0
4614fa
18
LTM4614
PACKAGE DESCRIPTION
LTM4614 Component LGA Pinout
PIN ID
A1
FUNCTION
GND2
GND2
GND2
GND2
GND2
GND2
GND2
GND2
GND2
GND2
GND2
GND2
PIN ID
B1
FUNCTION
GND2
SW2
PIN ID
C1
FUNCTION
PIN ID
D1
FUNCTION
PIN ID
E1
FUNCTION
GND2
PIN ID
F1
FUNCTION
GND2
GND2
GND2
GND2
GND2
GND2
GND2
GND2
V
V
V
V
V
V
V
V
V
V
V
V
IN2
IN2
IN2
IN2
IN2
IN2
IN2
IN2
IN2
IN2
IN2
IN2
A2
B2
C2
D2
E2
RUN/SS2
TRACK2
PGOOD2
COMP2
FB2
F2
A3
B3
SW2
C3
D3
E3
F3
A4
B4
SW2
C4
D4
E4
F4
A5
B5
SW2
C5
D5
E5
F5
A6
B6
SW2
C6
D6
E6
F6
A7
B7
GND2
GND2
GND2
GND2
GND2
GND2
C7
GND2
GND2
D7
GND2
GND2
E7
GND2
F7
A8
B8
C8
D8
E8
GND2
F8
A9
B9
C9
V
V
V
V
D9
V
V
V
V
E9
V
V
V
V
F9
V
V
V
V
OUT2
OUT2
OUT2
OUT2
OUT2
OUT2
OUT2
OUT2
OUT2
OUT2
OUT2
OUT2
OUT2
OUT2
OUT2
OUT2
A10
A11
A12
B10
B11
B12
C10
C11
C12
D10
D11
D12
E10
E11
E12
F10
F11
F12
PIN ID
G1
FUNCTION
GND1
GND1
GND1
GND1
GND1
GND1
GND1
GND1
GND1
GND1
GND1
GND1
PIN ID
H1
FUNCTION
GND1
SW1
PIN ID
J1
FUNCTION
PIN ID
K1
FUNCTION
PIN ID
L1
FUNCTION
GND1
PIN ID
M1
FUNCTION
GND1
GND1
GND1
GND1
GND1
GND1
GND1
GND1
V
V
V
V
V
V
V
V
V
V
V
V
IN1
IN1
IN1
IN1
IN1
IN1
IN1
IN1
IN1
IN1
IN1
IN1
G2
H2
J2
K2
L2
RUN/SS1
TRACK1
PGOOD1
COMP1
FB1
M2
G3
H3
SW1
J3
K3
L3
M3
G4
H4
SW1
J4
K4
L4
M4
G5
H5
SW1
J5
K5
L5
M5
G6
H6
SW1
J6
K6
L6
M6
G7
H7
GND1
GND1
GND1
GND1
GND1
GND1
J7
GND1
GND1
K7
GND1
GND1
L7
GND1
M7
G8
H8
J8
K8
L8
GND1
M8
G9
H9
J9
V
V
V
V
K9
V
V
V
V
L9
V
V
V
V
M9
V
V
V
V
OUT1
OUT1
OUT1
OUT1
OUT1
OUT1
OUT1
OUT1
OUT1
OUT1
OUT1
OUT1
OUT1
OUT1
OUT1
OUT1
G10
G11
G12
H10
H11
H12
J10
J11
J12
K10
K11
K12
L10
L11
L12
M10
M11
M12
4614fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTM4614
PACKAGE PHOTOGRAPH
RELATED PARTS
PART NUMBER
LTC®2900
DESCRIPTION
COMMENTS
Quad Supply Monitor with Adjustable Reset Timer
Power Supply Tracking Controller
10A DC/DC μModule
Monitors Four Supplies, Adjustable Reset Timer
Tracks Both Up and Down, Power Supply Sequencing
LTC2923
LTM4600HV
LTM4600HVMP
LTM4601A
4.5V ≤ V ≤ 28V, 0.6V ≤ V
≤ 5V, LGA Package
OUT
IN
Wide Temperature Range 10A DC/DC μModule
12A DC/DC μModule with PLL, Output Tracking/Margining Synchronizable PolyPhase® Operation, LTM4601-1/LTM4601A-1
and Remote Sensing
Guaranteed Operation from –55°C to 125°C Ambient, LGA Package
Version Has No Remote Sensing, LGA Package
LTM4602
LTM4603
6A DC/DC μModule
Pin Compatible with the LTM4600, LGA Package
6A DC/DC μModule with PLL and Output Tracking/
Margining and Remote Sensing
Synchronizable, PolyPhase Operation, LTM4603-1 Version Has No
Remote Sensing, Pin Compatible with the LTM4601, LGA Package
LTM4604A
LTM4605
LTM4607
LTM4608A
Low V 4A DC/DC μModule
2.375V ≤ V ≤ 5.5V, 0.8V ≤ V
≤ 5V, 9mm × 15mm × 2.3mm
IN
IN
OUT
LGA Package
5A to 12A Buck-Boost μModule
5A to 12A Buck-Boost μModule
4.5V ≤ V ≤ 20V, 0.8V ≤ V
≤ 16V, 15mm × 15mm × 2.8mm
≤ 25V, 15mm × 15mm × 2.8mm
≤ 5V, 9mm × 15mm × 2.8mm
IN
OUT
OUT
LGA Package
4.5V ≤ V ≤ 36V, 0.8V ≤ V
IN
LGA Package
Low V 8A DC/DC Step-Down μModule
2.7V ≤ V ≤ 5.5V, 0.6V ≤ V
IN
IN
OUT
LGA Package
LTM4615
LTM4616
LTM8020
Triple Low V DC/DC μModule
Two 4A Outputs and One 1.5A Output; 15mm × 15mm × 2.8mm
Current Share Inputs or Outputs; 15mm × 15mm × 2.8mm
IN
Dual 8A DC/DC μModule
High V 0.2A DC/DC Step-Down μModule
4V ≤ V ≤ 36V, 1.25V ≤ V
≤ 5V, 6.25mm × 6.25mm × 2.3mm
IN
IN
OUT
LGA Package
LTM8021
LTM8022
LTM8023
High V 0.5A DC/DC Step-Down μModule
3V ≤ V ≤ 36V, 0.4V ≤ V
≤ 5V, 6.25mm × 11.25mm × 2.8mm
≤ 10V, 11.25mm × 9mm × 2.8mm
OUT
IN
IN
OUT
LGA Package
High V 1A DC/DC Step-Down μModule
3.6V ≤ V ≤ 36V, 0.8V ≤ V
IN
IN
LGA Package
High V 2A DC/DC Step-Down μModule
3.6V ≤ V ≤ 36V, 0.8V ≤ V
≤ 10V, 11.25mm × 9mm × 2.8mm
OUT
IN
IN
LGA Package
PolyPhase is a registered trademark of Linear Technology Corporation.
4614fa
LT 0809 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
●
© LINEAR TECHNOLOGY CORPORATION 2009
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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