LTM4636-1_技术文档

LTC7820

Fixed Ratio High Power

Inductorless (Charge Pump)

DC/DC Controller

FEATURES

n

DESCRIPTION

Low Profile, High Power Density, Capable of 500W+ The LTC^®7820 is a fixed ratio high voltage high power

n

switched capacitor/charge pump controller. The device

includes four N-channel MOSFET gate drivers to drive

external power MOSFETs in voltage divider, doubler or

inverter configurations. The device achieves a 2:1 step-

down ratio from an input voltage as high as 72V, a 1:2

step-up ratio from an input voltage as high as 36V, or a

1:1 inverting ratio from an input voltage up to 36V. Each

power MOSFET is switched with 50% duty cycle at a

constant pre-programmed switching frequency. System

efficiency can be optimized to over 99%. The LTC7820

provides a small and cost effective solution for high

power, non-isolated intermediate bus applications with

fault protection.

Soft Switching: 99% Peak Efficiency and Low EMI

V Max for Voltage Divider (2:1): 72V

IN

V Max for Voltage Doubler (1:2)/Inverter (1:1): 36V

Wide Bias V Range: 6V to 72V

CC

Soft Startup into Steady State Operation

6.5V to 40V EXTV Input for Improved Efficiency

CC

Input Current Sensing and Overcurrent Protection

Wide Operating Frequency Range: 100kHz to 1MHz

Output Short-Circuit/OV/UV Protections with

Programmable Timer and Retry

n

Thermally Enhanced 28-Pin 4mm × 5mm QFN Package

APPLICATIONS

The LTC7820 switching frequency can be linearly

programmedfrom100kHzto1MHz.Thedeviceisavailable

in a thermally enhanced 28-lead QFN package with some

no-connect pins for high voltage compatible pin spacing.

n

Bus Converters

High Power Distributed Power Systems

Communications Systems

Industrial Applications

n

All registered trademarks and trademarks are the property of their respective owners. Protected

by U.S. patents, including 9484799.

TYPICAL APPLICATION

Very High Efficiency 5A Voltage Divider

Efficiency and Power Loss

vs Load Current

10Ω

V

IN

48V/24V

R

SENSE

0.005Ω

0.1µF

100Ω

0.1µF

100

99

98

97

96

95

2.0

1.6

1.2

0.8

0.4

0

V

HIGH_SENSE

CC

G1

V

= 48V

= 24V

IN

OUT

EFFICIENCY

–

I

SENSE

0.1µF

BOOST1

+

I

SENSE

LTC7820

SW1

TIMER

10µF

×6

G2

f

s

= 100kHz

1µF

0.1µF

RUN

BOOST2

V

OUT

V

= 24V

IN

24V/12V

5A*

12V

EXTV

= 12V

CC

OUT

V

10Ω

LOW

INTV

10µF

CC

V

LOW_SENSE

0.1µF

G3

10k

1µF

POWER LOSS

UV

10k

BOOST3

0

1

2

3

4

5

HYS_PRGM

LOAD CURRENT (A)

10k

SW3

7820 TA01b

* LOAD CURRENT APPLIED

AFTER STARTUP

PGOOD

FREQ

G4

CC

INTV

CC

10k

40k

4.7µF

GND

FAULT

7820 TA01a

7820fc

1

For more information www.linear.com/LTC7820

LTC7820

ABSOLUTE MAXIMUM RATINGS

PIN CONFIGURATION

(Notes 1, 3)

TOP VIEW

V , V

....................................... –0.3V to 80V

CC HIGH_SENSE

BOOST1 ..................................................... –0.3V to 86V

BOOST2, BOOST3.......................................–0.3V to 51V

SW1.............................................................. –5V to 80V

SW3.............................................................. –5V to 45V

28 27 26 25 24 23

V

1

2

3

4

5

6

7

8

22

21

20

19

18

17

16

15

BOOST2

G2

HIGH_SENSE

NC

HYS_PRGM

TIMER

FREQ

V

, V

..................................... –0.3V to 45V

.......................................... –0.3V to 80V

LOW

LOW LOW_SENSE

+

–

V

29

GND

LOW_SENSE

I

, I

SENSE SENSE

BOOST3

G3

(BOOST1 - SW1), (BOOST2 - V

)............ –0.3V to 6V

LOW

RUN

(BOOST3 - SW3).......................................... –0.3V to 6V

PGOOD

UV

SW3

G4

INTV , RUN................................................ –0.3V to 6V

CC

EXTV , PGOOD........................................ –0.3V to 45V

9

10 11 12 13 14

UFD PACKAGE

HYS_PRGM, FREQ, TIMER, UV ............–0.3V to INTV

CC

FAULT ......................................................... –0.3V to 80V

INTV Peak Current (Note 10)............................150mA

Operating Junction Temperature

CC

28-LEAD (4mm × 5mm) PLASTIC QFN

T

= 125°C, θ = 43°C/W , θ = 3.4°C/W

JMAX

JA

JC(bottom)

EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB

Range (Notes 2, 11) ............................... –40°C to 125°C

Storage Temperature Range .................. –65°C to 150°C

http://www.linear.com/product/LTC7820#orderinfo

ORDER INFORMATION

LEAD FREE FINISH

LTC7820EUFD#PBF

LTC7820IUFD#PBF

TAPE AND REEL

PART MARKING*

7820

PACKAGE DESCRIPTION

28-Lead (4mm × 5mm) Plastic QFN

TEMPERATURE RANGE

–40°C to 125°C

LTC7820EUFD#TRPBF

LTC7820IUFD#TRPBF

7820

Consult ADI Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.

For more information on lead free part marking, go to: http://www.linear.com/leadfree/

For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through

designated sales channels with #TRMPBF suffix.

7820fc

2

For more information www.linear.com/LTC7820

LTC7820

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the specified operating

junction temperature range, otherwise specifications are at T_A= 25°C (Note 2). V_CC= 12V, V_RUN= 5V, unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Input/Output Voltage

V

IC Bias Voltage Range

6

0

72

36

V

CC

V

Voltage Range

(Note 6)

(Note 5)

VHIGH_SENSE

VLOW_SENSE

VLOW

HIGH_SENSE

LOW_SENSE

Voltage Range

LOW

I

Input DC Supply Current

Shutdown

Normal Operation

Q

V

RUN

V

RUN

= 0V

60

1.5

µA

mA

= 5V, No Switching

V

Undervoltage Lockout Threshold

V

Falling

Rising

4.85

5.05

V

UVLO

INTVCC

Overcurrent Protection

+

–

+

–

I

Pin Current

I

= I = 24V

SENSE

220

93

350

µA

ISENSE

SENSE

Pre-Balance Phase, V

= 24V,

= 12V,

mA

HIGH_SENSE

+

–

I

V

= I

= 24V, V

SENSE

SENSE VLOW

= 11V

VLOW_SENSE

–

l

I

Pin Current

–5

45

1

5

µA

ISENSE

+

–

V

Current Limit Threshold (V

– V )

ISENSE

50

55

mV

ISENSE

ISNESE

Gate Drivers

R

Pull-Up On-Resistance

Pull-Down On-Resistance

2.5

1.5

Ω

G2,4

R

Pull-Up On-Resistance

Pull-Down On-Resistance

2.4

1.1

Ω

G1,3

G1/G2 t

G3/G4 t

G1/G3 t

G2/G4 t

G1 Off to G2 On Delay Time

G2 Off to G1 On Delay Time

(Note 4)

50

ns

D

G3 Off to G4 On Delay Time

G4 Off to G3 On Delay Time

60

ns

G1 On to G3 On Delay Time

G3 Off to G1 Off Delay Time

5

10

ns

G2 On to G4 On Delay Time

G4 Off to G2 Off Delay Time

5

10

ns

RUN Pin

l

V

Run Pin On Threshold

Run Pin On Hysteresis

V

RUN

Rising

1.1

1.22

80

1.35

V

RUN

mV

RUN,HYS

INTV Regulator

CC

V

INTV Voltage No Load

6V < V < 72V, V

EXTVCC

= 0V

5.4

5.6

0.8

5.6

0.5

6.5

400

5.9

2

V

%

V

INTVCC_VCC

CC

INTV Load Regulation

I

= 0 to 60mA, V

CC EXTVCC

CC

INTV Voltage No Load with EXTV

12V < V < 45V (Note 7)

EXTVCC

5.9

2

INTVCC_EXT

CC

INTV Load Regulation with EXTV

I

= 0 to 50mA, V = 12V

EXTVCC

%

V

CC

EXTV Switchover Voltage

V

Ramping Positive (Note 9)

EXTVCC

6.35

6.65

CC

EXTV HYSTERESIS

mV

CC

V

and V

LOW_SENSE

HIGH_SENSE

R

V

to GND Resistance

Pin Current

1

MΩ

µA

VHIGH_SENSE

HIGH_SENSE

LOW_SENSE

I

V

= 51V, V = 45V

LOW_SENSE

10

VLOW_SENSE

CC

7820fc

3

For more information www.linear.com/LTC7820

LTC7820

ELECTRICAL CHARACTERISTICS ^Thel denotes the specifications which apply over the specified operating

junction temperature range, otherwise specifications are at T_A= 25°C (Note 2). V_CC= 12V, V_RUN= 5V, unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

V

LOW

+

I

Source Current to V

Sink Current from V

Pin from I

I

= V = 24V,

HIGH_SENSE

93

50

mA

SOURCEVLOW

LOW

SENSE

V

= 11V, V

= 12V, Timer = 1V

LOW_SENSE

+

LOW

I

Pin to GND

I

V

= V

= 24V,

LOW

SINKVLOW

LOW

SENSE

HIGH_SENSE

= 13V, V

= 12V, Timer = 1V

LOW_SENSE

Oscillator

f

I

Oscillator Frequency Range

Nominal Frequency

100

1000

kHz

µA

s

V

= 1.02V

500

–10

NOM

FREQ

FREQ Setting Current

= 1.02V (Note 3)

–9.5

–10.5

FREQ

FAULTB and HYS_PRGM

R

FAULT Pull-Down Resistance

FAULT Leakage Current

V

= 0.5V

= 80V

200

–10

400

2

Ω

µA

FAULT

I

FAULT_LEAK

HYS_PRGM

FAULT

l

HYS_PRGM Setting Current

= 1V (Note 3)

–9.3

–10.7

HYS_PRGM

V

Voltage Trigger Fault

V

= 24V, V = 0V

HYS_PRGM

VLOW_SENSE_FAULT

LOW_SENSE

VHIGH_SENSE

VLOW_SENSE

l

Ramp Up

12.2

11.6

12.3

11.7

12.4

11.8

V

Ramp Down

V

= 24V, V

= 5V

VHIGH_SENSE

VLOW_SENSE

HYS_PRGM

l

Ramp Up

12.7

11.1

12.8

11.2

12.9

11.3

V

Ramp Down

V

= 24V, V

= 2.4V

VHIGH_SENSE

VLOW_SENSE

HYS_PRGM

l

Ramp Up

14.15

9.5

14.3

9.65

14.45

9.8

V

Ramp Down

UV Comparator and PGOOD

V

UV Pin Comparator Threshold

Undervoltage Hysteresis

UV Pin Voltage Rising

0.985

1.01

120

150

1.035

V

mV

Ω

UVTH

UVHYS

R

PGOOD Pull-Down Resistance

PGOOD Leakage Current

V

= 0.5V

= 45V

300

1

PGOOD

I

µA

PGOOD_LEAK

PGOOD

Timer

I

Timer Pin Current

V

< 0.5V or V > 1.2V (Note 3)

TIMER

–3.5

–7

µA

TIMER

0.5V < V

< 1.2V (Note 3)

TIMER

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 4: Delay times are measured using 50% levels with SW3 = V

6V, SW1 = 12V.

Note 5: The maximum output operating voltage for divider applications is

36V, the maximum input operating voltage for doubler applications is 36V.

=

LOW

Note 2: The LTC7820 is tested under pulsed load conditions such that T

J

Note 6: The maximum input operating voltage for divider applications is

72V, the maximum output operating voltage for doubler applications is 72V.

≈ T . The LTC7820E is guaranteed to meet performance specifications

A

from 0°C to 85°C. Specifications over the –40°C to 125°C operating

junction temperature range are assured by design, characterization and

Note 7: When V > 15V, EXTV lower than V is recommended to

CC

improve efficiency and reduce IC Temperature.

Note 8: All the voltage is referred to the GND pin unless otherwise

specified.

correlation with statistical process controls. The LTC7820I is guaranteed

over the –40°C to 125°C operating junction temperature range. Note that

the maximum ambient temperature consistent with these specifications

is determined by specific operating conditions in conjunction with board

layout, the rated package thermal impedance and other environmental

factors. T is calculated from the ambient temperature T and power

Note 9: EXTV is enabled only if V is higher than 7V.

CC

Note 10: Guaranteed by design.

Note 11: This IC includes overtemperature protection that is intended

to protect the device during momentary overload conditions. Junction

temperature will exceed 125°C when overtemperature protection is active.

Continuous operation above the specified maximum junction temperature

may impair device reliability or permanently damage the device.

J

A

dissipation P according to the following formula:

D

T = T + (P • 43°C/W).

J

A

D

Note 3: All currents into device pins are positive; all currents out of device

pins are negative. All voltages are referenced to ground unless otherwise

specified.

7820fc

4

For more information www.linear.com/LTC7820

LTC7820

T_A= 25°C, unless otherwise noted.

TYPICAL PERFORMANCE CHARACTERISTICS

Efficiency vs Load Current

48V to 24V Voltage Divider in

Figure 7

Efficiency vs Load Current

24V to 12V Voltage Divider in

Figure 7

Efficiency vs Load Current

24V to 48V Voltage Doubler in

Figure 8

100.0

99.5

99.0

98.5

98.0

97.5

97.0

96.5

96.0

95.5

95.0

100.0

99.5

99.0

98.5

98.0

97.5

97.0

96.5

96.0

95.5

95.0

100.0

99.5

99.0

98.5

98.0

97.5

97.0

96.5

96.0

95.5

95.0

f

= 150kHz

= 200kHz

= 250kHz

= 300kHz

f

S

f

S

f

S

f

S

= 150kHz

= 200kHz

= 250kHz

= 300kHz

f

= 150kHz

= 200kHz

= 250kHz

= 300kHz

S

1

3

5

7

9

11

13

15

10

1

3

5

7

9

11

13

15

0.5 1.5 2.5 3.5 4.5 5.5 6.5 7.5

LOAD CURRENT (A)

7820 G01

7820 G02

7820 G03

Output Voltage vs Load Current

48V to 24V Voltage Divider in

Figure 7

Output Voltage vs Load Current

24V to 48V Voltage Doubler in

Figure 8

Efficiency vs Load Current

24V to –24V Inverter in Figure 9

98.0

97.5

97.0

96.5

96.0

95.5

95.0

94.5

94.0

93.5

93.0

24.05

24.00

23.95

23.90

23.85

23.80

23.75

23.70

23.65

23.60

23.55

48.1

48.0

47.9

47.8

47.7

47.6

47.5

47.4

47.3

47.2

47.1

f

= 150kHz

= 200kHz

= 250kHz

= 300kHz

f

= 150kHz

= 200kHz

= 250kHz

= 300kHz

S

f

= 150kHz

= 200kHz

= 250kHz

= 300kHz

S

0

2

4

6

8

–1

1

3

5

7

9

11 13 15

0

1

2

3

4

5

6

7

8

LOAD CURRENT (A)

7820 G04

7820 G05

7820 G06

Output Voltage vs Load Current

24V to –24V Inverter in Figure 9

Steady State Output Ripple

in Figure 7

Load Transient 0A-10A-0A

48V to 24V Divider in Figure 7

–22.8

–23.0

–23.2

–23.4

–23.6

–23.8

–24.0

–24.2

f

= 250kHz

S

150kHz

200mV/DIV

AC-COUPLED

V

OUT

200mV/DIV

AC-COUPLED

200kHz

200mV/DIV

AC-COUPLED

250kHz

200mV/DIV

AC-COUPLED

I

LOAD

5A/DIV

f

= 150kHz

= 200kHz

= 250kHz

= 300kHz

S

7820 G08

7820 G09

V

I

= 48V

OUT

LOAD

10µs/DIV

50µs/DIV

IN

= 24V

= 10A

0

2

4

6

8

LOAD CURRENT (A)

7820 G07

7820fc

5

For more information www.linear.com/LTC7820

LTC7820

T_A= 25°C, unless otherwise noted.

TYPICAL PERFORMANCE CHARACTERISTICS

V_CCShutdown Current vs

Temperature

Driver Voltage vs Frequency, in

Figure 7

INTV_CCLine Regulation

85

80

75

70

65

60

55

50

45

40

6

5

4

3

2

1

0

5.8

5.6

5.4

5.2

5.0

4.8

4.6

4.4

4.2

4.0

125°C

–45°C

25°C

125°C

25°C

–45°C

125°C

25°C

–45°C

125°C

25°C

V

= 12V

= 48V

= 72V

CC

–45°C

–50

0

50

100

150

0

10 20 30 40 50 60 70 80

0

200

400

600

800 1000 1200

TEMPERATURE (°C)

V

VOLTAGE (V)

FREQUENCY (kHz)

CC

7820 G11

7820 G10

INTV

CC

BOOST3-SW3

BOOST2-V

LOW

BOOST1-SW1

7820 G12

Short-Circuit and Retry

24V to 12V Divider

Start-Up 48V to 24V Voltage

Divider, RUN Pin FLOAT

Shutdown 48V to 24V Voltage

Divider, RUN Pin FLOAT

V

IN

V

IN

20V/DIV

V

OUT

20V/DIV

10V/DIV

V

OUT

V

OUT

20V/DIV

TIMER

5V/DIV

RUN

5V/DIV

FAULT

10V/DIV

SW3

20V/DIV

SW3

20V/DIV

SW3

20V/DIV

7820 G13

7820 G14

7820 G15

200ms/DIV

100ms/DIV

Input Current During Short Circuit

48V to 24V Divider

Voltage Divider Line Transient

t_r= t_r= 100µs, f_S= 500kHz

Divider Efficiency

vs C_FLYin Figure 11

100

99

98

97

96

48V to 24V AT 10A LOAD

V

IN

20V/DIV

V

IN

5V/DIV

V

OUT

20V/DIV

V

OUT

5V/DIV

I

IN

20A/DIV

SW3

10V/DIV

SW3

50V/DIV

24V to 12V AT 20A LOAD

7820 G16

7820 G17

5µs/DIV

100µs/DIV

8

10

12

14

16

QUANTITY OF 10µF C IN PARALLEL

FLY

7820 G18

7820fc

6

For more information www.linear.com/LTC7820

LTC7820

PIN FUNCTIONS

UV (Pin 8): Undervoltage Comparator Input. If the UV

pin voltage is lower than 0.9V, the PGOOD pin is pulled

down while the controller keeps switching. If the UV pin

voltage is higher than 1V and no faults exist, PGOOD pin

HYS_PRGM (Pin 3): A resistor connected between this

pin and ground will program the two thresholds of the

window comparator that monitors the voltage difference

between V

/2 and V

. There is a 10µA

HIGH_SENSE

LOW_SENSE

is released. Connect to INTV if not used.

current flowing out of this pin.

CC

+

I

(Pin 27): Current Sense Comparator Positive

G4 (Pin 15): High Current Gate Drive for the Bottom

SENSE

Input. Kelvin connected to the positive node of the cur-

rent sensing resistor. The current sensing resistor has to

be connected to the drain of the very top MOSFET. When

the voltage between I

than 50mV, the controller indicates an overcurrent fault

by pulling the FAULT pin down. The I

used to source 93mA current to the V

capacitor’s pre-balancing time at power-up in voltage

divider applications. Connect directly to the drain of the

very top MOSFET if not used.

(Synchronous) N-Channel MOSFET. Voltage swing at this

pin is from ground to INTV .

CC

G3 (Pin 17): High Current Gate Drive for the Third Upper

Most N-Channel MOSFET. This is the output of the floating

driver with a voltage swing from BOOST3 to SW3.

+

–

pin and I

pin is higher

SENSE

+

pin is also

SENSE

LOW

G2(Pin21):HighCurrentGateDrivefortheSecondUpper

pin during the

most N-Channel MOSFET. This is the output of the floating

driver with a voltage swing from BOOST2 to V

.

LOW

G1 (Pin 24): High Current Gate Drive for the Upper most

N-ChannelMOSFET.Thisistheoutputofthefloatingdriver

with a voltage swing from BOOST1 to SW1.

–

I

(Pin 28): Current Sense Comparator Negative

SENSE

Input. Kelvinconnectedtothenegativenodeofthecurrent

sensing resistor. Short to I

+

if not used.

SENSE

SW1/SW3 (Pin 25/Pin 16): Switch Node Connections.

RUN(Pin6):RunControlInput. ForcingRUNbelow1.14V

shutsdownthecontroller.WhenRUNishigherthan1.22V,

internal circuitry starts up. There is a 1µA pull-up current

flowing out of RUN pin when the RUN pin voltage is below

1.14V and additional 5µA current flowing out of RUN pin

when the Run pin voltage is above 1.22V.

BOOST1, BOOST2, BOOST3 (Pins 23, 22, 18): Boot-

strapped supplies to the floating drivers. Capacitors are

connectedbetweentheseBOOSTpinsandtheirrespective

SWn and V

pins.

LOW

EXTV (Pin 11): External Power Input to EXTV LDO.

CC

This LDO supplies INTV power whenever EXTV is

CC

TIMER (Pin 4): Charge Balance and Fault Timer Control

Input. A capacitor between this pin and ground sets the

higher than 6.5V and V is higher than 7V. Do not exceed

CC

40V on this pin.

amount of time to charge V

to V

/2 voltage

LOW

HIGH_SENSE

INTV (Pin12):OutputoftheInternalLinearLowDropout

CC

during power-up. It also sets the short-circuit retry time.

Regulator.Thedriverandcontrolcircuitsarepoweredfrom

thisvoltagesource.Mustbebypassedtopowergroundwith

a minimum of 4.7µF ceramic or other low ESR capacitor.

See the Application Information section for details.

FAULT (Pin 9): Open Drain Output Pin. FAULT is pulled to

ground when the V

voltage is out of its window

LOW_SENSE

thresholds or the voltage between I

+

–

V

(Pin 14): Power Supply for Internal Circuitry and

CC

and I

is

SENSE

INTV Linear Regulator. A bypass capacitor should be

higher than 50mV. FAULT pin is also pulled to ground

tied between this pin and the power ground.

under INTV UVLO.

CC

V

(Pin 1): Kelvin Sensing Input. Monitor the

HIGH_SENSE

voltage of the drain of the top MOSFET.

PGOOD (Pin 7): Open Drain Output Pin. PGOOD is pulled

to ground if there are any faults or if the UV pin indicates

an undervoltage condition.

7820fc

7

For more information www.linear.com/LTC7820

LTC7820

PIN FUNCTIONS

V

(Pin 20): Half Supply from V

. Connect a

HIGH_SENSE

GND (Exposed Pad Pin 29): Signal and Power Ground. All

small-signal components should connect to this ground,

which in turn connects to system power ground at one

point. The exposed pad must be soldered to the PCB,

providingalocalgroundforthecontrolcomponentsofthe

IC, which should be tied to system power ground under

the IC. For inverter applications, GND should connect to

the negative output and all small signal components still

referred to GND pin.

LOW

bypass capacitor from this node to PGND.

V

(Pin 19): Kelvin Sensing Input. Monitors the

LOW

LOW_SENSE

voltage on V

.

FREQ(Pin5):FrequencySetPin.Thereisaprecision10µA

current flowing out of this pin. A resistor to ground sets

a voltage which in turn programs the frequency. See the

Applications Information section for detailed information.

NC (Pins 2, 10, 13, 26): No Connection. Always keep

these pins floating. These pins are intentionally skipped

to isolate adjacent high voltage pins.

7820fc

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LTC7820

BLOCK DIAGRAM

V

HIGH

1

V

HIGH_SENSE

V

LOW_SENSE

R2

500k

VHYS_PRGM

R3

500k

+

–

I

SENSE

INTV

CC

27

28

R

C

SENSE

F

R

OVERCURRENT

COMPARATOR

50mV THRESHOLD

F

10µA

HYS_PRGM

FREQ

3

5

BOOST1

G1

INTV

CC

23

24

M1

93mA

50mA

10µA

B1

0.1µF

OSC

V

CC

DB1

SW1

25

1µA ~ 6µA

CC

RUN

6

BOOST2

G2

INTV

22

21

CONTROL

LOGIC

M2

V

C

3.5µA ~ 7µA

B2

TIMER

UV

4

8

1µF

ANTI-

SHOOT-THROUGH

DB2

–

V

LOW

20

19

LOW

C

FLY

+

1.01V

V

LOW_SENSE

BOOST3

C

VLOW

120mV

HYSTERESIS

PGOOD

7

9

18

17

G3

M3

C

UVLO

B3

1µF

FAULT

DB3

SW3

16

INTV

CC

12

15

EXTV

V

CC

G4

LDO

M4

EXTV > 6.5V

CC

C

INTVCC

4.7µF

AND V > 7V

CC

EXTV

CC

V

CC

GND

11

14

29

7820 BD

7820fc

9

For more information www.linear.com/LTC7820

LTC7820

OPERATION

Main Control

INTV /EXTV Power

CC CC

The LTC7820 is a constant frequency, open loop switched

capacitor/charge pump controller for high power and high

voltage applications. Please refer to the Block Diagram

for the following discussion on its operation. In steady

state operation, the N-channel MOSFETs M1 and M3 are

turned on and off in the same phase with around 50%

duty cycle at a pre-programmed switching frequency.

The N-channel MOSFETs M2 and M4 are turned on and

off complementarily to MOSFETs M1 and M3. The gate

drive waveforms are shown in Figure 1.

Power for the quad N-channel MOSFET drivers and most

other internal circuitry is derived from the INTV pin.

CC

Normally an internal 5.5V linear regulator supplies INTV

CC

power from V . If V is connected to a high input volt-

CC

age, an optional external voltage source on the EXTV

CC

pin enables a second 5.5V linear regulator and supplies

INTV power from the EXTV pin. To enable this more

CC

efficient second regulator, V needs to be higher than 7V

CC

and the EXTV pin voltage has to be higher than 6.5V.

CC

Do not exceed 40V on the EXTV pin. Each top MOSFET

CC

driver is biased from the floating bootstrap capacitors

V

GS

C , which are normally recharged during each off cycle

B

~ 50% DUTY CYCLE

through an external Schottky diode when the respective

top MOSFET turns off.

M1

M2

M3

M4

T

S

Start-Up and Shutdown

The LTC7820 is in shutdown mode when the RUN pin is

lower than 1.14V. In this mode, most internal circuitry is

turnedoffincludingtheINTV regulatorandtheLTC7820

CC

consumes less than 100μA current. All gates G1/G2/G3/

G4 are actively pulled low to turn off the external power

MOSFETs in shutdown. Releasing RUN allows an internal

1µA current to pull up this pin and enable the controller.

Oncetherunpinrisesabove1.22V,anadditional5µAflows

out of this pin. Alternately, the RUN pin may be externally

pulled up or driven directly by logic. Do not exceed the

Absolute Maximum Rating of 6V on this pin.

PHASE 1

PHASE 2

PHASE 1

PHASE 2

7820 F01

Figure 1. Gate Drive Waveforms

After the Run pin is released and the INTV voltage

CC

passes UVLO, the LTC7820 starts up and monitors the

During phase 1, M1 and M3 are on and the flying capaci-

tor C is in series with C . During phase 2, M2 and

V

and V

voltages continuously. The

HIGH_SENSE

LOW_SENSE

FLY

VLOW

LTC7820 starts switching only if V

voltage is

LOW_SENSE

M4 are on and C is in parallel with C

. The V

FLY

VLOW

LOW

close to half of V

voltage or both V

HIGH_SENSE

pin voltage is always close to half of the top voltage at the

drain of MOSFET M1 (refer to GND pin) in steady state,

and it is not sensitive to variable loads due to the very low

impedance at its output. The LTC7820 does not regulate

the output voltage with a closed-loop feedback system.

However, it stops switching when fault conditions occur,

and V

voltages are close to GND. In voltage

HIGH_SENSE

divider applications, V

is pre-balanced to half the

LOW

V

voltage and the LTC7820 may start up with

HIGH_SENSE

capacitors at different initial conditions.

Fault Protection and Thermal Shutdown

such as V

pin voltage overvoltage or undervoltage, an

LOW

overcurrenteventoranovertemperatureprotectionevent.

The LTC7820 monitors system voltage, current and

temperature for faults. It stops switching and pulls down

theFAULTpinwhenfaultconditionsoccur. Toclearvoltage

faults, the V

pin voltage has to be within the

LOW_SENSE

7820fc

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LTC7820

OPERATION

programmed window around half of V

voltage

100k resistor from the FREQ pin to GND). In the linear

HIGH_SENSE

voltages must be

or the V

and V

region, the switching frequency, f , can be estimated

HIGH_SENSE

LOW_SENSE

S

lower than 1V and 0.5V respectively. To clear the current

based on the equation:

+

–

fault, the voltage drop from I

pin to I

pin has

SENSE

f (kHz) = R

(kΩ) • 8 – 317kHz

S

FREQ

to be lower than 50mV. To clear temperature faults, the

IC temperature has to be lower than 165°C.

Figure 2 also shows the relationship between the voltage

on the FREQ pin and switching frequency.

The FAULT pin may be pulled up by external resistors to

voltages up to 80V. It can be used to control an external

disconnect FET to isolate the input and output during fault

conditions.

1400

1200

1000

800

600

400

200

0

High Side Current Sensing

For over current protection, the LTC7820 uses a sense

resistorR

tomonitorthecurrent.Thesensingresistor

SENSE

has to be placed at the drain of the very top MOSFET M1.

For voltage divider and inverter applications, the current

flows into the drain of the MOSFET M1, so the I

+

SENSE

should be connected to the sensing resistor then to the

drainoftheMOSFETM1. Forvoltagedoublerapplications,

0

0.5

1

1.5

2

2.5

FREQ PIN VOLTAGE (V)

7820 F02

the current flows out of the drain of the MOSFET M1, so

+

the I

pin should be connected directly to the drain

Figure 2. Relationship Between Switching Frequency

and Voltage at the FREQ Pin

SENSE

of the MOSFET M1. See Typical Applications section for

examples. In most applications, the current through the

senseresistorisapulsecurrentandthepeakvalueismuch

Power Good and UV (PGOOD and UV pins)

higher than the average load current. A RC filter on the

–

When the UV pin voltage is lower than 1V, the PGOOD

pin is pulled low. The PGOOD pin is also pulled low when

the RUN pin is low or when the LTC7820 is starting up.

The PGOOD pin is released only when the LTC7820 is

switching and UV pin is higher than 1V. The PGOOD pin

will flag power bad immediately when the UV pin is low.

However, there is an internal 20μs power good mask and

120mV hysteresis when UV goes higher than 1V. The

PGOOD pin may be pulled up by external resistors to

sources up to 45V.

I

pin, with a time constant lower than the switching

SENSE

frequency,maybeusedtosettheprecisionaveragecurrent

protection. If overcurrent protection is not desired, short

+

–

the I

and I

pins together and connect them

SENSE

to the drain of the top MOSFET M1 directly.

Frequency Selection

Theselectionofswitchingfrequencyisatrade-offbetween

efficiency and component size. Low frequency operation

increasesefficiencybyreducingMOSFETswitchinglosses,

but requires larger capacitance to maintain low output

ripplevoltageandlowoutputimpedance.TheFREQpincan

be used to program the controller’s operating frequency

from 100kHz to 1MHz. There is a precision 10µA current

flowing out of the FREQ pin, so the user can program the

controller’s switching frequency with a single resistor to

GND.ThevoltageontheFREQpinisequaltotheresistance

multiplied by 10μA current (e.g. the voltage is 1V with a

PGOOD signal can be used to enable or disable the output

loads. If the loads are switching mode converters or LDOs

with ENABLE/RUN pins, this allows easy for interfacing.

With proper setup on the UV pin, PGOOD can enable the

loads at the output when the output voltage is above a

certain value. PGOOD can also be used to control the RUN

pin of another LTC7820 if two or more parts are cascaded

to achieve higher step-down ratios.

7820fc

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For more information www.linear.com/LTC7820

LTC7820

APPLICATIONS INFORMATION

The Typical Application on the first page of this data sheet

is a LTC7820 voltage divider circuit. For voltage divider

applications, the input voltage is at the drain of very top

When the power MOSFETs are on, ideally, the inrush

charge current,

V – V

R_{ON_M1}+R_{ON_M3}

– V

LOW

IN

CFLY

MOSFET M1 and the output voltage is at the V

pin,

I=

LOW

which is connected to the source of MOSFET M2 and the

drain of MOSFET M3. The output voltage is around half

of the input voltage in steady state. Alternately, by swap-

ping the input and output voltages, the voltage divider

circuit can be transformed into a voltage doubler circuit.

For voltage doubler applications, the input voltage is at

when switches M1 and M3 are on and:

V_CFLY– V

R_{ON_M2}+R_{ON_M4}

LOW

I=

the V

pin while output voltage is available at the drain

LOW

when switches M2 and M4 are on. Both currents are lim-

ited by the power MOSFET saturation current. With very

of the top MOSFET M1 and equals two times the input

voltage as shown in Figure 8. Similarly, for inverter ap-

plications, the input voltage is applied between the drain

low R

of the external power MOSFETs, the inrush

DS(ON)

charge current could easily achieve several hundreds of

Amperes which can be higher than the MOSFET’s Safe

Operating Area (SOA).

of the top MOSFET M1 and V

, and the output voltage

LOW

equals the negative input voltage at the GND pin with

respect to the V pin as shown in Figure 9. For divider

LOW

The LTC7820 provides a proprietary pre-balance method

to minimize the inrush charging current in voltage

divider applications. The LTC7820 controller detects the

applications, iftheloadcurrentisappliedbeforestartupor

heavy resistive loads are connected to the VLOW pin, the

LTC7820 may not start up due to the limited drive ability

of the pre-balance circuit. A disconnect FET may be used

at the output for soft-start up. For doubler and inverter

applications, a disconnect FET may also be required for

softstart-upandshutdown.ThedisconnectFETsindivider/

doubler/inverter applications may be also controlled by

hot swap controllers to achieve more programmable slew

rates and fault protections.

V

pin voltage before switching and compares

LOW_SENSE

it with the V

/2 internally. If the V

HIGH_SENSE

LOW_SENSE

voltage is much lower than the V

/2, a current

pin to pull

HIGH_SENSE

source will source 93mA current to the V

LOW

the V

pin up. If the V

pin voltage is much

LOW

LOW_SENSE

higher than the V

/2, another current source

HIGH_SENSE

will sink 50mA from V

pin to pull the V

pin down.

LOW

If the V

pin voltage is close to V

/2

HIGH_SENSE

LOW_SENSE

Voltage Divider Pre-Balance before Switching

and within the pre-programmed window, both current

sources are disabled and LTC7820 starts switching. If

In voltage divider applications, the V

voltage

LOW_SENSE

/2 in steady state.

the V

voltage is still within the window after 36

LOW_SENSE

should be always close to V

HIGH_SENSE

switching cycles, the FAULT pin is released.

The voltages across the flying capacitors and V

ca-

LOW

pacitors are close to each other and close to half of the

input voltage. The charging inrush current is minimized

duringeachswitchingcyclebecausethevoltagedifference

between capacitors is small. However, without special

methods such as the LTC7820 pre-charging circuitry,

For voltage divider with pre-balance startup, the LTC7820

assumes no load current or a very small load current (less

than 50mA) at the V

age cannot reach V

(output) otherwise the V

HIGH_SENSE

volt-

LOW

/2 and the LTC7820 never

starts up. This no load condition can be achieved by con-

necting the FAULT pin to the enable pins of the following

electrical loads such as switching regulators and LDOs.

If load current cannot be controlled off such as resistive

loads, a disconnect FET is required to disconnect the load

during startup as shown in the typical applications.

during start-up or fault conditions such as V

short to

LOW

GND, the difference between capacitors can be large and

chargingcurrentsmaybegreatenoughtocausepermanent

MOSFET damage.

7820fc

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LTC7820

APPLICATIONS INFORMATION

If the LTC7820 divider input voltage is controlled by a

front end supply or hot swap controller and ramps up

slowly, the LTC7820 capacitor voltages are naturally bal-

anced. In this case the pre-balance and no load start-up

requirements are not necessary.

voltage higher than the 50mV threshold at heavy loads.

To prevent the inrush current from falsely triggering the

overcurrent protection, an RC filter is required at the

+

–

I

pin and I

. The RC filter timer constant has

SENSE

to be larger than a switching period. Typically a 100Ω and

0.1µF filter is good for most of applications. Due to the

+

Voltage Doubler and Inverter Startup and Disconnect

current flowing into the I

pin, the resistor of the

SENSE

–

+

RC filter has to be placed at the I

pin. I

SENSE

In voltage doubler and inverter applications, LTC7820 can

startup without capacitor inrush charging current if the

input voltage is ramping slowly up from zero. As long as

the input voltage ramps up slow (in milliseconds), the

output voltage can track the input voltage and the voltage

difference between capacitors are always small resulting

in no huge inrush currents. The slew rate control of the

input voltage can be achieved by using a disconnect FET

at input or using hot swap controllers as shown in the

typicalapplicationsection.Differentfromvoltagedividers,

the voltage doubler and inverter applications have to start

up from zero input voltage every time, but they can start

up with heavy load currents directly.

needs to be connected to the sensing resistor directly. The

current limit can be selected by choosing different sense

resistor values. For example, the 10mΩ sense resistor

sets current limit at 50mV/10mΩ = 5A ideally. Due to the

switching ripple, the actual current limit is always lower

than the ideal case. In real circuits, the current limit is

around 4.2A with 0.1µF/100Ω filter and 200kHz switch-

ing frequency. The LTspice^®simulation tool can be used

to quantify the switching ripple.

The overcurrent protection can also be used in doubler

and inverter applications for overcurrent and short-circuit

conditions at both startup and steady state operation. If

+

over current protection is not used, short the I

SENSE

Notethatvoltagedividerapplicationscanalsostartupwith

a slow ramping input voltage from zero to the steady state

operation if there is a hot swap in front of the LTC7820,

(pre-balance is not required).

–

and the I

pin together and connect them to the drain

SENSE

of the top MOSFET M1.

Window Comparator Programming

Overcurrent Protection

Innormaloperation,V

close to half of the V

voltageshouldbealways

voltage. A floating win-

LOW_SENSE

HIGH_SENSE

The LTC7820 provides overcurrent protection through

a sensing resistor placed on the high voltage side. A

precision rail to rail comparator monitors the differential

dow comparator monitors the voltage on the V

LOW_SENSE

pin and compares it with V

/2. The hysteresis

HIGH_SENSE

+

–

window voltage can be programmed and is equal to the

voltage at the HYS_PRGM pin. There is a precision 10µA

current flowing out of HYS_PRGM pin. A single resistor

from HYS_PRGM pin to GND sets the HYS_PRGM pin

voltage, which equals the resistor value multiplied by

10µA current (e.g. the voltage is 1V with a 100k resistor

from the HYS_PRGM pin to GND). With a 100k resistor

voltage between the I

pin and the I

pin which

SENSE

are Kelvin connected to a sensing resistor. Whenever the

+

–

I

pin voltage is 50mV higher than the I

SENSE

voltage,anovercurrentfaultistriggeredandtheFAULTpin

is pulled down to ground. At the same time the LTC7820

stops switching and starts retry mode based on the timer

pin setup. The overcurrent fault will be cleared when the

timer pin voltage reaches 4V and the voltage across the

sensing resistor is less than 50mV. The current through

the sensing resistor is a pulse current during charging/

discharging of the flying capacitors, which may result a

on the HYS_PRGM pin, the V

/2 voltage has to

HIGH_SENSE

1V) window during startup and

be within a (V

LOW_SENSE

normal operation, otherwise a fault is triggered and the

LTC7820 stops switching.

7820fc

13

For more information www.linear.com/LTC7820

LTC7820

APPLICATIONS INFORMATION

Thehysteresiswindowvoltagecanbelinearlyprogrammed

from 0.3V to 2.4V as shown in Figure 3 with different

resistor values on the HYS_PRGM pin. If the HYS_PRGM

R

OUT

V

LOW

V

IN

G1

SW1

pin is tied to INTV , a default 0.8V hysteresis window is

CC

appliedinternally.Thehysteresiswindowvoltagehastobe

G2

G3

programmed large enough to tolerate the V

pin volt-

LOW

V

LOW

C

FLY

V /2

IN

C

VLOW

age ripple and voltage drop at maximum load conditions.

2.5

C

VLOW

SW3

G4

2

1.5

1

7820 F04

Figure 4. Thevenin Equivalent Circuit of Voltage Divider

0.5

0

Effective Open Loop Output Resistance and Load

Regulation

0

1

2

3

(V)

4

5

TheLTC7820doesnotregulatetheoutputvoltagethrough

aclosedloopfeedbacksystem.However,theoutputvoltage

is not sensitive to load conditions due to the low output

resistance when it is operating with large flying capacitors

and high switching frequency. The Thevenin equivalent

circuit of voltage divider circuit is shown in the Figure 4.

V

HYS_PRGM

7820 F03

Figure 3. Relationship Between HYS_PRGM Pin Voltage and

V_{LOW_SENSE}Window Comparator Voltage

During an input line transient, as long as the change of

the input voltage in each switching cycle is less than the

window hysteresis voltage, LTC7820 keeps switching and

theoutputvoltagetrackstheinputvoltagecyclebycycle.If

When duty cycle is around 50%,

1

S DS(ON)

–

4f R

C

FLY

1+e

the input voltage step is large enough to force V

LOW_SENSE

R_OUT

=

1





_FLY



out of the window within one switching period, a fault is

triggered. The LTC7820 stops switching and starts its

retry sequence based on the TIMER pin setup.

–



4f R

C

S DS(ON)

4f C

1– e

_FLY

S









To make the window comparator work precisely,

HIGH_SENSE

connection to the capacitor at the drain of the top MOSFET

M1 and the capacitors from V to GND respectively.

Small RC filters may be used on these two pins to reject

noise higher than the switching frequency.

V

and V

pins are provided for Kelvin

where:

f is the switching frequency

LOW_SENSE

S

LOW

C

FLY

is the flying capacitor

R

is the on resistance of one MOSFET (G1 to G4)

DS(ON)

7820fc

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LTC7820

APPLICATIONS INFORMATION

Forexample,theLTC7820INTV currentislimitedtoless

At low switching frequencies, R

= 1/(4f C ). As

CC

OUT

S FLY

than 27mA from a 48V supply in the UFD package and not

frequency increases, R

finally approaches 2R

.

DS(ON)

OUT

using the EXTV supply:

In high power applications, it is suggested to select the

switching frequency around 1/(16C ) or higher

CC

R

FLY DS(ON)

T = 70°C + (27mA)(48V)(43°C/W) = 125°C

J

for decent load regulation and efficiency. At heavy load

conditions, the output voltage will drop from V /2 by

Whereambienttemperatureis70°Candthermalresistance

from junction to ambient is 43°C/W

IN

R

• I

. In many applications, multi-layer ceramic

OUT

LOAD

capacitors (MLCC) are selected as flying capacitors. The

voltage coefficients of MLCC capacitors strongly depend

onthetypeandsizeofcapacitors.NormallylargersizeX7R

MLCC capacitors are better than X5R in terms of voltage

coefficient. The capacitance still drops 20% to 30% with

high DC bias voltage. Capacitance derating needs to be

consideredwhenestimatingtheoutputresistanceofthese

switched capacitor circuits.

To prevent the maximum junction temperature from being

exceeded, the input supply current must be checked while

operating at maximum V . When the voltage applied to

IN

EXTV rises above 6.5V and V above 7V, the INTV

CC

linear regulator is turned off and the EXTV linear regu-

CC

lator is turned on. Using the EXTV allows the MOSFET

CC

driver and control power to be derived from other high

efficiency sources such as the V

pin of a 48V to 24V

LOW

voltage divider or other voltage rails in the system. Using

INTV Regulators and EXTV

CC

EXTV cansignificantlyreducetheICtemperatureinhigh

CC

V applications.TyingEXTV totheoutput(24V)reduces

TheLTC7820featuresaninternalPMOSLDOthatsupplies

power to INTV from the V supply. INTV powers the

IN

CC

the junction temperature in the previous example to:

CC

gate drivers and most of the LTC7820’s internal circuitry.

ThelinearregulatorregulatesthevoltageattheINTV pin

T = 70°C + (27mA) (24V) (43°C/W)

J

CC

= 98°C

to 5.5V when V is greater than 6V. EXTV connects to

CC

INTV through another PMOS LDO and can supply the

CC

Do not apply more than 40V to the EXTV pin.

CC

needed power when its voltage is higher than 6.5V and

V

is higher than 7V. Each of these can supply a peak

Topside MOSFET Driver Supply (C , D )

CC

B

current of 150mA and must be bypassed to ground with a

minimumof4.7µFceramiccapacitororlowESRelectrolytic

capacitor.Nomatterwhattypeofbulkcapacitorisused,an

additional0.1µFceramiccapacitorplaceddirectlyadjacent

External bootstrap capacitors C /C /C in the Block

B1 B2 B3

Diagram, connected to the BOOST pins, supply the gate

drive voltages for the top side MOSFETs M1/M2/M3.

Capacitor C in the Block Diagram is charged though

B3

totheINTV andGNDpinsishighlyrecommended. Good

CC

external Schottky diode D from INTV when the SW3

B3

CC

bypassing is needed to supply the high transient currents

required by the MOSFET gate drivers.

pin is low. Capacitor C is charged through D from

B2

BOOST3whentheSW3pinishigh.CapacitorC ischarged

B1

HighinputvoltageapplicationsinwhichlargeMOSFETsare

being driven at high frequencies may cause the maximum

junctiontemperatureratingfortheLTC7820tobeexceeded.

throughD fromBOOST2whentheSW1pinislow.When

B1

the MOSFETs M1/M2/M3 are to be turned on, the driver

places the C /C /C voltage across the gate source of

B1 B2 B3

TheINTV current,whichisdominatedbythegatecharge

theMOSFETsM1/M2/M3.ThisenhancestheMOSFETsand

CC

current, may be supplied by either the 5.5V linear regula-

turnsthemon.Theswitchnodevoltage,SW1/SW3,risesto

+

tor from V or the linear regulator from EXTV . When

I

/V

andtheBOOSTpinfollows.Withcontinuous

CC

SENSE

LOW

the voltage on the EXTV pin is less than 6.5V, the linear

switching, the gate driver voltages on C /C /C are:

CC

B1 B2 B3

regulator from V is enabled. Power dissipation for the

CC

V

CB3

V

CB2

V

CB1

= V

– V

INTVCC

DB3

IC in this case is highest and is equal to V • I

. The

CC INTVCC

– V

gate charge current is dependent on operating frequency.

The junction temperature can be estimated by using the

equations given in Note 2 of the Electrical Characteristics.

DB2

– V

DB1

7820fc

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For more information www.linear.com/LTC7820

LTC7820

APPLICATIONS INFORMATION

3.5µA CHARGE

TIMER PIN

3.5µA CHARGE

4V

TIMER PIN

7µA CHARGE

TIMER PIN

1.2V

0.5V

FAULT

LOW

FAULT

RELEASE

PRE-BALANCE TIME

7820 F05

Figure 5. Timer Behavior During Fault or Startup

The value of the boost capacitors, C /C /C , needs

Fault Response and Timer Programming

B1 B2 B3

to be 100 times that of the total input capacitance of the

topside MOSFET(s). The standard 6.3V MLCC ceramic ca-

The LTC7820 stops switching and pulls the FAULT pin

low during fault conditions. A capacitor connected from

the TIMER pin to GND sets the retry time to start-up if

fault conditions are removed. A typical waveform on the

TIMER pin during a fault condition is shown in Figure 5.

pacitorsaregoodforC /C /C .Thereversebreakdown

B1 B2 B3

of the external Schottky diodes must be greater than the

maximum operation voltage between the V

and GND

LOW

pins. When adjusting the gate drive level, the final arbiter

is the threshold voltage of the top MOSFET M1. The Top

After the FAULT pin is pulled low, a 3.5µA pull-up current

flows out of TIMER pin and starts to charge the Timer

capacitor. The pull-up current increases to 7µA when the

TIMER pin voltage is higher than 0.5V and back to 3.5µA

when the TIMER pin voltage is higher than 1.2V. The

TIMER pin will be strongly pulled down whenever the

fault conditions are removed or the TIMER pin voltage is

higher than 4V. When the TIMER pin voltage is between

0.5V and 1.2V, the internal pre-balance circuit will source

driver voltage V

has to be higher than the top FET M1

CB1

threshold voltage in all conditions. Logic level MOSFET

should be used, otherwise lower operating switching

frequency and lower forward voltage drop diodes are

necessary to raise the gate driver voltages.

Undervoltage Lockout

TheLTC7820hasaprecisionUVLOcomparatorconstantly

or sink current to the V

pin and regulate the V

LOW

monitoring the INTV voltage to ensure that an adequate

CC

to V

/2 with around 93mA/50mA capability. The

HIGH_SENSE

gate-drive voltage is present. It locks out the switching

pre-balance time can be calculated based on the capacitor

on the TIMER pin:

action when INTV is below 4.9V. To prevent oscillation

CC

C

TIMER

when there is a disturbance on INTV , the UVLO com-

CC

parator has 200mV of precision hysteresis.

T

= C

• 0.7V/7µA

PRE-BALANCE

TIMER

Another way to detect an undervoltage condition is to

monitor the input supply. Because the RUN pin has a pre-

cision turn-on reference of 1.22V, one can use a resistor

divider to the input to turn on the IC when the input volt-

age is high enough. An extra 5µA of current flows out of

the RUN pin once the RUN pin voltage passes 1.22V. One

can program the hysteresis of the RUN comparator by

adjusting the values of the resistive divider.

So the pre-balance time is 100ms/µF (e.g. the pre-balance

time is 10ms with 0.1µF C ).

TIMER

For voltage divider applications, the output capacitors and

the flying capacitors are pre-balanced to half of the input

voltage during the startup. Assuming zero initial condi-

tions, the time to charge the capacitors, t , can be

CHARGE

estimated from the equation:

t

= (C + C ) • V /2/93mA

OUT FLY IN

CHARGE

7820fc

16

For more information www.linear.com/LTC7820

LTC7820

APPLICATIONS INFORMATION

Select the C

such that the t

< t .

Power MOSFETs and Schottky Diodes Selection

TIMER

CHARGE

PRE-BALANCE

If the flying capacitor C and the output capacitor are

FLY

Four external N-channel MOSFETs must be selected for

each LTC7820 controller. Four internal gate drivers are

designed to drive the MOSFETs. The driver voltages are

very large and input voltage is high, it may take several

pre-balance time periods to pre-balance the V

pin to

LOW

V

/2 with a fixed C

. A longer start-up time

HIGH_SENSE

TIMER

decided by the INTV voltage, schottky diodes forward

CC

is expected. If there is a resistive load on the output, the

load current needs to be smaller than 93mA and still meet

voltage drop and switching frequency. The lowest driver

voltage is the top MOSFET M1 drive voltage running at

high switching frequency and cold temperature. It is

normallyaround4.2V.Consequently,logic-levelthreshold

MOSFETs must be used in most applications. Be aware

that the threshold voltage of some logic-level MOSFET

varies with temperature. If switching frequency is high

and temperature range is wide for specific applications,

the top driver voltage of MOSFET M1 may be as low as

t

= (C

+ C ) • V /2/(93mA – I

) < t

CHARGE

OUT

FLY

IN

LOAD PRE-

. Otherwise a disconnect FET may be required to

BALANCE

disconnect the load during startup.

Input/Output Capacitor and Flying Capacitor Selection

In high power switched capacitor applications, large AC

currents flow through the flying capacitors and input/

output capacitors. Low ESR ceramic capacitors are highly

recommended for high power switch capacitor applica-

tions. Make sure the maximum RMS capacitor current is

within the spec; or higher RMS current rated capacitors

are preferred. Note that capacitor manufacturers’ ripple

current ratings are often based on only 2000 hours of life.

This makes it advisable to further derate the capacitor, or

to choose capacitors rated at a higher temperature than

required. Several capacitors may be paralleled to meet

size or height requirements in the design.

4V, and sub-logic level threshold MOSFETs (V

< 3V)

GS(TH)

should be used. Selection criteria for the power MOSFETs

alsoincludetheon-resistanceR ,outputcapacitance

DS(ON)

C

, input voltage, and maximum output current. Gener-

OSS

ally, low R

and low C

MOSFETs are preferred in

DS(ON)

OSS

switched capacitor applications since they will minimize

both conduction loss and switching loss. For a given input

and output voltage, the uppermost MOSFET M1 always

seeshighvoltageduringstart-upandshutdown.TheDrain

to Source voltage of M1 has to be high enough to survive

at full input voltage range. Other MOSFETs normally only

see half of the input voltage, so the breakdown voltage

TheRMScurrentontheflyingcapacitorsdependsontheir

capacitance and the switching frequency. Higher capaci-

tanceandhigherswitchingfrequencyresultsinlowerRMS

current.Foragoodtrade-offbetweenefficiencyandpower

density, the RMS current on the flying capacitors should

be lower than 140% of the maximum load current. If there

are N identical flying capacitors in parallel, the maximum

RMS current through each capacitor is:

of M2/M3/M4 can be lower than M1 to optimize R

DS(ON)

and C . If the reliability of M1 is a major concern, the

OSS

same high voltage MOSFETs could also be used as M2/

M3/M4 to protect against M1 short conditions.

External schottky diodes are needed for the bootstrap

circuits, and provide voltage for the floating drivers. To

minimize the voltage drop on the top gate driver, low

forward voltage drop schottky diodes are preferred with

load current in the range of 10mA to 50mA. The reverse

breakdown voltage of the diodes should be high enough

to survive at the maximum operation voltage between the

I

= I

• 140%/N

RMS_CFLY

OUT(MAX)

The input capacitor RMS current is approximately half of

the load current. The input capacitor has to be selected

to accommodate the maximum load conditions. LTspice

simulation tool can be used to quantify the RMS current.

V

and GND pins.

LOW

7820fc

17

For more information www.linear.com/LTC7820

LTC7820

APPLICATIONS INFORMATION

PC Board Layout Checklist

PC Board Layout Debugging

Start with one controller at a time. Monitor the switching

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of

the IC.

nodes (SW1/SW3 pin) and probe the V

voltage as

LOW

well. Check for proper performance over the operating

voltage and current range expected in the application. The

frequency of operation should be maintained over the full

input voltage range down to dropout.

1. Are the top 2 N-channel MOSFETs M1 and M2 located

within 1cm of each other? Are the bottom 2 N-channel

MOSFETsM3andM4locatedwithin1cmofeachother?

Thedutycyclepercentageshouldbemaintainedfromcycle

tocycleinawell-designed,lownoisePCBimplementation.

2. Is the exposed GND pad solid connected to the source

of bottom MOSFET M4 and the negative terminal of

Reduce V from its nominal level to verify operation

C

VLOW

capacitors?Individeranddoublerapplications,

IN

of the regulator in dropout. Check the operation of the

asolidgroundplaneispreferredfornoiseandthermal

improvement.

undervoltage lockout circuit by further lowering V while

IN

monitoring the outputs to verify operation.

+

–

3. Are the I

and I

leads routed together

SENSE

Investigate whether any problems exist only at higher out-

put currents or only at higher input voltages. If problems

coincide with high input voltages and low output cur-

rents, look for capacitive coupling between the BOOST,

SW, G1/2/3/4 connections and the sensitive voltage and

current pins. The capacitor placed across the current

sensing pins needs to be placed immediately adjacent to

the pins of the IC. This capacitor helps to minimize the

effects of differential noise injection due to high frequency

capacitive coupling. If problems are encountered with

high current output loading at lower input voltages, look

with minimum PC trace spacing? The filter capacitor

+

–

between I

and I

should be as close as

SENSE

possible to the IC. Ensure accurate current sensing

with Kelvin connections at the sense resistor.

4. Is the INTV bypassing capacitor connected close to

CC

theIC,betweentheINTV andthegroundplane?This

CC

capacitorcarriestheMOSFETdriverscurrentpeaks.An

additional 1μF ceramic capacitor placed immediately

next to the INTV and GND can substantially improve

CC

noise performance.

for inductive coupling between C , Schottky and the top

IN

5. Keeptheswitchingnodes(SW1,SW3),topgatenodes

(G1, G2, G3), and boost nodes (BOOST1, BOOST3)

away from sensitive small-signal nodes. All of these

nodes have very large and fast moving signals and

therefore should be kept on the output side of the

LTC7820 and occupy minimum PC trace area.

MOSFET components to the sensitive current and voltage

sensing traces. In addition, investigate common ground

path voltage pickup between these components and the

GND pin of the IC.

6. Useamodifiedstargroundtechnique:alowimpedance,

largecopperareacentralgroundingpointonthesame

side of the PC board as the input and output capaci-

tors with tie-ins for the bottom of the INTV bypass

CC

capacitor.

Figure 6 illustrates the high current paths requiring

thick and wide copper trace connection. Refer to

demoboardsonwww.linear.com/demoforPCBlayout

examples.

7820fc

18

For more information www.linear.com/LTC7820

LTC7820

APPLICATIONS INFORMATION

V

IN

R

SENSE

V

CC

HIGH_SENSE

M1

G1

C

OPT

OPT2

OPT1

–

C

IN

I

SENSE

BOOST1

+

I

DB1

SENSE

LTC7820

SW1

TIMER

M2

G2

C

FLY

FLY2

FLY1

RUN

BOOST2

DB2

V

OUT

EXTV

CC

V

LOW

INTV

CC

V

LOW_SENSE

M3

G3

UV

BOOST3

DB3

C

VLOW

HYS_PRGM

PGOOD

VLOW2

VLOW1

SW3

PGOOD

M4

G4

FREQ

INTV

CC

INTV

CC

GND

FAULT

7820 F06

Figure 6. High Current Path in Printed Circuit Board Layout Diagram

7820fc

19

For more information www.linear.com/LTC7820

LTC7820

APPLICATIONS INFORMATION

Design Example

The output capacitor selection is similar to the flying

capacitor selection. More output capacitors resulting

smaller output voltage ripple. Because of the lower RMS

current, the output capacitor value can be much less than

the flying capacitor. Some of the capacitors may be con-

nected between input and output to serve as input/output

capacitorsatthesametime,asshowninFigure6.However

the voltage rating of those capacitors has to be selected

based on the input voltage instead of the output voltage.

As a design example using LTC7820 for a high voltage

high power voltage divider, assume V = 48V (nominal),

IN

V = 55V (maximum), V

= 24V (nominal), I

= 15A

IN

OUT

(maximum).

For high power and high voltage applications, always start

withalowswitchingfrequencye.g.200kHztominimizethe

switching losses. To set the 200kHz switching frequency,

a 60.4k/1% resistor is connected from Freq pin to ground.

ForMOSFETselection,thetopMOSFETM1draintosource

voltage has to be higher than the maximum input voltage,

while the other three MOSFETs drain to source voltage

only needs to be higher than half of the maximum input

voltage. Since logic level FETs are preferred, an Infineon

BSC100N06LS is chosen as the top MOSFET M1 and

BSC032N04LS are used as M2/3/4. Based on the output

resistance equation in the application section, the output

resistance is around 20mΩ, which will result 300mV drop

at the 24V output at 15A load current. In reality, due to

the finite dead time and parasitic resistance on the PCB,

the voltage drop may be higher than the calculated value.

Taking into account the output voltage ripple, a window

comparator with 1V programmed hysteresis is used to

monitor the output voltage and compares it with the half

of the input voltage during operation. To set the 1V hys-

teresis,a100k/1%resistorisconnectedfromHYS_PRGM

pin to ground.

Setting the C voltage ripple to be 2% of the output

FLY

voltage is a good starting point with trade-off between

efficiency and power density. The C can be calculated

FLY

based on the equation below:

I_OUT(MAX)

2f_SV_CFLY(RIPPLE)2 • 200kHz • 0.48V

= 78.125µF

15A

C_FLY

=

Considering the ceramic capacitance derating at 24V DC

bias voltage, 16 of 10µF/X7R/50V ceramic capacitors are

paralleledasflyingcapacitors.TheworstcaseRMScurrent

may be 40% higher than the maximum output current. So

the worst case RMS on each capacitor can be estimated

by this equation:

I_OUT(MAX)•140%

N

15A •140%

16

I_RMS(MAX)

=

= 1.3125A

where N is the number of flying capacitors. Double check

andmakesuretheRMScurrentoneachcapacitorisbelow

the ripple current ratings and temperature rise is below

the limits.

7820fc

20

For more information www.linear.com/LTC7820

LTC7820

TYPICAL APPLICATIONS

10Ω

V

IN

48V/24V

0.1µF

V

HIGH_SENSE

CC

M1

G1

BSC100N06LS

C

B1

–

I

SENSE

0.1µF

DB1

CMDSH-4

C

10µF

×4

BOOST1

TOP

+

I

SENSE

LTC7820

TIMER

SW1

0.1µF

C

10µF

×16

M2

FLY

G2

RUN

BSC032N04LS

C

1µF

B2

12V

EXTV

BOOST2

CC

DB2

CMDSH-4

V

OUT

2.2µF

24V/12V

15A*

V

C

10µF

×6

LOW

10Ω

VLOW

V

LOW_SENSE

INTV

CC

M3

0.1µF

G3

BSC032N04LS

C

1µF

10k

B3

UV

10k

BOOST3

DB3

CMDSH-4

PGOOD

10k

SW3

HYS_PRGM

FREQ

M4

G4

BSC032N04LS

100k

INTV

CC

60.4k

4.7µF

GND

FAULT

*LOAD CURRENT APPLIED AFTER START-UP

7820 F07

Figure 7. High Efficiency 48V/24V to 24V/12V, 15A Voltage Divider

7820fc

21

For more information www.linear.com/LTC7820

LTC7820

TYPICAL APPLICATIONS

V

10Ω

OUT

48V

R

+

33µF

80V

36mΩ

7.5A

SENSE

10µF

×6

0.1µF

0.005Ω

0.1µF

V

CC

HIGH_SENSE

M1

100Ω

G1

BSC100N06LS

–

0.1µF

I

SENSE

BOOST1

0.1µF

DB1

+

I

SENSE

CMDSH-4

10µF

×4

LTC7820

SW1

TIMER

C

M2

FLY

G2

10µF

50V

×16

BSC032N04LS

1µF

BOOST2

0.47µF

RUN

BOOST2

M

DISCONNECT

DB2

CMDSH-4

SUD50N04-8M8P

V

IN

12V

EXTV

24V

CC

100µF

35V

28mΩ

10µF

50V

×6

+

V

LOW

10Ω

INTV

CC

V

LOW_SENSE

M3

G3

D3

10k

BSC032N04LS

1µF

CMHZ5236B

0.1µF

UV

R20

10k

BOOST3

DB3

PGOOD

CMDSH-4

SW3

HYS_PRGM

0.22µF

M4

100k

G4

BSC032N04LS

FREQ

INTV

CC

4.7µF

68k

BOOST2

GND

FAULT

R19

10k

7820 F08

Figure 8. High Efficiency 24V to 48V, 7.5A Voltage Doubler with Disconnect FET at Input

7820fc

22

For more information www.linear.com/LTC7820

LTC7820

TYPICAL APPLICATIONS

10Ω

V

IN

OUT

IN

24V

HOT SWAP

+

68µF

50V

30mΩ

×2

2.2µF

100V

×8

CIRCUITRY

10µF

×8

0.1µF

100k

V

(e.g. LT4256)

HIGH_SENSE

CC

10k

R

*

10Ω

OPT

V

UV

OUT

V

OUT

GND

OUT

M1

G1

0.01µF

BSC032N04LS

0.1µF

–

I

SENSE

BAT54WS

BOOST1

+

DB1

CMDSH-4

I

SENSE

M

*

OPT

LTC7820

TIMER

SW1

BSS123L

0.1µF

M2

C

FLY

10µF

×16

G2

V

OUT

BSC032N04LS

1µF

V

OUT

RUN

100Ω

4.7µF

BOOST2

SW3

EXTV

CC

DB2

CMDSH-4

V

10Ω

LOW

V

OUT

LOW_SENSE

M3

0.1µF

INTV

G3

CC

BSC032N04LS

1µF

V

OUT

10k

BOOST3

DB3

CMDSH-4

UV

PGOOD

10µF

×8

SW3

M4

HYS_PRGM

G4

CC

BSC032N04LS

INTV

FREQ

100k

CC

4.7µF

75k

V

OUT

GND

V

OUT

V

OUT

–24V

10A

FAULT

7820 F09

*OPTIONAL DISCHARGING COMPONENTS FOR FAST STARTUP.

Figure 9. High Efficiency 24V to –24V, 10A Voltage Inverter with Hot Swap at Input

7820fc

23

For more information www.linear.com/LTC7820

LTC7820

TYPICAL APPLICATIONS

10Ω

V

IN

OUT

IN

24V

HOT SWAP

+

CIRCUITRY

68µF

35V

10µF

×8

0.1µF

100k

0.1µF

(e.g. LT4256)

V

HIGH_SENSE

CC

10k

R

*

10Ω

OPT

UV

GND

M1

G1

0.01µF

BSC032N04LS

0.1µF

–

I

SENSE

BOOST1

+

DB1

CMDSH-4

I

SENSE

M

*

OPT

LTC7820

TIMER

SW1

BSS123L

0.1µF

M2

C

FLY

10µF

×16

G2

BSC032N04LS

1µF

RUN

BOOST2

EXTV

V

CC

OUT

DB2

CMDSH-4

V

OUT

4.7µF

12V

10A

V

10Ω

LOW

V

LOW_SENSE

INTV

CC

M3

0.1µF

G3

BSC032N04LS

1µF

10k

BOOST3

UV

DB3

CMDSH-4

10µF

×8

HYS_PRGM

SW3

M4

G4

BSC032N04LS

INTV

PGOOD

INTV

CC

FREQ

4.7µF

GND

75k

FAULT

7820 F10

*OPTIONAL DISCHARGING COMPONENTS FOR FAST STARTUP.

Figure 10. High Efficiency 24V to 12V, 10A Voltage Divider with Hot Swap at Input

7820fc

24

For more information www.linear.com/LTC7820

LTC7820

TYPICAL APPLICATIONS

7820fc

25

For more information www.linear.com/LTC7820

LTC7820

PACKAGE DESCRIPTION

Please refer to http://www.linear.com/product/LTC7820#packaging for the most recent package drawings.

UFD Package

28-Lead Plastic QFN (4mm × 5mm)

(Reference LTC DWG # 05-08-1712 Rev C)

0.70 ±0.05

4.50 ±0.05

3.10 ±0.05

2.50 REF

2.65 ±0.05

3.65 ±0.05

PACKAGE OUTLINE

0.25 ±0.05

0.50 BSC

3.50 REF

4.10 ±0.05

5.50 ±0.05

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED

PIN 1 NOTCH

R = 0.20 OR 0.35

× 45° CHAMFER

2.50 REF

R = 0.115

TYP

R = 0.05

TYP

0.75 ±0.05

4.00 ±0.10

(2 SIDES)

27

28

0.40 ±0.10

PIN 1

TOP MARK

(NOTE 6)

1

2

5.00 ±0.10

(2 SIDES)

3.50 REF

3.65 ±0.10

2.65 ±0.10

(UFD28) QFN 0816 REV C

0.25 ±0.05

0.200 REF

0.50 BSC

0.00 – 0.05

BOTTOM VIEW—EXPOSED PAD

NOTE:

1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGHD-3).

2. DRAWING NOT TO SCALE

3. ALL DIMENSIONS ARE IN MILLIMETERS

4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE

MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE

5. EXPOSED PAD SHALL BE SOLDER PLATED

6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION

ON THE TOP AND BOTTOM OF PACKAGE

7820fc

26

For more information www.linear.com/LTC7820

LTC7820

REVISION HISTORY

REV

DATE

DESCRIPTION

PAGE NUMBER

A

06/17 Removed TG/BG from EC tables

3S

B

07/17 Changed the # of Switching Cycles in Voltage Divider section

12

7

Modified INTV pin description

CC

Changed hysteresis voltage in Power Good Section

10/17 Corrected hot swap part number call-out.

11

C

23, 24

7820fc

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog

Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications

subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

27

For more information www.linear.com/LTC7820

LTC7820

TYPICAL APPLICATION

10Ω

V

IN

24V

R

SENSE

0.1µF

0.005Ω

V

CC

HIGH_SENSE

C

10µF

×4

TOP

M1

100Ω

G1

–

BSC032N04LS

0.1µF

I

SENSE

0.1µF

BOOST1

DB1

CMDSH-4

+

I

SENSE

LTC7820

TIMER

SW1

0.1µF

C

10µF

×16

M2

FLY

G2

BSC032N04LS

1µF

RUN

BOOST2

M

BOOST2

DISCONNECT

V

EXTV

OUT

CC

DB2

V

12V

15A

SUD50N04-8M8P

OUT

CMDSH-4

4.7µF

V

10Ω

LOW

C

10µF

×6

VLOW

V

LOW_SENSE

220µF

INTV

CC

M3

0.1µF

G3

BSC032N04LS

1µF

10k

D3

BOOST3

10k

CMHZ5236B

UV

DB3

CMDSH-4

10k

HYS_PRGM

SW3

R20

10k

PGOOD

M4

G4

FREQ

BSC032N04LS

INTV

CC

80k

BOOST2

4.7µF

1µF

GND

FAULT

R19

10k

7820 F12

Figure 12. High Efficiency 24V to 12V, 15A Voltage Divider with Disconnect FET at Output

RELATED PARTS

PART NUMBER DESCRIPTION

COMMENTS

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48V Fault Protected 50mA Step-Down Charge Pump 4V ≤ V ≤ 48V, 2.4V ≤ V

≤ 12.5V, I = 20µA, 3mm × 3mm DFN-10, MSOP-10

IN

OUT Q

150V Low I , Synchronous Step-Down DC/DC

4V ≤ V ≤ 140V, 150V , 0.8V ≤ V

≤ 24V, I = 50µA

OUT Q

Q

IN

P-P

Controller

PLL Fixed Frequency 50kHz to 900kHz

LTC3891

LTC3897

LTC3784

LTC3769

LTC4442

60V, Low I , Synchronous Step-Down DC/DC

4V ≤ V ≤ 60V, 0.8V ≤ V ≤ 24V, I = 50µA

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IN

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Q

Controller with 99% Duty Cycle

PLL Fixed Frequency 50kHz to 900kHz

60V Multiphase Synchronous Boost Controller with 4V ≤ V ≤ 60V, V

Up to 60V, In-Rush Current Control, Overcurrent Protection

IN

OUT

Input/ Output Protection

60V Single Output, Low I Multiphase Synchronous 4.5V (Down to 2.3V After Start-Up) ≤ V ≤ 60V, V Up to 60V,

OUT

and Output Disconnect

Q

IN

Boost Controller

PLL Fixed Frequency 50kHz to 900kHz, 4mm × 5mm QFN-28, SSOP-28

60V Low I Synchronous Boost Controller

4.5V (Down to 2.3V After Start-Up) ≤ V ≤ 60V, V Up to 60V,

Q

IN

OUT

PLL Fixed Frequency 50kHz to 900kHz, 4mm × 4mm QFN-20, TSSOP-20

High Speed Synchronous N-Channel MOSFET

Drivers

Up to 38V Supply Voltage, 6V ≤ V ≤ 9.5V,

CC

2.4A Peak Pull-Up/5A Peak Pull-Down, MSOP-8

LT^®4256-1/

LT4256-2

Positive High Voltage Hot Swap Controllers

10.8V ≤ V ≤ 80V, Active Current Limit, Auto-Retry or Latchoff

IN

LTM4636/

LTM4636-1

40A, DC/DC µModule Regulator

4.7V ≤ V ≤ 15V. 0.6V ≤ V

≤ 3.3V, 16mm × 16mm × 7.07mm (BGA)

IN

OUT

LTM^®4650/

LTM4650A

Dual 25A or Single 50A DC/DC µModule Regulator

4.5V ≤ V ≤ 15V, 0.6V ≤ V

≤ 1.8V, 16mm × 16mm × 5.01mm (BGA)

≤ 5.5V, 16mm × 16mm × 5.01mm (BGA)

IN

OUT

4.5V ≤ V ≤ 16V, 0.6V ≤ V

IN

7820fc

LT 1017 REV C • PRINTED IN USA

www.linear.com/LTC7820

28

 ANALOG DEVICES, INC. 2017

For more information www.linear.com/LTC7820


型号：	LTM4636-1
厂家：	Linear
描述：	Fixed Ratio High Power Inductorless (Charge Pump) DC/DC Controller
文件：	总28页 (文件大小：984K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

LTM4636-1 [Linear]

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