LTM8031MPV#PBF [Linear]
LTM8031 - Ultralow Noise EMC 36V, 1A DC/DC µModule (Power Module) Regulator; Package: LGA; Pins: 71; Temperature Range: -55°C to 125°C;
| 型号： | LTM8031MPV#PBF |
| 厂家： | 
Linear |
| 描述： | LTM8031 - Ultralow Noise EMC 36V, 1A DC/DC µModule (Power Module) Regulator; Package: LGA; Pins: 71; Temperature Range: -55°C to 125°C 开关 |
| 文件： | 总22页 (文件大小：292K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTM8031
Ultralow Noise EMC 36V, 1A
DC/DC µModule Regulator
FeaTures
DescripTion
The LTM®8031 is an electromagnetic compatible (EMC)
36V, 1A DC/DC µModule® buck converter designed to
meet the radiated emissions requirements of EN55022.
Conducted emission requirements can be met by adding
standardfiltercomponents.Includedinthepackagearethe
switching controller, power switches, inductor, filters and
all support components. Operating over an input voltage
range of 3.6V to 36V, the LTM8031 supports an output
voltage range of 0.8V to 10V, and a switching frequency
range of 200kHz to 2.4MHz, each set by a single resistor.
Only the bulk input and output filter capacitors are needed
to finish the design. The low profile package (2.82mm)
enables utilization of unused space on the bottom of PC
boards for high density point of load regulation.
n
Complete Step-Down Switch Mode Power Supply
n
Wide Input Voltage Range: 3.6V to 36V
n
1A Output Current
0.8V to 10V Output Voltage
n
n
Switching Frequency from 200kHz to 2.4MHz
n
EN55022 Class B Compliant with Margin
n
Current Mode Control
n
(e4) RoHS Compliant Package with Gold Pad Finish
n
Programmable Soft-Start
Pin Compatible with the LTM8032
Low Profile (9mm × 15mm × 2.82mm)
Surface Mount LGA Package
n
n
applicaTions
TheLTM8031ispackagedinathermallyenhanced,compact
(9mm×15mm)andlowprofile(2.82mm)overmoldedland
gridarray(LGA)packagesuitableforautomatedassembly
by standard surface mount equipment. The LTM8031 is
RoHS compliant.
n
Automotive Battery Regulation
n
Power for Portable Products
n
Distributed Supply Regulation
n
Industrial Supplies
n
Wall Transformer Regulation
L, LT, LTC, LTM, µModule, Burst Mode, Linear Technology and the Linear logo are registered
trademarks of Linear Technology Corporation. All other trademarks are the property of their
respective owners.
Typical applicaTion
Ultralow Noise 5V/1A DC/DC µModule Regulator
LTM8031 EMI Performance
V
5V
1A
OUT
V
*
IN
V
IN
= 36V
OUT
V
IN
7VDC TO 36VDC
80
70
60
50
40
30
20
10
0
10µF
FIN
LTM8031
AUX
RUN/SS
BIAS
1µF
EN55022
CLASS B
LIMIT
SHARE
PGOOD
RT
SYNC GND ADJ
44.2k
47.5k
8031 TA01a
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
–10
0
100 200 300 400 500 600 700 800 9001000
FREQUENCY (MHz)
8031 TA01b
8031fb
1
LTM8031
absoluTe MaxiMuM raTings
pin conFiguraTion
(Note 1)
TOP VIEW
V , FIN, RUN/SS Voltage..........................................40V
IN
1
2
3
4
5
6
7
ADJ, RT, SHARE Voltage.............................................5V
V
GND
OUT
V
, AUX.................................................................10V
A
B
C
D
E
F
OUT
Current from AUX ................................................100mA
PGOOD, SYNC ..........................................................30V
BIAS..........................................................................25V
BANK 1
BANK 2
BANK 3
V + BIAS.................................................................56V
IN
Maximum Junction Temperature (Note 2)............. 125°C
Solder Temperature (Note 3)................................. 245°C
G
H
J
RT
SHARE
ADJ
BIAS
AUX
K
L
PGOOD
V
FIN RUN/SS SYNC
LGA PACKAGE
IN
71-LEAD (9mm × 15mm × 2.82mm)
T
JMAX
= 125°C, θ = 20.7°C/W, θ
= 8.4°C/W,
JA
JC(BOTTOM)
= 13.8°C/W
θ
= 25.6°C/W, θ
JC(TOP)
JBOARD
θ VALUES DETERMINED PER JESD 51-9
WEIGHT = 1.2g
orDer inForMaTion
LEAD FREE FINISH
LTM8031EV#PBF
LTM8031IV#PBF
LTM8031MPV#PBF
TRAY
PART MARKING*
LTM8031V
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 125°C
LTM8031EV#PBF
LTM8031IV#PBF
LTM8031MPV#PBF
71-Lead (9mm × 15mm × 2.82mm) LGA
71-Lead (9mm × 15mm × 2.82mm) LGA
71-Lead (9mm × 15mm × 2.82mm) LGA
LTM8031V
–40°C to 125°C
LTM8031V
–55°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
8031fb
2
LTM8031
elecTrical characTerisTics The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 10V, VRUN/SS = 10V, VBIAS = 3V, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
V
V
Input DC Voltage
Output DC Voltage
3.6
36
V
IN
0.2A < I
0.2A < I
≤ 1A, R
≤ 1A, R
Open
= 21.6k
0.8
10
V
V
OUT
OUT
OUT
ADJ
ADJ
I
I
Continuous Output DC Current
V
= 24V
1
A
OUT
IN
V
IN
Quiescent Current
V
V
V
= 0.2V
0.6
25
88
µA
µA
µA
Q(VIN)
RUN/SS
l
l
= 3V, Not Switching
= 0V, Not Switching
60
120
BIAS
BIAS
I
BIAS Quiescent Current
V
V
V
= 0.2V
0.03
60
1
µA
µA
µA
Q(BIAS)
RUN/SS
= 3V, Not Switching
= 0V, Not Switching
120
5
BIAS
BIAS
Line Regulation
10V ≤ V ≤ 36V, I
= 1A, V
OUT
= 3.3V
= 3.3V
0.1
0.3
6
%
%
∆V
OUT
IN
OUT
OUT
V
Load Regulation
V
IN
V
IN
= 24V, 0.2A ≤ I
≤ 1A, V
OUT OUT
V
Output Ripple (RMS)
= 24V, I
= 1A, V = 3.3V
OUT
mV
kHz
mV
V
OUT(AC_RMS)
OUT
f
SW
Switching Frequency
R = 113k
T
325
790
1.9
4
l
V
V
Voltage at ADJ Pin
765
2.5
815
2.8
ADJ
Minimum BIAS Voltage for Proper Operation
Current Out of ADJ Pin
RUN/SS Pin Current
BIAS(MIN)
ADJ
I
I
V
V
= 0V, V
= 2.5V
= 0V, V = 1V
OUT
µA
µA
V
RUN/SS
RUN/SS
ADJ
5
10
0.2
1
RUN/SS
V
V
V
RUN/SS Input High Voltage
RUN/SS Input Low Voltage
ADJ Voltage Threshold for PGOOD to Switch
PGOOD Leakage
IH(RUN/SS)
IL(RUN/SS)
PG(TH)
V
730
0.1
mV
µA
µA
V
I
I
V
V
= 30V
PGO
PG
PGOOD Sink Current
= 0.4V
200
0.7
800
PGSINK
PG
V
V
SYNC Input Low Threshold
SYNC Input High Threshold
SYNC Pin Bias Current
f
f
= 550kHz
= 550kHz
0.5
SYNCIL
SYNC
SYNC
V
SYNCIH
I
V
= 0V, V = 0V
BIAS
0.1
µA
SYNC(BIAS)
SYNC
V
550kHz Narrowband Conducted Emission
1MHz Narrowband Conducted Emission
3MHz Narrowband Conducted Emission
V
= 24V, V
= 3.3V, I
= 1A, f = 550kHz,
83
63
51
dBµV
dBµV
dBµV
IN(RIPPLE)
IN
OUT
OUT
SW
5µH LISN
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM8031E is guaranteed to meet performance specifications
from 0°C to 125°C internal. Specifications over the –40°C to 125°C
internal temperature range are assured by design, characterization and
correlation with statistical process controls. The LTM8031I is guaranteed
to meet specifications over the full –40°C to 125°C internal operating
temperature range. The LTM8031MP is guaranteed to meet specifications
over the full –55°C to 125°C internal operating temperature range. Note
that the maximum internal temperature is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
resistance and other environmental factors.
Note 3: See Linear Technology Application Note 100.
8031fb
3
LTM8031
Typical perForMance characTerisTics TA = 25°C, unless otherwise noted.
3.3VOUT Efficiency
5VOUT Efficiency
8VOUT Efficiency
100
90
100
90
100
90
80
70
80
70
80
70
60
50
40
60
50
40
60
50
40
5V
IN
12V
24V
36V
12V
24V
36V
12V
24V
36V
IN
IN
IN
IN
IN
IN
IN
IN
IN
0
200
400
600
800
1000
0
200
400
600
800
1000
0
200
400
600
800
1000
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
8031 G01
8031 G02
8031 G03
Input Current vs Output Current,
3.3VOUT
Input Current vs Output Current,
5VOUT
Input Current vs Output Current,
8VOUT
500
450
400
350
300
250
200
150
100
50
800
700
600
500
800
700
600
500
12V
IN
5V
IN
12V
IN
24V
IN
12V
IN
24V
IN
36V
IN
24V
36V
IN
IN
36V
IN
400
300
400
300
200
100
0
200
100
0
0
200
400
800
200
600
OUTPUT CURRENT (mA)
0
1000
0
400
800
1000
200
400
800
600
0
1000
600
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
8031 G04
8031 G05
8031 G06
Minimum VIN vs Output Current
2.5V VOUT
Minimum VIN vs Output Current
3.3V VOUT
Minimum VIN vs Output Current
5V VOUT
6.1
5.6
5.1
4.6
4.1
3.6
5.0
4.8
4.6
4.4
7.6
7.1
6.6
6.1
RUN/SS = V OR TOGGLED
IN
RUN/SS = V
IN
RUN/SS = V
IN
4.2
4.0
5.6
5.1
RUNNING OR RUN/SS TOGGLED
RUN/SS TOGGLED
RUNNING
3.8
3.6
3.4
4.6
4.1
3.6
RUNNING
200
400
800
0
1000
200
600
OUTPUT CURRENT (mA)
600
0
400
800
1000
0
200
400
800
1000
600
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
8031 G07
8031 G08
8031 G09
8031fb
4
LTM8031
Typical perForMance characTerisTics TA = 25°C, unless otherwise noted.
Minimum VIN vs Output Current
8V VOUT
Minimum Input Running Voltage
vs Output Voltage, IOUT = 1A
Bias Current vs Output Current
16
14
12
10
12
11
10
9
35
30
8V
5V
OUT
OUT
OUT
RUN/SS = V
IN
3.3V
25
20
15
10
5
RUNNING OR RUN/SS TOGGLED
8
6
8
7
4
2
0
6
5
4
0
2
4
8
0
10
200
400
800
6
0
1000
200
400
600
1000
600
0
800
V
OUT
(V)
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
8031 G11
8031 G10
8031 G12
Output Current vs Input Voltage
(Output Shorted)
Input Current vs Input Voltage
(Output Shorted)
Temperature Rise vs
Load Current, VOUT = 3.3V
1.4
1.2
1.0
30
25
2.75
2.70
2.65
2.60
2.55
2.50
2.45
2.40
2.35
36V
24V
12V
IN
IN
IN
5V
IN
20
15
0.8
0.6
0.4
0.2
0
10
5
0
16 20
(V)
10
20
(V)
40
0
4
8
12
24 28 32 36
0
30
0
200
400
600
800
1000
OUTPUT CURRENT (mA)
V
IN
V
IN
8031 G13
8031 G14
8031 G15
Temperature Rise vs
Temperature Rise vs
Temperature Rise vs
Load Current, VOUT = 5V
Load Current, VOUT = 8V
Load Current, VOUT = 10V
30
25
30
25
30
25
36V
IN
36V
IN
36V
IN
24V
IN
24V
IN
24V
IN
12V
IN
12V
IN
20
15
20
15
20
15
10
5
10
5
10
5
0
0
0
1
200
400
600
800
1000
1
200
400
600
800
1000
1
200
400
600
800
1000
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
8031 G16
8031 G17
8031 G18
8031fb
5
LTM8031
Typical perForMance characTerisTics TA = 25°C, unless otherwise noted.
Radiated Emissions
Radiated Emissions
90
80
70
60
50
40
30
20
10
0
90
80
70
60
50
40
30
20
10
0
V
V
= 36V
V
V
= 36V
IN
OUT
IN
OUT
= 10V AT 1A
= 2.5V AT 1A
EN55022
CLASS B
LIMIT
EN55022
CLASS B
LIMIT
–10
–10
0
100 200 300 400 500 600 700 800 9001000
0
100 200 300 400 500 600 700 800 9001000
FREQUENCY (MHz)
FREQUENCY (MHz)
8031 G19
8031 G20
pin FuncTions
V (Bank3):TheV pinsuppliescurrenttotheLTM8031’s
BIAS(PinH4):TheBIASpinconnectstotheinternalpower
bus. Connect to a power source greater than 2.8V. If the
output is greater than 2.8V, connect this pin to AUX. If the
output voltage is less, connect this to a voltage source
IN
IN
internal regulator and to the internal power switch. This
pin must be locally bypassed with an external, low ESR
capacitor of at least 1µF.
between 2.8V and 25V. Also, make sure that BIAS + V
is less than 56V.
IN
FIN (K3, L3): Filtered Input. This is the node after the input
EMI filter. Use this only if there is a need to modify the
behavior of the integrated EMI filter or if V rises or falls
RUN/SS (Pin L5): Pull RUN/SS pin to less than 0.2V to
shut down the LTM8031. Tie to 2.5V or more for normal
operation. If the shutdown feature is not used, tie this pin
IN
rapidly; otherwise, leave these pins unconnected. See the
Applications Information section for more details.
to the V pin. RUN/SS also provides a soft-start function;
IN
GND (Bank 2): Tie these GND pins to a local ground plane
see the Applications Information section.
below the LTM8031 and the circuit components. Return
the feedback divider (R ) to this net.
RT (Pin G7): The RT pin is used to program the switching
frequency of the LTM8031 by connecting a resistor from
thispintoground.TheApplicationsInformationsectionof
the data sheet includes a table to determine the resistance
value based on the desired switching frequency. Minimize
capacitance at this pin.
ADJ
V
(Bank 1): Power Output Pins. Apply the output filter
OUT
capacitor and the output load between these pins and
GND pins.
AUX (Pin H5): Low Current Voltage Source for BIAS. In
many designs, the BIAS pin is simply connected to V
.
OUT
and is placed
SHARE (Pin H7): Tie this to the SHARE pin of another
LTM8031 when paralleling the outputs.
The AUX pin is internally connected to V
OUT
adjacent to the BIAS pin to ease printed circuit board rout-
ing. Although this pin is internally connected to V , do
OUT
not connect this pin to the load. If this pin is not tied to
BIAS, leave it floating.
8031fb
6
LTM8031
pin FuncTions
SYNC (Pin L6): This is the external clock synchronization
input.GroundthispinforlowrippleBurstMode® operation
at low output loads. Tie to a stable voltage source greater
than 0.7V to disable Burst Mode operation. Do not leave
this pin floating. Tie to a clock source for synchroniza-
tion. Clock edges should have rise and fall times faster
than 1µs. See Synchronization section in Applications
Information.
The PGOOD output is valid when V is above 3.6V and
IN
RUN/SS is high. If this function is not used, leave this
pin floating.
ADJ (Pin J7): The LTM8031 regulates its ADJ pin to 0.79V.
Connect the adjust resistor from this pin to ground. The
value of R
is given by the equation:
ADJ
196.71
VOUT – 0.79
RADJ
=
PGOOD (Pin K7): The PGOOD pin is the open-collector
outputofaninternalcomparator.PGOODremainslowuntil
the ADJ pin is within 10% of the final regulation voltage.
where R
is in kΩ.
ADJ
block DiagraM
FIN
EMI FILTER
4.7µH
V
OUT
V
IN
AUX
GND
BIAS
22pF
10µF
249k
GND
SHARE
CURRENT
MODE
CONTROLLER
RUN/SS
SYNC
RT
PGOOD
ADJ
8031 BD
8031fb
7
LTM8031
operaTion
The LTM8031 is a standalone nonisolated step-down
switching DC/DC power supply. It can deliver up to 1A of
DC output current with only bulk external input and output
capacitors. This module provides a precisely regulated
output voltage programmable via one external resistor
from 0.8VDC to 10VDC. The input voltage range is 3.6V
to 36V. Given that the LTM8031 is a step-down converter,
make sure that the input voltage is high enough to support
the desired output voltage and load current. A simplified
Block Diagram is given on the previous page.
Aninternalregulatorprovidespowertothecontrolcircuitry.
The bias regulator can draw power from the V pin, but if
IN
theBIASpinisconnectedtoanexternalvoltagehigherthan
2.8V, bias power will be drawn from the external source
(typically the regulated output voltage). This improves
efficiency. The RUN/SS pin is used to place the LTM8031
in shutdown, disconnecting the output and reducing the
input current to less than 1µA.
To further optimize efficiency, the LTM8031 automatically
switches to Burst Mode operation in light load situations.
Betweenbursts,allcircuitryassociatedwithcontrollingthe
output switch is shut down reducing the input supply cur-
rentto50µAinatypicalapplication. Theoscillatorreduces
theLTM8031’soperatingfrequencywhenthevoltageatthe
ADJ pin is low. This frequency foldback helps to control
the output current during start-up and overload.
TheLTM8031isdesignedwithaninputEMIfilterandother
features to make its radiated emissions compliant with
several EMC specifications including EN55022 class B.
Compliance with conducted emissions requirements may
be obtained by adding a standard input filter.
The LTM8031 contains a current mode controller, power
switching element, power inductor, power Schottky diode
andamodestamountofinputandoutputcapacitance.The
LTM8031 is a fixed frequency PWM regulator. The switch-
ing frequency is set by simply connecting the appropriate
resistor value from the RT pin to GND.
The LTM8031 contains a power good comparator which
trips when the ADJ pin is at 90% of its regulated value.
The PGOOD output is an open-collector transistor that is
off when the output is in regulation, allowing an external
resistor to pull the PGOOD pin high. Power good is valid
when the LTM8031 is enabled and V is above 3.6V.
IN
applicaTions inForMaTion
For most applications, the design process is straight
forward, summarized as follows:
Capacitor Selection Considerations
The C and C
capacitor values in Table 1 are the
IN
OUT
1. Look at Table 1 and find the row that has the desired
input range and output voltage.
minimum recommended values for the associated oper-
ating conditions. Applying capacitor values below those
indicated in Table 1 is not recommended, and may result
in undesirable operation. Using larger values is generally
acceptable, and can yield improved dynamic response, if
it is necessary. Again, it is incumbent upon the user to
verify proper operation over the intended system’s line,
load and environmental conditions.
2. Apply the recommended C , C , R
and R
T
IN
OUT
ADJ
values.
3. Connect BIAS as indicated.
AstheintegratedinputEMIfiltermayringinresponsetoan
applicationofastepinputvoltage,abulkcapacitance,series
resistanceorsomeclampingmechanismmayberequired.
See the Hot-Plugging Safely section for details.
Ceramic capacitors are small, robust and have very low
ESR. However, notallceramiccapacitorsaresuitable. X5R
and X7R types are stable over temperature and applied
voltage and give dependable service. Other types, includ-
ing Y5V and Z5U have very large temperature and voltage
coefficients of capacitance. In an application circuit they
Whilethesecomponentcombinationshavebeentestedfor
proper operation, it is incumbent upon the user to verify
proper operation over the intended system’s line, load and
environmental conditions.
8031fb
8
LTM8031
applicaTions inForMaTion
Table 1. Recommended Component Values and Configuration (See Typical Performance Characteristics for Load Conditions)
V
V
C
C
R
BIAS
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
AUX
f
R
f
R
T(MIN)
IN
OUT
IN
OUT
ADJ
OPTIMAL
T(OPTIMAL)
MAX
3.6V to 36V
3.6V to 36V
3.6V to 36V
3.6V to 36V
3.6V to 36V
4.75V to 36V
6.8V to 36V
10.5V to 36V
13V to 36V
3.6V to 15V
3.6V to 15V
3.6V to 15V
3.6V to 15V
3.6V to 15V
4.75V to 15V
6.8V to 15V
10.5V to 15V
9V to 24V
0.82V
1.20V
1.80V
2.00V
2.50V
3.30V
5.00V
8.00V
10.00V
0.82V
1.20V
1.80V
2.00V
2.50V
3.30V
5.00V
8.00V
0.82V
1.20V
1.80V
2.00V
2.50V
3.30V
5.00V
8.00V
10.00V
1µF 0805 50V
1µF 0805 50V 100µF//47µF 1206 6.3V
5.11M
475k
191k
162k
115k
78.7k
46.4k
26.7k
21.0k
5.11M
475k
191k
162k
115k
78.7k
46.4k
26.7k
5.11M
475k
191k
162k
115k
78.7k
46.4k
26.7k
21.0k
250kHz
300kHz
420kHz
450kHz
550kHz
675kHz
975kHz
1200kHz
1250kHz
500kHz
600kHz
650kHz
650kHz
700kHz
950kHz
1150kHz
1200kHz
350kHz
450kHz
600kHz
650kHz
700kHz
950kHz
1150kHz
1200kHz
1250kHz
150k
250kHz
325kHz
450kHz
475kHz
575kHz
725kHz
1000kHz
1600kHz
2050kHz
600kHz
750kHz
1000kHz
1100kHz
1350kHz
1650kHz
2400kHz
2400kHz
375kHz
475kHz
650kHz
700kHz
850kHz
1050kHz
1550kHz
2400kHz
2400kHz
150k
113k
2 × 100µF 1206 6.3V
124k
84.5k
78.7k
61.9k
48.7k
29.4k
23.7k
22.6k
69.8k
56.2k
51.1k
51.1k
47.5k
32.4k
25.5k
23.7k
105k
1µF 0805 50V
1µF 0805 50V
1µF 0805 50V
1µF 0805 50V
1µF 0805 50V
1µF 0805 50V
1µF 0805 50V
1µF 0805 50V
1µF 0805 50V
1µF 0805 50V
1µF 0805 50V
1µF 0805 50V
1µF 0805 50V
1µF 0805 50V
1µF 0805 50V
1µF 0805 50V
100µF 1206
100µF 1206
78.7k
73.2k
59.0k
44.2k
28.0k
15.8k
10.5k
56.2k
42.2k
28.0k
26.7k
20.5k
15.0k
7.87k
7.87k
93.1k
73.2k
51.1k
47.5k
37.4k
28.0k
16.5k
7.87k
7.87k
47µF 0805 6.3V
22µF 1206 6.3V
10µF 1206 6.3V
4.7µF 1206 10V
4.7µF 0805 16V
2 × 100µF 1206 6.3V
100µF 1206 6.3V
100µF 1206
AUX
AUX
AUX
V
IN
V
V
V
V
IN
IN
IN
IN
100µF 1206
47µF 0805 6.3V
22µF 1206 6.3V
10µF 1206 6.3V
4.7µF 1206 10V
2 × 100µF 1206 6.3V
AUX
AUX
AUX
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
AUX
9V to 24V
1µF 0805 50V 100µF//47µF 1206 6.3V
78.7k
56.2k
51.1k
47.5k
32.4k
25.5k
23.7k
22.6k
9V to 24V
1µF 0805 50V
1µF 0805 50V
1µF 0805 50V
1µF 0805 50V
1µF 0805 50V
1µF 0805 50V
1µF 0805 50V
100µF 1206
100µF 1206
9V to 24V
9V to 24V
47µF 0805 6.3V
22µF 1206 6.3V
10µF 1206 6.3V
4.7µF 1206 10V
4.7µF 0805 16V
9V to 24V
9V to 24V
AUX
10.5V to 24V
13V to 24V
AUX
AUX
Note: An input bulk capacitor is required.
8031fb
9
LTM8031
applicaTions inForMaTion
may have only a small fraction of their nominal capaci-
tance resulting in much higher output voltage ripple than
expected. Ceramic capacitors are also piezoelectric. In
BurstModeoperation,theLTM8031’sswitchingfrequency
depends on the load current, and can excite a ceramic
capacitor at audio frequencies, generating audible noise.
SincetheLTM8031operatesatalowercurrentlimitduring
Burst Mode operation, the noise is typically very quiet to a
casual ear. If this audible noise is unacceptable, use a high
performanceelectrolyticcapacitorattheoutput. Theinput
capacitor can be a parallel combination of a 1µF ceramic
capacitor and a low cost electrolytic capacitor.
Table 2. Switching Frequency vs RT Value
SWITCHING FREQUENCY (MHz)
R VALUE (kΩ)
T
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.2
1.4
1.5
1.8
2
187
124
88.7
69.8
56.2
47.5
39.2
34
28.0
23.7
19.1
16.2
13.3
11.5
9.76
8.66
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LTM8031. A
ceramic input capacitor combined with trace or cable
inductance forms a high Q (under damped) tank circuit.
If the LTM8031 circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value, possi-
bly exceeding the device’s rating. This situation is easily
avoided; see the Hot-Plugging Safely section.
2.2
2.4
Operating Frequency Trade-Offs
It is recommended that the user apply the optimal R
T
value given in Table 1 for the input and output operating
condition. System level or other considerations, however,
may necessitate another operating frequency. While the
LTM8031 is flexible enough to accommodate a wide range
of operating frequencies, a haphazardly chosen one may
result in undesirable operation under certain operating or
fault conditions. A frequency that is too high can reduce
efficiency, generate excessive heat or even damage the
LTM8031 if the output is overloaded or short-circuited. A
frequency that is too low can result in a final design that
has too much output ripple or unnecessarily large output
Electromagnetic Compliance
The LTM8031 is compliant with the radiated emissions
requirementsofEN55022classB.GraphsoftheLTM8031’s
EMC performance are given in the Typical Performance
Characteristicssection.Furtherdata,operatingconditions
and test setup are detailed in an EMI Test report available
from Linear Technology.
Frequency Selection
TheLTM8031usesaconstantfrequencyPWMarchitecture
thatcanbeprogrammedtoswitchfrom200kHzto2.4MHz
by using a resistor tied from the RT pin to ground. Table 2
capacitor.Themaximumfrequency(andattendantR value)
T
atwhichtheLTM8031shouldbeallowedtoswitchisgiven
in Table 1 in the f
column, while the recommended
MAX
provides a list of R resistor values and their resultant
T
frequency (and R value) for optimal efficiency over the
T
frequencies.
given input condition is given in the f
column.
OPTIMAL
There are additional conditions that must be satisfied if
the synchronization function is used. Please refer to the
Synchronization section for details.
8031fb
10
LTM8031
applicaTions inForMaTion
BIAS Pin Considerations
capacitor. In addition, V and BIAS quiescent currents are
IN
reduced to typically 25µA and 60µA respectively during
the sleep time. As the load current decreases towards a
no-loadcondition,thepercentageoftimethattheLTM8031
operates in sleep mode increases and the average input
current is greatly reduced, resulting in higher efficiency.
BurstModeoperationisenabledbytyingSYNCtoGND. To
disable Burst Mode operation, tie SYNC to a stable voltage
above 0.7V. Do not leave the SYNC pin floating.
TheBIASpinisusedtoprovidedrivepowerfortheinternal
power switching stage and operate internal circuitry. For
proper operation, it must be powered by at least 2.8V. If
the output voltage is programmed to be 2.8V or higher,
simply tie BIAS to AUX. If V
is less than 2.8V, BIAS
OUT
can be tied to V or some other voltage source. In all
IN
cases, ensure that the maximum voltage at the BIAS pin
is both less than 25V and the sum of V and BIAS is less
IN
than 56V. If BIAS power is applied from a remote or noisy
voltage source, it may be necessary to apply a decoupling
capacitor locally to the LTM8031.
Minimum Input Voltage
The LTM8031 is a step-down converter, so a minimum
amountofheadroomisrequiredtokeeptheoutputinregu-
lation. In addition, the input voltage required to turn on is
higherthanthatrequiredtorun,anddependsuponwhether
the RUN/SS is used. As shown in the Typical Performance
Load Sharing
TwoormoreLTM8031smaybeparalleledtoproducehigher
currents. This may, however, alter the EMI performance of
Characteristics section, it takes only about 3.6V for the
IN
theLTM8031s.Todothis,tietheV ,ADJ,V andSHARE
IN
OUT
LTM8031 to run a 3.3V output at light load. If RUN/SS is
pinsofalltheparalleledLTM8031stogether.Toensurethat
paralleledmodulesstartuptogether,theRUN/SSpinsmay
be tied together, as well. Synchronize the LTM8031s to an
external clock to eliminate beat frequencies, if required.
If the RUN/SS pins are not tied together, make sure that
the same valued soft-start capacitors are used for each
module. An example of two LTM8031 modules configured
for load sharing is given in the Typical Applications sec-
tion. For 2A applications also see the LTM8032, 2A EMC
DC/DC µModule regulator
pulled up to V , it takes 5.7V to start. If the LTM8031
IN
IN
is enabled via the RUN/SS pin, the minimum voltage to
start at light loads is lower, about 4.4V. Similar curves for
2.5V , 5V
and 8V
operation are also provided in
OUT
OUT
OUT
the Typical Performance Characteristics section.
Soft-Start
The RUN/SS pin can be used to soft-start the LTM8031,
reducing the maximum input current during start-up. The
RUN/SS pin is driven through an external RC network to
create a voltage ramp at this pin. Figure 1 shows the start-
up and shutdown waveforms with the soft-start circuit. By
choosinganappropriateRCtimeconstant,thepeakstart-up
current can be reduced to the current that is required to
regulate the output, with no overshoot. Choose the value
of the resistor so that it can supply at least 20µA when
the RUN/SS pin reaches 2.5V.
Burst Mode Operation
To enhance efficiency at light loads, the LTM8031 auto-
matically switches to Burst Mode operation which keeps
the output capacitor charged to the proper voltage while
minimizingtheinputquiescentcurrent.DuringBurstMode
operation, the LTM8031 delivers single cycle bursts of
current to the output capacitor followed by sleep periods
wheretheoutputpowerisdeliveredtotheloadbytheoutput
8031fb
11
LTM8031
applicaTions inForMaTion
V
IN
V
IN
V
OUT
V
OUT
RUN/SS
LTM8031
AUX
I
L
RUN
15k
0.5A/DIV
BIAS
ADJ
R
SYNC GND
T
RUN/SS
V
RUN/SS
2V/DIV
GND
0.22µF
V
OUT
8031 F02
2V/DIV
Figure 2. The Input Diode Prevents a Shorted Input from
Discharging a Back-Up Battery Tied to the Output. It Also
Protects the Circuit from a Reversed Input. The LTM8031
Runs Only When the Input is Present
8031 F01
2ms/DIV
Figure 1. To Soft-Start the LTM8031, Add a Resistor
and Capacitor to the RUN/SS Pin
Synchronization
device. Figure 2 shows a circuit that will run only when
the input voltage is present and that protects against a
shorted or reversed input.
The internal oscillator of the LTM8031 can be synchro-
nized by applying an external 250kHz to 2MHz clock to
the SYNC pin. Do not leave this pin floating. The resistor
tied from the RT pin to ground should be chosen such
that the LTM8031 oscillates 20% lower than the intended
synchronization frequency (see the Frequency Selection
section).TheLTM8031willnotenterBurstModeoperation
while synchronized to an external clock, but will instead
skip pulses to maintain regulation.
PCB Layout
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8031. The LTM8031 is neverthe-
less a switching power supply and care must be taken to
minimize EMI and ensure proper operation. Even with the
high level of integration, you may fail to achieve specified
operation with a haphazard or poor layout. See Figure 3
for a suggested layout.
Shorted Input Protection
Care needs to be taken in systems where the output will
be held high when the input to the LTM8031 is absent.
This may occur in battery charging applications or in
battery back-up systems where a battery or some other
supply is diode ORed with the LTM8031’s output. If the
Ensurethatthegroundingandheatsinkingareacceptable.
A few rules to keep in mind are:
1. Place the R and R resistors as close as possible to
ADJ
T
their respective pins.
V pin is allowed to float and the RUN/SS pin is held high
IN
2. Place the C capacitor as close as possible to the V
(either by a logic signal or because it is tied to V ), then
IN
IN
IN
and GND connection of the LTM8031. If a capacitor
is connected to the FIN terminals, place it as close
as possible to the FIN terminals, such that its ground
the LTM8031’s internal circuitry will pull its quiescent
current through its internal power switch. This is fine if
your system can tolerate a few milliamps in this state. If
you ground the RUN/SS pin, the internal switch current
connection is as close as possible to that of the C
capacitor.
IN
will drop to essentially zero. However, if the V pin is
IN
grounded while the output is held high, then parasitic
3. Place the C
capacitor as close as possible to the
OUT
diodes inside the LTM8031 can pull large currents from
V
and GND connection of the LTM8031.
OUT
the output through the V pin, potentially damaging the
IN
8031fb
12
LTM8031
applicaTions inForMaTion
GND
C
SYNC
OUT
AUX
BIAS
RUN/SS
FIN
V
IN
OPTIONAL
FIN
CAPACITOR
V
OUT
C
IN
GND
8031 F03
Figure 3. Layout Showing Suggested External Components,
GND Plane and Thermal Vias
4. Place the C and C
capacitors such that their
OUT
or fast rising or falling supply (see Linear Technology
Application Note 88 for a complete discussion). The low
loss ceramic capacitor combined with stray inductance in
serieswiththepowersourceformsanunder-dampedtank
IN
ground currents flow directly adjacent or underneath
the LTM8031.
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8031.
circuit, and the voltage at the V pin of the LTM8031 can
IN
ring to twice the nominal input voltage, possibly exceed-
ing the LTM8031’s rating and damaging the part. A similar
phenomenoncanoccurinsidetheLTM8031module,atthe
output of the integrated EMI filter, with the same potential
of damaging the part.
6. Use vias to connect the GND copper area to the board’s
internalgroundplane.LiberallydistributetheseGNDvias
to provide both a good ground connection and thermal
path to the internal planes of the printed circuit board.
If the input supply is poorly controlled or the user will be
plugging the LTM8031 into an energized supply, the input
networkshouldbedesignedtopreventthisovershoot.Fig-
ure 4 shows the waveforms that result when an LTM8031
circuit is connected to a 24V supply through six feet of 24-
gauge twisted pair. The first plot (4a) is the response with
a 2.2µF ceramic capacitor at the input. The input voltage
Hot-Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8031. However, these capacitors
can cause problems if the LTM8031 is plugged into a live
8031fb
13
LTM8031
applicaTions inForMaTion
rings as high as 35V and the input current peaks at 20A.
One method of damping the tank circuit is to add another
capacitor with a series resistor to the circuit, as shown
in Figure 4b. A 0.7Ω resistor is added in series with the
input to eliminate the voltage overshoot (it also reduces
the peak input current). A 0.1µF capacitor improves high
frequency filtering. For high input voltages its impact on
efficiency is minor, reducing efficiency less than one-half
percent for a 5V output at full load operating from 24V.
By far the most popular method of controlling overshoot
is shown in Figure 4c, where an aluminum electrolytic
capacitor has been connected to FIN. This capacitor’s high
equivalent series resistance damps the circuit and elimi-
nates the voltage overshoot. The extra capacitor improves
low frequency ripple filtering and can slightly improve the
efficiency of the circuit, though it is likely to be the largest
component inthe circuit. Placing theelectrolyticcapacitor
at the FIN terminals can also improve the LTM8031’s EMI
filtering as well as guard against overshoots caused by
the Q of the integrated filter.
can be used as a guide. These curves were generated by a
2
LTM8031 mounted to a 35cm 4-layer FR4 printed circuit
board. Boards of other sizes and layer count can exhibit
differentthermalbehavior,soitisincumbentupontheuser
to verify proper operation over the intended system’s line,
load and environmental operating conditions.
The junction-to-air and junction-to-board thermal resis-
tances given in the Pin Configuration diagram may also be
usedtoestimatetheLTM8031internaltemperature.These
thermalcoefficientsaredeterminedperJESD51-9(JEDEC
standard,testboardsforareaarraysurfacemountpackage
thermal measurements) through analysis and physical
correlation.Bearinmindthattheactualthermalresistance
of the LTM8031 to the printed circuit board depends upon
the design of the circuit board. The die temperature of
the LTM8031 must be lower than the maximum rating of
125°C, so care should be taken in the layout of the circuit
to ensure good heat sinking of the LTM8031.
ThebulkoftheheatflowoutoftheLTM8031isthroughthe
bottom of the module and the LGA pads into the printed
circuit board. Consequently a poor printed circuit board
design can cause excessive heating, resulting in impaired
performance or reliability. Please refer to the PCB Layout
section for printed circuit board design suggestions.
Thermal Considerations
The LTM8031 output current may need to be derated if it is
requiredtooperateinahighambienttemperatureordeliver
alargeamountofcontinuouspower.Theamountofcurrent
deratingisdependentupontheinputvoltage,outputpower
and ambient temperature. The temperature rise curves
given in the Typical Performance Characteristics section
Finally, be aware that at high ambient temperatures the
internalSchottkydiodewillhavesignificantleakagecurrent
increasing the quiescent current of the LTM8031.
8031fb
14
LTM8031
Typical applicaTions
CLOSING SWITCH
SIMULATES HOT PLUG
DANGER
V
IN
I
IN
20V/DIV
LTM8031
IN
RINGING V MAY EXCEED
ABSOLUTE MAXIMUM RATING
V
IN
+
4.7µF
I
IN
LOW
STRAY
10A/DIV
IMPEDANCE
ENERGIZED
24V SUPPLY
INDUCTANCE
DUE TO 6 FEET
(2 METERS) OF
TWISTED PAIR
20µs/DIV
(4a)
LTM8031
0.7Ω
V
IN
20V/DIV
V
IN
+
0.1µF
4.7µF
I
IN
10A/DIV
20µs/DIV
(4b)
FIN
LTM8031
V
IN
20V/DIV
V
IN
+
+
22µF
35V
AI.EI.
4.7µF
I
IN
10A/DIV
8031 F04
20µs/DIV
(4c)
Figure 4. A Well Chosen Input Network Prevents Input Voltage Overshoot and Ensures
Reliable Operation When the LTM8031 is Hot-Plugged to a Live Supply
8031fb
15
LTM8031
Typical applicaTions
0.82V Step-Down Converter
V
OUT
V
*
IN
0.82V
1A
OUT
AUX
V
IN
3.6V TO 15V
200µF
1µF
FIN LTM8031
RUN/SS
BIAS
SHARE
PGOOD
RT
SYNC GND ADJ
69.8k
5.11M
8031 TA02
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
1.8V Step-Down Converter
V
1.8V
1A
OUT
V
*
IN
OUT
AUX
V
IN
9V TO 24V
100µF
1µF
FIN LTM8031
RUN/SS
BIAS
SHARE
PGOOD
SYNC GND ADJ
RT
56.2k
191k
8031 TA03
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
8031fb
16
LTM8031
Typical applicaTions
2.5V Step-Down Converter
V
2.5V
1A
OUT
V
*
IN
OUT
AUX
V
IN
3.6V TO 36V
47µF
1µF
FIN LTM8031
RUN/SS
3.3V
BIAS
SHARE
PGOOD
RT SYNC GND ADJ
61.9k
115k
8031 TA04
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
3.3V Step-Down Converter
V
3.3V
1A
OUT
V
*
IN
OUT
V
IN
4.75V TO 36V
22µF
FIN LTM8031
RUN/SS
AUX
1µF
BIAS
SHARE
PGOOD
RT
SYNC GND ADJ
48.7k
78.7k
8031 TA08
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
5V Step-Down Converter
V
5V
1A
OUT
V
*
IN
OUT
V
IN
6.8V TO 36V
10µF
FIN
LTM8031
AUX
RUN/SS
1µF
BIAS
SHARE
PGOOD
RT
SYNC GND ADJ
29.4k
46.4k
8031 TA05
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
8031fb
17
LTM8031
Typical applicaTions
Two LTM8031s Operating in Parallel (Also See the LTM8032, 2A Pin Compatible)
V
OUT
V
*
IN
8V
OUT
V
IN
11.5V TO 36V
1.9A
LTM8031
FIN
AUX
RUN/SS
BIAS
1µF
SHARE
PGOOD
RT
SYNC GND ADJ
23.7k
13.7k
OPTIONAL SYNC TIE TO
GND IF NOT USED
OUT
V
IN
10µF
FIN LTM8031
RUN/SS
AUX
BIAS
1µF
SHARE
PGOOD
RT
SYNC GND ADJ
8031 TA07
23.7k
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
package phoTograph
8031fb
18
LTM8031
package DescripTion
LGA Package
71-Lead (15mm × 9mm × 2.82mm)
(Reference LTC DWG # 05-08-1823 Rev Ø)
2.670 – 2.970
7
6
5
4
3
2
1
PAD 1
Ø (0.635)
aaa
Z
A
B
C
D
E
F
PAD 1
CORNER
4
15.00
BSC
12.700
BSC
G
H
J
MOLD
SUBSTRATE
CAP
0.27 – 0.37
2.40 – 2.60
K
L
1.270
BSC
DETAIL A
PADS
X
Y
1.27
BSC
SEE NOTES
9.00
BSC
DETAIL A
7.620
BSC
3
DETAIL A
PACKAGE SIDE VIEW
PACKAGE TOP VIEW
PACKAGE BOTTOM VIEW
0.635 0.025 Sꢀ. 71ꢁ
eee
S X Y
6.350
DETAIL A
5.080
3.810
2.540
1.270
0.000
1.270
2.540
3.810
NOTES:
LTMXXXXXX
µModule
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
COMPONENT
2. ALL DIMENSIONS ARE IN MILLIMETERS
PIN 1
3
4
LAND DESIGNATION PER JESD MO-222, SPP-010 AND SPP-020
TRAY PIN 1
BEVEL
DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
PACKAGE IN TRAY LOADING ORIENTATION
LGA 71 0108 REV Ø
5. PRIMARY DATUM -Z- IS SEATING PLANE
6. THE TOTAL NUMBER OF PADS: 71
SYMBOL TOLERANCE
aaa
bbb
eee
0.15
0.10
0.05
5.080
6.350
SUGGESTED PCB LAYOUT
TOP VIEW
8031fb
19
LTM8031
package DescripTion
Table 3. LTM8031 Pinout (Sorted by Pin Number)
PIN
A1
A2
A3
A4
A5
A6
A7
B1
B2
B3
B4
B5
B6
B7
C1
C2
C3
C4
C5
C6
C7
D1
D2
D3
D4
D5
D6
D7
E1
E2
E3
E4
E5
E6
E7
SIGNAL DESCRIPTION
PIN
F1
SIGNAL DESCRIPTION
V
OUT
V
OUT
V
OUT
V
OUT
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
RT
F2
F3
F4
GND
GND
GND
F5
F6
F7
V
OUT
V
OUT
V
OUT
V
OUT
G1
G2
G3
G4
G5
G6
G7
H1
H2
H3
H4
H5
H6
H7
J5
GND
GND
GND
V
OUT
V
OUT
V
OUT
V
OUT
GND
GND
GND
BIAS
AUX
GND
SHARE
GND
GND
ADJ
GND
GND
GND
V
V
V
V
OUT
OUT
OUT
OUT
J6
J7
K1
K2
K3
K5
K6
K7
L1
L2
L3
L5
L6
L7
V
IN
V
IN
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
FIN
GND
GND
PGOOD
V
IN
V
IN
FIN
RUN/SS
SYNC
GND
8031fb
20
LTM8031
revision hisTory
REV
DATE
03/10 Addition to Features
Changes to Applications Information
04/12 Added MP-Grade part. Reflected throughout the data sheet
DESCRIPTION
PAGE NUMBER
A
1
11
B
1-22
8031fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
21
LTM8031
Typical applicaTion
8V Step-Down Converter
V
8V
1A
OUT
V
*
IN
OUT
V
IN
10.5V TO 36V
4.7µF
LTM8031
FIN
AUX
RUN/SS
1µF
BIAS
SHARE
PGOOD
RT
SYNC GND ADJ
23.7k
26.7k
8031 TA06
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
relaTeD parTs
PART NUMBER
LTM4606
DESCRIPTION
Ultralow Noise 6A DC/DC µModule Regulator
Ultralow Noise High V DC/DC µModule Regulator
COMMENTS
4.5V ≤ V ≤ 28V, 0.6V ≤ V
≤ 5V, 15mm × 15mm × 2.8mm LGA
OUT
IN
LTM4612
5A, 5V ≤ V ≤ 36V, 3.3V ≤ V
≤ 15V, 15mm × 15mm × 2.8mm LGA
OUT
IN
OUT
LTM8023
36V, 2A DC/DC µModule Regulator
36V, 3A DC/DC µModule Regulator
36V, 2A EMC DC/DC µModule Regulator
3.6V ≤ V ≤ 36V, 0.8V ≤ V
≤ 10V, 9mm × 11.75mm × 2.8mm LGA
≤ 24V, 9mm × 15mm × 4.32mm LGA
IN
OUT
OUT
LTM8025
3.6V ≤ V ≤ 36V, 0.8V ≤ V
IN
LTM8032
EN55022 Class B, 9mm × 15mm × 2.8mm LGA. Pin Compatible with the
LTM8031
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LT 0412 REV B • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
22
●
●
LINEAR TECHNOLOGY CORPORATION 2009
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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