LTM8032IVPBF [Linear]
Ultralow Noise EMC Compliant 36V, 2A DC/DC μModule; 超低噪声，电磁兼容标准的36V ， 2A DC / DC微型模块
| 型号： | LTM8032IVPBF |
| 厂家： | 
Linear |
| 描述： | Ultralow Noise EMC Compliant 36V, 2A DC/DC μModule |
| 文件： | 总20页 (文件大小：305K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTM8032
Ultralow Noise
EMC Compliant 36V, 2A
DC/DC µModule
FEATURES
DESCRIPTION
The LTM®8032 is an electromagnetic compatible (EMC)
36V, 2A DC/DC μModule® buck converter designed to
meet the radiated emissions requirements of EN55022.
Conducted emission requirements can be met by adding
standardfiltercomponents.Includedinthepackagearethe
switching controller, power switches, inductor, filters and
all support components. Operating over an input voltage
range of 3.6V to 36V, the LTM8032 supports an output
voltage range of 0.8V to 10V, and a switching frequency
range of 200kHz to 2.4MHz, each set by a single resistor.
Only the bulk input and output filter capacitors are needed
to finish the design. The low profile package (2.82mm)
enables utilization of unused space on the bottom of PC
boards for high density point of load regulation.
n
Complete Step-Down Switch Mode Power Supply
n
Wide Input Voltage Range: 3.6V to 36V
n
2A Output Current
0.8V to 10V Output Voltage
Selectable Switching Frequency: 200kHz to 2.4MHz
n
n
n
EN55022 Class B Compliant
Current Mode Control
n
n
(e4) RoHS Compliant Package with Gold Pad Finish
n
Programmable Soft-Start
n
Low Profile (9mm × 15mm × 2.82mm)
Surface Mount LGA Package
APPLICATIONS
n
Automotive Battery Regulation
TheLTM8032ispackagedinathermallyenhanced,compact
(9mm× 15mm)andlowprofile(2.82mm)overmoldedland
gridarray(LGA)packagesuitableforautomatedassembly
by standard surface mount equipment. The LTM8032 is
RoHS compliant.
n
Power for Portable Products
n
Distributed Supply Regulation
n
Industrial Supplies
n
Wall Transformer Regulation
, LT, LTC, LTM and μModule are registered trademarks of Linear Technology
Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Ultralow Noise 5V/2A DC/DC μModule Regulator
LTM8032 EMI Performance
90
V
5V
2A
OUT
V
*
IN
OUT
V
IN
7VDC TO 36VDC
80
70
10μF
FIN
AUX
RUN/SS
60
LTM8032
BIAS
50
2.2μF
EN55022
40
CLASS B
SHARE
PGOOD
LIMIT
30
RT
SYNC GND ADJ
20
10
44.2k
47.5k
8032 TA01a
0
f
= 700kHz
SW
–10
0
100 200 300 400 500 600 700 800 900 1000
FREQUENCY (MHz)
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
8031 TA01b
8032fa
1
LTM8032
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
V , FIN, RUN/SS Voltage..........................................40V
IN
1
2
3
4
5
6
7
ADJ, RT, SHARE Voltage.............................................5V
V
GND
OUT
V
, AUX .................................................................10V
OUT
A
B
C
D
E
F
Current from AUX ................................................100mA
PGOOD, SYNC ..........................................................30V
BIAS..........................................................................25V
BANK 1
BANK 2
BANK 3
V + BIAS.................................................................56V
IN
Maximum Junction Temperature (Note 2)............. 125°C
Solder Temperature (Note 3)................................. 245°C
G
H
J
RT
SHARE
ADJ
BIAS
AUX
K
L
PGOOD
V
FIN RUN/SS SYNC
LGA PACKAGE
IN
71-LEAD (9mm s 15mm s 2.82mm)
T
= 125°C, θ = 15.8°C/W, θ = 5.5°C/W
JA JC
JMAX
θ
JA
DERIVED FROM 6.35cm × 5.6 PCB WITH 4 LAYERS
WEIGHT = 1.2g
ORDER INFORMATION
LEAD FREE FINISH
LTM8032EV#PBF
LTM8032IV#PBF
LTM8032MPV#PBF
TRAY
PART MARKING*
LTM8032V
PACKAGE DESCRIPTION
TEMPERATURE RANGE
–40°C to 125°C
LTM8032EV#PBF
LTM8032IV#PBF
LTM8032MPV#PBF
71-Lead (9mm × 15mm × 2.82mm) LGA
71-Lead (9mm × 15mm × 2.82mm) LGA
71-Lead (9mm × 15mm × 2.82mm) LGA
LTM8032V
–40°C to 125°C
LTM8032MPV
–55°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
8032fa
2
LTM8032
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 10V, VRUN/SS = 10V, VBIAS = 3V, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
V
V
Input DC Voltage
Output DC Voltage
3.6
36
V
IN
0.2A < I
0.2A < I
≤ 2A, R
≤ 2A, R
Open
= 21.6k
0.8
10
V
V
OUT
OUT
OUT
ADJ
ADJ
I
I
Continuous Output DC Current
V
= 24V
2
A
OUT
IN
V
Quiescent Current
V
V
V
= 0.2V
= 3V, Not Switching
= 0V, Not Switching
0.6
25
88
μA
μA
μA
Q(VIN)
IN
RUN/SS
BIAS
BIAS
l
l
60
120
I
BIAS Quiescent Current
V
V
V
= 0.2V
= 3V, Not Switching
= 0V, Not Switching
0.03
60
1
μA
μA
μA
Q(BIAS)
RUN/SS
BIAS
BIAS
120
5
Line Regulation
10V ≤ V ≤ 36V, I
= 1A, V
OUT
= 3.3V
= 3.3V
0.1
0.3
6
%
%
ΔV
OUT
IN
OUT
OUT
V
Load Regulation
V
IN
V
IN
= 24V, 0.2A ≤ I
≤ 2A, V
OUT OUT
V
Output Ripple (RMS)
= 24V, I
= 2A, V = 3.3V
OUT
mV
kHz
mV
V
OUT(AC_RMS)
OUT
f
SW
Switching Frequency
R = 113k
T
325
790
1.9
4
l
V
ADJ
Voltage at ADJ Pin
765
2.5
815
2.8
V
Minimum BIAS Voltage for Proper Operation
Current Out of ADJ Pin
RUN/SS Pin Current
BIAS(MIN)
ADJ
I
I
V
V
= 0V, V
= 2.5V
= 0V, V = 1V
OUT
μA
μA
V
RUN/SS
ADJ
5
10
0.2
1
RUN/SS
RUN/SS
V
V
V
RUN/SS Input High Voltage
RUN/SS Input Low Voltage
ADJ Voltage Threshold for PGOOD to Switch
PGOOD Leakage
IH(RUN/SS)
IL(RUN/SS)
PG(TH)
V
730
0.1
mV
μA
μA
V
I
I
V
V
= 30V
PGO
PG
PGOOD Sink Current
= 0.4V
200
0.7
800
PGSINK
PG
V
V
SYNC Input Low Threshold
SYNC Input High Threshold
SYNC Pin Bias Current
f
f
= 550kHz
= 550kHz
0.5
SYNCIL
SYNC
SYNC
V
SYNCIH
I
V
SYNC
= 0V, V = 0V
BIAS
0.1
μA
SYNC(BIAS)
V
550kHz Narrowband Conducted Emission
1MHz Narrowband Conducted Emission
3MHz Narrowband Conducted Emission
V
= 24V, V
= 3.3V, I
= 2A, f = 550kHz,
89
69
51
dBμV
dBμV
dBμV
IN(RIPPLE)
IN
OUT
OUT
SW
5μH LISN
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTM8032E is guaranteed to meet performance specifications
from 0°C to 125°C internal. Specifications over the –40°C to 125°C
internal temperature range are assured by design, characterization and
correlation with statistical process controls. LTM8032I is guaranteed
to meet specifications over the full –40°C to 125°C internal operating
temperature range. The LTM8032MP is guaranteed to meet specifications
over the full –55°C to 125°C internal operating temperature range. Note
that the maximum internal temperature is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
resistance and other environmental factors.
Note 3: See Linear Technology Application Note 100.
8032fa
3
LTM8032
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
3.3VOUT Efficiency
5VOUT Efficiency
8VOUT Efficiency
100
90
100
90
100
90
80
70
60
80
70
60
80
70
60
50
40
50
40
50
40
30
20
10
0
30
20
10
0
30
20
10
0
5.5V
12V
IN
IN
12V
24V
36V
12V
24V
36V
IN
IN
IN
IN
IN
IN
24V
36V
IN
IN
0.01
1
10
0.01
1
10
0.01
1
10
0.1
0.1
0.1
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
8031 G01
8031 G02
8031 G03
Input Current vs Output Current,
3.3VOUT
Input Current vs Output Current,
5VOUT
Input Current vs Output Current,
8VOUT
1200
1000
1600
1400
1200
1000
800
600
400
200
0
1800
1600
1400
1200
1000
800
5.5V
IN
12V
IN
12V
IN
12V
IN
24V
IN
24V
IN
24V
36V
36V
IN
36V
IN
IN
IN
800
600
400
200
0
600
400
200
0
1000
OUTPUT CURRENT (mA)
0
500
1500
2000
0
500
1000
1500
2000
1000
OUTPUT CURRENT (mA)
1
500
1500
2000
OUTPUT CURRENT (mA)
8032 G04
8032 G05
8032 G06
Minimum Required Input Voltage
vs Output Voltage, IOUT = 2A
Minimum Required Input Voltage
vs Load Current, VOUT = 2.5V
Minimum Required Input Voltage
vs Load Current, VOUT = 3.3V
14
12
6.0
5.5
5.0
4.5
10
8
5.0
4.5
4.0
3.5
6
4
2
4.0
3.5
3.0
3.0
2.5
2.0
TO RUN
TO START
TO RUN
RUN/SS ENABLED
TO START
0
2
4
6
8
10
0
500
1000
1500
2000
0
500
1000
1500
2000
OUTPUT VOLTAGE (V)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
8032 G07
8032 G09
8032 G08
8032fa
4
LTM8032
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
Minimum Required Input Voltage
vs Load Current, VOUT = 5V
Minimum Required Input Voltage
vs Load Current, VOUT = 8V
Bias Current vs Output Current
7.5
7.0
6.5
6.0
5.5
5.0
30
25
11.0
10.5
3.3V
OUT
5V
8V
OUT
OUT
20
15
10.0
9.5
10
5
9.0
8.5
8.0
TO RUN
TO START
RUN/SS ENABLED
TO RUN
TO START
RUN/SS ENABLED
0
0
500
1000
1500
2000
0
500
1000
1500
2000
0
500
1000
1500
2000
OUTPUT CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
8032 G10
8032 G12
8032 G11
Output Current vs Input Voltage
(Output Shorted)
Input Current vs Input Voltage
(Output Shorted)
Temperature Rise vs
Load Current, VOUT = 2.5V
3200
3000
2800
2600
2400
2200
2000
1800
1600
1200
1000
35
30
25
20
15
10
5
800
600
400
200
0
5V
IN
12V
IN
IN
IN
24V
36V
0
20
0
10
30
40
500
1000
1500
2500
0
2000
0
10
20
30
40
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
LOAD CURRENT (mA)
8032 G13
8032 G15
8032 G14
Temperature Rise vs
Load Current, VOUT = 3.3V
Temperature Rise vs
Temperature Rise vs
Load Current, VOUT = 5V
Load Current, VOUT = 8V
50
45
40
35
30
25
20
15
10
5
40
35
30
25
40
35
30
25
20
15
20
15
10
5
10
5
5V
IN
12V
24V
36V
12V
24V
36V
12V
IN
IN
IN
IN
IN
IN
IN
IN
IN
24V
36V
0
0
0
0
500
1000
1500
2000
2500
500
1000
LOAD CURRENT (mA)
2000
500
1000
LOAD CURRENT (mA)
2000
0
2500
0
2500
1500
1500
LOAD CURRENT (mA)
8032 G18
8032 G16
8032 G17
8032fa
5
LTM8032
TYPICAL PERFORMANCE CHARACTERISTICS TA = 25°C, unless otherwise noted.
Temperature Rise vs
Load Current, VOUT = 10V
Radiated Emissions
Radiated Emissions
90
70
90
70
50
45
40
35
30
25
20
15
10
5
50
50
30
30
10
10
–10
–10
0
100 200 300 400 500 600 700 800 9001000
0
100 200 300 400 500 600 700 800 9001000
FREQUENCY (MHz)
FREQUENCY (MHz)
8031 G20
8031 G21
V
V
= 36V
OUT
V
V
= 13V
IN
IN
= 10V AT 2A
= 10V AT 2A
OUT
24V
36V
IN
IN
0
0
500
1000
1500
2000
2500
LOAD CURRENT (mA)
8032 G19
PIN FUNCTIONS
V (Bank3):TheV pinsuppliescurrenttotheLTM8032’s
BIAS(PinH4):TheBIASpinconnectstotheinternalpower
bus. Connect to a power source greater than 2.8V. If the
output is greater than 2.8V, connect this pin to AUX. If the
output voltage is less, connect this to a voltage source
IN
IN
internal regulator and to the internal power switch. This
pin must be locally bypassed with an external, low ESR
capacitor of at least 2.2μF.
between 2.8V and 25V. Also, make sure that BIAS + V
is less than 56V.
IN
FIN (K3, L3): Filtered Input. This is the node after the input
EMI filter. Use this only if there is a need to modify the
behavior of the integrated EMI filter or if V rises or falls
RUN/SS (Pin L5): Pull RUN/SS pin to less than 0.2V to
shut down the LTM8032. Tie to 2.5V or more for normal
operation. If the shutdown feature is not used, tie this pin
IN
rapidly; otherwise, leave these pins unconnected. See the
Applications Information section for more details.
to the V pin. RUN/SS also provides a soft-start function;
IN
GND (Bank 2): Tie these GND pins to a local ground plane
see the Applications Information section.
below the LTM8032 and the circuit components. Return
the feedback divider (R ) to this net.
RT (Pin G7): The RT pin is used to program the switching
frequency of the LTM8032 by connecting a resistor from
thispintoground.TheApplicationsInformationsectionof
the data sheet includes a table to determine the resistance
value based on the desired switching frequency. Minimize
capacitance at this pin.
ADJ
V
(Bank 1): Power Output Pins. Apply the output filter
OUT
capacitor and the output load between these pins and
GND pins.
AUX (Pin H5): Low Current Voltage Source for BIAS. In
many designs, the BIAS pin is simply connected to V
.
OUT
and is placed
SHARE (Pin H7): Tie this to the SHARE pin of another
LTM8032 when paralleling the outputs. Otherwise, do
not connect.
The AUX pin is internally connected to V
OUT
adjacent to the BIAS pin to ease printed circuit board rout-
ing. Although this pin is internally connected to V , do
OUT
not connect this pin to the load. If this pin is not tied to
BIAS, leave it floating.
8032fa
6
LTM8032
PIN FUNCTIONS
SYNC (Pin L6): This is the external clock synchronization
input.GroundthispinforlowrippleBurstMode® operation
at low output loads. Tie to a stable voltage source greater
than 0.7V to disable Burst Mode operation. Do not leave
this pin floating. Tie to a clock source for synchronization.
Clockedgesshouldhaveriseandfalltimesfasterthan1μs.
See synchronizing section in Applications Information.
ADJ (Pin J7): The LTM8032 regulates its ADJ pin to 0.79V.
Connect the adjust resistor from this pin to ground. The
value of R
is given by the equation:
ADJ
196.71
VOUT –0.79
RADJ
=
where R
is in kΩ.
ADJ
Burst Mode is a registered trademark of Linear Technology Corporation.
PGOOD (Pin K7): The PGOOD pin is the open-collector
outputofaninternalcomparator.PGOODremainslowuntil
the ADJ pin is within 10% of the final regulation voltage.
The PGOOD output is valid when V is above 3.6V and
IN
RUN/SS is high. If this function is not used, leave this
pin floating.
BLOCK DIAGRAM
FIN
EMI FILTER
4.7μH
V
OUT
V
IN
AUX
249k
10μF
GND
GND
BIAS
SHARE
CURRENT
MODE
CONTROLLER
RUN/SS
SYNC
RT
PGOOD
ADJ
8032 BD
8032fa
7
LTM8032
OPERATION
The LTM8032 is a standalone nonisolated step-down
switching DC/DC power supply. It can deliver up to 2A of
DC output current with only bulk external input and output
capacitors. This module provides a precisely regulated
output voltage programmable via one external resistor
from 0.8VDC to 10VDC. The input voltage range is 3.6V
to 36V. Given that the LTM8032 is a step-down converter,
make sure that the input voltage is high enough to support
the desired output voltage and load current. A simplified
Block Diagram is given on the previous page.
Aninternalregulatorprovidespowertothecontrolcircuitry.
The bias regulator can draw power from the V pin, but if
IN
theBIASpinisconnectedtoanexternalvoltagehigherthan
2.8V, bias power will be drawn from the external source
(typically the regulated output voltage). This improves
efficiency. The RUN/SS pin is used to place the LTM8032
in shutdown, disconnecting the output and reducing the
input current to less than 1μA.
To further optimize efficiency, the LTM8032 automatically
switches to Burst Mode operation in light load situations.
Betweenbursts,allcircuitryassociatedwithcontrollingthe
output switch is shut down reducing the input supply cur-
rentto50μAinatypicalapplication. Theoscillatorreduces
theLTM8032’soperatingfrequencywhenthevoltageatthe
ADJ pin is low. This frequency foldback helps to control
the output current during start-up and overload.
TheLTM8032isdesignedwithaninputEMIfilterandother
features to make its radiated emissions compliant with
several EMC specifications including EN55022 class B.
Compliance with conducted emissions requirements may
be obtained by adding a standard input filter.
The LTM8032 contains a current mode controller, power
switching element, power inductor, power Schottky diode
andamodestamountofinputandoutputcapacitance.The
LTM8032 is a fixed frequency PWM regulator. The switch-
ing frequency is set by simply connecting the appropriate
resistor value from the RT pin to GND.
The LTM8032 contains a power good comparator which
trips when the ADJ pin is at 90% of its regulated value.
The PGOOD output is an open-collector transistor that is
off when the output is in regulation, allowing an external
resistor to pull the PGOOD pin high. Power good is valid
when the LTM8032 is enabled and V is above 3.6V.
IN
APPLICATIONS INFORMATION
For most applications, the design process is straight
forward, summarized as follows:
Capacitor Selection Considerations
The C and C
capacitor values in Table 1 are the
IN
OUT
1. Look at Table 1 and find the row that has the desired
input range and output voltage.
minimum recommended values for the associated oper-
ating conditions. Applying capacitor values below those
indicated in Table 1 is not recommended, and may result
in undesirable operation. Using larger values is generally
acceptable, and can yield improved dynamic response, if
it is necessary. Again, it is incumbent upon the user to
verify proper operation over the intended system’s line,
load and environmental conditions.
2. Apply the recommended C , C , R
and R
T
IN
OUT
ADJ
values.
3. Connect BIAS as indicated.
AstheintegratedinputEMIfiltermayringinresponsetoan
applicationofastepinputvoltage,abulkcapacitance,series
resistanceorsomeclampingmechanismmayberequired.
See the Hot-Plugging Safely section for details.
Ceramic capacitors are small, robust and have very low
ESR. However, notallceramiccapacitorsaresuitable. X5R
and X7R types are stable over temperature and applied
voltage and give dependable service. Other types, includ-
ing Y5V and Z5U have very large temperature and voltage
coefficients of capacitance. In an application circuit they
Whilethesecomponentcombinationshavebeentestedfor
proper operation, it is incumbent upon the user to verify
proper operation over the intended system’s line, load and
environmental conditions.
8032fa
8
LTM8032
APPLICATIONS INFORMATION
Table 1: Recommended Component Values and Configuration
V
V
C
C
R
ADJ
BIAS
f
R
f
R
T(MIN)
IN
OUT
IN
OUT
OPTIMAL
T(OPTIMAL)
MAX
3.6V to 36V
3.6V to 36V
3.6V to 36V
3.6V to 36V
3.6V to 36V
3.6V to 36V
4.0V to 36V
4.3V to 36V
5.5V to 36V
7V to 36V
10.5V to 36V
3.6V to 15V
3.6V to 15V
3.6V to 15V
3.6V to 15V
3.6V to 15V
3.6V to 15V
4.0V to 15V
4.3V to 15V
5.5V to 15V
7V to 15V
0.82V
1.00V
1.20V
1.50V
1.80V
2.00V
2.20V
2.50V
3.30V
5.00V
8.00V
0.82V
1.00V
1.20V
1.50V
1.80V
2.00V
2.20V
2.50V
3.30V
5.00V
0.82V
1.00V
1.20V
1.50V
1.80V
2.00V
2.20V
2.50V
3.30V
5.00V
8.00V
10.00V
0.82V
1.00V
1.20V
1.50V
1.80V
2.00V
2.20V
2.50V
3.30V
5.00V
8.00V
10.00V
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
2.2μF
200μF 1206
200μF 1206
147μF 1206
147μF 1206
100μF 1206
68μF 1206
68μF 1206
47μF 1206
22μF 1206
10μF 1206
10μF 1206
200μF 1206
200μF 1206
147μF 1206
147μF 1206
100μF 1206
68μF 1206
68μF 1206
47μF 1206
22μF 1206
10μF 1206
200μF 1206
200μF 1206
147μF 1206
147μF 1206
100μF 1206
68μF 1206
47μF 1206
22μF 1206
22μF 1206
10μF 1206
10μF 1206
10μF 1206
200μF 1206
200μF 1206
147μF 1206
147μF 1206
100μF 1206
68μF 1206
47μF 1206
22μF 1206
22μF 1206
10μF 1206
10μF 1206
10μF 1206
5.62M
953k
487k
280k
196k
165k
140k
115k
78.7k
47.5k
27.4k
5.62M
953k
487k
280k
196k
165k
140k
115k
78.7k
47.5k
5.62M
953k
487k
280k
196k
165k
140k
115k
78.7k
47.5k
27.4k
21.5k
5.62M
953k
487k
280k
196k
165k
140k
115k
78.7k
47.5k
27.4k
21.5k
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
AUX
250k
150k
124k
105k
88.7k
78.7k
78.7k
69.8k
61.9k
54.9k
44.2k
39.2k
150k
124k
105k
88.7k
78.7k
78.7k
69.8k
61.9k
54.9k
44.2k
150k
124k
105k
88.7k
78.7k
78.7k
69.8k
61.9k
54.9k
44.2k
39.2k
34.0k
150k
124k
105k
88.7k
78.7k
78.7k
69.8k
61.9k
54.9k
44.2k
39.2k
34.0k
250k
300k
350k
400k
450k
450k
500k
600k
700k
1M
1.5M
600k
700k
800k
900k
1M
1.1M
1.25M
1.3M
1.7M
2M
400k
450k
500k
550k
650k
700k
750k
800k
1M
1.5M
1.5M
1.3M
250k
300k
350k
400k
450k
450k
500k
600k
700k
1M
150k
124k
105k
300k
350k
400k
450k
450k
500k
550k
600k
700k
800k
250k
300k
350k
400k
450k
450k
500k
550k
600k
700k
250k
300k
350k
400k
450k
450k
500k
550k
600k
700k
800k
900k
250k
300k
350k
400k
450k
450k
500k
550k
600k
700k
800k
900k
88.7k
78.7k
78.7k
69.8k
54.9k
44.2k
29.4k
16.2k
54.9k
44.2k
39.2k
34.0k
29.4k
26.1k
22.1k
21.0k
14.0k
10.0k
88.7k
79.0k
69.8k
61.9k
49.9k
44.2k
42.2k
39.2k
29.4k
16.2k
16.2k
21.0k
150k
AUX
AUX
V
V
V
V
V
V
V
V
IN
IN
IN
IN
IN
IN
IN
IN
AUX
AUX
9V to 24V
9V to 24V
9V to 24V
9V to 24V
9V to 24V
9V to 24V
9V to 24V
9V to 24V
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
AUX
9V to 24V
9V to 24V
AUX
AUX
AUX
10.5V to 24V
13V to 24V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
18V to 36V
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
≥2.8V, <25V
AUX
124k
105k
88.7k
78.7k
78.7k
69.8k
54.9k
44.2k
29.4k
16.2k
21.0k
AUX
AUX
AUX
1.5M
1.3M
Note: An input bulk capacitor is required. 200μF is 2 × 100μF, 147 is 100μF||47μF
8032fa
9
LTM8032
APPLICATIONS INFORMATION
may have only a small fraction of their nominal capaci-
tance resulting in much higher output voltage ripple than
expected. Ceramic capacitors are also piezoelectric. In
BurstModeoperation,theLTM8032’sswitchingfrequency
depends on the load current, and can excite a ceramic
capacitor at audio frequencies, generating audible noise.
SincetheLTM8032operatesatalowercurrentlimitduring
Burst Mode operation, the noise is typically very quiet to a
casual ear. If this audible noise is unacceptable, use a high
performanceelectrolyticcapacitorattheoutput. Theinput
capacitor can be a parallel combination of a 2.2μF ceramic
capacitor and a low cost electrolytic capacitor.
Table 2. Switching Frequency vs RT Value
SWITCHING FREQUECNY (MHz)
R VALUE (kΩ)
T
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.2
1.4
1.5
1.8
2
187
124
88.7
69.8
54.9
44.2
39.2
34
29.4
23.7
19.1
16.2
13.3
11.5
9.76
8.66
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LTM8032. A
ceramic input capacitor combined with trace or cable
inductance forms a high Q (under damped) tank circuit.
If the LTM8032 circuit is plugged into a live supply, the
input voltage can ring to twice its nominal value, possi-
bly exceeding the device’s rating. This situation is easily
avoided; see the Hot-Plugging Safely section.
2.2
2.4
of operating frequencies, a haphazardly chosen one may
result in undesirable operation under certain operating or
fault conditions. A frequency that is too high can reduce
efficiency, generate excessive heat or even damage the
LTM8032 if the output is overloaded or short-circuited.
A frequency that is too low can result in a final design
that has too much output ripple or too large of an output
Electromagnetic Compliance
The LTM8032 is compliant with the radiated emissions
requirementsofEN55022classB.GraphsoftheLTM8032’s
EMC performance are given in the Typical Performance
Characteristicssection.Furtherdata,operatingconditions
and test setup are detailed in an EMI Test report available
from Linear Technology.
cap. The maximum frequency (and attendant R value) at
which the LTM8032 should be allowed to switch is given
T
in Table 1 in the f
column, while the recommended
MAX
frequency (and R value) for optimal efficiency over the
T
given input condition is given in the f
column.
OPTIMAL
Frequency Selection
There are additional conditions that must be satisfied if
the synchronization function is used. Please refer to the
Synchronization section for details.
TheLTM8032usesaconstantfrequencyPWMarchitecture
thatcanbeprogrammedtoswitchfrom200kHzto2.4MHz
by using a resistor tied from the RT pin to ground. Table 2
BIAS Pin Considerations
provides a list of R resistor values and their resultant
T
frequencies.
TheBIASpinisusedtoprovidedrivepowerfortheinternal
power switching stage and operate internal circuitry. For
proper operation, it must be powered by at least 2.8V. If
the output voltage is programmed to be 2.8V or higher,
Operating Frequency Trade-Offs
It is recommended that the user apply the optimal R
T
value given in Table 1 for the input and output operating
condition. System level or other considerations, however,
may necessitate another operating frequency. While the
LTM8032 is flexible enough to accommodate a wide range
simply tie BIAS to AUX. If V
is less than 2.8V, BIAS
OUT
can be tied to V or some other voltage source. In all
IN
cases, ensure that the maximum voltage at the BIAS pin
is both less than 25V and the sum of V and BIAS is less
IN
8032fa
10
LTM8032
APPLICATIONS INFORMATION
than 56V. If BIAS power is applied from a remote or noisy
voltage source, it may be necessary to apply a decoupling
capacitor locally to the LTM8032.
6.0
5.5
V
= 3.3V
OUT
5.0
4.5
Load Sharing
TwoormoreLTM8032smaybeparalleledtoproducehigher
currents. This may, however, alter the EMI performance of
4.0
3.5
3.0
theLTM8032s.Todothis,tietheV ,ADJ,V andSHARE
IN
OUT
TO RUN
TO START
pinsofalltheparalleledLTM8032stogether.Toensurethat
paralleledmodulesstartuptogether,theRUN/SSpinsmay
be tied together, as well. Synchronize the LTM8032s to an
external clock to eliminate beat frequencies, if required. If
the RUN/SS pins are not tied together, make sure that the
samevaluedsoft-startcapacitorsareusedforeachmodule.
An example of two LTM8032 modules configured for load
sharing is given in the Typical Applications section.
RUN/SS ENABLED
0
500
1000
1500
2000
LOAD CURRENT (mA)
8032 F01a
7.5
7.0
6.5
6.0
5.5
5.0
V
= 5V
OUT
Burst Mode Operation
To enhance efficiency at light loads, the LTM8032 auto-
matically switches to Burst Mode operation which keeps
the output capacitor charged to the proper voltage while
minimizingtheinputquiescentcurrent.DuringBurstMode
operation, the LTM8032 delivers single cycle bursts of
current to the output capacitor followed by sleep periods
wheretheoutputpowerisdeliveredtotheloadbytheoutput
TO RUN
TO START
RUN/SS ENABLED
0
500
1000
1500
2000
LOAD CURRENT (mA)
8032 F01b
Figure 1. The LTM8032 Needs More Voltage to Start Than Run
capacitor. In addition, V and BIAS quiescent currents are
IN
reduced to typically 20μA and 50μA respectively during
the sleep time. As the load current decreases towards a
no-loadcondition,thepercentageoftimethattheLTM8032
operates in sleep mode increases and the average input
current is greatly reduced, resulting in higher efficiency.
BurstModeoperationisenabledbytyingSYNCtoGND. To
disable Burst Mode operation, tie SYNC to a stable voltage
above 0.7V. Do not leave the SYNC pin floating.
5.5V to start. If the LTM8032 is enabled via the RUN/SS
IN
pin, the minimum voltage to start at light loads is lower,
about 4.5V. A similar curve for 5V
provided in Figure 1.
operation is also
OUT
Soft-Start
The RUN/SS pin can be used to soft-start the LTM8032,
reducing the maximum input current during start-up. The
RUN/SS pin is driven through an external RC network to
create a voltage ramp at this pin. Figure 2 shows the start-
up and shutdown waveforms with the soft-start circuit. By
choosinganappropriateRCtimeconstant,thepeakstart-up
current can be reduced to the current that is required to
regulate the output, with no overshoot. Choose the value
of the resistor so that it can supply at least 20μA when
the RUN/SS pin reaches 2.5V.
Minimum Input Voltage
The LTM8032 is a step-down converter, so a minimum
amount of headroom is required to keep the output in
regulation. In addition, the input voltage required to turn
on is higher than that required to run, and depends upon
whether the RUN/SS is used. As shown in Figure 1, it
takes only about 3.6V for the LTM8032 to run a 3.3V
IN
output at light load. If RUN/SS is pulled up to V , it takes
IN
8032fa
11
LTM8032
APPLICATIONS INFORMATION
V
V
V
V
OUT
IN
IN
OUT
RUN/SS
LTM8032
AUX
I
L
RUN
15k
1A/DIV
BIAS
ADJ
R
SYNC GND
T
RUN/SS
V
RUN/SS
2V/DIV
GND
0.22μF
V
OUT
8032 F03
2V/DIV
Figure 3. The Input Diode Prevents a Shorted Input from
Discharging a Back-Up Battery Tied to the Output. It Also
Protects the Circuit from a Reversed Input. The LTM8032
Runs Only When the Input is Present
8023 F02
2ms/DIV
Figure 2. To Soft-Start the LTM8032, Add a Resistor
and Capacitor to the RUN/SS Pin
PCB Layout
Synchronization
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8032. The LTM8032 is neverthe-
less a switching power supply and care must be taken to
minimize EMI and ensure proper operation. Even with the
high level of integration, you may fail to achieve specified
operation with a haphazard or poor layout. See Figure 4
for a suggested layout.
The internal oscillator of the LTM8032 can be synchro-
nized by applying an external 250kHz to 2MHz clock to
the SYNC pin. Do not leave this pin floating. The resistor
tied from the RT pin to ground should be chosen such
that the LTM8032 oscillates 20% lower than the intended
synchronization frequency (see the Frequency Selection
section).TheLTM8032willnotenterBurstModeoperation
while synchronized to an external clock, but will instead
skip pulses to maintain regulation.
Ensurethatthegroundingandheatsinkingareacceptable.
A few rules to keep in mind are:
Shorted Input Protection
1. Place the R and R resistors as close as possible to
ADJ
T
Care needs to be taken in systems where the output will
be held high when the input to the LTM8032 is absent.
This may occur in battery charging applications or in
battery back-up systems where a battery or some other
supply is diode ORed with the LTM8032’s output. If the
their respective pins.
2. Place the C capacitor as close as possible to the V
IN
IN
and GND connection of the LTM8032. If a capacitor
is connected to the FIN terminals, place it as close
as possible to the FIN terminals, such that its ground
V pin is allowed to float and the RUN/SS pin is held high
IN
connection is as close as possible to that of the C
capacitor.
IN
(either by a logic signal or because it is tied to V ), then
IN
the LTM8032’s internal circuitry will pull its quiescent
current through its internal power switch. This is fine if
your system can tolerate a few milliamps in this state. If
you ground the RUN/SS pin, the internal switch current
3. Place the C
capacitor as close as possible to the
OUT
V
and GND connection of the LTM8032.
OUT
4. Place the C and C
capacitors such that their
IN
OUT
will drop to essentially zero. However, if the V pin is
IN
ground currents flow directly adjacent or underneath
grounded while the output is held high, then parasitic
the LTM8032.
diodes inside the LTM8032 can pull large currents from
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8032.
the output through the V pin, potentially damaging the
IN
device. Figure 3 shows a circuit that will run only when
the input voltage is present and that protects against a
shorted or reversed input.
8032fa
12
LTM8032
APPLICATIONS INFORMATION
If the input supply is poorly controlled or the user will
be plugging the LTM8032 into an energized supply, the
input network should be designed to prevent this over-
shoot. Figure 5 shows the waveforms that result when
an LTM8032 circuit is connected to a 24V supply through
six feet of 24-gauge twisted pair. The first plot (5a) is the
response with a 2.2μF ceramic capacitor at the input. The
input voltage rings as high as 35V and the input current
peaks at 20A. One method of damping the tank circuit
is to add another capacitor with a series resistor to the
circuit. An alternative solution is shown in Figure 5b. A
0.7Ω resistor is added in series with the input to eliminate
the voltage overshoot (it also reduces the peak input cur-
rent). A 0.1μF capacitor improves high frequency filtering.
For high input voltages its impact on efficiency is minor,
reducing efficiency less than one-half percent for a 5V
output at full load operating from 24V. By far the most
popularmethodofcontrollingovershootisshowninFigure
5c, where an aluminum electrolytic capacitor has been
connected to FIN. This capacitor’s high equivalent series
resistance damps the circuit and eliminates the voltage
overshoot. The extra capacitor improves low frequency
ripple filtering and can slightly improve the efficiency of
the circuit, though it is likely to be the largest component
in the circuit. Figure 5c shows the capacitor added to the
GND
C
SYNC
OUT
AUX
BIAS
RUN/SS
FIN
V
IN
OPTIONAL
FIN
CAPACITOR
V
OUT
C
IN
GND
8032 F04
Figure 4. Layout Showing Suggested External Components,
GND Plane and Thermal Vias
6. Use vias to connect the GND copper area to the board’s
internalgroundplane.LiberallydistributetheseGNDvias
to provide both a good ground connection and thermal
path to the internal planes of the printed circuit board.
V terminals, but placing the electrolytic capacitor at the
IN
FIN terminals can improve the LTM8032’s EMI filtering as
well as guard against overshoots caused by the Q of the
integrated filter.
Hot-Plugging Safely
Thermal Considerations
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LTM8032. However, these capacitors
can cause problems if the LTM8032 is plugged into a live
or fast rising or falling supply (see Linear Technology
Application Note 88 for a complete discussion). The low
loss ceramic capacitor combined with stray inductance in
serieswiththepowersourceformsanunder-dampedtank
The LTM8032 output current may need to be derated if it
is required to operate in a high ambient temperature or
deliveralargeamountofcontinuouspower.Theamountof
current derating is dependent upon the input voltage, out-
put power and ambient temperature. The derating curves
given in the Typical Performance Characteristics section
can be used as a guide. These curves were generated by a
2
LTM8032 mounted to a 36cm 4-layer FR4 printed circuit
circuit, and the voltage at the V pin of the LTM8032 can
IN
board. Boards of other sizes and layer count can exhibit
differentthermalbehavior,soitisincumbentupontheuser
to verify proper operation over the intended system’s line,
load and environmental operating conditions.
ring to twice the nominal input voltage, possibly exceed-
ing the LTM8032’s rating and damaging the part. A similar
phenomenoncanoccurinsidetheLTM8032module,atthe
output of the integrated EMI filter, with the same potential
of damaging the part.
8032fa
13
LTM8032
APPLICATIONS INFORMATION
CLOSING SWITCH
DANGER
SIMULATES HOT PLUG
V
IN
I
IN
20V/DIV
LTM8032
IN
RINGING V MAY EXCEED
ABSOLUTE MAXIMUM RATING
V
IN
+
4.7μF
I
IN
LOW
STRAY
10A/DIV
IMPEDANCE
ENERGIZED
24V SUPPLY
INDUCTANCE
DUE TO 6 FEET
(2 METERS) OF
TWISTED PAIR
20μs/DIV
(5a)
LTM8032
0.7Ω
V
IN
20V/DIV
V
IN
+
0.1μF
4.7μF
I
IN
10A/DIV
20μs/DIV
(5b)
FIN
LTM8032
V
IN
20V/DIV
V
IN
+
+
22μF
35V
AI.EI.
4.7μF
I
IN
10A/DIV
8032 F05
20μs/DIV
(5c)
Figure 5. A Well Chosen Input Network Prevents Input Voltage Overshoot and Ensures
Reliable Operation When the LTM8032 is Hot-Plugged to a Live Supply
The die temperature of the LTM8032 must be lower than
thermal resistance of the LTM8032 to the printed circuit
board depends upon the layout of the circuit board, but
the thermal resistance given in the Pin Configuration,
as well as the internal temperature rise curves given in
the Typical Performance Characteristics section, can be
used a guide. Both the thermal resistance and internal
the maximum rating of 125°C, so care should be taken
in the layout of the circuit to ensure good heat sinking
of the LTM8032. To estimate the junction temperature,
approximate the power dissipation within the LTM8032 by
applying the typical efficiency stated in this data sheet to
the desired output power, or, if you have an actual module,
by taking a power measurement. Then calculate the tem-
perature rise of the LTM8032 junction above the surface
of the printed circuit board by multiplying the module’s
power dissipation by the thermal resistance. The actual
2
temperature rise curves are based upon a 36cm 4-layer
FR4 PC board.
Finally, be aware that at high ambient temperatures the
internalSchottkydiodewillhavesignificantleakagecurrent,
increasing the input quiescent current of the LTM8032.
8032fa
14
LTM8032
TYPICAL APPLICATIONS
0.82V Step-Down Converter
V
OUT
V
*
IN
0.82V
2A
OUT
AUX
V
IN
3.6VDC TO 24VDC
200μF
2.2μF
FIN LTM8032
RUN/SS
BIAS
SHARE
PGOOD
RT
SYNC GND ADJ
150k
5.62M
8032 TA02
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
1.8V Step-Down Converter
V
1.8V
2A
OUT
V
*
IN
OUT
AUX
V
IN
3.6VDC TO 24VDC
100μF
2.2μF
FIN LTM8032
RUN/SS
BIAS
SHARE
PGOOD
SYNC GND ADJ
RT
78.7k
196k
8032 TA03
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
8032fa
15
LTM8032
TYPICAL APPLICATIONS
2.5V Step-Down Converter
V
2.5V
2A
OUT
V
*
IN
OUT
AUX
V
IN
4.3VDC TO 36VDC
47μF
2.2μF
FIN LTM8032
RUN/SS
3.3V
BIAS
SHARE
PGOOD
RT SYNC GND ADJ
61.9k
115k
8032 TA04
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
3.3V Step-Down Converter
V
3.3V
2A
OUT
V
*
IN
OUT
V
IN
5.5VDC TO 36VDC
22μF
FIN
AUX
RUN/SS
2.2μF
LTM8032
BIAS
SHARE
PGOOD
RT
SYNC GND ADJ
54.9k
78.7k
8032 TA08
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
5V Step-Down Converter
V
5V
2A
OUT
V
*
IN
OUT
V
IN
7VDC TO 36VDC
10μF
FIN
AUX
RUN/SS
2.2μF
LTM8032
BIAS
SHARE
PGOOD
RT
SYNC GND ADJ
44.2k
47.5k
8032 TA05
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
8032fa
16
LTM8032
TYPICAL APPLICATIONS
8V Step-Down Converter
V
8V
2A
OUT
V
*
IN
OUT
V
IN
10.5VDC TO 36VDC
10μF
FIN
AUX
RUN/SS
2.2μF
LTM8032
BIAS
SHARE
PGOOD
RT
SYNC GND ADJ
39.2k
27.4k
8032 TA06
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
Two LTM8032s Operating in Parallel
V
3.3V
3.5A
OUT
V
*
IN
OUT
V
IN
5.5VDC TO 36VDC
FIN
AUX
RUN/SS
LTM8032
BIAS
2.2μF
SHARE
PGOOD
RT
SYNC GND ADJ
54.9k
40k
OPTIONAL SYNC TIE TO
GND IF NOT USED
OUT
V
IN
47μF
FIN
AUX
RUN/SS
LTM8032
BIAS
2.2μF
SHARE
PGOOD
RT
SYNC GND ADJ
8032 TA07
54.9k
*RUNNING VOLTAGE RANGE.
SEE APPLICATIONS FOR START-UP DETAILS
8032fa
17
LTM8032
PACKAGE DESCRIPTION
LGA Package
71-Lead (15mm × 9mm × 2.82mm)
(Reference LTC DWG # 05-08-1823 Rev Ø)
2.670 – 2.970
7
6
5
4
3
2
1
PAD 1
Ø (0.635)
aaa
Z
A
B
C
D
E
F
PAD 1
CORNER
4
15.00
BSC
12.700
BSC
G
H
J
MOLD
SUBSTRATE
CAP
0.27 – 0.37
2.40 – 2.60
K
L
1.270
BSC
DETAIL A
PADS
X
Y
1.27
BSC
SEE NOTES
9.00
BSC
DETAIL A
7.620
BSC
3
DETAIL A
PACKAGE SIDE VIEW
PACKAGE TOP VIEW
PACKAGE BOTTOM VIEW
0.635 0.025 SQ. 71x
eee
S X Y
6.350
DETAIL A
5.080
3.810
2.540
1.270
0.000
1.270
2.540
3.810
NOTES:
LTMXXXXXX
μModule
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994
COMPONENT
2. ALL DIMENSIONS ARE IN MILLIMETERS
PIN 1
3
4
LAND DESIGNATION PER JESD MO-222, SPP-010 AND SPP-020
TRAY PIN 1
BEVEL
DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL,
BUT MUST BE LOCATED WITHIN THE ZONE INDICATED.
THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR
MARKED FEATURE
PACKAGE IN TRAY LOADING ORIENTATION
LGA 71 0108 REV
Ø
5. PRIMARY DATUM -Z- IS SEATING PLANE
6. THE TOTAL NUMBER OF PADS: 71
SYMBOL TOLERANCE
aaa
bbb
eee
0.15
0.10
0.05
5.080
6.350
SUGGESTED PCB LAYOUT
TOP VIEW
8032fa
18
LTM8032
PACKAGE DESCRIPTION
Table 2. LTM8032 Pinout (Sorted by Pin Number)
PIN
A1
A2
A3
A4
A5
A6
A7
B1
B2
B3
B4
B5
B6
B7
C1
C2
C3
C4
C5
C6
C7
D1
D2
D3
D4
D5
D6
D7
E1
E2
E3
E4
E5
E6
E7
SIGNAL DESCRIPTION
PIN
F1
SIGNAL DESCRIPTION
V
V
V
V
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
RT
OUT
OUT
OUT
OUT
F2
F3
F4
GND
GND
GND
F5
F6
F7
V
V
V
V
G1
G2
G3
G4
G5
G6
G7
H1
H2
H3
H4
H5
H6
H7
J5
OUT
OUT
OUT
OUT
GND
GND
GND
V
V
V
V
GND
GND
GND
BIAS
AUX
GND
SHARE
GND
GND
ADJ
OUT
OUT
OUT
OUT
GND
GND
GND
V
V
V
V
OUT
OUT
OUT
OUT
J6
J7
K1
K2
K3
K5
K6
K7
L1
L2
L3
L5
L6
L7
V
V
IN
IN
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
FIN
GND
GND
PGOOD
V
V
IN
IN
FIN
RUN/SS
SYNC
GND
8032fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTM8032
PACKAGE PHOTOGRAPH
RELATED PARTS
PART NUMBER
LTM4606
DESCRIPTION
COMMENTS
4.5V ≤ V ≤ 28V, 0.6V ≤ V
Ultralow Noise 6A DC/DC μModule
≤ 5V, 15mm × 15mm × 2.8mm Package
≤ 15V, 15mm × 15mm × 2.8mm Package
OUT
IN
OUT
LTM4612
Ultralow Noise High V
DC/DC μModule
OUT
5A, 5V ≤ V ≤ 36V, 3.3V ≤ V
IN
LTM8023
36V, 2A DC/DC μModule
3.6V ≤ V ≤ 36V, 0.8V ≤ V
≤ 10V, 9mm × 11.75mm × 2.8mm Package
IN
OUT
8032fa
LT 0409 REV A • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
●
© LINEAR TECHNOLOGY CORPORATION 2009
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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