LTM8058IY [Linear]
LTM8058 - 3.1Vin to 31Vin Isolated µModule (Power Module) DC/DC Converter with LDO Post Regulator; Package: BGA; Pins: 38; Temperature Range: -40°C to 85°C;
| 型号： | LTM8058IY |
| 厂家： | 
Linear |
| 描述： | LTM8058 - 3.1Vin to 31Vin Isolated µModule (Power Module) DC/DC Converter with LDO Post Regulator; Package: BGA; Pins: 38; Temperature Range: -40°C to 85°C 开关 输出元件 |
| 文件： | 总20页 (文件大小：327K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTM8058
3.1V to 31V Isolated
IN
IN
µModule DC/DC Converter
with LDO Post Regulator
FEATURES
DESCRIPTION
The LTM®8058 is a 2kV AC isolated flyback µModule®
(micromodule) DC/DC converter with LDO post regulator.
Includedinthepackagearetheswitchingcontroller,power
switches, transformer, LDO, and all support components.
Operating over an input voltage range of 3.1V to 31V, the
LTM8058supportsanoutputvoltagerangeof2.5Vto13V,
setbyasingleresistor. Thereisalsoalinearpostregulator
whose output voltage is adjustable from 1.2V to 12V as
set by a single resistor. Only output and input capacitors
are needed to finish the design. Other components may
be used to control the soft-start control and biasing.
n
2kV AC Isolated µModule Converter
(Tested to 3kVDC)
n
UL60950 Recognized File E464570
n
Wide Input Voltage Range: 3.1V to 31V
n
V
V
Output:
OUT1
Up to 440mA (V = 24V V = 2.5V)
IN
, OUT1
2.5V to 13V Output Range
n
Low Noise Linear Post Regulator:
OUT2
Up to 300mA
1.2V to 12V Output Range
n
n
n
n
Current Mode Control
Programmable Soft-Start
The LTM8058 is packaged in a thermally enhanced, com-
pact (9mm × 11.25mm × 4.92mm) overmolded ball grid
array (BGA) package suitable for automated assembly
by standard surface mount equipment. The LTM8058 is
available with SnPb or RoHS compliant terminal finish.
User Configurable Undervoltage Lockout
Low Profile (9mm × 11.25mm × 4.92mm)
BGA Package
L, LT, LTC, LTM, Linear Technology, the Linear logo and µModule are registered trademarks of
Analog Devices, Inc. All other trademarks are the property of their respective owners.
APPLICATIONS
n
Industrial Sensors
n
Industrial Switches
n
Ground Loop Mitigation
TYPICAL APPLICATION
2kV AC Isolated Low Noise µModule Regulator
Total Output Current vs VIN
330
V
IN
V
V
OUT1
V
V
IN
OUT1
4.3V TO 29V
5.7V
280
•
OUT2
V
OUT2
5V
LOW
NOISE
LDO
ADJ2
RUN
22µF
•
230
180
130
80
BYP
–
2.2µF
10µF
162k
V
GND
BIAS
OUT
4.7µF
6.19k
SS
ADJ1
LTM8058
8058 TA01a
0
5
10
15
20
25
30
2kV AC ISOLATION
INPUT VOLTAGE (V)
8058 TA01b
8058fb
1
For more information www.linear.com/LTM8058
LTM8058
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
(Note 1)
TOP VIEW
V , RUN ..................................................................32V
IN
BIAS ..........................................................................V
A
IN
ADJ2
B
ADJ1, SS.....................................................................5V
–
V
Relative to V
OUT1
Relative to V
.......................................... +16V
BANK 3
OUT2
BANK 2
OUT
BANK 1
OUT1
V + V
IN
OUT
C
D
E
BYP
–
V
V
V
OUT1
(Note 2) .................................................36V
–
–
V
OUT2
..........................................+20V
.............................................+7V
OUT
BANK 4
GND
ADJ2 Relative to V
OUT
BANK 5
IN
F
–
V
GND to V
Isolation (Note 3) ......................... 2kV AC
OUT
RUN
G
H
ADJ1
Maximum Internal Temperature (Note 4) .............. 125°C
Maximum Peak Body Reflow Temperature ........... 245°C
Storage Temperature.............................. –55°C to 125°C
BIAS SS
1
2
3
4
BGA PACKAGE
38-LEAD (11.25mm × 9mm × 4.92mm)
= 125°C, θ = 23.2°C/W, θ = 5.8°C/W, θ = 23.2°C/W, θ = 6.7°C/W
5
6
7
T
JMAX
JA
JCbottom
JCtop
JB
WEIGHT = 1.1g, θ VALUES DETERMINED PER JEDEC 51-9, 51-12
ORDER INFORMATION
http://www.linear.com/product/LTM8058#orderinfo
PART MARKING*
PACKAGE
MSL
RATING
TEMPERATURE RANGE
(Note 4)
PART NUMBER
LTM8058EY#PBF
LTM8058IY#PBF
LTM8058IY
PAD OR BALL FINISH
SAC305 (RoHS)
SAC305 (RoHS)
SnPb (63/37)
DEVICE
FINISH CODE
TYPE
BGA
BGA
BGA
BGA
BGA
LTM8058Y
LTM8058Y
LTM8058Y
LTM8058Y
LTM8058Y
e1
e1
e0
e1
e0
3
3
3
3
3
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–55°C to 125°C
–55°C to 125°C
LTM8058MPY#PBF
LTM8058MPY
SAC305 (RoHS)
SnPb (63/37)
Consult Marketing for parts specified with wider operating temperature
ranges. *Device temperature grade is indicated by a label on the shipping
container. Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Recommended LGA and BGA PCB Assembly and Manufacturing
Procedures:
www.linear.com/umodule/pcbassembly
• LGA and BGA Package and Tray Drawings:
www.linear.com/packaging
• Terminal Finish Part Marking:
www.linear.com/leadfree
8058fb
2
For more information www.linear.com/LTM8058
LTM8058
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full internal
operating temperature range, otherwise specifications are at TA = 25°C, RUN = 12V (Note 4).
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
l
Minimum Input DC Voltage
BIAS = V , RUN = 2V
3.1
4.3
V
V
IN
BIAS Open, RUN = 2V
V
DC Voltage
R
R
R
= 12.4k
= 6.98k
= 3.16k
2.5
5
V
V
V
OUT1
ADJ1
ADJ1
ADJ1
l
4.75
5.25
1
12
V
Quiescent Current
V
= 0V
µA
µA
IN
RUN
Not Switching
850
1.7
1.5
20
V
V
V
Line Regulation
Load Regulation
Ripple (RMS)
6V ≤ V ≤ 31V, I = 0.15A, RUN = 2V
OUT
%
%
OUT1
OUT1
OUT1
IN
0.05A ≤ I
≤ 0.2A, RUN = 2V
OUT
I
= 0.1A, 1MHz BW
mV
mA
V
OUT
Input Short-Circuit Current
RUN Pin Input Threshold
RUN Pin Current
V
Shorted
30
OUT1
RUN Pin Rising
1.18
1.24
1.30
V
RUN
V
RUN
= 1V
= 1.3V
2.5
0.1
µA
µA
SS Threshold
0.7
–10
8
V
µA
mA
V
SS Sourcing Current
BIAS Current
SS = 0V
V
= 12V, BIAS = 5V, I
= 100mA
LOAD1
IN
Minimum BIAS Voltage (Note 5)
I
= 100mA
3.1
2.3
LOAD1
LDO (V
) Minimum Input DC Voltage
OUT2
(Note 6)
1.8
V
V
OUT2
Voltage Range
V
OUT1
V
OUT1
= 16V, R
= 16V, R
Open, No Load (Note 6)
= 41.2k, No Load (Note 6)
1.22
15.8
V
V
ADJ2
ADJ2
ADJ2 Pin Voltage
V
V
= 2V, I
= 2V, I
= 1mA (Note 6)
= 1mA (Note 6)
1.22
V
V
OUT1
OUT1
OUT2
OUT2
l
1.19
1.25
5
V
V
Line Regulation
Load Regulation
2V < V
< 16V, I = 1mA (Note 6)
OUT2
1
2
mV
mV
OUT2
OUT2
OUT1
V
OUT1
= 5V, 10mA ≤ I
≤ 300mA (Note 6)
10
OUT2
LDO Dropout Voltage
I
I
I
= 10mA (Note 6)
= 100mA (Note 6)
= 300mA (Note 6)
0.25
0.34
0.43
V
V
V
OUT2
OUT2
OUT2
V
Ripple (RMS)
C
BYP
= 0.01µF, I
= 300mA, BW = 100Hz to 100kHz (Note 6)
20
µV
RMS
OUT2
OUT2
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
specifications over the full –40°C to 125°C internal operating temperature
range. The LTM8058MP is guaranteed to meet specifications over the
full –55°C to 125°C internal operating temperature range. Note that
the maximum internal temperature is determined by specific operating
conditions in conjunction with board layout, the rated package thermal
resistance and other environmental factors.
Note 5: This is the BIAS pin voltage at which the internal circuitry is
powered through the BIAS pin and not the integrated regulator. See BIAS
Pin Considerations for details.
Note 2: V + V
is defined as the sum of:
IN
OUT1
–
(V – GND) + (V
IN
– V
)
OUT1
OUT
Note 3: The LTM8058 isolation is tested at 3kV DC for one second.
Note 4: The LTM8058E is guaranteed to meet performance specifications
from 0°C to 125°C. Specifications over the –40°C to 125°C internal
temperature range are assured by design, characterization and correlation
with statistical process controls. LTM8058I is guaranteed to meet
Note 6: V
powered by applying a voltage to V
= 0V (Flyback not running), but the V
post regulator is
RUN
OUT2
.
OUT1
8058fb
3
For more information www.linear.com/LTM8058
LTM8058
Unless otherwise noted, operating conditions are
TYPICAL PERFORMANCE CHARACTERISTICS
as in Table 1 (TA = 25°C).
Efficiency vs Output Current
Efficiency vs Output Current
Efficiency vs Output Current
75
70
65
60
55
50
80
75
80
V
= 2.5V
OUT1
V
= 3.3V
V
= 5V
OUT1
OUT1
12V
IN
BIAS = 5V
BIAS = 5V
BIAS = 5V
75
12V
IN
12V
IN
24V
24V
IN
IN
70
65
70
65
24V
IN
60
55
50
60
55
50
100
200
300
0
400
0
100
200
300
400
0
100
200
300
400
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
8058 G01
8058 G02
8058 G03
Efficiency vs Output Current
Efficiency vs Output Current
Input Current vs Output Current
85
80
75
70
65
60
55
50
85
80
75
90
80
70
60
50
40
30
20
10
0
V
= 8V
V
= 12V
V
= 2.5V
OUT1
OUT1
OUT1
12V
BIAS = 5V
IN
BIAS = 5V
BIAS = 5V
12V
IN
24V
IN
12V
IN
24V
IN
70
65
60
55
50
24V
IN
200
OUTPUT CURRENT (mA)
300
0
50
100
150
250
50
100
200
200
OUTPUT CURRENT (mA)
0
150
1
400
100
300
OUTPUT CURRENT (mA)
8058 G04
8058 G05
8058 G06
Input Current vs Output Current
Input Current vs Output Current
Input Current vs Output Current
100
90
80
70
60
50
40
30
20
10
0
180
160
140
120
100
80
140
120
100
V
= 5V
V
= 8V
V
= 3.3V
OUT1
OUT1
OUT1
BIAS = 5V
BIAS = 5V
BIAS = 5V
12V
IN
12V
IN
12V
IN
80
60
40
20
0
24V
IN
24V
24V
IN
IN
60
40
20
0
0
100
200
300
400
0
100
200
300
400
0
50
100
150
300
200
250
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
8058 G07
8058 G08
8058 G09
8058fb
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For more information www.linear.com/LTM8058
LTM8058
Unless otherwise noted, operating conditions are
TYPICAL PERFORMANCE CHARACTERISTICS
as in Table 1 (TA = 25°C).
Input Current vs Output Current
Bias Current vs Output Current
Bias Current vs Output Current
200
180
160
140
120
100
80
10
9
8
7
6
5
4
3
2
1
0
V
= 2.5V
V
= 12V
V
= 3.3V
OUT1
OUT1
OUT1
9
8
7
6
5
4
3
2
1
0
BIAS = 5V
BIAS = 5V
BIAS = 5V
12V
IN
12V
IN
24V
IN
24V
IN
12V
IN
24V
IN
60
40
20
0
0
50
OUTPUT CURRENT (mA)
100
150
200
1
100
200
OUTPUT CURRENT (mA)
300
400
0
100
200
OUTPUT CURRENT (mA)
300
400
8058 G10
8058 G11
8058 G12
Bias Current vs Output Current
Bias Current vs Output Current
Bias Current vs Output Current
12
10
8
12
10
8
14
12
10
V
= 5V
V
= 12V
V
= 8V
OUT1
OUT1
OUT1
BIAS = 5V
BIAS = 5V
BIAS = 5V
12V
IN
12V
12V
IN
24V
IN
IN
24V
IN
24V
8
6
4
2
0
IN
6
6
4
4
2
2
0
0
100
200
400
0
300
0
100
150
200
250
300
50
50
100
200
0
150
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
OUTPUT CURRENT (mA)
8058 G13
8058 G14
8058 G15
Minimum Required Load
vs Input Voltage
Maximum Output Current vs VIN
Maximum Output Current vs VIN
500
400
300
200
45
40
35
30
25
20
15
10
5
400
300
200
100
BIAS = 5V FOR V ≥ 5V
IN
BIAS = 5V FOR V ≥ 5V
IN
BIAS = 5V FOR V ≥ 5V
IN
BIAS = V FOR V < 5V
BIAS = V FOR V < 5V
BIAS = V FOR V < 5V
IN
IN
IN
IN
IN
IN
100
0
V
V
V
= 2.5V
= 3.3V
= 5V
V
V
V
= 2.5V
= 3.3V
= 5V
OUT1
OUT1
OUT1
OUT1
OUT1
OUT1
V
V
= 8V
= 12V
OUT1
OUT1
0
0
20
INPUT VOLTAGE (V)
0
10
15
(V)
20
25
30
0
10
30
40
5
0
5
10
15
(V)
20
25
30
V
V
IN
IN
8058 G16
8058 G18
8058 G17
8058fb
5
For more information www.linear.com/LTM8058
LTM8058
Unless otherwise noted, operating conditions are
TYPICAL PERFORMANCE CHARACTERISTICS
as in Table 1 (TA = 25°C).
Minimum Required Load
vs Input Voltage
Typical Output Ripple 100mA
Output Current, VIN = 12V
DC1988 VOUT1 Start-Up Behavior
for Different CSS Values
25
20
15
10
BIAS = 5V FOR V ≥ 5V
IN
BIAS = V FOR V < 5V
NO C
SS
IN
IN
V
OUT1
5mV/DIV
C
= 0.01µF
SS
C
= 0.1µF
SS
1V/DIV
V
OUT2
500µV/DIV
8058 G20
8058 G21
500ns/DIV
200µs/DIV
MEASURED ON DC1988 WITH ADDIONAL 1µF
AND BNC ATTACHED TO OUTPUT TERMINALS.
C7 = 0.1µF. USED HP461A 150MHz AMPLIFIER,
SET TO 40dB GAIN.
100mA RESISTIVE LOAD
5
0
V
V
= 8V
OUT1
OUT1
= 12V*
0
10
INPUT VOLTAGE (V)
*SEE APPLICATIONS INFORMATION SECTION
FOR DISCUSSION OF 12V MINIMUM LOAD
15
20
25
30
5
8058 G19
OUT
Typical Switching Frequency vs
Output Current Stock DC1988A
Input Current
Input Current
vs VIN, VOUT1 Shorted
vs VIN, VOUT2 Shorted
225
200
175
150
125
100
75
80
70
60
50
40
30
20
10
900
800
700
600
500
400
300
200
100
12V
IN
5V
IN
50
0
0
10
20
(V)
30
40
0
4
8
12 16 20 24 28 32
(V)
0
200
250
50
100
150
V
V
OUTPUT CURRENT (mA)
IN
IN
8058 G24
8058 G23
8058 G22
Junction Temperature Rise
vs Load Current
Junction Temperature Rise
vs Load Current
VOUT2 Dropout
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
10
9
8
7
6
5
4
3
2
1
0
10
9
8
7
6
5
4
3
2
1
0
V
= 3.3V
V
= 1.2V
OUT2
V
= 1.5V
OUT2
OUT2
125°C
25°C
–40°C
3.3V
IN
IN
IN
5V
5V
12V
24V
IN
IN
0
50
100
150
200
250
300
0
50
100
150
200
250
300
0
50
100
150
200
250
300
V
LOAD CURRENT (mA)
V
OUT2
LOAD CURRENT (mA)
V
LOAD CURRENT (mA)
OUT2
OUT2
8058 G25
8058 G26
8058 G27
8058fb
6
For more information www.linear.com/LTM8058
LTM8058
Unless otherwise noted, operating conditions are
TYPICAL PERFORMANCE CHARACTERISTICS
as in Table 1 (TA = 25°C).
Junction Temperature Rise
vs Load Current
Junction Temperature Rise
vs Load Current
Junction Temperature Rise
vs Load Current
10
9
8
7
6
5
4
3
2
1
0
10
9
8
7
6
5
4
3
2
1
0
12
V
= 1.8V
V
= 2.5V
V
OUT2
= 3.3V
OUT2
OUT2
10
8
6
4
3.3V
IN
3.3V
IN
IN
IN
IN
5V
5V
5V
2
12V
24V
12V
24V
IN
IN
IN
IN
0
0
50
100
150
200
250
300
0
50
100
150
200
250
300
0
50
100
150
200
250
300
V
LOAD CURRENT (mA)
V
LOAD CURRENT (mA)
V
OUT2
LOAD CURRENT (mA)
OUT2
OUT2
8058 G28
8058 G29
8058 G30
Junction Temperature Rise
vs Load Current
Junction Temperature Rise
vs Load Current
Junction Temperature Rise
vs Load Current
16
14
12
10
8
16
14
12
10
8
14
12
10
8
V
= 8V
V
= 12V
OUT2
V
= 5V
OUT2
OUT2
6
6
6
4
4
4
3.3V
IN
3.3V
IN
3.3V
IN
IN
IN
5V
5V
5V
IN
2
2
2
12V
24V
12V
24V
12V
24V
IN
IN
IN
IN
IN
IN
0
0
0
0
50
100
150
200
250
300
0
50
V
100
150
200
250
0
50
100
150
200
250
300
V
LOAD CURRENT (mA)
LOAD CURRENT (mA)
V
LOAD CURRENT (mA)
OUT2
OUT2
OUT2
8058 G32
8058 G33
8058 G31
8058fb
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For more information www.linear.com/LTM8058
LTM8058
PIN FUNCTIONS
–
V
(Bank 1): V
and V comprise the isolated
BYP (Pin B2): The BYP pin is used to bypass the reference
OUT1
OUT1
OUT
output of the LTM8058 flyback stage. Apply an external
of the LDO to achieve low noise performance from the
–
–
capacitor between V
to exceed V
and V
. Do not allow V
linear post regulator. The BYP pin is clamped internally
OUT1
OUT
OUT
–
.
to 0.6V relative to V
. A small capacitor from V
OUT1
OUT
OUT2
to this pin will bypass the reference to lower the output
–
–
V
(Bank 2): V
is the return for both V
and
OUT1
OUT
V
OUT
and V
voltage noise. A maximum value of 0.01µF can be used
–
. V
comprise the isolated output of
OUT2 OUT1
OUT
for reducing output voltage noise to a typical 20µV
RMS
the LTM8058. In most applications, the bulk of the heat
over a 100Hz to 100kHz bandwidth. If not used, this pin
–
flow out of the LTM8058 is through the GND and V
OUT
must be left unconnected.
pads, so the printed circuit design has a large impact on
the thermal performance of the part. See the PCB Layout
RUN (Pin F3): A resistive divider connected to V and this
IN
and Thermal Considerations sections for more details.
pinprogramstheminimumvoltageatwhichtheLTM8058
will operate. Below 1.24V, the LTM8058 does not deliver
power to the secondary. Above 1.24V, power will be de-
livered to the secondary and 10µA will be fed into the SS
pin. When RUN is less than 1.24V, the pin draws 2.5µA,
allowing for a programmable hysteresis. Do not allow a
negative voltage (relative to GND) on this pin.
–
Apply an external capacitor between V
and V
.
OUT1
OUT
V
(Bank 3): The output of the secondary side linear
OUT2
postregulator.Applytheloadandoutputcapacitorbetween
–
V
OUT2
andV
.SeetheApplicationsInformationsection
OUT
for more information on output capacitance and reverse
output characteristics.
ADJ1 (Pins G7): Apply a resistor from this pin to GND to
GND (Bank 4): This is the local ground of the LTM8058
–
set the output voltage V
relative to V
, using the
OUT1
OUT
primary. In most applications, the bulk of the heat flow
recommended value given in Table 1. If Table 1 does not
–
out of the LTM8058 is through the GND and V
pads,
OUT
list the desired V
value, the equation
OUT1
so the printed circuit design has a large impact on the
thermal performance of the part. See the PCB Layout and
Thermal Considerations sections for more details.
–0.879
RADJ1 = 28.4 V
kΩ
OUT1
V
(Bank 5): V supplies current to the LTM8058’s
IN
may be used to approximate the value. To the seasoned
designer,thisexponentialequationmayseemunusual.The
equation is exponential due to nonlinear current sources
that are used to temperature compensate the regulation.
IN
internal regulator and to the integrated power switch.
These pins must be locally bypassed with an external,
low ESR capacitor.
ADJ2(pinA2):Thisistheinputtotheerroramplifierofthe
BIAS (Pin H5): This pin supplies the power necessary to
operate the LTM8058. It must be locally bypassed with a
low ESR capacitor of at least 4.7μF. Do not allow this pin
secondary side LDO post regulator. This pin is internally
clamped to 7V. The ADJ2 pin voltage is 1.22V referenced
–
to V
and the output voltage range is 1.22V to 12V.
voltage to rise above V .
OUT
IN
–
Apply a resistor from this pin to V
, using the equation
OUT
SS(PinH6):Placeasoft-startcapacitorheretolimitinrush
current and the output voltage ramp rate. Do not allow a
negative voltage (relative to GND) on this pin.
R
ADJ2
= 608.78/(V
– 1.22)kΩ. If the post regulator is
OUT2
not used, leave this pin floating.
8058fb
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For more information www.linear.com/LTM8058
LTM8058
BLOCK DIAGRAM
V
V
V
IN
OUT1
OUT2
•
499k
0.1µF
•
ADJ2
BYP
1µF
LOW NOISE
LDO
RUN
BIAS*
SS
–
V
OUT
CURRENT
MODE
CONTROLLER
ADJ1
GND
8058 BD
*DO NOT ALLOW BIAS VOLTAGE TO BE ABOVE V
IN
OPERATION
The LTM8058 is a stand-alone isolated flyback switching
DC/DC power supply that can deliver up to 440mA of
output current. This module provides a regulated output
voltage programmable via one external resistor from 2.5V
to 13V. It is also equipped with a high performance linear
post regulator. The input voltage range of the LTM8058
is 3.1V to 31V. Given that the LTM8058 is a flyback con-
verter, the output current depends upon the input and
output voltages, so make sure that the input voltage is
high enough to support the desired output voltage and
load current. The Typical Performance Characteristics
section gives several graphs of the maximum load versus
An internal regulator provides power to the control cir-
cuitry. The bias regulator normally draws power from the
IN
V
pin, but if the BIAS pin is connected to an external
voltage higher than 3.1V, bias power will be drawn from
the external source, improving efficiency. V
must not
BIAS
exceed V . The RUN pin is used to turn on or off the
IN
LTM8058, disconnecting the output and reducing the
input current to 1μA or less.
The LTM8058 is a variable frequency device. For a fixed
input and output voltage, the frequency increases as the
load increases. For light loads, the current through the
internal transformer may be discontinuous.
V for several output voltages.
IN
The post regulator is a high performance 300mA low
dropout regulator with micropower quiescent current and
shutdown. The device is capable of supplying 300mA at
a dropout voltage of 430mV. Output voltage noise can be
Asimplifiedblockdiagramisgiven.TheLTM8058contains
acurrentmodecontroller,powerswitchingelement,power
transformer, power Schottky diode, a modest amount of
input and output capacitance, and a high performance
linear post regulator.
lowered to 20µV
over a 100Hz to 100kHz bandwidth
RMS
with the addition of a 0.01μF reference bypass capacitor.
Additionally, this reference bypass capacitor will improve
transient response of the regulator, lowering the settling
time for transient load conditions. The linear regulator is
protected against both reverse input and reverse output
voltages.
The LTM8058 has a galvanic primary to secondary isola-
tion rating of 2kV AC. This is verified by applying 3kV DC
between the primary to secondary for 1 second. Note that
the 2kV AC isolation is verified by a 3kV DC test. The peak
voltage of a 2kV AC waveform is 2.83kV DC, so 3kV DC is
applied. For details please refer to the Isolation, Working
Voltage and Safely Compliance section. The LTM8058 is
a UL 60950 recognized component.
8058fb
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For more information www.linear.com/LTM8058
LTM8058
APPLICATIONS INFORMATION
For most applications, the design process is straight
indicated in Table 1 is not recommended, and may result
in undesirable operation. Using larger values is generally
acceptable, and can yield improved dynamic response, if
it is necessary. Again, it is incumbent upon the user to
verify proper operation over the intended system’s line,
load and environmental conditions.
forward, summarized as follows:
1. Look at Table 1a (or Table 1b, if the post linear regula-
tor is used) and find the row that has the desired input
range and output voltage.
2. Apply the recommended C , C
, C
, R
,
IN
OUT1
OUT2
ADJ1
Ceramic capacitors are small, robust and have very low
ESR. However, not all ceramic capacitors are suitable.
X5R and X7R types are stable over temperature and ap-
plied voltage and give dependable service. Other types,
including Y5V and Z5U have very large temperature and
voltage coefficients of capacitance. In an application cir-
cuit they may have only a small fraction of their nominal
capacitanceresultinginmuchhigheroutputvoltageripple
than expected.
R
and C
if required.
ADJ2
BYP
3. Connect BIAS as indicated, or tie to an external source
up to 15V or V , whichever is less.
IN
Whilethesecomponentcombinationshavebeentestedfor
proper operation, it is incumbent upon the user to verify
proper operation overtheintended system’s line, load and
environmentalconditions. Bearinmindthatthemaximum
output current may be limited by junction temperature,
the relationship between the input and output voltage
magnitude and polarity and other factors. Please refer
to the graphs in the Typical Performance Characteristics
section for guidance.
A final precaution regarding ceramic capacitors concerns
the maximum input voltage rating of the LTM8058. A
ceramic input capacitor combined with trace or cable
inductance forms a high-Q (underdamped) tank circuit. If
theLTM8058circuitispluggedintoalivesupply, theinput
voltage can ring to much higher than its nominal value,
possibly exceeding the device’s rating. This situation is
easily avoided; see the Hot-Plugging Safely section.
Capacitor Selection Considerations
The C , C
and C
capacitor values in Table 1 are
IN OUT1
OUT2
the minimum recommended values for the associated op-
erating conditions. Applying capacitor values below those
LTM8058 Table 1a. Recommended Component Values and Configuration for Specific VOUT1 Voltages (TA = 25°C)
V
V
V
C
C
R
ADJ1
IN
OUT1
BIAS
IN
OUT1
3.1V to 31V
3.1V to 31V
3.1V to 29V
3.1V to 26V
3.1V to 24V
9V to 15V
2.5V
3.3V
5V
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 25V, 0805
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 25V, 0805
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
100µF, 6.3V, 1210
100µF, 6.3V, 1210
22µF, 16V, 1210
22µF, 10V, 1206
10µF, 16V, 1210
100µF, 6.3V, 1210
47µF, 6.3V, 1210
22µF, 16V, 1210
22µF, 10V, 1206
10µF, 16V, 1210
100µF, 6.3V, 1210
47µF, 6.3V, 1210
22µF, 16V, 1210
22µF, 10V, 1206
10µF, 16V, 1210
12.4k
10k
6.98k
8V
4.53k
12V
2.5V
3.3V
5V
3.16k/8.2pF*
12.4k
V
V
V
V
V
IN
IN
IN
IN
IN
9V to 15V
10k
9V to 15V
6.98k
9V to 15V
8V
4.53k
9V to 15V
12V
2.5V
3.3V
5V
3.16k
18V to 31V
18V to 31V
18V to 29V
18V to 26V
18V to 24V
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
12.4k
10k
6.98k
8V
4.53k
12V
3.16k/8.2pF*
Note: Do not allow BIAS to exceed V , a bulk input capacitor is required. If BIAS is open, the minimum V is 4.3V.
IN
IN
*Connect 3.16k in parallel with 8.2pF from ADJ1 to GND
8058fb
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For more information www.linear.com/LTM8058
LTM8058
APPLICATIONS INFORMATION
LTM8058 Table 1b. Recommended Component Values and Configuration for Specific VOUT2 Voltages (TA = 25°C)
V
V
V
V
C
IN
C
OUT1
C
OUT2
R
ADJ1
R
ADJ2
IN
OUT1
OUT2
BIAS
3.1V to 31V
3.1V to 31V
3.1V to 31V
3.1V to 31V
3.1V to 31V
3.1V to 29V
3.1V to 26V
3.1V to 21V
9V to 15V
2.3V
2.3V
1.2V
1.5V
1.8V
2.5V
3.3V
5V
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 25V, 0805
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 25V, 0805
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
2.2µF, 50V, 1206
100µF, 6.3V, 1210
100µF, 6.3V, 1210
100µF, 6.3V, 1210
100µF, 6.3V, 1210
47µF, 6.3V, 1210
22µF, 16V, 1210
22µF, 10V, 1206
10µF, 16V, 1210
100µF, 6.3V, 1210
100µF, 6.3V, 1210
100µF, 6.3V, 1210
100µF, 6.3V, 1210
47µF, 6.3V, 1210
22µF, 16V, 1210
22µF, 10V, 1206
10µF, 16V, 1210
100µF, 6.3V, 1210
100µF, 6.3V, 1210
100µF, 6.3V, 1210
100µF, 6.3V, 1210
47µF, 6.3V, 1210
22µF, 16V, 1210
22µF, 10V, 1206
10µF, 6.3V, 1206
10µF, 6.3V, 1206
10µF, 6.3V, 1206
10µF, 6.3V, 1206
10µF, 6.3V, 1206
10µF, 6.3V, 1206
10µF, 10V, 1206
133k
133k
Open
2.32M
1.07M
487k
2.3V
13.3k
10.5k
8.66k
6.19k
4.12k
3.08V
3.92V
5.7V
294k
162k
8.85V
13V
8V
88.7k
56.2k
Open
2.32M
1.07M
487k
12V
1.2V
1.5V
1.8V
2.5V
3.3V
5V
22µF, 16V, 1206 2.94k/22pF*
2.3V
V
V
V
V
V
V
V
V
10µF, 6.3V, 1206
10µF, 6.3V, 1206
10µF, 6.3V, 1206
10µF, 6.3V, 1206
10µF, 6.3V, 1206
10µF, 6.3V, 1206
10µF, 10V, 1206
133k
133k
IN
IN
IN
IN
IN
IN
IN
IN
9V to 15V
2.3V
9V to 15V
2.3V
13.3k
10.5k
8.66k
6.19k
4.12k
9V to 15V
3.08V
3.92V
5.7V
9V to 15V
294k
9V to 15V
162k
9V to 15V
8.85V
13V
8V
88.7k
56.2k
Open
2.32M
1.07M
487k
9V to 15V
12V
1.2V
1.5V
1.8V
2.5V
3.3V
5V
22µF, 16V, 1206 2.94k/22pF*
18V to 31V
18V to 31V
18V to 31V
18V to 31V
18V to 31V
18V to 29V
18V to 26V
2.3V
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
3.1V to 15V or Open
10µF, 6.3V, 1206
10µF, 6.3V, 1206
10µF, 6.3V, 1206
10µF, 6.3V, 1206
10µF, 6.3V, 1206
10µF, 6.3V, 1206
10µF, 10V, 1206
133k
133k
2.3V
2.3V
13.3k
10.5k
8.66k
6.19k
4.12k
3.08V
3.92V
5.7V
294k
162k
8.85V
8V
88.7k
Note: Do not allow BIAS to exceed V , a bulk input capacitor is required. If BIAS is open, the minimum V is 4.3V.
IN
IN
*Connect 2.94k in parallel with 22pF from ADJ1 to GND.
BIAS Pin Considerations
regulator. This has the added advantage of keeping the
physical size of the BIAS capacitor small. Do not allow
The BIAS pin is the output of an internal linear regulator
thatpowerstheLTM8058’sinternalcircuitry. Itissetto3V
andmustbedecoupledwithalowESRcapacitorofatleast
4.7μF. The LTM8058 will run properly without applying
a voltage to this pin, but will operate more efficiently and
BIAS to rise above V .
IN
Soft-Start
For many applications, it is necessary to minimize the
inrush current at start-up. The built-in soft-start circuit
significantly reduces the start-up current spike and output
voltageovershootbyapplyingacapacitorfromSStoGND.
dissipate less power if a voltage between 3.1V and V is
IN
applied. At low V , the LTM8058 will be able to deliver
IN
more output current if BIAS is 3.1V or greater. Up to 31V
may be applied to this pin, but a high BIAS voltage will
causeexcessivepowerdissipationintheinternalcircuitry.
For applications with an input voltage less than 15V, the
WhentheLTM8058isenabled, whetherfromV reaching
IN
a sufficiently high voltage or RUN being pulled high, the
LTM8058 will source approximately 10µA out of the SS
pin. As this current gradually charges the capacitor from
SS to GND, the LTM8058 will correspondingly increase
the power delivered to the output, allowing for a graceful
BIAS pin is typically connected directly to the V pin. For
IN
input voltages greater than 15V, it is preferred to leave the
BIAS pin separate from the V pin, either powered from
IN
turn-on ramp.
a separate voltage source or left running from the internal
8058fb
11
For more information www.linear.com/LTM8058
LTM8058
APPLICATIONS INFORMATION
Isolation, Working Voltage and Safety Compliance
other critical parameters for the specific end application
depend upon the actual environmental, application and
safety compliance requirements. It is therefore up to the
user to perform a safety and compliance review to ensure
that the LTM8058 is suitable for the intended application.
The LTM8058 isolation is 100% hi-pot tested by tying
all of the primary pins together, all of the secondary pins
together and subjecting the two resultant circuits to a
differential of 3kV DC for one second. This establishes
the isolation voltage rating of the LTM8058 component.
V
OUT2
Post Regulator
The isolation rating of the LTM8058 is not the same as
the working or operational voltage that the application
will experience. This is subject to the application’s power
source, operating conditions, the industry where the end
product is used and other factors that dictate design re-
quirementssuchasthegapbetweencopperplanes,traces
and component pins on the printed circuit board, as well
as the type of connector that may be used. To maximize
the allowable working voltage, the LTM8058 has two
columns of solder balls removed to facilitate the printed
circuit board design. The ball to ball pitch is 1.27mm, and
the typical ball diameter is 0.78mm. Accounting for the
missing columns and the ball diameter, the printed circuit
board may be designed for a metal-to-metal separation of
up to 3.03mm. This may have to be reduced somewhat to
allow for tolerances in solder mask or other printed circuit
board design rules. For those situations where informa-
tion about the spacing of LTM8058 internal circuitry is
required, the minimum metal to metal separation of the
primary and secondary is 0.75mm.
V
is produced by a high performance low dropout
OUT2
300mA regulator. At full load, its dropout is less than
430mV. Its output is set by applying a resistor from the
R
pin to GND; the value of R
can be calculated
ADJ2
ADJ2
by the equation:
608.78
VOUT2 –1.22
RADJ2
=
kΩ
ADJ1 and Line Regulation
For V greater than 8V, parasitics in the transformer
interactingwiththecontrollercausealocalizedincreasein
minimum load. A small capacitor may need to be applied
from ADJ1 to GND to ensure proper line regulation. Care
must be taken when choosing this capacitor value. Too
small or no capacitor will result in poor line regulation;
in general, a larger capacitor is needed for higher V
Too large of a capacitance will require excessive minimum
load to maintain regulation.
OUT1
.
OUT1
The plots in Figure 1 show LTM8058 line regulation with
threedifferentcapacitorvaluesappliedfromADJ1toGND.
To reiterate, the manufacturer’s isolation voltage rating
and the required working or operational voltage are of-
ten different numbers. In the case of the LTM8058, the
isolation voltage rating is established by 100% hi-pot
testing. The working or operational voltage is a function
of the end product and its system level specifications. The
actual required operational voltage is often smaller than
the manufacturer’s isolation rating.
5
4
3
2
1
0
–1
–2
The LTM8058 is a UL recognized component under
UL 60950, file number E464570. The UL 60950 insula-
tion category of the LTM8058 transformer is Functional.
Considering UL 60950 Table 2N and the gap distances
stated above, 3.03mm external and 0.75mm internal,
the LTM8058 may be operated with up to 250V working
voltage in a pollution degree 2 environment. The actual
workingvoltage,insulationcategory,pollutiondegreeand
–3
NO CAP
8.2pF CAP
12pF CAP
–4
–5
0
6
12
(V)
18
24
V
IN
8058 F01
Figure 1. VOUT1 Line Regulation vs VIN
8058fb
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For more information www.linear.com/LTM8058
LTM8058
APPLICATIONS INFORMATION
The plots in Figure 2 show the minimum load requirement
for the same three capacitors.
capacitor,suchasaX5RorX7Rceramic,isrecommended.
This capacitor will bypass the reference of the regulator,
lowering the output voltage noise to as low as 20µV
.
RMS
Carefully choose the appropriate capacitor value for the
intended application.
Using a bypass capacitor has the added benefit of improv-
ing transient response.
25
BIAS = 5V FOR V ≥ 5V
IN
Safety Rated Capacitors
BIAS = V FOR V < 5V
IN
IN
NO CAP
8.2pF CAP
12pF CAP
20
15
10
5
Some applications require safety rated capacitors, which
are high voltage capacitors that are specifically designed
and rated for AC operation and high voltage surges. These
capacitorsareoftencertifiedtosafetystandardssuchasUL
60950, IEC 60950 and others. In the case of the LTM8058,
a common application of a safety rated capacitor would
–
be to connect it from GND to V
. To provide maximum
OUT
flexibility, the LTM8058 does not include any components
0
–
0
6
12
INPUT VOLTAGE (V)
18
24
between GND and V
added externally.
. Any safety capacitors must be
OUT
8058 F02
The specific capacitor and circuit configuration for any
application depends upon the safety requirements of
the system into which the LTM8058 is being designed.
Table 2 provides a list of possible capacitors and their
Figure 2. Minimum Required Load vs Input Voltage
–
V
to V
Reverse Voltage
OUT
OUT1
TheLTM8058cannottolerateareversevoltagefromV
manufacturers. The application of a capacitor from GND
OUT1
OUT1
–
–
–
to V
during operation. If V
raises above V
to V
may also reduce the high frequency output noise
OUT
OUT
OUT
duringoperation,theLTM8058maybedamaged.To protect
on the output.
against this condition, a low forward drop power Schottky
Table 2. Safety Rated Capacitors
MANUFACTURER PART NUMBER
diode has been integrated into the LTM8058, anti-parallel
DESCRIPTION
–
to V
/V
. This can protect the output against many
OUT1 OUT
Murata
Electronics
GA343DR7GD472KW01L
4700pF, 250V AC, X7R,
4.5mm × 3.2mm
Capacitor
reverse voltage faults. Reverse voltage faults can be both
steady state and transient. An example of a steady-state
voltage reversal is accidentally misconnecting a powered
LTM8058 to a negative voltage source. An example of
transient voltage reversals is a momentary connection to
Johanson
Dielectrics
302R29W471KV3E-****-SC 470pF, 250V AC, X7R,
4.5mm × 2mm
Capacitor
Syfer Technology 1808JA250102JCTSP
100pF, 250V AC, C0G,
1808 Capacitor
a negative voltage. It is also possible to achieve a V
OUT1
reversal if the load is short circuited through a long cable.
The inductance of the long cable forms an LC tank circuit
PCB Layout
with the V
capacitance, which drives V
negative.
OUT1
OUT1
Most of the headaches associated with PCB layout have
been alleviated or even eliminated by the high level of
integration of the LTM8058. The LTM8058 is neverthe-
less a switching power supply, and care must be taken to
minimizeelectricalnoisetoensureproperoperation. Even
with the high level of integration, you may fail to achieve
specified operation with a haphazard or poor layout. See
Avoid these conditions.
V
Post Regulator Bypass Capacitance and Low
Noise Performance
OUT2
The V linear regulator may be used with the addition
OUT2
of a 0.01μF bypass capacitor from V
to lower output voltage noise. A good quality low leakage
to the BYP pin
OUT
8058fb
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For more information www.linear.com/LTM8058
LTM8058
APPLICATIONS INFORMATION
Figure 3 for a suggested layout. Ensure that the grounding
ADJ1
V
C
OUT1
and heat sinking are acceptable.
LTM8058
A few rules to keep in mind are:
1. PlacetheR
andR
resistorsascloseaspossible
SS
ADJ1
ADJ2
to their respective pins.
OUT1
V
BIAS
2. Place the C capacitor as close as possible to the V
IN
IN
C
BIAS
–
and GND connections of the LTM8058.
OUT
3. Place the C
capacitor as close as possible to V
OUT1
RUN
OUT1
–
ADJ2 BYP
and V
. Likewise, place the C
capacitor as close
OUT
OUT2
.
C
V
OUT2
OUT2
–
as possible to V
and V
OUT2
OUT
4. Place the C and C
capacitors such that their
OUT
IN
ground current flow directly adjacent or underneath
C
IN
V
IN
the LTM8058.
THERMAL/INTERCONNECT VIAS
8058 F03
5. Connect all of the GND connections to as large a copper
pour or plane area as possible on the top layer. Avoid
breaking the ground connection between the external
components and the LTM8058.
Figure 3. Layout Showing Suggested External
Components, Planes and Thermal Vias
6. Use vias to connect the GND copper area to the board’s
internal ground planes. Liberally distribute these GND
vias to provide both a good ground connection and
thermal path to the internal planes of the printed circuit
board. Pay attention to the location and density of the
thermal vias in Figure 3. The LTM8058 can benefit from
theheatsinkingaffordedbyviasthatconnecttointernal
GND planes at these locations, due to their proximity
to internal power handling components. The optimum
number of thermal vias depends upon the printed
circuit board design. For example, a board might use
very small via holes. It should employ more thermal
vias than a board that uses larger holes.
twice the nominal input voltage, possibly exceeding the
LTM8058’s rating and damaging the part. If the input
supply is poorly controlled or the user will be plugging
the LTM8058 into an energized supply, the input network
should be designed to prevent this overshoot. This can be
accomplishedbyinstallingasmallresistorinseriestoV ,
IN
but the most popular method of controlling input voltage
overshoot is adding an electrolytic bulk capacitor to the
V net. This capacitor’s relatively high equivalent series
IN
resistance damps the circuit and eliminates the voltage
overshoot. The extra capacitor improves low frequency
ripplefilteringandcanslightlyimprovetheefficiencyofthe
circuit, though it can be a large component in the circuit.
Hot-Plugging Safely
Thermal Considerations
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of the LTM8058. However, these capaci-
tors can cause problems if the LTM8058 is plugged into a
live supply (see Linear Technology Application Note 88 for
a complete discussion). The low loss ceramic capacitor
combined with stray inductance in series with the power
source forms an underdamped tank circuit, and the volt-
The LTM8058 output current may need to be derated if it
is required to operate in a high ambient temperature. The
amount of current derating is dependent upon the input
voltage, output power and ambient temperature. The
temperature rise curves given in the Typical Performance
Characteristicssectioncanbeusedasaguide.Thesecurves
2
were generated by the LTM8058 mounted to a 58cm
4-layer FR4 printed circuit board. Boards of other sizes
and layer count can exhibit different thermal behavior, so
8058fb
age at the V pin of the LTM8058 can ring to more than
IN
14
For more information www.linear.com/LTM8058
LTM8058
APPLICATIONS INFORMATION
to operate such that most of the heat flows from the junc-
it is incumbent upon the user to verify proper operation
over the intended system’s line, load and environmental
operating conditions.
tion to the top of the part. As in the case of θ
, this
JCbottom
value may be useful for comparing packages but the test
conditions don’t generally match the user’s application.
Forincreasedaccuracyandfidelitytotheactualapplication,
many designers use FEA to predict thermal performance.
To that end, the Pin Configuration section of the data sheet
typically gives four thermal coefficients:
θ
isthejunction-to-boardthermalresistancewhere
JCboard
almost all of the heat flows through the bottom of the
µModule converter and into the board, and is really the
sum of the θ
and the thermal resistance of the
JCbottom
ꢀ θ : Thermal resistance from junction to ambient
JA
bottom of the part through the solder joints and through a
portion of the board. The board temperature is measured
a specified distance from the package, using a two-sided,
two-layer board. This board is described in JESD 51-9.
ꢀ θ
: Thermal resistance from junction to the bot-
JCbottom
tom of the product case
ꢀ θ : Thermal resistance from junction to top of the
JCtop
product case
Giventhesedefinitions,itshouldnowbeapparentthatnone
of these thermal coefficients reflects an actual physical
operating condition of a µModule converter. Thus, none
of them can be individually used to accurately predict the
thermal performance of the product. Likewise, it would
be inappropriate to attempt to use any one coefficient to
correlate to the junction temperature vs load graphs given
in the product’s data sheet. The only appropriate way to
use the coefficients is when running a detailed thermal
analysis, such as FEA, which considers all of the thermal
resistances simultaneously.
ꢀ θ
:Thermalresistancefromjunctiontotheprinted
JCboard
circuit board.
While the meaning of each of these coefficients may seem
to be intuitive, JEDEC has defined each to avoid confu-
sion and inconsistency. These definitions are given in
JESD 51-12, and are quoted or paraphrased as follows:
θ
is the natural convection junction-to-ambient air
JA
thermal resistance measured in a one cubic foot sealed
enclosure. This environment is sometimes referred to
as still air although natural convection causes the air to
move. This value is determined with the part mounted to a
JESD 51-9 defined test board, which does not reflect an
actual application or viable operating condition.
A graphical representation of these thermal resistances
is given in Figure 4.
The blue resistances are contained within the µModule
converter, and the green are outside.
θ
is the junction-to-board thermal resistance with
JCbottom
The die temperature of the LTM8058 must be lower than
the maximum rating of 125°C, so care should be taken in
the layout of the circuit to ensure good heat sinking of the
LTM8058. The bulk of the heat flow out of the LTM8058
is through the bottom of the module and the BGA pads
into the printed circuit board. Consequently a poor printed
circuit board design can cause excessive heating, result-
ing in impaired performance or reliability. Please refer to
the PCB Layout section for printed circuit board design
suggestions.
allofthecomponentpowerdissipationflowingthroughthe
bottom of the package. In the typical µModule converter,
the bulk of the heat flows out the bottom of the package,
but there is always heat flow out into the ambient envi-
ronment. As a result, this thermal resistance value may
be useful for comparing packages but the test conditions
don’t generally match the user’s application.
θ
isdeterminedwithnearlyallofthecomponentpower
JCtop
dissipation flowing through the top of the package. As the
electricalconnectionsofthetypicalµModuleconverterare
on the bottom of the package, it is rare for an application
8058fb
15
For more information www.linear.com/LTM8058
LTM8058
APPLICATIONS INFORMATION
JUNCTION-TO-AMBIENT RESISTANCE (JESD 51-9 DEFINED BOARD)
JUNCTION-TO-CASE (TOP)
RESISTANCE
CASE (TOP)-TO-AMBIENT
RESISTANCE
JUNCTION-TO-BOARD RESISTANCE
JUNCTION
AMBIENT
JUNCTION-TO-CASE
(BOTTOM) RESISTANCE
CASE (BOTTOM)-TO-BOARD
BOARD-TO-AMBIENT
RESISTANCE
RESISTANCE
8058 F04
µMODULE DEVICE
Figure 4
TYPICAL APPLICATIONS
3.3V Flyback Converter
VOUT2 Maximum Output Current vs VIN
300
V
IN
V
V
OUT1
V
IN
(3.9V)
9V TO 15V
280
260
240
•
OUT2
V
OUT2
3.3V
LOW
NOISE
LDO
ADJ2
RUN
47µF
•
BYP
–
2.2µF
10µF
294k
V
GND
BIAS
OUT
4.7µF
8.66k
SS
220
200
ADJ1
LTM8058
8058 TA02a
9
11
12
(V)
13
14
15
10
2kV AC ISOLATION
V
IN
8058 TA02b
12V Flyback Converter with Low Noise Bypass
VOUT2 Maximum Output Current vs VIN
260
V
V
V
IN
OUT1
V
IN
(13V)
5V TO 23V
•
220
180
140
100
60
OUT2
BYP
V
OUT2
12V
LOW
NOISE
LDO
0.01µF
RUN
•
10µF
ADJ2
2.2µF
10µF
GND
BIAS
56.2k
–
V
OUT
4.7µF
2.49k
2.2pF
SS
ADJ1
LTM8058
8058 TA03a
15
(V)
20
5
10
25
2kV AC ISOLATION
V
IN
8058 TA03b
8058fb
16
For more information www.linear.com/LTM8058
LTM8058
TYPICAL APPLICATIONS
3.3V and 2.5V Flyback Converter
Total Maximum Output Current vs VIN
450
V
IN
V
V
OUT1
V
V
OUT1
3.3V
IN
400
350
3.1V TO 32V
•
OUT2
V
OUT2
2.5V
LOW
NOISE
LDO
ADJ2
RUN
100µF
•
BYP
–
2.2µF
10µF
487k
300
250
200
150
100
V
3.1V
GND
BIAS
OUT
4.7µF
10k
SS
ADJ1
LTM8058
8058 TA04a
8
16
(V)
32
0
24
2kV AC ISOLATION
V
IN
8058 TA04b
PACKAGE DESCRIPTION
Pin Assignment Table
(Arranged by Pin Number)
PIN FUNCTION PIN FUNCTION PIN FUNCTION PIN FUNCTION PIN FUNCTION PIN FUNCTION PIN FUNCTION PIN FUNCTION
A1
A2
A3
A4
A5
A6
A7
V
ADJ2
B1
B2
B3
B4
B5
B6
B7
V
BYP
C1
C2
C3
C4
C5
C6
C7
-
-
-
-
-
-
-
D1
D2
D3
D4
D5
D6
D7
-
-
-
-
-
-
-
E1
E2
E3
E4
E5
E6
E7
GND
GND
GND
GND
GND
GND
GND
F1
F2
F3
F4
F5
F6
F7
-
-
G1
G2
G3
G4
G5
G6
G7
V
V
-
GND
GND
GND
ADJ1
H1
H2
H3
H4
H5
H6
H7
V
V
-
GND
BIAS
SS
OUT2
OUT2
IN
IN
IN
IN
–
–
V
V
V
V
V
V
RUN
GND
GND
GND
GND
OUT
OUT
OUT
OUT
OUT
OUT
–
–
–
–
V
V
V
V
OUT1
OUT1
OUT1
OUT1
GND
PACKAGE PHOTO
8058fb
17
For more information www.linear.com/LTM8058
LTM8058
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTM8058#packaging for the most recent package drawings.
Z
Z
/ / b b b
Z
3 . 8 1 0
2 . 5 4 0
1 . 2 7 0
0 . 3 1 7 5
0 . 0 0 0
0 . 3 1 7 5
1 . 2 7 0
2 . 5 4 0
3 . 8 1 0
8058fb
18
For more information www.linear.com/LTM8058
LTM8058
REVISION HISTORY
REV
DATE
11/14 Lowered Max Solder Temperature to 245°C (from 250°C)
Pin Label Corrected: Was V + to V
DESCRIPTION
PAGE NUMBER
A
2
17
OUT
OUT1
B
07/17 Connected RUN pin to V in Typical Application circuit example
16, 17, 20
IN
8058fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTM8058
TYPICAL APPLICATION
Total Output Current vs VIN
5V Flyback Converter with Low Noise Bypass
450
400
V
V
V
IN
OUT1
V
IN
(5.7V)
5V TO 23V
•
OUT2
BYP
V
OUT2
5V
LOW
NOISE
LDO
0.01µF
350
300
250
200
150
100
RUN
•
22µF
ADJ2
2.2µF
10µF
GND
BIAS
162k
–
V
OUT
4.7µF
6.19k
SS
ADJ1
LTM8058
8058 TA05a
10
15
20
(V)
30
5
25
2kV AC ISOLATION
V
8058 TA05b
IN
DESIGN RESOURCES
SUBJECT
DESCRIPTION
µModule Design and Manufacturing Resources
Design:
Manufacturing:
• Quick Start Guide/Demo Manual
• Selector Guides
• Demo Boards and Gerber Files
• Free Simulation Tools
• PCB Design, Assembly and Manufacturing Guidelines
• Package and Board Level Reliability
µModule Regulator Products Search
1. Sort table of products by parameters and download the result as a spread sheet.
2. Search using the Quick Power Search parametric table.
TechClip Videos
Quick videos detailing how to bench test electrical and thermal performance of µModule products.
Digital Power System Management
Linear Technology’s family of digital power supply management ICs are highly integrated solutions that
offer essential functions, including power supply monitoring, supervision, margining and sequencing,
and feature EEPROM for storing user configurations and fault logging.
RELATED PARTS
Part Number
Description
Comments
LTM8057
LTM8058 without Low Noise Post Regulator 2.5V ≤ V
≤ 12V, 5% V
Accuracy, UL60950 Recognized
OUT
OUT
LTM8046
Higher Output Power Than LTM8058, No Low 2.5W Output Power, 1.8V ≤ V
≤12V, 5% V
Accuracy, UL60950 Recognized,
OUT
OUT
Noise Post Regulator
9mm x 15mm x 4.92mm BGA
LTM8048
LTM8047
Lower Isolation Voltage Than LTM8058
1.5W Ouput Power, 725V DC Isolation, 1.2V ≤ V
1.5W Ouput Power, 725V DC Isolation, 2.5V ≤ V
≤ 12V
≤ 12V
OUT
Lower Isolation Voltage Than LTM8058, No
Low Noise Post Regulator
OUT
LTM8045
LTM4605
Non-isolated SEPIC (Step-Up & Down) Up
to 700mA
2.8V ≤ V ≤ 18V, 2.5V ≤ V
≤ 15V, Synchronizable, 6.25mm x 11.25mm x
IN
OUT
4.92mm BGA
Non-isolated Buck-Boost Up to 5A
4.5V ≤ V ≤ 20V, 0.8 ≤ V
≤ 16V, Synchronizable, 15mm x 15mm x 2.82mm BGA
IN
OUT
8058fb
LT 0717 REV B • PRINTED IN USA
www.linear.com/LTM8058
20
© LINEAR TECHNOLOGY CORPORATION 2014
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