DS1220AD-200 [MAXIM]
Non-Volatile SRAM Module, 2KX8, 200ns, CMOS, 0.720 INCH, PLASTIC, DIP-24;
| 型号： | DS1220AD-200 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Non-Volatile SRAM Module, 2KX8, 200ns, CMOS, 0.720 INCH, PLASTIC, DIP-24 静态存储器 内存集成电路 |
| 文件： | 总8页 (文件大小：188K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-5580; Rev 10/10
DS1220AB/AD
16k Nonvolatile SRAM
www.maxim-ic.com
FEATURES
PIN ASSIGNMENT
. 10 years minimum data retention in the
absence of external power
A7
VCC
24
23
1
A6
A5
A4
A8
A9
2
3
4
. Data is automatically protected during power
loss
. Directly replaces 2k x 8 volatile static RAM
or EEPROM
. Unlimited write cycles
. Low-power CMOS
. JEDEC standard 24-pin DIP package
. Read and write access times of 100 ns
. Lithium energy source is electrically
disconnected to retain freshness until power
is applied for the first time
22
21
WE
OE
A10
CE
A3
A2
20
19
5
6
A1
A0
18
17
7
8
DQ7
DQ6
DQ0
9
16
DQ1
DQ2
GND
10
DQ5
DQ4
DQ3
15
14
11
12
13
24-Pin ENCAPSULATED PACKAGE
720-mil EXTENDED
. Full ±10% VCC operating range (DS1220AD)
. Optional ±5% VCC operating range
(DS1220AB)
. Optional industrial temperature range of
-40°C to +85°C, designated IND
PIN DESCRIPTION
A0-A10
- Address Inputs
DQ0-DQ7
- Data In/Data Out
- Chip Enable
- Write Enable
CE
WE
- Output Enable
- Power (+5V)
- Ground
OE
VCC
GND
DESCRIPTION
The DS1220AB and DS1220AD 16k Nonvolatile SRAMs are 16,384-bit, fully static, nonvolatile SRAMs
organized as 2048 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and
control circuitry which constantly monitors VCC for an out-of-tolerance condition. When such a condition
occurs, the lithium energy source is automatically switched on and write protection is unconditionally
enabled to prevent data corruption. The NV SRAMs can be used in place of existing 2k x 8 SRAMs
directly conforming to the popular bytewide 24-pin DIP standard. The devices also match the pinout of
the 2716 EPROM and the 2816 EEPROM, allowing direct substitution while enhancing performance.
There is no limit on the number of write cycles that can be executed and no additional support circuitry is
required for microprocessor interfacing.
1 of 8
DS1220AB/AD
READ MODE
The DS1220AB and DS1220AD execute a read cycle whenever
(Write Enable) is inactive (high) and
WE
(Chip Enable) and
(Output Enable) are active (low). The unique address specified by the 11
OE
CE
address inputs (A0-A10) defines which of the 2048 bytes of data is to be accessed. Valid data will be
available to the eight data output drivers within tACC (Access Time) after the last address input signal is
stable, providing that the
and
access times are also satisfied. If
and access times are not
OE
CE
satisfied, then data access must be measured from the later-occurring signal and the limiting parameter is
either tCO for or t for rather than address access.
OE
CE
CE
OE
OE
WRITE MODE
The DS1220AB and DS1220AD execute a write cycle whenever the
and
signals are active (low)
WE
CE
after address inputs are stable. The latter occurring falling edge of
or
will determine the start of
CE WE
the write cycle. The write cycle is terminated by the earlier rising edge of
or
. All address inputs
CE WE
must be kept valid throughout the write cycle.
must return to the high state for a minimum recovery
WE
time (tWR ) before another cycle can be initiated. The
control signal should be kept inactive (high)
OE
during write cycles to avoid bus contention. However, if the output drivers are enabled (
and
CE
OE
active) then
will disable the outputs in tODW from its falling edge.
WE
DATA RETENTION MODE
The DS1220AB provides full functional capability for VCC greater than 4.75 volts and write protects by
4.5V. The DS1220AD provides full functional capability for VCC greater than 4.5 volts and write protects
by 4.25V. Data is maintained in the absence of VCC without any additional support circuitry. The
nonvolatile static RAMs constantly monitor VCC. Should the supply voltage decay, the NV SRAMs
automatically write protect themselves, all inputs become “don’t care,” and all outputs become high
impedance. As VCC falls below approximately 3.0 volts, a power switching circuit connects the lithium
energy source to RAM to retain data. During power-up, when VCC rises above approximately 3.0 volts,
the power switching circuit connects external VCC to RAM and disconnects the lithium energy source.
Normal RAM operation can resume after VCC exceeds 4.75 volts for the DS1220AB and 4.5 volts for the
DS1220AD.
FRESHNESS SEAL
Each DS1220 device is shipped from Dallas Semiconductor with its lithium energy source disconnected,
guaranteeing full energy capacity. When VCC is first applied at a level of greater than VTP, the lithium
energy source is enabled for battery backup operation.
2 of 8
DS1220AB/AD
ABSOLUTE MAXIMUM RATINGS
Voltage on Any Pin Relative to Ground
Operating Temperature Range
Commercial:
Industrial:
Storage Temperature
-0.3V to +6.0V
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
+260°C
Lead Temperature (soldering, 10s)
Note: EDIP is wave or hand soldered only.
This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
(TA: See Note 10)
PARAMETER
SYMBOL MIN TYP MAX UNITS NOTES
DS1220AB Power Supply Voltage
DS1220AD Power Supply Voltage
Logic 1
VCC
VCC
VIH
VIL
4.75 5.0
4.50 5.0
2.2
5.25
5.50
VCC
+0.8
V
V
V
V
Logic 0
0.0
DC ELECTRICAL CHARACTERISTICS
(TA: See Note 10)
(VCC = 5V ± 5% for DS1220AB)
(VCC = 5V ± 10% for DS1220AD)
PARAMETER
SYMBOL MIN TYP MAX UNITS NOTES
Input Leakage Current
I/O Leakage Current
-1.0
-1.0
IIL
+1.0
µA
µA
IIO
+1.0
≥ V ≤ V
CE
IH
CC
Output Current @ 2.4V
Output Current @ 0.4V
IOH
IOL
-1.0
2.0
mA
mA
ICCS1
ICCS2
5.0
3.0
10.0
5.0
mA
mA
Standby Current
Standby Current
= 2.2V
CE
CE
= V -0.5V
CC
Operating Current
(Commercial)
Operating Current
(Industrial)
Write Protection Voltage
(DS1220AB)
Write Protection Voltage
(DS1220AD)
ICC01
ICCO1
VTP
75
85
mA
mA
V
4.5
4.62 4.75
4.5
VTP
4.25 4.37
V
CAPACITANCE
(TA = +25°C)
PARAMETER
SYMBOL MIN TYP MAX UNITS NOTES
Input Capacitance
Input/Output Capacitance
CIN
CI/O
5
5
10
12
pF
pF
3 of 8
DS1220AB/AD
(TA: See Note 10)
AC ELECTRICAL CHARACTERISTICS
(VCC = 5.0V ± 5% for DS1220AB)
(VCC = 5.0V ± 10% for DS1220AD)
DS1220AB-100
DS1220AD-100
PARAMETER
SYMBOL
UNITS NOTES
MIN
MAX
Read Cycle Time
Access Time
tRC
tACC
tOE
100
ns
ns
ns
100
50
to Output Valid
to Output Valid
OE
CE
OE
tCO
100
ns
tCOE
5
ns
5
5
or
to Output Active
CE
Output High Z from
Deselection
Output Hold from Address Change
Write Cycle Time
Write Pulse Width
Address Setup Time
tOD
35
35
ns
tOH
tWC
tWP
tAW
tWR1
tWR2
tODW
tOEW
tDS
tDH1
tDH2
5
100
75
0
0
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3
12
13
5
4
4
12
13
Write Recovery Time
Output High from
WE
5
40
0
Output Active from
Data Setup Time
WE
Data Hold Time
10
4 of 8
DS1220AB/AD
READ CYCLE
SEE NOTE 1
WRITE CYCLE 1
SEE NOTES 2, 3, 4, 6, 7, 8 AND 12
WRITE CYCLE 2
SEE NOTES 2, 3, 4, 6, 7, 8 AND 13
5 of 8
DS1220AB/AD
POWER-DOWN/POWER-UP CONDITION
SEE NOTE 11
POWER-DOWN/POWER-UP TIMING
(TA: See Note 10)
PARAMETER
SYMBOL MIN
tPD
tF
TYP
MAX
UNITS NOTES
1.5
11
µs
µs
µs
ms
ms
VCC Fail Detect to
and
Inactive
WE
CE
VCC slew from VTP to 0V
VCC slew from 0V to VTP
300
300
tR
tPU
tREC
2
VCC Valid to
and
Inactive
WE
CE
VCC Valid to End of Write Protection
125
(TA = +25°C)
PARAMETER
SYMBOL MIN TYP MAX UNITS NOTES
tDR 10 years
Expected Data Retention Time
9
WARNING:
Under no circumstances are negative undershoots, of any amplitude, allowed when device is in the
battery backup mode.
NOTES:
1.
is high for a read cycle.
WE
2.
= V or V . If
= V during write cycle, the output buffers remain in a high-impedance state.
OE
OE
IH
IL
IH
3. tWP is specified as the logical AND of
and
. t is measured from the latter of
or
CE CE
CE
WE
WP
going low to the earlier of
or
going high.
CE
WE
CE
4. tDS is measured from the earlier of
or
going high.
WE
5. These parameters are sampled with a 5 pF load and are not 100% tested.
6. If the
low transition occurs simultaneously with or later than the
low transition, the output
high transition, the output
CE
buffers remain in a high-impedance state during this period.
7. If the high transition occurs prior to or simultaneously with the
WE
CE
WE
buffers remain in a high-impedance state during this period.
6 of 8
DS1220AB/AD
8. If
is low or the
low transition occurs prior to or simultaneously with the low transition,
CE
WE
WE
the output buffers remain in a high-impedance state during this period.
9. Each DS1220AB and each DS1220AD has a built-in switch that disconnects the lithium source until
VCC is first applied by the user. The expected tDR is defined as accumulative time in the absence of
VCC starting from the time power is first applied by the user. This parameter is guaranteed by design
and is not 100% tested.
10. All AC and DC electrical characteristics are valid over the full operating temperature range. For
commercial products, this range is 0°C to 70°C. For industrial products (IND), this range is -40°C to
+85°C.
11. In a power down condition the voltage on any pin may not exceed the voltage on VCC.
12. tWR1 , tDH1 are measured from
going high.
WE
13. tWR2 , tDH2 are measured from
going high.
CE
14. DS1220 modules are recognized by Underwriters Laboratories (UL) under file E99151.
DC TEST CONDITIONS
Outputs Open
Cycle = 200ns for Operating Current
All Voltages Are Referenced to Ground
AC TEST CONDITIONS
Output Load: 100 pF + 1TTL Gate
Input Pulse Levels: 0 - 3.0V
Timing Measurement Reference Levels
Input: 1.5V
Output: 1.5V
Input Pulse Rise and Fall Times: 5ns
ORDERING INFORMATION
SUPPLY
PART
TEMP RANGE
PIN-PACKAGE
TOLERANCE
DS1220AB-100+
DS1220AB-100IND+
DS1220AD-100+
DS1220AD-100IND+
+Denotes a lead(Pb)-free/RoHS-compliant package.
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
24 720 EDIP
24 720 EDIP
24 720 EDIP
24 720 EDIP
5V ± 5%
5V ± 5%
5V ± 10%
5V ± 10%
PACKAGE INFORMATION
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a
different suffix character, but the drawing pertains to the package regardless of RoHS status.
LAND
PATTERN NO.
PACKAGE TYPE
PACKAGE CODE
OUTLINE NO.
21-0245
24 EDIP
MDT24+1
7 of 8
DS1220AB/AD
REVISION HISTORY
REVISION
PAGES
CHANGED
DESCRIPTION
DATE
Added package information table; removed the DIP module package
drawing and dimension table
121907
9
Updated the storage and soldering temperature information in the
Absolute Maximum Ratings section, removed the unused AC timing
specs in the AC Electrical Characteristics table, updated the Ordering
Information table, updated the Package Information table
10/10
1, 3, 4, 7
8 of 8
相关型号：
DS1220AD-200+
Non-Volatile SRAM Module, 2KX8, 200ns, CMOS, 0.720 INCH, ROHS COMPLIANT, PLASTIC, DIP-24
MAXIM
DS1220AD-200IND+
Non-Volatile SRAM Module, 2KX8, 200ns, CMOS, 0.720 INCH, ROHS COMPLIANT, PLASTIC, DIP-24
MAXIM
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