DS1832U+T&R [MAXIM]

Power Supply Management Circuit, Fixed, 1 Channel, +2.55/2.88VV, CMOS, PDSO8, 0.118 INCH, ROHS COMPLIANT, MICRO, SOP-8;
DS1832U+T&R
型号: DS1832U+T&R
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

Power Supply Management Circuit, Fixed, 1 Channel, +2.55/2.88VV, CMOS, PDSO8, 0.118 INCH, ROHS COMPLIANT, MICRO, SOP-8

光电二极管
文件: 总7页 (文件大小:118K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
DS1832  
3.3-Volt MicroMonitor Chip  
www.dalsemi.com  
FEATURES  
PIN ASSIGNMENT  
Halts and restarts an out-of-control  
microprocessor  
VCC  
PBRST  
1
2
3
4
8
7
6
5
TD  
ST  
Holds microprocessor in check during power  
transients  
Automatically restarts microprocessor after  
power failure  
TOL  
RST  
RST  
GND  
DS1832 8-Pin DIP (300-mil)  
See Mech. Drawings Section  
Monitors pushbutton for external override  
Accurate 10% or 20% microprocessor power  
monitoring  
Eliminates need for discrete components  
20% tolerance for use with 3.0-volt systems  
Pin-compatible with the DS1232  
Low cost 8-pin DIP, 8-pin SOIC, and space  
saving µ-SOP packages available  
Industrial temperature range of -40°C to  
+85°C  
VCC  
1
2
3
4
8
7
6
5
PBRST  
TD  
ST  
TOL  
RST  
RST  
GND  
DS1832S 8-Pin SOIC (150-mil)  
See Mech. Drawings Section  
PBRST  
TD  
TOL  
GND  
VCC  
1
2
3
4
8
7
6
5
ST  
RST  
RST  
DS1832µ 8-Pin µ-SOP (118-mil)  
See Mech. Drawings Section  
PIN DESCRIPTION  
PBRST  
TD  
- Pushbutton Reset Input  
- Time Delay Set  
TOL  
GND  
RST  
- Selects 10% or 20% VCC Detect  
- Ground  
- Active High Reset Output  
RST  
- Active Low Reset Output  
ST  
- Strobe Input  
VCC  
- Power Supply  
DESCRIPTION  
The DS1832 3.3-Volt MicroMonitor monitors three vital conditions for a microprocessor: power supply,  
software execution, and external override. First, a precision temperature-compensated reference and  
comparator circuit monitor the status of VCC. When an out-of-tolerance condition occurs, an internal  
power-fail signal is generated which forces the resets to an active state. When VCC returns to an  
in-tolerance condition, the reset signals are kept in the active state for a minimum of 250 ms to allow the  
power supply and processor to stabilize.  
1 of 7  
112099  
DS1832  
The second function the DS1832 performs is pushbutton reset control. The DS1832 debounces the  
pushbutton input and guarantees an active reset pulse width of 250 ms minimum. The third function is a  
watchdog timer. The DS1832 has an internal timer that forces the reset signals to the active state if the  
strobe input is not driven low prior to timeout. The watchdog timer function can be set to operate on  
timeout settings of approximately 150 ms, 600 ms, or 1.2 seconds.  
OPERATION - POWER MONITOR  
The DS1832 detects out-of-tolerance power supply conditions and warns a processor-based system of  
impending power failure. When VCC falls below a preset level as defined by TOL, the VCC comparator  
outputs the signals RST and RST . When TOL is connected to ground, the RST and RST signals become  
active as VCC falls below 2.98 volts. When TOL is connected to VCC, the RST and RST signals become  
active as VCC falls below 2.64 volts. The RST and RST are excellent control signals for a microprocessor,  
as processing is stopped at the last possible moments of valid VCC. On power-up, RST and RST are kept  
active for a minimum of 250 ms to allow the power supply and processor to stabilize.  
OPERATION - PUSHBUTTON RESET  
The DS1832 provides an input pin for direct connection to a pushbutton reset (see Figure 2). The  
pushbutton reset input requires an active low signal. Internally, this input is debounced and timed such  
that RST and RST signals of at least 250 ms minimum are generated. The 250 ms delay commences as  
the pushbutton reset input is released from the low level.  
OPERATION - WATCHDOG TIMER  
The watchdog timer function forces RST and RST signals active when the ST input is not clocked within  
the predetermined time period. The timeout period is determined by the condition of the TD pin. If TD is  
connected to ground the minimum watchdog timeout would be 62.5 ms, TD floating would yield a  
minimum timeout of 250 ms, and TD connected to VCC would provide a timeout of 500 ms minimum.  
Timeout of the watchdog starts when RST and RST become inactive. If a high-to-low transition occurs  
on the ST input pin prior to timeout, the watchdog timer is reset and begins to timeout again. If the  
watchdog timer is allowed to timeout, then the RST and RST signals are driven active for a minimum of  
250 ms. The ST input can be derived from many microprocessor outputs. The most typical signals used  
are the microprocessor address signals, data signals or control signals. When the microprocessor  
functions normally, these signals would, as a matter of routine, cause the watchdog to be reset prior to  
timeout. To guarantee that the watchdog timer does not timeout, a high-to-low transition must occur at or  
less than the minimum times shown in Table 1. A typical circuit example is shown in Figure 4.  
The DS1832 watchdog function cannot be disabled. The watchdog strobe input must be strobed to avoid  
a watchdog timeout and reset.  
2 of 7  
DS1832  
MICROMONITOR BLOCK DIAGRAM Figure 1  
PUSHBUTTON RESET Figure 2  
TIMING DIAGRAM: PUSHBUTTON RESET Figure 3  
3 of 7  
DS1832  
WATCHDOG TIMER Figure 4  
WATCHDOG TIMEOUTS Table 1  
TIMEOUT  
TYP  
TD  
GND  
Float  
VCC  
MIN  
MAX  
250 ms  
1000 ms  
2000 ms  
62.5 ms  
250 ms  
500 ms  
150 ms  
600 ms  
1200 ms  
TIMING DIAGRAM: STROBE INPUT Figure 5  
TIMING DIAGRAM: POWER DOWN Figure 6  
4 of 7  
DS1832  
TIMING DIAGRAM: POWER-UP Figure 7  
RST VALID TO 0 VOLTS VCC Figure 8  
OUTPUT VALID CONDITIONS  
The RST output uses a push-pull output which can maintain a valid output down to 0.8 volts VCC. To sink  
current below 0.8 volts a resistor can be connected from RST to Ground (see Figure 8). This arrangement  
will maintain a valid value on RST during both power-up and power-down but will draw current when  
RST is in the high state. A value of about 100 k=should be adequate in most situations. The output with  
a resistor pull-down can maintain a valid reset down to VCC equal to 0 volts.  
5 of 7  
DS1832  
ABSOLUTE MAXIMUM RATINGS*  
Voltage on any Pin Relative to Ground  
Voltage on I/O Relative to Ground  
Operating Temperature  
-0.5V to +7.0V  
-0.5V to VCC +0.5V  
-40°C to +85°C  
Storage Temperature  
Soldering Temperature  
-55°C to +125°C  
260°C for 10 seconds  
* This is a stress rating only and functional operation of the device at these or any other conditions  
above those indicated in the operation sections of this specification is not implied. Exposure to  
absolute maximum rating conditions for extended periods of time may affect reliability.  
RECOMMENDED DC OPERATING CONDITIONS  
(-40°C to +85°C)  
PARAMETER  
SYMBOL MIN  
TYP  
MAX  
5.5  
UNITS NOTES  
Supply Voltage  
VCC  
VIH  
1.0  
2.0  
V
V
1
VCC+0.3  
1, 3  
1, 4  
ST and PBRST Input High Level  
ST and PBRST Input Low Level  
VCC  
-0.4  
-0.3  
VIL  
0.5  
V
1
DC ELECTRICAL CHARACTERISTICS  
(-40°C to +85°C; VCC=1.2V to 5.5V)  
PARAMETER  
SYMBOL MIN  
TYP  
2.88  
2.55  
MAX  
2.97  
2.64  
+1.0  
UNITS NOTES  
VCC Trip Point (TOL = GND)  
VCC Trip Point (TOL = VCC)  
Input Leakage  
VCCTP  
VCCTP  
IIL  
2.80  
2.47  
-1.0  
V
V
1
1
2
3
3
4
µA  
µA  
mA  
V
Output Current @ 2.4V  
Output Current @ 0.4V  
Output Voltage @ -500 uA  
IOH  
350  
IOL  
10  
VOH  
VCC  
VCC  
-0.3V -0.1V  
Operating Current  
ICC  
35  
5
µA  
CAPACITANCE  
PARAMETER  
(tA=25°C)  
UNITS NOTES  
SYMBOL MIN  
TYP  
MAX  
Input Capacitance  
Output Capacitance  
CIN  
5
7
pF  
pF  
COUT  
6 of 7  
DS1832  
AC ELECTRICAL CHARACTERISTICS  
(-40°C to +85°C; VCC=1.2V to 5.5V)  
PARAMETER  
SYMBOL MIN  
TYP  
610  
5
MAX  
1000  
8
UNITS NOTES  
tPB  
20  
ms  
PBRST = VIL  
RESET Active Time  
tRST  
tST  
250  
20  
ms  
ns  
6, 7  
8
ST Pulse Width  
tRPD  
µs  
VCC Detect to RST and RST  
VCC Slew Rate  
tF  
20  
µs  
tRPU  
250  
610  
1000  
20  
ms  
9
VCC Detect to RST and RST  
VCC Slew Rate  
tR  
0
ns  
tPDLY  
ms  
PBRST Stable Low to RST and RST  
NOTES:  
1. All voltages referenced to ground.  
2. PBRST is internally pulled up to VCC with an internal impedance of 40 k=typical.  
3. Measured with VCC 2.7V.  
4. Measured with VCC < 2.7V.  
5. Measured with outputs open, VCC 3.6 volts, and all inputs at VCC or Ground.  
6. Must not exceed tTD minimum.  
7. The Watchdog cannot be disabled it must be strobed to avoid resets.  
8. Noise immunity - Pulses < 2 µs at VCCTP minimum will not cause a reset.  
9. tR = 5 µs.  
MARKING INFORMATION:  
8-pin DIP - “DS1832”  
8-pin SOIC - “DS1832”  
8-pin - µ-SOP - “1832”  
7 of 7  

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