DS28EA00_技术文档

Rev 2; 4/09

1-Wire Digital Thermometer with

Sequence Detect and PIO

DS28EA0

General Description

Features

♦ Digital Thermometer Measures Temperatures

The DS28EA00 is a digital thermometer with 9-bit (0.5°C)

to 12-bit (1/16°C) resolution and alarm function with non-

volatile (NV), user-programmable upper and lower trigger

points. Each DS28EA00 has its own unique 64-bit regis-

tration number that is factory programmed into the chip.

from -40°C to +85°C

♦ Thermometer Resolution is User Selectable from

9 to 12 Bits

®

Data is transferred serially through the 1-Wire protocol,

♦ Unique 1-Wire Interface Requires Only One Port

which requires only one data line and a ground reference

for communication. The improved 1-Wire front-end with

hysteresis and glitch filter enables the DS28EA00 to per-

form reliably in large 1-Wire networks. Unlike other 1-Wire

thermometers, the DS28EA00 has two additional pins to

implement a sequence-detect function. This feature

allows the user to discover the registration numbers

according to the physical device location in a chain, e.g.,

to measure the temperature in a storage tower at different

height. If the sequence-detect function is not needed,

these pins can be used as general-purpose input or out-

put. The DS28EA00 can derive the power for its operation

directly from the data line (“parasite power”), eliminating

the need for an external power supply.

Pin for Communication

♦ Each Device Has a Unique 64-Bit, Factory-

Lasered Registration Number

♦ Multidrop Capability Simplifies Distributed

Temperature-Sensing Applications

♦ Improved 1-Wire Interface with Hysteresis and

Glitch Filter

♦ User-Definable NV Alarm Threshold Settings/User

Bytes

♦ Alarm Search Command to Quickly Identify

Devices Whose Temperature is Outside of

Programmed Limits

Applications

♦ Standard and Overdrive 1-Wire Speed

Data Communication Equipment

♦ Two General-Purpose Programmable IO (PIO) Pins

Process Temperature Monitoring

HVAC Systems

♦ Chain Function Sharing the PIO Pins to Detect

Physical Sequence of Devices in Network

Ordering Information

♦ Operating Range: +3.0V to +5.5V, -40°C to +85°C

♦ Can Be Powered from Data Line

♦ 8-Pin µSOP Package

PART

TEMP RANGE

-40°C to +85°C

PIN-PACKAGE

DS28EA00U+

DS28EA00U+T&R

8 μSOP

Pin Configuration appears at end of data sheet.

+Denotes a lead(Pb)-free/RoHS-compliant package.

T&R = Tape and reel.

Typical Operating Circuit

V

DD

1-Wire

MASTER

#1

#2

#3

V

DD

V

DD

V

DD

PX. Y

IO

DS28EA00

MICROCONTROLLER

PIOB

PIOA

PIOB

PIOA

PIOB

PIOA

GND

NOTE: SCHEMATIC SHOWS PIO PINS WIRED FOR SEQUENCE-DETECT FUNCTION.

1-Wire is a registered trademark of Maxim Integrated Products, Inc.

________________________________________________________________ Maxim Integrated Products

1

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,

or visit Maxim’s website at www.maxim-ic.com.

1-Wire Digital Thermometer with

Sequence Detect and PIO

ABSOLUTE MAXIMUM RATINGS

IO Voltage Range to GND........................................-0.5V to +6V

IO Sink Current....................................................................20mA

Maximum PIOA or PIOB Pin Current...................................20mA

Maximum Current Through GND Pin ..................................40mA

Operating Temperature Range ...........................-40°C to +85°C

Junction Temperature......................................................+150°C

Storage Temperature Range.............................-55°C to +125°C

Soldering Temperature...........................Refer to the IPC/JEDEC

J-STD-020 Specification.

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional

operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to

absolute maximum rating conditions for extended periods may affect device reliability.

DS28EA0

ELECTRICAL CHARACTERISTICS

(T = -40°C to +85°C.) (Note 1)

A

PARAMETER

POWER SUPPLY

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Supply Voltage

V

(Note 2)

3.0

5.5

1.5

V

DD

Supply Current (Note 3)

Standby Current

I

V

DD

V

DD

= +5.5V

mA

μA

DD

I

DDS

IO PIN: GENERAL DATA

Local power

Parasite power

(Notes 2, 4)

(Notes 3, 5)

3.0

0.3

V

DD

1-Wire Pullup Voltage (Note 2)

V

R

V

PUP

5.5

2.2

1-Wire Pullup Resistance

Input Capacitance

kꢀ

pF

μA

C

1000

1.5

IO

Input Load Current

I

L

IO pin at V

0.1

PUP

V

1.9V

-

PUP

High-to-Low Switching Threshold

Input Low Voltage (Notes 2, 8)

V

(Notes 3, 6, 7)

0.46

V

TL

Parasite powered

powered (Note 3)

0.5

0.7

V

IL

V

DD

Low-to-High Switching Threshold

(Notes 3, 6, 9)

V

1.1V

-

PUP

V

TH

Parasite power

1.0

Switching Hysteresis

(Notes 3, 6, 10)

V

0.21

1.7

0.4

V

HY

Output Low Voltage (Note 11)

At 4mA

OL

Standard speed, R

= 2.2kꢀ

5

2

PUP

Overdrive speed, R

= 2.2kꢀ

PUP

Recovery Time

(Notes 2, 12)

t

μs

REC

REH

Overdrive speed, directly prior to reset

pulse; R = 2.2kꢀ

5

PUP

Standard speed

Overdrive speed

Standard speed

Overdrive speed

0.5

5.0

Rising-Edge Hold-Off Time

(Notes 3, 13)

t

μs

Not applicable (0)

65

Time-Slot Duration

(Notes 2, 14)

t

SLOT

8

IO PIN: 1-Wire RESET, PRESENCE-DETECT CYCLE

Standard speed

Overdrive speed

480

48

640

80

Reset Low Time (Note 2)

t

μs

RSTL

2

_______________________________________________________________________________________

1-Wire Digital Thermometer with

Sequence Detect and PIO

DS28EA0

ELECTRICAL CHARACTERISTICS (continued)

(T = -40°C to +85°C.) (Note 1)

A

PARAMETER

SYMBOL

CONDITIONS

Standard speed

MIN

15

TYP

MAX

60

UNITS

Presence-Detect High Time

t

μs

PDH

Overdrive speed

Standard speed

Overdrive speed

Standard speed

Overdrive speed

Standard speed

Overdrive speed

2

6

1.125

0

8.1

1.3

240

24

Presence-Detect Fall Time

(Notes 3, 15)

t

μs

FPD

PDL

MSP

60

Presence-Detect Low Time

t

8

68.1

7.3

75

Presence-Detect Sample Time

(Notes 2, 16)

t

10

IO PIN: 1-Wire WRITE

Standard speed

Overdrive speed

Standard speed

Overdrive speed

60

6

120

16

15

2

Write-Zero Low Time

(Notes 2, 17)

t

μs

W0L

5

Write-One Low Time

(Notes 2, 17)

t

W1L

1

IO PIN: 1-Wire READ

Standard speed

Overdrive speed

Standard speed

Overdrive speed

5

1

15 - ꢁ

2 - ꢁ

15

Read Low Time (Notes 2, 18)

t

μs

RL

t

+ ꢁ

RL

Read Sample Time (Notes 2, 18)

t

MSR

2

PIO PINS

Input Low Voltage

V

(Note 2)

0.3

V

ILP

IHP

LP

Input High Voltage (Note 2)

Input Load Current (Note 19)

Output Low Voltage (Note 11)

Chain-On Pullup Impedance

EEPROM

V

I

V

= Max(V

, V )

PUP DD

V - 1.6

X

Pin at GND

At 4mA

-1.1

μA

V

0.4

60

OLP

R

CO

(Note 3)

20

40

kꢀ

Programming Current

Programming Time

I

t

(Notes 3, 20)

(Note 21)

1.5

10

mA

ms

PROG

At +25°C

200,000

50,000

10

Write/Erase Cycles (Endurance)

(Notes 22, 23)

N

—

CY

DR

-40°C to +85°C

At +85°C (worst case)

Data Retention (Notes 24, 25)

TEMPERATURE CONVERTER

Conversion Current

t

Years

I

(Notes 3, 20)

1.5

750

mA

ms

CONV

12-bit resolution (1/16°C)

11-bit resolution (1/8°C)

10-bit resolution (1/4°C)

9-bit resolution (1/2°C)

-10°C to +85°C

375

Conversion Time (Note 26)

t

CONV

187.5

93.75

+0.5

+2.0

+0.2

-0.5

-0.2

Conversion Error

Converter Drift

ꢂꢃ

°C

Below -10°C (Note 3)

(Note 27)

ꢃ

D

_______________________________________________________________________________________

3

1-Wire Digital Thermometer with

Sequence Detect and PIO

ELECTRICAL CHARACTERISTICS (continued)

(T = -40°C to +85°C.) (Note 1)

A

Note 1: Specifications at T = -40°C are guaranteed by design and not production tested.

A

Note 2: System requirement.

Note 3: Guaranteed by design, characterization, and/or simulation only. Not production tested.

Note 4: Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system and 1-Wire recovery

times. The specified value here applies to parasitically powered systems with only one device and with the minimum

1-Wire recovery times. For more heavily loaded systems, local power or an active pullup such as that found in the

DS2482-x00, DS2480B, or DS2490 may be required. If longer t

is used, higher R

values may be tolerable.

REC

PUP

DS28EA0

Note 5: Value is 25pF maximum with local power. Maximum value represents the internal parasite capacitance when V

is first

PUP

applied. If R

= 2.2kΩ, 2.5µs after V

HY

has been applied, the parasite capacitance does not affect normal communications.

PUP

Note 6:

V , V , and V are a function of the internal supply voltage, which is a function V , V

TL TH

, R

, 1-Wire timing, and

DD PUP PUP

capacitive loading on IO. Lower V , V

, higher R

, shorter t

, and heavier capacitive loading all lead to lower val-

REC

DD PUP

PUP

ues of V , V , and V

.

TL TH

HY

Note 7: Voltage below which, during a falling edge on IO, a logic 0 is detected.

Note 8: The voltage on IO must be less than or equal to V at all times when the master drives the line to a logic 0.

ILMAX

Note 9: Voltage above which, during a rising edge on IO, a logic 1 is detected.

Note 10: After V is crossed during a rising edge on IO, the voltage on IO must drop by at least V to be detected as logic 0.

TH

HY

Note 11: The I-V characteristic is linear for voltages less than +1V.

Note 12: Applies to a single parasitically powered DS28EA00 attached to a 1-Wire line. These values also apply to networks of

multiple DS28EA00 with local supply.

Note 13: The earliest recognition of a negative edge is possible at t

after V has been reached on the preceding rising edge.

REH

TH

Note 14: Defines maximum possible bit rate. Equal to 1/(t

+ t

).

W0LMIN

RECMIN

Note 15: Interval during the negative edge on IO at the beginning of a presence-detect pulse between the time at which the voltage

is 80% of V and the time at which the voltage is 20% of V

.

PUP

Note 16: Interval after t

during which a bus master is guaranteed to sample a logic 0 on IO if there is a DS28EA00 present.

RSTL

Minimum limit is t

+ t

; the maximum limit is t

+ t

.

PDHMAX

FPDMAX

PDHMIN

PDLMIN

Note 17: ε in Figure 13 represents the time required for the pullup circuitry to pull the voltage on IO up from V to V . The actual

IL

TH

maximum duration for the master to pull the line low is t

+ t - ε and t

+ t - ε, respectively.

W0LMAX F

W1LMAX

F

Note 18: δ in Figure 13 represents the time required for the pullup circuitry to pull the voltage on IO up from V to the input-high

IL

threshold of the bus master. The actual maximum duration for the master to pull the line low is t

+ t .

RLMAX

F

Note 19: This load current is caused by the internal weak pullup, which asserts a logic 1 to the PIOB and PIOA pins. The logical

state of PIOB must not change during the execution of the Conditional Read ROM command.

Note 20: Current drawn from IO during EEPROM programming or temperature conversion interval in parasite-powered mode. The

pullup circuit on IO during the programming or temperature conversion interval should be such that the voltage at IO is

greater than or equal to V

. If V

in the system is close to V

, then a low-impedance bypass of R

, which

PUPMIN

PUP

PUPMIN

PUP

can be activated during programming or temperature conversions, may need to be added. The bypass must be activated

within 10µs from the beginning of the t or t interval, respectively.

PROG

CONV

Note 21: The t

interval begins t

after the trailing rising edge on IO for the last time slot of the command byte for a valid

PROG

REHMAX

Copy Scratchpad sequence. Interval ends once the device’s self-timed EEPROM programming cycle is complete and the

current drawn by the device has returned from I to I (parasite power) or I (local power).

PROG

L

DDS

Note 22: Write-cycle endurance is degraded as T increases.

A

Note 23: Not 100% production tested. Guaranteed by reliability monitor sampling.

Note 24: Data retention is degraded as T increases.

A

Note 25: Guaranteed by 100% production test at elevated temperature for a shorter time; equivalence of this production test to data

sheet limit at operating temperature range is established by reliability testing.

Note 26: The t

interval begins t

after the trailing rising edge on IO for the last time slot of the command byte for a valid

CONV

REHMAX

convert temperature sequence. The interval ends once the device’s self-timed temperature conversion cycle is complete

and the current drawn by the device has returned from I to I (parasite power) or I (local power).

CONV

L

DDS

Note 27: Drift data is preliminary and based on a 1000-hour stress test performed on another device with comparable design and

fabricated in the same manufacturing process. This test was performed at greater than +85°C with V = +5.5V.

DD

Confirmed thermal drift results for this device are pending the completion of a new 1000-hour stress test.

4

_______________________________________________________________________________________

1-Wire Digital Thermometer with

Sequence Detect and PIO

DS28EA0

Pin Description

NAME

FUNCTION

1-Wire Bus Interface and Parasitic Power Supply. Open-drain pin that requires external pullup

resistor.

1

IO

2, 3, 5

4

N.C.

GND

No Connection

Ground Supply

Open-Drain PIOA Channel and Chain Output. For sequence detection, PIOA must be connected to

PIOB of the next device in the chain; leave open or connect to GND for the last device in the

chain.

6

PIOA (DONE)

Open-Drain PIOB Channel and Chain Input. For sequence detection, PIOB of the first device in the

chain must be connected to GND.

7

8

PIOB (EN)

V

DD

Power Supply. Must be connected to GND for operation in parasite-power mode.

a higher speed. The protocol required for these ROM

function commands is described in Figure 11. After a

Detailed Description

The Block Diagram shows the relationships between

the major function blocks of the DS28EA00. The device

has three main data components: 64-bit registration

number, 64-bit scratchpad, and alarm and configura-

tion registers. The 1-Wire ROM function control unit

processes the ROM function commands that allow the

device to function in a networked environment. The

device function control unit implements the device-spe-

cific control functions, such as read/write, temperature

conversion, setting the chain state for sequence detec-

tion, and PIO access. The cyclic redundancy check

(CRC) generator assists the master verifying data

integrity when reading temperatures and memory data.

In the sequence-detect process, PIOB functions as an

input, while PIOA provides the connection to the next

device. The power-supply sensor allows the master to

remotely read whether the DS28EA00 has local power

available.

ROM function command is successfully executed, the

device-specific control functions become accessible

and the master can provide any one of the nine avail-

able commands. The protocol for these control function

commands is described in Figure 9. All data is read

and written least significant (LS) bit first.

64-Bit Registration Number

Each DS28EA00 contains a unique registration number

that is 64 bits long. The first 8 bits are a 1-Wire family

code. The next 48 bits are a unique serial number. The

last 8 bits are a CRC of the first 56 bits (see Figure 2 for

details). The 1-Wire CRC is generated using a polyno-

mial generator consisting of a shift register and XOR

8

5

gates as shown in Figure 3. The polynomial is X + X +

4

X + 1. Additional information about the 1-Wire CRC is

available in Application Note 27: Understanding and

®

Using Cyclic Redundancy Checks with Maxim iButton

Products.

Figure 1 shows the hierarchical structure of the 1-Wire

protocol. The bus master must first provide one of the

eight ROM function commands: Read ROM, Match

ROM, Search ROM, Conditional (Alarm) Search ROM,

Conditional Read ROM, Skip ROM, Overdrive-Skip

ROM, Overdrive-Match ROM.

The shift register bits are initialized to 0. Then starting

with the least significant bit of the family code, one bit

at a time is shifted in. After the eighth bit of the family

code has been entered, then the 48-bit serial number is

entered. After the last byte of the serial number has

been entered, the shift register contains the CRC value.

Shifting in the 8 bits of CRC returns the shift register to

all 0s.

Upon completion of an overdrive ROM command exe-

cuted at standard speed, the device enters overdrive

mode, where all subsequent communication occurs at

iButton is a registered trademark of Maxim Integrated Products, Inc.

_______________________________________________________________________________________

5

1-Wire Digital Thermometer with

Sequence Detect and PIO

Block Diagram

INTERNAL V

DD

DS28EA00

(ON)

POWER-SUPPLY

SENSOR

V

DD

IO

DS28EA0

1-Wire ROM

FUNCTION

CONTROL

R

CO

64-BIT

REGISTRATION

NUMBER

PIOB (EN)

PIOA (DONE)

DEVICE

FUNCTION

CONTROL

8-BIT CRC

GENERATOR

ALARM AND

CONFIGURATION

REGISTERS

64-BIT

SCRATCHPAD

TEMPERATURE

SENSOR

DS28EA00

COMMAND LEVEL:

AVAILABLE COMMANDS:

DATA FIELD AFFECTED:

READ ROM

MATCH ROM

SEARCH ROM

64-BIT ROM

1-Wire ROM

FUNCTION COMMANDS

(SEE FIGURE 11)

CONDITIONAL SEARCH ROM

CONDITIONAL READ ROM

SKIP ROM

64-BIT ROM, TEMPERATURE ALARM REGISTERS, SCRATCHPAD

64-BIT ROM, PIOB PIN STATE, CHAIN STATE

(NONE)

OVERDRIVE-SKIP ROM

OVERDRIVE-MATCH ROM

64-BIT ROM, OD-FLAG

WRITE SCRATCHPAD

READ SCRATCHPAD

COPY SCRATCHPAD

CONVERT TEMPERATURE

READ POWER MODE

RECALL EEPROM

PIO ACCESS READ

PIO ACCESS WRITE

CHAIN

SCRATCHPAD

TEMPERATURE ALARM AND CONFIGURATION REGISTERS

SCRATCHPAD, TEMPERATURE ALARM REGISTERS

DS28EA00-SPECIFIC

CONTROL FUNCTION COMMANDS

(SEE FIGURE 9)

V

DD

PIN VOLTAGE

SCRATCHPAD, TEMPERATURE ALARM, AND CONFIGURATION REGISTERS

PIO PINS

CHAIN STATE, PIOA PIN STATE

Figure 1. Hierarchical Structure for 1-Wire Protocol

_______________________________________________________________________________________

6

1-Wire Digital Thermometer with

Sequence Detect and PIO

DS28EA0

MSB

LSB

8-BIT

CRC CODE

8-BIT FAMILY CODE

48-BIT SERIAL NUMBER

(42h)

LSB MSB

LSB

Figure 2. 64-Bit Registration Number

8

5

4

POLYNOMIAL = X + X + X + 1

1ST

STAGE

2ND

STAGE

3RD

STAGE

4TH

STAGE

5TH

STAGE

6TH

STAGE

7TH

STAGE

8TH

STAGE

0

1

2

3

4

5

6

7

8

X

INPUT DATA

Figure 3. 1-Wire CRC Generator

power up with constant data and cannot be written by

the user. The TH, TL, and Configuration register data in

the scratchpad control the resolution of a temperature

conversion and decide whether a temperature is consid-

ered as “alarming.” TH, TL, and Configuration can be

copied to the EEPROM to become nonvolatile. The

scratchpad is automatically loaded with EEPROM data

when the DS28EA00 powers up.

Memory Description

The memory map of the DS28EA00 is shown in Figure 4.

It consists of an 8-byte scratchpad and 3 bytes of back-

up EEPROM. The first 2 bytes form the Temperature

Readout register, which is updated after a temperature

conversion and is read only. The next 3 bytes are user-

writable; they contain the Temperature High (TH) and the

Temperature Low (TL) Alarm register and a Configuration

register. The remaining 3 bytes are “reserved.” They

BYTE

SCRATCHPAD (POWER-UP STATE)

ADDRESS

BACKUP EEPROM

0

1

2

3

4

5

6

7

TEMPERATURE LSB (50h)

TEMPERATURE MSB (05h)

TH REGISTER OR USER BYTE 1*

TL REGISTER OR USER BYTE 2*

CONFIGURATION REGISTER*

RESERVED (FFh)

N/A

TH REGISTER OR USER BYTE 1

TL REGISTER OR USER BYTE 2

CONFIGURATION REGISTER

N/A

RESERVED (0Ch)

RESERVED (10h)

*POWER-UP STATE DEPENDS ON VALUE(S) STORED IN EEPROM.

Figure 4. Memory Map

_______________________________________________________________________________________

7

1-Wire Digital Thermometer with

Sequence Detect and PIO

Register Detailed Descriptions

Temperature Readout Register Bitmap

ADDRRESS

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

3

2

1

0

-1

-2

-3

-4

0h

1h

2

LS BYTE

MS BYTE

6

5

4

S

2

Temperature Alarm Registers Bitmap

DS28EA0

ADDRRESS

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

6

5

4

3

2

1

0

2h

3h

S

2

HIGH ALARM (TH)

LOW ALARM (TL)

6

5

4

3

2

1

0

2

Table 1. Temperature/Data Relationship

TEMPERATURE

(°C)

DIGITAL OUTPUT

(BINARY)

DIGITAL OUTPUT

(HEX)

+85*

+25.0625

+10.125

+0.5

0000 0101 0101 0000

0000 0001 1001 0001

0000 0000 1010 0010

0000 0000 0000 1000

0000 0000 0000 0000

1111 1111 1111 1000

1111 1111 0101 1110

1111 1110 0110 1111

1111 1101 1000 0000

0550h

0191h

00A2h

0008h

0000h

FFF8h

FF5Eh

FE6Fh

FD80h

0

-0.5

-10.125

-25.0625

-40

*The power-on reset value of the Temperature Readout register is +85°C.

The temperature reading is in °C using a 16-bit sign-

extended two’s complement format. Table 1 shows

examples of temperature and the corresponding data

for 12-bit resolution. With two’s complement, the sign

bit(s) is set if the value is negative. If the device is con-

figured for 12-bit resolution, all bits in the LS byte are

valid; for a reduced resolution, bit 0 (11-bit mode), bits

0 to 1 (10-bit mode), and bits 0 to 2 (9-bit mode) are

undefined.

olds are represented as two’s complement number.

With 8 bits available for sign and value, alarm thresh-

olds can be set in increments of 1°C. An alarm condi-

tion exists if a temperature conversion results in a value

that is either higher than or equal to the value stored

in the TH register or lower than or equal to the value

stored in the TL register. If a temperature alarm condi-

tion exists, the device responds to the Conditional

Search ROM command. The alarm condition is cleared

if a subsequent temperature conversion results in a

temperature reading within the boundaries defined by

the data in the TH and TL registers.

The result of a temperature conversion is automatically

compared to the values in the alarm registers to deter-

mine whether an alarm condition exists. Alarm thresh-

8

_______________________________________________________________________________________

1-Wire Digital Thermometer with

Sequence Detect and PIO

DS28EA0

Configuration Register

ADDRRESS

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

4h

0

R1

R0

1

The functional assignments of the individual bits are

explained in the table below. Bits [4:0] and bit 7 have

no function and cannot be changed by the user. As a

factory default, the device operates in 12-bit resolution.

BIT DESCRIPTION

BIT(S)

DEFINITION

These bits control the resolution of the temperature converter. The codes are as follows:

R1

0

1

R0

0

1

0

1

R1, R0: Temperature

Converter Resolution

9 bits

10 bits

11 bits

12 bits

[6:5]

PIO Structure

Each PIO consists of an open-drain pulldown transistor

and an input path to read the pin state. The transistor is

controlled by the PIO output latch, as shown in Figure

5. The device function control unit connects the PIO

pins logically to the 1-Wire interface. PIOA has a pullup

PIO PIN STATE

PIO PIN

PIO OUTPUT LATCH STATE

PIO DATA

PIO CLOCK

D

Q

CLOCK

path to internal V

to facilitate the sequence-detect

DD

function (see the Block Diagram) in conjunction with the

Chain command; PIOB is truly an open-drain structure.

The power-on default state of the PIO output transistors

is off; high-impedance, on-chip resistors (not shown in

PIO OUTPUT LATCH

Figure 5. PIO Simplified Logic Diagram

Figure 5) pull the PIO pins to internal V

.

DD

eral-purpose ports of the DS28EA00 are reused for the

chain function. PIOB functions as an EN input and PIOA

generates the DONE signal, which is connected to the

EN input of the next device, as shown in the Typical

Operating Circuit. The EN input of the first device in the

chain needs to be hardwired to GND or logic 0 must be

applied for the duration of the sequence discovery

process. Besides the two pins, the sequence discovery

relies on the Conditional Read ROM command.

Chain Function

The chain function is a feature that allows the 1-Wire

master to discover the physical sequence of devices

that are wired as a linear network (chain). This is partic-

ularly convenient for devices that are installed at equal

spacing along a long cable (e.g., to measure tempera-

tures at different locations inside a storage tower or

tank). Without chain function, the master needs a

lookup table to correlate the registration number to the

physical location.

For the chain function and normal PIO operation to

coexist, the DS28EA00 distinguishes three chain states:

OFF, ON, and DONE. The transition from one chain

state to another is controlled through the Chain com-

mand. Table 2 summarizes the chain states and the

specific behavior of the PIO pins.

The chain function requires two pins: an input (EN) to

enable a device to respond during the discovery and

an output (DONE) to inform the next device in the chain

that the discovery of its neighbor is done. The two gen-

Table 2. Chain States

DEVICE BEHAVIOR

CHAIN STATE

PIOB (EN)

PIOA (DONE)

PIO (High Impedance)

Pullup On

CONDITIONAL READ ROM

Not Recognized

OFF (Default)

ON

PIO (High Impedance)

EN Input

Recognized if EN is 0

Not Recognized

DONE

No Function

Pulldown On (DONE Logic 0)

_______________________________________________________________________________________

9

1-Wire Digital Thermometer with

Sequence Detect and PIO

The power-on default chain state is OFF, where PIOA

and PIOB are solely controlled through the PIO Access

Read and Write commands. In the chain ON state,

used with the ROM registration number. The CRC is

transmitted in its true (noninverted) form. The master

can issue a reset to terminate the reading early if only

part of the scratchpad data is needed.

PIOA is pulled high to the device’s internal V

supply

DD

through an approximately 40kΩ resistor, applying a

logic 1 to the PIOB (EN) pin of the next device. Only in

the ON state does a DS28EA00 respond to the

Conditional Read ROM command, provided its EN is at

logic 0. After a device’s ROM registration number is

read, it is put into the chain DONE state, which enables

the next device in the chain to respond to the

Conditional Read ROM command.

Copy Scratchpad [48H]

This command copies the contents of the scratchpad

byte addresses 2 to 4 (TH, TL, and Configuration regis-

ters) to the backup EEPROM. If the device has no V

DD

power, the master must enable a strong pullup on the

1-Wire bus for the duration of t within 10µs

DS28EA0

PROGMAX

after this command is issued. If the device is powered

through the V pin, the master can generate read time

DD

At the beginning of the sequence discovery process, all

devices are put into the chain ON state. As the discov-

ery progresses, one device after another is transitioned

into the DONE state until all devices are identified.

Finally, all devices are put into the chain OFF state,

which releases the PIO pins and restores their power-

on default state.

slots to monitor the copy process. Copy is completed

when the master reads 1 bits instead of 0 bits.

Convert Temperature [44h]

This command initiates a temperature conversion.

Following the conversion, the resulting thermal data is

found in the Temperature Readout register in the

scratchpad and the DS28EA00 returns to its low-power

Control Function Commands

idle state. If the device has no V

power, the master

DD

Figure 9 shows the protocols necessary for measuring

temperatures, accessing the memory and PIO pins,

and changing the chain state. Examples on how to use

these and other functions are included at the end of this

document. The communication between master and

DS28EA00 takes place either at standard speed

(default, OD = 0) or at overdrive speed (OD = 1). If not

explicitly set into the overdrive mode after power-up,

the DS28EA00 communicates at standard speed.

must enable a strong pullup on the 1-Wire bus for the

duration of the applicable resolution-dependent

t

within 10µs after this command is issued. If

CONVMAX

the device is powered through the V

pin, the master

DD

can generate read time slots to monitor the conversion

process. The conversion is completed when the master

reads 1 bits instead of 0 bits.

Read Power Mode [B4h]

For Copy Scratchpad and Convert Temperature, the

Write Scratchpad [4Eh]

This command allows the master to write 3 bytes of

data to the scratchpad of the DS28EA00. The first data

byte is associated with the TH register (byte address

2), the second byte is associated with the TL register

(byte address 3), and the third byte is associated with

the Configuration register (byte address 4). Data must

be transmitted least significant bit first. All 3 bytes must

be written before the master issues a reset, or the data

can be corrupted.

master needs to know whether the DS28EA00 has V

DD

power available. The Read Power Mode command is

implemented to provide the master with this informa-

tion. After the command code, master issues read time

slots. If the master reads 1s, the device is powered

through the V

pin. If the device is powered through

DD

the 1-Wire line, the master read 0s. The power-supply

sensor samples the state of the V

slot that the master generates after the command code.

pin for every time

DD

Recall EEPROM [B8h]

This command recalls the TH and TL alarm trigger val-

ues and configuration data from backup EEPROM into

their respective locations in the scratchpad. After hav-

ing transmitted the command code, the master can

issue read time slots to monitor the completion of the

recall process. Recall is completed when the master

reads 1 bits instead of 0 bits. The recall occurs auto-

matically at power-up, not requiring any activity by the

master.

Read Scratchpad [BEh]

This command allows the master to read the contents

of the scratchpad. The data transfer starts with the least

significant bit of the Temperature Readout register at

byte address 0 and continues through the remaining 7

bytes of the scratchpad. If the master continues read-

ing, it gets a ninth byte, which is an 8-bit CRC of all the

data in the scratchpad. This CRC is generated by the

DS28EA00 and uses the same polynomial function as is

10 ______________________________________________________________________________________

1-Wire Digital Thermometer with

Sequence Detect and PIO

DS28EA0

PIO Status Bit Assignment

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

PIOB OUTPUT

LATCH STATE

PIOB PIN

STATE

PIOA OUTPUT

LATCH STATE

PIOA PIN

STATE

COMPLEMENT OF B3 TO B0

PIO Output Data Bit Assignment

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

X

PIOB

PIOA

PIO Access Read [F5h]

PIO Access Write [A5h]

This command reads the PIO logical status and reports

it together with the state of the PIO output latch in an

endless loop. A PIO Access Read can be terminated at

any time with a 1-Wire reset. PIO Access Read can be

executed in the Chain ON and Chain DONE state.

While the device is in the Chain ON or Chain DONE

state, the PIO output latch states always read out as 1s;

the PIO pin state may not be reported correctly.

The PIO Access Write command writes to the PIO out-

put latches, which control the pulldown transistors of

the PIO channels. In an endless loop, this command

first writes new data to the PIO and then reads back the

PIO status. This implicit read-after-write can be used by

the master for status verification. A PIO Access Write

can be terminated at any time with a 1-Wire reset. The

PIO Access Write command is ignored by the device

while in Chain ON or Chain DONE state.

The state of both PIO channels is sampled at the same

time. The first sampling occurs during the last (most

significant) bit of the command code F5h. The PIO sta-

tus is then reported to the bus master. While the master

receives the last (most significant) bit of the PIO status

byte, the next sampling occurs and so on until the mas-

ter generates a 1-Wire reset. The sampling occurs with

+ x from the rising edge of the MS bit of

the previous byte, as shown in Figure 6. The value of

“x” is approximately 0.2µs.

After the command code, the master transmits a PIO

output data byte that determines the new state of the

PIO output transistors. The first (least significant) bit is

associated to PIOA; the next bit affects PIOB. The other

6 bits of the new state byte do not have corresponding

PIO pins. These bits should always be transmitted as 1s.

To switch the output transistor on, the corresponding bit

value is 0. To switch the output transistor off (non-con-

ducting), the bit must be 1. This way the bit transmitted

a delay of t

REH

MOST SIGNIFICANT 2 BITS OF PREVIOUS BYTE*

LEAST SIGNIFICANT 2 BITS OF PIO STATUS BYTE

V

TH

IO

t

+ X

REH

SAMPLING POINT**

*THE "PREVIOUS BYTE" COULD BE THE COMMAND CODE OR THE DATA BYTE RESULTING FROM THE PREVIOUS PIO SAMPLE.

**THE SAMPLE POINT TIMING ALSO APPLIES TO THE PIO ACCESS WRITE COMMAND, WITH THE "PREVIOUS BYTE" BEING THE WRITE CONFIRMATION BYTE (AAh).

Figure 6. PIO Access Read Timing Diagram

______________________________________________________________________________________ 11

1-Wire Digital Thermometer with

Sequence Detect and PIO

MOST SIGNIFICANT 2 BITS OF INVERTED PIO OUTPUT DATA BYTE

LEAST SIGNIFICANT 2 BITS OF CONFIRMATION BYTE (AAh)

IO

V

TH

DS28EA0

t

+ X

REH

PIO

Figure 7. PIO Access Write Timing Diagram

as the new PIO output state arrives in its true form at the

PIO pin. To protect the transmission against data errors,

the master must repeat the PIO output data byte in its

inverted form. Only if the transmission was error-free can

the PIO status change. The actual PIO transition to the

POWER-ON RESET (POR)

CHAIN ON

OFF

CHAIN DONE

new state occurs with a delay of t

+ x from the rising

REH

CHAIN OFF

OR POR

edge of the MS bit of the inverted PIO byte, as shown in

Figure 7. The value of “x” is approximately 0.2µs. To

inform the master about the successful communication

of the PIO byte, the DS28EA00 transmits a confirmation

byte with the data pattern AAh. While the MS bit of the

confirmation byte is transmitted, the DS28EA00 samples

the state of the PIO pins, as shown in Figure 6, and

sends it to the master. The master can either continue

writing more data to the PIO or issue a 1-Wire reset to

end the command.

CHAIN DONE

ON

DONE

CHAIN ON

THESE TRANSITIONS ARE PERMISSIBLE, BUT DO NOT

OCCUR DURING NORMAL OPERATION.

Figure 8. Chain State Transition Diagram

Chain [99h]

This command allows the master to put the DS28EA00

into one of the three chain states, as shown in Figure 8.

The device powers up in the chain OFF state. To transi-

tion a DS28EA00 from one state to another, the master

must send a suitable chain control byte after the chain

command code. Only the codes 3Ch, 5Ah, and 96h

(true form) are valid, assigned to OFF, ON, and DONE,

in this sequence. This control byte is first transmitted in

its true form and then in its inverted form. If the chain

state change was successful, the master receives AAh

confirmation bytes. If the change was not successful

(control byte transmission error, invalid control byte),

the master reads 00h bytes instead.

12 ______________________________________________________________________________________

1-Wire Digital Thermometer with

Sequence Detect and PIO

DS28EA0

BUS MASTER Tx CONTROL

FUNCTION COMMAND

FROM ROM FUNCTIONS

FLOWCHART (FIGURE 11)

TO FIGURE 9b

4Eh

BEh

48h

N

WRITE SCRATCHPAD?

READ SCRATCHPAD?

COPY SCRATCHPAD?

MASTER DECISION.

THE MASTER NEEDS TO

Y

KNOW WHETHER V

DD

POWER IS AVAILABLE.

DS28EA00 SETS

BYTE ADDRESS = 2

DS28EA00 SETS

BYTE ADDRESS = 0

Y

N

V

DD

POWERED?

DS28EA00 STARTS

COPY TO EEPROM

MASTER ACTIVATES STRONG

MASTER Tx DATA

BYTE TO SCRATCHPAD

MASTER Rx BYTE

FROM SCRATCHPAD

PULLUP FOR t

PROG

DS28EA00 COPIES

SCRATCHPAD DATA TO EEPROM

COPY

COMPLETED?

Y

MASTER Tx RESET?

N

MASTER Tx RESET?

N

MASTER DEACTIVATES

STRONG PULLUP

MASTER Rx "0"s

BYTE

ADDRESS = 4?

BYTE

ADDRESS = 7?

N

DS28EA00 INCREMENTS

BYTE ADDRESS

DS28EA00 INCREMENTS

BYTE ADDRESS

MASTER Rx 8-BIT

CRC OF DATA

N

Y

MASTER Tx RESET?

Y

MASTER Tx RESET?

N

MASTER Rx "1"s

FROM FIGURE 9b

TO ROM FUNCTIONS

FLOWCHART (FIGURE 11)

Figure 9a. Control Function Flowchart

______________________________________________________________________________________ 13

1-Wire Digital Thermometer with

Sequence Detect and PIO

44h

CONVERT

TEMPERATURE

FROM FIGURE 9a

B4h

READ POWER

MODE?

TO FIGURE 9c

N

MASTER DECISION.

THE MASTER NEEDS TO

KNOW WHETHER V

POWER IS AVAILABLE.

Y

DD

E

Y

N

Y

V

POWERED?

V

DD

POWERED?

DD

DS28EA00 STARTS

TEMPERATURE CONVERSION

MASTER DEACTIVATES STRONG

PULLUP FOR t

MASTER Rx "1"s

MASTER Rx "0"s

CONV

DS28EA00 CONVERTS

TEMPERATURE

Y

CONVERSION

COMPLETED?

N

MASTER DEACTIVATES

STRONG PULLUP

MASTER Rx "0"s

Y

MASTER Tx RESET?

N

MASTER Rx "1"s

TO FIGURE 9a

FROM FIGURE 9c

Figure 9b. Control Function Flowchart

14 ______________________________________________________________________________________

1-Wire Digital Thermometer with

Sequence Detect and PIO

DS28EA0

FROM FIGURE 9b

F5h

PIO ACCESS

READ?

A5h

PIO ACCESS

WRITE?

TO FIGURE 9d

B8h

N

RECALL EEPROM?

Y

DS28EA00 STARTS RECALL

EEPROM TO SCRATCHPAD

BUS MASTER Tx NEW PIO

OUTPUT DATA BYTE

BUS MASTER Tx INVERTED NEW

PIO OUTPUT DATA BYTE

RECALL

COMPLETED?

Y

N

DS28EA00 SAMPLES

PIO PIN

*

N

TRANSMISSION

OK?

MASTER Rx "0"s

Y

DS28EA00 UPDATES

PIO

*

MASTER Rx "1"s

BUS MASTER Rx

CONFIRMATION AAh

BUS MASTER Rx

PIO PIN STATUS

BUS MASTER Rx "1"s

DS28EA00 SAMPLES

PIO PIN

*

N

MASTER Tx RESET?

Y

BUS MASTER Rx

PIO PIN STATUS

Y

N

MASTER Tx RESET?

Y

MASTER Tx RESET?

Y

N

MASTER Rx "1"s

TO FIGURE 9b

FROM FIGURE 9d

*SEE THE COMMAND DESCRIPTION FOR THE EXACT TIMING OF THE PIO PIN SAMPLING AND UPDATING.

Figure 9c. Control Function Flowchart

______________________________________________________________________________________ 15

1-Wire Digital Thermometer with

Sequence Detect and PIO

FROM FIGURE 9c

99h

N

CHAIN COMMAND?

Y

DS28EA0

MASTER Tx CHAIN

CONTROL BYTE

Y

MASTER Tx RESET?

N

MASTER Tx INVERTED

CHAIN CONTROL BYTE

ERROR DEFINED AS:

REPEATED CONTROL BYTE

NOT EQUAL TO INVERTED

CONTROL BYTE

MASTER Rx "1"s

Y

TRANSMISSION

ERROR?

N

CONTROL BYTE

VALID?

VALID CHAIN CONTROL

Y

BYTE CODES:

3Ch OFF

5Ah ON

96h DONE

DS28EA00 UPDATES

CHAIN STATE

MASTER Rx CONFIRMATION

CODE AAh

MASTER Rx INVERTED CHAIN

CONTROL BYTE

MASTER Rx ERROR

CODE 00h

N

MASTER Tx RESET?

Y

MASTER Tx RESET?

Y

MASTER Tx RESET?

Y

TO FIGURE 9c

Figure 9d. Control Function Flowchart

16 ______________________________________________________________________________________

1-Wire Digital Thermometer with

Sequence Detect and PIO

DS28EA0

1-Wire physical interface enhancement to improve

1-Wire Bus System

noise immunity. The value of the pullup resistor primari-

ly depends on the network size and load conditions.

The DS28EA00 requires a pullup resistor of 2.2kΩ

(max) at any speed.

The 1-Wire bus is a system that has a single bus master

and one or more slaves. In all instances the DS28EA00

is a slave device. The bus master is typically a micro-

controller. The discussion of this bus system is broken

down into three topics: hardware configuration, trans-

action sequence, and 1-Wire signaling (signal types

and timing). The 1-Wire protocol defines bus transac-

tions in terms of the bus state during specific time slots,

which are initiated on the falling edge of sync pulses

from the bus master.

The idle state for the 1-Wire bus is high. If for any rea-

son a transaction needs to be suspended, the bus must

be left in the idle state if the transaction is to resume. If

this does not occur and the bus is left low for more than

16µs (overdrive speed) or more than 120µs (standard

speed), one or more devices on the bus could be reset.

Transaction Sequence

Hardware Configuration

The protocol for accessing the DS28EA00 through the

1-Wire port is as follows:

The 1-Wire bus has only a single line by definition; it is

important that each device on the bus be able to drive

it at the appropriate time. To facilitate this, each device

attached to the 1-Wire bus must have open-drain or

three-state outputs. The 1-Wire port of the DS28EA00 is

open drain with an internal circuit equivalent to that

shown in Figure 10.

• Initialization

• ROM Function Command

• Control Function Command

• Transaction/Data

A multidrop bus consists of a 1-Wire bus with multiple

slaves attached. The DS28EA00 supports both a stan-

dard and overdrive communication speed of 15.3kbps

(max) and 125kbps (max), respectively. Note that lega-

cy 1-Wire products support a standard communication

speed of 16.3kbps and overdrive of 142kbps. The

slightly reduced rates for the DS28EA00 are a result of

additional recovery times, which in turn are driven by a

Initialization

All transactions on the 1-Wire bus begin with an initial-

ization sequence. The initialization sequence consists

of a reset pulse transmitted by the bus master followed

by presence pulse(s) transmitted by the slave(s). The

presence pulse lets the bus master know that the

DS28EA00 is on the bus and is ready to operate. For

more details, see the 1-Wire Signaling section.

V

PUP

BUS MASTER

DS28EA00 1-Wire PORT

R

PUP

DATA

Rx

Tx

Rx

I

Tx

L

Rx = RECEIVE

Tx = TRANSMIT

OPEN-DRAIN

PORT PIN

100Ω MOSFET

Figure 10. Hardware Configuration

______________________________________________________________________________________ 17

1-Wire Digital Thermometer with

Sequence Detect and PIO

master knows that slave devices exist with both states

1-Wire ROM Function Commands

of the bit. By choosing which state to write, the bus

master branches in the ROM code tree. After one com-

plete pass, the bus master knows the registration num-

ber of a single device. Additional passes identify the

registration numbers of the remaining devices. Refer to

Application Note 187: 1-Wire Search Algorithm for a

detailed discussion, including an example. The Search

ROM command does not reveal any information about

the location of a device in a network. If multiple

DS28EA00 are wired as a linear network (“chain”), the

device location can be detected using Conditional

Read ROM in conjunction with the Chain function.

Once the bus master has detected a presence, it can

issue one of the eight ROM function commands that the

DS28EA00 supports. All ROM function commands are 8

bits long. A list of these commands follows (refer to the

flowchart in Figure 11).

Read ROM [33h]

This command allows the bus master to read the

DS28EA00’s 8-bit family code, unique 48-bit serial num-

ber, and 8-bit CRC. This command can only be used if

there is a single slave on the bus. If more than one

slave is present on the bus, a data collision occurs

when all slaves try to transmit at the same time (open

drain produces a wired-AND result). The resultant fami-

ly code and 48-bit serial number result in a mismatch of

the CRC.

DS28EA0

Conditional Search ROM [ECh]

The Conditional Search ROM command operates similar-

ly to the Search ROM command except that only those

devices which fulfill certain conditions, participate in the

search. This function provides an efficient means for the

bus master to identify devices on a multidrop system that

have to signal an important event. After each pass of the

conditional search that successfully determined the

64-bit ROM code for a specific device on the multidrop

bus, that particular device can be individually accessed

as if a Match ROM had been issued, since all other

devices have dropped out of the search process and are

waiting for a reset pulse. The DS28EA00 responds to the

conditional search ROM command if a temperature

alarm condition exists. For more details see the

Temperature Alarm Registers section.

Match ROM [55h]

The Match ROM command, followed by a 64-bit ROM

sequence, allows the bus master to address a specific

DS28EA00 on a multidrop bus. Only the DS28EA00 that

exactly matches the 64-bit ROM sequence responds to

the following Control Function command. All other

slaves wait for a reset pulse. This command can be

used with a single device or multiple devices on the

bus.

Search ROM [F0h]

When a system is initially brought up, the bus master

might not know the number of devices on the 1-Wire

bus or their registration numbers. By taking advantage

of the wired-AND property of the bus, the master can

use a process of elimination to identify the registration

numbers of all slave devices. For each bit of the regis-

tration number, starting with the least significant bit, the

bus master issues a triplet of time slots. On the first slot,

each slave device participating in the search outputs

the true value of its registration number bit. On the sec-

ond slot, each slave device participating in the search

outputs the complemented value of its registration num-

ber bit. On the third slot, the master writes the true

value of the bit to be selected. All slave devices that do

not match the bit written by the master stop participat-

ing in the search. If both of the read bits are zero, the

Conditional Read ROM [0Fh]

This command is used in conjunction with the Chain

function to detect the physical sequence of devices in a

linear network (chain). A DS28EA00 responds to

Conditional Read ROM if two conditions are met: a) the

device is in chain ON state, and b) the EN input (PIOB)

is at logic 0. This condition is met by exactly one device

during the sequence discovery process. Upon receiv-

ing the Conditional Read ROM command, this particu-

lar device transmits its 64-bit registration number. A

device in chain ON state, but with a logic 1 level at EN

does not respond to Conditional Read ROM. See the

Sequence Discovery Procedure section for more details

on the use of Conditional Read ROM and the Chain

commands.

18 ______________________________________________________________________________________

1-Wire Digital Thermometer with

Sequence Detect and PIO

DS28EA0

issued followed by a Match ROM or Search ROM com-

mand sequence. This speeds up the time for the

search process. If more than one slave supporting

overdrive is present on the bus and the Overdrive-Skip

ROM command is followed by a Read command, data

collision occurs on the bus as multiple slaves transmit

simultaneously (open-drain pulldowns produce a wired-

AND result).

Skip ROM [CCh]

This command can save time in a single-drop bus sys-

tem by allowing the bus master to access the control

functions without providing the 64-bit ROM code. If

more than one slave is present on the bus and, for

example, a read command is issued following the Skip

ROM command, data collision occurs on the bus as

multiple slaves transmit simultaneously (open-drain

pulldowns produce a wired-AND result).

Overdrive-Match ROM [69h]

The Overdrive-Match ROM command followed by a

64-bit ROM sequence transmitted at overdrive speed

allows the bus master to address a specific DS28EA00

on a multidrop bus and to simultaneously set it in over-

drive mode. Only the DS28EA00 that exactly matches

the 64-bit ROM sequence responds to the subsequent

control function command. Slaves already in overdrive

mode from a previous Overdrive-Skip ROM or success-

ful Overdrive-Match ROM command remain in over-

drive mode. All overdrive-capable slaves return to

standard speed at the next reset pulse of minimum

480µs duration. The Overdrive-Match ROM command

can be used with a single device or multiple devices on

the bus.

Overdrive-Skip ROM [3Ch]

On a single-drop bus this command can save time by

allowing the bus master to access the control functions

without providing the 64-bit ROM code. Unlike the nor-

mal Skip ROM command, the Overdrive-Skip ROM sets

the DS28EA00 in the overdrive mode (OD = 1). All com-

munication following this command has to occur at

overdrive speed until a reset pulse of minimum 480µs

duration resets all devices on the bus to standard

speed (OD = 0).

When issued on a multidrop bus, this command sets all

overdrive-supporting devices into overdrive mode. To

subsequently address a specific overdrive-supporting

device, a reset pulse at overdrive speed has to be

______________________________________________________________________________________ 19

1-Wire Digital Thermometer with

Sequence Detect and PIO

BUS MASTER Tx

RESET PULSE

FROM FIGURE 11b

FROM CONTROL FUNCTIONS

FLOWCHART (FIGURE 9)

OD

N

OD = 0

RESET PULSE?

Y

BUS MASTER Tx ROM

FUNCTION COMMAND

DS28EA00 Tx

PRESENCE PULSE

DS28EA0

33h

READ ROM

COMMAND?

55h

MATCH ROM

COMMAND?

F0h

SEARCH ROM

COMMAND?

ECh

TO FIGURE 11b

N

CONDITIONAL SEARCH

COMMAND?

Y

N

TEMPERATURE

ALARM?

Y

DS28EA00 Tx BIT 0

MASTER Tx BIT 0

DS28EA00 Tx BIT 0

MASTER Tx BIT 0

DS28EA00 Tx

FAMILY CODE

(1 BYTE)

MASTER Tx BIT 0

BIT 0 MATCH?

N

BIT 0 MATCH?

Y

BIT 0 MATCH?

Y

DS28EA00 Tx BIT 1

MASTER Tx BIT 1

DS28EA00 Tx BIT 1

MASTER Tx BIT 1

DS28EA00 Tx

SERIAL NUMBER

(6 BYTES)

MASTER Tx BIT 1

N

BIT 1 MATCH?

Y

BIT 1 MATCH?

Y

BIT 1 MATCH?

Y

DS28EA00 Tx BIT 63

MASTER Tx BIT 63

DS28EA00 Tx BIT 63

MASTER Tx BIT 63

DS28EA00 Tx

CRC BYTE

MASTER Tx BIT 63

N

BIT 63 MATCH?

Y

BIT 63 MATCH?

Y

BIT 63 MATCH?

Y

TO FIGURE 11b

FROM FIGURE 11b

TO CONTROL FUNCTIONS

FLOWCHART (FIGURE 9)

Figure 11a. ROM Functions Flowchart

20 ______________________________________________________________________________________

1-Wire Digital Thermometer with

Sequence Detect and PIO

DS28EA0

TO FIGURE 11a

0Fh

CONDITIONAL

READ ROM?

CCh

SKIP ROM

COMMAND?

3Ch

OVERDRIVE-

SKIP ROM?

69h

OVERDRIVE-

MATCH ROM?

FROM FIGURE 11a

N

Y

OD = 1

N

CHAIN = ON?

Y

MASTER Tx BIT 0

Y

MASTER Tx

RESET?

EN = LOW?

Y

N

*

N

BIT 0 MATCH?

OD = 0

DS28EA00 Tx

FAMILY CODE

(1 BYTE)

Y

MASTER Tx BIT 1

DS28EA00 Tx

SERIAL NUMBER

(6 BYTES)

*

Y

DS28EA00 Tx

CRC BYTE

MASTER Tx

RESET?

BIT 1 MATCH?

Y

OD = 0

N

MASTER Tx BIT 63

*

BIT 63 MATCH?

Y

OD = 0

FROM FIGURE 11a

TO FIGURE 11a

*THE OD FLAG REMAINS AT 1 IF THE DEVICE WAS ALREADY AT OVERDRIVE SPEED BEFORE THE OVERDRIVE-MATCH ROM COMMAND WAS ISSUED.

Figure 11b. ROM Functions Flowchart

______________________________________________________________________________________ 21

1-Wire Digital Thermometer with

Sequence Detect and PIO

device is in overdrive mode and t

and 480µs, the device resets, but the communication

speed is undetermined.

is between 80µs

RSTL

1-Wire Signaling

The DS28EA00 requires strict protocols to ensure data

integrity. The protocol consists of four types of signaling

on one line: reset sequence with reset pulse and pres-

ence pulse, write-zero, write-one, and read-data.

Except for the presence pulse, the bus master initiates

all falling edges. The DS28EA00 can communicate at

two different speeds, standard speed and overdrive

speed. If not explicitly set into the overdrive mode, the

DS28EA00 communicates at standard speed. While in

overdrive mode the fast timing applies to all waveforms.

After the bus master has released the line, it goes into

receive mode. Now the 1-Wire bus is pulled to V

PUP

through the pullup resistor, or in the case of a DS2482-

x00 or DS2480B driver, by active circuitry. When the

threshold V is crossed, the DS28EA00 waits for t

TH

PDH

and then transmits a presence pulse by pulling the line

low for t . To detect a presence pulse, the master

PDL

DS28EA0

must test the logical state of the 1-Wire line at t

.

MSP

The t

PDLMAX

window must be at least the sum of t

,

RSTH

PDHMAX

To get from idle to active, the voltage on the 1-Wire line

t

, and t

. Immediately after t

is

RSTH

RECMIN

needs to fall from V

below the threshold V . To get

TL

PUP

expired, the DS28EA00 is ready for data communica-

tion. In a mixed population network, t should be

extended to minimum 480µs at standard speed and

48µs at overdrive speed to accommodate other 1-Wire

devices.

from active to idle, the voltage needs to rise from

past the threshold V . The time it takes for the

RSTH

V

ILMAX

TH

voltage to make this rise is seen in Figure 12 as “ε” and

its duration depends on the pullup resistor (R ) used

PUP

and the capacitance of the 1-Wire network attached.

The voltage V

is relevant for the DS28EA00 when

ILMAX

Read/Write Time Slots

Data communication with the DS28EA00 takes place in

time slots, which carry a single bit each. Write time slots

transport data from bus master to slave. Read time

slots transfer data from slave to master. Figure 13 illus-

trates the definitions of the write and read time slots.

determining a logical level, not triggering any events.

Figure 12 shows the initialization sequence required to

begin any communication with the DS28EA00. A reset

pulse followed by a presence pulse indicates the

DS28EA00 is ready to receive data, given the correct

ROM and control function command. If the bus master

uses slew-rate control on the falling edge, it must pull

All communication begins with the master pulling the

data line low. As the voltage on the 1-Wire line falls

below the threshold V , the DS28EA00 starts its inter-

TL

nal timing generator that determines when the data line

is sampled during a write time slot and how long data is

valid during a read time slot.

down the line for t

+ t to compensate for the edge.

F

RSTL

A t

duration of 480µs or longer exits the overdrive

RSTL

mode, returning the device to standard speed. If the

DS28EA00 is in overdrive mode and t

is no longer

RSTL

than 80µs, the device remains in overdrive mode. If the

MASTER Tx "RESET PULSE"

MASTER Rx "PRESENCE PULSE"

ε

t

MSP

V

PUP

V

IHMASTER

V

TH

V

TL

V

ILMAX

0V

t

PDH

t

REC

RSTL

PDL

t

F

t

RSTH

RESISTOR

MASTER

DS28EA00

Figure 12. Initialization Procedure “Reset and Presence Pulses”

22 ______________________________________________________________________________________

1-Wire Digital Thermometer with

Sequence Detect and PIO

DS28EA0

WRITE-ONE TIME SLOT

t

W1L

V

PUP

V

IHMASTER

V

TH

V

TL

V

ILMAX

0V

ε

t

F

t

SLOT

RESISTOR

MASTER

WRITE-ZERO TIME SLOT

t

W0L

V

PUP

V

IHMASTER

V

TH

V

TL

V

ILMAX

0V

ε

t

F

t

REC

t

SLOT

RESISTOR

MASTER

READ-DATA TIME SLOT

t

MSR

t

RL

V

PUP

V

IHMASTER

V

TH

MASTER

SAMPLING

WINDOW

V

TL

V

ILMAX

0V

δ

t

REC

F

t

SLOT

RESISTOR

MASTER

DS28EA00

Figure 13. Read/Write Timing Diagram

______________________________________________________________________________________ 23

1-Wire Digital Thermometer with

Sequence Detect and PIO

Master-to-Slave

device to lose synchronization with the master and,

For a write-one time slot, the voltage on the data line

consequently, result in a search ROM command com-

ing to a dead end or cause a device-specific function

command to abort. For better performance in network

applications, the DS28EA00 uses a new 1-Wire front-

end, which makes it less sensitive to noise and also

reduces the magnitude of noise injected by the slave

device itself.

must have crossed the V threshold before the write-

TH

one low time t

is expired. For a write-zero time

W1LMAX

slot, the voltage on the data line must stay below the

threshold until the write-zero low time t is

V

TH

W0LMIN

expired. For the most reliable communication, the volt-

age on the data line should not exceed V during

ILMAX

the entire t

or t

window. After the V threshold

W0L

W1L TH

The 1-Wire front-end of the DS28EA00 differs from tra-

ditional slave devices in four characteristics:

has been crossed, the DS28EA00 needs a recovery

time t before it is ready for the next time slot.

DS28EA0

REC

1) The falling edge of the presence pulse has a con-

trolled slew rate. This provides a better match to the

line impedance than a digitally switched transistor,

converting the high-frequency ringing known from

traditional devices into a smoother low-bandwidth

transition. The slew-rate control is specified by the

Slave-to-Master

A read-data time slot begins like a write-one time slot.

The voltage on the data line must remain below V

TL

until the read low time t

is expired. During the t

RL

window, when responding with a 0, the DS28EA00

starts pulling the data line low; its internal timing gener-

ator determines when this pulldown ends and the volt-

age starts rising again. When responding with a 1, the

DS28EA00 does not hold the data line low at all, and

parameter t

, which has different values for stan-

FPD

dard and overdrive speed.

2) There is additional lowpass filtering in the circuit

that detects the falling edge at the beginning of a

time slot. This reduces the sensitivity to high-fre-

quency noise. This additional filtering does not

apply at overdrive speed.

the voltage starts rising as soon as t is over.

RL

The sum of t + δ (rise time) on one side and the inter-

nal timing generator of the DS28EA00 on the other side

RL

define the master sampling window (t

to

MSRMIN

3) There is a hysteresis at the low-to-high switching

t

) in which the master must perform a read from

MSRMAX

threshold V . If a negative glitch crosses V but

TH

the data line. For the most reliable communication, t

RL

does not go below V

- V , it is not recognized

TH

HY

should be as short as permissible, and the master

should read close to but no later than t . After

(Figure 14, Case A). The hysteresis is effective at

any 1-Wire speed.

MSRMAX

reading from the data line, the master must wait until

4) There is a time window specified by the rising edge

t

is expired. This guarantees sufficient recovery time

SLOT

REC

hold-off time t

during which glitches are

REH

for the DS28EA00 to get ready for the next time slot.

ignored, even if they extend below V

- V

HY

TH

Note that t

specified herein applies only to a single

REC

threshold (Figure 14, Case B, t

< t

). Deep

GL

REH

DS28EA00 attached to a 1-Wire line. For multidevice

configurations, t needs to be extended to accommo-

voltage droops or glitches that appear late after

crossing the V threshold and extend beyond the

REC

TH

date the additional 1-Wire device input capacitance.

Alternatively, an interface that performs active pullup dur-

ing the 1-Wire recovery time such as the DS2482-x00 or

DS2480B 1-Wire line drivers can be used.

t

window cannot be filtered out and are taken as

REH

the beginning of a new time slot (Figure 14, Case C,

≥ t ).

t

GL

REH

Devices that have the parameters V

and t

speci-

REH

HY

Improved Network Behavior

(Switchpoint Hysteresis)

fied in their electrical characteristics use the improved

1-Wire front-end.

In a 1-Wire environment, line termination is possible

only during transients controlled by the bus master

(1-Wire driver). 1-Wire networks, therefore, are suscep-

tible to noise of various origins. Depending on the phys-

ical size and topology of the network, reflections from

end points and branch points can add up, or cancel

each other to some extent. Such reflections are visible

as glitches or ringing on the 1-Wire communication line.

Noise coupled onto the 1-Wire line from external

sources can also result in signal glitching. A glitch dur-

ing the rising edge of a time slot can cause a slave

Sequence Discovery Procedure

Precondition: The PIOB pin (EN) of the first device in

the chain is at logic 0. The PIOA pin (DONE) of the first

device connects to the PIOB of the second device in

the chain, etc., as shown in Figure 15. The 1-Wire mas-

ter detects the physical sequence of the devices in the

chain by performing the following procedure.

Starting Condition: The master issues a Skip ROM

command followed by a Chain ON command, which

puts all devices in the chain ON state. The pullup

24 ______________________________________________________________________________________

1-Wire Digital Thermometer with

Sequence Detect and PIO

DS28EA0

t

REH

t

REH

V

PUP

V

TH

V

HY

CASE A

CASE B

CASE C

0V

t

GL

t

GL

Figure 14. Noise Suppression Scheme

through R

of the PIOA pin charges the PIOA/PIOB

only device in the chain with a low level at PIOB, it

responds with its registration number. The master

stores the registration number with the sequence num-

ber of 2. The first device cannot respond since it is in

chain DONE state. Next, the master transmits a Chain

DONE command.

CO

connections to logic 1 level at all devices except for the

first device in the chain. If a local V supply is not

DD

available, the master needs to activate a low-imped-

ance bypass to the 1-Wire pullup resistor immediately

after the inverted chain control byte until the PIOA/PIOB

connections have reached a voltage equivalent to the

logic 1 level.

Additional Cycles: To identify the registration numbers

of the remaining devices and their physical sequence,

the master repeats the steps of Conditional Read ROM

and Chain DONE. If there is no response to Conditional

Read ROM, all devices in the chain are identified.

First Cycle: The master sends a Conditional Read ROM

command, which causes the first device in the chain to

respond with its 64-bit registration number. The master

memorizes the registration number and the fact that this

is the first device in the chain. Next, the master transmits

a Chain DONE command. Through the PIOA pin of the

just discovered device, this asserts logic 0 at the PIOB

pin of the second device in the chain and also prevents

the just discovered device from responding again.

Ending Condition: At the end of the discovery process

all devices in the chain are in the chain DONE state.

The master should end the sequence discovery by

issuing a Skip ROM command followed by a Chain OFF

command. This puts all the devices into the chain OFF

state and transfers control of the PIOB and PIOA pins to

the PIO Access Read and Write function commands.

Second Cycle: The master sends a Conditional Read

ROM command. Since the second DS28EA00 is the

V

DD

1-Wire

MASTER

#1

#2

#3

V

DD

V

DD

V

DD

PX. Y

IO

DS28EA00

MICROCONTROLLER

PIOB

PIOA

PIOB

PIOA

PIOB

PIOA

*

GND

*CAPACITANCE OF THE CABLING BETWEEN ADJACENT DEVICES IN THE CHAIN.

Figure 15. DS28AE00 Wired for Sequence Discovery (“Chain Function”)

______________________________________________________________________________________ 25

1-Wire Digital Thermometer with

Sequence Detect and PIO

Command-Specific 1-Wire Communication Protocol—Legend

SYMBOL

RST

DESCRIPTION

1-Wire reset pulse generated by master

1-Wire presence pulse generated by slave

Command and data to satisfy the ROM function protocol

ROM function command: “Skip ROM”

PD

SELECT

SKIPR

CDRR

ROM function command: “Conditional Read ROM”

Command: “Write Scratchpad”

E

WSP

RSP

Command: “Read Scratchpad”

CPSP

Command: “Copy Scratchpad”

CTEMP

RPM

Command: “Convert Temperature”

Command: “Read Power Mode”

RCLE

Command: “Recall EEPROM”

PIOR

Command: “PIO Access Read”

PIOW

Command: “PIO Access Write”

CHAIN

CRC

Command : “Chain”

Transfer of n bytes

Transfer of a CRC byte

<xxh>

00 Loop

FF Loop

AA Loop

xx Loop

CONVERSION

PROGRAMMING

Transfer of a specific byte value “xx” (hexadecimal notation)

Indefinite loop where the master reads 00 bytes

Indefinite loop where the master reads FF bytes

Indefinite loop where the master reads AA bytes

Indefinite loop where the slave transmits the inverted invalid control byte

A temperature conversion takes place; activity on the 1-Wire bus is permitted only with local V

supply

DD

Data transfer to backup EEPROM; activity on the 1-Wire bus is permitted only with local V supply

DD

Command-Specific 1-Wire Communication Protocol—Color Codes

Master-to-Slave Slave-to-Master

Programming

Conversion

26 ______________________________________________________________________________________

1-Wire Digital Thermometer with

Sequence Detect and PIO

DS28EA0

1-Wire Communication Examples

Write Scratchpad

RST PD SELECT WSP <3 Bytes> RST PD

Read Scratchpad

RST PD SELECT RSP <8 Bytes> CRC FF Loop

Copy Scratchpad (Parasite Powered)

During the wait, the master should activate a low-impedance

bypass to the 1-Wire pullup resistor.

Wait t

RST PD SELECT CPS

FF Loop

PROGMAX

Copy Scratchpad (Local V

Powered)

DD

RST PD SELECT CPS <00h> FF Loop

The master reads 00h bytes until the write cycle is completed.

During the wait, the master should activate a low-impedance

Convert Temperature (Parasite Powered)

Wait t

RST PD SELECT CTEMP

FF Loop

CONVMAX

bypass to the 1-Wire pullup resistor.

Convert Temperature (Local V

Powered)

DD

RST PD SELECT CTEMP <00h> FF Loop

The master reads 00h bytes until the conversion is completed.

Read Power Mode (Parasite Powered)

RST PD SELECT RPM <00h>

Read Power Mode (Local V

Powered)

DD

RST PD SELECT RPM <FFh>

Recall EEPROM

RST PD SELECT RCLE <00h> FF Loop

The master reads 00h bytes until the recall is completed.

PIO Access Read

See the command description for behavior if the device is in chain

ON or chain DONE state.

RST PD SELECT PIOR <PIO Status Byte>

Continues until master sends reset pulse.

PIO Access Write (Success)

RST PD SELECT PIOW

Loop until master sends reset pulse.

______________________________________________________________________________________ 27

1-Wire Digital Thermometer with

Sequence Detect and PIO

1-Wire Communication Examples (continued)

PIO Access Write (Invalid Data Byte)

RST PD SELECT PIOW

<PIO Output Data> <Invalid Data Byte> FF Loop

The PIO Access Write command is ignored by the device while in chain ON or chain DONE state.

Change Chain State (Success)

RST PD SELECT CHAIN <Chain Control Byte> <Chain Control Byte> AA Loop

DS28EA0

Change Chain State (Transmission Error)

RST PD SELECT CHAIN <Any Byte> <Byte ≠ Inverted Previous Byte> 00 Loop

Change Chain State (Invalid Control Byte)

RST PD SELECT CHAIN <Invalid Control Byte> <Inverted Previous Byte> xx Loop

Sequence Discovery Example

Put all devices into

chain ON state.

RST PD SKIPR CHAIN <5Ah> <A5h> Wait for chain to charge <AAh>

RST PD CDRR <Registration Number> CHAIN <96h> <69h> <AAh>

Identify the first device and

put it into chain DONE state.

Identify the next device and

put it into chain DONE state.

Repeat this sequence until

no device responds.

No response: all devices have

RST PD CDRR <8 Bytes FFh>

been discovered

RST PD SKIPR Chain <3Ch> <C3h> <AAh> Put all devices into chain OFF state.

For the sequence discovery to function properly, the logic state at PIOB (EN) must not change during the transmission of

the Conditional Read ROM command code, and, if the device responds, must stay at logic 0 until the entire 64-bit regis-

tration number is transmitted.

Pin Configuration

Package Information

For the latest package outline information and land patterns, go

to www.maxim-ic.com/packages.

+

IO

N.C.

GND

1

2

3

4

8

7

6

5

V

DD

PACKAGE TYPE PACKAGE CODE DOCUMENT NO.

PIOB

PIOA

N.C.

8 µSOP

U8+1

21-0036

DS28EA00

μSOP

28 ______________________________________________________________________________________

1-Wire Digital Thermometer with

Sequence Detect and PIO

DS28EA0

Revision History

REVISION REVISION

PAGES

DESCRIPTION

CHANGED

NUMBER

DATE

0

1/07

Initial release.

—

Changed the storage temperature range in the Absolute Maximum Ratings

section from -40°C to +85°C to -55°C to +125°C.

1

2

6/07

4/09

2

Created newer template-style data sheet.

All

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are

implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 29

Maxim is a registered trademark of Maxim Integrated Products, Inc.


型号：	DS28EA00
厂家：	MAXIM INTEGRATED PRODUCTS
描述：	1-Wire Digital Thermometer with Sequence Detect and PIO 1 - Wire数字温度计，具有顺序检测和PIO
文件：	总29页 (文件大小：290K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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