DS4425BN+ [MAXIM]
106.25MHz/212.5MHz/425MHz Clock Oscillators; 106.25MHz / 212.5MHz /达到425MHz时钟振荡器型号: | DS4425BN+ |
厂家: | MAXIM INTEGRATED PRODUCTS |
描述: | 106.25MHz/212.5MHz/425MHz Clock Oscillators |
文件: | 总7页 (文件大小:124K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Rev 0; 7/07
106.25MHz/212.5MHz/425MHz
Clock Oscillators
061/DS425
General Description
Features
The DS4106, DS4212, and DS4425 ceramic surface-
mount crystal oscillators are part of Maxim’s DS4-XO
series crystal oscillators family. These devices offer out-
put frequencies at 106.25MHz, 212.5MHz, and 425MHz.
The clock oscillators are suited for systems with tight tol-
erances because of the jitter, phase noise, and stability
performance. The small package provides a format
made for applications where PCB space is critical.
♦ Clock Output Frequencies:
DS4106: 106.25MHz
DS4212: 212.50MHz
DS4425: 425.00MHz
♦ Phase Jitter (RMS): 0.9ps Typical
♦ LVPECL or LVDS Output
♦ Supply Current:
50mA (Typical, Unloaded) at +3.3V Supply
(LVPECL)
These clock oscillators are crystal based and use a fun-
damental crystal with PLL technology to provide the
final output frequencies. Each device is offered with
LVDS or LVPECL output types. The output enable pin is
active-high logic.
53mA (Typical) at +3.3V Supply (LVDS)
♦ -40°C to +85°C Temperature Range
♦ Output Disable
These clock oscillators have very low phase jitter and
phase noise. Typical phase jitter is < 0.9psRMS from
12kHz to 20MHz. The devices are designed to operate
with a 3.3V 5ꢀ supply voltage, and are available in a
5.0mm x 3.2mm x 1.49mm, 10-pin LCCC surface-mount
ceramic package.
Ordering Information
PART
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
10 LCCC
10 LCCC
10 LCCC
10 LCCC
10 LCCC
10 LCCC
DS4106AN+
DS4106BN+
DS4212AN+
DS4212BN+
DS4425AN+
DS4425BN+
Applications
Fibre Channel Hard Disk Drives
Host Bus Adapters
+Denotes a lead-free package. The lead finish is JESD97
category e4 (Au over Ni) and is compatible with both lead-based
and lead-free soldering processes.
Raid Controllers
Fibre Channel Switches
Pin Configuration and Selector Guide appear at end of
data sheet.
Typical Operating Circuits
V
V
V
V
CC
CC
CC
CC
OE
OUTP
OE
OUTP
V
CC
V
CC
50Ω
V
- 2V
100Ω
100Ω
LVPECL
LVDS
CC
DS4106/
DS4212/
DS4425
DS4106/
DS4212/
DS4425
50Ω
OUTN
OUTN
GND
GND
LVPECL OPTION
LVDS OPTION
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
106.25MHz/212.5MHz/425MHz
Clock Oscillators
ABSOLUTE MAXIMUM RATINGS
CC
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
V
, GND, OE, OUTP, OUTN .....................................-0.3V, +4V
Storage Temperature Range.............................-40°C to +125°C
Soldering Temperature Profile
(3 passes max) ...............................See IPC/JEDEC J-STD-020
Specification
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V = 3.0V to 3.6V, T = -40°C to +85°C, typical values are at V = +3.3V and T = +25°C, unless otherwise noted.) (Note 1)
CC
A
CC
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
3.3
50
MAX
3.6
65
UNITS
Supply Voltage
V
CC
(Note 2)
3.0
V
LVPECL (Note 3)
LVDS
Supply Current
I
mA
V
CC
53
67
TTL Control Input-Voltage High
(OE)
V
(Note 2)
(Note 2)
2
IH
TTL Control Input-Voltage Low
(OE)
V
0.8
V
IL
061/DS425
Input Leakage Current
LVPECL OUTPUTS (Note 4)
Output High Voltage
I
-50
+10
μA
IL
V
(Note 2)
(Note 2)
V
V
- 1.085
- 1.825
V
V
- 0.88
V
V
OH
CC
CC
Output Low Voltage
V
- 1.62
OL
CC
CC
Output Leakage Current
(Absolute)
I
OE = V
100
μA
OL
IL
LVDS OUTPUTS (Figure 2)
LVDS Output High Voltage
LVDS Output Low Voltage
LVDS Differential Output Voltage
V
(Note 2)
(Note 2)
1.475
V
V
OH
V
0.925
OL
|V
|
250
400
25
OD
mV
V
LVDS Change in V
for
OD
|
|
ꢀ V
OD
Complementary States
LVDS Offset Output Voltage
(Output Common-Mode Voltage)
V
(Note 5)
1.125
1.275
OS
2
_______________________________________________________________________________________
106.25MHz/212.5MHz/425MHz
Clock Oscillators
061/DS425
ELECTRICAL CHARACTERISTICS (continued)
(V = 3.0V to 3.6V, T = -40°C to +85°C, typical values are at V = +3.3V and T = +25°C, unless otherwise noted.) (Note 1)
CC
A
CC
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LVDS Change in V
Complementary States
for
OS
|
|
ꢀ V
150
mV
OS
LVDS Differential Output
Impedance
R
80
140
40
ꢁ
OLVDSO
LVDS Output Current
Output Current
I
Outputs shorted together
Short to ground
12
mA
mA
LVDSO
I
VSSLVDSO
CLOCK OUTPUT
106.2
212.5
425.0
DS4106
DS4212
DS4425
Clock Output Frequency
f
MHz
O
Frequency Stability Total
ꢀf / f
Temperature, aging, load, and supply
+25°C, ±3°C, V = 3.3V
-39
+39
ppm
ppm
O
Initial Frequency Tolerance
f
±20
_TOL
CC
Frequency Stability vs.
Temperature
ꢀf / f
|
-30
-3
+30
+3
ppm
ppm/V
ppm
O TA
Frequency Stability vs. V
ꢀf / f
|
V
= 3.3V ±10%
CC
O V
CC
ꢀf / f
±10% variation in termination
resistance
O
Frequency Stability vs. Load
±1
|
LOAD
Aging (15 Years)
f
-7
+7
ppm
ps
AGING
Phase Jitter (RMS)
PJ
12kHz to 20MHz
10kHz
0.9
3
RMS
Accumulated Deterministic
Jitter Due to Reference Spurs
(P-P)
100kHz
27
15
7
ps
ps
200kHz
1MHz
LVPECL
LVDS
200
175
Clock Output Edge Speeds
t , t
20% to 80%
R
F
Clock Output Duty Cycle
Oscillation Startup Time
+25°C
45
55
%
(Note 6)
10
ms
_______________________________________________________________________________________
3
106.25MHz/212.5MHz/425MHz
Clock Oscillators
ELECTRICAL CHARACTERISTICS (continued)
(V = 3.0V to 3.6V, T = -40°C to +85°C, typical values are at V = +3.3V and T = +25°C, unless otherwise noted.) (Note 1)
CC
A
CC
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
-90
MAX
UNITS
100Hz
1kHz
-112
-115
-123
-142
-147
-82
10kHz
100kHz
1MHz
DS4106 at 106.25MHz
DS4212 at 212.50MHz
DS4425 at 425.00MHz
10MHz
100Hz
1kHz
-106
-109
-117
-136
-141
-76
10kHz
100kHz
1MHz
Clock Output SSB Phase Noise
dBC/Hz
10MHz
100Hz
1kHz
-100
-103
-111
-130
-135
10kHz
100kHz
1MHz
061/DS425
10MHz
Note 1: Limits at -40°C are guaranteed by design and are not production tested.
Note 2: Voltage referenced to ground.
Note 3: Outputs are enabled and unloaded.
Note 4: When the LVPECL output is disabled, the typical output off current is < 100µA for nominal LVPECL signal levels at the
output.
Note 5: AC parameters are guaranteed by design and characterization.
Note 6: Including oscillator startup time and PLL acquisition time, measured after V
reaches 3.0V from power-on.
CC
4
_______________________________________________________________________________________
106.25MHz/212.5MHz/425MHz
Clock Oscillators
061/DS425
Pin Description
PIN
NAME
FUNCTION
Output Enable. On-chip pullup resistor. Connect OE to logic-high, V , or leave open to enable the
CC
output clock. Connect OE to logic-low or GND to disable the output clock. The LVPECL output
clock is set to high impedance when disabled. The LVDS output clock is latched to a differential
high when disabled.
1
OE
2, 7–10
N.C.
GND
No Connection
3
4
5
6
Ground
OUTP
OUTN
Positive Clock Output, LVPECL or LVDS
Negative Clock Output, LVPECL or LVDS
+3.3V Supply
V
CC
Exposed Paddle. The exposed pad must be used for thermal relief. This pad can be connected to
ground.
—
EP
Output Drivers
All devices are available with either LVPECL
Detailed Description
The DS4106/DS4212/DS4425 combine a crystal and an
IC to form a precision clock. Figure 1 shows a function-
al diagram of the devices. The IC consists of a crystal
oscillator, a low-noise PLL, selectable clock-divider cir-
cuitry, and an output buffer. The PLL consists of a digi-
tal phase/frequency detector (PFD) and low-jitter
generation VCO. The VCO signal is scaled by a clock-
divider circuit and applied to the output buffer.
(DS4106A/DS4212A/DS4425A) or LVDS (DS4106B/
DS4212B/DS4425B) output buffers. When not needed,
the output buffers can be disabled. When disabled, the
LVPECL output buffer goes to a high-impedance state.
However, the LVDS outputs go to a differential logic
one (OUTP latched high and OUTN latched low) when
the outputs are disabled.
Additional Information
For more available frequencies, refer to the DS4125
data sheet at www.maxim-ic.com/DS4125.
V
CC
OUTP
OSCILLATOR
AMPLIFIER
OUTPUT
BUFFER
PFD
LOOP FILTER
VCO
COUNTER M
OUTN
V
CC
DS4106/
DS4212/
DS4425
COUNTER N
OE
GND
Figure 1. Functional Diagram
_______________________________________________________________________________________
5
106.25MHz/212.5MHz/425MHz
Clock Oscillators
D
RL = 100Ω
DC
V
OUTP
OUTN
OH
SINGLE-ENDED
OUTPUT
IVODI
V
V
OS
OL
+V
OD
DIFFERENTIAL
OUTPUT
VODP - P = VOUTP - VOUTN
0V (DIFF)
-V
OD
061/DS425
Figure 2. LVDS Level Definitions
Selector Guide
PART
DS4106AN+
DS4106BN+
DS4212AN+
DS4212BN+
DS4425AN+
DS4425BN+
OUTPUTS
LVPECL
LVDS
FREQUENCY (MHz)
106.25
TOP MARK
06A
106.25
06B
LVPECL
LVDS
212.50
12A
212.50
12B
LVPECL
LVDS
425.00
42A
425.00
42B
+Denotes a lead-free package. The lead finish is JESD97 category e4 (Au over Ni) and is compatible with both lead-based and lead-
free soldering processes.
6
_______________________________________________________________________________________
106.25MHz/212.5MHz/425MHz
Clock Oscillators
061/DS425
Pin Configuration
Thermal Information
THETA-JA (°C/W)
TOP VIEW
90
N.C.
N.C.
+
OE
N.C.
GND
1
6
5
4
V
CC
Package Information
DS4106/
DS4212/
DS4425
(For the latest package outline information go to
www.maxim-ic.com/DallasPackInfo.)
2
3
OUTN
OUTP
PACKAGE TYPE
DOCUMENT NO.
56-G5032-002
10 LCCC
*EP
N.C.
N.C.
(5.00mm × 3.20mm × 1.49mm)
*EXPOSED PAD
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 7
© 2007 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
相关型号:
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
©2020 ICPDF网 联系我们和版权申明