DS7505_V01 [MAXIM]
Digital Thermometer and Thermostat;
| 型号： | DS7505_V01 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Digital Thermometer and Thermostat |
| 文件： | 总14页 (文件大小：564K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DS7505
Digital Thermometer and Thermostat
General Description
Benefits and Features
● Extends Performance Range with a Low-Voltage,
The DS7505 low-voltage (1.7V to 3.7V) digital thermom-
eter and thermostat provides 9-, 10-, 11-, or 12-bit digital
temperature readings over a -55°C to +125°C range with
±0.5°C accuracy over a -0°C to +70°C range. A 9-bit reso-
lution mode is software compatible with the LM75.
1.7V to 3.7V Operating Range
● Maximizes System Accuracy in Broad Range of
Thermal Management Applications
• Measures Temperature from -55°C to +125°C
(-67°F to +257°F)
• ±0.5°C Accuracy Over a 0°C to +70°C Range
• User-Configurable Resolution from 9 Bits (Default)
to 12 Bits (0.5°C to 0.0625°C Resolution)
The DS7505 thermostat has a dedicated open-drain
output (O.S.) and programmable fault tolerance, which
allows the user to define the number of consecutive error
conditions that must occur before O.S. is activated. There
are two thermostatic operating modes that control thermo-
● Reduces Cost with No External Components and
stat operation based on user-defined trip points (T
and
OS
Stand Alone Thermostat Capability
T
) that are stored in EEPROM registers.
HYST
● Increases Reliability and System Robustness
• Internally Filtered Data Lines for Noise Immunity
(50ns Deglitch)
Applications
● Networking Equipment
● Cellular Base Stations
● Office Equipment
• Bus Timeout Feature Prevents Lockup on a 2-Wire
Interface
● Simplifies Distributed Temperature-Sensing
Applications with Multidrop Capability
● Medical Equipment
● Any Thermally Sensitive System
• Up to Eight Devices Can Operate on a 2-Wire Bus
● Fast 25ms (max) 9-Bit Conversion Time
● Flexible and Nonvolatile (NV) User-Defined
Pin Configurations
Thermostatic Mode
s
TOP VIEW
SDA
SCL
O.S.
GND
1
2
3
4
8
7
6
5
VDD
A0
Ordering Information
DS7505
PART
TEMP RANGE
PIN-PACKAGE
A1
DS7505S+
-55°C to +125°C 8 SO (150 mils)
A2
8 SO (150 mils),
-55°C to +125°C
DS7505S+T&R
DS7505U+
2500-Piece T&R
SO
-55°C to +125°C 8 µMAX®
SDA
SCL
O.S.
GND
1
2
3
4
8
7
6
5
VDD
A0
8 µMAX,
-55°C to +125°C
DS7505U+T&R
DS7505
3000-Piece T&R
A1
+Denotes a lead(Pb)-free/RoHS-compliant package.
T&R = Tape and reel.
A2
µMAX
Commands are capitalized for clarity.
μMAX is a registered trademark of Maxim Integrated Products,
Inc.
19-7471; Rev 3; 12/15
DS7505
Digital Thermometer and Thermostat
Absolute Maximum Ratings
Voltage Range on VDD Relative to Ground.........-0.3V to +4.0V
Voltage Range on Any Other Pin
Relative to Ground............................................-0.3V to +6.0V
Operating Temperature Range......................... -55°C to +125°C
Storage Temperature Range............................ -55°C to +125°C
Soldering Temperature......................... Refer to the IPC/JEDEC
J-STD-020 Specification.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
DC Electrical Characteristics
(1.7V ≤ V
≤ 3.7V, T = -55°C to +125°C, unless otherwise noted.)
DD
A
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
UNITS
Supply Voltage
V
1.7
3.7
V
DD
Input Voltage Range (SDA, SCL,
O.S., A0, A1, A2)
(Note 1)
-0.3
+5.5
V
0°C to +70°C
±0.5
±2.0
Thermometer Error
(Note 2, 3)
T
°C
ERR
-55°C to +125°C
(Note 1)
Input Logic-High
V
0.7 x V
0
V
V
IH
DD
Input Logic-Low
V
(Note 1)
0.3 x V
0.6
IL
DD
SDA Output Logic-Low Voltage
O.S. Saturation Voltage
Input Current Each I/O pin
I/O Capacitance
V
V
6mA sink current (Note 1)
4mA sink current (Notes 1, 2)
V
OL1
OL2
0.8
V
0.4V < V < 0.9 x V
I/O
-10
+10
10
µA
pF
µA
DD
C
I/O
Standby Current
I
(Notes 4, 5, 6)
2
DD1
Active temp conversions
Communication only
750
100
500
Active Current
(Notes 4, 5, 6)
I
µA
DD
2
E Copy only
AC Electrical Characteristics
(1.7V ≤ V
≤ 3.7V, T = -55°C to +125°C, unless otherwise noted.)
DD
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
12
UNITS
Resolution
9
Bits
9-bit conversions
25
10-bit conversions
11-bit conversions
12-bit conversions
50
Temperature Conversion Time
t
ms
CONVT
100
200
400
10
SCL Frequency
f
kHz
ms
SCL
EEPROM Copy Time
t
-40°C to +85°C
WR
-40°C ≤ T ≤ +85°C (Note 7)
10k
40k
20k
80k
A
EEPROM Copy Endurance
N
Cycles
EEWR
T
= +25°C (Note 7)
A
Maxim Integrated
│ 2
www.maximintegrated.com
DS7505
Digital Thermometer and Thermostat
AC Electrical Characteristics (continued)
(1.7V ≤ V
≤ 3.7V, T = -55°C to +125°C, unless otherwise noted.)
DD
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
EEPROM Data Retention
t
-40°C to +125°C (Note 8)
10
Years
EEDR
Bus Free Time Between a STOP
and START Condition
t
(Note 9)
1.3
µs
ns
BUF
START and Repeated START Hold
Time from Falling SCL
600
t
t
(Notes 9, 10)
HD:STA
Low Period of SCL
High Period of SCL
t
(Note 9)
(Note 9)
1.3
0.6
µs
µs
LOW
t
HIGH
Repeated START Condition Setup
Time to Rising SCL
(Note 9)
600
ns
SU:STA
HD:DAT
Data-Out Hold Time from Falling
SCL
t
(Notes 9, 11)
(Note 9)
0
0.9
µs
ns
ns
Data-In Setup Time to Rising SCL
t
100
SU:DAT
Rise Time of SDA and SCL
(Receive)
t
(Notes 9, 12)
1000
300
50
R
Fall Time of SDA and SCL
(Receive)
t
(Notes 9, 12)
ns
ns
F
Spike Suppression Filter Time
(Deglitch Filter)
t
0
SS
STOP Setup Time to Rising SCL
Capacitive Load for Each Bus Line
Input Capacitance
t
(Note 9)
600
ns
pF
pF
ms
SU:STO
C
400
325
B
C
5
I
Serial Interface Reset Time
t
SDA time low (Note 12)
75
TIMEOUT
Note 1: All voltages are referenced to ground.
Note 2: Internal heating caused by O.S. loading causes the DS7505 to read approximately 0.5°C higher if O.S. is sinking the max-
rated current.
Note 3: Specified in 12-bit conversion mode. Quantization error must be considered when converting in lower resolutions.
Note 4:
Note 5:
Note 6:
Note 7:
I
I
I
specified with O.S. pin open.
DD
DD
DD
specified with V
at 3.0V and SDA, SCL = 3.0V, T = -55°C to +85°C.
DD
A
specified with A0, A1, A2 = 0V or V
.
DD
V
must be > 2.0V.
DD
2
Note 8: E Copy occurs at +25°C.
Note 9: See the timing diagram (Figure 1). All timing is referenced to 0.9 x V
Note 10: After this period, the first clock pulse is generated.
and 0.1 x V
.
DD
DD
Note 11: The DS7505 provides an internal hold time of at least 75ns on the SDA signal to bridge the undefined region of SCL’s fall-
ing edge.
Note 12: This timeout applies only when the DS7505 is holding SDA low. Other devices can hold SDA low indefinitely and the
DS7505 does not reset.
Maxim Integrated
│ 3
www.maximintegrated.com
DS7505
Digital Thermometer and Thermostat
Pin Description
PIN
1
NAME
SDA
SCL
O.S.
GND
A2
FUNCTION
Data Input/Output. For 2-wire serial communication port. Open drain.
2
Clock Input. For 2-wire serial communication port.
Thermostat Output. Open drain.
Ground
3
4
5
Address Input
6
A1
Address Input
7
A0
Address Input
8
VDD
Supply Voltage. +1.7V to +3.7V supply pin.
SDA
t
F
t
t
R
t
t
BUF
F
SP
t
SU:DAT
t
LOW
t
t
HD:STA
R
SCL
t
HD:STA
t
t
SU:STA
SU:STO
t
HD:DAT
P
S
SR
Figure 1. Timing Diagram
PRECISION
REFERENCE
OVERSAMPLING
MODULATOR
DIGITAL
DECIMATOR
VDD
CONFIGURATION
REGISTER
SCL
SDA
ADDRESS
AND
I/O CONTROL
R
F
TEMPERATURE
REGISTER
A0
A1
A2
O.S.
T
OS
AND T
THERMOSTAT
COMPARATOR
HYST
REGISTERS
GND
DS7505
Figure 2. Block Diagram
Maxim Integrated
│ 4
www.maximintegrated.com
DS7505
Digital Thermometer and Thermostat
After each temperature measurement and analog-to-digital
(A/D) conversion, the DS7505 stores the temperature as a
16-bit two’s complement number in the 2-byte temperature
register (see Figure 3). The sign bit (S) indicates if the tem-
perature is positive or negative: for positive numbers S =
0 and for negative numbers S = 1. The most recently con-
verted digital measurement can be read from the tempera-
ture register at any time. Since temperature conversions
are performed in the background, reading the temperature
register does not affect the operation in progress.
Operation—Measuring Temperature
The DS7505 measures temperature using a bandgap
temperature-sensing architecture. An on-board delta-
sigma analog-to-digital converter (ADC) converts the
measured temperature to a digital value that is calibrated
in degrees Celsius; for Fahrenheit applications a lookup
table or conversion routine must be used. The DS7505 is
factory-calibrated and requires no external components to
measure temperature.
The DS7505 can be configured to power up either auto-
matically converting temperature or in a low-power standby
state. The preferred power-up mode can be set using the
SD bit in the configuration register as explained in the
Configuration Register section. The resolution of the digital
output data is user-configurable to 9, 10, 11, or 12 bits,
corresponding to temperature increments of 0.5°C, 0.25°C,
0.125°C, and 0.0625°C, respectively. The factory default
resolution at power-up is 9 bits (R1 = 0, R0 = 0), however
this can be programmed to 10, 11, or 12 bits using the R0
and R1 bits in the configuration register as explained in the
Configuration Register section. Note that the conversion
time doubles for each additional bit of resolution.
Bits 3 through 0 of the temperature register are hardwired
to 0. When the DS7505 is configured for 12-bit resolution,
the 12 MSBs (bits 15 through 4) of the temperature reg-
ister contain temperature data. For 11-bit resolution, the
11 MSBs (bits 15 through 5) of the temperature register
contain data, and bit 4 reads out as 0. Likewise, for 10-bit
resolution, the 10 MSBs (bits 15 through 6) contain data,
and for 9-bit the 9 MSBs (bits 15 through 7) contain data
and all unused LSBs contains 0s. Table 1 gives examples
of 12-bit resolution digital output data and the correspond-
ing temperatures.
Bit 15
S
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
6
5
4
3
2
1
0
MS Byte
LS Byte
2
2
2
2
2
2
2
Bit 7
-1
2
Bit 6
-2
2
Bit 5
-3
2
Bit 4
-4
2
Bit 3
0
Bit 2
0
Bit 1
0
Bit 0
0
Figure 3. Temperature, T , and T
Register Format
OS
HYST
Table 1. 12-Bit Resolution Temperature/Data Relationship
DIGITAL OUTPUT
DIGITAL OUTPUT
TEMPERATURE (°C)
(BINARY)
(HEX)
+125
+25.0625
+10.125
+0.5
0111 1101 0000 0000
0001 1001 0001 0000
0000 1010 0010 0000
0000 0000 1000 0000
0000 0000 0000 0000
1111 1111 1000 0000
1111 0101 1110 0000
1110 0110 1111 0000
1100 1001 0000 0000
7D00
1910
0A20
0080
0000
FF80
F5E0
E6F0
C900
0
-0.5
-10.125
-25.0625
-55
Maxim Integrated
│ 5
www.maximintegrated.com
DS7505
Digital Thermometer and Thermostat
programmed values then become the new power-up
defaults.
Shutdown Mode
For power-sensitive applications, the DS7505 offers a
low-power shutdown mode. The SD bit in the configura-
tion register controls shutdown mode. When SD is pro-
grammed to 1, the conversion in progress is completed
and the result stored in the temperature register, after
which the DS7505 goes into a low-power standby state.
The O.S. output is cleared if the thermostat is operating
in interrupt mode and O.S remains unchanged in com-
parator mode. The 2-wire interface remains operational in
shutdown mode, and writing a 0 to the SD bit returns the
DS7505 to normal operation. Upon power-up in shutdown
mode, the DS7505 executes one temperature measure-
ment. The result is stored in the temperature register,
after which the DS7505 enters the shutdown state.
In both operating modes, the user can program the ther-
mostat-fault tolerance, which sets how many consecutive
temperature readings (1, 2, 4, or 6) must fall outside the
thermostat limits before the thermostat output is triggered.
The fault tolerance is set by the F1 and F0 bits in the con-
figuration register. The default factory power-up setting for
fault tolerance is 1 (F1 = 0, F0 = 0).
The data format of the T
and T
registers is identi-
HYST
OS
cal to that of the temperature register (see Figure 3), i.e.,
a 2-byte two’s complement representation of the trip-point
temperature in degrees Celsius with bits 3 through 0
hardwired to 0. After every temperature conversion, the
measurement is compared to the values stored in the T
OS
and T
registers. The O.S. output is updated based
HYST
Operation—Thermostat
The DS7505 thermostat can be programmed to power
up in either comparator mode or interrupt mode, which
activate and deactivate the open-drain thermostat output
on the result of the comparison and the operating mode
of the IC. The number of T and T bits used dur-
ing the thermostat comparison is equal to the conversion
resolution set by the R1 and R0 bits in the configuration
register. For example, if the resolution is 9 bits, only the
OS
HYST
(O.S.) based on user-programmable trip points (T
and
OS
T
). The T
and T
registers contain Celsius
9 MSBs of T
comparator.
and T
are used by the thermostat
HYST
HYST
OS
OS
HYST
temperature values in two’s complement format and
consist of EEPROM that is shadowed by SRAM. Once
written to the shadow SRAM, values can be stored in
EEPROM by issuance of a Copy Data command from the
master (see the Command Set section for more details).
The device can operate using the shadow SRAM only or
using the EEPROM. If the EEPROM is used, the values
are NV and can be programmed prior to installation of the
DS7505 for standalone operation. The factory power-up
settings for the DS7505 are with the thermostat in com-
parator mode, active-low O.S. polarity, overtemperature
The active state of the O.S. output can be programmed
by the POL bit in the configuration register. The powerup
factory default is active low (POL = 0).
If the user does not wish to use the thermostat capabili-
ties of the DS7505, the O.S. output should be left uncon-
nected. Note that if the thermostat is not used, the T
OS
and T
registers can be used for general storage of
HYST
system data.
Comparator Mode
trip-point (T ) register set to 80°C, the hysteresis trip-
OS
When the thermostat is in comparator mode, O.S. can be
programmed to operate with any amount of hysteresis.
The O.S. output becomes active when the measured tem-
point (T
) register set to +75°C, and the number of
HYST
consecutive conversion to trigger O.S. set to 1. If these
power-up settings are compatible with the application, the
DS7505 can be used as a stand-alone thermostat (i.e.,
no 2-wire communication required) with no programming
required prior to installation. If interrupt mode operation,
perature exceeds the T
value a consecutive number of
OS
times as defined by the F1 and F0 fault tolerance (FT) bits
in the configuration register. O.S. then stays active until
the first time the temperature falls below the value stored
active-high O.S. polarity, different T
and T
values,
OS
HYST
in T
. Putting the device into shutdown mode does
HYST
or a different number of conversions to trigger O.S. are
desired, they must be programmed into the EEPROM
either after initial power-up or prior to IC installation. The
not clear O.S. in comparator mode. Thermostat compara-
tor mode operation with FT = 2 is illustrated in Figure 4.
Maxim Integrated
│ 6
www.maximintegrated.com
DS7505
Digital Thermometer and Thermostat
IN THIS EXAMPLE, THE DS7505 IS CONFIGURED
TO HAVE A FAULT TOLERANCE OF 2.
T
OS
TEMPERATURE
T
HYST
INACTIVE
O.S. OUTPUT—COMPARATOR MODE
ACTIVE
INACTIVE
O.S. OUTPUT—INTERRUPT MODE
ACTIVE
ASSUMES A READ
HAS OCCURED
CONVERSIONS
Figure 4. O.S. Output Operation Example
measured temperature falls below the T
value a
Interrupt Mode
In interrupt mode, the O.S. output first becomes active
when the measured temperature exceeds the T value
a consecutive number of times equal to the FT value in
the configuration register. Once activated, O.S. can only
be cleared by either putting the DS7505 into shutdown
mode or by reading from any register (temperature,
HYST
consecutive number of times equal to the FT value. Again,
O.S can only be cleared by putting the device into shut-
down mode or reading any register. Thus, this interrupt/
OS
clear process is cyclical between T
and T
events
, clear,
OS
HYST
(i.e, T , clear, T
, clear, T , clear, T
OS
HYST
OS HYST
etc.). Thermostat interrupt mode operation with FT = 2 is
illustrated in Figure 4.
configuration, T , or T
) on the device. Once O.S.
OS
HYST
has been deactivated, it is only reactivated when the
Maxim Integrated
│ 7
www.maximintegrated.com
DS7505
Digital Thermometer and Thermostat
backed by shadow SRAM, and thus power-up in their
programmed state. Once written to the shadow SRAM,
values can be stored in EEPROM by issuance of a Copy
Data command from the master (see the Command Set
section for more details). If the values are not copied
to the EEPROM, the device powers up with the factory
default settings or the last values that were copied to the
EEPROM. The NVB bit is SRAM and powers up in the
state shown in Table 2.
Configuration Register
The configuration register allows the user to program
various DS7505 options such as conversion resolution,
thermostat fault tolerance, thermostat polarity, thermostat
operating mode, and shutdown mode. The configuration
register is arranged as shown in Figure 5 and detailed
descriptions of each bit are provided in Table 2. The user
has read/write access to all bits in the configuration reg-
ister except the MSB (NVB bit), which is a read-only bit.
All bits in the register but the NVB bit are NV EEPROM
MSB
NVB
Bit 6
R1
Bit 5
R0
Bit 4
F1
Bit 3
F0
Bit 2
POL
Bit 1
TM
LSB
SD
Figure 5. Configuration Register
Table 2. Configuration Register Bit Descriptions
BIT NAME
FUNCTIONAL DESCRIPTION
Power-up state = 0, read only
NVB = 1—Write to an NV memory cell is in progress.
NVB = 0—NV memory is not busy.
NVB
NV Memory Status
R1
Factory power-up state = 0
Conversion Resolution Bit 1
Sets conversion resolution (see Table 3).
R0
Factory power-up state = 0
Conversion Resolution Bit 0
Sets conversion resolution (see Table 3).
F1
Factory power-up state = 0
Thermostat Fault Tolerance Bit 1
Sets the thermostat fault tolerance (see Table 4).
F0
Factory power-up state = 0
Thermostat Fault Tolerance Bit 0
Sets the thermostat fault tolerance (see Table 4).
Factory power-up state = 0
POL = 0—O.S. is active low.
POL = 1—O.S. is active high.
POL
Thermostat Output (O.S.) Polarity
Factory power-up state = 0
TM = 0—Comparator mode.
TM = 1—Interrupt mode.
TM
Thermostat Operating Mode
See the Operation—Thermostat section for a detailed description of these modes.
Factory power-up state = 0
SD
Shutdown
SD = 0—Active conversion and thermostat operation.
SD = 1—Shutdown mode.
See the Shutdown Mode section for a detailed description of this mode.
Maxim Integrated
│ 8
www.maximintegrated.com
DS7505
Digital Thermometer and Thermostat
Table 3. Resolution Configuration
2-Wire Serial Data Bus
The DS7505 communicates over a standard bidirectional
2-wire serial data bus that consists of a serial clock (SCL)
signal and serial data (SDA) signal. The DS7505 inter-
faces to the bus through the SCL input pin and open-drain
SDA I/O pin. All communication is MSB first.
THERMOMETER
RESOLUTION (BITS)
MAX CONVERSION
R1
R0
TIME (ms)
0
0
1
1
0
1
0
1
9
25
50
10
11
12
100
200
The following terminology is used to describe 2-wire
communication:
Master Device: Microprocessor/microcontroller that
controls the slave devices on the bus. The master
device generates the SCL signal and START and STOP
conditions.
Table 4. Fault Tolerance Configuration
CONSECUTIVE OUT-OF-LIMITS
F1
F0
CONVERSIONS TO TRIGGER O.S.
Slave: All devices on the bus other than the master. The
0
0
1
1
0
1
0
1
1
2
4
6
DS7505 always functions as a slave.
Bus Idle or Not Busy: Both SDA and SCL remain high.
SDA is held high by a pullup resistor when the bus is idle,
and SCL must either be forced high by the master (if the
SCL output is push-pull) or pulled high by a pullup resistor
(if the SCL output is open drain).
Register Pointer
Transmitter: A device (master or slave) that is sending
The four DS7505 registers each have a unique 2-bit
pointer designation, which is defined in Table 5. When
reading from or writing to the DS7505, the user must
“point” the DS7505 to the register that is to be accessed.
When reading from the DS7505, once the pointer is set,
it remains pointed at the same register until it is changed.
For example, if the user desires to perform consecutive
reads from the temperature register, then the pointer only
has to be set to the temperature register one time, after
which all reads are automatically from the temperature
register until the pointer value is changed. When writing
to the DS7505, the pointer value must be refreshed each
time a write is performed, even if the same register is
being written to twice in a row.
data on the bus.
Receiver: A device (master or slave) that is receiving
data from the bus.
START Condition: Signal generated by the master to
indicate the beginning of a data transfer on the bus. The
master generates a START condition by pulling SDA from
high to low while SCL is high (see Figure 6). A “repeated”
START is sometimes used at the end of a data transfer
(instead of a STOP) to indicate that the master performs
another operation.
STOP Condition: Signal generated by the master to
indicate the end of a data transfer on the bus. The master
generates a STOP condition by transitioning SDA from low
to high while SCL is high (see Figure 6). After the STOP is
issued, the master releases the bus to its idle state.
At power-up, the pointer defaults to the temperature
register location. The temperature register can be read
immediately without resetting the pointer.
Acknowledge (ACK): When a device (either master
or slave) is acting as a receiver, it must generate an
acknowledge (ACK) on the SDA line after receiving every
byte of data. The receiving device performs an ACK by
pulling the SDA line low for an entire SCL period (see
Figure 6). During the ACK clock cycle, the transmitting
device must release SDA. A variation on the ACK signal is
the “not acknowledge” (NACK). When the master device
is acting as a receiver, it uses a NACK instead of an ACK
after the last data byte to indicate that it is finished receiv-
ing data. The master indicates a NACK by leaving the
SDA line high during the ACK clock cycle.
Changes to the pointer setting are accomplished as
described in the 2-Wire Serial Data Bus section.
Table 5. Pointer Definition
REGISTER
Temperature
Configuration
P1
0
P0
0
0
1
T
T
1
0
HYST
1
1
OS
Maxim Integrated
│ 9
www.maximintegrated.com
DS7505
Digital Thermometer and Thermostat
Slave Address: Every slave device on the bus has a
unique 7-bit address that allows the master to access that
to read data from the slave device then R/W = 1, and if
the master is going to write data to the slave device then
R/W = 0.
device. The DS7505’s 7-bit bus address is 1 0 0 1 A A
2
1
A , where A , A , and A are user-selectable through the
0
2
1
0
Pointer Byte: The pointer byte is used by the master to
tell the DS7505 which register is going to be accessed
during communication. The six MSBs of the pointer byte
(see Figure 8) are always 0 and the two LSBs correspond
to the desired register as shown in Figure 8.
corresponding input pins. The three address pins allow up
to eight DS7505s to be multidropped on the same bus.
Address Byte: The control byte is transmitted by the
master and consists of the 7-bit slave address plus a
read/write (R/W) bit (see Figure 7). If the master is going
SDA
SCL
START
ACK (OR NACK)
STOP
CONDITION
FROM RECEIVER CONDITION
Figure 6. Start, Stop, and ACK Signals
Bit 7
1
Bit 6
0
Bit 5
0
Bit 4
1
Bit 3
Bit 2
Bit 1
Bit 0
A
2
A
1
A
0
R/W
Figure 7. Address Byte
Bit 7
0
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
P1
Bit 0
P0
Figure 8. Pointer Byte
Maxim Integrated
│ 10
www.maximintegrated.com
DS7505
Digital Thermometer and Thermostat
transmitting the requested data on the next clock cycle.
When reading from the configuration register, the DS7505
transmits one byte of data, after which the master must
respond with a NACK followed by a STOP (see Figure
General 2-Wire Information
●
All data is transmitted MSB first over the 2-wire bus.
●
One bit of data is transmitted on the 2-wire bus each
SCL period.
9E). For two-byte reads (i.e., from the temperature, T
OS
●
●
A pullup resistor is required on the SDA line, and,
when the bus is idle, both SDA and SCL must remain
in a logic-high state.
or T
register), the DS7505 transmits two bytes of
HYST
data, and the master must respond to the first data byte
with an ACK and to the second byte with a NACK followed
by a STOP (see Figure 9A). If only the most significant
byte of data is needed, the master can issue a NACK fol-
lowed by a STOP after reading the first data byte in which
case the transaction is the same as for a read from the
configuration register.
All bus communication must be initiated with a START
condition and terminated with a STOP condition. Dur-
ing a START or STOP is the only time SDA is allowed
to change states while SCL is high. At all other times,
changes on the SDA line can only occur when SCL is
low; SDA must remain stable when SCL is high.
If the pointer is not already pointing to the desired register,
the pointer must first be updated as shown in Figure 9D,
which shows a pointer update followed by a single-byte
read. The value of the R/W bit in the initial address byte
is a 0 (“write”) since the master is going to write a pointer
byte to the DS7505. After the DS7505 responds to the
address byte with an ACK, the master sends a pointer
byte that corresponds to the desired register. The master
must then perform a repeated start followed by a stan-
dard one or two byte read sequence (with R/W =1) as
described in the previous paragraph.
●
After every 8-bit (1-byte) transfer, the receiving device
must answer with an ACK (or NACK), which takes
one SCL period. Therefore, nine clocks are required
for every 1-byte data transfer.
Writing to the DS7505: To write to the DS7505, the
master must generate a START followed by an address
byte containing the DS7505 bus address. The value of
the R/W bit must be a 0, which indicates that a write is
about to take place. The DS7505 responds with an ACK
after receiving the address byte. The master then sends
a pointer byte which tells the DS7505 which register is
being written to. The DS7505 again responds with an
ACK after receiving the pointer byte. Following this ACK
the master device must immediately begin transmitting
data to the DS7505. When writing to the configuration
register, the master must send one byte of data (see
Figure 9B), and when writing to the TOS or THYST
registers the master must send two bytes of data (see
Figure 9C). After receiving each data byte, the DS7505
responds with an ACK, and the transaction is finished
with a STOP from the master. All writes to the DS7505
are made to shadow SRAM. Once data is written to the
shadow SRAM, it is only stored to EEPROM by issuance
of a Copy Data command from the master. At that time, all
registers are copied to EEPROM except the Temperature
register which is SRAM only.
The Recall Data command should be issued before a
read if assurance is needed that the contents of the
EEPROM in the Shadow SRAM when read.
Bus Timeout: The DS7505 has a bus timeout feature
that prevents communication errors from leaving the IC in
a state where SDA is held low disrupting other devices on
the bus. If the DS7505 holds the SDA line low for a period
of t
, its bus interface automatically resets and
TIMEOUT
release the SDA line. Bus communication frequency must
be fast enough to prevent a reset during normal opera-
tion. The bus timeout feature only applies to when the
DS7505 is holding SDA low. Other devices can hold SDA
low for an undefined period without causing the interface
to reset.
Command Set
Recall Data [B8h]
1011 1000
Reading from the DS7505: When reading from the
DS7505, if the pointer was already pointed to the desired
register during a previous transaction, the read can be
performed immediately without changing the pointer set-
ting. In this case the master sends a START followed by
an address byte containing the DS7505 bus address.
The R/W bit must be a 1, which tells the DS7505 that
a read is being performed. After the DS7505 sends an
ACK in response to the address byte, the DS7505 begins
Refreshes SRAM shadow register with EEPROM data.
It is recommended that a Recall command be performed
before reading EEPROM-backed memory locations. The
master sends a START followed by an address byte con-
taining the DS7505 bus address. The R/W bit must be a
0. The DS7505 responds with an ACK. If the next byte is a
0xB8, the DS7505 recalls all EEPROM data into shadow
RAM locations.
Maxim Integrated
│ 11
www.maximintegrated.com
DS7505
Digital Thermometer and Thermostat
Copy Data [48h]
0100 1000
Software POR [54h]
0101 0100
Copies data from all SRAM shadow registers to EEPROM.
It is recommended that a Copy Data command be per-
formed after writing EEPROM-backed memory locations
to guarantee data integrity in the event of a power loss.
The master sends a START followed by an address byte
containing the DS7505 bus address. The R/W bit must be
a 0. The DS7505 responds with an ACK. If the next byte
is a 0x48, the DS7505 copies all Shadow RAM locations
in EEPROM memory.
The master sends a START followed by an address byte
containing the DS7505 bus address. The R/W bit must
be a 0. The DS7505 responds with an ACK. If the next
byte is a 0x54, the DS7505 resets as if power had been
cycled, which stops temperature conversions and resets
all registers to their power-up states. No ACK is sent by
the IC after the POR command is received. Afterwards,
the DS7505 makes a single temperature conversion or
continuous temperature conversions, depending on the
state of the SD bit.
A) READ 2 BYTES FROM THE TEMPERATURE, T , OR T
OS
REGISTER (CURRENT POINTER LOCATION)
HYST
SCL
SDA
S
1
0
0
1
A2 A1 A0
R
A
D7 D6 D5 D4 D3 D2 D1 D0
MS DATA BYTE
A
D7 D6 D5 D4 D3 D2 D1 D0
LS DATA BYTE
N
P
START
ADDRESS BYTE
ACK
ACK
NACK STOP
(MASTER)
(SLAVE)
(FROM SLAVE)
(MASTER)
(FROM SLAVE)
B) WRITE TO THE CONFIGURATION REGISTER
SCL
SDA
S
1
0
0
1
A2 A1 A0
W
A
0
0
0
0
0
0
0
1
A
D7 D6 D5 D4 D3 D2 D1 D0
DATA BYTE
A
P
START
ADDRESS BYTE
ACK
POINTER BYTE
ACK
ACK STOP
(SLAVE)
(SLAVE)
(SLAVE)
(FROM MASTER)
C) WRITE TO THE T OR T
OS
REGISTER
HYST
SCL
SDA
S
1
0
0
1
A2 A1 A0
W
A
0
0
0
0
0
0
P1 P0
A
D7 D6 D5 D4 D3 D2 D1 D0
MS DATA BYTE
A
D7 D6 D5 D4 D3 D2 D1
LS DATA BYTE
A
P
START
ADDRESS BYTE
ACK
POINTER BYTE
ACK
ACK
ACK STOP
(SLAVE)
(SLAVE)
(SLAVE)
(FROM MASTER)
(SLAVE)
(FROM MASTER)
D) READ SINGLE BYTE (NEW POINTER LOCATION)
SCL
SDA
S
1
0
0
1
A2 A1 A0
W
A
0
0
0
0
0
0
P1 P0
A
S
1
0
0
1
A2 A1 A0
R
A
D7 D6 D5 D4 D3 D2 D1 D0
DATA BYTE
N
P
START
ADDRESS BYTE
ACK
POINTER BYTE
ACK REPEAT ADDRESS BYTE
(SLAVE) START
ACK
NACK STOP
(MASTER)
(SLAVE)
(SLAVE)
(FROM SLAVE)
E) READ FROM THE CONFIGURATION REGISTER (CURRENT POINTER LOCATION)
SCL
SDA
S
1
0
0
1
A2 A1 A0
R
A
D7 D6 D5 D4 D3 D2 D1 D0
MS DATA BYTE
N
P
START
ADDRESS BYTE
ACK
NACK STOP
(MASTER)
(SLAVE)
(FROM SLAVE)
Figure 9. 2-Wire Interface Timing
Maxim Integrated
│ 12
www.maximintegrated.com
DS7505
Digital Thermometer and Thermostat
Package Information
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
PACKAGE TYPE
8 SO
PACKAGE CODE
S8+2
DOCUMENT NO.
21-0041
8 μMAX
U8+3
21-0036
Maxim Integrated
│ 13
www.maximintegrated.com
DS7505
Digital Thermometer and Thermostat
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
DESCRIPTION
0
1
2
2/08
3/08
Initial release.
—
Removed references to exposed pad (µMAX package does not have an EP);
corrected package information outline document number.
1, 4, 13
2
12/14
Updated General Description and Benefits and Features sections
Updated Rise/Fall Time of SDA and SCL specs in AC Electrical Characteristics
table and deleted Note 12 of AC Electrical Characteristics table
3
12/15
3
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2015 Maxim Integrated Products, Inc.
│ 14
相关型号：
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
©2020 ICPDF网 联系我们和版权申明