MAX1115EKA [MAXIM]
Single-Supply, Low-Power, Serial 8-Bit ADCs; 单电源，低功耗，串行8位ADC
| 型号： | MAX1115EKA |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Single-Supply, Low-Power, Serial 8-Bit ADCs |
| 文件： | 总12页 (文件大小：380K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-1822; Rev 1; 2/02
Single-Supply, Low-Power, Serial 8-Bit ADCs
General Description
Features
The MAX1115/MAX1116 low-power, 8-bit, analog-to-
digital converters (ADCs) feature an internal track/hold
o Single Supply
+2.7V to +3.6V (MAX1115)
(T/H), voltage reference, V
monitor, clock, and serial
DD
+4.5V to +5.5V (MAX1116)
interface. The MAX1115 is specified from +2.7V to
+5.5V, and the MAX1116 is specified from +4.5V to
+5.5V. Both parts consume only 175µA at 100ksps.
o Input Voltage Range: 0 to V
REF
o Internal Track/Hold; 100kHz Sampling Rate
The full-scale analog input range is determined by the
internal reference of +2.048V (MAX1115) or +4.096V
(MAX1116). The MAX1115/MAX1116 also feature
AutoShutdown™ power-down mode which reduces
power consumption to <1µA when the device is not in
use. The 3-wire serial interface directly connects to
SPI™, QSPI™, and MICROWIRE™ devices without
external logic. Conversions up to 100ksps are per-
formed using an internal clock.
o Internal Reference
+2.048V (MAX1115)
+4.096V (MAX1116)
o SPI/QSPI/MICROWIRE-Compatible Serial Interface
o Small 8-Pin SOT23 Package
o Automatic Power-Down
o Low Power
The MAX1115/MAX1116 are available in an 8-pin
SOT23 package with a footprint that is just 30% of an
8-pin SO.
175µA at 100ksps
18µA at +3V and 10ksps
1µA in Power-Down Mode
Ordering Information
________________________Applications
Low-Power, Hand-Held Portable Devices
PIN-
PACKAGE
TOP
MARK
PART
TEMP RANGE
System Diagnostics
MAX1115EKA
MAX1116EKA
-40°C to +85°C 8 SOT23
-40°C to +85°C 8 SOT23
AADU
AADV
Battery-Powered Test Equipment
Receive-Signal-Strength Indicators
4mA to 20mA Powered Remote Data-Acquisition
Systems
Pin Configuration
TOP VIEW
V
1
2
3
4
8
7
6
5
SCLK
DOUT
CONVST
I.C.
DD
CH0
I.C.
AutoShutdown is a trademark of Maxim Integrated Products.
SPI/QSPI are trademarks of Motorola, Inc.
MAX1115
MAX1116
GND
MICROWIRE is a trademark of National Semiconductor, Corp.
SOT23
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Single-Supply, Low-Power, Serial 8-Bit ADCs
ABSOLUTE MAXIMUM RATINGS
DD
V
to GND...........................................................-0.3V to +6.0V
Operating Temperature Range
CH0 to GND ...............................................-0.3V to (V
Digital Output to GND ................................-0.3V to (V
Digital Input to GND ..............................................-0.3V to +6.0V
Maximum Current into Any Pin ......................................... 50mA
+ 0.3V)
+ 0.3V)
MAX111_EKA ..................................................-40°C to + 85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
DD
DD
Continuous Power Dissipation (T = +70°C)
A
8-Pin SOT23 (derate 8.9mW/°C above +70°C)............714mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
= +2.7V to +3.6V (MAX1115), V
= +4.5V to +5.5V (MAX1116), T = T
to T
, unless otherwise noted.)
MAX
DD
DD
A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DC ACCURACY
Resolution
8
Bits
LSB
Relative Accuracy
Differential Nonlinearity
Offset Error
INL
(Note 1)
1
1
DNL
LSB
0.5
5
LSB
Gain Error
%FSR
ppm/°C
%
Gain Temperature Coefficient
90
2
V
/2 Sampling Error
DD
7
DYNAMIC PERFORMANCE (25kHz sine-wave input, V = V
(
), f
= 5MHz, f
= 100ksps, R = 100Ω)
IN
REF P-P SCLK
SAMPLE
IN
Signal-to-Noise Plus Distortion
SINAD
48
dB
dB
Total Harmonic Distortion
(up to the 5th Harmonic)
THD
-69
Spurious-Free Dynamic Range
Small-Signal Bandwidth
ANALOG INPUT
SFDR
66
4
dB
f
MHz
-3dB
Input Voltage Range
0
V
V
REF
10
Input Leakage Current
Input Capacitance
V
= 0 or V
0.7
18
µA
pF
CH
DD
C
IN
INTERNAL REFERENCE
MAX1115
MAX1116
2.048
4.096
Voltage
V
V
V
REF
POWER REQUIREMENTS
Supply Voltage
MAX1115
MAX1116
2.7
4.5
5.5
5.5
21
V
DD
f
f
f
f
= 10ksps
14
135
19
SAMPLE
SAMPLE
SAMPLE
SAMPLE
MAX1115
= 100ksps
= 10ksps
= 100ksps
190
25
Supply Current (Note 2)
I
µA
DD
MAX1116
Shutdown
182
0.8
230
10
2
_______________________________________________________________________________________
Single-Supply, Low-Power, Serial 8-Bit ADCs
ELECTRICAL CHARACTERISTICS (continued)
(V
= +2.7V to +3.6V (MAX1115), V
= +4.5V to +5.5V (MAX1116), T = T
to T
, unless otherwise noted.)
MAX
DD
DD
A
MIN
PARAMETER
SYMBOL
CONDITIONS
Full-scale or zero input
MIN
TYP
MAX
UNITS
Supply Rejection Ratio
PSRR
0.5
1
LSB/V
DIGITAL INPUTS (CNVST AND SCLK)
Input High Voltage
Input Low Voltage
Input Hystersis
V
2
V
V
IH
V
0.8
IL
V
0.2
2
V
HYST
Input Current High
Input Current Low
Input Capacitance
DIGITAL OUTPUT (DOUT)
Output High Voltage
I
10
10
µA
µA
pF
IH
I
IL
C
IN
V
I
I
I
= 2mA
V
- 0.5
V
V
OH
SOURCE
DD
= 2mA
0.4
0.8
10
SINK
SINK
Output Low Voltage
V
OL
= 4mA
Three-State Leakage Current
I
0.01
4
µA
pF
L
Three-State Output Capacitance
C
OUT
TIMING CHARACTERISTICS (Figures 6a–6d)
CNVST High Time
CNVST Low Time
t
100
100
ns
ns
µs
ns
ns
ns
csh
t
csl
Conversion Time
t
7.5
conv
Serial Clock High Time
Serial Clock Low Time
Serial Clock Period
t
t
75
75
ch
t
cl
200
cp
Falling of CNVST to DOUT
Active
t
C
C
C
= 100pF, Figure 1
= 100pF
100
100
500
ns
ns
ns
ns
csd
LOAD
LOAD
LOAD
Serial Clock Falling Edge to
DOUT
t
10
100
50
cd
Serial Clock Rising Edge
To DOUT High-Z
t
t
= 100pF, Figure 2
chz
ccs
Last Serial Clock to Next CNVST
(successive conversions on CH0)
Note 1: Relative accuracy is the deviation of the analog value at any code from its theoretical value after the full-scale range and off-
set have been calibrated.
Note 2: Input = 0, with logic input levels of 0 and V
.
DD
_______________________________________________________________________________________
3
Single-Supply, Low-Power, Serial 8-Bit ADCs
Typical Operating Characteristics
(V
noted.)
= +3V (MAX1115), V
= +5V (MAX1116), f
scu
= 5MHz, f
= 100ksps, CLOAD = 100pF, T = +25°C, unless otherwise
sample A
DD
DD
DIFFERENTIAL NONLINEARITY
vs. OUTPUT CODE
INTEGRAL NONLINEARITY
vs. OUTPUT CODE
SHUTDOWN SUPPLY CURRENT
vs. SUPPLY VOLTAGE
1.0
1.0
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0.8
0.6
0.6
0.4
0.4
0.2
0.2
0
0
-0.2
-0.4
-0.6
-0.8
-1.0
-0.2
-0.4
-0.6
-0.8
-1.0
3.5
0
50
100
150
200
250
300
4.5
0
50
100
150
200
250
300
2.5
5.5
OUTPUT CODE
SUPPLY VOLTAGE (V)
OUTPUT CODE
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
SUPPLY CURRENT
vs. TEMPERATURE
SUPPLY CURRENT vs.
CONVERSION RATE
200
100.0
10.0
200
150
100
50
150
100
50
MAX1116
MAX1116
V
= +5V
DD
MAX1116
MAX1115
V
= +5V
MAX1115
= +3V
DD
MAX1115
V
DD
V
= +3V
DD
1.0
0
D
= 00000000
DIGITAL INPUTS
OUT
DD
V
= V
D
V
= 00000000
OUT
= V = V
REF
DD
DIGITAL INPUTS
0
0
-40
-15
10
35
60
85
0.01
0.1
1
10
100
2.5
3.5
4.5
5.5
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
CONVERSION (ksps)
CONVERSION TIME
vs. SUPPLY VOLTAGE
CONVERSION TIME
vs. TEMPERATURE
GAIN ERROR vs.
SUPPLY VOLTAGE
5.5
5.4
5.3
5.2
5.5
5.4
5.3
5.2
1.4
1.2
1.0
0.8
V
= +3V
DD
MAX1115
= +3V
V
DD
MAX1116
DD
V
= +5V
0.6
0.4
0.2
5.1
5.0
5.1
5.0
V
DD
= +5V
-15
0
2.5
3.5
4.5
5.5
-40
10
35
60
85
2.5
3.5
4.5
5.5
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
4
_______________________________________________________________________________________
Single-Supply, Low-Power, Serial 8-Bit ADCs
Typical Operating Characteristics (continued)
(V
noted.)
= +3V (MAX1115), V
= +5V (MAX1116), f
= 5MHz, f
= 100ksps, CLOAD = 100pF, T = +25°C, unless otherwise
DD
DD
scu
sample
A
GAIN ERROR
vs. TEMPERATURE
FFT PLOT
0
2.0
1.5
1.0
0.5
0
f
f
= 100kHz
SAMPLE
IN
= 25.1kHz
IN
-20
A
= 0.9xV p-p
REF
-40
-60
MAX1116
= +5V
MAX1115
= +3V
V
DD
V
DD
-0.5
-1.0
-80
-100
-120
-1.5
-2.0
10k
20k
40k
50k
0
30k
-40
-15
10
35
60
85
ANALOG INPUT FREQUENCY (Hz)
TEMPERATURE (°C)
OFFSET ERROR vs.
TEMPERATURE
OFFSET ERROR vs.
SUPPLY VOLTAGE
0.5
0.4
0.5
0.4
0.3
0.3
0.2
0.1
MAX1116
DD
MAX1116
DD
0.2
V
= +3V
V
= +3V
0.1
0
0
-0.1
-0.1
-0.2
-0.3
-0.4
-0.5
-0.2
-0.3
-0.4
MAX1115
DD
MAX1115
V
= +3V
V
= +5V
DD
-0.5
-40
-15
10
35
60
85
2.5
3.0
3.5
4.0
4.5
5.0
5.5
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
MAX1116
REFERENCE VOLTAGE
vs. NUMBER OF PIECES
MAX1115
REFERENCE VOLTAGE
vs. NUMBER OF PIECES
21.0%
17.5%
14.0%
10.5%
7.0%
3.5%
0
21.0%
17.5%
14.0%
10.5%
7.0%
3.5%
0
3.980
4.020
4.060
4.100
4.140
4.180
1.982
2.008
2.034
2.060
2.086
2.112
REFERENCE VOLTAGE (V)
REFERENCE VOLTAGE (V)
_______________________________________________________________________________________
5
Single-Supply, Low-Power, Serial 8-Bit ADCs
Pin Description
PIN
1
NAME
FUNCTION
V
Positive Supply Voltage
Analog Voltage Input
DD
2
CH0
I.C.
3, 5
4
Internally Connected. Connect to ground.
Ground
GND
CNVST
6
Convert/Start Input. CNVST initiates a power-up and starts a conversion on its falling edge.
Serial Data Output. Data is clocked out on the falling edge of SCLK. DOUT goes low at the start of a
conversion and presents the MSB at the completion of a conversion. DOUT goes high impedance
once data has been fully clocked out.
7
8
DOUT
SCLK
Serial Clock. Used for clocking out data on DOUT.
V
V
DD
DD
3kΩ
3kΩ
DOUT
DOUT
DOUT
DOUT
3kΩ
3kΩ
C
C
LOAD
C
C
LOAD
LOAD
LOAD
GND
a) V TO V
GND
GND
GND
b) HIGH-Z TO V AND V TO V
OL
OL
OH
OL
OH
a) V TO HIGH-Z
b) V TO HIGH-Z
OL
OH
Figure 2. Load Circuits for Disable Time
Figure 1. Load Circuits for Enable Time
Sufficiently low source impedance is required to ensure
an accurate sample. A source impedance of <1.5kΩ is
recommended for accurate sample settling. A 100pF
capacitor at the ADC inputs also improves the accuracy
of an input sample.
Detailed Description
The MAX1115/MAX1116 ADCs use a successive-
approximation conversion technique and input
track/hold (T/H) circuitry to convert an analog signal to
an 8-bit digital output. The SPI/QSPI/MICROWIRE-
compatible interface directly connects to microproces-
sors (µPs) without additional circuitry (Figure 3).
Conversion Process
The MAX1115/MAX1116 conversion process is internal-
ly timed. The total acquisition and conversion process
takes <7.5µs. Once an input sample has been
acquired, the comparator’s negative input is then con-
nected to an auto-zero supply. Since the device
requires only a single supply, the negative input of the
Track/Hold
The input architecture of the ADC is illustrated in the
equivalent-input circuit shown in Figure 4 and is com-
posed of the T/H, input multiplexer, input comparator,
switched capacitor DAC, and auto-zero rail.
comparator is set to equal V /2. The capacitive DAC
DD
The acquisition interval begins with the falling edge of
CNVST. During the acquisition interval, the analog input
restores the positive input to V /2 within the limits of 8-
DD
bit resolution. This action is equivalent to transferring a
(CH0) is connected to the hold capacitor (C
).
✕
HOLD
charge Q = 16pF
V
from C
to the binary-
HOLD
IN
IN
Once the acquisition is complete, the T/H switch opens
and C is connected to GND, which retains the
weighted capacitive DAC, which forms a digital repre-
sentation of the analog-input signal.
HOLD
charge on C
log input.
as a sample of the signal at the ana-
HOLD
6
_______________________________________________________________________________________
Single-Supply, Low-Power, Serial 8-Bit ADCs
GND
V
DD
CAPACITIVE DAC
V
V
CH0
DD
DD
0.1µF
1µF
ANALOG
INPUTS
C
16pF
HOLD
GND
CH0
CPU
COMPARATOR
MAX1115
MAX1116
V
DD
2
R
IN
6.5kΩ
I/O
CONVST
SCLK
SCK (SK)
HOLD
TRACK
DOUT
MISO (SI)
GND
AUTO-ZERO
RAIL
Figure 3. Typical Operating Circuit
Figure 4. Equivalent Input Circuit
Input Voltage Range
Internal protection diodes that clamp the analog input
to V and GND allow the input pin (CH0) to swing
I/O
SCK
CONVST
SCLK
DD
MISO
DOUT
from (GND - 0.3V) to (V
+ 0.3V) without damage.
DD
However, for accurate conversions, the inputs must not
+3V
MAX1115
MAX1116
exceed (V
+ 50mV) or be less than (GND - 50mV).
DD
Input Bandwidth
SS
The ADC’s input tracking circuitry has a 4MHz small-
signal bandwidth, so it is possible to digitize high-
speed transient events and measure periodic signals
with bandwidths exceeding the ADC’s sampling rate by
using undersampling techniques. Anti-alias filtering is
recommended to avoid high-frequency signals being
aliased into the frequency band of interest.
a) SPI
CS
SCK
CONVST
SCLK
DOUT
MISO
+3V
MAX1115
MAX1116
Serial Interface
The MAX1115/MAX1116 have a 3-wire serial interface.
The CNVST and SCLK inputs are used to control the
device, while the three-state DOUT pin is used to
access the conversion results.
SS
b) QSPI
CONVST
I/O
SK
SI
SCLK
DOUT
The serial interface provides connection to microcon-
trollers (µCs) with SPI, QSPI, and MICROWIRE serial
interfaces at clock rates up to 5MHz. The interface sup-
ports either an idle high or low SCLK format. For SPI
and QSPI, set CPOL = CPHA = 0 or CPOL = CPHA = 1
in the SPI control registers of the µC. Figure 5 shows
the MAX1115/MAX1116 common serial-interface con-
nections. See Figures 6a–6d for details on the serial-
interface timing and protocol.
MAX1115
MAX1116
c) MICROWIRE
Figure 5. Common Serial-Interface Connections
_______________________________________________________________________________________
7
Single-Supply, Low-Power, Serial 8-Bit ADCs
ACTIVE
POWER-DOWN MODE
t
CSH
CH0
CH0
ccs
CNVST
t
t
t
cp
t
CONV
ch
IDLE LOW
IDLE LOW
SCLK
DOUT
t
t
t
cl
t
chz
csd
cd
D7 (MSB)
D6
D5
D4
D3
D2
D1
D0
Figure 6a. Conversion and Interface Timing, Conversion on CH0 with SCLK Idle Low
ACTIVE
POWER-DOWN MODE
t
CSH
CH0
CH0
CNVST
SCLK
t
t
t
t
ccs
CONV
ch
cp
IDLE HIGH
IDLE HIGH
t
t
cd
t
cl
t
chz
csd
DOUT
D7 (MSB)
D6
D5
D4
D3
D2
D1
D0
Figure 6b. Conversion and Interface Timing, Conversion on CH0 with SCLK Idle High
The acquisition interval begins with the falling edge of
CNVST. CNVST can idle between conversions in either
a high or low state. If idled in a low state, CNVST must
be brought high for at least 50ns, then brought low to
Digital Inputs and Outputs
The MAX1115/MAX1116 perform conversions by using
an internal clock. This frees the µP from the burden of
running the SAR conversion clock, and allows the con-
version results to be read back at the µP’s convenience
at any clock rate up to 5MHz.
initiate a conversion. To select V /2 for conversion,
DD
the CNVST pin must be brought high and low for a
second time (Figures 6c and 6d).
8
_______________________________________________________________________________________
Single-Supply, Low-Power, Serial 8-Bit ADCs
ACTIVE
POWER-DOWN MODE
t
CSL
t
CSH
V
DD
2
V
DD
2
CH0
CNVST
CH0
t
t
t
ccs
t
ch
cp
CONV
IDLE LOW
IDLE LOW
SCLK
DOUT
t
t
t
t
chz
csd
cd
cl
D7 (MSB)
D6
D5
D4
D3
D2
D1
D0
Figure 6c. Conversion and Interface Timing, Conversion on V
/ 2 with SCLK Idle Low
DD
ACTIVE
POWER-DOWN MODE
t
csl
t
CSH
V
DD
2
V
DD
2
CH0
CNVST
CH0
t
t
t
ccs
t
ch
cp
CONV
SCLK
IDLE HIGH
IDLE HIGH
t
t
cd
t
t
chz
csd
cl
DOUT
D7 (MSB)
D6
D5
D4
D3
D2
D1
D0
Figure 6d. Conversion and Interface Timing, Conversion on V
/ 2 with SCLK Idle High
DD
After CNVST is brought low, allow 7.5µs for the conver-
sion to be completed. While the internal conversion is in
progress, DOUT is low. The MSB is present at the
DOUT pin immediately after conversion is completed.
The conversion result is clocked out at the DOUT pin
and is coded in straight binary (Figure 7). Data is
clocked out at SCLK’s falling edge in MSB-first format
at rates up to 5MHz. Once all data bits are clocked out,
DOUT goes high impedance (100ns to 500ns after the
rising edge) of the eighth SCLK pulse.
SCLK is ignored during the conversion process. Only
after a conversion is complete will SCLK cause serial
data to be output. Falling edges on CNVST during an
_______________________________________________________________________________________
9
Single-Supply, Low-Power, Serial 8-Bit ADCs
OUTPUT CODE
FULL-SCALE
TRANSITION
SYSTEM POWER SUPPLIES
11111111
11111110
GND
+3V/+5V
11111101
FS = V
1LSB = V
+ V
IN-
REFIN
1µF
10Ω
REFIN
256
0.1µF
00000011
00000010
GND
IN-
V
DGND
V
DD
DD
00000001
00000000
DIGITAL
CIRCUITRY
MAX1115
MAX1116
0
1
2
3
FS
FS - 1/2 LSB
INPUT VOLTAGE (LSB)
Figure 7. Input/Output Transfer Function
Figure 8. Power-Supply Connections
active conversion process interrupt the current conver-
The power consumption consequence of this architec-
ture is dramatic when relatively slow conversion rates
are needed. For example, at a conversion rate of
10ksps, the average supply current for the MAX1115 is
15µA, while at 1ksps it drops to 15µA. At 0.1ksps it is
just 0.3µA, or a miniscule 1µW of power consumption
(see Average Supply Current vs. Conversion Rate plot
in the Typical Operating Characteristics sections).
sion and cause the input multiplexer to switch to V /2.
DD
To reinitiate a conversion on CH0, it is necessary to allow
for a conversion to be complete and all of the data to be
read out. Once a conversion has been completed, the
MAX1115/MAX1116 goes into Autoshutdown mode
(typically <1µA) until the next conversion is initiated.
Applications Information
Transfer Function
Figure 7 depicts the input/output transfer function.
Output coding is binary with a +2.048V reference,
1LSB = 8mV(VREF/256).
Power-On Reset
When power is first applied, the MAX1115/MAX1116
are in AutoShutdown (typically <1µA). A conversion
can be started by toggling CNVST high to low.
Powering up the MAX1115/MAX1116 with CNVST low
does not start a conversion.
Layout, Grounding, and Bypassing
For best performance, board layout should ensure that
digital and analog signal lines are separated from each
other. Do not run analog and digital (especially clock)
lines parallel to one another or run digital lines under-
neath the ADC package.
AutoShutdown and Supply Current
Requirements
The MAX1115/MAX1116 are designed to automatically
shutdown once a conversion is complete, without any
external control. An input sample and conversion
process typically takes 5µs to complete, during which
time the supply current to the analog sections of the
device are fully on. All analog circuitry is shutdown after
a conversion completes, which results in a supply cur-
rent of <1µA (see Shutdown Current vs. Supply Voltage
plot in the Typical Operating Characteristics section).
The digital conversion result is maintained in a static
register and is available for access through the serial
interface at any time.
Figure 8 shows the recommended system-ground con-
nections. A single-point analog ground (star-ground
point) should be established at the ADC ground.
Connect all analog grounds to the star-ground. The
ground-return to the power supply for the star ground
should be low impedance and as short as possible for
noise-free operation.
High-frequency noise in the V
power supply can
DD
affect the comparator in the ADC. Bypass the supply to
the star ground with a 0.1µF capacitor close to the V
DD
pin of the MAX1115/MAX1116. Minimize capacitor lead
10 ______________________________________________________________________________________
Single-Supply, Low-Power, Serial 8-Bit ADCs
Functional Diagram
SCLK
CNVST
CONTROL
LOGIC AND
INTERNAL
OCSILLATOR
CH0
INPUT
TRACK
AND HOLD
8-BIT
SAR
ADC
OUTPUT
SHIFT
REGISTER
INPUT
MULTIPLEXER
DOUT
INTERNAL
REFERENCE
2.096V
MAX1115
MAX1116
SPLIT
DD
V
/2
OR 4.096V
lengths for best supply-noise rejection. If the power
supply is noisy, a 0.1µF capacitor in conjunction with a
10Ω series resistor can be connected to form a low-
pass filter.
Chip Information
TRANSISTOR COUNT: 2000
PROCESS: BiCMOS
______________________________________________________________________________________ 11
Single-Supply, Low-Power, Serial 8-Bit ADCs
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2002 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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