MAX13444EASA-T [MAXIM]
Line Transceiver, 1 Func, 1 Driver, 1 Rcvr, BICMOS, PDSO8, 0.150 INCH, MS-012AA, SOP-8;
| 型号： | MAX13444EASA-T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Line Transceiver, 1 Func, 1 Driver, 1 Rcvr, BICMOS, PDSO8, 0.150 INCH, MS-012AA, SOP-8 |
| 文件： | 总18页 (文件大小：251K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-3898; Rev 1; 3/06
±1ꢀ5k ESDꢁ-rotected, ±±8k Faultꢁ-rotected,
FailꢁSafe RSꢁ4±ꢀ/J178± Transceivers
General Description
Features
The MAX13442E/MAX13444E are fault-protected RS-485
and J1708 transceivers that feature 80V protection from
signal faults on communication bus lines. The
MAX13442E/MAX13444E feature a reduced slew-rate dri-
ver that minimizes EMI and reflections, allowing error-free
transmission up to 250kbps. The MAX13443E driver can
transmit up to 10Mbps. The high-speed MAX13443E
RS-485 tranceiver features ±±0V protection from signal
faults on communication bus lines. These transceivers fea-
ture foldback current limit. Each device contains one dif-
ferential line driver with three-state output and one
differential line receiver with three-state input. The 1/4-unit-
load receiver input impedance allows up to 128 trans-
ceivers on a single bus. The devices operate from a 5V
supply. True fail-safe inputs guarantee a logic-high receiv-
er output when the receiver inputs are open, shorted, or
connected to an idle data line.
♦
♦
15kV ESD Protection
80V Fault Protection (±±0V ꢀMA1ꢁ33ꢁEꢂ
♦ Guaranteed 10ꢀbps Data Rate (ꢀMA1ꢁ33ꢁEꢂ
♦ Hot-Swappable for Telecom Mpplications
♦ True Fail-Safe Receiver Inputs
♦ Enhanced Slew-Rate-Limiting Facilitates
Error-Free Data Transmission
(ꢀMA1ꢁ332E/ꢀMA1ꢁ333Eꢂ
♦ Mllow Up to 128 Transceivers on the Bus
♦ -7V to +12V Common-ꢀode Input Range
♦ ±±mM FoldBack Current Limit
♦ Industry-Standard Pinout
Hot-swap circuitry eliminates false transitions on the
data bus during circuit initialization or connection to a
live backplane. Short-circuit current-limiting and ther-
mal-shutdown circuitry protect the driver against exces-
sive power dissipation, and on-chip 15kV ESD
protection eliminates costly external protection devices.
The MAX13442E/MAX13443E/MAX13444E are avail-
able in an 8-pin SO package and are specified over the
automotive temperature range.
Ordering Information
PIN-
PMCKMGE
PKG
CODE
PMRT
TEꢀP RMNGE
ꢀMA1ꢁ332EASA -40°C to +125°C
ꢀMA1ꢁ33ꢁEASA -40°C to +125°C
ꢀMA1ꢁ333EASA -40°C to +125°C
8 SO
8 SO
8 SO
S8-4
S8-4
S8-4
Applications
Telecommunications
Systems
RS-422/RS-485
Communications
Truck and Trailer
Applications
Automotive Applications
HVAC Controls
Industrial Networks
Selector Guide
FMULT
PROTECTION
(Vꢂ
DMTM RMTE
(ꢀbpsꢂ
LOW-POWER RECEIVER/DRIVER TRMNSCEIVERS
PMRT
TYPE
HOT SWMP
SHUTDOWN
ENMBLE
ON BUS
MAX13442E RS-485
MAX13443E RS-485
0.25
10
±80
±±0
±80
Yes
Yes
Yes
Yes
Yes
Yes
128
128
128
Yes
Yes
MAX13444E
J1708
0.25
Yes (only RE)
-in Configurations and Typical Operating Circuits
TOP VIEW
DE
MAX13442E
MAX13443E
RO
RE
DE
DI
R
R
RO
RE
DE
DI
1
2
3
4
1
V
CC
8
8
7
6
5
V
D
CC
R
DI
B
B
A
7
2
3
4
B
R
T
T
6
A
A
RO
R
D
D
GND
5
GND
RE
SO
SO
Pin Configurations and Typical Operating Circuits continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
±1ꢀ5k ESDꢁ-rotected, ±±8k Faultꢁ-rotected,
FailꢁSafe RSꢁ4±ꢀ/J178± Transceivers
MBSOLUTE ꢀMAIꢀUꢀ RMTINGS
(Voltages referenced to GND.)
Continuous Power Dissipation (T = +70°C)
A
V
........................................................................................+7V
8-Pin SO (derate 5.9mW/°C above +70°C)..................471mW
Operating Temperature Range .........................-40°C to +125°C
Storage Temperature Range.............................-±5°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
CC
RE, DE, DE, DI, TXD...................................-0.3V to (V
A, B (Note 1) (MAX13442E/MAX13444E) ............................±80V
A, B (Note 1) (MAX13443E).................................................±±0V
RO ..............................................................-0.3V to (V
+ 0.3V)
CC
+ 0.3V)
CC
Short-Circuit Duration (RO, A, B) ...............................Continuous
Note 1: During normal operation, a termination resistor must be connected between A and B in order to guarantee overvoltage pro-
tection up to the absolute maximum rating of this device. When not in operation, these devices can withstand fault voltages
up to the maximum rating without a termination resistor and will not be damaged.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICML CHMRMCTERISTICS
(V
= +4.75V to +5.25V, T = T
A
to T
, unless otherwise noted. Typical values are at V
= +5V and T = +25°C.)
CC A
CC
MIN
MAX
PMRMꢀETER
SYꢀBOL
CONDITIONS
ꢀIN
TYP
ꢀMA
UNITS
DRIVER
Figure 1, R = 100Ω
2
V
V
L
CC
CC
Differential Driver Output
V
V
V
V
V
OD
Figure 1, R = 54Ω
1.5
L
Change in Magnitude of
Differential Output Voltage
ΔV
Figure 1, R = 100Ω or 54Ω (Note 2)
0.2
3
OD
OC
L
Driver Common-Mode
Output Voltage
V
Figure 1, R = 100Ω or 54Ω
V
/ 2
CC
L
Change in Magnitude of
Common-Mode Voltage
Figure 1, R = 100Ω or 54Ω (Note 2)
L
ΔV
0.2
OC
(MAX13442E/MAX13443E)
DRIVER LOGIC
Driver-Input High Voltage
Driver-Input Low Voltage
Driver-Input Current
V
2
V
V
DIH
V
0.8
2
DIL
I
µA
DIN
0 ≤ V
≤ +12V
OUT
+350
Driver Short-Circuit Output Current
(Note 3)
I
mA
mA
mA
OSD
-7V ≤ V
≤ V
-350
+25
OUT
CC
(V
CC
- 1V) ≤ V
≤ +12V (Note 3)
OUT
Driver Short-Circuit Foldback
Output Current
I
OSDF
OSDL
-7V ≤ V
≤ +1V (Note 3)
-25
-±
OUT
V
V
≥ +20V, R = 100Ω
+±
Driver-Limit Short-Circuit Foldback
Output Current
OUT
OUT
L
I
≤ -15V, R = 100Ω
L
RECEIVER
V
V
V
= GND, V
= 12V
A, B
250
-150
±
CC
A, B
receive
mode
µA
mA
mV
mV
Input Current
I
= -7V
A,B
A, B
A, B
=
80V
Receiver-Differential Threshold
Voltage
V
-7V ≤ V
≤ +12V
-200
-50
TH
CM
Receiver-Input Hysteresis
ΔV
25
TH
2
_______________________________________________________________________________________
±1ꢀ5k ESDꢁ-rotected, ±±8k Faultꢁ-rotected,
FailꢁSafe RSꢁ4±ꢀ/J178± Transceivers
DC ELECTRICML CHMRMCTERISTICS (continuedꢂ
(V
= +4.75V to +5.25V, T = T
A
to T
, unless otherwise noted. Typical values are at V
= +5V and T = +25°C.)
CC A
CC
MIN
MAX
PMRMꢀETER
SYꢀBOL
CONDITIONS
ꢀIN
TYP
ꢀMA
UNITS
RECEIVER LOGIC
Output-High Voltage
Output-Low Voltage
V
Figure 2, I
= -1.±mA
V - 0.±
CC
V
V
OH
OH
V
Figure 2, I = 1mA
0.4
1
OL
OL
Tri-State Output Current at
Receiver
I
0 ≤ V
≤ V
CC
µA
kΩ
mA
OZR
A, B
Receiver Input Resistance
R
-7V ≤ V
≤ +12V
48
IN
CM
Receiver Output Short-Circuit
Current
I
0V ≤ V
≤ V
CC
95
OSR
RO
CONTROL
Control-Input High Voltage
V
DE, DE, RE
DE, RE
2
V
CIH
Input-Current Latch During First
Rising Edge
I
90
µA
IN
SUPPLY CURRENT
DE = V , RE = GND (MAX13442E)
(DE = RE = GND) (MAX13444E)
CC
30
10
No load,
Normal Operation
I
DI = V
mA
CC
CC
(DE = V , RE = GND)
CC
or GND
(MAX13443E)
DE = GND, RE = V
(MAX13442E/ MAX13443E)
CC
20
10
DE = GND, RE = V , T = +25°C
CC
A
Supply Current in Shutdown Mode
I
µA
SHDN
(MAX13442E/MAX13443E)
DE = RE = V (MAX13444E)
100
10
CC
DE = RE = V , T = +25°C (MAX13444E)
CC
A
Supply Current with Output
Shorted to ±0V
DE = GND, RE = GND, no load
output in tri-state (MAX13443E)
I
±15
mA
SHRT
PROTECTION SPECIFICMTIONS
(V
= +4.75V to +5.25V, T = T
A
to T
, unless otherwise noted. Typical values are at V = +5V and T = +25°C.)
CC A
CC
MIN
MAX
PMRMꢀETER
SYꢀBOL
CONDITIONS
ꢀIN
80
TYP
ꢀMA
UNITS
MAX13442E/
MAX13444E
MAX13443E
A, B; R
R = 54Ω
L
= 0,
SOURCE
Overvoltage Protection
ESD Protection
V
±±0
A, B
Human Body Model
15
kV
_______________________________________________________________________________________
ꢁ
±1ꢀ5k ESDꢁ-rotected, ±±8k Faultꢁ-rotected,
FailꢁSafe RSꢁ4±ꢀ/J178± Transceivers
SWITCHING CHMRMCTERISTICS (ꢀMA1ꢁ332E/ꢀMA1ꢁ333Eꢂ
(V
= +4.75V to +5.25V, T = T
A
to T
, unless otherwise noted. Typical values are at V
= +5V and T = +25°C.)
CC A
CC
MIN
MAX
PMRMꢀETER
SYꢀBOL
CONDITIONS
ꢀIN
TYP
ꢀMA UNITS
Figure 3, R = 54Ω, C = 50pF (MAX13442E)
L
L
t
t
PLHA,
Driver Propagation Delay
2000
2000
2000
ns
ns
ns
PLHB
R
DIFF
= ±0Ω, C
= 100pF (MAX13444E)
DIFF
t
DPLH,
Driver Differential Propagation Delay
R = 54Ω, C = 50pF, Figure 4
L L
t
DPHL
Driver Differential Output
Transition Time
t
,t
R = 54Ω, C = 50pF, Figure 4
200
LH HL
L
L
R = 54Ω, C = 50pF,
L
L
t
t
,
SKEWAB
Driver Output Skew
t
= |t
- t
|,
|
350
200
ns
ns
SKEWAB
SKEWBA
PLHA PHLB
SKEWBA
t
= |t
- t
PLHB PHLA
R = 54Ω, C = 50pF,
L
L
Differential Driver Output Skew
t
DSKEW
t
= |t
- t
|
DSKEW
DPLH DPHL
Maximum Data Rate
f
250
kbps
ns
MAX
Driver Enable Time to Output High
t
R = 500Ω, C = 50pF, Figure 5
2000
2000
PDZH
PDHZ
L
L
Driver Disable Time from Output High
t
R
= 500Ω, C = 50pF, Figure 5
ns
L
L
Driver Enable Time from Shutdown to
Output High
t
R
= 500Ω, C = 50pF, Figure 5
4.2
µs
PDHS
L
L
Driver Enable Time to Output Low
Driver Disable Time from Output Low
t
t
R = 500Ω, C = 50pF, Figure ±
2000
2000
ns
ns
PDZL
PDLZ
L
L
R = 500Ω, C = 50pF, Figure ±
L
L
Driver Enable Time from Shutdown to
Output Low
t
R = 500Ω, C = 50pF, Figure ±
4.2
800
µs
ns
ns
PDLS
L
L
Driver Time to Shutdown
t
R = 500Ω, C = 50pF
L L
SHDN
t
,
RPLH
Receiver Propagation Delay
C = 20pF, V = 2V, V
= 0V, Figure 7
2000
L
ID
CM
t
RPHL
Receiver Output Skew
t
C = 20pF, t
= |t - t |
RPLH RPHL
200
2000
2000
4.2
ns
ns
ns
µs
ns
ns
ns
RSKEW
L
RSKEW
Receiver Enable Time to Output High
Receiver Disable Time from Output High
Receiver Wake Time from Shutdown
Receiver Enable Time to Output Low
Receiver Disable Time from Output Low
Receiver Time to Shutdown
t
t
R = 1kΩ, C = 20pF, Figure 8
L L
RPZH
RPHZ
R = 1kΩ, C = 20pF, Figure 8
L
L
t
R = 1kΩ, C = 20pF, Figure 8
L L
RPWAKE
t
t
R = 1kΩ, C = 20pF, Figure 8
2000
2000
800
RPZL
L
L
R = 1kΩ, C = 20pF, Figure 8
RPLZ
L
L
t
R = 500Ω, C = 50pF
L L
SHDN
3
_______________________________________________________________________________________
±1ꢀ5k ESDꢁ-rotected, ±±8k Faultꢁ-rotected,
FailꢁSafe RSꢁ4±ꢀ/J178± Transceivers
SWITCHING CHMRMCTERISTICS (ꢀMA1ꢁ33ꢁEꢂ
(V
= +4.75V to +5.25V, T = T
A
to T
, unless otherwise noted. Typical values are at V
= +5V and T = +25°C.)
CC A
CC
MIN
MAX
PMRMꢀETER
SYꢀBOL
CONDITIONS
R = 27Ω, C = 50pF, Figure 3
ꢀIN
TYP
ꢀMA UNITS
t
PLHA,
Driver Propagation Delay
±0
±0
25
ns
ns
ns
L
L
t
PLHB
t
DPLH,
Driver Differential Propagation Delay
R = 54Ω, C = 50pF, Figure 4
L L
t
DPHL
Driver Differential Output
Transition Time
t
,t
R = 54Ω, C = 50pF, Figure 4
L L
LH HL
R = 54Ω, C = 50pF,
L
L
t
t
,
SKEWAB
Driver Output Skew
t
= |t
- t
|,
|
10
10
ns
ns
SKEWAB
SKEWBA
PLHA PHLB
SKEWBA
t
= |t
- t
PLHB PHLA
R = 54Ω, C = 50pF,
L
L
Differential Driver Output Skew
t
DSKEW
t
= |t
- t
|
DSKEW
DPLH DPHL
Maximum Data Rate
f
10
Mbps
ns
MAX
Driver Enable Time to Output High
t
R = 500Ω, C = 50pF, Figure 5
1200
1200
PDZH
PDHZ
L
L
Driver Disable Time from Output High
t
R = 500Ω, C = 50pF, Figure 5
ns
L
L
Driver Enable Time from Shutdown to
Output High
t
R = 500Ω, C = 50pF, Figure 5
4.2
µs
PDHS
L
L
Driver Enable Time to Output Low
Driver Disable Time from Output Low
t
t
R = 500Ω, C = 50pF, Figure ±
1200
1200
ns
ns
PDZL
PDLZ
L
L
R = 500Ω, C = 50pF, Figure ±
L
L
Driver Enable Time from Shutdown to
Output Low
t
R = 500Ω, C = 50pF, Figure ±
4.2
µs
ns
PDLS
L
L
Driver Time to Shutdown
t
R = 500Ω, C = 50pF, Figure ±
800
SHDN
L
L
t
t
,
RPLH
Receiver Propagation Delay
C = 20pF, V = 2V, V
= 0V, Figure 7
85
ns
L
ID
CM
RPHL
Receiver Output Skew
t
C = 20pF, t
= |t - t |
RPLH RPHL
15
ns
ns
ns
µs
RSKEW
L
RSKEW
Receiver Enable Time to Output High
Receiver Disable Time from Output High
Receiver Wake Time from Shutdown
t
t
R = 1kΩ, C = 20pF, Figure 8
400
400
4.2
RPZH
RPHZ
L
L
R = 1kΩ, C = 20pF, Figure 8
L
L
t
R = 1kΩ, C = 20pF, Figure 8
L L
RPWAKE
Receiver Enable Wake Time from
Shutdown
t
R = 1kΩ, C = 20pF, Figure 8
400
ns
RPSH
L
L
Receiver Disable Time from Output Low
Receiver Time to Shutdown
t
R = 1kΩ, C = 20pF, Figure 8
400
800
ns
ns
RPLZ
L
L
t
R = 500Ω, C = 50pF
L L
SHDN
Note 2: ΔV
and ΔV
are the changes in V
and V , respectively, when the DI input changes state.
OD
OC
OD OC
Note ꢁ: The short-circuit output current applies to peak current just before foldback current limiting. The short-circuit foldback out-
put current applies during current limiting to allow a recovery from bus contention.
_______________________________________________________________________________________
5
±1ꢀ5k ESDꢁ-rotected, ±±8k Faultꢁ-rotected,
FailꢁSafe RSꢁ4±ꢀ/J178± Transceivers
Typical Operating Characteristics
(V
= +5V, T = +25°C, unless otherwise noted.)
A
CC
NO-LOAD SUPPLY CURRENT
vs. TEMPERATURE
NO-LOAD SUPPLY CURRENT
vs. TEMPERATURE
SHUTDOWN SUPPLY CURRENT
vs. TEMPERATURE
6
5
4
3
2
1
0
24
20
16
12
8
10
1
MAX13442E
DI = DE = GND
DRIVER AND RECEIVER
ENABLED
DRIVER AND RECEIVER
ENABLED
RE = V
CC
0.1
0.01
DRIVER DISABLED,
RECEIVER ENABLED
0.001
0.0001
0.00001
0.000001
DRIVER DISABLED,
RECEIVER ENABLED
4
MAX13443E
MAX13442E/MAX13444E
0
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -20
0
20 40 60 80 100 120
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
RECEIVER OUTPUT CURRENT
vs. OUTPUT-HIGH VOLTAGE
RECEIVER OUTPUT CURRENT
vs. OUTPUT-LOW VOLTAGE
40
35
30
25
20
15
10
5
40
35
30
25
20
15
10
5
0
0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OUTPUT LOW VOLTAGE (V)
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
OUTPUT LOW VOLTAGE (V)
DRIVER OUTPUT CURRENT
vs. DIFFERENTIAL OUTPUT VOLTAGE
RECEIVER OUTPUT VOLTAGE
vs. TEMPERATURE
5.0
R = 54Ω
MAX13442E
DI = GND, DE = V
VOLTAGE APPLIED
TO OUTPUT A
L
140
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
,
CC
120
100
V
, I
= 10mA
OH OUT
80
60
40
20
0
V
, I
= -10mA
OL OUT
10
20
30
40
50
60
70
80
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
DIFFERENTIAL OUTPUT VOLTAGE (V)
±
_______________________________________________________________________________________
±1ꢀ5k ESDꢁ-rotected, ±±8k Faultꢁ-rotected,
FailꢁSafe RSꢁ4±ꢀ/J178± Transceivers
Typical Operating Characteristics (continued)
(V
= +5V, T = +25°C, unless otherwise noted.)
A
CC
DIFFERENTIAL OUTPUT VOLTAGE
vs. TEMPERATURE
DRIVER OUTPUT CURRENT
vs. DIFFERENTIAL OUTPUT VOLTAGE
100
90
80
70
60
50
40
30
20
10
0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
R = 54Ω
L
MAX13442E
R = 100Ω
L
DI = GND, DE = V
,
CC
VOLTAGE APPLIED
TO OUTPUT B
R = 54Ω
L
MAX13442E
-40 -25 -10
5
20 35 50 65 80 95 110 125
-80
-65
-50
-35
-20
-5
TEMPERATURE (°C)
DIFFERENTIAL OUTPUT VOLTAGE (V)
A, B CURRENT vs. A, B
VOLTAGE (TO GROUND)
DIFFERENTIAL OUTPUT VOLTAGE
vs. TEMPERATURE
3200
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
DRIVER DISABLED,
RECEIVER ENABLED
2800
2400
2000
1600
1200
800
RL = 100Ω
RL = 54Ω
400
0
-400
-800
-1200
NO LOAD
R = 54Ω
L
-1600
-2000
MAX13442E
MAX13443E
0
80
-60 -40 -20
20 40 60
-80
-40 -25 -10
5
20 35 50 65 80 95 110 125
A, B VOLTAGE (V)
TEMPERATURE (°C)
A, B CURRENT vs. A, B VOLTAGE
(TO GROUND)
2000
1600
1200
800
DRIVER DISABLED,
RECEIVER ENABLED
400
0
NO LOAD
-400
-800
-1200
-1600
-2000
R = 54Ω
L
MAX13443E
-60 -50 -40 -30 -20 -10
0 10 20 30 40 50 60
A, B VOLTAGE (V)
_______________________________________________________________________________________
7
±1ꢀ5k ESDꢁ-rotected, ±±8k Faultꢁ-rotected,
FailꢁSafe RSꢁ4±ꢀ/J178± Transceivers
Test Circuits and Waveforms
R
L
2
A
B
V
OD
DI
D
R
L
V
OC
V
2
CC
Figure 1. Driver V
and V
OC
OD
A
ID
B
RO
V
R
0
V
V
OH
I
I
OH
OL
OL
(+)
(-)
Figure 2. Receiver V
and V
OH
OL
3V
0V
V
OM
DI
1.5V
1.5V
R
L
A
B
2
S1
t
t
PHLA
DI
D
PLHA
OUT
V
V
OH
OL
GENERATOR
(NOTE 4)
50Ω
C = 50pF
L
(NOTE 5)
V
V
OM
OM
t
A
B
V
CC
t
PHLB
PLHB
V
+ V
2
OH
OL
V
=
≈ 1.5V
OM
V
V
OH
OL
V
V
OM
OM
Figure 3. Driver Propagation Times
3V
1.5V
1.5V
DPLH
DI
A
C
L
L
0V
DI
D
OUT
t
DPHL
t
R
L
GENERATOR
(NOTE 4)
B
50Ω
≈ 2.0V
90%
90%
V
CC
50%
10%
50%
10%
C
(A–B)
≈ -2.0V
C = 50pF (NOTE 5)
L
t
t
HL
LH
Figure 4. Driver Differential Output Delay and Transition Times
_______________________________________________________________________________________
8
±1ꢀ5k ESDꢁ-rotected, ±±8k Faultꢁ-rotected,
FailꢁSafe RSꢁ4±ꢀ/J178± Transceivers
Test Circuits and Waveforms (continued)
3V
A
B
S1
DI
A, B
0 OR 3V
D
DE
1.5V
1.5V
PDZH
t
0V
V
DE
R = 500Ω
L
t
t
PDHZ
PDHS
C = 50pF
L
(NOTE 5)
GENERATOR
(NOTE 4)
50Ω
OH
0.25V
A, B
V
OM
V
+ V
2
OH
OL
V
=
≈ 1.5V
OM
0V
Figure 5. Driver Enable and Disable Times
V
CC
3V
R = 500Ω
L
1.5V
1.5V
PDZL
DE
A
S1
t
t
DI
0V
A, B
0 OR 3V
D
t
PDLS
PDLZ
B
DE
C = 50pF
L
(NOTE 5)
V
V
CC
OL
GENERATOR
(NOTE 4)
A, B
V
OM
50Ω
0.25V
Figure 6. Driver Enable and Disable Times
2.0V
A
R
O
V
ID
R
(A–B)
1.0V
1.0V
GENERATOR
(NOTE 4)
50Ω
B
C = 20pF
L
0V
(NOTE 5)
t
t
RPLH
RPHL
V
CC
1.0V
0V
V
V
OM
OM
RO
0V
Figure 7. Receiver Propagation Delay
_______________________________________________________________________________________
9
±1ꢀ5k ESDꢁ-rotected, ±±8k Faultꢁ-rotected,
FailꢁSafe RSꢁ4±ꢀ/J178± Transceivers
Test Circuits and Waveforms (continued)
S1
S3
+1.5V
A
B
V
CC
1kΩ
R
O
-1.5V
V
ID
R
S2
C = 20pF
L
(NOTE 5)
GENERATOR
(NOTE 4)
50Ω
3V
0V
3V
0V
S1 OPEN
S2 CLOSED
S3 = 1.5V
S1 CLOSED
S2 OPEN
S3 = -1.5V
RE
RE
RO
RE
RO
1.5V
1.5V
t
RPZH
t
t
RPZL
RPSL
t
t
RPSH
RPWAKE
V
OH
V
V
CC
RO
1.5V
1.5V
0V
3V
OL
3V
0V
S1 OPEN
S2 CLOSED
S3 = 1.5V
S1 CLOSED
S2 OPEN
S3 = -1.5V
RE
1.5V
1.5V
0V
t
RPHZ
t
RPLZ
V
OH
V
V
CC
OL
RO
0.5V
0.5V
0V
Figure 8. Receiver Enable and Disable Times
Note 3: The input pulse is supplied by a generator with the following characteristics: f = 5MHz, 50% duty cycle; t ≤ ±ns; Z = 50Ω.
0
r
Note 5: C includes probe and stray capacitance.
L
10 ______________________________________________________________________________________
±1ꢀ5k ESDꢁ-rotected, ±±8k Faultꢁ-rotected,
FailꢁSafe RSꢁ4±ꢀ/J178± Transceivers
-in Description
PIN
NMꢀE
FUNCTION
ꢀMA1ꢁ332E
ꢀMA1ꢁ33ꢁE
ꢀMA1ꢁ333E
Receiver Output. If the receiver is enabled and (A - B) ≥
-50mV, RO = high; if (A - B) ≤ -200mV, RO = low.
1
2
1
2
RO
RE
Receiver Output Enable. Pull RE low to enable RO.
Driver Output Enable. Force DE high to enable driver. Pull
DE low to tri-state the driver output. Drive RE high and pull
DE low to enter low-power shutdown mode.
3
—
DE
Driver Input. A logic low on DI forces the noninverting
output low and the inverting output high. A logic high on
DI forces the noninverting output high and the inverting
output low.
4
—
DI
5
±
7
5
±
7
GND
A
Ground
Noninverting Receiver Input/Driver Output
Inverting Receiver Input/Driver Output
B
Positive Supply, V
= +4.75V to +5.25V. For normal
CC
operation, bypass V
capacitor. For full ESD protection, bypass V
1µF ceramic capacitor.
to GND with a 0.1µF ceramic
CC
8
8
V
CC
to GND with
CC
Driver Output Enable. Pull DE low to enable the outputs.
Force DE high to tri-state the outputs. Drive RE and DE high
to enter low-power shutdown mode.
—
—
3
4
DE
J1708 Input. A logic low on TXD forces outputs A and B to
the dominant state. A logic high on TXD forces outputs A
and B to the recessive state.
TXD
______________________________________________________________________________________ 11
±1ꢀ5k ESDꢁ-rotected, ±±8k Faultꢁ-rotected,
FailꢁSafe RSꢁ4±ꢀ/J178± Transceivers
Function Tables
Table 1. ꢀMA1ꢁ332E/ꢀMA1ꢁ33ꢁE
(RS-385/RS-322ꢂ
Table ꢁ. ꢀMA1ꢁ332E/ꢀMA1ꢁ33ꢁE
(RS-385/RS-322ꢂ
TRMNSꢀITTING
RECEIVING
INPUTS
INPUTS
OUTPUTS
OUTPUTS
RE
0
DE
0
DI
X
0
M
B
RE
0
DE
X
(M - Bꢂ
RO
High-Z
High-Z
≥-0.05V
1
0
1
0
1
1
0
0
X
≤-0.2V
0
1
0
1
1
0
X
Open/shorted
1
0
X
0
Shutdown Shutdown
1
1
X
X
High-Z
Shutdown
1
1
0
1
1
0
1
0
1
1
1
X = Don’t care.
X = Don’t care.
Table 2. ꢀMA1ꢁ333E (J1708ꢂ Mpplication
Table 3. ꢀMA1ꢁ333E (RS-385/RS-322ꢂ
TRMNSꢀITTING
RECEIVING
INPUTS
OUTPUTS
CONDITIONS
INPUTS
OUTPUTS
TAD
DE
1
M
B
—
RE
0
DE
X
(M - Bꢂ
RO
0
1
0
1
High-Z
High-Z
1
High-Z
High-Z
0
—
≥-0.05V
1
1
—
0
X
≤-0.2V
0
1
0
Dominant state
Recessive state
0
X
Open/shorted
0
High-Z
High-Z
1
0
X
X
High-Z
Shutdown
1
1
X = Don’t care.
12 ______________________________________________________________________________________
±1ꢀ5k ESDꢁ-rotected, ±±8k Faultꢁ-rotected,
FailꢁSafe RSꢁ4±ꢀ/J178± Transceivers
ver outputs/receiver inputs of the MAX13442E/
Detailed Description
MAX13444E withstand voltage faults up to 80V (±±0V
The MAX13442E/MAX13443E/MAX13444E fault-protect-
for the MAX13443E) with respect to ground without dam-
ed transceivers for RS-485/RS-422 and J1708 communi-
age. Protection is guaranteed regardless whether the
cation contain one driver and one receiver. These
device is active, shut down, or without power.
devices feature fail-safe circuitry, which guarantees a
logic-high receiver output when the receiver inputs are
open or shorted, or when they are connected to a termi-
nated transmission line with all drivers disabled (see the
True Fail-Safe section). All devices have a hot-swap input
structure that prevents disturbances on the differential
signal lines when a circuit board is plugged into a hot
backplane (see the Hot-Swap Capability section). The
MAX13442E/MAX13444E feature a reduced slew-rate dri-
ver that minimizes EMI and reduces reflections caused
by improperly terminated cables, allowing error-free data
transmission up to 250kbps (see the Reduced EMI and
Reflections section). The MAX13443E driver is not slew-
rate limited, allowing transmit speeds up to 10Mbps.
True FailꢁSafe
The MAX13442E/MAX13443E/MAX13444E use a
-50mV to -200mV differential input threshold to ensure
true fail-safe receiver inputs. This threshold guarantees
the receiver outputs a logic high for shorted, open, or
idle data lines. The -50mV to -200mV threshold com-
plies with the ±200mV threshold EIA/TIA-485 standard.
±1ꢀ5k ESD -rotection
As with all Maxim devices, ESD-protection structures
are incorporated on all pins to protect against ESD
encountered during handling and assembly. The
MAX13442E/MAX13443E/MAX13444E receiver inputs/
driver outputs (A, B) have extra protection against stat-
ic electricity found in normal operation. Maxim’s engi-
neers have developed state-of-the-art structures to
protect these pins against ±15kV ESD without damage.
After an ESD event, the MAX13442E/MAX13443E/
MAX13444E continue working without latchup.
Driver
The driver accepts a single-ended, logic-level input
(DI) and transfers it to a differential, RS-485/RS-422
level output (A and B). Deasserting the driver enable
places the driver outputs (A and B) into a high-imped-
ance state.
ESD protection can be tested in several ways. The
receiver inputs are characterized for protection to
±15kV using the Human Body Model.
Receiver
The receiver accepts a differential, RS-485/RS-422
level input (A and B), and transfers it to a single-ended,
logic-level output (RO). Deasserting the receiver enable
places the receiver inputs (A and B) into a high-imped-
ance state (see Tables 1–4).
ESD Test Conditions
ESD performance depends on a number of conditions.
Contact Maxim for a reliability report that documents
test setup, methodology, and results.
Lowꢁ-ower Shutdown
The MAX13442E/MAX13443E/MAX13444E offer a low-
power shutdown mode. Force DE low and RE high to
shut down the MAX13442E/MAX13443E. Force DE and
RE high to shut down the MAX13444E. A time delay of
50ns prevents the device from accidentally entering
shutdown due to logic skews when switching between
transmit and receive modes. Holding DE low and RE
high for at least 800ns guarantees that the
MAX13442E/MAX13443E enter shutdown. In shutdown,
the devices consume a maximum 20µA supply current.
Human Body Model
Figure 9a shows the Human Body Model, and Figure
9b shows the current waveform it generates when dis-
charged into a low impedance. This model consists of
a 100pF capacitor charged to the ESD voltage of inter-
est, which is then discharged into the device through a
1.5kΩ resistor.
Driver Output -rotection
Two mechanisms prevent excessive output current and
power dissipation caused by faults or bus contention.
The first, a foldback current limit on the driver output
stage, provides immediate protection against short cir-
cuits over the whole common-mode voltage range. The
second, a thermal shutdown circuit, forces the driver out-
puts into a high-impedance state if the die temperature
exceeds +1±0°C. Normal operation resumes when the
die temperature cools to +140°C, resulting in a pulsed
output during continuous short-circuit conditions.
±8k Fault -rotection
The driver outputs/receiver inputs of RS-485 devices in
industrial network applications often experience voltage
faults resulting from shorts to the power grid that exceed
the -7V to +12V range specified in the EIA/TIA-485 stan-
dard. In these applications, ordinary RS-485 devices
(typical absolute maximum -8V to +12.5V) require costly
external protection devices. To reduce system complexi-
ty and eliminate this need for external protection, the dri-
______________________________________________________________________________________ 1ꢁ
±1ꢀ5k ESDꢁ-rotected, ±±8k Faultꢁ-rotected,
FailꢁSafe RSꢁ4±ꢀ/J178± Transceivers
Hot-Swap Input Circuitry
At the driver-enable input (DE), there are two NMOS
devices, M1 and M2 (Figure 10). When V ramps from
HotꢁSwap Capability
Hot-Swap Inputs
Inserting circuit boards into a hot, or powered, back-
plane may cause voltage transients on DE, RE, and
receiver inputs A and B that can lead to data errors. For
example, upon initial circuit board insertion, the proces-
sor undergoes a power-up sequence. During this period,
the high-impedance state of the output drivers makes
them unable to drive the MAX13442E/MAX13443E/
MAX13444E enable inputs to a defined logic level.
Meanwhile, leakage currents of up to 10µA from the
high-impedance output, or capacitively coupled noise
CC
zero, an internal 15µs timer turns on M2 and sets the
SR latch, which also turns on M1. Transistors M2, a
2mA current sink, and M1, a 100µA current sink, pull
DE to GND through a 5.±kΩ resistor. M2 pulls DE to the
disabled state against an external parasitic capaci-
tance up to 100pF that may drive DE high. After 15µs,
the timer deactivates M2 while M1 remains on, holding
DE low against tri-state leakage currents that may drive
DE high. M1 remains on until an external current source
overcomes the required input current. At this time, the
SR latch resets M1 and turns off. When M1 turns off, DE
reverts to a standard, high-impedance CMOS input.
from V
or GND, could cause an input to drift to an
CC
incorrect logic state. To prevent such a condition from
occurring, the MAX13442E/MAX13443E/MAX13444E
feature hot-swap input circuitry on DE, and RE to guard
against unwanted driver activation during hot-swap sit-
uations. The MAX13444E has hot-swap input circuitry
Whenever V
drops below 1V, the input is reset.
CC
A complementary circuit for RE uses two PMOS
devices to pull RE to V
.
CC
only on RE. When V
rises, an internal pulldown (or
CC
pullup for RE) circuit holds DE low for at least 10µs, and
until the current into DE exceeds 200µA. After the initial
power-up sequence, the pulldown circuit becomes
transparent, resetting the hot-swap tolerable input.
R
R
D
C
1.5k
1M
V
CC
DISCHARGE
RESISTANCE
CHARGE-CURRENT-
LIMIT RESISTOR
15μs
TIMER
HIGH-
VOLTAGE
DC
DEVICE
UNDER
TEST
C
100pF
STORAGE
CAPACITOR
s
TIMER
SOURCE
Figure 9a. Human Body ESD Test Model
5.6kΩ
DE
(HOT SWAP)
I
100%
90%
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
I
P
r
2mA
100μA
M1
M2
AMPERES
36.8%
10%
0
Figure 10. Simplified Structure of the Driver Enable Pin (DE)
TIME
0
t
RL
t
DL
CURRENT WAVEFORM
Figure 9b. Human Body Model Current Waveform
13 ______________________________________________________________________________________
±1ꢀ5k ESDꢁ-rotected, ±±8k Faultꢁ-rotected,
FailꢁSafe RSꢁ4±ꢀ/J178± Transceivers
In general, a transmitter’s rise time relates directly to
the length of an unterminated stub, which can be driven
Applications Information
12± Transceivers on the Bus
The MAX13442E/MAX13443E/MAX13444E transceivers
1/4-unit-load receiver input impedance (48kΩ) allows
up to 128 transceivers connected in parallel on one
communication line. Connect any combination of these
devices, and/or other RS-485 devices, for a maximum
of 32-unit loads to the line.
with only minor waveform reflections. The following
equation expresses this relationship conservatively:
length = t
/ (10 x 1.5ns/ft)
RISE
where t
is the transmitter’s rise time.
RISE
For example, the MAX13442E’s rise time is typically
800ns, which results in excellent waveforms with a stub
length up to 53ft. A system can work well with longer
unterminated stubs, even with severe reflections, if the
waveform settles out before the UART samples them.
Reduced EMI and Reflections
The MAX13442E/MAX13444E are slew-rate limited,
minimizing EMI and reducing reflections caused by
improperly terminated cables. Figure 11 shows the dri-
ver output waveform and its Fourier analysis of a
125kHz signal transmitted by a MAX13443E. High-fre-
quency harmonic components with large amplitudes
are evident.
RSꢁ4±ꢀ Applications
The MAX13442E/MAX13443E/MAX13444E transceivers
provide bidirectional data communications on multi-
point bus transmission lines. Figure 13 shows a typical
network application circuit. The RS-485 standard cov-
ers line lengths up to 4000ft. To minimize reflections
and reduce data errors, terminate the signal line at both
ends in its characteristic impedance, and keep stub
lengths off the main line as short as possible.
Figure 12 shows the same signal displayed for the
MAX13442E transmitting under the same conditions.
Figure 12’s high-frequency harmonic components are
much lower in amplitude, compared with Figure 11’s,
and the potential for EMI is significantly reduced.
20dB/div
2V/div
20dB/div
2V/div
0
500kHz/div
5.00MHz
0
500kHz/div
5.00MHz
Figure 11. Driver Output Waveform and FFT Plot of the
MAX13443E Transmitting a 125kHz Signal
Figure 12. Driver Output Waveform and FFT Plot of the
MAX13442E Transmitting a 125kHz Signal
______________________________________________________________________________________ 15
±1ꢀ5k ESDꢁ-rotected, ±±8k Faultꢁ-rotected,
FailꢁSafe RSꢁ4±ꢀ/J178± Transceivers
idle in this configuration, all receivers output logic high
because of the pullup resistor on A and pulldown resistor
on B. R1 and R2 provide the bias for the recessive state.
C1 and C2 combine to form a lowpass filter, effective for
reducing FM interference. R2, C1, R4, and C2 combine
to form a 1.±MHz lowpass filter, effective for reducing
AM interference. Because the bus is unterminated, at
high frequencies, R3 and R4 perform a pseudotermina-
tion. This makes the implementation more flexible, as no
specific termination nodes are required at the ends of
the bus.
J178± Applications
The MAX13444E is designed for J1708 applications. To
configure the MAX13444E, connect DE and RE to GND.
Connect the signal to be transmitted to TXD. Terminate
the bus with the load circuit as shown in Figure 14. The
drivers used by SAE J1708 are used in a dominant-
mode application. DE is active low; a high input on DE
places the outputs in high impedance. When the driver is
disabled (TXD high or DE high), the bus is pulled high by
external bias resistors R1 and R2. Therefore, a logic-level
high is encoded as recessive. When all transceivers are
120Ω
120Ω
DE
B
B
DI
D
D
DI
DE
A
A
B
A
B
A
RO
RE
RO
RE
R
R
R
R
D
D
MAX13442E
MAX13443E
DE
DI
DI
RO
DE
RO
RE
RE
Figure 13. MAX13442E/MAX13443E Typical RS-485 Network
1± ______________________________________________________________________________________
±1ꢀ5k ESDꢁ-rotected, ±±8k Faultꢁ-rotected,
FailꢁSafe RSꢁ4±ꢀ/J178± Transceivers
Chip Information
TRANSISTOR COUNT: 310
DE
PROCESS: BiCMOS
R1
4.7kΩ
R3
T
X
D
TXD
47Ω
B
A
C1
2.2nF
J1708 BUS
C2
MAX13444E
2.2nF
R4
47Ω
R2
4.7kΩ
R
X
R
RO
V
CC
RE
Figure 14. J1708 Application Circuit (See Tables 2 and 4)
-in Configurations and Typical Operating Circuits (continued)
DE
MAX13444E
V
1
2
3
8
7
6
RO
RE
DE
CC
R
R
V
RO
1
2
3
4
8
7
6
5
CC
D
TXD
RO
B
B
A
B
RE
DE
R
T
R
T
A
A
GND
R
4
TXD
GND
D
5
D
TXD
RE
SO
SO
______________________________________________________________________________________ 17
±1ꢀ5k ESDꢁ-rotected, ±±8k Faultꢁ-rotected,
FailꢁSafe RSꢁ4±ꢀ/J178± Transceivers
-ac5age Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
INCHES
MILLIMETERS
MAX
MAX
1.75
0.25
0.49
0.25
DIM
A
MIN
MIN
1.35
0.10
0.35
0.19
0.053
0.004
0.014
0.007
0.069
0.010
0.019
0.010
N
A1
B
C
e
0.050 BSC
1.27 BSC
E
0.150
0.228
0.016
0.157
0.244
0.050
3.80
5.80
0.40
4.00
6.20
1.27
E
H
H
L
VARIATIONS:
INCHES
1
MILLIMETERS
MAX
0.197
0.344
0.394
MAX
5.00
DIM
D
MIN
MIN
4.80
8.55
9.80
N
8
MS012
AA
TOP VIEW
0.189
0.337
0.386
D
8.75 14
10.00 16
AB
D
AC
D
C
A
B
0∞-8∞
e
A1
L
FRONT VIEW
SIDE VIEW
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, .150" SOIC
APPROVAL
DOCUMENT CONTROL NO.
REV.
1
21-0041
B
1
Revision History
Pages changed at Rev 1: 1, 2, 7, 18
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
18 ____________________Maxim Integrated -roducts, 128 San Gabriel Drive, Sunnyvale, CA 948±6 48±ꢁ737ꢁ7688
© 200± Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
Boblet
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