MAX14566BEETA [MAXIM]

USB Host Charger Identification Analog Switches 2mm x 2mm, 8-Pin TDFN Package; USB主机充电器识别模拟开关采用2mm x 2mm , 8引脚TDFN封装
MAX14566BEETA
型号: MAX14566BEETA
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

USB Host Charger Identification Analog Switches 2mm x 2mm, 8-Pin TDFN Package
USB主机充电器识别模拟开关采用2mm x 2mm , 8引脚TDFN封装

开关
文件: 总15页 (文件大小:1596K)
中文:  中文翻译
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19-5293; Rev 1; 3/11  
USB Host Charger Identification  
Analog Switches  
General Description  
Features  
The MAX14566E/MAX14566AE/MAX14566BE are sec-  
ond-generation USB devices that combine Hi-Speed  
USB analog switches with a USB host charger (dedicated  
charger) identification circuit. These devices support both  
the latest USB Battery Charging Specification Revision 1.2  
including data contact detection and a set resistor bias  
for Apple-compliant devices as well as legacy USB D+/D-  
short detection using data line pullup. The MAX14566E  
has a pMOSFET open-drain control output (CEN) and the  
MAX14566AE has an nMOSFET open-drain control output  
(CEN) to restart the peripheral connected to the USB host.  
S Hi-Speed USB Switching  
S Low 4.0pF (typ) On-Capacitance  
S Low 4.0I (typ) On-Resistance  
S Ultra-Low 0.1I (typ) On-Resistance Flatness  
S +2.8V to +5.5V Supply Range  
S Ultra-Low 3µA (typ) Supply Current  
S Automatic Current-Limit Switch Control  
S Automatic USB Charger Identification Circuit  
S
15ꢀV High ESD HBM Protection On DP/DM  
These devices feature high-performance Hi-Speed USB  
switches with low 4pF (typ) on-capacitance and low 4.0I  
(typ) on-resistance. In addition, the devices feature a  
single digital input (CB) to switch between pass-through  
mode and autodetection charger mode. The USB host  
charger identification circuit allows a host USB port to  
support USB chargers with shorted DP/DM detection  
and to provide support for Apple-compliant devices  
using a resistor bias on USB data lines. When an Apple-  
compliant device is attached to the port in autodetection  
charger mode, the devices supply the voltage to the DP  
and DM lines from the internal resistor-divider. If a USB  
Revision 1.2-compliant device is attached, the devices  
short DP and DM to allow correct charger detection. The  
MAX14566BE features an additional digital input (CB1)  
to allow forced charger mode.  
S 2mm x 2mm, 8-Pin TDFN Pacꢀage  
S -40NC to +85NC Operating Temperature Range  
Applications  
Laptops  
Netbooks  
M
M
Universal Charger including iPod /iPhone Chargers  
Ordering Information/  
Selector Guide  
PIN-  
PACKAGE  
CLS  
TOP  
PART  
CONTROL MARK  
MAX14566EETA+  
8 TDFN-EP*  
ADJ  
ADK  
BMR  
CEN  
CEN  
MAX14566AEETA+ 8 TDFN-EP*  
MAX14566BEETA+ 8 TDFN-EP*  
These devices have enhanced, high electrostatic dis-  
charge (ESD) protection on the DP and DM inputs up  
to Q15kV Human Body Model (HBM). All the devices  
are available in an 8-pin (2mm x 2mm) TDFN package,  
and are specified over the -40NC to +85NC extended  
temperature range.  
Note: All devices are specified over the -40°C to +85°C oper-  
ating temperature range.  
+Denotes a lead(Pb)-free/RoHS-compliant package.  
*EP = Exposed pad.  
Typical Operating Circuit  
EXTERNAL  
POWER SUPPLY  
5V SWITCHING  
POWER SUPPLY  
OVERCURRENT PROTECTOR  
CEN  
APPLE  
DOCK OR iPhone  
iPod  
APPLE DOCK  
CONNECTOR  
USB A  
Li+  
BATTERY  
PHONE OR MP3  
PLAYER  
V
BUS  
LAPTOP CHIPSET  
CEN  
D-  
TDM  
DM  
DP  
USB  
TRANSCEIVER  
USB  
A CONNECTOR  
MAX14566E  
MICRO-USB  
CONNECTOR  
D+  
USB A  
MICRO B  
TDP  
GND  
STANDBY  
CB  
iPhone and iPod are registered trademarks of Apple, Inc.  
_______________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,  
or visit Maxim’s website at www.maxim-ic.com.  
USB Host Charger Identification  
Analog Switches  
ABSOLUTE MAXIMUM RATINGS  
(All voltages referenced to GND.)  
Operating Temperature Range.......................... -40NC to +85NC  
V
, TDP, TDM, CB, DP, DM, CEN/CEN, CB1....-0.3V to +6.0V  
Junction Temperature .....................................................+150NC  
Storage Temperature Range............................ -65NC to +150NC  
Lead Temperature (soldering, 10s) ................................+300NC  
Soldering Temperature (reflow) ......................................+260NC  
CC  
Continuous Current into any Terminal............................. Q30mA  
Continuous Power Dissipation (T = +70NC)  
A
TDFN (derate 11.9mW/NC above +70NC) ....................954mW  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional  
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect device reliability.  
PACKAGE THERMAL CHARACTERISTICS (Note 1)  
TDFN  
Junction-to-Ambient Thermal Resistance (q )...........84°C/W  
JA  
Junction-to-Case Thermal Resistance (q )................37°C/W  
JC  
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-  
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.  
ELECTRICAL CHARACTERISTICS  
(V  
CC  
= 2.8V to 5.5V, T = T  
A
to T  
unless otherwise noted. Typical values are at V = 5.0V, T = +25NC.) (Note 2)  
CC A  
MIN  
MAX,  
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
POWER SUPPLY (MAX14566E/MAX14566AE)  
V
V
> V  
2.8  
5.5  
5.25  
2
V
V
CB  
IH  
Power-Supply Range  
Supply Current  
V
CC  
= 0V (Note 3)  
4.75  
CB  
V
V
V
V
= 3.3V  
CC  
CC  
CC  
CC  
V
= V  
CB  
CB  
CC  
= 5.5V  
7
I
FA  
FA  
CC  
= 4.75V  
= 5.25V  
110  
120  
200  
200  
2
V
= 0V  
Supply Current Increase  
DI  
0 P V P V or V P V P V  
CC  
CB  
IL  
IH  
CB  
CC  
POWER SUPPLY (MAX14566BE)  
V
CB  
= V and V  
= V or V = V  
CB1 CC CB CC  
CC  
and V  
= 0V or V = 0V and  
2.8  
5.5  
V
V
CB1  
CB  
Power-Supply Range  
Supply Current  
V
CC  
V
CB1  
= V  
CC  
V
CB  
= 0V and V  
= 0V (Note 3)  
4.75  
5.25  
2
CB1  
V
V
V
V
= V and  
CC  
CB  
V
V
= 3.3V  
= 5.5V  
CC  
= V  
or  
CB1  
CC  
= V and  
CB  
CC  
7
CC  
= 0V  
CB1  
I
CC  
mA  
mA  
V
V
= 4.75V  
= 5.25V  
110  
120  
200  
200  
V
V
= 0V and  
CC  
CB  
= 0V  
CB1  
CC  
V
V
= 0V and  
V
V
= 5.0V for TYP  
= 5.5V for MAX  
CB  
CC  
3
1
1
7
= V  
CB1  
CC  
CC  
V
= 0V; 0 ≤ V ≤ V  
CB IL  
CB1  
and V ≤ V  
≤ V  
(Note 4)  
IH  
CB  
CC  
Supply Current Increase  
DI  
CC  
V
= 0V; 0 ≤ V  
≤ V  
CB  
CB1  
IL  
and V ≤ V  
≤ V (Note 4)  
CC  
IH  
CB1  
2
USB Host Charger Identification  
Analog Switches  
ELECTRICAL CHARACTERISTICS (continued)  
(V  
CC  
= 2.8V to 5.5V, T = T  
A
to T  
, unless otherwise noted. Typical values are at V  
= 5.0V, T = +25NC.) (Note 2)  
CC A  
MIN  
MAX  
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
ANALOG SWITCH  
Analog-Signal Range  
V ,V  
DP DM  
0
V
CC  
V
On-Resistance TDP/TDM Switch  
R
V
V
= V  
= 0V to V , I = I  
= 10mA  
4.0  
0.1  
6.5  
I
ON  
DP  
DM  
CC DP  
DM  
On-Resistance Match Between  
Channels TDP/TDM Switch  
= 5.0V, V = V  
= 400mV,  
CC  
DP  
DM  
DR  
I
ON  
I
= I  
DM  
= 10mA  
DP  
On-Resistance Flatness TDP/  
TDM Switch  
V
= 5.0V, V = V  
= 0 to V  
,
CC  
DP  
DM  
CC  
R
0.1  
40  
I
I
FLAT  
I
= I  
DM  
= 10mA  
DP  
On-Resistance of DP/DM Short  
R
V
CB  
= 0V, V = 1V, I = I = 10mA  
DM  
70  
SHORT  
DP  
DP  
I
I
V
V
= 3.6V, V = V  
= 0.3V to 3.3V,  
TDPOFF,  
CC  
DP  
DM  
Off-Leakage Current  
-250  
-250  
+250  
nA  
= V = 3.3V to 0.3V, V = 0V  
TDM CB  
TDMOFF  
TDP  
V
V
= 3.6V, V = V  
= 3.3V to 0.3V,  
CC  
DP  
DM  
On-Leakage Current  
DYNAMIC PERFORMANCE  
Turn-On Time  
I
,I  
+250  
nA  
DPON DMON  
= V  
CB  
CC  
V
TDP  
or V = 1.5V, R = 300I,  
TDM L  
t
20  
1
100  
5
Fs  
Fs  
ps  
ON  
C = 35pF, Figure 1  
L
V
TDP  
or V = 1.5V, R = 300I,  
TDM L  
Turn-Off Time  
t
OFF  
C = 35pF, Figure 1  
L
TDP, TDM Switch Propagation  
Delay  
t
, t  
R = R = 50I  
60  
PLH PHL  
L
S
Skew between DP and DM when  
connected to TDP and TDM,  
Output Skew  
t
40  
ps  
SK(O)  
R = R = 50I, Figure 2  
L
S
TDP, TDM Off-Capacitance  
C
f = 1MHz  
2.0  
4.0  
pF  
pF  
OFF  
DP, DM On-Capacitance  
(Connected to TDP, TDM)  
C
f = 240MHz  
5.5  
ON  
-3dB Bandwidth  
BW  
R = R = 50I (Note 4)  
1000  
-20  
MHz  
dB  
L
S
V , V = 0dBm, R = R = 50I,  
TDP DP L S  
Off-Isolation  
V
ISO  
f = 250MHz, Figure 3 (Note 4)  
V
, V = 0dBm, R = R = 50I,  
TDP DP  
L
S
Crosstalk  
V
CT  
-25  
dB  
f = 250MHz, Figure 3 (Note 4)  
INTERNAL RESISTORS  
DP/DM Short Pulldown  
RP1/RP2 Ratio  
R
335  
1.485  
95  
500  
1.5  
710  
1.515  
176  
kI  
Ratio  
kI  
PD  
RT  
RP  
RP1 + RP2 Resistance  
RM1/RM2 Ratio  
R
126  
0.85  
94  
RP  
RT  
0.843  
70  
0.865  
132  
Ratio  
kI  
RM  
RM  
RM1 + RM2 Resistance  
COMPARATORS  
R
DM1 Comparator Threshold  
DM1 Comparator Hysteresis  
DM2 Comparator Threshold  
DM2 Comparator Hysteresis  
DP Comparator Threshold  
V
V
DM falling  
DM falling  
DP rising  
45  
6.31  
45  
46  
1
47  
7.6  
47  
%V  
DM1F  
CC  
CC  
CC  
%
7
%V  
DM2F  
1
%
V
46  
%V  
DPR  
3
USB Host Charger Identification  
Analog Switches  
ELECTRICAL CHARACTERISTICS (continued)  
(V  
CC  
= 2.8V to 5.5V, T = T  
A
to T  
, unless otherwise noted. Typical values are at V  
= 5.0V, T = +25NC.) (Note 2)  
CC A  
MIN  
MAX  
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
DP Comparator Hysteresis  
LOGIC INPUT (CB, CB1)  
CB/CB1 Input Logic-High  
CB/CB1 Input Logic-Low  
1
%
V
1.4  
-1  
V
V
IH  
V
0.4  
+1  
IL  
V
= 5.5V, 0V P V P V or  
CB IL  
CB  
CC  
CB/CB1 Input Leakage Current  
I
FA  
IN  
V P V P V  
IH CC  
CEN/CEN OUTPUTS  
V
Toggle Time (MAX14566E/  
BUS  
t
CB = logic 0 to logic 1 or logic 1 to logic 0  
0.5  
1
2
s
V
VBT  
MAX14566AE)  
CB = logic 0 to logic 1, I  
(MAX14566E only)  
= 2mA  
V
CC  
0.4  
-
SOURCE  
CEN Output Logic-High Voltage  
CEN Output Leakage Current  
CEN Output Logic-Low Voltage  
V
CC  
= 5.5V, V  
= 0V, CEN deasserted  
CEN  
1
0.4  
1
FA  
V
(MAX14566E only)  
CB = logic 0 to logic 1, I  
(MAX14566AE only)  
= 2mA  
SINK  
V
CC  
= V  
= 5.5V, CEN deasserted  
CEN  
CEN Output Leakage Current  
FA  
(MAX14566AE only)  
ESD PROTECTION  
ESD Protection Level  
(DP and DM Only)  
V
V
HBM  
HBM  
Q15  
Q2  
kV  
kV  
ESD  
ESD Protection Level  
(All Other Pins)  
ESD  
Note 2: All units are 100% production tested at T = +25NC. Specifications over temperature are guaranteed by design.  
A
Note 3: The part is operational from +2.8V to +5.5V. However, in order to have the valid Apple resistor-divider network, the V  
supply must stay within the range of +4.75V to +5.25V.  
CC  
Note 4: Guaranteed by design.  
Test Circuits/Timing Diagrams  
V
V
CC  
CC  
t < 5ns  
t < 5ns  
f
r
V
IH  
LOGIC  
INPUT  
50%  
MAX14566E  
MAX14566AE  
MAX14566BE  
V
IL  
D_  
TD_  
CB  
t
V
IN  
OFF  
V
OUT  
V
OUT  
R
L
C
L
0.9 x V  
0.9 x V  
0UT  
OUT  
LOGIC  
INPUT  
SWITCH  
OUTPUT  
0V  
GND  
t
ON  
C INCLUDES FIXTURE AND STRAY CAPACITANCE.  
L
IN DEPENDS ON SWITCH CONFIGURATION;  
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.  
R
L
V
= V  
IN  
OUT  
R
+ R  
ON  
L
Figure 1. Switching Time  
4
USB Host Charger Identification  
Analog Switches  
Test Circuits/Timing Diagrams (continued)  
MAX14566E  
MAX14566AE  
MAX14566BE  
R
R
S
TDP  
DP  
IN+  
IN-  
OUT+  
OUT-  
RISE-TIME PROPAGATION DELAY = t  
OR t  
PLHY  
PLHX  
FALL-TIME PROPAGATION DELAY = t  
OR t  
PHLY  
PHLX  
|
|
R
R
L
L
t
t
= |t  
= |t  
- t  
| OR |t  
- t  
- t  
SK(O)  
SK(P)  
PLHX PLHY  
PHLX PHLY  
- t  
| OR |t  
PLHX PHLX  
PLHY PHLY  
S
TDM  
DM  
CB  
V
CC  
t
INFALL  
t
INRISE  
V+  
90%  
90%  
V
IN+  
50%  
50%  
50%  
10%  
10%  
0V  
V+  
V
50%  
IN-  
0V  
V+  
t
t
OUTRISE  
10%  
OUTFALL  
10%  
t
t
PLHX  
PHLX  
90%  
90%  
V
OUT+  
50%  
50%  
0V  
V+  
50%  
50%  
V
OUT-  
0V  
t
t
PHLY  
PLHY  
Figure 2. Output Signal Skew  
5
USB Host Charger Identification  
Analog Switches  
Test Circuits/Timing Diagrams (continued)  
V
V
OUT  
OFF-ISOLATION = 20log  
CROSSTALK = 20log  
V
V
CC  
CC  
NETWORK  
ANALYZER  
IN  
V
OUT  
50  
50Ω  
V
V
0V OR V  
IN  
CC  
CB  
V
TDP  
DP*  
IN  
MAX14566E  
MAX14566AE  
MAX14566BE  
MEAS  
REF  
OUT  
50Ω  
50Ω  
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.  
*FOR CROSSTALK THIS PIN IS DM.  
OFF-ISOLATION IS MEASURED BETWEEN TD_ AND "OFF" D_ TERMINAL ON EACH SWITCH.  
CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL.  
Figure 3. Off-Isolation and Crosstalk  
Typical Operating Characteristics  
(V  
CC  
= 5V, T = +25NC, unless otherwise noted.)  
A
TDP/TDM ON-RESISTANCE  
vs. SUPPLY VOLTAGE  
DP/DM SHORT ON-RESISTANCE  
ON-RESISTANCE vs. V  
TDP/TDM  
vs. SUPPLY VOLTAGE  
5.0  
4.5  
50  
45  
40  
35  
30  
25  
20  
15  
10  
5
V
= 3.3V  
CC  
T
A
= +85°C  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
V
= 2.8V  
CC  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0
V
CC  
= 2.8V  
T
A
= +25°C  
V
CC  
= 5.5V  
V
= 5.5V  
T
A
= -40°C  
CC  
0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0  
(V)  
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0  
(V)  
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0  
(V)  
V
TDP/TDM  
V
V
DP  
TDP  
6
USB Host Charger Identification  
Analog Switches  
Typical Operating Characteristics (continued)  
(V  
CC  
= 5V, T = +25NC, unless otherwise noted.)  
A
SUPPLY CURRENT  
vs. SUPPLY VOLTAGE  
TDP/DP LEAKAGE CURRENT  
vs. TEMPERATURE  
6
5
4
3
2
1
0
45  
40  
35  
30  
25  
20  
15  
10  
5
CB = V  
CC  
V
= 3.6V, V = 3.3V  
TDP  
CC  
T
= -40°C  
A
ON-LEAKAGE  
T
A
= +25°C  
T
A
= +85°C  
OFF-LEAKAGE  
15 30 45 60 75 90  
0
2.8 3.1 3.4 3.7 4.0 4.3 4.6 4.9 5.2 5.5  
(V)  
-45 -30 -15  
0
V
TEMPERATURE (°C)  
CC  
TURN-ON/TURN-OFF TIME  
vs. SUPPLY VOLTAGE  
SUPPLY CURRENT  
vs. LOGIC LEVEL  
160  
140  
120  
100  
80  
24  
22  
20  
18  
16  
14  
12  
10  
8
V
= 5.5V  
CC  
t
ON  
60  
t
OFF  
40  
6
4
20  
2
0
0
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0  
(V)  
0
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3  
LOGIC LEVEL (V)  
V
CC  
LOGIC-INPUT THRESHOLD  
vs. SUPPLY VOLTAGE  
AUTODETECTION MODE  
MAX14566E toc09  
1.2  
1.1  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
V
= 5.0V, DP/DM HIGH IMPEDANCE,  
CB LOGIC 1 TO LOGIC 0  
CC  
CB_RISING  
DP  
1V/div  
DM  
1V/div  
CB_FALLING  
CB  
2V/div  
2.8 3.1 3.4 3.7 4.0 4.3 4.6 4.9 5.2 5.5  
(V)  
10µs/div  
V
CC  
7
USB Host Charger Identification  
Analog Switches  
Typical Operating Characteristics (continued)  
(V  
CC  
= 5V, T = +25NC, unless otherwise noted.)  
A
AUTODETECTION MODE  
AUTO RESET  
MAX14566E toc10  
MAX14566E toc11  
V
= 5.0V, DP/DM HIGH IMPEDANCE TO  
CC  
MAX14566E  
0.5V AT DM  
CEN  
2V/div  
DP  
500mV/div  
0V  
0V  
DM  
500mV/div  
CB  
2V/div  
0V  
0V  
1ms/div  
2s/div  
AUTO RESET  
USB EYE DIAGRAM  
MAX14566E toc12  
MAX14566AE  
0.5  
0.4  
0.3  
CEN  
2V/div  
0.2  
0.1  
HI-SPEED USB TRANSMIT  
TEMPLATE  
0V  
0
-0.1  
-0.2  
-0.3  
-0.4  
-0.5  
CB  
500mV/div  
0V  
2s/div  
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0  
n
TIME (x 10 - 9)s  
8
USB Host Charger Identification  
Analog Switches  
Pin Configuration  
TOP VIEW  
TOP VIEW  
CB TDM TDP  
8
V
CB TDM TDP  
8
V
CC  
5
CC  
5
7
6
7
6
MAX14566E  
MAX14566AE  
MAX14566BE  
*EP  
4
*EP  
4
1
2
3
1
2
3
CEN DM  
(CEN)  
TDFN  
(2mm × 2mm)  
DP GND  
CB1 DM  
DP GND  
TDFN  
(2mm × 2mm)  
( ) FOR MAX14566AE ONLY  
*CONNECT EP TO GND.  
Pin Description  
PIN  
NAME  
FUNCTION  
MAX14566E  
MAX14566AE MAX14566BE  
nMOSFET Open-Drain Output, Current-Limit Switch (CLS) Control  
Output. If CB changes from logic 0 to logic 1 or from logic 1 to  
logic 0, CEN is low for 1s (typ).  
1
1
CEN  
Active-Low pMOSFET Open-Drain Output, Current-Limit Switch  
(CLS) Control Output. If CB changes from logic 0 to logic 1 or  
logic 1 to logic 0, CEN is high for 1s (typ).  
CEN  
2
2
1
2
3
4
CB1  
DM  
Switch Control Bit. See Table 2.  
USB Connector D- Connection  
USB Connector D+ Connection  
Ground  
3
3
DP  
4
4
GND  
Power Supply. Connect a 0.1FF capacitor between V  
as close as possible to the device.  
and GND  
CC  
5
5
5
V
CC  
6
7
6
7
6
7
TDP  
Host USB Transceiver D+ Connection  
Host USB Transceiver D- Connection  
TDM  
Switch Control Bit. See Table 1.  
CB = logic 0, charger mode  
CB = logic 1 (PM), pass-through mode active, DP/DM connected  
to TDP/TDM  
8
8
8
CB  
EP  
Exposed Pad. Connect EP to ground. Do not use EP as the only  
ground connection.  
9
USB Host Charger Identification  
Analog Switches  
Functional Diagram  
V
CC  
V
CC  
MAX14566E  
MAX14566AE  
MAX14566BE  
RP1  
RP2  
DP  
RM1  
DM  
RM2  
500kI  
TDP  
0.46V  
0.46V  
0.07V  
CC  
CC  
CC  
DP  
DM1  
DM2  
TDM  
CB1*  
CONTROL LOGIC  
ONE SHOT  
V
CC  
1s  
V
BIAS  
CEN  
(CEN)  
CB  
GND  
( ) FOR MAX14566AE ONLY  
*FOR MAX14566BE ONLY  
from the supply voltage to minimize supply current  
requirements. The resistor-dividers are not connected in  
pass-through mode.  
Detailed Description  
The MAX14566E/MAX14566AE/MAX14566BE are Hi-Speed  
USB analog switches that support USB hosts to identify  
the USB port as a charger port when the USB host is in  
a low-power mode and cannot enumerate USB devices.  
These devices feature high-performance Hi-Speed USB  
switches with low 4pF (typ) on-capacitance and low  
4I (typ) on-resistance. DP and DM can handle signals  
between 0V and 6V with any supply voltage.  
Switch Control  
The MAX14566E/MAX14566AE feature a single digital  
input, CB, for mode selection (Table 1). Connect CB to  
a logic-level low voltage for autodetection charger mode  
(AM). See the Autodetection section for more informa-  
tion. Connect CB to a logic-level high voltage for normal  
high-speed pass-through mode (PM). The MAX14566BE  
features dual digital inputs, CB and CB1, for mode selec-  
tion (Table 2). Connect CB to a logic-level high for nor-  
mal high-speed pass-through mode (PM). Connect CB  
to a logic-level low for different charger-mode selection  
Resistor-Dividers  
All the devices feature an internal resistor-divider for  
biasing data lines to provide support for Apple-compliant  
devices. When these devices are not operated with the  
resistor-divider, they disconnect the resistor-dividers  
10  
USB Host Charger Identification  
Analog Switches  
with CB1. Connect CB1 to a logic-level low for auto mode  
(AM) or connect CB1 to a logic-level high for forced  
dedicated-charger mode (FM).  
from the resistor-divider and DP and DM are shorted  
together for dedicated charging mode.  
If the voltage at DP is forced higher than the +2.3V (typ)  
threshold, the internal switch disconnects DM and DP  
from the resistor-divider and DP and DM are shorted  
together for dedicated charging mode.  
Autodetection  
All the devices feature autodetection charger mode for  
dedicated chargers and USB masters. CB must be set  
low to activate autodetection charger mode.  
Once the charging voltage is removed, the short between  
DP and DM is disconnected for normal operation.  
In autodetection charger mode, the MAX14566E moni-  
tors the voltages at DM and DP to determine the type of  
the device attached. If the voltage at DM is +2.3V (typ)  
or higher and the voltage at DP is +2.3V (typ) or lower,  
the voltage stays unchanged.  
Automatic Peripheral Reset  
The MAX14566E/MAX14566AE feature automatic current-  
limit switch control output. This feature resets the peripher-  
al connected to V  
in the event the USB host switches to  
BUS  
If the voltage at DM is forced below the +2.3V (typ)  
threshold, the internal switch disconnects DM and DP  
or from standby mode. CEN/CEN provide a 1s (typ) pulse  
on the rising or falling edge of CB (Figures 4, 5, and 6).  
Table 1. Digital Input State (MAX14566E/MAX14566AE)  
CB  
MODE  
DP/DM  
COMMENT  
INTERNAL RESISTOR-DIVIDER  
Connected  
0
AM  
Autodetection Circuit Active  
Connected to TDP/TDM  
Auto Mode  
1
PM  
USB Traffic Active  
Not Connected  
Table 2. Digital Input State (MAX14566BE)  
CB  
CB1  
MODE  
STATUS  
0
0
1
X
AM  
Auto Mode  
0
FM  
Forced Dedicated-Charger Mode: DP/DM Shorted  
1
PM  
Pass-Through (USB) Mode: Connect DP/DM to TDP/TDM  
X = Don't care.  
USB PERIPHERAL  
ATTACH  
STANDBY  
PM  
PM  
CB  
AM  
AM  
t
VBT  
CEN  
V
BUS  
5V  
USB CONNECTION  
CHARGING CURRENT  
1000mA  
500mA  
1000mA  
500mA  
1000mA  
Figure 4. MAX14566E Peripheral Reset Timing Diagram  
11  
USB Host Charger Identification  
Analog Switches  
V
CC  
USB  
TRANSCEIVER  
TDM  
TDP  
0.1µF  
GND  
DP  
D+  
D-  
USB  
CONNECTION  
DM  
CEN  
CB  
V
BUS  
150µF  
V
CC  
CURRENT-LIMIT  
SWITCH  
V
BUS  
+5V POWER  
SUPPLY  
MAX14566E  
EN  
10kI  
CLS EN  
SYSTEM CONTROL  
STANDBY  
GND  
Figure 5. MAX14566E Peripheral Reset Applications Diagram  
USB PERIPHERAL  
STANDBY  
ATTACH  
PM  
PM  
CB  
AM  
AM  
t
VBT  
CEN  
V
BUS  
5V  
USB CONNECTION  
CHARGING CURRENT  
1000mA  
500mA  
1000mA  
500mA  
1000mA  
Figure 6. MAX14566AE Peripheral Reset Timing Diagram  
12  
USB Host Charger Identification  
Analog Switches  
V
CC  
USB  
TRANSCEIVER  
TDM  
TDP  
0.1µF  
GND  
DP  
D+  
D-  
USB  
CONNECTION  
DM  
V
BUS  
150µF  
V
CC  
CURRENT-LIMIT  
SWITCH  
V
BUS  
+5V POWER  
SUPPLY  
MAX14566AE  
EN  
1kI  
CEN  
10kI  
CLS EN  
SYSTEM CONTROL  
STANDBY  
CB  
GND  
Figure 7. MAX14566AE V  
Discharge Circuit  
BUS  
is established. CB must be set low to activate data con-  
tact detect.  
Bus Voltage Discharge  
The MAX14566AE automatic current-limit switch control  
output can be used to discharge the V during V  
BUS  
BUS  
ESD Test Conditions  
ESD performance depends on a variety of conditions.  
Contact Maxim for a reliability report that documents test  
setup, test methodology, and test results.  
reset. When the system controls the current-limit switch  
for V toggle, the output capacitor can be discharged  
BUS  
slowly depending upon the load. If fast discharge of the  
capacitor is desired, the CEN output can be used  
V
BUS  
to achieve the fast discharge as shown in Figure 7.  
Extended ESD Protection  
(Human Body Model)  
Data Contact Detect  
All the devices support USB devices that require detect-  
ing the USB data lines prior to charging. When a USB  
Revision 1.2-compliant device is attached, the USB data  
lines DP and DM are shorted together. The short remains  
until it is detected by the USB device. This feature guar-  
antees appropriate charger detection if a USB Revision  
1.2-compliant device is attached. The autodetection  
charger mode is activated after the data contact detect  
ESD-protection structures are incorporated on all pins  
to protect against electrostatic discharges up to Q2kV  
(HBM) encountered during handling and assembly. DP  
and DM are further protected against ESD up to Q15kV  
(HBM) without damage. The ESD structures withstand  
high ESD both in normal operation and when the device  
is powered down. After an ESD event, the device contin-  
ues to function without latchup (Figure 8).  
13  
USB Host Charger Identification  
Analog Switches  
Typical Application Circuit (MAX14566BE)  
V
CC  
USB  
TRANSCEIVER  
TDM  
TDP  
0.1µF  
TDM  
TDP  
GND  
DP  
D+  
D-  
USB  
CONNECTION  
DM  
V
BUS  
MAX14566BE  
150µF  
V
CC  
+5V POWER  
SUPPLY  
V
BUS  
CURRENT-LIMIT  
SWITCH  
EN  
EN  
CB1  
CB  
AM/FM  
PM  
SYSTEM CONTROL  
GND  
I
(AMPS)  
PEAK  
R
R
D
C
1M  
1.5kΩ  
PEAK-TO-PEAK RINGING  
(NOT DRAWN TO SCALE)  
I
100%  
90%  
r
CHARGE-CURRENT-  
LIMIT RESISTOR  
DISCHARGE  
RESISTANCE  
HIGH-  
VOLTAGE  
DC  
DEVICE  
UNDER  
TEST  
C
100pF  
STORAGE  
CAPACITOR  
S
36.8%  
SOURCE  
10%  
0
TIME  
0
t
RL  
t
DL  
Figure 8a. Human Body ESD Test Model  
Figure 8b. Human Body Current Waveform  
Chip Information  
Package Information  
For the latest package outline information and land patterns  
(footprints), go to www.maxim-ic.com/pacꢀages. Note that a  
“+”, “#”, or “-” in the package code indicates RoHS status only.  
Package drawings may show a different suffix character, but  
the drawing pertains to the package regardless of RoHS status.  
PROCESS: BiCMOS  
PACKAGE  
TYPE  
PACKAGE  
CODE  
OUTLINE  
NO.  
LAND  
PATTERN NO.  
8 TDFN-EP  
T822+1  
21-0168  
90-0064  
14  
USB Host Charger Identification  
Analog Switches  
Revision History  
REVISION REVISION  
PAGES  
DESCRIPTION  
CHANGED  
NUMBER  
DATE  
10/10  
3/11  
0
1
Initial release  
Changed the USB Battery Charging Specification Revision 1.1 to Revision 1.2  
1, 13  
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.  
Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the  
Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.  
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600  
15  
©
2011 Maxim Integrated Products  
Maxim is a registered trademark of Maxim Integrated Products, Inc.  

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