MAX14643 [MAXIM]
USB Host Adapter Emulators;
| 型号： | MAX14643 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | USB Host Adapter Emulators |
| 文件： | 总29页 (文件大小：1151K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
General Description
Benefits and Features
● Improved Charger Interoperability
The MAX14640–MAX14644/MAX14651 are next-generation
USB 2.0 host charger adapter emulators that combine
USB Hi-Speed analog switches with a USB adapter
emulator circuit.
• USB (CDP) Emulation
• Smart CDP
• Foolproof CDP
• Meets New USB Battery Charging (BC) Revision
1.2 Specification
2
The MAX14640/MAX14651 feature an I C interface to fully
configure the charging behavior with different address
options. The MAX14641–MAX14644 are controlled by
two GPIO inputs (CB1/CB0) and support USB data and
automatic charger mode. In charging downstream port
(CDP) pass-through mode, the devices emulate the
CDP function while supporting normal USB traffic. The
MAX14641/MAX14642/MAX14643 have a CEN output
for an active-high CLS enable input, and the MAX14644
has a CEN output for an active-low CLS enable input to
restart the peripheral connected to the USB host.
• Backward-Compatible with Previous USB BC Revisions
• Meets China YD/T1591-2009 Charging Specification
• Supports Standby-Mode Charging for Apple BC
Revision 1.2 Compatible Devices
● Provide Greater Application Flexibility
2
• I C Controls Multiple Modes (MAX14640/MAX14651)
• CB0 and CB1 Pins Control Multiple Automatic and
Manual Charger States
● Enhance Performance with High Level of Integrated Features
• Supports Remote Wakeup
The MAX14640–MAX14644/MAX14651 feature 2A high-
current autodetect mode. The MAX14641 features 1A
high-current forced mode instead of regular DCP mode.
The MAX14640/MAX14651 can be configured through I C
to support various dedicated charger modes such as DCP,
• Low-Capacitance USB 2.0 Hi-Speed Switch to
Change Charging Modes
• Automatic Current-Limit Switch Control
• ±15kV ESD Protection on DP/DM
2
®
● Minimize PCB Area
Apple 1A/2A forced, or Apple 1A/2A automatic mode.
• 2mm x 2mm, 8-Pin TDFN Package
All the devices support CDP and standard downstream port
(SDP) charging while in the active state (S0) and support
the dedicated charging port (DCP) charging while in the
standby state (S3/S4/S5). All devices support low-speed
remote wake-up by monitoring DM, and the MAX14642
also supports remote wake-up in sleep mode (S3).
Applications
● Laptop/Desktop Computers
● USB Hubs
®
®/
®
● Universal Chargers Including iPod /iPhone iPad
The MAX14640–MAX14644/MAX14651 are available in an
8-pin (2mm x 2mm) TDFN-EP package and are specified
over the -40NC to +85NC extended temperature range.
Ordering Information and Typical Operating Circuit appear
at end of data sheet.
Selector Guide
PART
I/O MODE
CEN POLARITY
REMOTE WAKE-UP IN AM
FORCED CHARGER MODE
BIAS IN FM
DP/DM short
Apple 1A
2
MAX14640
MAX14641
MAX14642
MAX14643
MAX14644
MAX14651
I C (0x35)
N/A
CEN
CEN
CEN
CEN
N/A
Optional
No
Yes
No
GPIO
GPIO
GPIO
GPIO
Yes
Yes
Yes
Yes
Yes
DP/DM short
DP/DM short
DP/DM short
DP/DM short
No
No
2
I C (0x15)
Optional
Apple, iPad, iPod, and iPhone are registered trademarks of Apple, Inc.
19-6472; Rev 4; 9/16
MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Absolute Maximum Ratings
(All voltages referenced to GND.)
Operating Temperature Range.......................... -40NC to +85NC
Junction Temperature .....................................................+150NC
Storage Temperature Range............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
V
, TDP, TDM, DP, DM, SDA, SCL,
CC
CB0, CB1, CEN, CEN, INT..................................-0.3V to +6V
Continuous Current into Any Terminal ............................ Q30mA
Continuous Power Dissipation (T = +70NC)
A
TDFN (derate 11.9mW/NC above +70NC).................953.5mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Package Thermal Characteristics (Note 1)
TDFN
Junction-to-Ambient Thermal Resistance (B ) .......83.9NC/W
JA
Junction-to-Case Thermal Resistance (B )...............37NC/W
JC
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(V
= 3.0V to 5.5V, T = -40NC to +85NC, unless otherwise noted. Typical values are at V
= 5.0V and T = +25NC.) (Note 2)
CC
A
CC A
PARAMETER
POWER SUPPLY
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
CB0 = high
CB0 = low (Note 3)
CB1 = CB0 = low (AM2
3.0
5.5
V
Supply Voltage
V
V
CC
CC
4.75
5.25
200
100
20
mode)
MAX14641–
MAX14644
CB1 = CB0 = high (CM
mode)
CB1 = low, CB0 = high
(PM mode)
V
Supply Current
I
FA
CC
CC
MODE_SEL[2:0] = 000
(AM2 mode)
200
100
20
MAX14640/
MAX14651
MODE_SEL[2:0] = 011
(CM mode)
MODE_SEL[2:0] = 001
(PM mode)
POR Delay
t
50
ms
POR
ANALOG SWITCHES (DP, DM, TDP, TDM)
Analog Signal Range
V
, V
(Note 4)
0
V
V
DP DM
CC
TDP/TDM On Resistance
R
V
= 0V to V , I = 10mA
3.5
0.1
6.5
I
ON
IN
CC IN
TDP/TDM On-Resistance
Matching Between Channels
DR
V
= 5.0V, I = 10mA, V = 0.4V
I
ON
CC
IN
IN
TDP/TDM On-Resistance
Flatness
R
V
V
= 5.0V, I = 10mA, V = 0V to V
CC
0.1
70
I
I
FLAT
CC
IN
IN
DP/DM Short On-Resistance
R
= 1V, R = 20kI on DM
128
SHORT
DP
L
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Electrical Characteristics (continued)
(V
= 3.0V to 5.5V, T = -40NC to +85NC, unless otherwise noted. Typical values are at V
= 5.0V and T = +25NC.) (Note 2)
CC
A
CC A
PARAMETER
SYMBOL
CONDITIONS
= 3.6V, V = V = 0.3V to 3.3V,
MIN
-1
TYP
1.5nA
90nA
MAX
+1
UNITS
µA
V
V
CC
DP
DM
Off Leakage Current
I
COM(OFF)
= V
= 3.3V to 0.3V
TDP
TDM
On Leakage Current
I
V
= 3.6V, V = V = 0.3V to 3.3V
DM
-1
+1
µA
COM(ON)
CC
DP
DYNAMIC PERFORMANCE
V
or V
= 1.5V, R = 300I,
L
TDP
TDM
Turn-On Time
t
20
1
Fs
Fs
ps
ps
ON
C = 35pF, Figure 1 (Note 4)
L
V
or V
= 1.5V, R = 300I,
TDP
TDM L
Turn-Off Time
t
OFF
C = 35pF, Figure 1 (Note 4)
L
R = R = 50I, DP and DM connected to
TDP and TDM, Figure 2
L
S
TDP/TDM Propagation Delay
DP/DM Output Skew
t
, t
60
40
PHL PLH
R = R = 50I, DP and DM connected to
L
S
t
SKEW
TDP and TDM, Figure 2
f = 240MHz, V = 0V, V = 500mV
P-P
DP/DM On-Capacitance
(Connected to TDP, TDM)
C
5
pF
MHz
dB
OFF
BIAS
IN
Bandwidth
BW
R = R = 50I, Figure 3
1000
-20
L
S
V
= 0dBm, R = R = 50I, f = 250MHz,
L S
IN
Off-Isolation
V
ISO
Figure 3
V
= 0dBm, R = R = 50I, f = 250MHz,
IN
L
S
Crosstalk
V
-25
dB
CT
Figure 3
DCP INTERNAL RESISTORS
DP/DM Short Pulldown
RP1/RP2 Ratio
R
320
1.485
92
500
1.5
125
0.85
93
700
1.515
158.5
0.864
118
kI
kI
kI
kI
PD
RT
RP
RP1 + RP2 Resistance
RM1/RM2 Ratio
R
RP
RT
0.844
68
RM
RM1 + RM2 Resistance
RSS1/RSS2 Ratio
R
RM
RT
2.9
3
3.1
RSS
RSS1 + RSS2 Resistance
CDP INTERNAL RESISTORS
DP Pulldown Resistor
DM Pulldown Resistor
R
30
40
60
RSS
R
CDP mode
CDP mode
14.25
14.25
19.53
19.53
24.80
24.8
kI
kI
DP_CDP
R
DM_CDP
CDP HIGH-SPEED COMPARATORS
Threshold Voltage
V
100
0.5
161
205
0.7
mV
V
TH_CDP
DM_SRC
CDP LOW-SPEED COMPARATORS
V
Voltage
V
I
= 0 to 200FA
DM_SRC
LOAD
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Electrical Characteristics (continued)
(V
= 3.0V to 5.5V, T = -40NC to +85NC, unless otherwise noted. Typical values are at V
= 5.0V and T = +25NC.) (Note 2)
CC
A
CC A
PARAMETER
SYMBOL
CONDITIONS
MIN
0.25
0.8
TYP
MAX
0.4
UNITS
V
V
Voltage
V
V
V
DP_REF
DP_REF
Voltage
V
2.0
LGC
LGC
DP_SINK
I
Current
I
V
= 0.15V to 3.6V
50
150
FA
DP_SINK
DP
LOGIC INPUTS (CB0, CB1, SDA, SCL)
Input Logic High Voltage
Input Logic Low Voltage
V
1.4
-1
V
V
IH
V
0.4
+1
IL
0V P V P V or V P V P V
,
IN
IL
IH
IN
CC
Input Leakage Current
I
FA
Fs
IN
V
= 5.5V
CC
CB0/CB1 Debounce Time
t
250
DEB_CB_
OPEN-DRAIN LOGIC OUTPUTS (SDA, INT, CEN, CEN)
INT, SDA, CEN Output Low
Voltage
V
Output asserted, I
= 4mA
0.4
1
V
OL
SINK
INT, SDA, CEN Output Leakage
Current
I
Output not asserted, V
Output asserted, I
= V = 5.5V
OUT
FA
OH
CC
V
I
= 4mA
V - 0.4
CC
V
CEN, INT, Output High Voltage
CEN, INT, Output Leakage Current
OH
SOURCE
1
FA
%
Output not asserted, V = 5.5V, V
= 0V
OL
CC
CEN
V
Toggle Time Accuracy
t
Q10
BUS
VBT
2
I C TIMING CHARACTERISTICS (SEE FIGURE 4)
2
I C Maximum Clock Frequency
f
400
kHz
Fs
SCL
Bus Free Time Between STOP
and START Conditions
t
1.3
BUF
START Condition Setup Time
t
t
0.6
0.6
Fs
SU:STA
Repeated START Condition
Setup Time
70% of SCL to 70% of SDA
Fs
SU:STA
START Condition Hold Time
STOP Condition Setup Time
Clock Low Period
t
t
30% of SDA to 70% of SCL
70% of SCL to 30% of SDA
30% to 30%
0.6
0.6
1.3
0.6
100
Fs
Fs
Fs
Fs
ns
ns
HD:STA
SU:STO
t
LOW
Clock High Period
t
70% to 70%
HIGH
Data Valid to SCL Rise Time
Data Hold Time to SCL Fall
PROTECTION SPECIFICATIONS
t
Write setup time
SU:DAT
t
Write hold time
100
HD:DAT
DP and DM pins
All other pins
Q15
Q2
ESD Protection
V
Human Body Model
kV
ESD
Note 2: All units are production tested at T = +25NC. Specifications over temperature are guaranteed by design.
A
Note 3: The MAX1464_ is operational from 3.0V to 5.5V. However, in order for the valid Apple resistor-divider network to function,
must stay within the 4.75V to 5.25V range.
V
CC
Note 4: Guaranteed by design, not production tested.
Note 5: Guaranteed by design.
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Test Circuits/Timing Diagrams
V
V
CC
CC
t < 5ns
t < 5ns
f
r
V
IH
LOGIC
INPUT
MAX14641–MAX14644/
MAX14651
50%
V
IL
D_
TD_
V
IN
V
OUT
t
OFF
CB0
CB1
R
L
C
L
V
OUT
LOGIC
INPUT
0.9 x V
0.9 x V
0UT
OUT
SWITCH
OUTPUT
0V
GND
t
ON
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
AND t DO NOT INCLUDE THE CEN TOGGLE DELAY.
C INCLUDES FIXTURE AND STRAY CAPACITANCE.
L
R
L
t
ON
OFF
V
OUT
= V
IN
R + R
L
ON
Figure 1. Switching Time
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Test Circuits/Timing Diagrams (continued)
MAX14641–MAX14644
R
R
S
TDP
DP
IN+
IN-
OUT+
OUT-
RISE-TIME PROPAGATION DELAY = t
OR t
PLHY
PLHX
FALL-TIME PROPAGATION DELAY = t
OR t
PHLY
PHLX
|
R
R
L
t
= |t
- t
| OR |t - t
SK
PLHX PLHY
PHLX PHLY
S
TDM
DM
L
CB0
CB1
V
CC
t
INFALL
t
INRISE
V+
90%
90%
V
IN+
50%
50%
50%
10%
10%
0V
V+
V
50%
IN-
0V
V+
t
t
OUTFALL
OUTRISE
10%
t
t
PLHX
PHLX
90%
90%
V
OUT+
50%
50%
10%
0V
V+
50%
50%
V
OUT-
0V
t
t
PHLY
PLHY
Figure 2. Propagation Delay and Output Skew
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Test Circuits/Timing Diagrams (continued)
V
V
OUT
OFF-ISOLATION = 20log
CROSSTALK = 20log
V
V
CC
CC
NETWORK
ANALYZER
V
IN
OUT
50Ω
50Ω
V
V
0V OR V
IN
CC
CB0
CB1
V
TDP
DP*
IN
MAX14641–MAX14644
MEAS
REF
OUT
50Ω
50Ω
GND
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN TD_ AND "OFF" D_ TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL.
*FOR CROSSTALK THIS PIN IS DM.
Figure 3. Bandwidth, Off-Isolation, and Crosstalk
START CONDITION
(S)
REPEATED START CONDITION
(Sr)
STOP CONDITION
(P)
t
t
F
R
SDA
t
BUF
t
t
t
t
SU:STO
HD:STA
HD:DAT
HD:STA
t
t
SU:STA
SU:DAT
SCL
START CONDITION
(S)
t
t
t
t
LOW
HIGH
R
F
2
2
Figure 4. I C Timing Diagram. Note that t and t are per the I C fast-mode specification.
R
F
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Typical Operating Characteristics
(V
= +5V, T = +25NC, unless otherwise noted.)
CC
A
USB SWITCH ON-RESISTANCE
vs. SIGNAL VOLTAGE
USB SWITCH ON-RESISTANCE
vs. SIGNAL VOLTAGE
DP/DM SHORT ON-RESISTANCE
vs. SIGNAL VOLTAGE
4.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
160
T
= +85°C
I
= 10mA
A
I
= 10mA
TD_
DP
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
140
120
100
80
T
A
= +25°C
V
CC
= 2.8V
V
= 2.8V
CC
T
A
= -40°C
V
CC
= 5.5V
60
V
= 5.5V
CC
40
20
0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
(V)
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
(V)
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
(V)
V
V
V
DP
TDP/ TDM
TDP/ TDM
DP/DM SHORT ON-RESISTANCE
vs. SIGNAL VOLTAGE
TDP/DP LEAKAGE CURRENT
vs. TEMPERATURE
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
30
20
10
0
80
70
60
50
40
30
20
10
0
DEVICE IN CM
NO USB DEVICE
V
V
= 3.6V
= 3.3V
CC
T
A
= +85°C
TDP
T
A
= +85°C
ON-LEAKAGE
T
A
= +25°C
T
A
= -40°C
T
A
= -40°C
T
A
= +25°C
OFF-LEAKAGE
V
I
= 5.5V
CC
= 10mA
D_
0
1
2
3
4
5
6
-40
-15
10
35
60
85
2.8 3.1 3.4 3.7 4.0 4.3 4.6 4.9 5.2 5.5
(V)
V
(V)
TEMPERATURE (°C)
V
CC
DP/DM
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Typical Operating Characteristics
(V
= +5V, T = +25NC, unless otherwise noted.)
CC
A
LOGIC-INPUT THRESHOLD
vs. SUPPLY VOLTAGE
SUPPLY CURRENT vs. LOGIC LEVEL
70
1.0
60
50
40
30
20
CB_RISING
0.9
0.8
0.7
0.6
0.5
CB_FALLING
10
0
V
= 5.5V
CC
GPIO VERSION
0
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3
LOGIC LEVEL (V)
2.8 3.1 3.4 3.7 4.0 4.3 4.6 4.9 5.2 5.5
(V)
V
CC
EYE DIAGRAM
AUTO DETECTION MODE
MAX14640 toc10
MAX14640 toc09
MAX14640
FM TO AM2
0.5
0.4
DM
DP
0.3
0.2
0.1
0
2V/div
-0.1
-0.2
-0.3
-0.4
-0.5
SDA
SCL
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
TIME (x 10*-9)s
200ms/div
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Pin Configurations
TOP VIEW
SDA TDM TDP
8
V
CB0 TDM TDP
8
V
CB0 TDM TDP
8
V
CC
5
CC
5
CC
5
7
6
7
6
7
6
MAX14641
MAX14642
MAX14643
MAX14640
MAX14651
MAX14644
*EP/GND
*EP/GND
*EP/GND
1
2
3
4
1
2
3
4
1
2
3
4
INT DM
DP SCL
CEN DM
DP CB1
CEN DM
DP CB1
TDFN
(2mm x 2mm)
TDFN
(2mm x 2mm)
TDFN
(2mm x 2mm)
*CONNECT THE EXPOSED PAD (EP/GND) TO THE GROUND PLANE.
Pin Description
PIN
MAX14641/
MAX14642/ MAX14644
MAX14643
NAME
FUNCTION
MAX14640/
MAX14651
1
—
—
INT
Open-Drain Interrupt Output. INT asserts low when interrupt occurs.
nMOS Open-Drain Output. Pull up CEN to V by 10kΩ. CEN high enables the
CC
current-limit switch and V
switch OFF. When CB_ transitions from low to high or high to low, CEN is low for 1s
ON, and nMOS ON makes CEN low and the current-limit
BUS
—
1
—
CEN
(typ).
pMOS Open-Drain Output. Pull down CEN to GND by 10kΩ. CEN low enables the
current-limit switch and V
limit switch OFF. When CB_ transitions from low to high or high to low, CEN is high
ON, and pMOS ON makes CEN high and the current-
BUS
—
—
1
CEN
for 1s (typ).
2
3
2
3
2
3
DM
DP
USB Connector D- Connection
USB Connector D+ Connection
2
4
—
4
—
4
SCL I C Serial-Clock Input
—
CB1 Switch Control Input Bit 1. See the Switch Control Input Truth tables (Tables 2, 3, and 4).
Power-Supply Input. Bypass V
as possible to the device.
to GND with a 0.1µF ceramic capacitor as close
CC
5
5
5
V
CC
6
7
6
7
6
7
TDP Host USB Transceiver D+ Connection
TDM Host USB Transceiver D- Connection
2
8
—
8
—
8
SDA I C Serial-Data Input/Output
—
CB0 Switch Control Input Bit 0. See the Switch Control Input Truth tables (Tables 2, 3, and 4).
EP/
Exposed Pad and Ground. The exposed pad is the ground connection for the
—
—
—
GND device. Connect EP/GND to the ground plane.
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Functional Diagram
V
CC
CDP ENGINE
MAX14640–MAX14644/
MAX14651
DEBOUNCE
V
V
V
DP_REF
LGC
V
CC
DEBOUNCE
R
R
P1
P2
LGC
R
M1
R
DP_CDP
DEBOUNCE
I
DP_SINK
R
R
M2
DM_CDP
V
DM_SRC
REF1
DP
TDP
DM
TDM
DEBOUNCE
DEBOUNCE
DEBOUNCE
DEBOUNCE
500kI
DP
DM1
DM2
DM3
POR
REF2
REF3
REF4
REF5
CB0/
SDA**
CONTROL LOGIC
CB1/
SCL**
CEN/
CEN*/
INT**
GND
*CEN IS FOR MAX14644 ONLY.
**SDA, SCL, AND INT ARE FOR MAX14640/MAX14651 ONLY.
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Resistor-Dividers
Detailed Description
The MAX14640–MAX14644/MAX14651 feature internal
resistor-divider networks on the data lines to provide
support for Apple devices. The resistor-divider is disconnected
while not in use to minimize the supply current. The
resistor-dividers are not connected in pass-through
mode. Table 1 summarizes the resistor values connected
to DP/DM in different charging modes.
The MAX14640–MAX14644/MAX14651 adapter emula-
tor devices have high-speed USB analog switches that
support USB hosts by identifying the USB port as a
charger when the USB host is in a low-power mode and
cannot enumerate USB devices. The devices feature low
4pF (typ) on-capacitance and low 4I (typ) on-resistance
when the USB switches are connected. DP and DM are
capable of handling signals between 0V and 5.5V over
the entire 3.0V–5.5V supply range.
Switch Control
Digital Controls
2
The MAX14640/MAX14651 are controlled by an I C
The MAX14641–MAX14644 feature two digital select
inputs, CB0 and CB1, for mode selection. Table 2,
Table 3, and Table 4 show how the CB1/CB0 inputs can
be used to enter autodetection charger mode (AM_),
pass-through mode (PM), forced charger mode (FM
and AP_), and pass-through mode with CDP emulation
(CM).
interface, while the MAX14641–MAX14644 are
controlled by the CB0 and CB1 logic inputs. The I C
interface allows further customization over which mode
the MAX14640/MAX14651 operate in and can be used
to read back connection information.
2
Improvements over the MAX14600 USB detector
family include support for some smartphones that do not
connect after applying 0.6V in charging downstream
port (CDP) mode. The devices also support high-current
charging of Apple devices while in sleep mode.
In CDP emulation mode, the peripheral device with CDP
detection capability draws charging current up to 1.5A
immediately without USB enumeration.
Table 1. DP/DM Resistor-Dividers
CHARGING MODE
DP PULLUP (kI)
DP PULLDOWN (kI)
DM PULLUP (kI)
DM PULLDOWN (kI)
AM1
AM2
75
49.9
49.9
43.2
75
49.9
49.9
43.2
Table 2. Digital Input State Table for the MAX14641
CB1 CB0
CHARGER/USB
MODE
STATUS
2A Autodetection Charger Mode for Apple Devices. Resistor-dividers are
connected to DP/DM.
0
0
CHARGER
AM2
Forced 1A Charger Mode for Apple Devices. Resistor-dividers are connected to
DP/DM.
1
0
1
0
1
1
CHARGER
USB
AP1
PM
USB Pass-Through Mode. DP/DM are connected to TDP/TDM.
USB Pass-Through Mode with CDP Emulation. Auto connects DP/DM to TDM/TDM
depending on CDP detection status.
USB
CM
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Table 3. Digital Input State Table for the MAX14642
CB1 CB0
CHARGER/USB
CHARGER
USB
MODE
AM2
PM
STATUS
2A Autodetection Charger Mode for Apple Devices. Resistor-dividers are
X
0
1
0
1
1
connected to DP/DM.
USB Pass-Through Mode. DP/DM are connected to TDP/TDM.
USB Pass-Through Mode with CDP Emulation. Auto connects DP/DM to TDM/TDM
depending on CDP detection status.
USB
CM
X = Don’t care.
Table 4. Digital Input State Table for the MAX14643/MAX14644
CB1 CB0
CHARGER/USB
MODE
STATUS
2A Autodetection Charger Mode for Apple Devices. Resistor-dividers are
connected to DP/DM.
0
0
CHARGER
AM2
1
0
0
1
CHARGER
USB
FM
PM
Forced Dedicated Charger Mode. DP and DM are shorted.
USB Pass-Through Mode. DP/DM are connected to TDP/TDM.
USB Pass-Through Mode with CDP Emulation. Auto connects DP/DM to TDM/TDM
depending on CDP detection status.
1
1
USB
CM
Table 5. Digital Input State Table for the MAX14640/MAX14651
MODE_SEL
CHARGER/USB MODE
STATUS
[2] [1] [0]
2A Autodetection Charger Mode for Apple Devices. Resistor-dividers are
connected to DP/DM.
0
0
0
CHARGER
AM2
0
0
0
1
1
0
USB
PM
FM
USB Pass-Through Mode. DP/DM are connected to TDP/TDM.
Forced Dedicated Charger Mode. DP and DM are shorted.
CHARGER
USB Pass-Through Mode with CDP Emulation. Auto connects DP/DM to TDM/TDM
depending on CDP detection status.
0
1
1
1
0
0
1
0
1
USB
CM
AM1
AP1
1A Autodetection Charger Mode for Apple Devices. Resistor-dividers are
connected to DP/DM.
CHARGER
CHARGER
Forced 1A Charger Mode for Apple Devices. Resistor-dividers are connected to
DP/DM.
Forced 2A Charger Mode for Apple Devices. Resistor-dividers are connected to
DP/DM.
1
1
1
1
0
1
CHARGER
CHARGER
AP2
SS
Forced 2A Charger Mode for Samsung Galaxy Tablet
2
I C Controls
Legacy D+/D- Detect
The MAX14640/MAX14651 mode is controlled by the
MODE_SEL[2:0] bits. Table 5 shows how these bits control
the device. In addition to being configurable in all modes
that the MAX14641–MAX14644 can enter, the MAX14640/
MAX14651 can be configured to be compatible with the
The MAX14640–MAX14644/MAX14651 support charging
devices that use a D+/D- short to indicate it is ready for
charging. This is done by monitoring the voltage at both
the DP and DM terminals and triggering when they are
both higher than their comparator thresholds.
®
Apple and Samsung Galaxy (SS mode) devices.
Samsung is a registered trademark of Samsung Electronics, Co., Ltd.
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Auto Peripheral Reset
Pass-Through Modes
The MAX14641–MAX14644 feature an auto current-
limit switch control output. This feature resets the
If the MAX14640–MAX14644/MAX14651 are configured
in pass-through mode (PM), then TDP/TDM are always
connected to DP/DM and no resistor-dividers or power
sources are applied to DP/DM.
peripheral connected to V
in the event the USB
BUS
host switches to or from standby mode. CEN or CEN
are pulsed for 1s* (typ) on the rising or falling edge of
CB0 or CB1 (Figure 5 and Figure 6).
*Note: 2s (typ) for the MAX14644ETA+TCNE.
USB
V
CC
TRANSCEIVER
TDM
TDP
0.1µF
TDM
TDP
GND
DP
D+
D-
USB
CONNECTION
DM
V
BUS
MAX14644
150µF
V
CC
V
BUS
CURRENT-LIMIT
+5V POWER
SUPPLY
SWITCH
EN
1kΩ
CEN
10kΩ
PS EN
CB0
CB1
PM/AM
CM/FM
SYSTEM CONTROL
GND
Figure 5. MAX14644 Peripheral Reset Applications Diagram
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
USB
V
CC
TRANSCEIVER
TDM
TDP
0.1µF
TDM
TDP
GND
DP
D+
D-
USB
CONNECTION
DM
V
BUS
MAX14641
MAX14642
MAX14643
150µF
V
CC
V
BUS
CURRENT-LIMIT
+5V POWER
SUPPLY
SWITCH
EN
1kΩ
33kΩ
CEN
PS EN
CB0
CB1
PM/AM
CM/FM
SYSTEM CONTROL
GND
Figure 6. MAX14641/MAX14642/MAX14643 Peripheral Reset Applications
Table 6. Forced Charging Modes
CHARGING MODE
DP PULLUP (kI)
DP PULLDOWN (kI)
DM PULLUP (kI)
DM PULLDOWN (kI)
FM
SS
N/A
30
N/A
10
N/A
30
N/A
10
AP1
AP2
75
49.9
49.9
43.2
75
49.9
49.9
43.2
Forced Charger Modes
The MAX14640–MAX14644/MAX14651 can be configured
in different forced dedicated charging port (DCP) modes;
chargers and USB masters. In automatic detection
charger mode, the device monitors the voltages on DM
and DP with resistor-dividers connected to determine
the type of device attached.
V
BUS
is enabled and DP and DM are either shorted (FM)
or connected to resistor-dividers (all other modes). Table
6 summarizes the resistor-divider values in each forced
mode.
If a USB-compliant device is connected, DP and DM
are shorted together to commence charging. Once the
charging device is removed, the short between DP and
DM is disconnected and the resistor-divider is applied.
A pulldown resistor on the shorted DP/DM node ensures
that a disconnect is detected.
Automatic Detection with Remote Wake-Up
Support
The MAX14640–MAX14644/MAX14651 feature automatic
detection charger mode (AM1/AM2) for dedicated
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
USB Pass-Through Mode with CDP Emulation
The peripheral device equipped with CDP detection
capability can draw a charging current as defined in
USB battery charger specification 1.2 when the charging
host supports the CDP mode. This is a useful feature
since most host USB transceivers do not have the CDP
function. Table 7 summarizes the USB host power states.
The MAX14640–MAX14644/MAX14651 feature a pass-
through mode with CDP emulation (CM). This is to support
the higher charging current capability during the pass-
through mode in normal USB operation (S0 state).
Table 7. USB Host Power States
STATE
DESCRIPTION
S0
System On
Power to the CPU(s) and RAM is Maintained. Devices that do not indicate that they must remain on, may be powered
down.
S1
S2
S3
S4
S5
CPU is Powered Off
Standby (Suspend to Ram)—System Memory Context is Maintained. All other system context is lost.
Hibernate—Platform Context is Maintained
Soft Off
Register Map/Register Descriptions
REGISTER ADDR
TYPE
R
POR
0x10*
0x87
0x50
0xE9
0x00
0x7B
0x00
0x00
BIT7
BIT6
CHIPID[3:0]
BIT5
BIT4
BIT3
BIT2
BIT1
CHIPREV[3:0]
FUO
BIT0
DeviceID
Control1
Control2
Control3
Control4
Control5
INT
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
R/W
R/W
R/W
R/W
R/W
R
FUO
FUO
FUO
FUO
FUO
FUO
FUO
FUO
FUO
FUO
FUO
FUO
FUO
LOW_PWR
DIS_CDP
CEN_CNT[1:0]
CEN_DEL[2:0]
RFU
MODE_SEL[2:0]
RFU
RFU
RFU
RFU
RFU
FUO
RFU
RWU_DFT
CEN_TOG_STi
RFU
RFU
INT_EN
USB_SW[1:0]
CEN_OUT CEN_POL
RWU_LS
CDP_DEVi
BYPASS_CDPi
CDP_CNi
RFU
RFU
RFU
USB_XFRi
USB_XFRs
RWUi
RWUs
CEN_TOG_SPi
CEN_TOG_SPs
STATUS
MASK
R
CDP_DEVs BYPASS_CDPs CDP_CNs
R/W
0x00 CDP_DEVm BYPASS_CDPm CDP_CNm
USB_XFRm RWUm CEN_TOG_STm CEN_TOG_SPm
FUO = Factory Use Only. Do not change from POR values.
RFU = Reserved for Future Use. Do not change from POR values.
*Applies to the MAX14640; the MAX14651 POR is 0x20.
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
DeviceID Register
ADDRESS:
MODE:
BIT
0x00
Read Only
6
7
5
4
3
2
1
0
NAME
CHIPID[3:0]
CHIPREV[3:0]
RESET
0
0
0
1
0
0
0
0
CHIPID[3:0] The CHIPID[3:0] bits show information about the version of the MAX14640/MAX14651.
CHIPREV[3:0] The CHIPREV[3:0] bits show information about the revision of the MAX14640/MAX14651 silicon.
Control1 Register
ADDRESS:
MODE:
BIT
0x01
Read/Write
7
FUO
1
6
FUO
0
5
FUO
0
4
FUO
0
3
FUO
0
2
FUO
1
1
FUO
1
0
FUO
1
NAME
RESET
FUO
Factory Use Only. Do not modify from reset values.
Control2 Register
ADDRESS:
MODE:
0x02
Read/Write
BIT
7
LOW_PWR
0
6
FUO
1
5
FUO
0
4
FUO
1
3
FUO
0
2
FUO
0
1
DIS_CDP
0
0
FUO
0
NAME
RESET
Low-Power Mode.
LOW_PWR 0 = MAX14640/MAX14651 is in normal operation.
1 = MAX14640/MAX14651 is in low-power mode. All circuitry other than the I2C interface is disabled.
Disable CDP Signal.
DIS_CDP
FUO
0 = CDP signaling enabled
1 = CDP signaling disabled
Factory Use Only. Do not modify from reset values.
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Control3 Register
ADDRESS:
MODE:
BIT
0x03
Read/Write
6
7
5
4
3
2
1
0
NAME
CEN_CNT[1:0]
CEN_DEL[2:0]
0
MODE_SEL[2:0]
0
RESET
1
1
1
1
0
1
CEN State Control. Directly controls the CEN output independent of automatic cycling.
00 = CEN deasserted and CEN cycling disabled
CEN_CNT[1:0] 01 = CEN cycling disabled between CB_ transitions during CDP modes and in AM mode
10 = CEN asserted
11 = CEN controlled by CDP/DCP/AM modes
CEN Pulse Delay. Controls how long V
000 = 125ms
toggles last outside of AM mode.
BUS
001 = 250ms
010 = 350ms
CEN_DEL[2:0] 011 = 500ms
100 = 750ms
101 = 1.0s
110 = 1.5s
111 = 2s
Operating Mode Control.
000 = AM2
001 = PM
010 = FM
MODE_SEL[2:0] 011 = CM
100 = AM1
101 = AP1
110 = AP2
111 = SS
Control4 Register
ADDRESS:
MODE:
BIT
0x04
Read/Write
7
RFU
0
6
RFU
0
5
RFU
0
4
RFU
0
3
RFU
0
2
RFU
0
1
RFU
0
0
RFU
0
NAME
RESET
RFU
Reserved for Future Use
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Control5 Register
ADDRESS:
MODE:
BIT
0x05
Read/Write
6
7
INT_EN
0
5
4
CEN_OUT
1
3
CEN_POL
1
2
FUO
0
1
RWU_DFT
1
0
RWU_LS
1
NAME
USB_SW[1:0]
RESET
1
1
Interrupt Enable.
INT_EN
USB_SW[1:0]
CEN_OUT
0 = Interrupt disabled
1 = Interrupt enabled
USB DPDT Switch Control. When the USB switch is forced open (00) or closed (01), the state machine and CEN
output are disabled.
00 = DP/DM in high-Z
01 = DP/DM connected to TDP/TDM
10 = DP/DM controlled by CDP/DCP/AM circuitry
11 = DP/DM controlled by CDP/DCP/AM circuitry
CEN/INT Function Select. Controls the function of the INT pin.
0 = INT output is used as interrupt
1 = INT output is used as CEN
CEN/INT Polarity Select. Controls the polarity of the CEN/INT output.
0 = CEN/INT output is active-low CEN/INT
1 = CEN/INT output is active-high CEN/INT
CEN_POL
FUO
Factory Use Only. Do not modify from reset value.
Remote Wake-Up Default.
0 = Remote wake-up is off
1 = Remote wake-up is on
RWU_DFT
Remote Wake-Up for Low-Speed Only Select.
0 = Remote wake-up for both FS/HS and LS USB devices
1 = Remote wake-up for only LS devices
RWU_LS
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Interrupt (INT) Register
ADDRESS:
MODE:
BIT
0x06
Read Only
6
7
5
4
RFU
0
3
USB_XFRi
0
2
RWUi
0
1
0
NAME
CDP_DEVi BYPASS_CDPi CDP_CNi
CEN_TOG_STi CEN_TOG_SPi
RESET
0
0
0
0
0
CDP Device Detect Status Interrupt. CDP_DEVi is set when a CDP device is detected following the CDP
handshake procedure in CM mode.
0 = No interrupt
CDP_DEVi
1 = Interrupt
Bypass CDP Running Status Interrupt. BYPASS_CDPi is set when the CDP handshake procedure is bypassed.
BYPASS_CDPi 0 = No interrupt
1 = Interrupt
CDP Connect Status Interrupt. CDP_CNi is set whenever a CDP connection check is in progress.
0 = No interrupt
1 = Interrupt
CDP_CNi
RFU
Reserved for Future Use
USB Session Interrupt. USB_XFRi is set when there is USB data detected in CM mode and DP/DM are
connected to TDP/TDM.
0 = No interrupt
1 = Interrupt
USB_XFRi
RWUi
Remote Wake-Up Status Interrupt. RWUi is set whenever a remote wake-up is performed in AM mode.
0 = No interrupt
1 = Interrupt
CEN Toggle Start Monitor Interrupt. CEN_TOG_STi is set at the start of a V
toggle, when V
is first
BUS
BUS
disabled.
0 = No interrupt
1 = Interrupt
CEN_TOG_STi
CEN Toggle Stop Monitor Interrupt. CEN_TOG_SPi is set at the end of a V
toggle, when V
is no longer
BUS
BUS
disabled.
0 = No interrupt
1 = Interrupt
CEN_TOG_SPi
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
STATUS Register
ADDRESS:
MODE:
BIT
0x07
Read Only
6
7
5
4
RFU
0
3
USB_XFRs
0
2
RWUs
0
1
RFU
0
0
NAME
CDP_DEVs BYPASS_CDPs CDP_CNs
CEN_TOG_SPs
0
RESET
0
0
0
CDP Device Detect Status. CDP_DEVs is set when a CDP device is detected following the CDP handshake
procedure in CM mode and cleared when it is disconnected.
0 = CDP device not detected
CDP_DEVs
1 = CDP device detected
Bypass CDP Running Status. BYPASS_CDPs is set when the CDP handshake procedure is bypassed.
BYPASS_CDPs 0 = CDP signaling used
1 = CDP signaling bypassed
CDP Connect Status. CDP_CNs is set while a CDP connection attempt is in progress.
CDP_CNs
RFU
0 = No CDP connection check in progress
1 = CDP connection check in progress
Reserved for Future Use
USB Session Status. USB_XFRs is set while there is USB data detected in CM mode and DP/DM are connected
to TDP/TDM.
0 = No USB session in progress
1 = USB session in progress
USB_XFRs
RWUs
Remote Wake-Up Status. RWUs is set while a remote wake-up is in progress in AM mode.
0 = Not waiting for RWU
1 = Waiting for RWU
CEN Toggle Status. CEN_TOGs is cleared at the start of a V
toggle and set at the end of the V
toggle.
BUS
BUS
CEN_TOG_SPs 0 = V
toggle in progress
toggle not in progress
BUS
BUS
1 = V
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
MASK Register
ADDRESS:
MODE:
BIT
0x08
Read/Write
6
7
5
4
3
2
1
0
NAME
CDP_DEVm BYPASS_CDPm CDP_CNm RFU USB_XFRm RWUm CEN_TOG_STm CEN_TOG_SPm
RESET
0
0
0
0
0
0
0
0
CDP Device Detect Status Interrupt Mask. Prevents an interrupt from being generated in CDP_DEVi when
CDP_DEVs is set to 1.
0 = Masked
CDP_DEVm
1 = Not masked
Bypass CDP Running Status Interrupt Mask. Prevents an interrupt from being generated in BYPASS_CDPi
when BYPASS_CDPs is set to 1.
0 = Masked
BYPASS_CDPm
1 = Not masked
CDP Connect Status Interrupt Mask. Prevents an interrupt from being generated in CDP_CNi when CDP_CNs
is set to 1.
0 = Masked
1 = Not masked
CDP_CNm
RFU
Reserved for Future Use
USB Session Interrupt Mask. Prevents an interrupt from being generated in USB_XFRi when USB_XFRs is set
to 1.
0 = Masked
1 = Not masked
USB_XFRm
Remote Wake-Up Status Interrupt Mask. Prevents an interrupt from being generated in RWUi when RWUs is
set to 1.
0 = Masked
1 = Not masked
RWUm
CEN Toggle Start Monitor Interrupt Mask. Prevents an interrupt from being generated in CEN_TOG_STi when
CEN_TOG_STs is set to 1.
0 = Masked
1 = Not masked
CEN_TOG_STm
CEN_TOG_SPm
CEN Toggle Stop Monitor Interrupt Mask. Prevents an interrupt from being generated in CEN_TOG_SPi when
CEN_TOG_SPs is set to 1.
0 = Masked
1 = Not masked
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Slave Address
Applications Information
2
The MAX14640 and MAX14651 are the I C versions that
2
I C Interface
have different slave addresses (Table 8). Set the read/
write bit high to configure the MAX14640/MAX14651 to
read mode. Set the read/write bit low to configure the
MAX14640/MAX14651 to write mode. The address is the
first byte of information sent to the MAX14640/MAX14651
after the START condition.
2
The MAX14640/MAX14651 contain an I C-compatible
interface for data communication with a host controller
(SCL and SDA). The interface supports a clock frequency
of up to 400kHz. SCL and SDA require pullup resistors
that are connected to a positive supply.
START, STOP, and Repeated START Conditions
Bit Transfer
2
When writing to the MAX14640/MAX14651 using I C,
One data bit is transferred on the rising edge of each
SCL clock cycle. The data on SDA must remain stable
during the high period of the SCL clock pulse. Changes
in SDA while SCL is high and stable are considered
control signals (see the START, STOP, and Repeated
START Conditions section). Both SDA and SCL remain
high when the bus is not active.
the master sends a START condition (S) followed by the
MAX14640/MAX14651 I C address. After the address,
2
the master sends the register address of the register that
is to be programmed. The master then ends communication
by issuing a STOP condition (P) to relinquish control of
the bus, or a Repeated START condition (Sr) to communicate
2
to another I C slave. See Figure 7.
S
Sr
P
SCL
SDA
2
Figure 7. I C START, STOP, and Repeated START Conditions
2
Table 8. I C Slave Addresses
MAX14640
MAX14651
BINARY
ADDRESS FORMAT
HEX
0x35
0x6A
0x6B
BINARY
HEX
0x15
0x2A
0x2B
7-Bit Slave ID
Write Address
Read Address
011 0101
0110 1010
0110 1011
001 0101
0010 1010
0010 1011
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MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Single-Byte Write
Burst Write
In this operation, the master sends an address and two
data bytes to the slave device (Figure 8). The following
procedure describes the single-byte write operation:
In this operation, the master sends an address and mul-
tiple data bytes to the slave device (Figure 9). The slave
device automatically increments the register address
after each data byte is sent, unless the register being
accessed is 0x00, in which case the register address
remains the same. The following procedure describes
the burst write operation:
1) The master sends a START condition.
2) The master sends the 7-bit slave address plus a write
bit (low).
3) The addressed slave asserts an ACK on the data line.
4) The master sends the 8-bit register address.
1) The master sends a START condition.
2) The master sends the 7-bit slave address plus a write
bit (low).
5) The slave asserts an ACK on the data line only if the
address is valid (NAK if not).
3) The addressed slave asserts an ACK on the data line.
4) The master sends the 8-bit register address.
6) The master sends eight data bits.
7) The slave asserts an ACK on the data line.
8) The master generates a STOP condition.
5) The slave asserts an ACK on the data line only if the
address is valid (NAK if not).
6) The master sends eight data bits.
7) The slave asserts an ACK on the data line.
8) Repeat 6 and 7 (N - 1) times.
9) The master generates a STOP condition.
WRITE SINGLE BYTE
S
DEVICE SLAVE ADDRESS - W
A
A
REGISTER ADDRESS
A
8 DATA BITS
P
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
Figure 8. Write-Byte Sequence
BURST WRITE
S
DEVICE SLAVE ADDRESS - W
8 DATA BITS - 1
A
A
REGISTER ADDRESS
8 DATA BITS - 2
8 DATA BITS - N
A
A
A
P
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
Figure 9. Burst Write Sequence
Maxim Integrated
│ 24
www.maximintegrated.com
MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Single-Byte Read
5) The slave asserts an ACK on the data line only if the
address is valid (NAK if not).
In this operation, the master sends an address plus two
data bytes and receives one data byte from the slave
device (Figure 10). The following procedure describes
the single-byte read operation:
6) The master sends a Repeated START condition.
7) The master sends the 7-bit slave address plus a read
bit (high).
1) The master sends a START condition.
8) The addressed slave asserts an ACK on the data
line.
2) The master sends the 7-bit slave address plus a
write bit (low).
9) The slave sends eight data bits.
3) The addressed slave asserts an ACK on the data
line.
10) The master asserts a NACK on the data line.
11) The master generates a STOP condition.
4) The master sends the 8-bit register address.
READ SINGLE BYTE
S
DEVICE SLAVE ADDRESS - W
A
A
REGISTER ADDRESS
8 DATA BITS
A
Sr
DEVICE SLAVE ADDRESS - R
NA
P
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
Figure 10. Read Byte Sequence
Maxim Integrated
│ 25
www.maximintegrated.com
MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Burst Read
6) The master sends a Repeated START condition.
In this operation, the master sends an address plus
two data bytes and receives multiple data bytes from
the slave device (Figure 11). The following procedure
describes the burst byte read operation:
7) The master sends the 7-bit slave address plus a read
bit (high).
8) The slave asserts an ACK on the data line.
9) The slave sends eight data bits.
1) The master sends a START condition.
10) The master asserts an ACK on the data line.
11) Repeat 9 and 10 (N - 2) times.
2) The master sends the 7-bit slave address plus a
write bit (low).
12) The slave sends the last eight data bits.
13) The master asserts a NACK on the data line.
14) The master generates a STOP condition.
3) The addressed slave asserts an ACK on the data
line.
4) The master sends the 8-bit register address.
5) The slave asserts an ACK on the data line only if the
address is valid (NAK if not).
BURST READ
S
DEVICE SLAVE ADDRESS - W
DEVICE SLAVE ADDRESS - R
8 DATA BITS - 2
A
A
A
REGISTER ADDRESS
8 DATA BITS - 1
8 DATA BITS - 3
8 DATA BITS - N
A
A
Sr
A
NA
P
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
Figure 11. Burst Read Sequence
Maxim Integrated
│ 26
www.maximintegrated.com
MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Acknowledge Bits
Data transfers are acknowledged with an acknowledge
bit (ACK) or a not-acknowledge bit (NACK). Both the
master and the MAX14640/MAX14651 generate ACK
bits. To generate an ACK, pull SDA low before the rising
edge of the ninth clock pulse, and hold it low during the
high period of the ninth clock pulse (see Figure 12). To
generate a NACK, leave SDA high before the rising edge
of the ninth clock pulse, and leave it high for the duration
of the ninth clock pulse. Monitoring for NACK bits allows
for detection of unsuccessful data transfers.
S
SCL
SDA
1
2
8
9
NOT ACKNOWLEDGE
ACKNOWLEDGE
Figure 12. Acknowledge
High-ESD Protection
Electrostatic Discharge (ESD)-protection structures are
incorporated on all pins to protect against electrostatic
discharges up to Q2kV Human Body Model (HBM)
encountered during handling and assembly. DP and DM
are further protected against ESD up to Q15kV (HBM)
without damage. The ESD structures withstand high ESD
both in normal operation and when the device is powered
down. After an ESD event, the MAX14640–MAX14644/
MAX14651 continue to function without latchup.
R
1MΩ
R
D
1.5kΩ
C
CHARGE-CURRENT-
LIMIT RESISTOR
DISCHARGE
RESISTANCE
HIGH-
VOLTAGE
DC
DEVICE
UNDER
TEST
C
STORAGE
CAPACITOR
S
100pF
SOURCE
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents test
setup, test methodology, and test results.
Figure 13. Human Body ESD Test Model
The MAX14640–MAX14644/MAX14651 require a 1FF
capacitor on both V
protection.
to GND to guarantee full ESD
CC
I
(AMPS)
PEAK
Human Body Model
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
I
100%
90%
r
Figure 13 shows the Human Body Model. Figure 14
shows the current waveform it generates when discharged
into a low impedance. This model consists of a 100pF
capacitor charged to the ESD voltage of interest that is
then discharged into the device through a 1.5kI resistor.
36.8%
10%
0
TIME
0
t
RL
t
DL
Figure 14. Human Body Current Waveform
Maxim Integrated
│ 27
www.maximintegrated.com
MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Typical Operating Circuit
LAPTOP
OVERCURRENT
PROTECTOR
EXTERNAL
POWER
SUPPLY
5V
SWITCHING
POWER SUPPLY
CEN
iPod
OR
iPhone
APPLE
DOCK
APPLE DOCK
CONNECTOR
USB A
Li+
BATTERY
EMBEDDED
CONTROLLER
V
PHONE OR MP3
PLAYER
BUS
INT
INT
D-
DM
DP
USB A
SDA
SCL
SDA
SCL
CONNECTOR
D+
MICRO-USB
CONNECTOR
USB A
MICRO B
GND
MAX14640
LAPTOP CHIPSET
TDM
TDP
USB
TRANSCEIVER
Ordering Information
Chip Information
PROCESS: BiCMOS
PART
TEMP RANGE PIN-PACKAGE
MAX14640ETA+T
MAX14641ETA+T
MAX14642ETA+T
MAX14643ETA+T
MAX14644ETA+T
MAX14644ETA/V+
MAX14644ETA/V+T
MAX14644ETA+TCNE
-40NC to +85NC
-40NC to +85NC
-40NC to +85NC
-40NC to +85NC
-40NC to +85NC
-40NC to +85NC
-40NC to +85NC
-40NC to +85NC
-40NC to +85NC
8 TDFN-EP*
8 TDFN-EP*
8 TDFN-EP*
8 TDFN-EP*
8 TDFN-EP*
8 TDFN-EP*
8 TDFN-EP*
8 TDFN-EP*
8 TDFN-EP*
Package Information
For the latest package outline information and land patterns (foot-
prints), go to www.maximintegrated.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but the
drawing pertains to the package regardless of RoHS status.
MAX14651ETA+T
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
T = Tape and reel.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
8 TDFN
T822+2
21-0168
90-0065
/V Denotes an automotive-qualified part.
Maxim Integrated
│ 28
www.maximintegrated.com
MAX14640–MAX14644/MAX14651
USB Host Adapter Emulators
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
9/12
Initial release
—
Updated Electrical Characteristics table, updated Figure 4, removed TOCS 11 and
12, updated Pin Description and Register Map/Register Descriptions.
1
4/13
3, 7, 9, 10, 16
2
3
4
8/15
1/16
9/16
Updated Ordering Information
28
28
28
Added MAX14644ETA+TCNE to Ordering Information table
Removed future products from Ordering Information table
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2016 Maxim Integrated Products, Inc.
│ 29
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