MAX1517A [MAXIM]
TFT-LCD DC-DC Converters with Operational Amplifiers;
| 型号： | MAX1517A |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | TFT-LCD DC-DC Converters with Operational Amplifiers CD |
| 文件： | 总29页 (文件大小：1674K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EVALUATION KIT AVAILABLE
MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
General Description
Features
● 2.6V to 5.5V Input Supply Range
The MAX1516A/MAX1517A/MAX1518A include a high-
performance step-up regulator, two linear-regulator con-
trollers, and high-current operational amplifiers for active-
matrix thin-film transistor (TFT) liquid-crystal displays
(LCDs). Also included is a logic-controlled, high-voltage
switch with adjustable delay.
● 1.2MHz Current-Mode Step-Up Regulator
• Fast Transient Response to Pulsed Load
• High-Accuracy Output Voltage (1.5%)
• Built-In 14V, 2.4A, 0.16Ω n-Channel MOSFET
• High Efficiency (90%)
The step-up DC-DC converter provides the regulated sup-
ply voltage for the panel source driver ICs. The converter
is a high-frequency (1.2MHz) current-mode regulator
with an integrated 14V n-channel MOSFET that allows
the use of ultra-small inductors and ceramic capacitors.
It provides fast transient response to pulsed loads while
achieving efficiencies over 85%.
● Linear-Regulator Controllers for V
and V
GOFF
GON
● High-Performance Operational Amplifiers
• ±150mA Output Short-Circuit Current
• 13V/μs Slew Rate
• 12MHz, -3dB Bandwidth
• Rail-to-Rail Inputs/Outputs
● Logic-Controlled, High-Voltage Switch with Adjustable
The gate-on and gate-off linear-regulator controllers pro-
vide regulated TFT gate-on and gate-off supplies using
external charge pumps attached to the switching node.
The MAX1518A includes five high-performance opera-
tional amplifiers, the MAX1517A includes three, and the
MAX1516A includes one operational amplifier. These
amplifiers are designed to drive the LCD backplane
(VCOM) and/or the gamma-correction divider string. The
devices feature high output current (±150mA), fast slew
rate (13V/μs), wide bandwidth (12MHz), and rail-to-rail
inputs and outputs.
Delay
● Timer-Delay Fault Latch for All Regulator Outputs
● Thermal-Overload Protection
● 0.6mA Quiescent Current
Minimal Operating Circuit
V
V
CP
CN
V
IN
V
MAIN
LX
IN
FB
STEP-UP
CONTROLLER
The MAX1516A/MAX1517A/MAX1518A are available in
32-pin thin QFN packages with a maximum thickness of
0.8mm for ultra-thin LCD panels.
PGND
AGND
COMP
V
V
CP
MAX1518A
DRVP
FBP
GATE-ON
CONTROLLER
GON
Applications
● Notebook Computer Displays
● LCD Monitor Panels
SRC
COM
DRN
DEL
CTL
SWITCH
CONTROL
V
V
CN
DRVN
FBN
GATE-OFF
CONTROLLER
Ordering Information
GOFF
SUP
NEG1
PART
TEMP RANGE
-40°C to +100°C
-40°C to +100°C
-40°C to +100°C
PIN-PACKAGE
32 Thin QFN
32 Thin QFN
32 Thin QFN
OUT1
OP1
OP2
MAX1516AETJ+*
MAX1517AETJ+*
MAX1518AETJ+*
REF
REF
POS1
NEG2
NEG4
OUT2
POS2
OUT4
OP4
POS4
NEG5
*Denotes recommended for new designs.
+Denotes a lead(Pb)-free/RoHS-compliant package.
OUT3
POS3
OUT5
POS5
OP3
OP5
BGND
Pin Configurations appear at end of data sheet.
19-4019; Rev 1; 10/14
MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
Absolute Maximum Ratings
IN, CTL to AGND.....................................................-0.3V to +6V
COM, DRN to AGND..............................-0.3V to (V
+ 0.3V)
SRC
COMP, FB, FBP, FBN,
DEL, REF to AGND................................-0.3V to (V + 0.3V)
IN
DRN to COM ..........................................................-30V to +30V
OUT_ Maximum Continuous Output Current...................±75mA
LX Switch Maximum Continuous RMS Output Current .......1.6A
PGND, BGND to AGND .....................................................±0.3V
LX to PGND...........................................................-0.3V to +14V
SUP to AGND........................................................-0.3V to +14V
DRVP, SRC to AGND............................................-0.3V to +30V
POS_, NEG_, OUT_ to AGND............... -0.3V to (V
POS1 to NEG1, POS2 to NEG2, POS3 to NEG3,
Continuous Power Dissipation (T = +70°C)
A
Thin QFN (derate 21.2mW/°C above +70°C)............1702mW
Operating Temperature Range......................... -40°C to +100°C
Junction Temperature......................................................+150°C
Storage Temperature Range............................ -65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
+ 0.3V)
SUP
POS4 to NEG4, POS5 to NEG5 ............................-6V to +6V
DRVN to AGND................................ (V - 30V) to (V + 0.3V)
IN
IN
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(V = 3V, V
= 8V, PGND = AGND = BGND = 0, I
= 25μA, T = 0°C to +85°C. Typical values are at T = +25°C, unless oth-
IN
SUP
REF
A
A
erwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
IN Supply Range
V
2.6
5.5
V
IN
IN Undervoltage-Lockout
Threshold
V
V
V
rising, typical hysteresis = 150mV
2.3
2.5
0.6
6
2.7
0.8
11
V
UVLO
IN
= V
= 1.4V, V
= 0,
FB
FBP
FBN
LX not switching
IN Quiescent Current
I
mA
IN
V
= 1.1V, V
= 1.4V, V
= 0,
FB
FBP
FBN
LX switching
Duration to Trigger Fault
Condition
55
ms
V
REF Output Voltage
-2µA < I
< 50µA, V = 2.6V to 5.5V
1.231
1.250
+160
15
1.269
REF
IN
Temperature rising
Hysteresis
Thermal Shutdown
°C
MAIN STEP-UP REGULATOR
Output Voltage Range
V
V
13
V
kHz
%
MAIN
IN
Operating Frequency
f
1020
84
1200
87
1380
90
OSC
Oscillator Maximum Duty Cycle
T
T
= +25°C to +85°C
= 0°C to +85°C
1.221
1.218
0.96
1.233
1.233
1.00
-1.6
1.245
1.247
1.04
A
FB Regulation Voltage
V
No load
V
FB
A
FB Fault Trip Level
FB Load Regulation
FB Line Regulation
FB Input Bias Current
FB Transconductance
FB Voltage Gain
V
falling
V
%
FB
0 < I
< full load, transient only
MAIN
V
= 2.6V to 5.5V
= 1.4V
+0.04
±0.15
+40
%/ V
nA
IN
V
-40
75
FB
ΔI
= 5µA
150
600
280
µS
COMP
FB to COMP
V/ V
Maxim Integrated
│ 2
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MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
Electrical Characteristics (continued)
(V = 3V, V
= 8V, PGND = AGND = BGND = 0, I
= 25μA, T = 0°C to +85°C. Typical values are at T = +25°C, unless oth-
IN
SUP
REF
A
A
erwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
250
40
UNITS
mΩ
μA
LX On-Resistance
LX Leakage Current
LX Current Limit
R
LX(ON)
I
V
V
= 13V
0.02
3.0
LX
LX
I
= 1V, duty cycle = 65%
2.5
3.0
3.5
A
LIM
FB
Current-Sense
Transconductance
3.8
14
5
S
Soft-Start Period
t
ms
A
SS
Soft-Start Step Size
OPERATIONAL AMPLIFIERS
SUP Supply Range
I
/ 8
LIM
V
4.5
13.0
4.8
3.0
1.1
V
SUP
MAX1518A
MAX1517A
MAX1516A
Buffer configuration,
= 4V, no load
SUP Supply Current
I
mA
SUP
V
POS_
(V
, V
= +25°C
, V
) @ V
/ 2
NEG_ POS_ OUT_
SUP
Input Offset Voltage
V
0
+1
12
mV
OS
T
A
Input Bias Current
I
±50
nA
V
(V
, V
, V ) ≅ VSUP / 2
POS_ OUT_
BIAS
NEG_
Input Common-Mode Range
Common-Mode Rejection Ratio
Open-Loop Gain
V
0
V
SUP
CM
CMRR
0 ≤ (V
, V
) ≤ V
45
dB
dB
NEG_ POS_
SUP
125
V
-
-
V
V
-
-
SUP
15
SUP
3
I
I
= 100µA
= 5mA
OUT_
Output Voltage Swing, High
V
mV
OH
V
SUP
150
SUP
80
OUT_
I
I
= -100µA
= -5mA
2
15
OUT_
Output Voltage Swing, Low
V
mV
OL
70
150
OUT_
Short-Circuit Current
To V
/ 2, source or sink
50
40
150
mA
mA
SUP
(V
, V
, V
) @ V
/ 2,
NEG_
POS_ OUT_
SUP
Output Source and Sink Current
|ΔV | < 10mV (|ΔV | < 30mV for OUT3)
OS
OS
DC, 6V ≤ V
≤ 13V,
SUP
Power-Supply Rejection Ratio
PSRR
GBW
60
dB
(V
, V
) ≅ V
/2
NEG_ POS_
SUP
Slew Rate
13
12
8
V/μs
MHz
MHz
-3dB Bandwidth
Gain-Bandwidth Product
R = 10kΩ, C = 10pF, buffer configuration
L L
Buffer configuration
GATE-ON LINEAR-REGULATOR CONTROLLER
FBP Regulation Voltage
FBP Fault Trip Level
V
I
= 100µA
falling
1.231
0.96
-50
1.250
1.00
1.269
1.04
+50
V
V
FBP
DRVP
V
FBP
FBP
FBP Input Bias Current
I
V
= 1.4V
nA
FBP
FBP Effective Load-Regulation
Error (Transconductance)
V
= 10V, I
= 50µA to 1mA
-0.7
-1.5
%
DRVP
DRVP
Maxim Integrated
│ 3
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MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
Electrical Characteristics (continued)
(V = 3V, V
= 8V, PGND = AGND = BGND = 0, I
= 25μA, T = 0°C to +85°C. Typical values are at T = +25°C, unless oth-
IN
SUP
REF
A
A
erwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
mV
mA
µA
FBP Line (IN) Regulation Error
DRVP Sink Current
I
= 100µA, 2.6V < V < 5.5V
±1.5
5
±5
DRVP
IN
I
V
= 1.1V, V
= 10V
= 28V
1
DRVP
FBP
FBP
DRVP
DRVP
DRVP Off-Leakage Current
Soft-Start Period
V
= 1.4V, V
0.01
14
10
t
ms
SS
Soft-Start Step Size
V
/128
V
REF
GATE-OFF LINEAR-REGULATOR CONTROLLER
FBN Regulation Voltage
FBN Fault Trip Level
V
I
= 100µA
rising
235
370
-50
250
420
265
470
+50
mV
mV
nA
FBN
DRVN
V
FBN
FBN
FBN Input Bias Current
I
V
= 0
FBN
FBN Effective Load-Regulation
Error (Transconductance)
V
= -10V, I
= 50µA to 1mA
11
25
mV
DRVN
DRVN
DRVN
FBN Line (IN) Regulation Error
DRVN Source Current
DRVN Off-Leakage Current
Soft-Start Period
I
= 0.1mA, 2.6V < V < 5.5V
+0.7
±5
mV
mA
μA
ms
V
IN
I
V
= 500mV, V = -10V
DRVN
1
DRVN
FBN
FBN
V
= 0V, V
= -25V
-0.01
14
-10
DRVN
t
SS
Soft-Start Step Size
V
/128
REF
POSITIVE GATE-DRIVER TIMING AND CONTROL SWITCHES
DEL Capacitor Charge Current
DEL Turn-On Threshold
During startup, V
= 1V
4
5
6
µA
V
DEL
V
1.19
1.25
1.31
TH(DEL)
DEL Discharge Switch On-
Resistance
During UVLO, V = 2.2V
20
Ω
IN
CTL Input Low Voltage
V
V
= 2.6V to 5.5V
= 2.6V to 5.5V
0.6
+1
V
V
IN
CTL Input High Voltage
2
IN
CTL Input Leakage Current
CTL-to-SRC Propagation Delay
SRC Input Voltage Range
CTL = AGND or IN
-1
µA
ns
V
100
28
100
30
V
V
= 1.5V, CTL = IN
50
15
DEL
SRC Input Current
I
µA
SRC
= 1.5V, CTL = AGND
DEL
SRC-to-COM Switch On-
Resistance
R
R
V
V
V
= 1.5V, CTL = IN
= 1.5V, CTL = AGND
= 1.1V
6
12
70
Ω
Ω
Ω
SRC(ON)
DRN(ON)
COM(ON)
DEL
DEL
DEL
DRN-to-COM Switch On-
Resistance
35
COM-to-PGND Switch On-
Resistance
R
350
1000
1800
Maxim Integrated
│ 4
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MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
Electrical Characteristics
(V = 3V, V
= 8V, PGND = AGND = BGND = 0, I
= 25μA, T = -40°C to +85°C. unless otherwise noted.) (Note 1)
IN
SUP
REF A
PARAMETER
IN Supply Range
SYMBOL
CONDITIONS
MIN
MAX
UNITS
V
2.6
5.5
V
IN
IN Undervoltage-Lockout
Threshold
V
V
V
rising, typical hysteresis = 150mV
2.265
2.715
0.8
V
UVLO
IN
= V
= 1.4V, V
= 0,
FB
FBP
FBN
LX not switching
IN Quiescent Current
I
mA
V
IN
V
= 1.1V, V
= 1.4V, V
= 0,
FB
FBP
FBN
11
LX switching
REF Output Voltage
MAIN STEP-UP REGULATOR
Output Voltage Range
Operating Frequency
FB Regulation Voltage
FB Line Regulation
-2µA < I
< 50µA, V = 2.6V to 5.5V
1.222
1.269
REF
IN
V
V
13
1380
1.250
±0.15
+40
V
kHz
V
MAIN
IN
f
1020
OSC
V
No load
1.212
FB
V
V
= 2.6V to 5.5V
= 1.4V
%/ V
nA
µS
mΩ
A
IN
FB Input Bias Current
FB Transconductance
LX On-Resistance
-40
75
FB
ΔI
= 5µA
300
COMP
R
250
LX(ON)
LX Current Limit
I
V
= 1V, duty cycle = 65%
2.5
4.5
3.5
LIM
SUP
SUP
FB
OPERATIONAL AMPLIFIERS
SUP Supply Range
V
13.0
4.8
3.0
1.1
12
V
MAX1518A
MAX1517A
MAX1516A
Buffer configuration,
= 4V, no load
SUP Supply Current
I
mA
V
POS_
Input Offset Voltage
V
(V
, V
, V
) @ V / 2
SUP
mV
V
OS
NEG_ POS_ OUT_
Input Common-Mode Range
V
0
V
CM
SUP
I
I
I
I
= 100µA
= 5mA
V
- 15
OUT_
OUT_
OUT_
OUT_
SUP
Output Voltage Swing, High
Output Voltage Swing, Low
V
mV
mV
OH
V
- 150
SUP
= -100µA
= -5mA
15
V
OL
150
Source
Sink
50
50
Short-Circuit Current
To V
/ 2
mA
mA
SUP
(V
, V
, V
) @ V / 2,
SUP
|ΔV | < 10mV (|ΔV | < 30mV for OUT3)
NEG_
POS_ OUT_
Output Source and Sink Current
40
OS
OS
GATE-ON LINEAR-REGULATOR CONTROLLER
FBP Regulation Voltage
V
I
= 100µA
1.218
1.269
V
FBP
DRVP
Maxim Integrated
│ 5
www.maximintegrated.com
MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
Electrical Characteristics (continued)
(V = 3V, V
= 8V, PGND = AGND = BGND = 0, I
= 25μA, T = -40°C to +85°C. unless otherwise noted.) (Note 1)
IN
SUP
REF A
PARAMETER
SYMBOL
CONDITIONS
= 10V, I = 50µA to 1mA
MIN
MAX
-2
UNITS
FBP Effective Load-Regulation
Error (Transconductance)
V
%
DRVP
DRVP
FBP Line (IN) Regulation Error
DRVP Sink Current
I
= 100µA, 2.6V < V < 5.5V
5
mV
mA
DRVP
IN
I
V
= 1.1V, V = 10V
DRVP
1
DRVP
FBP
GATE-OFF LINEAR-REGULATOR CONTROLLER
FBN Regulation Voltage
V
I
= 100µA
235
265
25
5
mV
mV
FBN
DRVN
FBN Effective Load-Regulation
Error (Transconductance)
V
= -10V, I
= 50µA to 1mA
DRVN
DRVN
FBN Line (IN) Regulation Error
DRVN Source Current
I
= 0.1mA, 2.6V < V < 5.5V
mV
mA
DRVN
IN
I
V
= 500mV, V = -10V
DRVN
1
DRVN
FBN
POSITIVE GATE-DRIVER TIMING AND CONTROL SWITCHES
DEL Capacitor Charge Current
DEL Turn-On Threshold
CTL Input Low Voltage
During startup, V
= 1V
4
6
µA
V
DEL
V
1.19
1.31
0.6
TH(DEL)
V
V
= 2.6V to 5.5V
V
IN
CTL Input High Voltage
SRC Input Voltage Range
= 2.6V to 5.5V
2
V
IN
28
100
30
V
V
V
= 1.5V, CTL = IN
DEL
SRC Input Current
I
µA
SRC
= 1.5V, CTL = AGND
= 1.5V, CTL = IN
DEL
SRC-to-COM Switch On-
Resistance
R
R
V
V
V
12
70
Ω
Ω
Ω
SRC(ON)
DRN(ON)
COM(ON)
DEL
DEL
DEL
DRN-to-COM Switch On-
Resistance
= 1.5V, CTL = AGND
= 1.1V
COM-to-PGND Switch On-
Resistance
R
350
1800
Note 1: Specifications to -40°C are guaranteed by design, not production tested.
Maxim Integrated
│ 6
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MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
Typical Operating Characteristics
(Circuit of Figure 1. V = 5V, V
= 13V, V
= 24V, V
= -8V, V
= V
= V
= V
= V
= 6.5V, T = +25°C,
IN
MAIN
GON
GOFF
OUT1
OUT2
OUT3
OUT4
OUT5 A
unless otherwise noted.)
STEP-UP EFFICIENCY
vs. LOAD CURRENT
SWITCHING FREQUENCY
vs. INPUT VOLTAGE
STEP-UP SUPPLY CURRENT
vs. SUPPLY VOLTAGE
100
90
80
70
60
50
40
30
1.4
1.3
1.2
1.1
1.0
10
NO LOAD, SUP DISCONNECTED,
R1 = 95.3kΩ, R2 = 10.2kΩ
V
= 5.0V
IN
8
6
4
2
0
V
IN
= 3.3V
CURRENT INTO INDUCTOR
CURRENT INTO IN PIN
V
OUT
= 13V
1000
1
10
100
2.5
3.0
3.5
4.0
4.5
5.0
5.5
2.5
3.0
3.5
4.0
4.5
5.0
5.5
LOAD CURRENT (mA)
INPUT VOLTAGE (V)
SUPPLY VOLTAGE (V)
STEP-UP REGULATOR SOFT-START
STEP-UP REGULATOR SOFT-START
(HEAVY LOAD)
(HEAVY LOAD)
MAX1516A toc04
MAX1516A toc04
A
A
0V
0V
B
B
0V
0V
C
C
0A
0A
2ms/div
2ms/div
A: V , 5V/div
A: V , 5V/div
IN
IN
B: V
, 5V/div
B: V
, 5V/div
MAIN
MAIN
C: INDUCTOR CURRENT, 1A/div
C: INDUCTOR CURRENT, 1A/div
Maxim Integrated
│
7
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MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
Typical Operating Characteristics (continued)
(Circuit of Figure 1. V = 5V, V
= 13V, V
= 24V, V
= -8V, V
= V
= V
= V
= V
= 6.5V, T = +25°C,
IN
MAIN
GON
GOFF
OUT1
OUT2
OUT3
OUT4
OUT5 A
unless otherwise noted.)
TIMER DELAY LATCH
RESPONSE TO OVERLOAD
REF VOLTAGE LOAD REGULATION
GATE-ON REGULATOR LINE REGULATION
MAX1516A toc06
1.253
0.2
A
1.252
1.251
1.250
1.249
1.248
1.247
0
-0.2
-0.4
-0.6
-0.8
-1.0
0V
B
V
I
= 23.5V
= 20mA
55ms
GON
GON
0A
0
10
20
30
40
50
23
24
25
26
27
28
29
30
10ms/div
, 5V/div
A: V
LOAD CURRENT (µA)
INPUT VOLTAGE (V)
MAIN
B: INDUCTOR CURRENT, 1A/div
GATE-ON REGULATOR LOAD REGULATION
GATE-OFF REGULATOR LINE REGULATION
GATE-OFF REGULATOR LOAD REGULATION
0
1.00
0.75
0.50
0.25
0
0
-0.2
-0.4
-0.6
-0.8
-1.0
V
I
= -8V
= 50mA
GOFF
GOFF
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
-0.25
0
5
10
15
20
-16
-14
-12
-10
-8
0
10
20
30
40
50
LOAD CURRENT (mA)
INPUT VOLTAGE (V)
LOAD CURRENT (mA)
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MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
Typical Operating Characteristics (continued)
(Circuit of Figure 1. V = 5V, V
= 13V, V
= 24V, V
= -8V, V
= V
= V
= V
= V
= 6.5V, T = +25°C,
IN
MAIN
GON
GOFF
OUT1
OUT2
OUT3
OUT4
OUT5 A
unless otherwise noted.)
MAX1518A OPERATIONAL-AMPLIFIER
SUPPLY CURRENT vs. SUPPLY VOLTAGE
OPERATIONAL-AMPLIFIER
POWER-UP SEQUENCE
RAIL-TO-RAIL INPUT/OUTPUT
MAX1516A toc14
MAX1516A toc12
6
5
4
3
2
1
0
V
= 6V
SUP
A
0V
A
B
0V
0V
B
0V
C
NO LOAD
BUFFER CONFIGURATION
D
V
POS1
TO V
= V
/ 2
POS5
SUP
0V
0V
4ms/div
5.5
6.0
6.5
7.0
7.5
8.0
8.5
40µs/div
SUPPLY VOLTAGE (V)
A: V
, 10V/div
A: INPUT SIGNAL, 2V/div
B: OUTPUT SIGNAL, 2V/div
MAIN
B: V , 20V/div
SRC
C: V
D: V
, 10V/div
, 20V/div
GOFF
GON
OPERATIONAL-AMPLIFIER
OPERATIONAL-AMPLIFIER
LARGE-SIGNAL STEP RESPONSE
OPERATIONAL-AMPLIFIER
SMALL-SIGNAL STEP RESPONSE
MAX1516A toc17
LOAD-TRANSIENT RESPONSE
MAX1516A toc15
MAX1516A toc16
V
SUP
= 6V
A
A
0V
A
0V
0V
+50mA
B
0
B
B
-50mA
0V
0V
400ns/div
1µs/div
A: INPUT SIGNAL, 2V/div
B: OUTPUT SIGNAL, 2V/div
400ns/div
A: OUTPUT VOLTAGE, 1V/div, AC-COUPLED
B: OUTPUT CURRENT, 50mA/div
A: INPUT SIGNAL, 100mV/div
B: OUTPUT SIGNAL, 100mV/div
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MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
Pin Description
NAME
PIN
FUNCTION
MAX1516A MAX1517A MAX1518A
Switch Input. Source of the internal high-voltage p-channel MOSFET. Bypass SRC
to PGND with a minimum 0.1µF capacitor close to the pins.
1
2
3
SRC
REF
SRC
REF
SRC
REF
Reference Bypass Terminal. Bypass REF to AGND with a minimum of 0.22µF close
to the pins.
Analog Ground for Step-Up Regulator and Linear Regulators. Connect to power
ground (PGND) underneath the IC.
AGND
AGND
AGND
Power Ground. PGND is the source of the main step-up n-channel power MOSFET.
Connect PGND to the input-capacitor ground terminals through a short, wide PC
board trace. Connect to analog ground (AGND) underneath the IC.
4
PGND
PGND
PGND
5
6
7
OUT1
NEG1
POS1
OUT1
NEG1
POS1
OUT1
NEG1
POS1
Operational-Amplifier 1 Output
Operational-Amplifier 1 Inverting Input
Operational-Amplifier 1 Noninverting Input
Operational-Amplifier 2 Output for the MAX1518A and MAX1517A. Not internally
connected for the MAX1516A.
8
9
N.C.
N.C.
OUT2
NEG2
OUT2
NEG2
Operational-Amplifier 2 Inverting Input for the MAX1518A and MAX1517A. Not
Internally Connected for the MAX1516A.
Operational-Amplifier 2 Noninverting Input for the MAX1518A and MAX1517A.
Internally connected for the MAX1516A. Connect this pin to GND for the
MAX1516A.
10
I. C.
POS2
POS2
Analog Ground for Operational Amplifiers. Connect to power ground (PGND)
underneath the IC.
11
12
13
14
BGND
N.C.
BGND
N.C.
BGND
POS3
OUT3
SUP
Operational-Amplifier 3 Noninverting Input for the MAX1518A. Not internally
connected for the MAX1517A and MAX1516A.
Operational-Amplifier 3 Output. Not internally connected for the MAX1517A and
MAX1516A.
N.C.
N.C.
Operational-Amplifier Power Input. Positive supply rail for the operational amplifiers.
SUP
SUP
Typically connected to V
. Bypass SUP to BGND with a 0.1µF capacitor.
MAIN
Operational-Amplifier 4 Noninverting Input for the MAX1518A. Operational-
amplifier 3 Noninverting input for the MAX1517A. Not internally connected for the
MAX1516A.
15
N.C.
POS3
POS4
Operational-Amplifier 4 Inverting Input for the MAX1518A. Operational-amplifier 3
inverting input for the MAX1517A. Not internally connected for the MAX1516A.
16
17
N.C.
N.C.
NEG3
OUT3
NEG4
OUT4
Operational-Amplifier 4 Output for the MAX1518A. Operational-amplifier 3 output for
the MAX1517A. Not internally connected for the MAX1516A.
Operational-Amplifier 5 Noninverting Input for the MAX1518A. Internally connected
for the MAX1517A and MAX1516A. Connect this pin to GND for the MAX1517A and
MAX1516A.
18
19
I. C.
N.C.
I. C.
N.C.
POS5
NEG5
Operational-Amplifier 5 Inverting Input. Not internally connected for the MAX1517A
and MAX1516A.
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MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
Pin Description (continued)
NAME
PIN
FUNCTION
MAX1516A MAX1517A MAX1518A
Operational-Amplifier 5 Output. Not internally connected for the MAX1517A and
MAX1516A.
20
N.C.
N.C.
OUT5
n-Channel Power MOSFET Drain and Switching Node. Connect the inductor and
Schottky diode to LX and minimize the trace area for lowest EMI.
21
22
LX
IN
LX
IN
LX
IN
Supply Voltage Input. IN can range from 2.6V to 5.5V.
Step-Up Regulator Feedback Input. Regulates to 1.236V (nominal). Connect a
23
24
FB
FB
FB
resistive voltage-divider from the output (V
Place the divider within 5mm of FB.
) to FB to analog ground (AGND).
MAIN
Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RC from
COMP to AGND. See the Loop Compensation section for component selection
guidelines.
COMP
COMP
COMP
Gate-On Linear-Regulator Feedback Input. FBP regulates to 1.25V (nominal).
Connect FBP to the center of a resistive voltage-divider between the regulator
output and AGND to set the gate-on linear-regulator output voltage. Place the
resistive voltage-divider close to the pin.
25
26
27
FBP
DRVP
FBN
FBP
DRVP
FBN
FBP
DRVP
FBN
Gate-On Linear-Regulator Base Drive. Open drain of an internal n-channel
MOSFET. Connect DRVP to the base of an external pnp pass transistor. See the
Pass-Transistor Selection section.
Gate-Off Linear-Regulator Feedback Input. FBN regulates to 250mV (nominal).
Connect FBN to the center of a resistive voltage-divider between the regulator
output and REF to set the gate-off linear-regulator output voltage. Place the
resistive voltage-divider close to the pin.
Gate-Off Linear-Regulator Base Drive. Open drain of an internal p-channel
MOSFET. Connect DRVN to the base of an external npn pass transistor. See the
Pass-Transistor Selection section.
28
29
DRVN
DEL
DRVN
DEL
DRVN
DEL
High-Voltage Switch Delay Input. Connect a capacitor from DEL to AGND to set the
high-voltage switch startup delay.
High-Voltage Switch Control Input. When CTL is high, the high-voltage switch
between COM and SRC is on and the high-voltage switch between COM and DRN
is off. When CTL is low, the high-voltage switch between COM and SRC is off
and the high-voltage switch between COM and DRN is on. CTL is inhibited by the
undervoltage lockout and when the voltage on DEL is less than 1.25V.
30
CTL
CTL
CTL
Switch Input. Drain of the internal high-voltage back-to-back p-channel MOSFETs
connected to COM.
31
32
DRN
COM
DRN
COM
DRN
COM
Internal High-Voltage MOSFET Switch Common Terminal. Do not allow the voltage
on COM to exceed V
.
SRC
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MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
Table 1. Component List
Typical Operating Circuit
The MAX1518A typical operating circuit (Figure 1) is a
complete power-supply system for TFT LCDs. The circuit
generates a +13V source-driver supply and +24V and -8V
gate-driver supplies. The input voltage range for the IC is
from +2.6V to +5.5V. The listed load currents in Figure 1
are available from a +4.5V to +5.5V supply. Table 1 lists
some recommended components, and Table 2 lists the
contact information of component suppliers.
DESIGNATION
DESCRIPTION
22µF, 6.3V X5R ceramic capacitor (1210)
TDK C3225X5R0J227M
C1
22µF, 16V X5R ceramic capacitor (1812)
TDK C4532X5X1C226M
C2
D1
3A, 30V Schottky diode (M-flat)
Toshiba CMS02
200mA, 100V, dual ultra-fast diodes (SOT23)
Fairchild MMBD4148SE
D2, D3
L1
Detailed Description
The MAX1516A/MAX1517A/MAX1518A contain a high-
performance step-up switching regulator, two low-cost
linear-regulator controllers, multiple high-current opera-
tional amplifiers, and startup timing and level-shifting
functionality useful for active-matrix TFT LCDs. Figure 2
shows the MAX1518A Functional Diagram.
3.0µH, 3A inductor
Sumida CDRH6D28-3R0
200mA, 40V pnp bipolar transistor (SOT23)
Fairchild MMBT3906
Q1
200mA, 40V npn bipolar transistor (SOT23)
Fairchild MMBT3904
Q2
Main Step-Up Regulator
The main step-up regulator employs a current-mode,
fixed-frequency PWM architecture to maximize loop band-
width and provide fast transient response to pulsed loads
typical of TFT-LCD panel source drivers. The 1.2MHz
switching frequency allows the use of lowprofile inductors
and ceramic capacitors to minimize the thickness of LCD
panel designs. The integrated high-efficiency MOSFET
and the IC’s built-in digital soft-start functions reduce the
number of external components required while controlling
Figure 3 shows the functional diagram of the step-up
regulator. An error amplifier compares the signal at FB
to 1.236V and changes the COMP output. The voltage at
COMP sets the peak inductor current. As the load varies,
the error amplifier sources or sinks current to the COMP
output accordingly to produce the inductor peak current
necessary to service the load. To maintain stability at high
duty cycles, a slope-compensation signal is summed with
the current-sense signal.
inrush currents. The output voltage can be set from V to
IN
On the rising edge of the internal clock, the controller
sets a flip-flop, turning on the n-channel MOSFET and
applying the input voltage across the inductor. The current
through the inductor ramps up linearly, storing energy in
its magnetic field. Once the sum of the current-feedback
signal and the slope compensation exceeds the COMP
voltage, the controller resets the flip-flop and turns off
the MOSFET. Since the inductor current is continuous,
a transverse potential develops across the inductor that
turns on the diode (D1). The voltage across the inductor
then becomes the difference between the output voltage
and the input voltage.
13V with an external resistive voltage-divider. To generate
an output voltage greater than 13V, an external cascoded
MOSFET is needed. See the Generating Output Voltages
> 13V section.
The regulator controls the output voltage and the power
delivered to the output by modulating the duty cycle (D) of
the internal power MOSFET in each switching cycle. The
duty cycle of the MOSFET is approximated by:
V
− V
IN
MAIN
V
D =
MAIN
Table 2. Component Suppliers
SUPPLIER
Fairchild
PHONE
WEBSITE
www.fairchildsemi.com
www.sumida.com
888-522-5372
847-545-6700
847-803-6100
949-623-2900
Sumida
TDK
www.component.tdk.com
www.toshiba.com/taec
Toshiba
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MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
LX
D1
L1
3.0µH
V
V
IN
4.5V TO 5.5V
MAIN
13V/500mA
C2
22µF
C1
22µF
R10
10Ω
R1
95.3kΩ
1%
LX
IN
FB
C18
LX
R1
10.2kΩ
1%
0.1µF
0.1µF
180kΩ
AGND
PGND
COMP
220µF
0.1µF
D2
LX
0.1µF
MAX1518A
6.8kΩ
6.8kΩ
DRVP
FBP
Q1
0.1µF
D3
R4
192kΩ
1%
DRVN
FBN
Q2
R7
332kΩ
1%
R5
V
GOFF
-8V/50mA
0.47µF
10.0kΩ
1%
0.22µF
R8
40.2kΩ
1%
SRC
COM
DRN
REF
DEL
V
GON
0.22µF
24V/20mA
CTL
SUP
0.033µF
0.1µF
BGND
NEG1
OUT1
NEG2
POS1
POS2
POS3
POS4
POS5
OUT2
OUT3
TO VCOM
BACKPLANE
NEG4
OUT4
NEG5
OUT5
Figure 1. Typical Operating Circuit
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MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
V
CN
V
CP
V
IN
V
MAIN
LX
IN
FB
STEP-UP
CONTROLLER
PGND
AGND
COMP
V
V
CP
MAX1518A
DRVP
FBP
GATE-ON
CONTROLLER
GON
SRC
COM
DRN
DEL
CTL
SWITCH
CONTROL
V
V
CN
DRVN
FBN
GATE-OFF
CONTROLLER
GOFF
SUP
NEG1
OUT1
OP1
OP2
REF
REF
POS1
NEG2
NEG4
OUT2
POS2
OUT4
OP4
POS4
NEG5
OUT3
POS3
OUT5
POS5
OP3
OP5
BGND
Figure 2. Functional Diagram
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MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
LX
RESET DOMINANT
S
CLOCK
PGND
R
Q
ILIM
COMPARATOR
SOFT-
START
V
LIMIT
SLOPE COMP
PWM
COMPARATOR
CURRENT
SENSE
∑
OSCILLATOR
FAULT
COMPARATOR
TO FAULT LATCH
ERROR AMP
1.0V
FB
1.236V
COMP
Figure 3. Step-Up Regulator Functional Diagram
This discharge condition forces the current through the
inductor to ramp back down, transferring the energy
stored in the magnetic field to the output capacitor and
the load. The MOSFET remains off for the rest of the
clock cycle.
REG P is typically used to provide the TFT-LCD gate driv-
ers’ gate-on voltage. Use a charge pump with as many
stages as necessary to obtain a voltage exceeding the
required gate-on voltage (see the Selecting the Number
of Charge-Pump Stages section). Note the voltage rating
of the DRVP is 28V. If the charge-pump output voltage can
exceed 28V, an external cascode npn transistor should be
added as shown in Figure 4. Alternately, the linear regula-
tor can control an intermediate charge-pump stage while
regulating the final charge-pump output (Figure 5).
Gate-On Linear-Regulator Controller, REG P
The gate-on linear-regulator controller (REG P) is an
analog gain block with an open-drain n-channel output. It
drives an external pnp pass transistor with a 6.8kΩ base-
to-emitter resistor (Figure 1). Its guaranteed basedrive
sink current is at least 1mA. The regulator including Q1
in Figure 1 uses a 0.47μF ceramic output capacitor and
is designed to deliver 20mA at 24V. Other output voltages
and currents are possible with the proper pass transistor
and output capacitor. See the Pass-Transistor Selection
and Stability Requirements sections.
REG P is enabled after the REF voltage exceeds 1.0V.
Each time it is enabled, the controller goes through a
soft-start routine that ramps up its internal reference DAC
in 128 steps.
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MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
LX
FROM CHARGE-PUMP
OUTPUT
0.1µF
V
MAIN
V
MAIN
13V
0.1µF
PNP PASS
TRANSISTOR
DRVP
NPN CASCODE
TRANSISTOR
6.8kΩ
MAX1516A
MAX1517A
MAX1518A
V
GON
DRVP
Q1
V
35V
GON
MAX1516A
MAX1517A
MAX1518A
0.47µF
0.22µF
267kΩ
1%
FBP
FBP
10.0kΩ
1%
Figure 4. Using Cascoded npn for Charge-Pump Output
Voltages > 28V
Figure 5. The linear regulator controls the intermediate charge-
pump stage.
Short-Circuit Current Limit
Gate-Off Linear-Regulator Controller, REG N
The operational amplifiers limit short-circuit current to
approximately ±150mA if the output is directly shorted to
SUP or to BGND. If the short-circuit condition persists,
the junction temperature of the IC rises until it reaches
the thermal-shutdown threshold (+160°C typ). Once
the juncion temperature reaches the thermal-shutdown
threshold, an internal thermal sensor immediately sets the
thermal fault latch, shutting off all the IC’s outputs. The
device remains inactive until the input voltage is cycled.
The gate-off linear-regulator controller (REG N) is an
analog gain block with an open-drain p-channel output. It
drives an external npn pass transistor with a 6.8kΩ base-
to-emitter resistor (Figure 1). Its guaranteed basedrive
source current is at least 1mA. The regulator including Q2
in Figure 1 uses a 0.47μF ceramic output capacitor and
is designed to deliver 50mA at -8V. Other output voltages
and currents are possible with the proper pass transistor
and output capacitor (see the Pass-Transistor Selection
and Stability Requirements sections).
Driving Pure Capacitive Load
REG N is typically used to provide the TFT-LCD gate driv-
ers’ gate-off voltage. A negative voltage can be produced
using a charge-pump circuit as shown in Figure 1. REG N
is enabled after the voltage on REF exceeds 1.0V. Each
time it is enabled, the control goes through a soft-start
routine that ramps down its internal reference DAC from
VREF to 250mV in 128 steps.
The operational amplifiers are typically used to drive the
LCD backplane (VCOM) or the gamma-correction divider
string. The LCD backplane consists of a distributed series
capacitance and resistance, a load that can be easily driv-
en by the operational amplifier. However, if the operational
amplifier is used in an application with a pure capacitive
load, steps must be taken to ensure stable operation.
Operational Amplifiers
As the operational amplifier’s capacitive load increases,
the amplifier’s bandwidth decreases and gain peaking
increases. A 5Ω to 50Ω small resistor placed between
OUT_ and the capacitive load reduces peaking but also
reduces the gain. An alternative method of reducing
peaking is to place a series RC network (snubber) in par-
allel with the capacitive load. The RC network does not
continuously load the output or reduce the gain. Typical
values of the resistor are between 100Ω and 200Ω, and
the typical value of the capacitor is 10nF.
The MAX1518A has five operational amplifiers, the
MAX1517A has three operational amplifiers, and the
MAX1516A has one operational amplifier. The operational
amplifiers are typically used to drive the LCD backplane
(VCOM) or the gamma-correction divider string. They
feature ±150mA output short-circuit current, 13V/μs slew
rate, and 12MHz bandwidth. The rail-to-rail input and out-
put capability maximizes system flexibility.
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MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
Undervoltage Lockout (UVLO)
The undervoltage-lockout (UVLO) circuit compares the
input voltage at IN with the UVLO threshold (2.5V ris-
ing, 2.35V falling, typ) to ensure the input voltage is high
enough for reliable operation. The 150mV (typ) hysteresis
prevents supply transients from causing a restart. Once
the input voltage exceeds the UVLO rising threshold,
startup begins. When the input voltage falls below the
UVLO falling threshold, the controller turns off the main
step-up regulator, turns off the linear-regulator outputs,
and disables the switch control block; the operationalam-
plifier outputs are high impedance.
V
IN
2.5V
V
V
V
REF
1.05V
MAIN
GON
V
V
GOFF
DEL
Reference Voltage (REF)
12ms
1.25V
SWITCH
CONTROL
ENABLED
The reference output is nominally 1.25V and can source
at least 50μA (see the Typical Operating Characteristics).
Bypass REF with a 0.22μF ceramic capacitor connected
between REF and AGND.
INPUT SOFT- SOFT-
VOLTAGE START START
OK BEGINS ENDS
Figure 6. Power-Up Sequence
Power-Up Sequence and Soft-Start
Once the voltage on IN exceeds approximately 1.7V, the
reference turns on. With a 0.22μF REF bypass capacitor,
the reference reaches its regulation voltage of 1.25V in
approximately 1ms. When the reference voltage exceeds
1.0V, the ICs enable the main step-up regulator, the
gate-on linear-regulator controller, and the gate-off linear-
regulator controller simultaneously.
no fault detected, a 5μA current source starts charging
CDEL. Once the capacitor voltage exceeds 1.25V (typ),
the switch-control block is enabled as shown in Figure
6. After the switch-control block is enabled, COM can be
connected to SRC or DRN through the internal p-channel
switches, depending upon the state of CTL. Before
startup and when IN is less than V
, DEL is internally
UVLO
The IC employs soft-start for each regulator to minimize
inrush current and voltage overshoot and to ensure a well-
defined startup behavior. During the soft-start, the main
step-up regulator directly limits the peak inductor current.
The current-limit level is increased through the soft-start
period from zero up to the full current-limit value in eight
equal current steps (ILIM / 8). The maximum load current
is available after the output voltage reaches regulation
(which terminates soft-start), or after the soft-start timer
expires. Both linear-regulator controllers use a 7-bit soft-
start DAC. For the gate-on linear regulator, the DAC out-
put is stepped in 128 steps from zero up to the reference
voltage. For the gate-off linear regulator, the DAC output
steps from the reference down to 250mV in 128 steps. The
soft-start duration is 14ms (typ) for all three regulators.
connected to AGND to discharge C
set the delay time using the following equation:
. Select C
to
DEL
DEL
5µA
C
= DELAY TIME x
DEL
1.25V
Switch-Control Block
The switch-control input (CTL) is not activated until all four
of the following conditions are satisfied: the input voltage
exceeds V , the soft-start routine of all the regulators
UVLO
is complete, there is no fault condition detected, and VDEL
exceeds its turn-on threshold. As shown in Figure 7, COM
is pulled down to PGND through a 1kΩ resistor when the
switch control is not activated. Once activated and if CTL is
high, the 5Ω internal p-channel switch (Q1) between COM
and SRC turns on and the 30Ω p-channel switch (Q2)
between DRN and COM turns off. If CTL is low, Q1 turns
off and Q2 turns on.
A capacitor (C
) from DEL to AGND determines the
DEL
switch-control-block startup delay. After the input voltage
exceeds the UVLO threshold (2.5V typ) and the soft-
start routine for each regulator is complete and there is
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MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
IN
MAX1516A
MAX1517A
MAX1518A
5mA
2.5V
FB OK
FBP OK
FBN OK
SRC
Q1
DEL
REF
COM
1kΩ
CTL
Q2
Q3
DRN
Figure 7. Switch-Control Block
Fault Protection
Thermal-Overload Protection
During steady-state operation, if the output of the main
regulator or any of the linear-regulator outputs does
not exceed its respective fault-detection threshold, the
MAX1516A/MAX1517A/MAX1518A activate an internal
fault timer. If any condition or combination of conditions
indicates a continuous fault for the fault-timer duration
(55ms typ), the MAX1516A/MAX1517A/MAX1518A set
the fault latch to shut down all the outputs except the
reference. Once the fault condition is removed, cycle the
input voltage (below the UVLO falling threshold) to clear
the fault latch and reactivate the device. The faultdetec-
tion circuit is disabled during the soft-start time.
Thermal-overload protection prevents excessive power
dissipation from overheating the MAX1516A/MAX1517A/
MAX1518A. When the junction temperature exceeds T =
J
+160°C, a thermal sensor immediately activates the fault
protection, which shuts down all outputs except the refer-
ence, allowing the device to cool down. Once the device
cools down by approximately 15°C, cycle the input volt-
age (below the UVLO falling threshold) to clear the fault
latch and reactivate the device.
The thermal-overload protection protects the controller in
the event of fault conditions. For continuous operation, do
not exceed the absolute maximum junction temperature
rating of T = +150°C.
J
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TFT-LCD DC-DC Converters with
Operational Amplifiers
Design Procedure
Main Step-Up Regulator
Inductor Selection
2
V
V
− V
η
TYP
IN
MAIN
IN
L =
V
I
x f
LIR
MAIN
MAIN(MAX)
OSC
Choose an available inductor value from an appropriate
inductor family. Calculate the maximum DC input current
The minimum inductance value, peak current rating, and
series resistance are factors to consider when select-
ing the inductor. These factors influence the converter’s
efficiency, maximum output load capability, transient-
response time, and output voltage ripple. Size and cost
are also important factors to consider.
at the minimum input voltage (V
) using conserva-
IN(MIN)
tion of energy and the expected efficiency at that operat-
ing point (η ) taken from the appropriate curve in the
MIN
Typical Operating Characteristics:
I
x V
MAIN
The maximum output current, input voltage, output volt-
age, and switching frequency determine the inductor
value. Very high inductance values minimize the cur-
rent ripple and therefore reduce the peak current, which
MAIN(MAX)
V
=
IN(DC,MAX)
V
x η
MIN
IN(MIN)
Calculate the ripple current at that operating point and the
peak current required for the inductor:
2 ®
decreases core losses in the inductor and I R losses
in the entire power path. However, large inductor values
also require more energy storage and more turns of wire,
which increases size and can increase I R losses in the
inductor. Low inductance values decrease the size but
increase the current ripple and peak current. Finding the
best inductor involves choosing the best compromise
between circuit efficiency, inductor size, and cost.
V
x V
− V
(
)
IN(MIN)
MAIN IN(MIN)
I
=
2
RIPPLE
L x V
x f
MAIN
OSC
RIPPLE
2
I
I
= I
+
IN(DC,MAX)
PEAK
Theinductor’ssaturationcurrentratingandtheMAX1516A/
The equations used here include a constant LIR, which is
the ratio of the inductor peak-to-peak ripple current to the
average DC inductor current at the full load current. The
best trade-off between inductor size and circuit efficiency
for step-up regulators generally has an LIR between 0.3
and 0.5. However, depending on the AC characteristics of
the inductor core material and ratio of inductor resistance
to other power-path resistances, the best LIR can shift up
or down. If the inductor resistance is relatively high, more
ripple can be accepted to reduce the number of turns
required and increase the wire diameter. If the inductor
resistance is relatively low, increasing inductance to lower
the peak current can decrease losses throughout the
power path. If extremely thin high-resistance inductors are
used, as is common for LCD-panel applications, the best
LIR can increase to between 0.5 and 1.0.
MAX1517A/MAX1518As’ LX current limit (I ) should
exceed IPEAK, and the inductor’s DC current rating
LIM
should exceed I
. For good efficiency, choose
IN(DC,MAX)
an inductor with less than 0.1Ω series resistance.
Considering the Typical Operating Circuit, the maximum
load current (I
) is 500mA with a 13V output and
MAIN(MAX)
a typical input voltage of 5V. Choosing an LIR of 0.5 and
estimating efficiency of 85% at this operating point:
2
5V
13V − 5V
0.85
0.5
L =
≈ 3.3µH
13V
0.5A x 1.2MHz
Using the circuit’s minimum input voltage (4.5V) and esti-
mating efficiency of 80% at that operating point:
0.5A x 13V
Once a physical inductor is chosen, higher and lower
values of the inductor should be evaluated for efficiency
improvements in typical operating regions.
I
=
≈ 1.8A
IN(DC,MAX)
4.5V x 0.8
The ripple current and the peak current are:
Calculate the approximate inductor value using the
typical input voltage (V ), the maximum output cur-
IN
4.5V x (13V − 4.5V)
I
RIPPLE
=
≈ 0.74A
rent (I
), the expected efficiency (η
MAIN(MAX)
) taken
TYP
3.3µH x 13V x 1.2MHz
0.74A
from an appropriate curve in the Typical Operating
Characteristics section, and an estimate of LIR based on
the above discussion:
I
= 1.8A +
≈ 2.2A
PEAK
2
2
I R is a registered trademark of Instruments for Research and
Industry, Inc.
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TFT-LCD DC-DC Converters with
Operational Amplifiers
where V , the step-up regulator’s feedback set point, is
FB
Output-Capacitor Selection
1.236V. Place R1 and R2 close to the IC.
The total output voltage ripple has two components: the
capacitive ripple caused by the charging and discharging
of the output capacitance, and the ohmic ripple due to the
capacitor’s equivalent series resistance (ESR):
Generating Output Voltages >13V
The maximum output voltage of the step-up regulator is
13V, which is limited by the absolute maximum rating of
the internal power MOSFET. To achieve higher output
voltages, an external n-channel MOSFET can be cas-
coded with the internal FET (Figure 8). Since the gate of
the external FET is biased from the input supply, use a
logiclevel FET to ensure that the FET is fully enhanced at
the minimum input voltage. The current rating of the FET
needs to be higher than the IC’s internal current limit.
V
= V
+ V
RIPPLE(ESR)
RIPPLE
RIPPLE(C)
I
V
−V
MAIN IN
MAIN
V
≈
, and
RIPPLE(C)
C
V
f
OUT MAIN OSC
V
≈ I
R
RIPPLE(ESR)
PEAK ESR(COUT)
where I
is the peak inductor current (see the Inductor
PEAK
Loop Compensation
Selection section). For ceramic capacitors, the output
voltage ripple is typically dominated by V . The
voltage rating and temperature characteristics of the out-
put capacitor must also be considered.
Choose R
to set the high-frequency integrator gain
COMP
RIPPLE(C)
for fast transient response. Choose C
integrator zero to maintain loop stability.
to set the
COMP
For low-ESR output capacitors, use the following equa-
tions to obtain stable performance and good transient
response:
Input-Capacitor Selection
The input capacitor (C ) reduces the current peaks
IN
drawn from the input supply and reduces noise injection
into the IC. A 22μF ceramic capacitor is used in the typi-
cal operating circuit (Figure 1) because of the high source
impedance seen in typical lab setups. Actual applications
usually have much lower source impedance since the
step-up regulator often runs directly from the output of
315 x V x V
x C
OUT
IN
OUT
R
C
≈
≈
COMP
COMP
L x I
V
MAIN(MAX)
x C
OUT
OUT
x R
10 x I
MAIN(MAX)
COMP
another regulated supply. Typically, C can be reduced
IN
below the values used in the typical operating circuit .
To further optimize transient response, vary R
in
COMP
Ensure a low-noise supply at IN by using adequate C .
IN
20% steps and C
in 50% steps while observing
COMP
Alternately, greater voltage variation can be tolerated on
transient-response waveforms.
C
if IN is decoupled from C using an RC lowpass filter
IN
IN
(see R10 and C18 in Figure 1).
Charge Pumps
Rectifier Diode
Selecting the Number of Charge-Pump Stages For
highest efficiency, always choose the lowest number of
charge-pump stages that meet the output requirement.
Figures 9 and 10 show the positive and negative charge-
The MAX1516A/MAX1517A/MAX1518As’ high switch-
ing frequency demands a high-speed rectifier. Schottky
diodes are recommended for most applications because
of their fast recovery time and low forward voltage. In
general, a 2A Schottky diode complements the internal
MOSFET well.
pump output voltages for a given V
and three-stage charge pumps.
for one-, two-,
MAIN
The number of positive charge-pump stages is given by:
Output-Voltage Selection
V
+ V
− V
GON
DROPOUT MAIN
The output voltage of the main step-up regulator can be
adjusted by connecting a resistive voltage-divider from
n
=
POS
V
− 2 x V
D
MAIN
the output (V
) to AGND with the center tap connect-
MAIN
ed to FB (see Figure 1). Select R2 in the 10kΩ to 50kΩ
range. Calculate R1 with the following equation:
where n
stages, V
is the number of positive charge-pump
POS
is the gate-on linear-regulator REG P
GON
output, V
is the main step-up regulator output, V is
MAIN
D
V
MAIN
the forward-voltage drop of the charge-pump diode, and
is the dropout margin for the linear regulator.
R1 = R2 x
−1
V
V
DROPOUT
FB
Use V
= 0.3V.
DROPOUT
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TFT-LCD DC-DC Converters with
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a negligible effect on output-current capability because
the internal switch resistance and the diode impedance
place a lower limit on the source impedance. A 0.1μF
ceramic capacitor works well in most low-current applica-
tions. The flying capacitor’s voltage rating must exceed
the following:
V
>13V
MAIN
V
IN
LX
FB
V
= nxV
MAIN
CX
STEP-UP
CONTROLLER
where n is the stage number in which the flying capaci-
PGND
tor appears, and V
step-up regulator.
is the output voltage of the main
MAIN
MAX1516A
MAX1517A
MAX1518A
Charge-Pump Output Capacitor
Increasing the output capacitance or decreasing the ESR
reduces the output ripple voltage and the peak-topeak
transient voltage. With ceramic capacitors, the output
voltage ripple is dominated by the capacitance value.
Use the following equation to approximate the required
capacitor value:
Figure 8. Operation with Output Voltages >13V Using
Cascoded MOSFET
The number of negative charge-pump stages is given by:
−V
+ V
DROPOUT
GOFF
I
LOAD_CP
n
=
NEG
C
≥
OUT_CP
V
− 2 x V
D
MAIN
2f
V
OSC RIPPLE_CP
where n
stages, V
output, V
is the number of negative charge-pump
NEG
where C
pump, I
is the output capacitor of the charge
is the load current of the charge pump,
is the peak-to-peak value of the output
OUT_CP
LOAD_CP
is the gate-off linear-regulator REG N
GOFF
is the main step-up regulator output, V is
MAIN
D
and V
ripple.
RIPPLE_CP
the forward-voltage drop of the charge-pump diode, and
is the dropout margin for the linear regulator.
V
DROPOUT
Charge-Pump Rectifier Diodes
Use V
= 0.3V.
DROPOUT
Use low-cost silicon switching diodes with a current rating
equal to or greater than two times the average charge-
pump input current. If it helps avoid an extra stage, some
or all of the diodes can be replaced with Schottky diodes
with an equivalent current rating.
The above equations are derived based on the assump-
tion that the first stage of the positive charge pump is con-
nected to V
and the first stage of the negative charge
MAIN
pump is connected to ground. Sometimes fractional
stages are more desirable for better efficiency. This can
be done by connecting the first stage to V or another
available supply. If the first charge-pump stage is powered
IN
Linear-Regulator Controllers
Output-Voltage Selection
from V , then the above equations become:
IN
Adjust the gate-on linear-regulator (REG P) output volt-
age by connecting a resistive voltage-divider from the
REG P output to AGND with the center tap connected to
FBP (Figure 1). Select the lower resistor of divider R5 in
the 10kΩ to 30kΩ range. Calculate upper resistor R4 with
the following equation:
V
+ V
− V
GON
DROPOUT MAIN
POS
NEG
V
2 x V
D
MAIN
−V
+ V
+ V
IN
GOFF
V
DROPOUT
2 x V
MAIN
D
V
Flying Capacitors
GON
R4 = R5 x
−1
Increasing the flying-capacitor (C ) value lowers the
X
effective source impedance and increases the outputcur-
V
FBP
rent capability. Increasing the capacitance indefinitely has
where V
= 1.25V (typ).
FBP
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NEGATIVE CHARGE-PUMP
POSITIVE CHARGE-PUMP
OUTPUT VOLTAGE vs. V
OUTPUT VOLTAGE vs. V
MAIN
MAIN
-0
-5
60
50
40
30
20
10
0
1-STAGE
CHARGE PUMP
3-STAGE CHARGE PUMP
= 0.3V TO 1V
V
D
-10
-15
-20
-25
-30
-35
-40
-45
2-STAGE CHARGE PUMP
2-STAGE
CHARGE PUMP
3-STAGE
CHARGE PUMP
1-STAGE CHARGE PUMP
V
= 0.3V TO 1V
D
2
4
6
8
10
12
14
2
4
6
8
10
12
14
V
MAIN
(V)
V
(V)
MAIN
Figure 9. Positive Charge-Pump Output Voltage vs. V
Figure 10. Negative Charge-Pump Output Voltage vs. V
MAIN
MAIN
Adjust the gate-off linear-regulator REG N output voltage
by connecting a resistive voltage-divider from V to
REF with the center tap connected to FBN (Figure 1).
Select R8 in the 20kΩ to 50kΩ range. Calculate R7 with
the following equation:
Therefore, transistors with current gain over 100 at the
maximum output current can be difficult to stabilize and
are not recommended unless the high gain is needed to
meet the load-current requirements.
GOFF
The transistor’s saturation voltage at the maximum output
current determines the minimum input-to-output voltage
differential that the linear regulator can support. Also,
the package’s power dissipation limits the usable maxi-
mum input-to-output voltage differential. The maximum
power-dissipation capability of the transistor’s package
and mounting must exceed the actual power dissipated
in the device. The power dissipated equals the maximum
V
− V
GOFF
FBN
R7 = R8 x
V
− V
FBN
REF
where V
= 250mV, V
= 1.25V. Note that REF can
FBN
REF
only source up to 50μA; using a resistor less than 20kΩ
for R8 results in higher bias current than REF can supply.
load current (I
) multiplied by the maximum
LOAD(MAX)_LR
Pass-Transistor Selection
input-to-output voltage differential:
The pass transistor must meet specifications for current
gain (h ), input capacitance, collector-emitter saturation
voltage and power dissipation. The transistor’s current
gain limits the guaranteed maximum output current to:
P =I
x V
− V
FE
(
)
LOAD(MAX)_LR
IN(MAX)_LR OUT_LR
where V
is the maximum input voltage of the
IN(MAX)_LR
linear regulator, and V
linear regulator.
is the output voltage of the
OUT_LR
V
R
BE
I
= I
−
x h
FE(MIN)
LOAD(MAX)
DRV
BE
Stability Requirements
The MAX1516A/MAX1517A/MAX1518A linear-regulator
controllers use an internal transconductance amplifier to
drive an external pass transistor. The transconductance
amplifier, the pass transistor, the base-emitter resistor,
and the output capacitor determine the loop stability. The
following applies to both linear-regulator controllers in the
MAX1516A/MAX1517A/MAX1518A.
where I
rent, V
voltage drop, and R
between the transistor’s base and emitter. Furthermore,
the transistor’s current gain increases the linear regula-
tor’s DC loop gain (see the Stability Requirements sec-
tion), so excessive gain destabilizes the output.
is the minimum guaranteed base-drive cur-
is the transistor’s base-to-emitter forward
DRV
BE
is the pullup resistor connected
BE
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The transconductance amplifier regulates the output volt-
age by controlling the pass transistor’s base current. The
total DC loop gain is approximately:
of the pass transistor, and f is the transition frequen-
T
cy. Both parameters can be found in the transistor’s
data sheet. Because R
is much greater than R ,
BE
IN
the above equation can be simplified:
I
x h
FE
10
BIAS
I
x V
REF
A
=
1+
V_LR
1
V
T
LOAD_LR
f
=
POLE_IN
2π x C x R
IN
IN
where V is 26mV at room temperature, and I
is the
T
BIAS
current through the base-to-emitter resistor (R ). For the
Substituting for C and R yields:
IN IN
BE
MAX1516A/MAX1517A/MAX1518A, the bias currents for
both the gate-on and gate-off linear-regulator controllers are
0.1mA. Therefore, the base-to-emitter resistor for both lin-
ear regulators should be chosen to set 0.1mA bias current:
f
T
f
=
POLE_IN
h
FE
4) Next, calculate the pole set by the linear regulator’s
feedback resistance and the capacitance between
FB_ and AGND (including stray capacitance):
V
0.7V
BE
R
=
=
≈ 6.8kΩ
BE
0.1mA 0.1mA
1
The output capacitor and the load resistance create the
dominant pole in the system. However, the internal ampli-
fier delay, pass transistor’s input capacitance, and the
stray capacitance at the feedback node create additional
poles in the system, and the output capacitor’s ESR gen-
erates a zero. For proper operation, use the following
equations to verify the linear regulator is properly com-
pensated:
f
=
POLE_FB
2π x C
x R
(
� R
UPPER LOWER
)
FB
where C
AGND, R
is the capacitance between FB_ and
FB
is the upper resistor of the linear
regulator’s feedback divider, and RLOWER is the
lower resistor of the divider.
UPPER
5) Next, calculate the zero caused by the output capaci-
tor’s ESR:
1) First, determine the dominant pole set by the linear
regulator’s output capacitor and the load resistor:
1
I
f
=
LOAD MAX_ LR
POLE_ESR
2π x C
x R
ESR
f
=
OUT_LR
POLE_LR
2π x C
x V
OUT_ LR
OUT_ LR
where R
is the equivalent series resistance of
ESR
The unity-gain crossover of the linear regulator is:
C
.
OUT_LR
2) The pole created by the internal amplifier delay is
approximately 1MHz:
To ensure stability, choose C
large enough so
OUT_LR
the crossover occurs well before the poles and zero
calculated in steps 2 to 5. The poles in steps 3 and
4 generally occur at several megahertz, and using
ceramic capacitors ensures the ESR zero occurs at
several megahertz as well. Placing the crossover
below 500kHz is sufficient to avoid the amplifier-delay
pole and generally works well, unless unusual compo-
nent choices or extra capacitances move one of the
other poles or the zero below 1MHz.
f
= 1MHz
POLE_AMP
3) Next, calculate the pole set by the transistor’s input
capacitance, the transistor’s input resistance, and the
base-to-emitter pullup resistor:
1
f
=
POLE_IN
2π x C x R
�R
IN
(
)
IN
BE
g
m
where C
=
,
IN
2πf
T
h
FE
R
=
, g is the transconductance
m
IN
g
m
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TFT-LCD DC-DC Converters with
Operational Amplifiers
tor, to the IC’s LX pin, out of PGND, and to the input
capacitor’s negative terminal. The highcurrent output
loop is from the positive terminal of the input capacitor
to the inductor, to the output diode (D1), and to the
positive terminal of the output capacitors, reconnect-
ing between the output capacitor and input capacitor
ground terminals. Connect these loop components
with short, wide connections. Avoid using vias in the
high-current paths. If vias are unavoidable, use many
vias in parallel to reduce resistance and inductance.
Applications Information
Power Dissipation
An IC’s maximum power dissipation depends on the ther-
mal resistance from the die to the ambient environment
and the ambient temperature. The thermal resistance
depends on the IC package, PC board copper area, other
thermal mass, and airflow.
The MAX1516A/MAX1517A/MAX1518A, with their
exposed backside pad soldered to 1in of PC board cop-
2
per, can dissipate about 1.7W into +70°C still air. More
PC board copper, cooler ambient air, and more airflow
increase the possible dissipation, while less copper or
warmer air decreases the IC’s dissipation capability. The
major components of power dissipation are the power dis-
sipated in the step-up regulator and the power dissipated
by the operational amplifiers.
● Create a power-ground island (PGND) consisting of
the input and output capacitor grounds, PGND pin,
and any charge-pump components. Connect all these
together with short, wide traces or a small ground
plane. Maximizing the width of the powerground
traces improves efficiency and reduces output volt-
age ripple and noise spikes. Create an analog ground
plane (AGND) consisting of the AGND pin, all the
feedback-divider ground connections, the operational-
amplifier divider ground connections, the COMP and
DEL capacitor ground connections, and the device’s
exposed backside pad. Connect the AGND and PGND
islands by connecting the PGND pin directly to the
exposed backside pad. Make no other connections
between these separate ground planes.
Step-Up Regulator
The largest portions of power dissipation in the step-up
regulator are the internal MOSFET, the inductor, and
the output diode. If the step-up regulator has 90% effi-
ciency, about 3% to 5% of the power is lost in the internal
MOSFET, about 3% to 4% in the inductor, and about 1%
in the output diode. The remaining 1% to 3% is distributed
among the input and output capacitors and the PC board
traces. If the input power is about 5W, the power lost in
the internal MOSFET is about 150mW to 250mW.
● Place all feedback voltage-divider resistors as close
to their respective feedback pins as possible. The
divider’s center trace should be kept short. Placing the
resistors far away causes their FB traces to become
antennas that can pick up switching noise. Take care
to avoid running any feedback trace near LX or the
switching nodes in the charge pumps.
Operational Amplifier
The power dissipated in the operational amplifiers
depends on their output current, the output voltage, and
the supply voltage:
● Place the IN pin and REF pin bypass capacitors
asclose to the device as possible. The ground con-
nectionof the IN bypass capacitor should be connect-
eddirectly to the AGND pin with a wide trace.
PD
= I
x (V
– V
)
SOURCE
PD
OUT_(SOURCE)
= I
SUP
OUT_
x V
SINK
OUT_(SINK)
OUT_
where I
is the output current sourced by
OUT_(SOURCE)
the operational amplifier, and I
current that the operational amplifier sinks.
is the output
OUT_(SINK)
● Minimize the length and maximize the width of thet-
races between the output capacitors and the loadfor
best transient responses.
In a typical case where the supply voltage is 13V and
the output voltage is 6V with an output source current of
30mA, the power dissipated is 180mV.
● Minimize the size of the LX node while keeping itwide
and short. Keep the LX node away from feedback
nodes (FB, FBP, and FBN) and analog ground.
Use DC traces to shield if necessary. Refer to the
MAX1518A evaluation kit for an example of proper PC
board layout.
PC Board Layout and Grounding
Careful PC board layout is important for proper operation.
Use the following guidelines for good PC board layout:
● Minimize the area of high-current loops by placing
the inductor, the output diode, and the output capaci-
tors near the input capacitors and near the LX and
PGND pins. The high-current input loop goes from the
positive terminal of the input capacitor to the induc-
Chip Information
PROCESS: BiCMOS
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Pin Configurations
TOP VIEW
24 23 22 21 20 19 18 17
FBP 25
16 N.C.
15 N.C.
14 SUP
13 N.C.
12 N.C.
11 BGND
10 I.C.
DRVP 26
FBN 27
DRVN 28
DEL 29
CTL 30
DRN 31
COM 32
MAX1516A
9
N.C.
1
2
3
4
5
6
7
8
THIN QFN
5mm x 5mm
N.C. = NOT INTERNALLY CONNECTED
I.C. = INTERNALLY CONNECTED
TOP VIEW
TOP VIEW
24 23 22 21 20 19 18 17
24 23 22 21 20 19 18 17
FBP
DRVP
FBN
25
26
27
16 NEG3
15 POS3
14 SUP
13 N.C.
12 N.C.
11 BGND
10 POS2
FBP
DRVP
FBN
25
16 NEG4
15 POS4
14 SUP
26
27
28
29
30
31
32
DRVN 28
DEL 29
DRVN
DEL
13 OUT3
12 POS3
11 BGND
10 POS2
MAX1517A
MAX1518A
CTL
DRN 31
COM
32
30
CTL
DRN
COM
9
NEG2
9
NEG2
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
THIN QFN
5mm x 5mm
THIN QFN
5mm x 5mm
N.C. = NOT INTERNALLY CONNECTED
I.C. = INTERNALLY CONNECTED
Maxim Integrated
│ 25
www.maximintegrated.com
MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
Package Information
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Maxim Integrated
│ 26
www.maximintegrated.com
MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
Package Information (continued)
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Maxim Integrated
│ 27
www.maximintegrated.com
MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
Package Information (continued)
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Maxim Integrated
│ 28
www.maximintegrated.com
MAX1516A/MAX1517A/
MAX1518A
TFT-LCD DC-DC Converters with
Operational Amplifiers
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
DESCRIPTION
0
1
4/06
Initial release
—
1
10/14
Removed automotive reference from Applications
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2014 Maxim Integrated Products, Inc.
│ 29
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