MAX16058ATA26+T [MAXIM]
Power Supply Management Circuit, Adjustable, 1 Channel, BICMOS, TDFN-8;
| 型号： | MAX16058ATA26+T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Power Supply Management Circuit, Adjustable, 1 Channel, BICMOS, TDFN-8 PC 输入元件 信息通信管理 |
| 文件： | 总17页 (文件大小：621K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MAX16056–MAX16059
125nA nanoPower Supervisory Circuits
with Capacitor-Adjustable Reset
and Watchdog Timeouts
General Description
The MAX16056–MAX16059 are ultra-low-current 125nA
(typ) microprocessor (μP) supervisory circuits that moni-
tor a single system supply voltage. These devices assert
Benefits and Features
● Reduced Power Requirements
• Ultra-Low 125nA (typ) Supply Current
• 1.1V to 5.5V Operating Supply Range
an active-low reset signal whenever the V
supply
CC
● Configurable Circuit Enables Flexible Designs
• Factory-Set Reset Threshold Options from 1.575V
to 4.625V in Approximately 100mV Increments
• Capacitor-Adjustable Reset Timeout
• Capacitor-Adjustable Watchdog Timeout
(MAX16056/MAX16058)
voltage drops below the factory-trimmed reset threshold,
manual reset is pulled low, or the watchdog timer runs
out (MAX16056/MAX16058). The reset output remains
asserted for an adjustable reset timeout period after V
CC
rises above the reset threshold. Factory-trimmed reset
threshold voltages are offered from 1.575V to 4.625V in
approximately 100mV increments (see Table 1).
• Watchdog Timer Capacitor Open Detect Function
• Optional Watchdog Disable Function (MAX16056/
MAX16058)
• Manual-Reset Input
• Push-Pull or Open-Drain RESET Output Options
These devices feature adjustable reset and watchdog
timeout using external capacitors. The MAX16056/
MAX16058 contain a watchdog timer with a watchdog
select input (WDS) that multiplies the watchdog timeout
period by 128. The MAX16057/MAX16059 do not have
the watchdog feature.
● Integrated Features Increases System Robustness
• Power-Supply Transient Immunity
• Guaranteed RESET Valid for V
≥ 1.1V
CC
The MAX16056–MAX16059 are available in either push-
pull or open-drain output-type configurations (see the
Ordering Information). These devices are fully specified
over the -40°C to +125°C automotive temperature range.
The MAX16056/MAX16058 are available in an 8-pin
TDFN package, and the MAX16057/MAX16059 are avail-
able in a 6-pin TDFN package.
● Saves Board Space
• 3mm x 3mm TDFN Package
Applications
● Portable/Battery-Powered Equipment
● PDAs/Cell Phones
● MP3 Players/Pagers
● Glucose Monitors/Patient Monitors
● Metering/HVAC
Typical Operating Circuit and Ordering Information appear
at end of data sheet.
Pin Configurations
V
WDS WDI SRT
V
N.C.
5
SRT
4
CC
CC
TOP VIEW
6
8
7
6
5
MAX16056
MAX16058
MAX16057
MAX16059
EP
4
EP
1
2
3
1
2
3
RESET GND SWT MR
RESET GND
MR
TDFN
TDFN
*CONNECT EXPOSED PAD TO GND.
19-4686; Rev 5; 3/17
MAX16056–MAX16059
125nA nanoPower Supervisory Circuits
with Capacitor-Adjustable Reset
and Watchdog Timeouts
Absolute Maximum Ratings
V
to GND ............................................................-0.3V to +6V
Operating Temperature Range......................... -40°C to +125°C
Storage Temperature Range............................ -65°C to +150°C
Junction Temperature......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow).......................................+260°C
CC
SRT, SWT, WDS, MR, WDI, to GND........ -0.3V to (V
RESET (Push-Pull) to GND ..................... -0.3V to (V
+ 0.3V)
+ 0.3V)
CC
CC
RESET (Open-Drain) to GND .................................-0.3V to +6V
Input Current (all pins)......................................................±20mA
Output Current (RESET)..................................................±20mA
Continuous Power Dissipation (T = +70°C)
A
6-Pin TDFN (derate 23.8mW/°C above +70°C) ........1905mW
8-Pin TDFN (derate 24.4mW/°C above +70°C) ........1951mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics (Note 1)
6 TDFN
8 TDFN
Junction-to-Ambient Thermal Resistance (θ ) ..........41°C/W
Junction-to-Ambient Thermal Resistance (θ ) ..........42°C/W
JA
JA
Junction-to-Case Thermal Resistance (θ ).................9°C/W
Junction-to-Case Thermal Resistance (θ ).................8°C/W
JC
JC
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(V
= 1.2V to 5.5V, T = T
to T
, unless otherwise noted. Typical values are at V
= 3.3V, T = +25°C.) (Note 2)
CC A
CC
A
MIN
MAX
PARAMETER
SYMBOL
CONDITIONS
= 0°C to +125°C
MIN
1.1
TYP
MAX
5.5
UNITS
T
T
A
Supply Voltage
V
V
CC
= -40°C to 0°C
1.2
5.5
A
V
= 5.0V, T =
A
CC
142
132
125
142
132
210
185
175
430
415
-40°C to +85°C
V
= 3.3V, T
=
=
=
CC
A
-40°C to +85°C
V
= 1.8V, T
CC
A
V
> V + 150mV,
TH
CC
-40°C to +85°C
no load, reset output
deasserted (Note 3)
nA
Supply Current
I
CC
V
= 5.0V, T
CC
A
-40°C to +125°C
V
= 3.3V, T =
A
CC
-40°C to +125°C
V
= 1.8V, T
=
A
CC
125
400
-40°C to +125°C
V
CC
V
CC
V
CC
< V , no load, reset output asserted
7
15
µA
V
TH
V
1.5%
-
V
+
TH
1.5%
TH
T
= +25°C
A
V
Reset Threshold
V
falling (see Table 1)
CC
TH
T
= -40°C to
V
-
V
+
TH
2.5%
A
TH
+125°C
2.5%
Hysteresis
V
HYST
rising
0.5
%
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MAX16056–MAX16059
125nA nanoPower Supervisory Circuits
with Capacitor-Adjustable Reset
and Watchdog Timeouts
Electrical Characteristics (continued)
(V
= 1.2V to 5.5V, T = T
to T
, unless otherwise noted. Typical values are at V
= 3.3V, T = +25°C.) (Note 2)
CC A
CC
A
MIN
MAX
PARAMETER
SYMBOL
CONDITIONS
falling from (V + 100mV) to
MIN
TYP
MAX
UNITS
µs
V
CC
TH
V
CC
to Reset Delay
t
80
RD
(V - 100mV) at 10mV/µs
TH
Reset Timeout Period
t
C
= 2700pF (Note 4)
10.5
197
14.18
240
17.0
ms
RP
SRT
T
= -40°C to
A
282
+125°C
V
V
= 0V to V
,
SRT
RAMP1
I
nA
SRT Ramp Current
RAMP1
= 1.6V to 5V
CC
T
= +25°C
210
240
270
A
SRT Ramp Threshold
V
V
= 1.6V to 5V (V
rising)
1.173
5
1.235
6.4
1.297
8
V
RAMP1
CC
RAMP
T
T
= +25°C
A
Watchdog Timeout Clock Period
t
ms
WDPER
= -40°C to +125°C
3.5
6.4
9.5
A
T
= -40°C to
A
197
240
282
V
V
= 0V to V
= 1.6V to 5V
,
RAMP2
+125°C
SWT
SWT Ramp Current
I
nA
RAMP2
CC
T
A
= +25°C
210
240
270
SWT Ramp Threshold
V
V
V
V
V
= 1.6V to 5V (V rising)
RAMP2
1.173
1.235
1.297
0.3
V
RAMP2
CC
CC
CC
CC
≥ 1.0V, I
≥ 2.7V, I
≥ 4.5V, I
= 50µA
SINK
SINK
SINK
V
= 1.2mA
= 3.2mA
0.3
OL
0.4
V
CC
≥ 1.8V,
0.8 x
V
RESET Output Voltage
I
= 200µA
V
CC
SOURCE
V
≥ 2.25V,
0.8 x
V
CC
CC
V
MAX16056/MAX16057
OH
I
= 500µA
SOURCE
V
≥ 4.5V,
0.8 x
CC
I
= 800µA
V
CC
SOURCE
V
> V , reset not asserted, V
TH RESET
=
RESET Output-Leakage Current,
Open Drain
CC
I
1.0
µA
LKG
5.5V (MAX16058/MAX16059)
0.7 x
V
IH
V
CC
Input-Logic Levels
V
0.3 x
V
IL
V
CC
t
1
µs
ns
ns
ns
nA
MR Minimum Pulse Width
MR Glitch Rejection
MPW
200
250
t
MR-to-RESET Delay
MRD
WDI Minimum Pulse Width
(Note 5)
MR, WDI, WDS is connected to GND or V
150
Input Leakage Current
-100
+100
CC
Note 2: Devices are production tested at T = +25°C. Specifications over temperature limits are guaranteed by design.
A
and t
Note 3: WDI input period is 1s with t
< 50ns.
RISE
FALL
Note 4: Worst case of SRT ramp current and voltage is used to guarantee minimum and maximum limits.
Note 5: Guaranteed by design, not production tested.
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MAX16056–MAX16059
125nA nanoPower Supervisory Circuits
with Capacitor-Adjustable Reset
and Watchdog Timeouts
Typical Operating Characteristics
(V
= 2.5V, T = +25°C, unless otherwise noted.)
CC
A
RESET TIMEOUT PERIOD
SUPPLY CURRENT
vs. C
vs. SUPPLY VOLTAGE
SUPPLY CURRENT vs. TEMPERATURE
SRT
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
10.0
350
300
250
200
150
100
50
V
= 2.23V
TH
RESET IS NOT ASSERTED
V
TH
= 1.575V
V
CC
= 5.5V
V
= 3.3V
= 2.5V
CC
1.0
T
= -40°C
A
T
= +125°C
A
T
A
= +85°C
T
= +25°C
A
V
CC
5
V
CC
= 1.8V
0.1
0
0
50
100
150
200
250
300
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
(V)
-40 -25 -10
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
C
SRT
(nF)
V
CC
NORMALIZED RESET TIMEOUT PERIOD
vs. TEMPERATURE
NORMALIZED WATCHDOG
TIMEOUT PERIOD vs. TEMPERATURE
MAXIMUM V TRANSIENT DURATION
CC
vs. RESET THRESHOLD OVERDRIVE
1.10
1.08
1.06
1.04
1.02
1.00
0.98
0.96
0.94
0.92
0.90
1.05
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0.97
0.96
0.95
1000
100
10
RESET OCCURS ABOVE THIS LINE
V
CC
FALLING FROM V + 100mV
TH
1
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -25 -10
5
20 35 50 65 80 95 110 125
10
100
1000
TEMPERATURE (°C)
TEMPERATURE (°C)
RESET THRESHOLD OVERDRIVE (mV)
NORMALIZED RESET THRESHOLD
VOLTAGE vs. TEMPERATURE
V
TO RESET DELAY
vs. TEMPERATURE
CC
1.020
120
110
100
90
V
CC
= V + 100mV TO V - 100mV
TH TH
1.015
1.010
1.005
1.000
0.995
0.990
0.985
0.980
80
70
60
50
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
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MAX16056–MAX16059
125nA nanoPower Supervisory Circuits
with Capacitor-Adjustable Reset
and Watchdog Timeouts
Typical Operating Characteristics (continued)
(V
= 2.5V, T = +25°C, unless otherwise noted.)
CC
A
RESET OUTPUT-HIGH VOLTAGE
vs. SOURCE CURRENT
RESET OUTPUT-LOW VOLTAGE
SUPPLY CURRENT vs. WATCHDOG
SWITCHING FREQUENCY
vs. SINK CURRENT
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
0.30
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0.25
0.20
0.15
0.10
0.05
0
V
= 2.5V
CC
V
= 1.8V
V
CC
= 1.8V
CC
V
= 3.3V
CC
V
CC
= 3.3V
V
CC
= 2.5V
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
(mA)
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
(mA)
0.01
0.1
1
10
100 1000 10,000
I
I
SOURCE
WATCHDOG SWITCHING FREQUENCY (kHz)
SINK
MANUAL-RESET DELAY
vs. TEMPERATURE
MANUAL-RESET DELAY
MAX16056 toc13
270
268
266
264
262
260
258
256
254
252
250
MR
1V/div
RESET
1V/div
-40 -25 -10
5
20 35 50 65 80 95 110 125
200ns/div
TEMPERATURE (°C)
RESET SINK CAPABILITY
vs. SUPPLY VOLTAGE
RESET SOURCE CAPABILITY
vs. SUPPLY VOLTAGE
10
9
8
7
6
5
4
3
2
1
0
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= 0.8 x V
CC
RESET
V
= 0.3V
RESET
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
(V)
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
(V)
V
CC
V
CC
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MAX16056–MAX16059
125nA nanoPower Supervisory Circuits
with Capacitor-Adjustable Reset
and Watchdog Timeouts
Pin Description
PIN
NAME
FUNCTION
MAX16056/ MAX16057/
MAX16058
MAX16059
Push-Pull or Open-Drain Reset Output. RESET asserts whenever V
drops below the
CC
selected reset threshold voltage (V ) or manual reset is pulled low. RESET remains
RESET low for the reset timeout period after all reset conditions are deasserted, and then goes
TH
1
2
1
2
high. The watchdog timer triggers a reset pulse (t ) whenever a watchdog fault occurs
RP
(MAX16056/MAX16058).
GND
Ground
Watchdog Timeout Input. Connect a capacitor between SWT and GND to set the basic
watchdog timeout period (t ). Determine the period by the formula t
= Floor[C
x
WD
WD
SWT
6
5.15 x 10 /6.4ms] x 6.4ms + 3.2ms (Note 6) with t
in seconds and C
in Farads, or
WD
SWT
3
—
SWT
use Table 2. Extend the basic watchdog timeout period by using the WDS input. Connect
SWT to ground to disable the watchdog timer function. The value of the capacitor must be
between 2275pF and 0.54µF to have a valid watchdog timeout period.
Manual-Reset Input. Drive MR low to manually reset the device. RESET remains asserted
for the reset timeout period after MR is released. There is no internal pullup on MR. MR
4
3
4
MR
must not be left unconnected. Connect MR to V
if not used.
CC
Reset Timeout Input. Connect a capacitor from SRT to GND to select the reset timeout
6
period. Determine the period as follows: t
= 5.15 x 10 x C
with t
in seconds and
RP
SRT
RP
5
SRT
C
in Farads, or use Table 2. The value of the capacitor must be between 39pF and
SRT
4.7µF.
Watchdog Input. A falling transition must occur on WDI within the selected watchdog
timeout period or a reset pulse occurs. The watchdog timer clears when a falling transition
occurs on WDI or whenever RESET is asserted. Connect SWT to ground to disable the
watchdog timer function.
6
—
WDI
Watchdog Select Input. WDS selects the watchdog timeout mode. Connect WDS to ground
to select normal mode. The watchdog timeout period is t . Connect WDS to V
to
WD
CC
7
—
6
WDS
select extended mode, multiplying the basic timeout period (t ) by a factor of 128. A
WD
change in the state of WDS clears the watchdog timer.
Supply Voltage. V
is the power-supply input and the input for fixed-threshold V
CC
CC
8
V
CC
monitor. For noisy systems, bypass V
with a 0.1µF capacitor to GND.
CC
—
—
5
N.C.
EP
No Connection. Not internally connected.
Exposed Pad. Connect EP to GND or leave unconnected.
—
Note 6: Floor: take the integral value.
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MAX16056–MAX16059
125nA nanoPower Supervisory Circuits
with Capacitor-Adjustable Reset
and Watchdog Timeouts
Watchdog Timer
Detailed Description
The MAX16056/MAX16058’s watchdog timer circuitry
monitors the μP’s activity. If the μP does not tog-
gle (high to low) the watchdog input (WDI) within the
The MAX16056–MAX16059 are ultra-low-current 125nA
(typ) μP supervisory circuits that monitor a single system
supply voltage. These devices assert an active-low reset
capacitor-adjustable watchdog timeout period (t
),
signal whenever the V
supply voltage drops below
WD
CC
RESET asserts for the reset timeout period (t ). The
the factory-trimmed reset threshold, manual reset is
pulled low, or the watchdog timer runs out (MAX16056/
MAX16058). The reset output remains asserted for an
adjustable reset timeout period after V
reset threshold. The reset and watchdog delay periods
RP
internal watchdog timer is cleared by: 1) any event that
asserts RESET, 2) a falling transition at WDI (that can
detect pulses as short as 150ns), or 3) a transition (high to
low or low to high) at WDS. While RESET is asserted, the
watchdog timer remains cleared and does not count. As
soon as RESET deasserts, the watchdog timer resumes
counting.
rises above the
CC
are adjustable using external capacitors.
RESET Output
The MAX16056–MAX16059 μP supervisory circuits assert
a reset to prevent code-execution errors during power-up,
power-down, and brownout conditions. The reset output is
There are two modes of watchdog operation, normal
mode and extended mode. In normal mode (Figure 2),
the watchdog timeout period is determined by the value
of the capacitor connected between SWT and ground. In
extended mode (Figure 3), the watchdog timeout period
is multiplied by 128. For example, in extended mode, a
0.33μF capacitor gives a watchdog timeout period of 217s
(Table 2). To disable the watchdog timer function, connect
SWT to ground.
guaranteed to be valid for V
down to 1.1V.
CC
When V
output asserts low. Once V
falls below the reset threshold, the RESET
CC
exceeds the reset thresh-
CC
old plus the hysteresis, an internal timer keeps the
RESET output asserted for the capacitor-adjusted reset
timeout period (t ), then after this interval the RESET
RP
output deasserts (Figure 1). The reset function features
When V
ramps above V
+ V
, the value of the
CC
TH
HYST
immunity to power-supply voltage transients.
external SWT capacitor is sampled after RESET goes
high. When sampling is finished, the capacitor value is
stored in the device and is used to set watchdog timeout.
If RESET goes low before sampling is finished, the device
interrupts sampling, and sampling is restarted when
RESET goes high again.
Manual-Reset Input (MR)
Many μP-based products require manual-reset capability,
allowing the operator, a test technician, or external logic
circuitry to initiate a reset. The MAX16056–MAX16059
feature an MR input. A logic-low on MR asserts a reset.
RESET remains asserted while MR is low and for the
If the external SWT capacitor is less than 470pF, the
sampling result sets the watchdog timeout to zero. This
causes the watchdog to assert RESET continuously
after sampling is finished. If a PCB manufacturing defect
timeout period (t )after MR returns high. Connect MR to
RP
V
if unused. MR can be driven with CMOS logic levels
CC
or with open-drain/collector outputs (with a pullup resis-
caused the connection to C
to be broken, the
tor). Connect a normally open momentary switch from
SWT
capacitance is very low and RESET is continuously
asserted. If the external SWT capacitor is greater than
0.47μF, the sampling result sets the watchdog timeout to
be infinite, disabling the watchdog function.
MR to GND and a resistor from MR to V
to implement
CC
a manual-reset function; external debounce circuitry is not
required. If MR is driven by long cables or the device is
used in a noisy environment, connect a 0.1μF capacitor
from MR to GND to provide additional noise immunity.
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MAX16056–MAX16059
125nA nanoPower Supervisory Circuits
with Capacitor-Adjustable Reset
and Watchdog Timeouts
V
TH
+ V
HYST
V
TH
V
CC
t
t
RP
RP
t
t
RD
MRD
RESET
t
MPW
MR
Figure 1. RESET Timing Relationship
V
CC
t
t
WDI
RP
WD
0V
V
CC
RESET
0V
NORMAL MODE (WDS = GND)
Figure 2. Watchdog Timing Diagram, Normal Mode (WDS = GND)
V
CC
t
x 128
WDI
WD
0V
V
CC
t
RP
RESET
0V
EXTENDED MODE (WDS = V
)
CC
Figure 3. Watchdog Timing Diagram, Extended Mode (WDS = V
)
CC
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MAX16056–MAX16059
125nA nanoPower Supervisory Circuits
with Capacitor-Adjustable Reset
and Watchdog Timeouts
by substituting the minimum, typical, and maximum values
into the equation.
Applications Information
Selecting the Reset Timeout Capacitor
The reset timeout period is adjustable to accommodate
a variety of μP applications. To adjust the reset timeout
For example, if C
= 100nF:
SWT
-9
-9
t
= Floor[100 x 10 x 1.173/(282 x 10 )/9.5ms] x
WDMIN
3.5ms + 0.5 x 3.2ms = 141.7ms
period (t ), connect a capacitor (C
) between SRT
RP
SRT
-9
-9
and ground. The reset timeout capacitor is calculated as
follows:
t
= Floor[100 x 10 x 1.235/(240 x 10 )/6.4ms] x
WDNOM
6.4ms + 0.5 x 6.4ms = 515.2ms
6
-9
-9
C
= t /(5.15 x 10 )
t
= Floor[100 x 10 x 1.297/(197 x 10 )/3.5ms] x
SRT
RP
WDMAX
9.5ms + 0.5 x 9.5ms = 1790.75ms
with t
in seconds and C
in Farads.
SRT
RP
C
must be a low-leakage (< 10nA) type capacitor.
Transient Immunity
For applications with higher slew rates on V
power-up, additional bypass capacitance may be required.
SRT
A ceramic capacitor with low temperature coefficient
dielectric (i.e., X7R) is recommended.
during
CC
The MAX16056–MAX16059 are relatively immune to
short-duration supply voltage transients, or glitches on
Selecting Watchdog Timeout Capacitor
The watchdog timeout period is adjustable to
accommodate a variety of μP applications. With this
feature, the watchdog timeout can be optimized for
software execution. The programmer can determine how
often the watchdog timer should be serviced. Adjust the
V
. The Maximum V
Transient Duration vs. Reset
CC
CC
Threshold Overdrive graph in the Typical Operating
Characteristics shows this transient immunity. The area
below the curve of the graph is the region where these
devices typically do not generate a reset pulse. This
graph was generated using a falling pulse applied to
watchdog timeout period (t ) by connecting a capacitor
WD
(C
) between SWT and GND. For normal mode
SWT
V
, starting 100mV above the actual reset threshold
CC
operation, calculate the watchdog timeout as follows:
(V ), and ending below this threshold (reset threshold
TH
6
t
= Floor[C
x 5.15 x 10 /6.4ms] x 6.4ms + 3.2ms
WD
SWT
overdrive). As the magnitude of the transient increases,
the maximum allowable pulse width decreases. Typically,
with t
in seconds and C
in Farads.
SWT
WD
a 100mV V
transient duration of 40μs or less does not
(Floor: take the integral value) (Figures 2 and 3)
CC
cause a reset.
The maximum t is 296s. If the capacitor sets t
WD
WD
greater than the 296s, t
timer is disabled.
= infinite and the watchdog
WD
Using the MAX16056–MAX16059 for
Reducing System Power Consumption
C
must be a low-leakage (< 10nA) type capacitor.
Using the RESET output to control an external p-channel
MOSFET to control the on-time of a power supply can
result in lower system power consumption in systems
that can be regularly put to sleep. By tying the WDI input
to ground, the RESET output becomes a low-frequency
clock output. When RESET is low, the MOSFET is turned
on and power is applied to the system. When RESET
is high, the MOSFET is turned off and no power is con-
sumed by the system. This effectively reduces the shut-
down current of the system to zero (Figure 4).
SWT
A ceramic capacitor with low temperature coefficient
dielectric (i.e., X7R) is recommended.
Watchdog Timeout Accuracy
The watchdog timeout period is affected by the SWT
ramp current (I
old (V
) accuracy, the SWT ramp thresh-
RAMP2
), and the watchdog timeout clock period
). In the equation above, the constant 5.15 x 10
RAMP2
6
(t
WDPER
is equal to V
/I , and 6.4ms equals the watch-
RAMP2 RAMP2
dog timeout clock period. Calculate the timeout accuracy
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MAX16056–MAX16059
125nA nanoPower Supervisory Circuits
with Capacitor-Adjustable Reset
and Watchdog Timeouts
BAT
0.1µF
0.1µF
1MΩ
V
CC
V
CC1
RESET
MAX16056
MR
µP
WDI
MANUAL
POWER-ON
SRT
GND
WDS
SWT
C
SWT
C
SRT
V
CC
RESET
V
CC1
t
t
t
RP
RP
WD
Figure 4. Using MAX16056–MAX16059 to Reduce System Power Consumption
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MAX16056–MAX16059
125nA nanoPower Supervisory Circuits
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and Watchdog Timeouts
Interfacing to Other Voltages
for Logic Compatibility
The open-drain RESET output can be used to interface
to a μP with other logic levels. The open-drain output is
connected to a voltage from 0 to 5.5V, as shown in Figure
5. Generally, the pullup resistor connected to RESET
connects to the supply voltage that is being monitored
Ensuring a Valid RESET Down to V
= 0V
CC
(Push-Pull RESET)
When V
falls below 1.1V, the current-sinking capabil-
CC
ity of RESET decreases drastically. The high-impedance
CMOS logic inputs connected to RESET can drift to
undetermined voltages. This presents no problems in most
applications, since most μPs and other circuitry do not
at the device’s V
input. However, some systems use
operate with V
below 1.1V. In those applications where
CC
CC
the open-drain output to level-shift from the supervisor’s
monitored supply to another supply voltage. As the super-
RESET must be valid down to 0V, add a pulldown resis-
tor between the MAX16056/MAX16057 push-pull RESET
output and GND. The resistor sinks any stray leakage cur-
rents, holding RESET low (Figure 6). Choose a pulldown
resistor that accommodates leakages, such that RESET is
not significantly loaded and is capable of pulling to GND.
The external pulldown cannot be used with the open-drain
RESET output of the MAX16058/MAX16059.
visor’s V
decreases, so does the device’s ability to sink
CC
current at RESET.
3.3V
5V
V
CC
V
CC
V
CC
V
CC
MAX16058
MAX16059
100kΩ
MAX16056
MAX16057
µP
RESET
RESET
RESET
2MΩ
GND
GND
GND
Figure 5. Interfacing with Other Voltage Levels
Figure 6. Ensuring RESET Valid to V
= GND
CC
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125nA nanoPower Supervisory Circuits
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and Watchdog Timeouts
Table 1. Threshold Suffix Guide
V
THRESHOLD FALLING (V)
CC
SUFFIX
MIN
TYP
MAX
4.741
4.613
4.484
4.408
4.305
4.203
4.100
3.998
3.895
3.793
3.690
3.588
3.485
3.383
3.280
3.152
3.075
2.998
2.870
2.768
2.691
2.563
2.460
2.371
2.290
2.243
2.153
2.050
1.948
1.845
1.707
1.614
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
225
22
21
20
19
18
17
16
4.509
4.388
4.266
4.193
4.095
3.998
3.900
3.802
3.705
3.608
3.510
3.413
3.315
3.218
3.120
2.998
2.925
2.852
2.730
2.633
2.559
2.438
2.340
2.255
2.180
2.133
2.048
1.950
1.853
1.755
1.623
1.536
4.625
4.500
4.375
4.300
4.200
4.100
4.000
3.900
3.800
3.700
3.600
3.500
3.400
3.300
3.200
3.075
3.000
2.925
2.800
2.700
2.625
2.500
2.400
2.313
2.235
2.188
2.100
2.000
1.900
1.800
1.665
1.575
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MAX16056–MAX16059
125nA nanoPower Supervisory Circuits
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Table 2. Capacitor Selection Guide
CAPACITANCE (pF)
39
t
(ms)
t
(ms)
t x 128 (ms)
WD
RP
WD
47
56
68
82
100
120
0
(no capacitor is connected)
150
180
220
270
Not recommended
330
390
470
560
680
820
1000
1200
1500
1800
2200
2700
3300
3900
4700
5600
6800
8200
10,000
12,000
15,000
18,000
Indeterminate
(0, 9.6, or 16)
Indeterminate
(0, 1228.8, or 1636)
14.18
16.99
20.1
16
1641
1641
2460
2460
3280
4099
4918
6556
7376
9833
11,472
16
22.4
22.4
28.8
35.2
41.6
54.4
60.8
80
24.21
28.84
35.00
42.23
51.5
61.8
77.25
92.7
92.8
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MAX16056–MAX16059
125nA nanoPower Supervisory Circuits
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and Watchdog Timeouts
Table 2. Capacitor Selection Guide (continued)
CAPACITANCE (pF)
22,000
t
(ms)
t
(ms)
t
WD
x 128 (ms)
13,929
17,206
21,302
25,398
30,313
36,867
44,240
53,251
65,539
78,646
98,307
RP
WD
113.3
112
27,000
139.05
169.95
200.85
242.05
288.4
350.2
422.3
515
137.6
169.6
201.6
240
33,000
39,000
47,000
56,000
291.2
348.8
419.2
515.2
617.6
771.2
924.8
1129.6
1392
68,000
82,000
100,000
120,000
150,000
180,000
220,000
270,000
330,000
390,000
470,000
680,000
820,000
1,000,000
1,500,000
2,200,000
3,300,000
4,700,000
618
772.5
927
117,968
144,182
177,769
217,091
256,412
308,841
1133
1390.5
1699.5
2008.5
2420.5
3502
1699.2
2006.4
2416
4223
Indeterminate
5150
(may be infinite and watchdog is disabled)
7725
11,330
16,995
24,205
Infinite
(watchdog is disabled)
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MAX16056–MAX16059
125nA nanoPower Supervisory Circuits
with Capacitor-Adjustable Reset
and Watchdog Timeouts
Table 3. Standard Versions
PART
TOP MARK
BKZ
BLA
BLB
BLC
BLD
BLE
ATQ
ATR
ATS
ATT
MAX16056ATA17+
MAX16056ATA23+
MAX16056ATA26+
MAX16056ATA29+
MAX16056ATA31+
MAX16056ATA46+
MAX16057ATT17+
MAX16057ATT23+
MAX16057ATT26+
MAX16057ATT29+
MAX16057ATT31+
MAX16057ATT46+
MAX16058ATA16+
MAX16058ATA22+
MAX16058ATA26+
MAX16058ATA29+
MAX16058ATA31+
MAX16058ATA44+
MAX16059ATT16+
MAX16059ATT22+
MAX16059ATT26+
MAX16059ATT29+
MAX16059ATT31+
MAX16059ATT44+
ATU
ATV
BLF
BLG
BLH
BLI
BLJ
BLK
ATW
ATX
ATY
ATZ
AUA
AUB
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MAX16056–MAX16059
125nA nanoPower Supervisory Circuits
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and Watchdog Timeouts
Typical Operating Circuit
BAT
0.1µF
1MΩ
V
CC
V
CC
RESET
MAX16056
MR
µP
WDI
MANUAL
RESET
SRT
GND
WDS
SWT
C
C
SRT
SWT
Chip Information
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PROCESS: BiCMOS
Ordering Information
PIN-
PACKAGE
RESET
OUTPUT DOG TIMER
WATCH-
PART
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
MAX16056ATA_ _+T 8 TDFN-EP* Push-Pull
MAX16057ATT_ _+T 6 TDFN-EP* Push-Pull
MAX16058ATA_ _+T 8 TDFN-EP* Open-Drain
MAX16059ATT_ _+T 6 TDFN-EP* Open-Drain
Yes
No
6 TDFN-EP
8 TDFN-EP
T633-2
T833-2
21-0137
21-0137
90-0058
90-0059
Yes
No
Note: All devices are specified over the -40°C to +125°C oper-
ating temperature range.
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
*EP = Exposed pad.
“_ _” represents the two number suffix needed when ordering
the reset threshold voltage value (see Table 1).
Standard versions and their package top marks are shown in
Table 3 at the end of data sheet.
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125nA nanoPower Supervisory Circuits
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and Watchdog Timeouts
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
DESCRIPTION
0
1
2
3
4
5
6/09
6/10
4/13
5/14
4/15
3/17
Initial release
—
2, 3, 15
1
Updated Absolute Maximum Ratings, Electrical Characteristics, and Table 3.
Removed Automotive Infotainment from Applications sections
Changed top mark in Table 3 for MAX16057ATT31+ and MAX16057ATT46+
Revised Benefits and Features section
15
1
Updated title to include “nanoPower”
1–17
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2017 Maxim Integrated Products, Inc.
│ 17
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