MAX16833BAUE/V+ [MAXIM]
LED Driver, 1-Segment, BCDMOS, PDSO16, 5 X 4.40 MM, ROHS COMPLIANT, TSSOP-16;
| 型号： | MAX16833BAUE/V+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | LED Driver, 1-Segment, BCDMOS, PDSO16, 5 X 4.40 MM, ROHS COMPLIANT, TSSOP-16 驱动器 高压 |
| 文件： | 总22页 (文件大小：1472K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-5187; Rev 3; 7/11
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
General Description
Features
S Boost, SEPIC, and Buck-Boost Single-Channel
The MAX16833/MAX16833B/MAX16833C/MAX16833D/
MAX16833E are peak current-mode-controlled LED driv-
ers for boost, buck-boost, SEPIC, flyback, and high-side
buck topologies. A dimming driver designed to drive
an external p-channel in series with the LED string pro-
vides wide-range dimming control. This feature provides
extremely fast PWM current switching to the LEDs with
no transient overvoltage or undervoltage conditions. In
addition to PWM dimming, the ICs provide analog dim-
ming using a DC input at ICTRL. The ICs sense the LED
current at the high side of the LED string.
LED Drivers
S +5V to +65V Wide Input Voltage Range with a
Maximum 65V Boost Output
S Integrated High-Side Current-Sense Amplifier
S ICTRL Pin for Analog Dimming
S Integrated High-Side pMOS Dimming MOSFET
Driver (Allows Single-Wire Connection to LEDs)
S Programmable Operating Frequency (100kHz to
1MHz) with Synchronization Capability
S Frequency Dithering for Spread-Spectrum
Applications (MAX16833/MAX16833C/MAX16833E)
A single resistor from RT/SYNC to ground sets the
switching frequency from 100kHz to 1MHz, while an
external clock signal capacitively coupled to RT/SYNC
allows the ICs to synchronize to an external clock. In
the MAX16833/MAX16833C/MAX16833E, the switching
frequency can be dithered for spread-spectrum applica-
tions. The MAX16833B/MAX16833D instead provide a
1.64V reference voltage with a 2% tolerance.
S 2% Accurate 1.64V Reference (MAX16833B/
MAX16833D)
S Full-Scale, High-Side, Current-Sense Voltage of
200mV
S Short-Circuit, Overvoltage, and Thermal
Protection
S Fault Indicator Output
S -40NC to +125NC Operating Temperature Range
The ICs operate over a wide 5V to 65V supply range
and include a 3A sink/source gate driver for driving
a power MOSFET in high-power LED driver applica-
tions. Additional features include a fault-indicator output
(FLT) for short or overtemperature conditions and an
overvoltage-protection sense input (OVP) for overvoltage
protection. High-side current sensing combined with a
p-channel dimming MOSFET allow the positive terminal
of the LED string to be shorted to the positive input termi-
nal or to the negative input terminal without any damage.
This is a unique feature of the ICs.
S Thermally Enhanced 5mm x 4.4mm, 16-Pin TSSOP
Package with Exposed Pad
Simplified Operating Circuit
6V TO 18V
WITH LOAD
DUMP UP
TO 70V
IN
NDRV
CS
OVP
ISENSE+
ISENSE-
PWMDIM
PWMDIM
Applications
DIMOUT
Automotive Exterior Lighting:
High-Beam/Low-Beam/Signal/Position Lights
Daytime Running Lights (DRLs)
Fog Light and Adaptive Front Light Assemblies
MAX16833
PGND
LED+
LED-
Commercial, Industrial, and Architectural
Lighting
Ordering Information
MAX DUTY CYCLE FAULT OUTPUT
PART
TEMP RANGE
PIN-PACKAGE
FUNCTIONALITY
(%)
88.5
88.5
BLANKING
MAX16833AUE+
16 TSSOP-EP*
16 TSSOP-EP*
Frequency Dithering
Frequency Dithering
Yes
-40°C to +125°C
-40°C to +125°C
MAX16833AUE/V+
Yes
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
/V denotes an automotive qualified part.
Ordering Information continued at end of data sheet.
_______________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
ABSOLUTE MAXIMUM RATINGS
IN to PGND........................................................... -0.3V to +70V
ISENSE+, ISENSE-, DIMOUT to PGND................ -0.3V to +80V
DIMOUT to ISENSE+...............................................-9V to +0.3V
ISENSE- to ISENSE+............................................-0.6V to +0.3V
PGND to SGND....................................................-0.3V to +0.3V
Short-Circuit Duration on V ...................................Continuous
CC
Continuous Power Dissipation (T = +70NC)
A
16-Pin TSSOP (derate 26.1mW/NC above +70NC) .....2089mW
Junction-to-Case Thermal Resistance (B ) (Note 1)
JC
16-Pin TSSOP............................................................. +3NC/W
V
CC
to PGND ..........................................................-0.3V to +9V
Junction-to-Ambient Thermal Resistance (B ) (Note 1)
JA
NDRV to PGND ........................................ -0.3V to (V
OVP, PWMDIM, COMP, LFRAMP, REF, ICTRL,
+ 0.3V)
16-Pin TSSOP........................................................ +38.3NC/W
Operating Temperature Range ...................... -40NC to +125NC
Junction Temperature .....................................................+150NC
Storage Temperature Range............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
CC
RT/SYNC, FLT to SGND ...................................-0.3V to +6.0V
CS to PGND .........................................................-0.3V to +6.0V
Continuous Current on IN ................................................100mA
Peak Current on NDRV ........................................................ Q3A
Continuous Current on NDRV ....................................... Q100mA
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V = 12V, R = 12.4kI, C = C
= 1µF, C
/C
= 0.1µF, NDRV = COMP = DIMOUT = PWMDIM = FLT = unconnected,
IN
RT
IN
VCC
LFRAMP REF
V
OVP
= V
= V
= V
= 0V, V
= V
= 45V, V = 1.40V, T = T = -40NC to +125NC, unless otherwise
ICTRL A J
CS
PGND
SGND
ISENSE+
ISENSE-
noted. Typical values are at T = +25NC.) (Note 2)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SYSTEM SPECIFICATIONS
Operational Supply Voltage
V
5
65
2.5
4
V
IN
PWMDIM = 0, no switching
Switching
1.5
2.5
Supply Current
I
mA
INQ
UVLOR
V
IN
V
IN
rising
4.2
4.55
4.3
4.85
4.65
IN
Undervoltage Lockout (UVLO)
UVLO Hysteresis
V
UVLOF
falling, I
= 35mA
4.05
IN
VCC
250
mV
Clock
Cycles
Startup Delay
t
During power-up
1024
3.3
START_DELAY
UVLO Falling Delay
t
During power-down
Fs
FALL_DELAY
V
CC
LDO REGULATOR
0.1mA P I
P 50mA, 9V P V P 14V
IN
VCC
Regulator Output Voltage
V
CC
6.75
6.95
7.15
V
14V P V P 65V, I
= 10mA
IN
VCC
Dropout Voltage
V
I
= 50mA, V = 5V
0.15
100
0.35
150
V
DOVCC
VCC
IN
Short-Circuit Current
I
V
= 0V, V = 5V
IN
55
mA
MAXVCC
CC
OSCILLATOR (RT/SYNC)
Switching Frequency Range
Bias Voltage at RT/SYNC
f
100
1000
kHz
V
SW
V
1
RT
V
= 0V; MAX16833/MAX16833B/
CS
87.5
88.5
94
89.5
MAX16833E only
Maximum Duty Cycle
D
MAX
%
V
CS
= 0V; MAX16833C/MAX16833D only
93
-5
95
+5
Oscillator Frequency Accuracy
Synchronization Logic-High Input
Synchronization Frequency Range
%
V
V
f
VRT rising
3.8
IH-SYNC
1.1f
1.7f
SW
SYNCIN
SW
2
______________________________________________________________________________________
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
ELECTRICAL CHARACTERISTICS (continued)
(V = 12V, R = 12.4kI, C = C
= 1µF, C
/C
= 0.1µF, NDRV = COMP = DIMOUT = PWMDIM = FLT = unconnected,
IN
RT
IN
VCC
LFRAMP REF
V
OVP
= V
= V
= V
= 0V, V
= V
= 45V, V = 1.40V, T = T = -40NC to +125NC, unless otherwise
ICTRL A J
CS
PGND
SGND
ISENSE+
ISENSE-
noted. Typical values are at T = +25NC.) (Note 2)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SLOPE COMPENSATION
Slope Compensation
Current-Ramp Height
Ramp peak current added to CS input
per switching cycle
I
46
50
54
FA
SLOPE
DITHERING RAMP GENERATOR (LFRAMP) (MAX16833/MAX16833C/MAX16833E only)
Charging Current
V
V
= 0V
80
80
100
100
2
120
120
FA
FA
V
LFRAMP
LFRAMP
Discharging Current
= 2.2V
Comparator High Trip Threshold
Comparator Low Trip Threshold
V
RT
V
REFERENCE OUTPUT (REF) (MAX16833B/MAX16833D only)
Reference Output Voltage
ANALOG DIMMING (ICTRL)
Input-Bias Current
V
I
= 0 to 80FA
1.604
0
1.636
35
1.669
200
V
REF
REF
IB
ICTRL
V
= 0.62V
nA
ICTRL
LED CURRENT-SENSE AMPLIFIER
ISENSE+ Input-Bias Current
IB
V
V
= 65V, V
= 48V, V
= 64.8V
= 48V,
200
400
200
700
FA
FA
ISENSE+
ISENSE+
ISENSE-
ISENSE+ Input-Bias Current with
ISENSE+
ISENSE-
IB
ISENSE+OFF
DIM Low
PWMDIM = 0
ISENSE- Input-Bias Current
Voltage Gain
IB
V
= 65V, V
= 64.8V
2
5
6.15
199
100
40
8
FA
ISENSE-
ISENSE+
ISENSE-
V/V
V
V
V
= 1.4V
195
38.4
203
41.4
ICTRL
ICTRL
ICTRL
Current-Sense Voltage
V
= 0.616V
mV
SENSE
BW
= 0.2465V
- 3dB
Bandwidth
AV
5
MHz
DC
COMP
Transconductance
Open-Loop DC Gain
COMP Input Leakage
COMP Sink Current
COMP Source Current
PWM COMPARATOR
Input Offset Voltage
Leading-Edge Blanking
GM
2100
3500
75
4900
FS
dB
nA
FA
FA
COMP
AV
OTA
LCOMP
I
-300
100
100
+300
700
I
400
400
SINK
I
700
SOURCE
V
2
V
OS-PWM
50
ns
Includes leading-edge blanking time with
10mV overdrive
Propagation Delay to NDRV
t
55
80
110
430
ns
ON(MIN)
CS LIMIT COMPARATOR
Current-Limit Threshold
V
406
418
30
mV
ns
CS_LIMIT
CS Limit-Comparator
Propagation Delay to NDRV
10mV overdrive (excluding leading-edge
blanking time)
t
CS_PROP
Leading-Edge Blanking
50
ns
_______________________________________________________________________________________
3
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
ELECTRICAL CHARACTERISTICS (continued)
(V = 12V, R = 12.4kI, C = C
= 1µF, C
/C
= 0.1µF, NDRV = COMP = DIMOUT = PWMDIM = FLT = unconnected,
IN
RT
IN
VCC
LFRAMP REF
V
OVP
= V
= V
= V
= 0V, V
= V
= 45V, V = 1.40V, T = T = -40NC to +125NC, unless otherwise
ICTRL A J
CS
PGND
SGND
ISENSE+
ISENSE-
noted. Typical values are at T = +25NC.) (Note 2)
A
PARAMETER
GATE DRIVER (NDRV)
Peak Pullup Current
Peak Pulldown Current
Rise Time
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
I
I
V
V
= 7V, V
= 0V
= 7V
3
3
A
A
NDRVPU
CC
NDRV
= 7V, V
NDRVPD
CC
NDRV
t
r
C
NDRV
C
NDRV
COMP
= 10nF
30
30
0.6
ns
ns
I
Fall Time
t
= 10nF
= 0V, I = 100mA
SINK
f
R
DSON
Pulldown nMOS
R
V
0.25
1.19
1.7
1.1
1.26
4.5
NDRVON
PWM DIMMING (PWMDIM)
ON Threshold
V
1.225
70
V
PWMON
Hysteresis
V
R
mV
MI
PWMHY
Pullup Resistance
3
PWMPU
PWMDIM falling edge to rising edge on
DIMOUT, C = 7nF
PWMDIM to LED Turn-Off Time
PWMDIM to LED Turn-On Time
2
3
Fs
Fs
DIMOUT
PWMDIM rising edge to falling edge on
DIMOUT, C = 7nF
DIMOUT
pMOS GATE DRIVER (DIMOUT)
V
V
= 0V,
PWMDIM
Peak Pullup Current
I
I
25
10
50
25
80
45
mA
mA
V
DIMOUTPU
- V
= 7V
= 0V
ISENSE+
DIMOUT
Peak Pulldown Current
V
- V
DIMOUTPD
ISENSE+
DIMOUT
DIMOUT Low Voltage with
-8.7
-7.4
-6.3
Respect to V
ISENSE+
OVERVOLTAGE PROTECTION (OVP)
Threshold
V
V
V
rising
1.19
-300
285
1.225
70
1.26
+300
310
V
OVPOFF
OVP
OVP
Hysteresis
V
mV
nA
OVPHY
Input Leakage
I
= 1.235V
- V ) rising
ISENSE-
LOVP
SHORT-CIRCUIT HICCUP MODE
Short-Circuit Threshold
V
(V
298
mV
SHORT-HIC
ISENSE+
Clock
Cycles
Hiccup Time
t
8192
HICCUP
Delay in Short-Circuit Hiccup
Activation
1
Fs
BUCK-BOOST SHORT-CIRCUIT DETECT
Buck-Boost Short-Circuit
Threshold
V
(V
ISENSE+
- V ) falling, V = 12V
1.15
1.55
1.9
V
SHORT-BB
IN
IN
Delay in FLT Assertion from
Buck-Boost Short-Circuit
Condition (except MAX16833E)
Counter increments only when
Clock
Cycles
t
8192
DEL-BB-SHRT
V
> V
PWMDIM
PWMON
Delay in FLT Deassertion After
Buck-Boost Short Circuit is
Removed (Consecutive Clock-
Cycle Count) (except MAX16833E)
Counter increments only when
> V
Clock
Cycles
8192
V
PWMDIM
PWMON
4
______________________________________________________________________________________
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
ELECTRICAL CHARACTERISTICS (continued)
(V = 12V, R = 12.4kI, C = C
= 1µF, C
/C
= 0.1µF, NDRV = COMP = DIMOUT = PWMDIM = FLT = unconnected,
IN
RT
IN
VCC
LFRAMP REF
V
OVP
= V
= V
= V
= 0V, V
= V
= 45V, V
= 1.40V, T = T = -40NC to +125NC, unless otherwise
CS
PGND
SGND
ISENSE+
ISENSE-
ICTRL
A
J
noted. Typical values are at T = +25NC.) (Note 2)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
OPEN-DRAIN FAULT (FLT)
Output Voltage Low
V
V
= 4.75V, V
= 2V, and I = 5mA
SINK
40
200
1
mV
V
IN
OVP
OL-FLT
Output Leakage Current
THERMAL SHUTDOWN
Thermal-Shutdown Temperature
Thermal-Shutdown Hysteresis
FA
= 5V
FLT
Temperature rising
+160
10
NC
NC
Note 2: All devices are 100% tested at T = +25NC. Limits over temperature are guaranteed by design.
A
Typical Operating Characteristics
(V = +12V, C
= C
= 1FF, C
/C
= 0.1FF, T = +25NC, unless otherwise noted.)
IN
VIN
VCC
LFRAMP REF
A
IN RISING/FALLING UVLO THRESHOLD
vs. TEMPERATURE
QUIESCENT CURRENT
vs. TEMPERATURE
QUIESCENT CURRENT vs. V
IN
2.5
2.0
1.5
1.0
0.5
0
4.8
4.7
4.6
4.5
4.4
4.3
4.2
4
3
2
1
0
V
= 0V
PWMDIM
V
= 0V
PWMDIM
V
~ 4.6V
IN
V
RISING
IN
V
FALLING
60
IN
1
10
(V)
100
-40
-15
10
35
85
110 125
-40
-15
10
35
60
85
110 125
V
TEMPERATURE (°C)
TEMPERATURE (°C)
IN
DIMOUT (WITH RESPECT TO ISENSE+)
vs. TEMPERATURE
V
vs. I
VCC
CC
V
CC
vs. TEMPERATURE
7.00
6.95
6.90
6.85
6.80
6.75
7.10
7.05
7.00
6.95
6.90
6.85
6.80
6.75
-6.2
-6.7
-7.2
-7.7
-8.2
-8.7
0
5
10 15 20 25 30 35 40 45 50
(mA)
-40 -15
10
35
60
85
110 125
-40 -15
10
35
60
85
110 125
I
VCC
TEMPERATURE (°C)
TEMPERATURE (°C)
_______________________________________________________________________________________
5
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
Typical Operating Characteristics (continued)
(V = +12V, C
= C
= 1FF, C
/C
= 0.1FF, T = +25NC, unless otherwise noted.)
IN
VIN
VCC
LFRAMP REF A
DIMOUT RISE TIME vs. TEMPERATURE
DIMOUT FALL TIME vs. TEMPERATURE
4.0
3.5
3.0
2.5
2.0
1.5
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
C
= 6.8nF
C
= 6.8nF
DIMOUT
DIMOUT
-40 -15
10
35
60
85
110 125
-40 -15
10
35
60
85 110 125
TEMPERATURE (°C)
TEMPERATURE (°C)
V
SENSE
vs. TEMPERATURE
V
SENSE
vs. V
ICTRL
240
220
200
180
160
140
120
100
80
205
204
203
202
201
200
199
198
197
196
195
60
40
20
0
0
0.20 0.40 0.60 0.80 1.00 1.20 1.40
(V)
-40
-15
10
35
60
85 110 125
V
TEMPERATURE (°C)
ICTRL
OSCILLATOR FREQUENCY
vs. 1/R CONDUCTANCE
(MAX16833/MAX16833B/MAX16833E ONLY)
OSCILLATOR FREQUENCY vs. TEMPERATURE
(MAX16833/MAX16833B/MAX16833E ONLY)
RT
1100
310
308
306
304
302
300
298
296
294
292
290
R
= 24.9kI
RT
1000
900
800
700
600
500
400
300
200
100
0
0.005
0.034
0.063
0.092
-1
0.121
0.150
-40 -15
10
35
60
85
110 125
1/R (kI
RT
)
TEMPERATURE (°C)
6
______________________________________________________________________________________
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
Typical Operating Characteristics (continued)
(V = +12V, C
= C
= 1FF, C
/C
= 0.1FF, T = +25NC, unless otherwise noted.)
IN
VIN
VCC
LFRAMP REF A
NDRV RISE/FALL TIME
vs. TEMPERATURE
600Hz DIMMING OPERATION
MAX16833 toc14
60
V
DIMOUT
50V/div
50
40
30
20
0V
NDRV FALL TIME
I
LED
500mA/div
0mA
V
COMP
2V/div
0V
V
10V/div
0V
NDRV RISE TIME
0V
0V
NDRV
C
= 10nF
NDRV
PWMDIM = 600Hz
400µs/div
-40 -15
10
35
60
85
110 125
TEMPERATURE (°C)
Pin Configuration
TOP VIEW
+
LFRAMP (REF)
1
2
3
4
5
6
7
8
16 IN
15 V
RT/SYNC
SGND
ICTRL
COMP
FLT
CC
14 NDRV
13 PGND
12 CS
MAX16833
MAX16833B
MAX16833C
MAX16833D
MAX16833E
11 ISENSE+
10 ISENSE-
PWMDIM
OVP
DIMOUT
9
*EP
TSSOP
*EP = EXPOSED PAD.
( ) FOR MAX16833B/MAX16833D ONLY.
_______________________________________________________________________________________
7
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
Pin Description
PIN
NAME
FUNCTION
LFRAMP
Low-Frequency Ramp Output. Connect a capacitor from LFRAMP to ground to program the ramp
frequency, or connect to SGND if not used. A resistor can be connected between LFRAMP and RT/
SYNC to dither the PWM switching frequency to achieve spread spectrum.
(MAX16833/
MAX16833C/
MAX16833E)
1
REF
(MAX16833B/
MAX16833D)
1.64V Reference Output. Connect a 1FF ceramic capacitor from REF to SGND to provide a stable
reference voltage. Connect a resistive divider from REF to ICTRL for analog dimming.
PWM Switching Frequency Programming Input. Connect a resistor (R ) from RT/SYNC to SGND
RT
to set the internal clock frequency. Frequency = (7.350 x 109)/R for the MAX16833/MAX16833B/
RT
2
RT/SYNC
MAX16833E. Frequency = (6.929 x109)/R for the MAX16833C/MAX16833D. An external pulse can
RT
be applied to RT/SYNC through a coupling capacitor to synchronize the internal clock to the external
pulse frequency. The parasitic capacitance on RT/SYNC should be minimized.
3
4
SGND
ICTRL
Signal Ground
Analog Dimming-Control Input. The voltage at ICTRL sets the LED current level when V
< 1.2V.
ICTRL
For V
> 1.4V, the internal reference sets the LED current.
ICTRL
Compensation Network Connection. For proper compensation, connect a suitable RC network from
COMP to ground.
5
6
7
COMP
FLT
Active-Low, Open-Drain Fault Indicator Output. See the Fault Indicator (FLT) section.
PWM Dimming Input. When PWMDIM is pulled low, DIMOUT is pulled high and PWM switching is
disabled. PWMDIM has an internal pullup resistor, defaulting to a high state when left unconnected.
PWMDIM
LED String Overvoltage-Protection Input. Connect a resistive divider between ISENSE+, OVP, and
SGND. When the voltage on OVP exceeds 1.23V, a fast-acting comparator immediately stops PWM
switching. This comparator has a hysteresis of 70mV.
8
9
OVP
Active-Low External Dimming p-Channel MOSFET Gate Driver
DIMOUT
ISENSE-
Negative LED Current-Sense Input. A 100Iresistor is recommended to be connected between
ISENSE- and the negative terminal of the LED current-sense resistor. This preserves the absolute
maximum rating of the ISENSE- pin during LED short circuit.
10
Positive LED Current-Sense Input. The voltage between ISENSE+ and ISENSE- is proportionally
11
12
ISENSE+
CS
regulated to the lesser of V
or 1.23V.
ICTRL
Switching Regulator Current-Sense Input. Add a resistor from CS to switching MOSFET current-sense
resistor terminal for programming slope compensation.
13
14
15
16
PGND
NDRV
Power Ground
External n-channel MOSFET Gate-Driver Output
V
7V Low-Dropout Voltage Regulator Output. Bypass V
to PGND with a 1FF (min) ceramic capacitor.
CC
CC
IN
Positive Power-Supply Input. Bypass IN to PGND with at least a 1FF ceramic capacitor.
Exposed Pad. Connect EP to the ground plane for heatsinking. Do not use EP as the only electrical
connection to ground.
—
EP
8
______________________________________________________________________________________
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
MAX16833/MAX16833C/MAX16833E Functional Diagram
IN
V
CC
V
CC
UVLO
5V REG
BG
7V LDO
5V
5V
LVSH
NDRV
PGND
THERMAL
SHUTDOWN
5V
V
BG
TSHDN
UVLO
RESET
DOMINANT
RT/
SYNC
RT OSCILLATOR
S
Q
R
SLOPE
COMPENSATION
CS/PWM
BLANKING
MAX
DUTY CYCLE
CS
2V
RAMP
GENERATION
PWM
COMP
0.42V
LFRAMP
V
BG
MAX16833
MAX16833C
MAX16833E
MIN
OUT
ICTRL
LPF
ISENSE+
GM
COMP
6.15
SYNC
ISENSE+
ISENSE-
3.3V
DIMOUT
3MI
PWMDIM
V
- 7V
ISENSE+
BUCK-BOOST
SHORT DETECTION
FLT
V
BG
1µs DELAY
S
R
Q
TSHDN
8192 x t
OSC
6.15 x 0.3V
HICCUP TIMER
SGND
OVP
V
BG
_______________________________________________________________________________________
9
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
MAX16833B/MAX16833D Functional Diagram
IN
V
CC
V
UVLO
5V REG
BG
CC
7V LDO
5V
5V
LVSH
NDRV
PGND
THERMAL
SHUTDOWN
5V
V
BG
TSHDN
UVLO
RESET
DOMINANT
RT/
SYNC
RT OSCILLATOR
S
Q
R
SLOPE
COMPENSATION
CS/PWM
BLANKING
MAX
DUTY CYCLE
CS
2V
1.64V (80µA)
REFERENCE
PWM
COMP
0.42V
REF
V
BG
MAX16833B
MAX16833D
MIN
OUT
ICTRL
LPF
ISENSE+
GM
COMP
6.15
SYNC
ISENSE+
ISENSE-
3.3V
DIMOUT
3MI
PWMDIM
V
- 7V
ISENSE+
BUCK-BOOST
SHORT DETECTION
FLT
VBG
1µs DELAY
S
R
Q
TSHDN
8192 x t
OSC
6.15 x 0.3V
HICCUP TIMER
OVP
SGND
V
BG
10 _____________________________________________________________________________________
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
UVLO
Detailed Description
The MAX16833/MAX16833B/MAX16833C/MAX16833D/
The ICs feature undervoltage lockout (UVLO) using the
positive power-supply input (IN). The ICs are enabled
when V exceeds the 4.6V (typ) threshold and are dis-
abled when V drops below the 4.35V (typ) threshold.
The UVLO is internally fixed and cannot be adjusted.
There is a startup delay of 1024 clock cycles on power-
up after the UVLO threshold is crossed. There is a 3.3Fs
delay on power-down on the falling edge of the UVLO.
MAX16833E are peak current-mode-controlled LED
drivers for boost, buck-boost, SEPIC, flyback, and high-
side buck topologies. A low-side gate driver capable
of sinking and sourcing 3A can drive a power MOSFET
in the 100kHz to 1MHz frequency range. Constant-
frequency peak current-mode control is used to control
the duty cycle of the PWM controller that drives the
power MOSFET. Externally programmable slope com-
pensation prevents subharmonic oscillations for duty
cycles exceeding 50% when the inductor is operating
in continuous conduction mode. Most of the power for
the internal control circuitry inside the ICs is provided
from an internal 5V regulator. The gate drive for the low-
IN
IN
Dimming MOSFET Driver (DIMOUT)
The ICs require an external p-channel MOSFET for PWM
dimming. For normal operation, connect the gate of the
MOSFET to the output of the dimming driver (DIMOUT).
The dimming driver can sink up to 25mA or source up
to 50mA of peak current for fast charging and discharg-
ing of the p-MOSFET gate. When the PWMDIM signal is
high, this driver pulls the p-MOSFET gate to 7V below
the ISENSE+ pin to completely turn on the p-channel
dimming MOSFET.
side switching MOSFET is provided by a separate V
CC
regulator. A dimming driver designed to drive an external
p-channel in series with the LED string provides wide-
range dimming control. This dimming driver is powered
by a separate unconnected reference -7V regulator. This
feature provides extremely fast PWM current switching to
the LEDs with no transient overvoltage or undervoltage
conditions. In addition to PWM dimming, the ICs provide
analog dimming using a DC input at the ICTRL input.
n-Channel MOSFET Switch Driver (NDRV)
The ICs drive an external n-channel switching MOSFET.
NDRV swings between V
and PGND. NDRV can sink/
CC
source 3A of peak current, allowing the ICs to switch
MOSFETs in high-power applications. The average cur-
rent demanded from the supply to drive the external
A single resistor from RT/SYNC to ground sets the
switching frequency from 100kHz to 1MHz, while an
external clock signal capacitively coupled to RT/SYNC
allows the ICs to synchronize to an external clock. The
switching frequency can be dithered for spread-spectrum
applications by connecting the LFRAMP output to RT/SYNC
through an external resistor in the MAX16833/MAX16833C/
MAX16833E. In the MAX16833B/MAX16833D, the LFRAMP
output is replaced by a REF output, which provides a
regulated 1.64V, 2% accurate reference that can be
used with a resistive divider from REF to ICTRL to set the
LED current. The maximum current from the REF output
cannot exceed 80FA.
MOSFET depends on the total gate charge (Q ) and
G
the operating frequency of the converter, f . Use the
following equation to calculate the driver supply current
SW
I
required for the switching MOSFET:
NDRV
I
= Q x f
G SW
NDRV
Pulse-Dimming Input (PWMDIM)
The ICs offer a dimming input (PWMDIM) for pulse-width
modulating the output current. PWM dimming can be
achieved by driving PWMDIM with a pulsating voltage
source. When the voltage at PWMDIM is greater than
1.23V, the PWM dimming p-channel MOSFET turns on
and the gate drive to the n-channel switching MOSFET is
also enabled. When the voltage on PWMDIM drops 70mV
below 1.23V, the PWM dimming MOSFET turns off and
the n-channel switching MOSFET is also turned off. The
COMP capacitor is also disconnected from the internal
transconductance amplifier when PWMDIM is low. When
left unconnected, a weak internal pullup resistor sets this
input to logic-high.
Additional features include a fault-indicator output (FLT)
for short, overvoltage, or overtemperature conditions
and an overvoltage-protection (OVP) sense input for
overvoltage protection. In case of LED string short, for
a buck-boost configuration, the short-circuit current is
equal to the programmed LED current. In the case of
boost configuration, the ICs enter hiccup mode with
automatic recovery from short circuit.
______________________________________________________________________________________ 11
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
Analog Dimming (ICTRL)
The ICs offer an analog dimming control input (ICTRL).
The voltage at ICTRL sets the LED current level when
Internal Oscillator (RT/SYNC)
The internal oscillators of the ICs are programmable from
100kHz to 1MHz using a single resistor at RT/SYNC.
Use the following formula to calculate the switching fre-
quency:
V
ICTRL
< 1.2V. The LED current can be linearly adjusted
from zero with the voltage on ICTRL. For V
> 1.4V,
ICTRL
an internal reference sets the LED current. The maximum
withstand voltage of this input is 5.5V.
7350 kΩ
(
)
f
(kHz) =
for the MAX16833 MAX16833B MAX16833E
)
for the MAX16833C MAX16833D
OSC
OSC
R
(kΩ)
RT
6929 kΩ
(
Low-Side Linear Regulator (V
)
CC
f
(kHz) =
R
(kΩ)
The ICs feature a 7V low-side linear regulator (V ).
CC
RT
V
CC
powers up the switching MOSFET driver with sourc-
ing capability of up to 50mA. Use a 1FF (min) low-ESR
ceramic capacitor from V to PGND for stable opera-
where R is the resistor from RT/SYNC to SGND.
RT
CC
Synchronize the oscillator with an external clock by
AC-coupling the external clock to the RT/SYNC input.
tion. The V
regulator goes below 7V if the input volt-
CC
age falls below 7V. The dropout voltage for this regulator
at 50mA is 0.2V. This means that for an input voltage of
For f
between 200kHz and 1MHz, the capacitor used
OSC
for the AC-coupling should satisfy the following relation:
5V, the V
voltage is 4.8V. The short-circuit current on
CC
-6
the V
regulator is 100mA (typ). Connect V
to IN if
CC
CC
9.8624×10
-9
C
≤
− 0.144×10 farads
SYNC
V
IN
is always less than 7V.
R
RT
LED Current-Sense Inputs (ISENSE )
where R is in kω. For f
RT
268nF.
below 200GHz, C
≤
SYNC
OSC
The differential voltage from ISENSE+ to ISENSE- is fed
to an internal current-sense amplifier. This amplified sig-
nal is then connected to the negative input of the trans-
conductance error amplifier. The voltage-gain factor of
this amplifier is 6.15.
The pulse width for the synchronization pulse should
satisfy the following relations:
t
t
1.05× t
0.5
PW
PW
CLK
t
OSC
<
and
< 1-
The offset voltage for this amplifier is P 1mV.
t
V
t
CLK
CLK
S
Internal Transconductance Error Amplifier
The ICs have a built-in transconductance amplifier used
to amplify the error signal inside the feedback loop.
When the dimming signal is low, COMP is disconnected
from the output of the error amplifier and DIMOUT goes
high. When the dimming signal is high, the output of
the error amplifier is connected to COMP and DIMOUT
goes low. This enables the compensation capacitor to
hold the charge when the dimming signal has turned off
the internal switching MOSFET gate drive. To maintain
t
PW
3.4V < 0.8 -
V
+ V < 5V
S
S
t
CLK
where t
is the synchronization source pulse width,
is
PW
t
is the synchronization clock time period, t
CLK
OSC
the free-running oscillator time period, and V is the syn-
chronization pulse-voltage level.
S
Ensure that the external clock signal frequency is at least
1.1 x f
where f
is the oscillator frequency set
OSC,
OSC
the charge on the compensation capacitor C
(C4
COMP
by R . A typical pulse width of 200ns can be used for
RT
in the Typical Operating Circuits), the capacitor should
be a low-leakage ceramic type. When the internal dim-
ming signal is enabled, the voltage on the compensation
capacitor forces the converter into steady state almost
instantaneously.
proper synchronization of a frequency up to 250kHz. A
rising external clock edge (sync) is interpreted as a syn-
chronization input. If the sync signal is lost, the internal
oscillator takes control of the switching rate returning the
switching frequency to that set by R . This maintains
RT
output regulation even with intermittent sync signals.
12 _____________________________________________________________________________________
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
Voltage-Reference Output
C1
680pF
C2
1000pF
(REF/MAX16833B/MAX16833D)
SYNC
The MAX16833B/MAX16833D have a 2% accurate 1.64V
RT PIN
reference voltage on the REF output. Connect a 1FF
ceramic capacitor from REF to SGND to provide a stable
reference voltage. This reference can supply up to 80µA.
This output can drive a resistive divider to the ICTRL
input for analog dimming. The resistance from REF to
D2
R2
22I
R
RT
SD103AWS
24.9I
ground should be greater than 20.5kI.
GND
GND
Switching MOSFET
Current-Sense Input (CS)
CS is part of the current-mode control loop. The switch-
Figure 1. SYNC Circuit
Figure 1 shows the frequency-synchronization circuit
suitable for applications where a 5V amplitude pulse with
20% to 80% duty cycle is available as the synchronization
source. This circuit can be used for SYNC frequencies
in the 100kHz to 1MHz range. C1 and R2 act as a dif-
ferentiator that reduces the input pulse width to suit the
ICs’ RT/SYNC input. D2 bypasses the negative current
through C1 at the falling edge of the SYNC source to limit
the minimum voltage at the RT/SYNC pin. The differentia-
tor output is AC-coupled to the RT/SYNC pin through C2.
ing control uses the voltage on CS, set by R (R4 in the
CS
Typical Operating Circuits) and R
(R1 in the Typical
SLOPE
Operating Circuits), to terminate the on pulse width of the
switching cycle, thus achieving peak current-mode con-
trol. Internal leading-edge blanking of 50ns is provided
to prevent premature turn-off of the switching MOSFET
in each switching cycle. Resistor R
is connected
CS
between the source of the n-channel switching MOSFET
and PGND.
During switching, a current ramp with a slope of 50FA
The output impedance of the SYNC source should be
low enough to drive the current through R2 on the rising
edge. The rise/fall times of the SYNC source should be
less than 50ns to avoid excessive voltage drop across C1
during the rise time. The amplitude of the SYNC source
can be between 4V and 5V. If the SYNC source amplitude
is 5V and the rise time is less than 20ns, then the maxi-
mum peak voltage at RT/SYNC pin can get close to 6V.
Under such conditions, it is desirable to use a resistor in
series with C1 to reduce the maximum voltage at the RT/
SYNC pin. For proper synchronization, the peak SYNC
pulse voltage at RT/SYNC pin should exceed 3.8V.
x f
is sourced from the CS input. This current ramp,
SW
along with resistor R
compensation.
, programs the amount of slope
SLOPE
Overvoltage-Protection Input (OVP)
OVP sets the overvoltage-threshold limit across the
LEDs. Use a resistive divider between ISENSE+ to OVP
and SGND to set the overvoltage-threshold limit. An
internal overvoltage-protection comparator senses the
differential voltage across OVP and SGND. If the dif-
ferential voltage is greater than 1.23V, NDRV goes low,
DIMOUT goes high, and FLT asserts. When the differen-
tial voltage drops by 70mV, NDRV is enabled, DIMOUT
goes low, and FLT deasserts.
Frequency Dithering (LFRAMP/MAX16833/
MAX16833C/MAX16833E)
Fault Indicator (FLT)
The ICs feature an active-low, open-drain fault indicator
(FLT). FLT goes low when one of the following conditions
occur:
The MAX16833/MAX16833C/MAX16833E feature a
low-frequency ramp output. Connect a capacitor from
LFRAMP to ground to program the ramp frequency.
Connect to SGND if not used. A resistor can be con-
nected between LFRAMP and RT/SYNC to dither the
PWM switching frequency to achieve spread spectrum.
A lower value resistor provides a larger amount of fre-
quency dithering. The LFRAMP voltage is a triangular
waveform between 1V (typ) and 2V (typ). The ramp fre-
quency is given by:
U Overvoltage across the LED string
U Short-circuit condition across the LED string
U Overtemperature condition
FLT goes high when the fault condition ends.
50FA
f
(Hz) =
LFRAMP
C
(F)
LFRAMP
______________________________________________________________________________________ 13
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
Thermal Protection
Applications Information
The ICs feature thermal protection. When the junction
temperature exceeds +160NC, the ICs turn off the external
power MOSFETs by pulling the NDRV low and DIMOUT
high. External MOSFETs are enabled again after the junc-
tion temperature has cooled by 10°C. This results in a
cycled output during continuous thermal-overload condi-
tions. Thermal protection protects the ICs in the event of
fault conditions.
Setting the Overvoltage Threshold
The overvoltage threshold is set by resistors R5 and R11
(see the Typical Operating Circuits). The overvoltage
circuit in the ICs is activated when the voltage on OVP
with respect to GND exceeds 1.23V. Use the following
equation to set the desired overvoltage threshold:
V
= 1.23V (R5 + R11)/R11
OV
Short-Circuit Protection
Programming the LED Current
Normal sensing of the LED current should be done on
the high side where the LED current-sense resistor is
connected to the boost output. The other side of the LED
current-sense resistor goes to the source of the p-channel
dimming MOSFET if PWM dimming is desired. The LED
Boost Configuration
In the boost configuration, if the LED string is shorted
it causes the (ISENSE+ to ISENSE-) voltage to exceed
300mV. If this condition occurs for R1Fs, the ICs activates
the hiccup timer for 8192 clock cycles during which:
current is programmed using R7. When V
the internal reference regulates the voltage across R7 to
200mV:
> 1.23V,
ICTRL
U NDRV goes low and DIMOUT goes high.
U The error amplifier is disconnected from COMP.
U FLT is pulled to SGND.
200mV
R7
I
=
LED
After the hiccup time has elapsed, the ICs retry. During
this retry period, FLT is latched and is reset only if there is
no short detected after 20Fs of retrying.
The LED current can also be programmed using the
voltage on ICTRL when V < 1.2V (analog dimming).
ICTRL
Buck-Boost Configuration
In the case of the buck-boost configuration, once an
LED string short occurs the behavior is different. The ICs
maintain the programmed current across the short. In this
case, the short is detected when the voltage between
ISENSE+ and IN falls below 1.5V. For all MAX16833 ver-
sions except MAX16833E, a buck-boost short fault starts
an up counter and FLT is asserted only after the counter
has reached 8192 clock cycles consecutively. If for
The voltage on ICTRL can be set using a resistive divider
from the REF output in the case of the MAX16833B/
MAX16833D. The current is given by:
V
ICTRL
I
=
LED
R7 × 6.15
where:
V
×R8
any reason (V
down counting, resulting in FLT being deasserted only
after 8192 consecutive clock cycles of (V - V
- V > 1.5V), the counter starts
ISENSE+
IN
REF
V
=
ICTRL
R8 + R9
(
)
ISENSE+
IN
> 1.5V) condition. For MAX16833E, there is no counter
for FLT assertion and deassertion, so FLT is asserted
immediately when the voltage between ISENSE+ and IN
falls below 1.5V, and is deasserted immediately when
this condition terminates.
where V
is 1.64V and resistors R8 and R9 are in
REF
ohms. At higher LED currents there can be noticeable
ripple on the voltage across R7. High-ripple voltages can
cause a noticeable difference between the programmed
value of the LED current and the measured value of the
LED current. To minimize this error, the ripple voltage
across R7 should be less than 40mV.
Exposed Pad
The ICs’ package features an exposed thermal pad on
its underside that should be used as a heatsink. This
pad lowers the package’s thermal resistance by provid-
ing a direct heat-conduction path from the die to the
PCB. Connect the exposed pad and GND to the system
ground using a large pad or ground plane, or multiple
vias to the ground plane layer.
14 _____________________________________________________________________________________
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
input current plus the LED current. Calculate the maxi-
mum duty cycle using the following equation:
Inductor Selection
Boost Configuration
In the boost converter (see the Typical Operating
Circuits), the average inductor current varies with the
line voltage. The maximum average current occurs at the
lowest line voltage. For the boost converter, the average
inductor current is equal to the input current. Calculate
maximum duty cycle using the following equation:
V
+ V
LED
D
D
=
MAX
V
+ V + V
- V
LED
D
INMIN FET
where V
is the forward voltage of the LED string
LED
in volts, V is the forward drop of rectifier diode D1
D
(approximately 0.6V) in volts, V
is the minimum
INMIN
V
V
+ V - V
D INMIN
LED
input supply voltage in volts, and V
is the average
FET
D
=
MAX
+ V - V
drain-to-source voltage of the MOSFET Q1 in volts when
it is on. Use an approximate value of 0.2V initially to cal-
LED
D FET
where V
is the forward voltage of the LED string
in volts, V is the forward drop of rectifier diode D1 in
LED
D
culate D . A more accurate value of maximum duty
MAX
cycle can be calculated once the power MOSFET is
selected based on the maximum inductor current.
volts (approximately 0.6V), V
supply voltage in volts, and V
is the minimum input-
is the average drain-to-
INMIN
FET
Use the equations below to calculate the maximum aver-
source voltage of the MOSFET Q1 in volts when it is on.
Use an approximate value of 0.2V initially to calculate
age inductor current IL
, peak-to-peak inductor cur-
AVG
rent ripple DI , and peak inductor current IL in amperes:
L
P
D
MAX
. A more accurate value of the maximum duty cycle
can be calculated once the power MOSFET is selected
based on the maximum inductor current.
I
LED
IL
=
AVG
1-D
MAX
Use the following equations to calculate the maximum
average inductor current IL
, peak-to-peak induc-
AVG
Allowing the peak-to-peak inductor ripple to be DI
L:
tor current ripple DI , and peak inductor current IL in
L
P
∆I
2
amperes:
L
IL = IL
+
AVG
P
I
LED
IL
=
AVG
1-D
MAX
where IL is the peak inductor current.
P
The inductance value (L) of inductor L1 in henries is
calculated as:
Allowing the peak-to-peak inductor ripple to be DI the
peak inductor current is given by:
L,
∆I
2
V
- V
×D
L
(
)
INMIN
FET MAX
IL = IL
+
P
AVG
L =
f
× ∆I
L
SW
The inductance value (L) of inductor L1 in henries (H) is
calculated as:
where f
is the switching frequency in hertz, V
SW
INMIN
and V
are in volts, and DI is in amperes. Choose an
FET
L
V
- V
×D
(
)
INMIN
FET MAX
inductor that has a minimum inductance greater than the
calculated value.
L =
f
× ∆I
L
SW
Peak Current-Sense Resistor (R4)
The value of the switch current-sense resistor R4 for the
boost and buck-boost configurations is calculated as
follows:
where f
is the switching frequency in hertz, V
SW
INMIN
and V
are in volts, and DI is in amperes.
FET
L
Choose an inductor that has a minimum inductance
greater than the calculated value. The current rating of
the inductor should be higher than IL at the operating
0.418V - V
SC
P
R4 =
Ω
IL
P
temperature.
Buck-Boost Configuration
In the buck-boost LED driver (see the Typical Operating
Circuits), the average inductor current is equal to the
where IL is the peak inductor current in amperes and
P
V
SC
is the peak slope compensation voltage.
______________________________________________________________________________________ 15
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
For buck-boost configuration:
Slope Compensation
Slope compensation should be added to converters
with peak current-mode control operating in continuous-
conduction mode with more than 50% duty cycle to
avoid current-loop instability and subharmonic oscilla-
tions. The minimum amount of slope compensation that
is required for stability is:
0.418V
R4 =
V
−
V
f
LED INMIN
L
IL + 0.75D
P
MAX
MIN SW
The minimum value of the slope-compensation resistor
(R1) that should be used to ensure stable operation at
minimum input supply voltage can be calculated as:
V
= 0.5 (inductor current downslope -
SCMIN
inductor current upslope) x R4
For boost configuration:
In the ICs, the slope-compensating ramp is added to the
current-sense signal before it is fed to the PWM com-
parator. Connect a resistor (R1) from CS to the inductor
current-sense resistor terminal to program the amount of
slope compensation.
(V
−
2V
)×R4 ×1.5
× 50µA
LED
INMIN
× f
R1=
2 ×L
MIN SW
For buck-boost configuration :
(V
The ICs generate a current ramp with a slope of 50FA/
−
V
)×R4 ×1.5
LED
INMIN
R1=
t
for slope compensation. The current-ramp signal is
OSC
2 ×L
× f
× 50µA
MIN SW
forced into the external resistor (R1) connected between
CS and the source of the external MOSFET, thereby
adding a programmable slope compensating voltage
where f
is the switching frequency in hertz, V
INMIN
SW
is the minimum input voltage in volts, V
is the LED
LED
(V ) at the current-sense input CS. Therefore:
SCOMP
voltage in volts, D
is the maximum duty cycle, IL
MAX
P
dV /dt = (R1 x 50FA)/t
in V/s
SC
OSC
is the peak inductor current in amperes, and L
is the
MIN
minimum value of the selected inductor in henries.
The minimum value of the slope-compensation voltage
that needs to be added to the current-sense signal at
peak current and at minimum line voltage is:
Output Capacitor
The function of the output capacitor is to reduce the
output ripple to acceptable levels. The ESR, ESL, and
the bulk capacitance of the output capacitor contribute
to the output ripple. In most applications, the output ESR
and ESL effects can be dramatically reduced by using
low-ESR ceramic capacitors. To reduce the ESL and
ESR effects, connect multiple ceramic capacitors in par-
allel to achieve the required bulk capacitance. To mini-
mize audible noise generated by the ceramic capacitors
during PWM dimming, it could be necessary to minimize
the number of ceramic capacitors on the output. In these
cases, an additional electrolytic or tantalum capacitor
provides most of the bulk capacitance.
(D
× (V
2 ×L
- 2V
)×R4)
MAX
LED
INMIN
SC
=
(V)Boost
MIN
× f
MIN SW
(D
× (V
2 ×L
- V
)×R4)
MAX
LED
INMIN
SC
=
(V)Buck-boost
MIN
× f
MIN SW
where f
is the switching frequency, D
is the maxi-
SW
MAX
mum duty cycle, which occurs at low line, V
is the
INMIN
minimum input voltage, and L
is the minimum value of
MIN
the selected inductor. For adequate margin, the slope-com-
pensation voltage is multiplied by a factor of 1.5. Therefore,
the actual slope-compensation voltage is given by:
Boost and Buck-Boost Configurations
The calculation of the output capacitance is the same for
both boost and buck-boost configurations. The output rip-
ple is caused by the ESR and the bulk capacitance of the
output capacitor if the ESL effect is considered negligible.
For simplicity, assume that the contributions from ESR and
the bulk capacitance are equal, allowing 50% of the ripple
for the bulk capacitance. The capacitance is given by:
V
= 1.5SC
MIN
SC
From the previous formulas, it is possible to calculate the
value of R4 as:
For boost configuration:
0.418V
R4 =
V
−
2V
f
LED INMIN
IL + 0.75D
P
MAX
L
MIN SW
I
× 2 ×D
MAX
LED
C
≥
OUT
V
× f
OUTRIPPLE SW
16 _____________________________________________________________________________________
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
where I
hertz, and V
is in amperes, C
OUTRIPPLE
is in farads, f
is in
LED
OUT
SW
∆V
IN
is in volts. The remaining 50% of
allowable ripple is for the ESR of the output capacitor.
Based on this, the ESR of the output capacitor is given by:
ESR
<
CIN
∆I × 2
L
where DI is in amperes, ESR
is in ohms, and DV
IN
L
CIN
V
is in volts. Use the equation below to calculate the RMS
current rating of the input capacitor:
OUTRIPPLE
ESR
<
(Ω)
COUT
(IL × 2)
P
∆I
L
where IL is the peak-inductor current in amperes. Use
P
the equation below to calculate the RMS current rating of
the output capacitor:
I
(RMS) =
CIN
2 3
\conductors
Switching MOSFET
2
I
= IL
D
1 D
−
(
)
COUT(RMS)
AVG
MAX
MAX
The switching MOSFET (Q1) should have a voltage rat-
ing sufficient to withstand the maximum output voltage
together with the diode drop of rectifier diode D1 and
any possible overshoot due to ringing caused by parasit-
ic inductances and capacitances. Use a MOSFET with a
drain-to-source voltage rating higher than that calculated
by the following equations.
Input Capacitor
The input-filter capacitor bypasses the ripple current
drawn by the converter and reduces the amplitude of
high-frequency current conducted to the input supply.
The ESR, ESL, and the bulk capacitance of the input
capacitor contribute to the input ripple. Use a low-ESR
input capacitor that can handle the maximum input RMS
ripple current from the converter. For the boost con-
figuration, the input current is the same as the inductor
current. For buck-boost configuration, the input current
is the inductor current minus the LED current. However,
for both configurations, the ripple current that the input
filter capacitor has to supply is the same as the induc-
tor ripple current with the condition that the output filter
capacitor should be connected to ground for buck-boost
configuration. This reduces the size of the input capaci-
tor, as the input current is continuous with maximum
Boost Configuration
+ V ) x 1.2
V
= (V
DS
LED D
where V is the drain-to-source voltage in volts and V
DS
D
is the forward drop of rectifier diode D1. The factor of 1.2
provides a 20% safety margin.
Buck-Boost Configuration
+ V ) x 1.2
INMAX D
V
= (V
+ V
DS
LED
where V is the drain-to-source voltage in volts and V
DS
D
is the forward drop of rectifier diode D1. The factor of 1.2
provides a 20% safety margin.
QDI /2. Neglecting the effect of LED current ripple, the
calculation of the input capacitor for boost, as well as
buck-boost configurations is the same.
L
The RMS current rating of the switching MOSFET Q1 is cal-
culated as follows for boost and buck-boost configurations:
Neglecting the effect of the ESL, the ESR, and the bulk
capacitance at the input contribute to the input-voltage
ripple. For simplicity, assume that the contributions from
the ESR and the bulk capacitance are equal. This allows
50% of the ripple for the bulk capacitance. The capaci-
tance is given by:
2
I
= 1.3×( (IL
) ×D
)
MAX
DRMS
AVG
where I
amperes.
is the MOSFET Q1’s drain RMS current in
DRMS
The MOSFET Q1 dissipates power due to both switching
losses, as well as conduction losses. The conduction
losses in the MOSFET are calculated as follows:
∆I
L
C
≥
IN
4× ∆V × f
P
= (IL
)2 x D
x R
MAX DSON
IN SW
COND
AVG
where R
is in watts, and IL
ing equations to calculate the switching losses in the
MOSFET.
is the on-resistance of Q1 in ohms, P
COND
DSON
where DI is in amperes, C is in farads, f is in hertz,
SW
L
IN
is in amperes. Use the follow-
AVG
and DV is in volts. The remaining 50% of allowable
IN
ripple is for the ESR of the input capacitor. Based on this,
the ESR of the input capacitor is given by:
______________________________________________________________________________________ 17
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
Boost Configuration
The worst-case RHP zero frequency (f
lated as follows:
) is calcu-
ZRHP
2
IL
× V
× C × f
GD SW
AVG
LED
P
=
Boost Configuration
SW
2
2
V
× (1- D
2π ×L ×I
)
LED
MAX
LED
f
=
ZRHP
1
1
×
+
IG
IG
ON
OFF
Buck-Boost Configuration
2
Buck-Boost Configuration
V
× (1- D
)
MAX
LED
f
=
ZRHP
2
2π ×L ×I
×D
IL
×(V
+ V
) × C × f
GD SW
LED
MAX
AVG
LED
INMAX
2
P
=
SW
where f
is in hertz, V
is in volts, L is the induc-
LED
ZRHP
tance value of L1 in henries, and I
is in amperes.
LED
1
1
×
+
The switching converter small-signal transfer function
also has an output pole for both boost and buck-boost
configurations. The effective output impedance that
determines the output pole frequency together with the
output filter capacitance is calculated as follows:
IG
IG
ON
OFF
where IG
and IG
are the gate currents of the
ON
OFF
MOSFET Q1 in amperes when it is turned on and turned
off, respectively, V and V are in volts, IL is
LED
INMAX
AVG
in amperes, f
MOSFET capacitance in farads.
is in hertz, and C
is the gate-to-drain
SW
GD
Boost Configuration
(R
+ R7)× V
LED
LED
+ R7)×I
R
=
OUT
Rectifier Diode
(R
+ V
LED
LED LED
Use a Schottky diode as the rectifier (D1) for fast switch-
ing and to reduce power dissipation. The selected
Schottky diode must have a voltage rating 20% above
the maximum converter output voltage. The maximum
Buck-Boost Configuration
+ R7)× V
(R
LED
LED
R
=
OUT
(R
+ R7)×I
×D
+ V
MAX LED
converter output voltage is V
in boost configuration
LED
LED
LED
and V
+ V
in buck-boost configuration.
LED
INMAX
where R
is the dynamic impedance of the LED string
LED
The current rating of the diode should be greater than I
in the following equation:
D
at the operating current in ohms, R7 is the LED current-
sense resistor in ohms, V
amperes.
is in volts, and I
is in
LED
LED
I
= IL
x (1 - D ) x 1.5
MAX
D
AVG
The output pole frequency for both boost and buck-
boost configurations is calculated as below:
Dimming MOSFET
Select a dimming MOSFET (Q2) with continuous current
rating at the operating temperature higher than the LED
current by 30%. The drain-to-source voltage rating of the
1
f
=
P2
2π × C
×R
OUT
OUT
dimming MOSFET must be higher than V
by 20%.
LED
where f is in hertz, C
is the output filter capaci-
OUT
P2
Feedback Compensation
The LED current control loop comprising the switching
converter, the LED current amplifier, and the error ampli-
fier should be compensated for stable control of the LED
current. The switching converter small-signal transfer
function has a right-half-plane (RHP) zero for both boost
and buck-boost configurations as the inductor current
is in continuous conduction mode. The RHP zero adds
a 20dB/decade gain together with a 90-degree phase
lag, which is difficult to compensate. The easiest way
to avoid this zero is to roll off the loop gain to 0dB at a
frequency less than 1/5 the RHP zero frequency with a
-20dB/decade slope.
tance in farads, and R
is the effective output imped-
OUT
ance in ohms calculated above.
The feedback loop compensation is done by connecting
resistor R10 and capacitor C4 in series from the COMP
pin to GND. R10 is chosen to set the high-frequency gain
of the integrator to set the crossover frequency at f
/5
ZRHP
and C4 is chosen to set the integrator zero frequency
to maintain loop stability. For optimum performance,
choose the components using the following equations:
2 × f
× R4
ZRHP
R10 =
F
× (1
−
D
) ×R7× 6.15 × GM
MAX COMP
C
18 _____________________________________________________________________________________
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
The value of C4 can be calculated as below:
U Isolate the power components and high-current paths
from the sensitive analog circuitry.
25
U Keep the high-current paths short, especially at the
ground terminals. This practice is essential for stable,
jitter-free operation. Keep switching loops short such that:
C4 =
π × R10 × f
ZRHP
where R10 is the compensation resistor in ohms, f
ZRHP
a) The anode of D1 must be connected very close to
the drain of the MOSFET Q1.
and f
are in hertz, R4 is the inductor current-sense
resistor in ohms, R7 is the LED current-sense resistor in
ohms, factor 6.15 is the gain of the LED current-sense
P2
b) The cathode of D1 must be connected very close
to C
.
OUT
amplifier, and GM
is the transconductance of the
COMP
error amplifier in amps/volts.
c) C
and current-sense resistor R4 must be con-
OUT
nected directly to the ground plane.
Layout Recommendations
Typically, there are two sources of noise emission in a
switching power supply: high di/dt loops and high dV/dt
surfaces. For example, traces that carry the drain cur-
rent often form high di/dt loops. Similarly, the heatsink
of the MOSFET connected to the device drain presents
a dV/dt source; therefore, minimize the surface area of
the heatsink as much as is compatible with the MOSFET
power dissipation or shield it. Keep all PCB traces car-
rying switching currents as short as possible to minimize
current loops. Use ground planes for best results.
U Connect PGND and SGND at a single point.
U Keep the power traces and load connections short. This
practice is essential for high efficiency. Use thick copper
PCBs (2oz vs. 1oz) to enhance full-load efficiency.
U Route high-speed switching nodes away from the
sensitive analog areas. Use an internal PCB layer for
the PGND and SGND plane as an EMI shield to keep
radiated noise away from the device, feedback dividers,
and analog bypass capacitors.
Careful PCB layout is critical to achieve low switching
losses and clean, stable operation. Use a multilayer board
whenever possible for better noise immunity and power
dissipation. Follow these guidelines for good PCB layout:
U Use a large contiguous copper plane under the ICs’
package. Ensure that all heat-dissipating compo-
nents have adequate cooling.
______________________________________________________________________________________ 19
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
Typical Operating Circuits
L1
D1
V
IN
6V TO 18V WITH LOAD
DUMP UP TO 70V
Q1
IN
NDRV
R5
R7
C2
C1
LFRAMP
CS
R1
OVP
ISENSE+
ISENSE-
PWMDIM
PWMDIM
RT/SYNC
R3
R2
DIMOUT
Q2
FLT
V
COMP
CC
LED+
LED-
C4
C3
R8
R4
R11
MAX16833
MAX16833C
MAX16833E
R9
R10
ICTRL
SGND
PGND
EP
BOOST HEADLAMP DRIVER
LED-
L1
D1
V
IN
6V TO 18V WITH LOAD
DUMP UP TO 70V
Q1
IN
NDRV
R5
R7
C2
C1
REF
CS
R1
OVP
ISENSE+
ISENSE-
PWMDIM
PWMDIM
RT/SYNC
R3
R2
DIMOUT
Q2
V
FLT
CC
COMP
C3
R8
LED+
R9
C4
R4
R11
MAX16833B
MAX16833D
ICTRL
SGND
R10
PGND
EP
BUCK-BOOST HEADLAMP DRIVER
20 _____________________________________________________________________________________
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
Ordering Information (continued)
MAX DUTY CYCLE FAULT OUTPUT
PART
TEMP RANGE
PIN-PACKAGE
FUNCTIONALITY
(%)
88.5
88.5
94
BLANKING
MAX16833BAUE+
MAX16833BAUE/V+
MAX16833CAUE+
-40°C to +125°C 16 TSSOP-EP*
-40°C to +125°C 16 TSSOP-EP*
-40°C to +125°C 16 TSSOP-EP*
Reference Voltage Output
Reference Voltage Output
Frequency Dithering
Yes
Yes
Yes
MAX16833CAUE/V+ -40°C to +125°C 16 TSSOP-EP*
MAX16833DAUE+ -40°C to +125°C 16 TSSOP-EP*
MAX16833DAUE/V+ -40°C to +125°C 16 TSSOP-EP*
MAX16833EAUE+ -40°C to +125°C 16 TSSOP-EP*
Frequency Dithering
94
Yes
Reference Voltage Output
Reference Voltage Output
Frequency Dithering
94
Yes
94
Yes
88.5
88.5
No
MAX16833EAUE/V+ -40°C to +125°C 16 TSSOP-EP*
Frequency Dithering
No
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
/V denotes an automotive qualified part.
Chip Information
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maxim-ic.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PROCESS: BiCMOS-DMOS
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
16 TSSOP-EP
U16E+3
21-0108
90-0120
______________________________________________________________________________________ 21
High-Voltage HB LED Drivers with
Integrated High-Side Current Sense
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
DESCRIPTION
0
1
2
3
6/10
11/10
12/10
7/11
Initial release
—
1, 21, 22
22
Added MAX16833AUE
Added MAX16833C and MAX16833D
Added MAX16833E
1–4, 6–14, 20, 21
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time.
22
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
2011 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
©
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