MAX16936SATEB/V+ [MAXIM]
Switching Regulator, Current-mode, 4.5A, 2200kHz Switching Freq-Max, BICMOS, TQFN-16;型号: | MAX16936SATEB/V+ |
厂家: | MAXIM INTEGRATED PRODUCTS |
描述: | Switching Regulator, Current-mode, 4.5A, 2200kHz Switching Freq-Max, BICMOS, TQFN-16 信息通信管理 开关 |
文件: | 总17页 (文件大小:1278K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
EVALUATION KIT AVAILABLE
MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
General Description
Benefits and Features
● Integration and High-Switching Frequency Saves
The MAX16936/MAX16938 are 2.5A current-mode step-
down converters with integrated high-side and low-side
MOSFETs designed to operate with an external Schottky
diode for better efficiency. The low-side MOSFET enables
fixed-frequency forced-PWM (FPWM) operation under
light-load applications. The devices operate with input
voltages from 3.5V to 36V, while using only 28µA
quiescent current at no load. The switching frequency is
resistor programmable from 220kHz to 2.2MHz and can
be synchronized to an external clock. The devices’ output
voltage is available as 5V/3.3V fixed or adjustable from
1V to 10V. The wide input voltage range along with its
ability to operate at 98% duty cycle during undervoltage
transients make the devices ideal for automotive and
industrial applications.
Space
• Integrated 2.5A High-Side Switch
• Low-BOM-Count Current-Mode Control
Architecture
• Fixed Output Voltage with ±2% Accuracy (5V/3.3V)
or Externally Resistor Adjustable (1V to 10V)
• 220kHz to 2.2MHz Switching Frequency with
Three Operation Modes (Skip Mode, Forced
Fixed-Frequency Operation, and External
Frequency Synchronization)
• Automatic LX Slew-Rate Adjustment for Optimum
Efficiency Across Operating Frequency Range
● 180° Out-of-Phase Clock Output at SYNCOUT
Enables Cascaded Power Supplies for Increased
Power Output
Under light-load applications, the FSYNC logic input
allows the devices to either operate in skip mode for
reduced current consumption or fixed-frequency FPWM
mode to eliminate frequency variation to minimize EMI.
Fixed-frequency FPWM mode is extremely useful for
power supplies designed for RF transceivers where
tight emission control is necessary. Protection features
include cycle-by-cycle current limit and thermal shutdown
with automatic recovery. Additional features include a
power-good monitor to ease power-supply sequencing
and a 180º out-of-phase clock output relative to the inter-
nal oscillator at SYNCOUT to create cascaded power
supplies with multiple devices.
● Spread-Spectrum Frequency Modulation Reduces
EMI Emissions
● Wide Input Voltage Range Supports Automotive
Applications
• 3.5V to 36V Input Voltage Range
• Enable Input Compatible from 3.3V Logic Level
to 42V
● Robust Performance Supports Wide Range of
Automotive Applications
• 42V Load-Dump Protection
• -40°C to +125°C Automotive Temperature Range
• Thermal-Shutdown Protection
• AEC-Q100 Qualified
The MAX16936/MAX16938 operate over the -40ºC to
+125ºC automotive temperature range and are available
in 16-pin TSSOP-EP and 5mm x 5mm, 16-pin TQFN-EP
packages.
● Power-Good Output Allows Power-Supply
Sequencing
Applications
● Point-of-Load Applications
● Distributed DC Power Systems
● Navigation and Radio Head Units
● Tight Overvoltage Protection Provides Smaller
Overshoot Voltages (MAX16938)
Ordering Information/Selector Guide and Typical
Application Circuit appear at end of data sheet.
19-6626; Rev 16; 7/17
MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
Absolute Maximum Ratings
SUP, SUPSW, EN to PGND...................................-0.3V to +42V
LX (Note 1) ............................................................-0.3V to +42V
SUP to SUPSW.....................................................-0.3V to +0.3V
BIAS to AGND.........................................................-0.3V to +6V
SYNCOUT, FOSC, COMP, FSYNC,
Output Short-Circuit Duration....................................Continuous
Continuous Power Dissipation (T = +70NC)*
A
TSSOP (derate 26.1mw/NC above +70NC).............2088.8mW
TQFN (derate 28.6mw/NC above +70NC)...............2285.7mW
Operating Temperature Range........................ -40NC to +125NC
Junction Temperature .....................................................+150NC
Storage Temperature Range............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
PGOOD, FB to AGND ........................-0.3V to (V
+ 0.3V)
BIAS
OUT to PGND........................................................-0.3V to +12V
BST to LX (Note 1) ..................................................-0.3V to +6V
AGND to PGND...................................................-0.3V to + 0.3V
LX Continuous RMS Current ...................................................3A
*As per JEDEC51 standard (multilayer board).
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Package Thermal Characteristics (Note 2)
TSSOP
TQFN
N
Junction-to-Ambient Thermal Resistance (B ) .......38.3NC/W
Junction-to-Ambient Thermal Resistance (B ) ..........35 C/W
JA
JA
Junction-to-Case Thermal Resistance (B ).................3NC/W
Junction-to-Case Thermal Resistance (B )..............2.7NC/W
JC
JC
Note 1: Self-protected against transient voltages exceeding these limits for ≤ 50ns under normal operation and loads up to the
maximum rated output current.
Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(V
= V
= 14V, V
= 14V, L1 = 2.2FH, C = 4.7FF, C
= 22FF, C
= 1FF, C
= 0.1FF, R = 12kI,
FOSC
SUP
SUPSW
EN
IN
OUT
BIAS
BST
T
= T = -40NC to +125NC, unless otherwise noted. Typical values are at T = +25NC.)
A
J
A
PARAMETER
SYMBOL
, V
CONDITIONS
MIN
TYP
MAX
36
UNITS
Supply Voltage
V
(Note 3)
< 1s
3.5
V
SUP SUPSW
Load Dump Event Supply
Voltage
V
t
42
40
V
SUP_LD
LD
Standby mode, no load, V
= 5V,
OUT
28
V
= 0V
FSYNC
Supply Current
I
FA
SUP_STANDBY
Standby mode, no load, V
= 3.3V,
OUT
22
5
35
8
V
V
V
= 0V
FSYNC
Shutdown Supply Current
BIAS Regulator Voltage
BIAS Undervoltage Lockout
I
= 0V
FA
V
SHDN
EN
= V
= 6V to 42V,
SUPSW
= 0 to 10mA
rising
BIAS
SUP
V
4.7
5
5.4
3.40
650
BIAS
I
BIAS
V
V
2.95
3.15
450
+175
15
V
UVBIAS
BIAS Undervoltage-Lockout
Hysteresis
mV
NC
NC
Thermal Shutdown Threshold
Thermal Shutdown Threshold
Hysteresis
Maxim Integrated
│ 2
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MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
Electrical Characteristics (continued)
(V
= V
= 14V, V
= 14V, L1 = 2.2FH, C = 4.7FF, C
= 22FF, C
= 1FF, C
= 0.1FF, R = 12kI,
FOSC
SUP
SUPSW
EN
IN
OUT
BIAS
BST
T
= T = -40NC to +125NC, unless otherwise noted. Typical values are at T = +25NC.)
A
J
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
OUTPUT VOLTAGE (OUT)
V
= V
, 6V < V < 36V,
FB
BIAS SUPSW
V
MAX16936/38/38____A/V+, fixed-
4.9
5
5.1
OUT_5V
frequency mode
FPWM Mode Output Voltage
(Note 4)
V
V
V
= V
, 6V < V < 36V,
FB
BIAS SUPSW
V
V
MAX16936/38____B/V+, fixed-frequency
mode
3.234
3.3
3.366
OUT_3.3V
No load, V = V
,
FB
BIAS
V
4.9
5
5.15
3.4
OUT_5V
MAX16936/38____A/V+, skip mode
Skip-Mode Output Voltage
(Note 5)
V
= V , 6V < V < 36V,
FB
BIAS SUPSW
3.234
3.3
OUT_3.3V
MAX16936/38____B/V+, skip mode
Load Regulation
Line Regulation
V
= V
, 300mA < I < 2.5A
LOAD
0.5
0.02
1.5
%
FB
FB
BIAS
V
= V
, 6V < V
< 36V
%/V
mA
BIAS
SUPSW
I
High-side MOSFET on, V
- V = 5V
1
3
2
5
BST_ON
BST
BST
LX
BST Input Current
High-side MOSFET off, V
- V = 5V,
LX
I
FA
BST_OFF
T
= +25°C
A
LX Current Limit
LX Rise Time
I
Peak inductor current
= 12kW
3.75
4
4.5
A
LX
R
ns
FOSC
MAX16936
MAX16938
150
200
300
400
400
500
Skip-Mode Current Threshold
Spread Spectrum
I
T
= +25°C
A
mA
SKIP_TH
Spread spectrum enabled
f
Q6%
OSC
High-Side Switch
On-Resistance
R
I
= 1A, V = 5V
100
1
220
3
mI
FA
I
ON_H
LX
BIAS
High-Side Switch Leakage
Current
High-side MOSFET off, V
V
= 36V,
SUP
= 0V, T = +25NC
LX
A
Low-Side Switch
On-Resistance
R
I
= 0.2A, V = 5V
BIAS
1.5
3
ON_L
LX
Low-Side Switch
Leakage Current
V
= 36V, T = +25NC
1
FA
LX
A
TRANSCONDUCTANCE AMPLIFIER (COMP)
FB Input Current
I
20
1.0
100
nA
V
FB
FB connected to an external resistor-
divider, 6V < V < 36V (Note 6)
FB Regulation Voltage
V
0.99
1.015
FB
SUPSW
FB Line Regulation
DV
6V < V
< 36V
0.02
700
%/V
FS
LINE
SUPSW
Transconductance
(from FB to COMP)
g
V
= 1V, V
= 5V
m
FB
BIAS
Minimum On-Time
t
(Note 5)
80
98
ns
%
ON_MIN
Maximum Duty Cycle
DC
MAX
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MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
Electrical Characteristics (continued)
(V
= V
= 14V, V
= 14V, L1 = 2.2FH, C = 4.7FF, C
= 22FF, C
= 1FF, C
= 0.1FF, R = 12kI,
FOSC
SUP
SUPSW
EN
IN
OUT
BIAS
BST
T
= T = -40NC to +125NC, unless otherwise noted. Typical values are at T = +25NC.)
A
J
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
OSCILLATOR FREQUENCY
R
R
= 73.2kI
340
2.0
400
2.2
460
kHz
FOSC
Oscillator Frequency
= 12kI
2.4
MHz
FOSC
EXTERNAL CLOCK INPUT (FSYNC)
External Input Clock
Acquisition Time
t
1
Cycles
MHz
V
FSYNC
External Input Clock
Frequency
R
= 12kI (Note 7)
rising
1.8
1.4
2.6
FOSC
External Input Clock High
Threshold
V
V
V
FSYNC_HI
FSYNC
FSYNC
External Input Clock Low
Threshold
V
falling
0.4
12
V
FSYNC_LO
Soft-Start Time
t
5.6
2.4
8
ms
SS
ENABLE INPUT (EN)
Enable Input High Threshold
Enable Input Low Threshold
V
V
EN_HI
V
0.6
1
EN_LO
Enable Threshold-Voltage
Hysteresis
V
0.2
0.1
V
EN_HYS
Enable Input Current
I
T
= +25NC
A
FA
EN
POWER GOOD (PGOOD)
V
V
V
rising, V = high
PGOOD
93
90
10
95
92
25
97
94
50
0.4
1
TH_RISING
FB
PGOOD Switching Level
%V
FB
V
falling, V
= low
TH_FALLING
FB
PGOOD
PGOOD Debounce Time
PGOOD Output Low Voltage
PGOOD Leakage Current
SYNCOUT Low Voltage
Fs
I
= 5mA
V
SINK
V
in regulation, T = +25NC
FA
V
OUT
A
I
= 5mA
0.4
1
SINK
SYNCOUT Leakage Current
FSYNC Leakage Current
OVERVOLTAGE PROTECTION
T
T
= +25NC
FA
FA
A
A
= +25NC
1
MAX16936
MAX16938
MAX16936
MAX16938
107
105
105
102
V
rising
OUT
(monitored at FB pin)
Overvoltage-Protection
Threshold
%
V
falling
OUT
(monitored at FB pin)
Note 3: Device is designed for use in applications with continuous 14V operation, and meets Electrical Characteristics table up to
the maximum supply voltage.
Note 4: Device not in dropout condition.
Note 5: Guaranteed by design; not production tested.
Note 6: FB regulation voltage is 1%, 1.01V (max), for -40°C < T < +105°C.
A
Note 7: Contact the factory for SYNC frequency outside the specified range.
Maxim Integrated
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MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
Typical Operating Characteristics
(V
= V
= 14V, V = 14V, V
= 5V, V
= 0V, R
= 12kI, T = +25NC, unless otherwise noted.)
SUP
SUPSW
EN
OUT
FYSNC
FOSC A
V
LOAD REGULATION
EFFICIENCY vs. LOAD CURRENT
EFFICIENCY vs. LOAD CURRENT
OUT
5.10
5.08
5.06
5.04
5.02
5.00
4.98
4.96
4.94
4.92
4.90
100
90
80
70
60
50
40
30
20
10
0
100
f
= 2.2MHz, V = 14V
f
= 400kHz, V = 14V
V
OUT
SKIP MODE
= 5V, V = 14V
SW
IN
SW
IN
IN
90
80
70
60
50
40
30
20
10
0
SKIP MODE
5V
5V
SKIP MODE
5V
3.3V
400kHz
2.2MHz
3.3V
3.3V
3.3V
PWM MODE
5V
PWM MODE
0
0.5
1.0
I
1.5
(A)
2.0
2.5
0
0.001
0.1
10
0
0.001
0.1
10
2.5
132
LOAD CURRENT (A)
LOAD CURRENT (A)
LOAD
V
LOAD REGULATION
f
vs. LOAD CURRENT
f
vs. LOAD CURRENT
OUT
SW
SW
5.10
5.08
5.06
5.04
5.02
5.00
4.98
4.96
4.94
4.92
4.90
2.30
2.28
2.26
2.24
2.22
2.20
2.18
2.16
2.14
2.12
2.10
435
434
433
432
431
430
429
428
427
426
425
V
= 5V, V = 14V
V
= 14V,
V
IN
= 14V,
PWM MODE
OUT
IN
IN
PWM MODE
PWM MODE
V
= 5V
OUT
V
= 5V
OUT
400kHz
V
= 3.3V
OUT
V
= 3.3V
OUT
2.2MHz
0
0.5
1.0
1.5
2.0
2.5
0
0.5
1.0
1.5
2.0
0
0.5
1.0
1.5
2.0
2.5
I
(A)
I
(A)
I
(A)
LOAD
LOAD
LOAD
SWITCHING FREQUENCY vs. R
f
vs. TEMPERATURE
SUPPLY CURRENT vs. SUPPLY VOLTAGE
FOSC
SW
2.50
2.25
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
50
45
40
35
30
25
20
15
10
V
= 14V,
IN
2.28
2.24
2.20
2.16
2.12
2.08
2.04
2.00
PWM MODE
V
= 5V
OUT
5V/2.2MHz
SKIP MODE
V
= 3.3V
OUT
12
42
72
(kΩ)
102
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
6
16
26
36
R
SUPPLY VOLTAGE (V)
FOSC
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MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
Typical Operating Characteristics (continued)
(V
= V
= 14V, V = 14V, V
= 5V, V
= 0V, R
= 12kI, T = +25NC, unless otherwise noted.)
SUP
SUPSW
EN
OUT
FYSNC
FOSC A
V
vs. V
V
vs. TEMPERATURE
SHDN CURRENT vs. SUPPLY VOLTAGE
OUT
IN
BIAS
5.08
5.06
5.04
5.02
5.00
4.98
4.96
4.94
4.92
4.90
10
5.02
5V/2.2MHz
PWM MODE
I
= 0A
LOAD
5.01
5.00
4.99
4.98
4.97
4.96
4.95
4.94
4.93
4.92
4.91
4.90
9
8
7
6
5
4
3
2
1
0
I
= 0A
LOAD
5V/2.2MHz
SKIP MODE
V
= 14V,
PWM MODE
IN
6
12
18
24
30
36
42
6
12
18
24
30
36
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
V
(V)
SUPPLY VOLTAGE (V)
IN
FULL-LOAD STARTUP BEHAVIOR
SLOW V RAMP BEHAVIOR
IN
V
vs. V
IN
OUT
toc14
toc15
5.05
5.03
5.01
4.99
4.97
4.95
5V/400kHz
PWM MODE
10V/div
10V/div
0V
I
= 0A
LOAD
V
0V
5V/div
0V
V
IN
IN
V
5V/div
0V
OUT
V
OUT
1A/div
5V/div
0V
0A
V
PGOOD
I
LOAD
5V/div
2A/div
0A
V
PGOOD
0V
I
LOAD
2ms
4s
6
12
18
24
30
36
V
(V)
IN
SLOW V RAMP BEHAVIOR
IN
SYNC FUNCTION
DIPS AND DROPS TEST
toc16
toc17
toc18
10V/div
10V/div
0V
V
IN
5V/2.2MHz
V
0V
IN
V
5V/div
2V/div
LX
5V/div
5V/div
0V
V
OUT
0V
10V/div
V
OUT
5V/div
V
LX
V
FSYNC
0V
V
PGOOD
0V
2A/div
0A
5V/div
V
PGOOD
0V
I
LOAD
4s
200ns
10ms
Maxim Integrated
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MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
Typical Operating Characteristics (continued)
(V
= V
= 14V, V = 14V, V
EN
= 5V, V
= 0V, R
= 12kI, T = +25NC, unless otherwise noted.)
SUP
SUPSW
OUT
FYSNC
FOSC
A
COLD CRANK
LOAD DUMP
toc19
toc20
V
IN
10V/div
V
IN
2V/div
2V/div
0V
V
OUT
V
OUT
5V/div
0V
V
PGOOD
2V/div
0V
400ms
100ms
SHORT CIRCUIT IN PWM MODE
LOAD TRANSIENT (PWM MODE)
toc22
toc21
f
= 2.2MHz
SW
V
OUT
= 5V
2V/div
0V
V
OUT
V
OUT
200mV/div
(AC-COUPLED)
2A/div
0A
INDUCTOR
CURRENT
2A/div
0A
LOAD
CURRENT
5V/div
0V
PGOOD
10ms
100µs
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MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
Pin Configurations
TOP VIEW
12
11
10
9
16 15 14 13 12 11 10
9
BST
8
7
6
5
LX 13
PGND 14
AGND
BIAS
MAX16936
MAX16938
MAX16936
MAX16938
PGOOD
15
16
EP
7
COMP
SYNCOUT
EP
4
+
+
1
2
3
4
5
6
8
1
2
3
TQFN
TSSOP
Pin Descriptions
PIN
NAME
FUNCTION
Open-Drain Clock Output. SYNCOUT outputs 180N out-of-phase signal relative to the
TSSOP
TQFN
1
16
SYNCOUT internal oscillator. Connect to OUT with a resistor between 100I and 1kW for 2MHz
operation. For low frequency operation, use a resistor between 1kW and 10kW.
Synchronization Input. The device synchronizes to an external signal applied to FSYNC.
2
1
FSYNC
Connect FSYNC to AGND to enable skip mode operation. Connect to BIAS or to an
external clock to enable fixed-frequency forced PWM mode operation.
Resistor-Programmable Switching Frequency Setting Control Input. Connect a resistor
from FOSC to AGND to set the switching frequency.
3
4
5
6
2
3
4
5
FOSC
OUT
FB
Switching Regulator Output. OUT also provides power to the internal circuitry when the
output voltage of the converter is set between 3V to 5V during standby mode.
Feedback Input. Connect an external resistive divider from OUT to FB and AGND to set
the output voltage. Connect to BIAS to set the output voltage to 5V.
Error Amplifier Output. Connect an RC network from COMP to AGND for stable
operation. See the Compensation Network section for more information.
COMP
Linear Regulator Output. BIAS powers up the internal circuitry. Bypass with a 1FF
capacitor to ground.
7
8
9
6
7
8
BIAS
AGND
BST
Analog Ground
High-Side Driver Supply. Connect a 0.1FF capacitor between LX and BST for
proper operation.
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MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
Pin Descriptions (continued)
PIN
NAME
FUNCTION
TSSOP
TQFN
SUP Voltage Compatible Enable Input. Drive EN low to disable the device. Drive EN high
to enable the device.
10
9
EN
SUP
Voltage Supply Input. SUP powers up the internal linear regulator. Bypass SUP to PGND
with a 4.7FF ceramic capacitor. It is recommended to add a placeholder for an RC filter
to reduce noise on the internal logic supply (see the Typical Application Circuit)
11
12
10
11
Internal High-Side Switch Supply Input. SUPSW provides power to the internal switch.
Bypass SUPSW to PGND with 0.1FF and 4.7FF ceramic capacitors.
SUPSW
13, 14
15
12, 13
14
LX
Inductor Switching Node. Connect a Schottky diode between LX and AGND.
Power Ground
PGND
Open-Drain, Active-Low Power-Good Output. PGOOD asserts when VOUT is above 95%
regulation point. PGOOD goes low when VOUT is below 92% regulation point.
16
15
PGOOD
Exposed Pad. Connect EP to a large-area contiguous copper ground plane for effective
power dissipation. Do not use as the only IC ground connection. EP must be connected
to PGND.
—
—
EP
Wide Input Voltage Range
Detailed Description
The devices include two separate supply inputs (SUP and
SUPSW) specified for a wide 3.5V to 36V input voltage
The MAX16936/MAX16938 are 2.5A current-mode step-
down converters with integrated high-side and low-
side MOSFETs designed to operate with an external
Schottky diode for better efficiency. The low-side MOSFET
enables fixed-frequency forced-PWM (FPWM) operation
under light-load applications. The devices operate with
input voltages from 3.5V to 36V, while using only 28FA
quiescent current at no load. The switching frequency is
resistor programmable from 220kHz to 2.2MHz and can
be synchronized to an external clock. The output volt-
age is available as 5V/3.3V fixed or adjustable from 1V to
10V. The wide input voltage range along with its ability to
operate at 98% duty cycle during undervoltage transients
make the devices ideal for automotive and industrial
applications.
range. V
provides power to the device and V
SUP
SUPSW
provides power to the internal switch. When the device
is operating with a 3.5V input supply, conditions such as
cold crank can cause the voltage at SUP and SUPSW to
drop below the programmed output voltage. Under such
conditions, the device operates in a high duty-cycle mode
to facilitate minimum dropout from input to output.
Maximum Duty-Cycle Operation
The devices have a maximum duty cycle of 98% (typ).
The IC monitors the off-time (time for which the low-
side FET is on) in both PWM and skip modes every
switching cycle. Once the off-time of 25ns (typ) is
detected continuously for 12μs, the low-side FET is
forced on for 150ns (typ) every 12μs. The input voltage
at which the devices enter dropout changes depend-
ing on the input voltage, output-voltage, switching fre-
quency, load current, and the efficiency of the design.
The input voltage at which the devices enter dropout
can be approximated as:
Under light-load applications, the FSYNC logic input
allows the device to either operate in skip mode for
reduced current consumption or fixed-frequency FPWM
mode to eliminate frequency variation to minimize EMI.
Fixed frequency FPWM mode is extremely useful for
power supplies designed for RF transceivers where tight
emission control is necessary. Protection features include
cycle-by-cycle current limit, overvoltage protection, and
thermal shutdown with automatic recovery. Additional
features include a power-good monitor to ease power-
supply sequencing and a 180N out-of-phase clock output
relative to the internal oscillator at SYNCOUT to create
cascaded power supplies with multiple devices.
V
+ (I
×R
)
OUT
OUT
0.98
ON_H
V
=
SUP
Note: The equation above does not take into account
the efficiency and switching frequency, but is a good
first-order approximation. Use the R
the max column in the Electrical Characteristics table.
number from
ON_H
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36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
OUT
COMP
PGOOD
EN
SUP
BIAS
FB
FBSW
FBOK
AON
HVLDO
SWITCH
OVER
BST
SUPSW
EAMP
PWM
LOGIC
HSD
REF
LX
CS
SOFT
START
BIAS
LSD
MAX16936
MAX16938
PGND
SLOPE
COMP
OSC
SYNCOUT
FSYNC FOSC
AGND
Figure 1. Internal Block Diagram
Linear Regulator Output (BIAS)
Overvoltage Protection (OVP)
The devices include a 5V linear regulator (BIAS) that
provides power to the internal circuit blocks. Connect
a 1FF ceramic capacitor from BIAS to AGND. When the
output voltage is set between 3V and 5.5V, the internal
linear regulator only provides power until the output is in
regulation. The internal linear regulator turns off once the
output is in regulation and allows OUT to provide power
to the device. The internal regulator turns back on once
the external load on the output of the device is higher
than 100mA. In addition, the linear regulator turns on any-
time the output voltage is outside the 3V to 5.5V range.
If the output voltage reaches the OVP threshold, the
high-side switch is forced off and the low-side switch
is forced on until negative-current limit is reached. After
negative-current limit is reached, both the high-side and
low-side switches are turned off. The MAX16938 offers a
lower voltage threshold for applications requiring tighter
limits of protection.
Synchronization Input (FSYNC)
FSYNC is a logic-level input useful for operating mode
selection and frequency control. Connecting FSYNC to
BIAS or to an external clock enables fixed-frequency
FPWM operation. Connecting FSYNC to AGND enables
skip mode operation.
Power-Good Output (PGOOD)
The devices feature an open-drain power-good output,
PGOOD. PGOOD asserts when V
of its regulation voltage. PGOOD deasserts when V
drops below 92% of its regulation voltage. Connect
PGOOD to BIAS with a 10kI resistor.
rises above 95%
OUT
The external clock frequency at FSYNC can be higher
or lower than the internal clock by 20%. Ensure the duty
cycle of the external clock used has a minimum pulse
width of 100ns. The device synchronizes to the external
OUT
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36V, 220kHz to 2.2MHz Step-Down Converters
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clock within one cycle. When the external clock signal
at FSYNC is absent for more than two clock cycles, the
device reverts back to the internal clock.
optimizes the rise time on LX node externally to minimize
EMI while maintaining good efficiency.
Internal Oscillator (FOSC)
System Enable (EN)
The switching frequency (f ) is set by a resistor
SW
An enable control input (EN) activates the device from its
low-power shutdown mode. EN is compatible with inputs
from automotive battery level down to 3.5V. The high
voltage compatibility allows EN to be connected to SUP,
KEY/KL30, or the inhibit pin (INH) of a CAN transceiver.
(R
) connected from FOSC to AGND. See Figure
FOSC
3 to select the correct R
value for the desired
FOSC
switching frequency. For example, a 400kHz switching
frequency is set with R = 73.2kI. Higher frequen-
FOSC
cies allow designs with lower inductor values and less
output capacitance. Consequently, peak currents and
I2R losses are lower at higher switching frequencies, but
core losses, gate charge currents, and switching losses
increase.
EN turns on the internal regulator. Once V
is above
BIAS
the internal lockout threshold, V
= 3.15V (typ), the
UVL
controller activates and the output voltage ramps up
within 8ms.
A logic-low at EN shuts down the device. During shut-
down, the internal linear regulator and gate drivers turn
off. Shutdown is the lowest power state and reduces the
quiescent current to 5FA (typ). Drive EN high to bring the
device out of shutdown.
Synchronizing Output (SYNCOUT)
SYNCOUT is an open-drain output that outputs a 180N
out-of-phase signal relative to the internal oscillator.
Overtemperature Protection
Thermal-overload protection limits the total power
dissipation in the devices. When the junction tempera-
ture exceeds 175NC (typ), an internal thermal sensor
shuts down the internal bias regulator and the step-down
controller, allowing the device to cool. The thermal
sensor turns on the device again after the junction
temperature cools by 15NC.
Spread-Spectrum Option
The devices have an internal spread-spectrum option
to optimize EMI performance. This is factory set and
the S-version of the device should be ordered. For
spread-spectrum-enabled ICs, the operating frequency is
varied 6% centered on FOSC. The modulation signal is
a triangular wave with a period of 110μs at 2.2MHz.
Therefore, FOSC will ramp down 6% and back to 2.2MHz in
110μs and also ramp up 6% and back to 2.2MHz in 110μs.
The cycle repeats.
Applications Information
Setting the Output Voltage
Connect FB to BIAS for a fixed +5V/+3.3 output voltage.
To set the output to other voltages between 1V and 10V,
connect a resistive divider from output (OUT) to FB to
AGND (Figure 2). Use the following formula to determine
For operations at FOSC values other than 2.2MHz, the
modulation signal scales proportionally, e.g., at 400kHz,
the 110μs modulation period increases to 110μs x
2.2MHz/400kHz = 605μs.
the R
of the resistive divider network:
FB2
The internal spread spectrum is disabled if the device is
synced to an external clock. However, the device does not
filter the input clock and passes any modulation (including
spread-spectrum) present on the driving external clock to
the SYNCOUT pin.
R
= R
x V /V
FB2
TOTAL FB OUT
where V = 1V, R
= selected total resistance of
is the desired output in volts.
FB
TOTAL
R
, R
in ω, and V
FB1 FB2
OUT
Automatic Slew-Rate Control on LX
V
OUT
The devices have automatic slew-rate adjustment that
optimizes the rise times on the internal HSFET gate
drive to minimize EMI. The IC detects the internal clock
frequency and adjusts the slew rate accordingly. When
the user selects the external frequency setting resistor
R
R
FB1
FB2
MAX16936
MAX16938
FB
R
FOSC
such that the frequency is > 1.1MHz, the HSFET
is turned on in 4ns (typ). When the frequency is < 1.1MHz
the HSFET is turned on in 8ns (typ). This slew-rate control
Figure 2. Adjustable Output-Voltage Setting
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36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
Inductor Selection
Calculate R
equation:
(OUT to FB resistor) with the following
FB1
Three key inductor parameters must be specified
for operation with the devices: inductance value (L),
inductor saturation current (I
V
OUT
), and DC resistance
SAT
R
= R
−1
FB2
FB1
V
(R ). To select inductance value, the ratio of inductor
DCR
FB
peak-to-peak AC current to DC average current (LIR)
must be selected first. A good compromise between size
and loss is a 30% peak-to-peak ripple current to average
current ratio (LIR = 0.3). The switching frequency, input
voltage, output voltage, and selected LIR then determine
the inductor value as follows:
where V = 1V (see the Electrical Characteristics table).
FB
FPWM/Skip Modes
The MAX16936/MAX16938 offer a pin selectable skip
mode or fixed-frequency PWM mode option. The IC has
an internal LS MOSFET that turns on when the FSYNC pin
is connected to V
or if there is a clock present on the
BIAS
V
(V
− V
)
OUT SUP
OUT
LIR
L =
FSYNC pin. This enables the fixed-frequency-forced PWM
mode operation over the entire load range. This option
allows the user to maintain fixed frequency over the entire
load range in applications that require tight control on EMI.
Even though the devices have an internal LS MOSFET for
fixed-frequency operation, an external Schottky diode is still
required to support the entire load range. If the FSYNC
pin is connected to GND, the skip mode is enabled on
the device.
V
f
I
SUP SW OUT
where V
, V
, and I
are typical values (so that
SUP OUT
OUT
efficiency is optimum for typical conditions). The switching
frequency is set by R
(see Figure 3).
FOSC
Input Capacitor
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the circuit’s switching.
In skip mode of operation, the converter’s switching
frequency is load dependent. At higher load current, the
switching frequency does not change and the operating
mode is similar to the FPWM mode. Skip mode helps
improve efficiency in light-load applications by allowing
the converters to turn on the high-side switch only when
the output voltage falls below a set threshold. As such,
the converters do not switch MOSFETs on and off as
often as is the case in the FPWM mode. Consequently,
the gate charge and switching losses are much lower in
skip mode.
The input capacitor RMS current requirement (I
defined by the following equation:
) is
RMS
V
(V
− V
)
OUT SUP
OUT
I
= I
RMS LOAD(MAX)
V
SUP
I
has a maximum value when the input voltage
equals twice the output voltage (V
RMS
= 2V
), so
SUP
OUT
I
= I
/2.
RMS(MAX)
LOAD(MAX)
Choose an input capacitor that exhibits less than +10NC
self-heating temperature rise at the RMS input current for
optimal long-term reliability.
SWITCHING FREQUENCY vs. R
FOSC
The input voltage ripple is composed of DV (caused
by the capacitor discharge) and DV
Q
2.50
2.25
2.00
1.75
1.50
1.25
1.00
0.75
0.50
0.25
0
(caused by the
ESR
ESR of the capacitor). Use low-ESR ceramic capacitors
with high ripple current capability at the input. Assume
the contribution from the ESR and capacitor discharge
equal to 50%. Calculate the input capacitance and ESR
required for a specified input voltage ripple using the fol-
lowing equations:
∆V
ESR
ESR
=
IN
∆I
L
2
I
+
OUT
12
42
72
(kΩ)
102
132
R
FOSC
Figure 3. Switching Frequency vs. R
FOSC
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36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
where:
V
OUT
(V
− V
)× V
SUP
V
OUT OUT
× f
∆I
=
L
R1
R2
×L
SUP
SW
and:
COMP
g
m
I
×D(1− D)
V
OUT
V
SUPSW
OUT
V
REF
C
=
and D =
R
C
IN
∆V × f
C
F
Q
SW
C
C
where I
duty cycle.
is the maximum output current and D is the
OUT
Output Capacitor
Figure 4. Compensation Network
The output filter capacitor must have low enough ESR
to meet output ripple and load transient requirements.
The output capacitance must be high enough to absorb
the inductor energy while transitioning from full-load
to no-load conditions without tripping the overvoltage
fault protection. When using high-capacitance, low-ESR
capacitors, the filter capacitor’s ESR dominates the output
voltage ripple. So the size of the output capacitor depends
on the maximum ESR required to meet the output-voltage
higher than necessary reverse-voltage Schottky rectifiers
that have higher forward-voltage drops.
Compensation Network
The devices use an internal transconductance error ampli-
fier with its inverting input and its output available to the
user for external frequency compensation. The output
capacitor and compensation network determine the loop
stability. The inductor and the output capacitor are chosen
based on performance, size, and cost. Additionally, the
compensation network optimizes the control-loop stability.
ripple (V ) specifications:
RIPPLE(P-P)
V
= ESR×I
×LIR
RIPPLE(P−P)
LOAD(MAX)
The controller uses a current-mode control scheme that
regulates the output voltage by forcing the required
current through the external inductor. The devices use
the voltage drop across the high-side MOSFET to sense
inductor current. Current-mode control eliminates the
double pole in the feedback loop caused by the inductor
and output capacitor, resulting in a smaller phase shift
and requiring less elaborate error-amplifier compensation
than voltage-mode control. Only a simple single-series
The actual capacitance value required relates to the
physical size needed to achieve low ESR, as well as
to the chemistry of the capacitor technology. Thus, the
capacitor is usually selected by ESR and voltage rating
rather than by capacitance value.
When using low-capacity filter capacitors, such as ceramic
capacitors, size is usually determined by the capacity
needed to prevent voltage droop and voltage rise from
causing problems during load transients. Generally,
once enough capacitance is added to meet the over-
shoot requirement, undershoot at the rising load edge
is no longer a problem. However, low capacity filter
capacitors typically have high ESR zeros that can affect
the overall stability.
resistor (R ) and capacitor (C ) are required to have a
C
C
stable, high-bandwidth loop in applications where ceramic
capacitors are used for output filtering (Figure 4). For other
types of capacitors, due to the higher capacitance and
ESR, the frequency of the zero created by the capacitance
and ESR is lower than the desired closed-loop crossover
frequency. To stabilize a nonceramic output capacitor
Rectifier Selection
loop, add another compensation capacitor (C ) from
F
The devices require an external Schottky diode rectifier
as a freewheeling diode when they are is configured for
skip-mode operation. Connect this rectifier close to the
device using short leads and short PCB traces. In FPWM
mode, the Schottky diode helps minimize efficiency loss-
es by diverting the inductor current that would otherwise
flow through the low-side MOSFET. Choose a rectifier
with a voltage rating greater than the maximum expected
COMP to GND to cancel this ESR zero.
The basic regulator loop is modeled as a power
modulator, output feedback divider, and an error
amplifier. The power modulator has a DC gain set by
g
O R
, with a pole and zero pair set by R
,
m
LOAD
LOAD
the output capacitor (C
), and its ESR. The following
OUT
equations allow to approximate the value for the gain
of the power modulator (GAIN ), neglecting the
input voltage, V
Schottky rectifier to limit the negative voltage at LX. Avoid
. Use a low forward-voltage-drop
SUPSW
MOD(dc)
effect of the ramp stabilization. Ramp stabilization is
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36V, 220kHz to 2.2MHz Step-Down Converters
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necessary when the duty cycle is above 50% and is
internally done for the device.
The loop-gain crossover frequency (f ) should be set
C
below 1/5th of the switching frequency and much higher
than the power-modulator pole (f
):
pMOD
GAIN
= g ×R
m LOAD
MOD(dc)
/I
f
SW
f
<< f ≤
C
where R
= V
in I and g = 3S.
m
pMOD
LOAD
OUT LOUT(MAX)
5
In a current-mode step-down converter, the output
capacitor, its ESR, and the load resistance introduce a
pole at the following frequency:
The total loop gain as the product of the modulator gain,
the feedback voltage-divider gain, and the error amplifier
gain at f should be equal to 1. So:
C
V
f
= 1(2π × C
× R
)
LOAD
FB
pMOD
OUT
GAIN
×
×GAIN
= 1
EA(fC)
MOD(fC)
V
OUT
The output capacitor and its ESR also introduce a zero at:
1
GAIN
= g
×R
m, EA
EA(fC)
C
f
f
=
pMOD
zMOD
GAIN
= GAIN
×
2π ×ESR× C
MOD(fC)
MOD(dc)
OUT
f
C
When C
in parallel, the resulting C
ESR = ESR
is composed of “n” identical capacitors
OUT
Therefore:
GAIN
= n O C
, and
OUT(EACH)
OUT
V
FB
×
/n. Note that the capacitor zero for a
(EACH)
×g
×R = 1
C
MOD(fC)
m,EA
parallel combination of alike capacitors is the same as for
an individual capacitor.
V
OUT
Solving for R :
C
The feedback voltage-divider has a gain of GAIN
=
FB
V
V
/V
, where V
is 1V (typ). The transconduc-
OUT
FB OUT
FB
R
=
C
tance error amplifier has a DC gain of GAIN
=
g
× V ×GAIN
FB MOD(fC)
EA(dc)
m,EA
g
m EA
O R , where g
OUT,EA
is the error amplifier
,
m,EA
Set the error-amplifier compensation zero formed by R
C
a
transconductance, which is 700FS (typ), and R
is
OUT,EA
and C (f
) at the f
. Calculate the value of C
C
zEA
pMOD
C
the output resistance of the error amplifier 50MI.
follows:
A dominant pole (f ) is set by the compensation
dpEA
1
capacitor (C ) and the amplifier output resistance
C
C
=
C
(R
OUT,EA
). A zero (f
C
) is set by the compensation
2π × f
×R
zEA
pMOD C
resistor (R ) and the compensation capacitor (C ).
There is an optional pole (f
cancel the output capacitor ESR zero if it occurs near
C
If f
F
is less than 5 x f , add a second capacitor,
C
C , from COMP to GND and set the compensation pole
formed by R and C (f
value of C as follows:
zMOD
) set by C and R to
pEA
F C
) at the f
pEA
. Calculate the
C
F
zMOD
the cross over frequency (f , where the loop gain equals
C
F
1 (0dB)). Thus:
1
C
=
1
F
2π × f
×R
f
=
zMOD
C
dpEA
2π × C ×(R
+ R )
C
C
OUT,EA
As the load current decreases, the modulator pole
also decreases; however, the modulator gain increases
accordingly and the crossover frequency remains the
same.
1
f
=
=
zEA
2π × C ×R
C
C
C
1
f
pEA
2π × C ×R
F
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36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
PCB Layout Guidelines
used on FOSC, COMP, and BIAS are connected to
analog ground.
Careful PCB layout is critical to achieve low switching
losses and clean, stable operation. Use a multilayer board
whenever possible for better noise immunity and power
dissipation. Follow these guidelines for good PCB layout:
3) Keep the high-current paths short, especially at the
ground terminals. This practice is essential for stable,
jitter-free operation. The high-current path composed
of the input capacitor, high-side FET, inductor, and
the output capacitor should be as short as possible.
1) Use a large contiguous copper plane under the IC
package. Ensure that all heat-dissipating components
have adequate cooling. The bottom pad of the IC
must be soldered down to this copper plane for effec-
tive heat dissipation and for getting the full power out
of the IC. Use multiple vias or a single large via in this
plane for heat dissipation.
4) Keep the power traces and load connections short. This
practice is essential for high efficiency. Use thick cop-
per PCBs (2oz vs. 1oz) to enhance full-load efficiency.
5) The analog signal lines should be routed away from
the high-frequency planes. Doing so ensures integrity
of sensitive signals feeding back into the IC.
2) Isolate the power components and high current path
from the sensitive analog circuitry. Doing so is essential
to prevent any noise coupling into the analog signals.
Implementing an RC filter on the SUP pin decreases
switching noise from entering the logic supply. Refer
to the MAX16936 EV kit data sheet for details on filter
configuration and PCB layout for the SUP and SUPSW
input capacitors. Do not route the OUT or feedback
signal next to the inductor. Make sure components
6) The ground connection for the analog and power sec-
tion should be close to the IC. This keeps the ground
current loops to a minimum. In cases where only one
ground is used, enough isolation between analog return
signals and high power signals must be maintained.
Typical Application Circuit
V
BAT
C
4.7µF
IN2
C
IN1
C
4.7µF
IN3
R
0I
IN3
C
0.1µF
BST
SUP
SUPSW
L1
2.2µH
BST
EN
V
OUT
5V AT 2.5A
LX
OSC SYNC PULSE
FSYNC
COMP
V
C
OUT
OUT
22µF
D1
V
BIAS
OUT
FB
MAX16936
MAX16938
C
COMP1
R
FOSC
1000pF
C
COMP2
12pF
12kI
V
V
BIAS
OUT
R
COMP
FOSC
BIAS
20kI
R
R
PGOOD
10kI
SYNCOUT
100I
PGOOD
POWER-GOOD OUTPUT
C
BIAS
1µF
SYNCOUT
180° OUT-OF-PHASE OUTPUT
PGND AGND
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36V, 220kHz to 2.2MHz Step-Down Converters
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Ordering Information/Selector Guide
V
OUT
FIXED
(FB
CONNECTED
TO BIAS) (V)
SPREAD
SPECTRUM
ADJUSTABLE
PART
TEMP RANGE
PIN-PACKAGE
(FB CONNECTED TO
RESISTIVE DIVIDER) (V)
MAX16936RAUEA/V+
MAX16936RAUEB/V+
MAX16936SAUEA/V+
MAX16936SAUEB/V+
MAX16936RATEA/V+
MAX16936RATEB/V+
MAX16936SATEA/V+
MAX16936SATEB/V+
MAX16938AUERA/V+**
MAX16938AUERB/V+**
MAX16938AUESA/V+**
MAX16938AUESB/V+**
MAX16938ATERA/V+
MAX16938ATERB/V+
MAX16938ATESA/V+
MAX16938ATESB/V+
1 to 10
1 to 10
1 to 10
1 to 10
1 to 10
1 to 10
1 to 10
1 to 10
1 to 10
1 to 10
1 to 10
1 to 10
1 to 10
1 to 10
1 to 10
1 to 10
5
3.3
5
Off
Off
On
On
Off
Off
On
On
Off
Off
On
On
Off
Off
On
On
-40°C to +125°C 16 TSSOP-EP*
-40°C to +125°C 16 TSSOP-EP*
-40°C to +125°C 16 TSSOP-EP*
-40°C to +125°C 16 TSSOP-EP*
-40°C to +125°C 16 TQFN-EP*
-40°C to +125°C 16 TQFN-EP*
-40°C to +125°C 16 TQFN-EP*
-40°C to +125°C 16 TQFN-EP*
-40°C to +125°C 16 TSSOP-EP*
-40°C to +125°C 16 TSSOP-EP*
-40°C to +125°C 16 TSSOP-EP*
-40°C to +125°C 16 TSSOP-EP*
-40°C to +125°C 16 TQFN-EP*
-40°C to +125°C 16 TQFN-EP*
-40°C to +125°C 16 TQFN-EP*
-40°C to +125°C 16 TQFN-EP*
3.3
5
3.3
5
3.3
5
3.3
5
3.3
5
3.3
5
3.3
/V denotes an automotive qualified part.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
**Future product—contact factory for availability.
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns (foot-
prints), go to www.maximintegrated.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but the
drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
16 TSSOP-EP
16 TQFN-EP
U16E+3
T1655+4
21-0108
21-0140
90-0120
90-0121
Maxim Integrated
│ 16
www.maximintegrated.com
MAX16936/MAX16938
36V, 220kHz to 2.2MHz Step-Down Converters
with 28µA Quiescent Current
Revision History
REVISION REVISION
PAGES
DESCRIPTION
CHANGED
NUMBER
DATE
0
1
3/13
Initial release
—
4/13
Added non-automotive OPNs to Ordering Information/Selector Guide
16
Updated FPWM and Skip Mode output voltages in Electrical Characteristics, Internal
Oscillator (FOSC) and Compensation Network sections, and removed the non-
automotive parts from the Ordering Information/Selector Guide
2
8/13
2, 3, 11, 13, 16
3
4
5
11/13
2/14
3/14
Removed future product references from the Ordering Information/Selector Guide
16
8, 9, 15
16
Changed the BST capacitor value from 0.22µF to 0.1µF in Pin Descriptions and
Typical Application Circuit; updated the Linear Regulator Output (BIAS) section
Added lead-free designation to TQFN package code
Updated SUP pin in Pin Descriptions table, added Maximum Duty-Cycle Operation
section, updated guideline #2 in PCB Layout Guidelines section, and added an RC
filter in the Typical Application Circuit
6
1/15
9, 14, 15
7
8
2/15
3/15
Updated the Benefits and Features section
1
Added new Note 1 to Absolute Maximum Ratings and renumbered the remaining
notes in Package Thermal Characteristics section and Electrical Characteristics
2–4
9
6/15
6/15
Added the MAX16938 to data sheet as a future product
1–17
16
10
Corrected MAX16938 variants in Ordering Information/Selector Guide
Corrected typo in Pin Configurations diagram; corrected exposed pad and future
product designations and corrected typo in Ordering Information/Selector Guide
11
12
13
14
15
16
7/15
3/16
4/16
6/16
1/17
7/17
8,16
1
Updated 3rd sub-bullet under 1st main bullet in Benefits and Features section
(changed Accuracy (5V) to (5V/3.3V)
Added new bullet in Benefits and Features section; removed future product
references
1, 16
1
Changed part number from MAX16939 to MAX16938 in last bullet in Benefits and
Features section
Added 3.3V option for Supply Current and changed maximum Skip-Mode Output
Voltage from 3.34V to 3.4V in Electrical Characteristics table
2, 3
2
Added a new Note 3 in Electrical Characteristics table and renumbered the
remaining four notes accordingly
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2017 Maxim Integrated Products, Inc.
│ 17
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