MAX16936SAUEA+_技术文档

MAX16936

36V, 220kHz to 2.2MHz Step-Down Converter

with 28µA Quiescent Current

General Description

Features

S Wide 3.5V to 36V Input Voltage Range

S 42V Load Dump Protection

The MAX16936 is a 2.5A current-mode step-down con-

verter with integrated high-side and low-side MOSFETs

designed to operate with an external Schottky diode

for better efficiency. The low-side MOSFET enables

fixed-frequency forced-PWM (FPWM) operation under

light-load applications. The device operates with input

voltages from 3.5V to 36V, while using only 28FA qui-

escent current at no load. The switching frequency is

resistor programmable from 220kHz to 2.2MHz and can

be synchronized to an external clock. The MAX16936’s

output voltage is available as 5V/3.3V fixed or adjustable

from 1V to 10V. The wide input voltage range along with its

ability to operate at 98% duty cycle during undervoltage

transients make the MAX16936 ideal for automotive and

industrial applications.

S Enhanced Current-Mode Control Architecture

S Fixed Output Voltage with 2ꢀ Accuracꢁ ꢂ5Vꢃ3.3Vꢄ

or Externallꢁ Resistor Adjustable ꢂ1V to 10Vꢄ

S 220kHz to 2.2MHz Switching Frequencꢁ with Three

Operation Modes

 28µA Ultra-Low Quiescent Current Skip Mode

 Forced Fixed-Frequencꢁ Operation

 External Frequencꢁ Sꢁnchronization

S Spread-Spectrum Frequencꢁ Modulation

S Automatic LX Slew Rate Adjustment for Optimum

Efficiencꢁ Across Operating Frequencꢁ Range

S 180° Out-of-Phase Clock Output at SYNCOUT

Under light-load applications, the FSYNC logic input

allows the MAX16936 to either operate in skip mode for

reduced current consumption or fixed-frequency FPWM

mode to eliminate frequency variation to minimize EMI.

Fixed-frequency FPWM mode is extremely useful for

power supplies designed for RF transceivers where tight

emission control is necessary. Protection features include

cycle-by-cycle current limit and thermal shutdown with

automatic recovery. Additional features include a power-

good monitor to ease power-supply sequencing and a

180N out-of-phase clock output relative to the internal

oscillator at SYNCOUT to create cascaded power sup-

plies with multiple MAX16936s.

S Low-BOM-Count Current-Mode Control

Architecture

S Power-Good Output

S Enable Input Compatible from 3.3V Logic Level

to 42V

S Thermal Shutdown Protection

S -40°C to +125°C Automotive Temperature Range

S AEC-Q100 Qualified

Applications

Point of Load Applications

The MAX16936 operates over the -40NC to +125NC

automotive temperature range and is available in 16-pin

TSSOP-EP and 5mm x 5mm, 16-pin TQFN-EP packages.

Distributed DC Power Systems

Navigation and Radio Head Units

Ordering Information/Selector Guide appears at end of data

sheet.

Typical Application Circuit appears at end of data sheet.

For related parts and recommended products to use with this part, refer to: www.maximintegrated.com/MAX16936.related

For pricing, delivery, and ordering information, please contact Maxim Direct at

1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.

19-6626; Rev 1; 4/13

MAX16936

36V, 220kHz to 2.2MHz Step-Down Converter

with 28µA Quiescent Current

ABSOLUTE MAXIMUM RATINGS

SUP, SUPSW, LX, EN to PGND ............................-0.3V to +42V

Output Short-Circuit Duration....................................Continuous

SUP to SUPSW.....................................................-0.3V to +0.3V

BIAS to AGND.........................................................-0.3V to +6V

SYNCOUT, FOSC, COMP, FSYNC,

Continuous Power Dissipation (T = +70NC)*

A

TSSOP (derate 26.1mw/NC above +70NC).............2088.8mW

TQFN (derate 28.6mw/NC above +70NC)...............2285.7mW

Operating Temperature Range........................ -40NC to +125NC

Junction Temperature .....................................................+150NC

Storage Temperature Range............................ -65NC to +150NC

Lead Temperature (soldering, 10s) ................................+300NC

Soldering Temperature (reflow) ......................................+260NC

PGOOD, FB to AGND ........................-0.3V to (V

+ 0.3V)

BIAS

OUT to PGND........................................................-0.3V to +12V

BST to LX.................................................................-0.3V to +6V

AGND to PGND...................................................-0.3V to + 0.3V

LX Continuous RMS Current ...................................................3A

*As per JEDEC51 standard (multilayer board).

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-

tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute

maximum rating conditions for extended periods may affect device reliability.

PACKAGE THERMAL CHARACTERISTICS ꢂNote 1ꢄ

TSSOP

TQFN

N

Junction-to-Ambient Thermal Resistance (B ) .......38.3NC/W

Junction-to-Ambient Thermal Resistance (B ) ..........35 C/W

JA

Junction-to-Case Thermal Resistance (B ).................3NC/W

Junction-to-Case Thermal Resistance (B )..............2.7NC/W

JC

Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer

board. For detailed information on package thermal considerations, refer to www.maximintegrated.comꢃthermal-tutorial.

ELECTRICAL CHARACTERISTICS

(V

= V

= 14V, V

= 14V, L1 = 2.2FH, C = 4.7FF, C

= 22FF, C

= 1FF, C

= 0.1FF, R = 12kI,

FOSC

SUP

SUPSW

EN

IN

OUT

BIAS

BST

T

= T = -40NC to +125NC, unless otherwise noted. Typical values are at T = +25NC.)

A

J

A

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

36

UNITS

Supply Voltage

VSUP, VSUPSW

3.5

V

Load Dump Event Supply

Voltage

VSUP_LD

tLD < 1s

42

V

Standby mode, no load, VOUT = 5V,

VFSYNC = 0V

Supply Current

ISUP_STANDBY

ISHDN

28

5

40

8

FA

V

Shutdown Supply Current

BIAS Regulator Voltage

BIAS Undervoltage Lockout

VEN = 0V

VSUP = VSUPSW = 6V to 42V,

IBIAS = 0 to 10mA

VBIAS

4.7

5

5.4

3.40

650

VUVBIAS

VBIAS rising

2.95

3.15

450

+175

15

V

BIAS Undervoltage Lockout

Hysteresis

mV

NC

Thermal Shutdown Threshold

Hysteresis

OUTPUT VOLTAGE ꢂOUTꢄ

VFB = VBIAS, 6V < VSUPSW < 36V,

fixed-frequency mode (Note 2)

FPWM Mode Output Voltage

VOUT

4.9

5

5.1

V

Maxim Integrated

2

MAX16936

36V, 220kHz to 2.2MHz Step-Down Converter

with 28µA Quiescent Current

ELECTRICAL CHARACTERISTICS ꢂcontinuedꢄ

(V

= V

= 14V, V

= 14V, L1 = 2.2FH, C = 4.7FF, C

= 22FF, C

= 1FF, C

= 0.1FF, R = 12kI,

FOSC

SUP

SUPSW

EN

IN

OUT

BIAS

BST

T

= T = -40NC to +125NC, unless otherwise noted. Typical values are at T = +25NC.)

A

J

A

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

5

MAX

5.15

UNITS

V

Skip Mode Output Voltage

Load Regulation

VOUT_SKIP

No load, VFB = VBIAS, skip mode (Note 3)

VFB = VBIAS, 300mA < ILOAD < 2.5A

VFB = VBIAS, 6V < VSUPSW < 36V

4.9

0.5

0.02

1.5

%

Line Regulation

%/V

mA

IBST_ON

IBST_OFF

ILX

High-side MOSFET on, VBST - VLX = 5V

1

2

5

BST Input Current

High-side MOSFET off, VBST - VLX = 5V,

FA

TA = +25°C

LX Current Limit

Peak inductor current

RFOSC = 12kW

3

3.75

4

4.5

A

LX Rise Time

ns

Skip Mode Current Threshold

Spread Spectrum

ISKIP_TH

RON_H

TA = +25°C

150

300

400

mA

Spread spectrum enabled

fOSC Q6%

High-Side Switch

On-Resistance

ILX = 1A, VBIAS = 5V

100

220

3

mI

FA

I

High-Side Switch Leakage

Current

High-side MOSFET off, VSUP = 36V,

VLX = 0V, TA = +25NC

1

Low-Side Switch

On-Resistance

RON_L

ILX = 0.2A, VBIAS = 5V

1.5

3

Low-Side Switch

Leakage Current

VLX = 36V, TA = +25NC

1

FA

TRANSCONDUCTANCE AMPLIFIER ꢂCOMPꢄ

FB Input Current

IFB

20

1.0

100

nA

V

FB connected to an external resistor

divider, 6V < VSUPSW < 36V (Note 4)

FB Regulation Voltage

FB Line Regulation

VFB

0.99

1.015

DVLINE

gm

6V < VSUPSW < 36V

VFB = 1V, VBIAS = 5V

(Note 3)

0.02

700

%/V

FS

Transconductance

(from FB to COMP)

Minimum On-Time

tON_MIN

DCMAX

80

98

ns

%

Maximum Duty Cycle

OSCILLATOR FREQUENCY

RFOSC = 73.2kI

RFOSC = 12kI

340

2.0

400

2.2

460

2.4

kHz

Oscillator Frequency

MHz

EXTERNAL CLOCK INPUT ꢂFSYNCꢄ

External Input Clock

Acquisition time

tFSYNC

1

Cycles

External Input Clock

Frequency

RFOSC = 12kI (Note 5)

1.8

1.4

2.6

Hz

V

External Input Clock High

Threshold

VFSYNC_HI

VFSYNC rising

Maxim Integrated

3

MAX16936

36V, 220kHz to 2.2MHz Step-Down Converter

with 28µA Quiescent Current

ELECTRICAL CHARACTERISTICS ꢂcontinuedꢄ

(V

= V

= 14V, V

= 14V, L1 = 2.2FH, C = 4.7FF, C

= 22FF, C

= 1FF, C

= 0.1FF, R = 12kI,

FOSC

SUP

SUPSW

EN

IN

OUT

BIAS

BST

T

= T = -40NC to +125NC, unless otherwise noted. Typical values are at T = +25NC.)

A

J

A

PARAMETER

SYMBOL

VFSYNC_LO

tSS

CONDITIONS

MIN

TYP

MAX

0.4

UNITS

V

External Input Clock Low

Threshold

VFSYNC falling

Soft-Start Time

5.6

2.4

8

12

ms

ENABLE INPUT ꢂENꢄ

Enable Input High Threshold

Enable Input Low Threshold

VEN_HI

VEN_LO

V

0.6

1

Enable Threshold Voltage

Hysteresis

VEN_HYS

IEN

0.2

0.1

V

Enable Input Current

TA = +25NC

FA

POWER GOOD ꢂPGOODꢄ

VTH_RISING

VFB rising, VPGOOD = high

VFB falling, VPGOOD =low

93

90

10

95

92

25

97

94

50

0.4

1

PGOOD Switching Level

%VFB

VTH_FALLING

PGOOD Debounce Time

PGOOD Output Low Voltage

PGOOD Leakage Current

SYNCOUT Low Voltage

Fs

V

ISINK = 5mA

VOUT in regulation, TA = +25NC

ISINK = 5mA

FA

V

0.4

1

SYNCOUT Leakage Current

FSYNC Leakage Current

OVERVOLTAGE PROTECTION

TA = +25NC

FA

TA = +25NC

1

VOUT rising (monitored at FB pin)

VOUT falling (monitored at FB pin)

107

105

Overvoltage Protection

Threshold

%

Note 2: Device not in dropout condition.

Note 3: Guaranteed by design; not production tested.

Note 4: FB regulation voltage is 1%, 1.01V (max), for -40°C < T < +105°C.

A

Note 5: Contact the factory for SYNC frequency outside the specified range.

Maxim Integrated

4

MAX16936

36V, 220kHz to 2.2MHz Step-Down Converter

with 28µA Quiescent Current

Typical Operating Characteristics

(V

= V

= 14V, V = 14V, V

= 5V, V

= 0V, R

= 12kI, T = +25NC, unless otherwise noted.)

SUP

SUPSW

EN

OUT

FYSNC

FOSC A

V

OUT

LOAD REGULATION

EFFICIENCY vs. LOAD CURRENT

5.10

5.08

5.06

5.04

5.02

5.00

4.98

4.96

4.94

4.92

4.90

100

90

80

70

60

50

40

30

20

10

0

100

f

= 2.2MHz, V = 14V

f

= 400kHz, V = 14V

V

OUT

SKIP MODE

= 5V, V = 14V

SW

IN

SW

IN

90

80

70

60

50

40

30

20

10

0

SKIP MODE

5V

SKIP MODE

5V

3.3V

400kHz

2.2MHz

3.3V

PWM MODE

5V

PWM MODE

0

0.5

1.0

I

1.5

(A)

2.0

2.5

0

0.001

0.1

10

0

0.001

0.1

10

2.5

132

LOAD CURRENT (A)

LOAD

V

LOAD REGULATION

F

vs. LOAD CURRENT

F

vs. LOAD CURRENT

SW

OUT

SW

5.10

5.08

5.06

5.04

5.02

5.00

4.98

4.96

4.94

4.92

4.90

2.30

2.28

2.26

2.24

2.22

2.20

2.18

2.16

2.14

2.12

2.10

435

434

433

432

431

430

429

428

427

426

425

V

= 5V, V = 14V

VIN = 14V,

PWM MODE

OUT

IN

PWM MODE

V

= 5V

OUT

V

= 5V

OUT

400kHz

V

= 3.3V

OUT

V

= 3.3V

OUT

2.2MHz

0

0.5

1.0

1.5

2.0

2.5

0

0.5

1.0

1.5

2.0

0

0.5

1.0

1.5

2.0

2.5

I

(A)

I

(A)

I

(A)

LOAD

SWITCHING FREQUENCY vs. R

F

vs. TEMPERATURE

SUPPLY CURRENT vs. SUPPLY VOLTAGE

FOSC

SW

2.50

2.25

2.00

1.75

1.50

1.25

1.00

0.75

0.50

0.25

0

50

45

40

35

30

25

20

15

10

V

= 14V,

IN

2.28

2.24

2.20

2.16

2.12

2.08

2.04

2.00

PWM MODE

V

= 5V

OUT

5V/2.2MHz

SKIP MODE

V

= 3.3V

OUT

12

42

72

(kΩ)

102

-40 -25 -10

5

20 35 50 65 80 95 110 125

TEMPERATURE (°C)

6

16

26

36

R

SUPPLY VOLTAGE (V)

FOSC

Maxim Integrated

5

MAX16936

36V, 220kHz to 2.2MHz Step-Down Converter

with 28µA Quiescent Current

Typical Operating Characteristics (continued)

(V

= V

= 14V, V = 14V, V

= 5V, V

= 0V, R

= 12kI, T = +25NC, unless otherwise noted.)

A

SUP

SUPSW

EN

OUT

FYSNC

FOSC

V

vs. V

V

vs. TEMPERATURE

SHDN CURRENT vs. SUPPLY VOLTAGE

OUT

IN

BIAS

5.08

5.06

5.04

5.02

5.00

4.98

4.96

4.94

4.92

4.90

10

5.02

5V/2.2MHz

PWM MODE

I

= 0A

LOAD

5.01

5.00

4.99

4.98

4.97

4.96

4.95

4.94

4.93

4.92

4.91

4.90

9

8

7

6

5

4

3

2

1

0

I

= 0A

LOAD

5V/2.2MHz

SKIP MODE

V

= 14V,

PWM MODE

IN

6

12

18

24

30

36

42

6

12

18

24

30

36

-40 -25 -10

5

20 35 50 65 80 95 110 125

TEMPERATURE (°C)

V

(V)

SUPPLY VOLTAGE (V)

IN

FULL-LOAD STARTUP BEHAVIOR

SLOW V RAMP BEHAVIOR

IN

MAX16936 toc15

V

OUT

vs. V

IN

MAX16936 toc14

5.05

5.03

5.01

4.99

4.97

4.95

5V/400kHz

PWM MODE

10V/div

0V

I

= 0A

LOAD

V

0V

5V/div

0V

V

IN

V

5V/div

0V

OUT

V

OUT

1A/div

5V/div

0V

0A

V

PGOOD

I

LOAD

5V/div

2A/div

0A

V

PGOOD

0V

I

LOAD

2ms

4s

6

12

18

24

30

36

V

(V)

IN

SLOW V RAMP BEHAVIOR

SYNC FUNCTION

DIPS AND DROPS TEST

MAX16936 toc18

IN

MAX16936 toc16

MAX16936 toc17

10V/div

0V

V

IN

5V/2.2MHz

V

0V

IN

V

5V/div

2V/div

LX

5V/div

0V

V

OUT

0V

10V/div

V

OUT

5V/div

V

LX

V

FSYNC

0V

V

PGOOD

0V

2A/div

5V/div

V

PGOOD

0V

I

LOAD

0A

4s

200ns

10ms

Maxim Integrated

6

MAX16936

36V, 220kHz to 2.2MHz Step-Down Converter

with 28µA Quiescent Current

Typical Operating Characteristics (continued)

(V

= V

= 14V, V = 14V, V

EN

= 5V, V

= 0V, R

= 12kI, T = +25NC, unless otherwise noted.)

SUP

SUPSW

OUT

FYSNC

FOSC

A

COLD CRANK

LOAD DUMP

MAX16936 toc19

MAX16936 toc20

V

IN

10V/div

V

IN

2V/div

0V

V

OUT

2V/div

V

OUT

5V/div

0V

V

PGOOD

2V/div

0V

400ms

100ms

SHORT CIRCUIT IN PWM MODE

LOAD TRANSIENT (PWM MODE)

MAX16936 toc22

MAX16936 toc21

F

= 2.2MHz

SW

V

OUT

= 5V

2V/div

0V

V

OUT

V

OUT

200mV/div

(AC-COUPLED)

2A/div

0A

INDUCTOR

CURRENT

2A/div

0A

LOAD

CURRENT

5V/div

0V

PGOOD

10ms

100µs

Maxim Integrated

7

MAX16936

36V, 220kHz to 2.2MHz Step-Down Converter

with 28µA Quiescent Current

Pin Configurations

TOP VIEW

12

11

10

9

16 15 14 13 12 11 10

9

BST

8

7

6

5

LX 13

PGND 14

AGND

BIAS

MAX16936

MAXX16936

PGOOD

15

16

EP

COMP

SYNCOUT

EP

4

+

1

2

3

4

5

6

7

8

1

2

3

TQFN

TSSOP

Pin Descriptions

NAME

FUNCTION

Open-Drain Clock Output. SYNCOUT outputs 180Nout-of-phase signal relative to the

TSSOP

TQFN

1

16

SYNCOUT internal oscillator. Connect to OUT with a resistor between 100I and 1kW for 2MHz

operation. For low frequency operation, use a resistor between 1kW and 10kW.

Synchronization Input. The device synchronizes to an external signal applied to FSYNC.

2

1

FSYNC

Connect FSYNC to AGND to enable skip mode operation. Connect to BIAS or to an

external clock to enable fixed-frequency forced PWM mode operation.

Resistor-Programmable Switching Frequency Setting Control Input. Connect a resistor

from FOSC to AGND to set the switching frequency.

3

4

5

6

2

3

4

5

FOSC

OUT

FB

Switching Regulator Output. OUT also provides power to the internal circuitry when the

output voltage of the converter is set between 3V to 5V during standby mode.

Feedback Input. Connect an external resistive divider from OUT to FB and AGND to set

the output voltage. Connect to BIAS to set the output voltage to 5V.

Error Amplifier Output. Connect an RC network from COMP to AGND for stable

operation. See the Compensation Network section for more information.

COMP

Linear Regulator Output. BIAS powers up the internal circuitry. Bypass with a 1FF

capacitor to ground.

7

8

9

6

7

8

BIAS

AGND

BST

Analog Ground

High-Side Driver Supply. Connect a 0.22FF capacitor between LX and BST for

proper operation.

Maxim Integrated

8

MAX16936

36V, 220kHz to 2.2MHz Step-Down Converter

with 28µA Quiescent Current

Pin Descriptions (continued)

NAME

EN

FUNCTION

TSSOP

TQFN

SUP Voltage Compatible Enable Input. Drive EN low to disable the device. Drive EN high

to enable the device.

10

9

Voltage Supply Input. SUP powers up the internal linear regulator. Bypass SUP to PGND

with a 4.7FF ceramic capacitor.

11

12

10

11

SUP

Internal High-Side Switch Supply Input. SUPSW provides power to the internal switch.

Bypass SUPSW to PGND with 0.1FF and 4.7FF ceramic capacitors.

SUPSW

13, 14

15

12, 13

14

LX

Inductor Switching Node. Connect a Schottky diode between LX and AGND.

Power Ground

PGND

Open-Drain, Active-Low Reset Output. PGOOD asserts when V

is above 95%

OUT

16

15

PGOOD

regulation point. PGOOD goes low when V

is below 92% regulation point.

OUT

Exposed Pad. Connect EP to a large-area contiguous copper ground plane for effective

power dissipation. Do not use as the only IC ground connection. EP must be connected

to PGND.

—

EP

tures include a power-good monitor to ease power-supply

Detailed Description

sequencinganda180Nout-of-phaseclockoutputrelativetothe

internal oscillator at SYNCOUT to create cascaded power

supplies with multiple devices.

The MAX16936 is a 2.5A current-mode step-down

converter with integrated high-side and low-side MOSFETs

designed to operate with an external Schottky diode for

better efficiency. The low-side MOSFET enables fixed-

frequency forced-PWM (FPWM) operation under light-load

applications. The device operates with input voltages from

3.5V to 36V, while using only 28FA quiescent current at no

load. The switching frequency is resistor programmable

from 220kHz to 2.2MHz and can be synchronized to an

external clock. The output voltage is available as 5V/3.3V

fixed or adjustable from 1V to 10V. The wide input voltage

range along with its ability to operate at 98% duty cycle

during undervoltage transients make the device ideal for

automotive and industrial applications.

Wide Input Voltage Range

The device includes two separate supply inputs (SUP and

SUPSW) specified for a wide 3.5V to 36V input voltage

range. V

provides power to the device and V

SUP

SUPSW

provides power to the internal switch. When the device

is operating with a 3.5V input supply, conditions such as

cold crank can cause the voltage at SUP and SUPSW to

drop below the programmed output voltage. Under such

conditions, the device operates in a high duty-cycle mode

to facilitate minimum dropout from input to output.

Linear Regulator Output (BIAS)

The device includes a 5V linear regulator (BIAS) that pro-

vides power to the internal circuit blocks. Connect a 1FF

ceramic capacitor from BIAS to AGND.

Under light-load applications, the FSYNC logic input

allows the device to either operate in skip mode for

reduced current consumption or fixed-frequency FPWM

mode to eliminate frequency variation to minimize EMI.

Fixed frequency FPWM mode is extremely useful for

power supplies designed for RF transceivers where tight

emission control is necessary. Protection features include

cycle-by-cycle current limit, overvoltage protection, and

thermal shutdown with automatic recovery. Additional fea-

Power-Good Output (PGOOD)

The device features an open-drain power-good output,

PGOOD. PGOOD asserts when V

of its regulation voltage. PGOOD deasserts when V

drops below 92% of its regulation voltage. Connect

rises above 95%

OUT

PGOOD to BIAS with a 10kI resistor.

Maxim Integrated

9

MAX16936

36V, 220kHz to 2.2MHz Step-Down Converter

with 28µA Quiescent Current

OUT

COMP

PGOOD

EN

SUP

BIAS

FB

FBSW

FBOK

AON

HVLDO

SWITCH

OVER

BST

SUPSW

EAMP

PWM

LOGIC

HSD

REF

LX

CS

SOFT

START

BIAS

LSD

MAX16936

PGND

SLOPE

COMP

OSC

SYNCOUT

FSYNC FOSC

AGND

Figure 1. Internal Block Diagram

Synchronization Input (FSYNC)

FSYNC is a logic-level input useful for operating mode

selection and frequency control. Connecting FSYNC to

BIAS or to an external clock enables fixed-frequency

FPWM operation. Connecting FSYNC to AGND enables

skip mode operation.

System Enable (EN)

An enable control input (EN) activates the device from its

low-power shutdown mode. EN is compatible with inputs

from automotive battery level down to 3.5V. The high

voltage compatibility allows EN to be connected to SUP,

KEY/KL30, or the inhibit pin (INH) of a CAN transceiver.

The external clock frequency at FSYNC can be higher

or lower than the internal clock by 20%. Ensure the duty

cycle of the external clock used has a minimum pulse

width of 100ns. The device synchronizes to the external

clock within one cycle. When the external clock signal

at FSYNC is absent for more than two clock cycles, the

device reverts back to the internal clock.

EN turns on the internal regulator. Once V

is above

BIAS

the internal lockout threshold, V

= 3.15V (typ), the

UVL

controller activates and the output voltage ramps up

within 8ms.

A logic-low at EN shuts down the device. During shut-

down, the internal linear regulator and gate drivers turn

off. Shutdown is the lowest power state and reduces the

quiescent current to 5FA (typ). Drive EN high to bring the

device out of shutdown.

Maxim Integrated

10

MAX16936

36V, 220kHz to 2.2MHz Step-Down Converter

with 28µA Quiescent Current

down the internal bias regulator and the step-down con-

troller, allowing the device to cool. The thermal sensor

turns on the device again after the junction temperature

cools by 15NC.

Spread-Spectrum Option

The MAX16936 has an internal spread-spectrum option

to optimize EMI performance. This is factory set and

the S-version of the IC should be ordered. For spread-

spectrum-enabled ICs, the operating frequency is varied

6% centered on FOSC. The modulation signal is a trian-

gular wave with a period of 110µs at 2.2MHz. Therefore,

FOSC will ramp down 6% and back to 2.2MHz in 110µs

and also ramp up 6% and back to 2.2MHz in 110µs. The

cycle repeats.

Applications Information

Setting the Output Voltage

Connect FB to BIAS for a fixed +5V/+3.3 output voltage.

To set the output to other voltages between 1V and 10V,

connect a resistive divider from output (OUT) to FB to

AGND (Figure 2). Use the following formula to determine

For operations at FOSC values other than 2.2MHz, the

modulation signal scales proportionally, e.g., at 400kHz,

the 110µs modulation period increases to 110µs x

2.2MHz/400MHz = 550µs.

the R

of the resistive divider network:

FB2

R

= R x V /V

TOTAL FB OUT

FB2

where V = 1V, R

= selected total resistance of

is the desired output in volts.

The internal spread spectrum is disabled if the IC is

synced to an external clock. However, the IC does not fil-

ter the input clock and passes any modulation (including

spread-spectrum) present on the driving external clock

to the SYNCOUT pin.

FB

TOTAL

R

, R

in ω, and V

FB1 FB2 OUT

Calculate R

equation:

(OUT to FB resistor) with the following

FB1











V

OUT

R

= R

−1

Automatic Slew-Rate Control on LX

The MAX16936 has automatic slew-rate adjustment

that optimizes the rise times on the internal HSFET gate

drive to minimize EMI. The IC detects the internal clock

frequency and adjusts the slew rate accordingly. When

the user selects the external frequency setting resistor

RFOSC such that the frequency is > 1.1MHz, the HSFET

is turned on in 4ns (typ). When the frequency is < 1.1MHz

the HSFET is turned on in 8ns (typ). This slew-rate control

optimizes the rise time on LX node externally to minimize

EMI while maintaining good efficiency.





FB2



FB1

V









FB 



where V = 1V (see the Electrical Characteristics table).

FB

FPWM/Skip Modes

The MAX16936 offers a pin selectable skip mode or

fixed-frequency PWM mode option. The IC has an

internal LS MOSFET that turns on when the FSYNC pin

is connected to VBIAS or if there is a clock present on

the FSYNC pin. This enables the fixed-frequency-forced

PWM mode operation over the entire load range. This

option allows the user to maintain fixed frequency over

the entire load range in applications that require tight

control on EMI. Even though the MAX16936 has an inter-

nal LS MOSFET for fixed-frequency operation, an exter-

nal Schottky diode is still required to support the entire

load range. If the FSYNC pin is connected to GND, the

skip mode is enabled on the MAX16936.

Internal Oscillator (FOSC)

The switching frequency, f , is set by a resistor (R

)

SW

FOSC

connected from FOSC to AGND. See Figure 3 to select the

correct R value for the desired switching frequency.

FOSC

For example, a 400kHz switching frequency is set with

= 732kI. Higher frequencies allow designs with

R

FOSC

lower inductor values and less output capacitance.

Consequently, peak currents and I²R losses are lower

at higher switching frequencies, but core losses, gate

charge currents, and switching losses increase.

V

OUT

R

FB1

FB2

MAX16936

Synchronizing Output (SYNCOUT)

SYNCOUT is an open-drain output that outputs a 180N

out-of-phase signal relative to the internal oscillator.

FB

Overtemperature Protection

Thermal-overload protection limits the total power dis-

sipation in the device. When the junction temperature

exceeds 175NC (typ), an internal thermal sensor shuts

Figure 2. Adjustable Output Voltage Setting

Maxim Integrated

11

MAX16936

36V, 220kHz to 2.2MHz Step-Down Converter

with 28µA Quiescent Current

In skip mode of operation, the converter’s switching fre-

quency is load dependent. At higher load current, the

switching frequency does not change and the operating

mode is similar to the FPWM mode. Skip mode helps

improve efficiency in light-load applications by allowing

the converters to turn on the high-side switch only when

the output voltage falls below a set threshold. As such,

the converters do not switch MOSFETs on and off as

often as is the case in the FPWM mode. Consequently,

the gate charge and switching losses are much lower in

skip mode.

Input Capacitor

The input filter capacitor reduces peak currents drawn

from the power source and reduces noise and voltage

ripple on the input caused by the circuit’s switching.

The input capacitor RMS current requirement (I

defined by the following equation:

) is

RMS

V

(V

− V

)

OUT SUP

OUT

I

= I

RMS LOAD(MAX)

V

SUP

I

has a maximum value when the input voltage

RMS

equals twice the output voltage (V

I

= 2V ), so

OUT

SUP

Inductor Selection

Three key inductor parameters must be specified for

operation with the device: inductance value (L), inductor

= I

/2.

RMS(MAX)

LOAD(MAX)

Choose an input capacitor that exhibits less than +10NC

self-heating temperature rise at the RMS input current for

optimal long-term reliability.

saturation current (I ), and DC resistance (R ). To

SAT DCR

select inductance value, the ratio of inductor peak-to-

peak AC current to DC average current (LIR) must be

selected first. A good compromise between size and loss

is a 30% peak-to-peak ripple current to average current

ratio (LIR = 0.3). The switching frequency, input voltage,

output voltage, and selected LIR then determine the

inductor value as follows:

The input voltage ripple is composed of DV (caused

Q

by the capacitor discharge) and DV

(caused by the

ESR

ESR of the capacitor). Use low-ESR ceramic capacitors

with high ripple current capability at the input. Assume

the contribution from the ESR and capacitor discharge

equal to 50%. Calculate the input capacitance and ESR

required for a specified input voltage ripple using the fol-

lowing equations:

V

(V

− V

)

OUT SUP

OUT

LIR

L =

V

f

I

SUP SW OUT

∆V

ESR

=

where V

, V

SUP OUT

, and I

are typical values (so that

IN

OUT

∆I

L

2

efficiency is optimum for typical conditions). The switching

frequency is set by R (see Figure 3).

I

+

OUT

FOSC

where:

and:

(V

− V

)× V

SUP

V

OUT OUT

× f

∆I

=

L

SWITCHING FREQUENCY vs. R

FOSC

×L

SUP

SW

2.50

2.25

2.00

1.75

1.50

1.25

1.00

0.75

0.50

0.25

0

I

×D(1− D)

V

OUT

V

SUPSW

OUT

C

=

and D =

IN

∆V × f

Q

SW

where I

duty cycle.

is the maximum output current and D is the

OUT

Output Capacitor

The output filter capacitor must have low enough ESR

to meet output ripple and load transient requirements.

The output capacitance must be high enough to absorb

the inductor energy while transitioning from full-load

to no-load conditions without tripping the overvoltage

fault protection. When using high-capacitance, low-ESR

capacitors, the filter capacitor’s ESR dominates the output

12

42

72

(kΩ)

102

132

R

FOSC

Figure 3. Switching Frequency vs. R

FOSC

Maxim Integrated

12

MAX16936

36V, 220kHz to 2.2MHz Step-Down Converter

with 28µA Quiescent Current

voltage ripple. So the size of the output capacitor depends

V

OUT

on the maximum ESR required to meet the output voltage

ripple (V ) specifications:

RIPPLE(P-P)

R1

V

= ESR×I

×LIR

LOAD(MAX)

RIPPLE(P−P)

COMP

g

m

The actual capacitance value required relates to the

physical size needed to achieve low ESR, as well as

to the chemistry of the capacitor technology. Thus, the

capacitor is usually selected by ESR and voltage rating

rather than by capacitance value.

R2

V

REF

R

C

F

C

When using low-capacity filter capacitors, such as ceramic

capacitors, size is usually determined by the capacity

needed to prevent voltage droop and voltage rise from

causing problems during load transients. Generally,

once enough capacitance is added to meet the over-

shoot requirement, undershoot at the rising load edge

is no longer a problem. However, low capacity filter

capacitors typically have high ESR zeros that can affect

the overall stability.

Figure 4. Compensation Network

and requiring less elaborate error-amplifier compensation

than voltage-mode control. Only a simple single-series

resistor (R ) and capacitor (C ) are required to have a

C

stable, high-bandwidth loop in applications where ceramic

capacitors are used for output filtering (Figure 4). For other

types of capacitors, due to the higher capacitance and

ESR, the frequency of the zero created by the capacitance

and ESR is lower than the desired closed-loop crossover

frequency. To stabilize a nonceramic output capacitor

Rectifier Selection

The device requires an external Schottky diode rectifier

as a freewheeling diode when the device is configured

for skip mode operation. Connect this rectifier close to the

device using short leads and short PCB traces. In FPWM

mode, the Schottky diode helps minimize efficiency loss-

es by diverting the inductor current that would otherwise

flow through the low-side MOSFET. Choose a rectifier

with a voltage rating greater than the maximum expected

loop, add another compensation capacitor (C ) from

COMP to GND to cancel this ESR zero.

F

The basic regulator loop is modeled as a power modulator,

output feedback divider, and an error amplifier. The power

modulator has a DC gain set by g OR

, with a pole and

m

LOAD

zero pair set by R , the output capacitor (C

LOAD

), and its

OUT

input voltage, V

. Use a low forward-voltage-drop

SUPSW

ESR. The following equations allow to approximate the value

for the gain of the power modulator (GAIN ), neglect-

Schottky rectifier to limit the negative voltage at LX. Avoid

higher than necessary reverse-voltage Schottky rectifiers

that have higher forward-voltage drops.

MOD(dc)

ing the effect of the ramp stabilization. Ramp stabilization is

necessary when the duty cycle is above 50% and is

internally done for the device.

Compensation Network

The device uses an internal transconductance error ampli-

fier with its inverting input and its output available to the

user for external frequency compensation. The output

capacitor and compensation network determine the loop

stability. The inductor and the output capacitor are chosen

based on performance, size, and cost. Additionally, the

compensation network optimizes the control-loop stability.

GAIN

= g ×R

m LOAD

MOD(dc)

where R

= V

/I

in I and g = 35FS.

LOAD

OUT LOUT(MAX) m

In a current-mode step-down converter, the output

capacitor, its ESR, and the load resistance introduce a

pole at the following frequency:

1

2

The controller uses a current-mode control scheme that

regulates the output voltage by forcing the required cur-

rent through the external inductor. The device uses the

voltage drop across the high-side MOSFET to sense

inductor current. Current-mode control eliminates the

double pole in the feedback loop caused by the inductor

and output capacitor, resulting in a smaller phase shift

f

=

π × C

×R

OUT LOAD

pMOD

The output capacitor and its ESR also introduce a zero at:

1

f

=

zMOD

2π ×ESR× C

OUT

Maxim Integrated

13

MAX16936

36V, 220kHz to 2.2MHz Step-Down Converter

with 28µA Quiescent Current

When C

parallel, the resulting C

is composed of “n” identical capacitors in

Solving for R :

OUT

C

= n O C , and ESR

OUT(EACH)

OUT

V

OUT

= ESR

/n. Note that the capacitor zero for a paral-

R

C

=

(EACH)

g

× V ×GAIN

FB MOD(fC)

lel combination of alike capacitors is the same as for an

individual capacitor.

m,EA

Set the error-amplifier compensation zero formed by R

C

a

The feedback voltage-divider has a gain of GAIN = V

/

FB

and C (f

follows:

) at the f

. Calculate the value of C

C

FB

zEA

pMOD

C

V

, where V is 1V (typ). The transconductance error

OUT

FB

amplifier has a DC gain of GAIN

where g

which is 700FS (typ), and R

tance of the error amplifier 50MI.

= g

OR

,

OUT,EA

,

EA(dc)

m EA

1

is the error amplifier transconductance,

C

=

m,EA

C

2π × f

×R

C

pMOD

is the output resis-

OUT,EA

If f

is less than 5 x f , add a second capacitor,

C

C , from COMP to GND and set the compensation pole

zMOD

A dominant pole (f ) is set by the compensation

F

dpEA

formed by R and C (f

) at the f

pEA

. Calculate the

capacitor (C ) and the amplifier output resistance

C

F

zMOD

C

value of C as follows:

(R

OUT,EA

). A zero (f

C

) is set by the compensation

F

zEA

resistor (R ) and the compensation capacitor (C ).

There is an optional pole (f

cancel the output capacitor ESR zero if it occurs near

C

1

) set by C and R to

pEA

C

=

F

C

F

2π × f

×R

zMOD

C

the cross over frequency (f , where the loop gain equals

1 (0dB)). Thus:

C

As the load current decreases, the modulator pole

also decreases; however, the modulator gain increases

accordingly and the crossover frequency remains the

same.

1

f

=

dpEA

2π × C ×(R

+ R )

C

OUT,EA

PCB Layout Guidelines

Careful PCB layout is critical to achieve low switching

losses and clean, stable operation. Use a multilayer board

whenever possible for better noise immunity and power

dissipation. Follow these guidelines for good PCB layout:

1

f

=

zEA

2π × C ×R

C

1

f

pEA

2π × C ×R

F

1) Use a large contiguous copper plane under the IC

package. Ensure that all heat-dissipating components

have adequate cooling. The bottom pad of the IC

must be soldered down to this copper plane for effec-

tive heat dissipation and for getting the full power out

of the IC. Use multiple vias or a single large via in this

plane for heat dissipation.

The loop-gain crossover frequency (f ) should be set

C

below 1/5th of the switching frequency and much higher

than the power-modulator pole (f

):

pMOD

f

SW

5

f

<< f ≤

C

pMOD

The total loop gain as the product of the modulator gain,

the feedback voltage-divider gain, and the error amplifier

2) Isolate the power components and high current path

from the sensitive analog circuitry. Doing so is essential

to prevent any noise coupling into the analog signals.

gain at f should be equal to 1. So:

C

V

FB

3) Keep the high-current paths short, especially at the

ground terminals. This practice is essential for stable,

jitter-free operation. The high-current path composed

of the input capacitor, high-side FET, inductor, and

the output capacitor should be as short as possible.

GAIN

×

×GAIN

= 1

EA(fC)

MOD(fC)

V

OUT

GAIN

= g

×R

m, EA

EA(fC)

C

f

pMOD

GAIN

= GAIN

×

MOD(fC)

MOD(dc)

4) Keep the power traces and load connections short. This

practice is essential for high efficiency. Use thick cop-

per PCBs (2oz vs. 1oz) to enhance full-load efficiency.

f

C

Therefore:

GAIN

V

FB

5) The analog signal lines should be routed away from

the high-frequency planes. Doing so ensures integrity

of sensitive signals feeding back into the IC.

×

×g

×R = 1

m,EA C

MOD(fC)

V

OUT

Maxim Integrated

14

MAX16936

36V, 220kHz to 2.2MHz Step-Down Converter

with 28µA Quiescent Current

6) The ground connection for the analog and power sec-

tion should be close to the IC. This keeps the ground

current loops to a minimum. In cases where only one

ground is used, enough isolation between analog return

signals and high power signals must be maintained.

Typical Application Circuit

V

BAT

C

IN1

C

IN2

C

BST

SUP

SUPSW

BST

0.22µF

L1

2.2µH

V

OUT

EN

5V AT 2.5A

LX

OSC SYNC PULSE

FSYNC

COMP

V

C

22µF

OUT

D1

V

BIAS

MAX16936

OUT

FB

C

COMP1

R

FOSC

1000pF

C

COMP2

12pF

12kI

V

BIAS

OUT

R

COMP

FOSC

BIAS

20kI

R

PGOOD

10kI

SYNCOUT

100I

PGOOD

POWER-GOOD OUTPUT

C

BIAS

1µF

SYNCOUT

180° OUT-OF-PHASE OUTPUT

PGND AGND

Maxim Integrated

15

MAX16936

36V, 220kHz to 2.2MHz Step-Down Converter

with 28µA Quiescent Current

Ordering Information/Selector Guide

V

OUT

SPREAD

SPECTRUM

ADJUSTABLE

FIXED

(FB CONNECTED

TO BIAS) (V)

PART

TEMP RANGE

PIN-PACKAGE

(FB CONNECTED TO

RESISTIVE DIVIDER) (V)

MAX16936RAUEA+*

MAX16936RAUEA/V+*

MAX16936RAUEB+*

MAX16936RAUEB/V+*

MAX16936SAUEA+*

MAX16936SAUEA/V+*

MAX16936SAUEB+*

MAX16936SAUEB/V+*

MAX16936RATEA+

MAX16936RATEA/V+

MAX16936RATEB+*

MAX16936RATEB/V+*

MAX16936SATEA+*

MAX16936SATEA/V+*

MAX16936SATEB+*

MAX16936SATEB/V+*

1 to 10

5

Off

On

Off

On

-40°C to +125°C 16 TSSOP-EP**

-40°C to +125°C 16 TQFN-EP**

3.3

5

3.3

5

3.3

5

3.3

/V denotes an automotive qualified part.

+Denotes a lead(Pb)-free/RoHS-compliant package.

*Future product—contact factory for availability.

**EP = Exposed pad.

Chip Information

Package Information

For the latest package outline information and land patterns (foot-

prints), go to www.maximintegrated.com/packages. Note that a

“+”, “#”, or “-” in the package code indicates RoHS status only.

Package drawings may show a different suffix character, but the

drawing pertains to the package regardless of RoHS status.

PROCESS: BiCMOS

PACKAGE

TYPE

PACKAGE

CODE

OUTLINE

NO.

LAND

PATTERN NO.

16 TSSOP-EP

16 TQFN-EP

U16E+3

T1655-4

21-0108

21-0140

90-0120

90-0121

Maxim Integrated

16

MAX16936

36V, 220kHz to 2.2MHz Step-Down Converter

with 28µA Quiescent Current

Revision History

REVISION REVISION

PAGES

CHANGED

DESCRIPTION

NUMBER

DATE

0

1

3/13

Initial release

Added non-automotive OPNs to Ordering Information

—

4/13

16

Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent

licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and

max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.

Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000

17

©

2013 Maxim Integrated Products, Inc.

Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.


型号：	MAX16936SAUEA+
厂家：	MAXIM INTEGRATED PRODUCTS
描述：	Switching Regulator, Current-mode, 2.5A, 2400kHz Switching Freq-Max, BICMOS, PDSO16 转换器
文件：	总17页 (文件大小：2461K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MAX16936SAUEA+ [MAXIM]

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