MAX17010ETL+ [MAXIM]
Internal-Switch Boost Regulator with Integrated High-Voltage Level Shifter and Op Amp; 内置开关的boost调节器，集成高压电平转换器和运算放大器
| 型号： | MAX17010ETL+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Internal-Switch Boost Regulator with Integrated High-Voltage Level Shifter and Op Amp |
| 文件： | 总17页 (文件大小：284K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-0709; Rev 0; 3ꢂ07
Internal-Switch Boost Regulator with Integrated
High-Voltage Level Shifter and Op Amp
MAX710
General Description
Features
o 1.8 V to 5.5V IN Supply Voltage Range
The MAX17010 contains a high-performance step-up
switching regulator, a high-speed operational amplifier
(op amp), and a high-voltage level-shifting scan driver.
The device is optimized for thin-film transistor (TFT) liquid-
crystal display (LCD) applications.
o 3mA SUP Quiescent Current (Switching)
o 1.2MHz Current-Mode Step-Up Regulator
Fast Transient Response
High-Accuracy Output Voltage (1.0%)
Built-In 20V, 1.9A, 200mΩ MOSFET
High Efficiency (> 85%)
The step-up DC-DC converter provides the regulated
supply voltage for the panel-source driver ICs. The con-
verter is a 1.2MHz current-mode regulator with an inte-
grated 20V n-channel power MOSFET. The high
switching frequency allows the use of ultra-small induc-
tors and ceramic capacitors. The current-mode control
architecture provides fast transient response to pulsed
loads. The step-up regulator features undervoltage
lockout (UVLO), soft-start, and internal current limit. The
high-current op amp is designed to drive the LCD
backplane (VCOM). The amplifier features high output
current ( 1ꢀ0mA), fast slew rate (ꢁꢀVꢂ/s), wide band-
width (20MHz), and rail-to-rail inputs and outputs.
Digital Soft-Start
o High-Speed Op Amp
150mA Output Current
45V/µs Slew Rate
20MHz, -3dB Bandwidth
o High-Voltage Level-Shifting Scan Drivers
Logic-Level Inputs
+30V to -10V Output Rails
o Thermal-Overload Protection
o 40-Pin, 5mm x 5mm, Thin QFN Package
The high-voltage, level-shifting scan driver is designed
to work with panels that incorporate row drivers on the
panel glass. Its eight outputs swing from +30V (max) to
-10V and can swiftly drive capacitive loads.
Minimal Operating Circuit
V
V
IN
MAIN
The MAX17010 is available in a ꢁ0-pin thin QFN pack-
age with a maximum thickness of 0.8mm for ultra-thin
LCD panels. The device operates over the -ꢁ0°C to
+8ꢀ°C temperature range.
LX
SHDN
IN
FB
.
Applications
Notebook Computer Displays
LCD Monitor Panels
PGND
SUP
COMP
Ordering Information
AGND
VL
POS
PART
TEMP RANGE
PIN-PACKAGE
ꢁ0 Thin QFN-EP*
(ꢀmm x ꢀmm)
MAX17010ETL+
-ꢁ0°C to +8ꢀ°C
MAX17010
NEG
+Denotes a lead-free package.
*EP = Exposed paddle.
TO VCOM
BACKPLANE
GON1
GON2
VCOM
BGND
A1
A2
A3
A4
A5
A6
A7
A8
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
EP
Pin Configuration appears at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Internal-Switch Boost Regulator with Integrated
High-Voltage Level Shifter and Op Amp
ABSOLUTE MAXIMUM RATINGS
IN, SHDN to GND..................................................-0.3V to +7.ꢀV
VL to AGND...........................................................-0.3V to +6.0V
COMP, FB to GND ........................................-0.3V to (VL + 0.3V)
Y1–Y6 to AGND.......................(V
Y7, Y8 to AGND.......................(V
LX, PGND RMS Current Rating.............................................2.ꢁA
- 0.3V) to (V
- 0.3V) to (V
+ 0.3V)
+ 0.3V)
GOFF
GOFF
GON1
GON2
Continuous Power Dissipation (T = +70°C) NiPd Lead Frame
VCOM, NEG, POS to BGND .....................-0.3V to (V
+ 0.3V)
A
SUP
with Nonconductive Epoxy
LX to GND ..............................................................-0.3V to +20V
SUP to GND............................................................-0.3V to +20V
A_ to AGND............................................................-0.3V to +20V
A_ Input Current..................................................................20mA
PGND, BGND to AGND.........................................-0.3V to +0.3V
GON1, GON2 to AGND..........................................-0.3V to +32V
GOFF to AGND......................................................-12V to + 0.3V
ꢁ0-Pin, ꢀmm x ꢀmm, Thin QFN (derate 3ꢀ.7mWꢂ°C above
+70°C)........................................................................28ꢀ7mW
Operating Temperature Range ...........................-ꢁ0°C to +8ꢀ°C
Junction Temperature......................................................+1ꢀ0°C
Storage Temperature Range.............................-6ꢀ°C to +1ꢀ0°C
Lead Temperature (soldering, 10s) .................................+300°C
MAX710
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V = V
= +3V, Circuit of Figure 1, SUP = 8.ꢀV, V
= V
= 30V, V
= -10V, V
= V
= ꢁV, T = 0°C to +85°C.
A
NEG
GON1
GON2
GOFF
IN
SHDN
POS
Typical values are at T = +2ꢀ°C, unless otherwise noted.)
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
ꢀ.ꢀ
UNITS
V
IN Input-Voltage Range
1.8
IN Quiescent Current
IN Undervoltage Lockout
Thermal Shutdown
V
= 3V, V = 1.ꢀV, not switching
0.0ꢀ
1.30
160
0.10
mA
IN
FB
IN rising; typical hysteresis 100mV; LX remains off below
this level
Rising edge, 1ꢀoC hysteresis
1.7ꢀ
V
oC
BOOTSTRAP LINEAR REGULATOR (VL)
VL Output Voltage
3.8
2.ꢁ
10
ꢁ.0
2.7
ꢁ.2
3.0
V
V
VL Undervoltage Lockout
VL Maximum Output Current
MAIN DC-DC CONVERTER
VL rising, 200mV hysteresis (typ)
V
= 1V
mA
FB
V
V
= 1.ꢀV, no load
= 1.1V, no load
1.ꢀ
3.ꢀ
2.ꢀ
ꢁ.ꢀ
FB
FB
SUP Supply Current
mA
Operating Frequency
Oscillator Maximum Duty Cycle
FB Regulation Voltage
FB Load Regulation
990
88
1170
92
13ꢀ0
96
kHz
%
FB = COMP
0 < I < 200mA, transient only
1.222
1.23ꢀ
-1
1.2ꢁ8
V
%
MAIN
FB Line Regulation
V
V
= 1.8V to ꢀ.ꢀV
= 1.3V
0
%ꢂV
nA
/S
VꢂV
V
IN
FB Input Bias Current
FB Transconductance
FB Voltage Gain
ꢀ0
7ꢀ
12ꢀ
160
2ꢁ00
1.00
100
200
0.01
1.9
200
280
FB
ΔI = ꢀ/A at COMP
FB to COMP
FB Fault-Timer Trip Threshold
FB Undervoltage Switching Inhibit
LX On-Resistance
Falling edge
0.96
ꢀ0
1.0ꢁ
1ꢀ0
330
20
mV
mΩ
/A
A
I
= 200mA
LX
LX Leakage Current
V
= 13V
LX
LX Current Limit
6ꢀ% duty cycle
1.6
2.2
Current-Sense Transresistance
Soft-Start Period
0.2ꢀ
0.ꢁ2
3
0.ꢀꢀ
VꢂA
ms
2
_______________________________________________________________________________________
Internal-Switch Boost Regulator with Integrated
High-Voltage Level Shifter and Op Amp
MAX710
ELECTRICAL CHARACTERISTICS (continued)
(V = V
= +3V, Circuit of Figure 1, SUP = 8.ꢀV, V
= V
= 30V, V
= -10V, V
= V
= ꢁV, T = 0°C to +85°C.
A
NEG
GON1
GON2
GOFF
IN
SHDN
POS
Typical values are at T = +2ꢀ°C, unless otherwise noted.)
A
PARAMETER
CONTROL INPUTS
CONDITIONS
MIN
TYP
MAX
UNITS
SHDN Input-Low Voltage
0.6
V
V
1.8V ≤ V ≤ 3.0V
1.8
2.0
-1
IN
SHDN Input-High Voltage
3.0V ≤ V ≤ ꢀ.ꢀV
IN
Maximum SHDN Input Current
OP AMP
+1
/A
SUP Supply Range
ꢀ
18
19.9
1.ꢁ
V
V
SUP Overvoltage Threshold
SUP Undervoltage Threshold
Input Offset Voltage
Input Bias Current
(Note 1)
(Note 2)
18.1
19.0
V
V
V
, V
= V
= V
ꢂ 2
12
mV
nA
NEG POS
SUP
SUP
, V
ꢂ 2
-ꢀ0
0
+ꢀ0
NEG POS
Input Common-Mode Voltage
Range
V
V
SUP
V
- 100
V
SUP
SUP
- ꢀ0
VCOM Output-Voltage Swing High
I
I
= ꢀmA
mV
VCOM
VCOM
VCOM Output-Voltage Swing Low
VCOM Output Current High
VCOM Output Current Low
Slew Rate
= -ꢀmA
ꢀ0
+7ꢀ
-7ꢀ
ꢁ0
100
mV
mA
V
V
= V
- 1V
SUP
VCOM
VCOM
= 1V
mA
Vꢂ/s
MHz
-3dB Bandwidth
20
Short to V
Short to V
ꢂ 2, sourcing
ꢂ 2, sinking
ꢀ0
ꢀ0
1ꢀ0
1ꢀ0
SUP
SUP
VCOM Short-Circuit Current
mA
HIGH-VOLTAGE SCAN DRIVER
GON1 Input-Voltage Range
GON2 Input-Voltage Range
GOFF Input-Voltage Range
GOFF Supply Current
12
12
30
30
V
V
-10
-ꢀ
V
A1–A8 = AGND, no load
A1–A8 = AGND, no load
A1–A8 = AGND, no load
7ꢀ
30
12ꢀ
60
/A
/A
/A
GON1 Supply Current
GON2 Supply Current
10
20
V
+ 0.3
V
GOFF
+ 1.0
GOFF
Output-Voltage Low (Y1–Y8)
Output-Voltage High (Y1–Y6)
Output-Voltage High (Y7–Y8)
I
I
I
=10mA
=10mA
=10mA
V
V
V
OUT
OUT
OUT
V
V
GON1
- 1.0
GON1
- 0.3
V
V
GON2
- 1.0
GON2
- 0.3
Propagation Delay
C
C
C
C
= 100pF (Note 3)
ꢁ0
16
16
80
3ꢀ
3ꢀ
ns
ns
LOAD
LOAD
LOAD
LOAD
Rise Time (Y1–Y8)
= 100pF (Note 3)
= 100pF (Note 3)
= 100pF (Note 3)
Fall Time (Y1–Y8)
ns
Maximum Operating Frequency
ꢀ0
kHz
_______________________________________________________________________________________
3
Internal-Switch Boost Regulator with Integrated
High-Voltage Level Shifter and Op Amp
ELECTRICAL CHARACTERISTICS (continued)
(V = V
= +3V, Circuit of Figure 1, SUP = 8.ꢀV, V
= V
= 30V, V
= -10V, V
= V
= ꢁV, T = 0°C to +85°C.
A
NEG
GON1
GON2
GOFF
IN
SHDN
POS
Typical values are at T = +2ꢀ°C, unless otherwise noted.)
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
CONTROL INPUTS
Logic Input-Voltage Threshold
Rising (A1–A8)
1.2
0.7
1.6
0.9
2.0
V
V
Logic Input-Voltage Threshold
Falling (A1–A8)
1.12
MAX710
Logic Input-Voltage Hysteresis
0.7
20
V
Logic Input Bias Current (A1–A8)
V
= 18V
ꢁꢀ
/A
A1–A8
ELECTRICAL CHARACTERISTICS
(V = V
= +3V, Circuit of Figure 1, SUP = 8V, V
= V
= 30, V
= -10V, V
= V
= ꢁV, OE = 0V, T = -40°C to
A
NEG
GON1
GON2
GOFF
IN
SHDN
POS
+85°C.) (Note ꢁ)
PARAMETER
CONDITIONS
MIN
TYP
MAX
ꢀ.ꢀ
UNITS
V
IN Input-Voltage Range
IN Quiescent Current
1.8
V
= 3V, V = 1.ꢀV, not switching
0.1
mA
IN
FB
IN rising; 100mV hysteresis (typ); LX remains off below
this level
IN Undervoltage Lockout
1.7ꢀ
V
BOOTSTRAP LINEAR REGULATOR (VL)
VL Output Voltage
3.8
2.ꢁ
10
ꢁ.2
3.0
V
V
VL Undervoltage Lockout
VL Maximum Output Current
MAIN DC-DC CONVERTER
VL rising, 200mV hysteresis (typ)
V
= 1V
mA
FB
V
V
= 1.ꢀV, no load
= 1.1V, no load
2.8
ꢀ.0
FB
FB
SUP Supply Current
mA
Operating Frequency
990
88
13ꢀ0
96
kHz
%
Oscillator Maximum Duty Cycle
FB Regulation Voltage
FB Transconductance
FB = COMP
1.216
7ꢀ
1.2ꢀꢁ
280
1.0ꢁ
1ꢀ0
330
2.2
V
ΔI = ꢀ/A at COMP
Falling edge
/S
V
FB Fault Timer Trip Threshold
FB Undervoltage Switching Inhibit
LX On-Resistance
0.96
ꢀ0
mV
mΩ
A
I
LX
= 200mA
LX Current Limit
6ꢀ% duty cycle
1.6
OP AMP
SUP Supply Range
ꢀ
18
19.9
1.ꢁ
12
V
V
SUP Overvoltage Fault Threshold
SUP Undervoltage Fault Threshold
Input Offset Voltage
(Note 1)
(Note 2)
18
V
V
, V
= V
ꢂ 2
SUP
mV
V
NEG POS
Input Common-Mode Voltage Range
0
V
SUP
V
- 100
SUP
VCOM Output-Voltage Swing High
VCOM Output-Voltage Swing Low
VCOM Short-Circuit Current
I
I
= ꢀmA
mV
mV
mA
VCOM
= -ꢀmA
100
VCOM
Short to V
Short to V
ꢂ 2, sourcing
ꢂ 2 , sinking
ꢀ0
ꢀ0
SUP
SUP
4
_______________________________________________________________________________________
Internal-Switch Boost Regulator with Integrated
High-Voltage Level Shifter and Op Amp
MAX710
ELECTRICAL CHARACTERISTICS (continued)
(V = V
= +3V, Circuit of Figure 1, SUP = 8V, V
= V
= 30, V
= -10V, V
= V
= ꢁV, OE = 0V, T = -40°C to
A
NEG
GON1
GON2
GOFF
IN
SHDN
POS
+85°C.) (Note ꢁ)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
HIGH-VOLTAGE SCAN DRIVER
GON1 Input-Voltage Range
GON2 Input-Voltage Range
GOFF Input-Voltage Range
GOFF Supply Current
12
12
30
30
-ꢀ
V
V
-10
V
A1–A8 = AGND, no load
A1–A8 = AGND, no load
A1–A8 = AGND, no load
12ꢀ
60
20
/A
/A
/A
GON1 Supply Current
GON2 Supply Current
V
GOFF
+ 1
Output-Voltage Low (Y1–Y8)
Output-Voltage High (Y1–Y6)
I
I
I
=10mA
=10mA
=10mA
V
V
V
OUT
OUT
OUT
V
V
GON1
- 1
GON2
- 1
Output-Voltage High (Y7–Y8)
CONTROL INPUTS
Logic Input-Voltage Threshold
Rising (A1–A8)
1.2
2.0
V
Logic Input-Voltage Threshold
Falling (A1–A8)
0.67
1.12
ꢀꢀ
V
Logic Input Bias Current (A1–A8)
V
= 18V
/A
A1–A8
Note 1: Inhibits boost switching if SUP exceeds the overvoltage threshold. Switching resumes when SUP drops below the threshold.
Note 2: Boost switching is not enabled until SUP is above undervoltage threshold.
Note 3: Guaranteed by design, not production tested.
Note 4: -ꢁ0°C specifications are guaranteed by design, not production tested.
_______________________________________________________________________________________
5
Internal-Switch Boost Regulator with Integrated
High-Voltage Level Shifter and Op Amp
Typical Operating Characteristics
(Circuit of Figure 1, V = 3V, V
= 8.ꢀV, T = +2ꢀ°C, unless otherwise noted.)
A
IN
MAIN
STEP-UP CONVERTER
LOAD REGULATION
STEP-UP CONVERTER EFFICIENCY
VL LOAD REGULATION
100
90
80
70
60
50
40
30
20
10
0
0
0.2
0
V
= 5.0V
IN
V
= 5.0V
IN
-0.05
-0.10
V
= 3.3V
IN
-0.2
MAX710
-0.15
-0.20
-0.25
-0.30
-0.35
-0.40
-0.4
-0.6
V
= 3.3V
IN
V
= 1.8V
IN
V
= 1.8V
IN
-0.8
-1.0
V
= 3.3V
IN
1
10
100
1000
0.01
0.1
1
10
1
10
100
1000
10,000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
STEP-UP CONVERTER LINE REGULATION
UNDER DIFFERENT LOADS
IN SUPPLY QUIESCENT CURRENT
vs. IN SUPPLY VOLTAGE
INPUT SUPPLY CURRENT
vs. TEMPERATURE
80
70
60
50
70
60
0.4
V
= 5V
IN
NO LOAD
0.2
0
50
40
NO LOAD
-0.2
0.1A LOAD
40
30
20
10
V
= 3.3V
IN
30
20
10
0
-0.4
-0.6
-0.8
-1.0
0.3A LOAD
0.2A LOAD
0.2A LOAD
NO LOAD ON V
MAIN
0
1.8 2.3 2.8 3.3 3.8 4.3 4.8 5.3 5.8
INPUT VOLTAGE (V)
1.6 2.1 2.6 3.1 3.6 4.1 4.6 5.1 5.6
SUPPLY VOLTAGE (V)
-60 -40 -20
0
20 40 60 80 100
TEMPERATURE (°C)
STEP-UP CONVERTER SWITCHING
FREQUENCY vs. INPUT VOLTAGE
STEP-UP CONVERTER SOFT-START
WITH HEAVY LOAD
MAX17010 toc08
1.20
1.19
1.18
1.17
1.16
1.15
1.14
1.13
1.12
100mA LOAD
LX
5V/div
0V
0V
V
MAIN
5V/div
I
L
500mA/div
SHDN
CONTROL
5V/div
0mA
0V
1.11
1.10
1.6 2.1 2.6 3.1 3.6 4.1 4.6 5.1 5.6
INPUT VOLTAGE (V)
2ms/div
6
_______________________________________________________________________________________
Internal-Switch Boost Regulator with Integrated
High-Voltage Level Shifter and Op Amp
MAX710
Typical Operating Characteristics (continued)
(Circuit of Figure 1, V = 3V, V
= 8.ꢀV, T = +2ꢀ°C, unless otherwise noted.)
A
IN
MAIN
STEP-UP CONVERTER LOAD-TRANSIENT
STEP-UP CONVERTER PULSED LOAD-
RESPONSE (30mA TO 300mA)
TRANSIENT RESPONSE (30mA TO 1A)
MAX17010 toc09
MAX17010 toc10
V
LX
V
LX
10V/div
10V/div
0V
0A
0V
0A
I
L
I
L
1A/div
1A/div
V
V
MAIN
AC-COUPLED
200mV/div
MAIN
AC-COUPLED
200mV/div
LOAD CURRENT
200mA/div
LOAD CURRENT
1A/div
0mA
0A
100μs/div
10μs/div
STEP-UP CONVERTER TIMER DELAY
POWER-UP SEQUENCE OF ALL
LATCH RESPONSE TO OVERLOAD
SUPPLY OUTPUTS
MAX17010 toc11
MAX17010 toc12
V
L
5V/div
V
0V
0V
LX
V
MAIN
10V/div
5V/div
0V
V
V
GON
MAIN
20V/div
5V/div
0V
0A
0A
0V
0V
V
COM
5V/div
I
L
V
IN
2A/div
5V/div
0V
V
GOFF
10V/div
LOAD CURRENT
1A/div
SHDN
CONTROL
5V/div
0V
10ms/div
2ms/div
SUP SUPPLY CURRENT
vs. TEMPERATURE
OPERATIONAL AMPLIFIER
FREQUENCY RESPONSE
OPERATIONAL AMPLIFIER
POWER-SUPPLY REJECTION RATIO
3.0
2.5
2.0
10
5
0
-10
-20
V
= 3.3V
IN
NO LOAD
0
V
= 5.0V
IN
1.5
1.0
0.5
-5
-10
-15
-30
-40
-50
100pF LOAD
10k
A
V
= 1V
V
NO LOAD ON V
MAIN
= 3.3V
IN
0
-20
-60
-60 -40 -20
0
20 40 60 80 100
100
1k
100k
10
100
1k
10k
100k
TEMPERATURE (°C)
FREQUENCY (Hz)
FREQUENCY (Hz)
_______________________________________________________________________________________
7
Internal-Switch Boost Regulator with Integrated
High-Voltage Level Shifter and Op Amp
Typical Operating Characteristics (continued)
(Circuit of Figure 1, V = 3V, V
= 8.ꢀV, T = +2ꢀ°C, unless otherwise noted.)
MAIN A
IN
OPERATIONAL AMPLIFIER RAIL-TO-RAIL
OPERATIONAL AMPLIFIER
OPERATIONAL AMPLIFIER
INPUT/OUTPUT WAVEFORMS
LOAD-TRANSIENT RESPONSE
LARGE-SIGNAL STEP RESPONSE
MAX17010 toc16
MAX17010 toc17
MAX17010 toc18
V
VCOM
(AC-COUPLED)
100mV/div
V
POS
V
0mV
0mA
POS
5V/div
5V/div
MAX710
0V
0V
0V
0V
I
V
VCOM
5V/div
VCOM
50mA/div
V
VCOM
5V/div
10μs/div
20μs/div
40μs/div
OPERATIONAL AMPLIFIER
SCAN DRIVER INPUT/OUTPUT
SMALL-SIGNAL STEP RESPONSE
WAVEFORMS WITH LOGIC INPUT
MAX17010 toc19
MAX17010 toc20
V
A
V
5V/div
POS
0V
0V
(AC-COUPLED)
100mV/div
V
Y
V
10V/div
VCOM
(AC-COUPLED)
100mV/div
40μs/div
4μs/div
SCAN DRIVER PROPAGATION DELAY
SCAN DRIVER PROPAGATION DELAY
(RISING EDGE)
(FALLING EDGE)
MAX17010 toc21
MAX17010 toc22
V
A
V
A
5V/div
0V
0V
5V/div
0V
0V
V
V
Y
10V/div
Y
10V/div
100ns/div
100ns/div
8
_______________________________________________________________________________________
Internal-Switch Boost Regulator with Integrated
High-Voltage Level Shifter and Op Amp
MAX710
Pin Description
PIN
NAME
N.C.
FUNCTION
1, 2ꢁ, 30,
31, ꢁ0
No Connection. Not internally connected.
2, 3
PGND
FB
Power Ground. Source connection of the internal step-up regulator power switch.
Feedback Pin. Connect external resistor-divider tap here and minimize trace area. Set V
OUT
ꢁ
according to: V
= 1.23ꢀV (1 + R1ꢂR2) (Figure 1).
OUT
ꢀ
AGND
GON1
Ground
Gate-On Supply. GON1 is the positive supply for the Y1–Y6 level-shifter circuitry. Bypass to AGND
with a minimum 0.1/F ceramic capacitor.
6
Gate-Off Supply. GOFF is the negative supply voltage for the Y1–Y8 high-voltage driver outputs.
Bypass to AGND with a minimum 0.1/F ceramic capacitor.
7
GOFF
8–11
12–19
20–23
A1–Aꢁ
Y1–Y8
Aꢀ–A8
High-Voltage-Driver Logic-Level Inputs
Level-Shifter High-Voltage Outputs
High-Voltage-Driver Logic-Level Inputs
Gate-On Supply. GON2 is the positive supply for the Y7 and Y8 level-shifter circuitry. Bypass to AGND
with a minimum 0.1/F ceramic capacitor.
2ꢀ
26
27
GON2
AGND
COMP
Ground. Internally connected to pin ꢀ.
Compensation Pin for Error Amplifier. Connect a series RC from this pin to AGND. Typical values are
100kΩ and 220pF.
ꢁV On-Chip Regulator Output. This regulator powers internal analog circuitry for the boost and op
amp. Bypass VL to AGND with a 0.22/F or greater ceramic capacitor.
28
VL
29
32
33
3ꢁ
3ꢀ
BGND
SUP
Amplifier Ground
Op Amp and Internal VL Linear Regulator Supply Input. Bypass SUP to BGND with a 0.1/F capacitor.
POS
Op Amp Noninverting Input
Op Amp Inverting Input
Op Amp Output
NEG
VCOM
Shutdown Control Input. Pull SHDN low to turn off the DC-DC converter and high-voltage drivers only
(VL and op amp remain on).
36
SHDN
37
38, 39
—
IN
LX
EP
Supply Pin. Bypass to AGND with a minimum 0.1/F ceramic capacitor.
Switching Node. Connect inductorꢂcatch diode here and minimize trace area for lowest EMI.
Exposed Backside Paddle
_______________________________________________________________________________________
9
Internal-Switch Boost Regulator with Integrated
High-Voltage Level Shifter and Op Amp
V
GON
0.1μF
0.1μF
0.1μF
D4
0.1μF
V
GOFF
0.1μF
0.1μF
D2
V
V
IN
D3
MAIN
+2.7V TO +5.5V
+8.5V/300mA
L1
3.6μH
MAX710
C1
10μF
6.3V
C2
4.7μF
10V
C3
4.7μF
10V
R1
200kΩ
1%
D1
FB
0Ω
LX
SHDN
IN
R2
34kΩ
1%
1μF
PGND
SUP
COMP
C
220pF
R
COMP
COMP
0.1μF
R5
100kΩ
200kΩ
AGND
VL
POS
NEG
0.22μF
R6
200kΩ
MAX17010
TO VCOM
BACKPLANE
V
GON1
GON
VCOM
BGND
GON2
GOFF
V
GOFF
A1
A2
A3
A4
A5
A6
A7
A8
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
EP
Figure 1. MAX17010 Typical Application Circuit
Table 1. Component List
Typical Application Circuit
DESIGNATION
DESCRIPTION
The MAX17010 typical application circuit (Figure 1)
generates a +8.ꢀV source-driver supply and approxi-
mately +22V and -7V gate-driver supplies for TFT dis-
plays. The input voltage range for the IC is from +1.8V
to +ꢀ.ꢀV, but the Figure 1 circuit is designed to run
from 2.7V to ꢀ.ꢀV. Table 1 lists the recommended com-
ponents and Table 2 lists the contact information of
component suppliers.
10/F, 6.3V XꢀR ceramic capacitor (1206)
TDK C3216XꢀROJ106M
C1
ꢁ.7/F, 10V XꢀR ceramic capacitors (1206)
TDK C3216XꢀR1Aꢁ7ꢀM
C2, C3
D1
3A, 30V Schottky diode (M-flat)
Toshiba CMS02
200mA, 100V, dual, ultra-fast diodes (SOT23)
Fairchild MMBDꢁ1ꢁ8SE
D2, D3, Dꢁ
3.6/H, 1.8A inductor
Sumida CMD6D11BHPNP-3R6MC
L1
10 ______________________________________________________________________________________
Internal-Switch Boost Regulator with Integrated
High-Voltage Level Shifter and Op Amp
MAX710
Table 2. Component Suppliers
SUPPLIER
PHONE
FAX
WEBSITE
www.fairchildsemi.com
www.sumida.com
Fairchild
ꢁ08-822-2000
8ꢁ7-ꢀꢁꢀ-6700
8ꢁ7-803-6100
9ꢁ9-ꢁꢀꢀ-2000
ꢁ08-822-2102
8ꢁ7-ꢀꢁꢀ-6720
8ꢁ7-390-ꢁꢁ0ꢀ
9ꢁ9-8ꢀ9-3963
Sumida
TDK
www.component.tdk.com
www.toshiba.comꢂtaec
Toshiba
Note: Indicate that you are using the MAX17010 when contacting these component suppliers.
L
D
V
IN
V
MAIN
IN
SHDN
LX
LINEAR
REGULATOR
VL
AND BOOTSTRAP
STEP-UP
REGULATOR
CONTROLLER
Y1–Y6
GON1
PGND
FB
COMP
AGND
A1–A6
GON2
SUP
NEG
-
TO VCOM
A7, A8
BACKPLANE
VCOM
+
GOFF
POS
Y7, Y8
MAX17010
BGND
Figure 2. MAX17010 Functional Diagram
and provide fast transient response to pulsed loads
found in source drivers of TFT LCD panels. The high
switching frequency (1.2MHz) allows the use of low-pro-
file inductors and ceramic capacitors to minimize the
thickness of LCD panel designs. The integrated high-effi-
ciency MOSFET and the IC’s built-in digital soft-start
functions reduce the number of external components
required while controlling inrush current. The output volt-
age can be set from ꢀV to 18V with an external resistive
voltage-divider.
Detailed Description
The MAX17010 contains a high-performance step-up
switching regulator, a high-speed op amp, and a high-
voltage, level-shifting scan driver optimized for active-
matrix TFT LCDs. Figure 2 shows the MAX17010
functional diagram.
Step-Up Regulator
The step-up regulator employs a current-mode, fixed-fre-
quency PWM architecture to maximize loop bandwidth
______________________________________________________________________________________ 11
Internal-Switch Boost Regulator with Integrated
High-Voltage Level Shifter and Op Amp
The regulator controls the output voltage, and the power
delivered to the output, by modulating the duty cycle (D)
of the internal power MOSFET in each switching cycle.
The duty cycle of the MOSFET is approximated by:
exceed the COMP voltage, the controller resets the flip-
flop and turns off the MOSFET. Since the inductor cur-
rent is continuous, a transverse potential develops
across the inductor that turns on the diode (D1). The
voltage across the inductor then becomes the diffe-
rence between the output voltage and the input volt-
age. This discharge condition forces the current
through the inductor to ramp back down, transferring
the energy stored in the magnetic field to the output
capacitor and the load. The MOSFET remains off for the
rest of the clock cycle.
V
− V
IN
MAIN
V
D ≈
MAIN
Figure 3 shows the block diagram of the step-up regu-
lator. An error amplifier compares the signal at FB to
1.23ꢀV and changes the COMP output. The voltage at
COMP determines the current trip point each time the
internal MOSFET turns on. As the load varies, the error
amplifier sources or sinks current to the COMP output
accordingly, to produce the inductor peak current ne-
cessary to service the load. To maintain stability at high
duty cycles, a slope-compensation signal is summed
with the current-sense signal.
MAX710
Undervoltage Lockout (UVLO)
The undervoltage lockout (UVLO) circuit compares the
input voltage at IN with the UVLO threshold (1.3V rising
and 1.2V falling) to ensure that the input voltage is high
enough for reliable operation. The 100mV (typ) hysteresis
prevents supply transients from causing a restart. Once
the input voltage exceeds the UVLO rising threshold,
startup begins. When the input voltage falls below the
UVLO falling threshold, the controller turns off the main
step-up regulator and the linear regulator outputs, dis-
ables the switch-control block, and the op amp outputs
are high impedance.
On the rising edge of the internal clock, the controller
sets a flip-flop, turning on the n-channel MOSFET, and
applying the input voltage across the inductor. The cur-
rent through the inductor ramps up linearly, storing
energy in its magnetic field. Once the sum of the cur-
rent-feedback signal and the slope compensation
LX
CLOCK
LOGIC AND
DRIVER
PGND
CURRENT-LIMIT
COMPARATOR
+
SOFT-
START
-
I
LIMIT
SLOPE COMP
PWM
COMPARATOR
CURRENT
SENSE
+
-
1.2MHz
OSCILLATOR
-
TO FAULT LOGIC
ERROR AMP
+
+
1.0V
FB
FAULT
COMPARATOR
-
1.235V
COMP
Figure 3. Step-Up Regulator Block Diagram
12 ______________________________________________________________________________________
Internal-Switch Boost Regulator with Integrated
High-Voltage Level Shifter and Op Amp
MAX710
Linear Regulator (VL)
The MAX17010 includes an internal ꢁV linear regulator.
SUP is the input of the linear regulator. The input voltage
range is between ꢀV and 18V. The output of the linear
regulator (VL) is set to ꢁV (typ). The regulator powers all
the internal circuitry including the MOSFET gate driver.
Bypass the VL pin to AGND with a 0.22/F or greater
ceramic capacitor. SUP should be directly connected to
the output of the step-up regulator. This feature signifi-
cantly improves the efficiency at low input voltages.
Op Amps
The MAX17010 has an op amp that is typically used to
drive the LCD backplane (VCOM) andꢂor the gamma-
correction-divider string. The op amp features 1ꢀ0mA
output short-circuit current, ꢁꢀVꢂ/s slew rate, and
12MHz bandwidth. While the op amp is a rail-to-rail
input and output design, its accuracy is significantly
degraded for input voltages within 1V of its supply rails
(SUP and VGND).
Short-Circuit Current Limit
The op amp limits short-circuit current to approximately
1ꢀ0mA if the output is directly shorted to SUP or to
AGND. If the short-circuit condition persists, the junction
temperature of the IC rises until it reaches the thermal-
shutdown threshold (+160°C typ). Once the junction
temperature reaches the thermal-shutdown threshold, an
internal thermal sensor immediately sets the thermal fault
latch, shutting off all the IC’s outputs except VL. The
device remains inactive until the input voltage is cycled.
Bootstrapping and Soft-Start
The MAX17010 features bootstrapping operation. In nor-
mal operation, the internal linear regulator supplies
power to the internal circuitry. The input of the linear reg-
ulator (SUP) should be directly connected to the output
of the step-up regulator. The MAX17010 is enabled when
the input voltage at SUP is above 1.ꢁV and the fault latch
is not set. After being enabled, the regulator starts open-
loop switching to generate the supply voltage for the
linear regulator. Step-up switching is inhibited if the step-
Driving Pure Capacitive Load
The op amp is typically used to drive the LCD back-
plane (VCOM) or the gamma-correction-divider string.
The LCD backplane consists of a distributed series
capacitance and resistance, a load that can be easily
driven by the op amp. However, if the op amp is used
in an application with a pure capacitive load, steps
must be taken to ensure stable operation.
up output voltage (V
) exceeds the voltage on the
MAIN
SUP input. The internal reference block turns on when the
VL voltage exceeds 2.7V (typ). When the reference volt-
age reaches regulation, the PWM controller and the cur-
rent-limit circuit are enabled and the step-up regulator
enters soft-start. During soft-start, the main step-up regu-
lator directly limits the peak inductor current, allowing
from zero up to the full current-limit value in 128 equal
current steps. The maximum load current is available
after the output voltage reaches regulation (which ter-
minates soft-start), or after the soft-start timer expires in
approximately 3ms. The soft-start routine minimizes the
inrush current and voltage overshoot, and ensures a
well-defined startup behavior.
As the op amp’s capacitive load increases, the amplifier’s
bandwidth decreases and the gain peaking increases. A
ꢀΩ to ꢀ0Ω small resistor placed between VCOM and the
capacitive load reduces peaking but also reduces the
gain. An alternative method of reducing peaking is to
place a series RC network (snubber) in parallel with the
capacitive load. The RC network does not continuously
load the output or reduce the gain.
Fault Protection
During steady-state operation, the MAX17010 monitors
the FB voltage. If the FB voltage does not exceed 1V
(typ), the MAX17010 activates an internal fault timer. If
there is a continuous fault for the fault-timer duration,
the MAX17010 sets the fault latch, shutting down all the
outputs except VL. Once the fault condition is removed,
cycle the input voltage to clear the fault latch and reac-
tivate the device. The fault-detection circuit is disabled
during the soft-start time.
High-Voltage Level-Shifting Scan Driver
The MAX17010 includes eight logic-level to high-volt-
age level-shifting buffers, which can buffer eight logic
inputs (A1–A8) and shift them to a desired level (Y1–Y8)
to drive TFT-LCD row logic. The driver outputs, Y1–Y8,
swing between their power-supply rails, according to
the input-logic level on A1–A8. The driver output is
GOFF when its respective input is logic low, and GON_
when its respective input is logic high. These eight dri-
ver channels are grouped for different high-level sup-
plies. A1–A6 are supplied from GON1, and A7 and A8
are supplied from GON2. GON1 and GON2 can be tied
together to make A1–A8 use identical supplies.
The MAX17010 monitors the SUP voltage for undervolt-
age and overvoltage conditions. If the SUP voltage is
below 1.ꢁV (typ) or above 19V (typ), the MAX17010 dis-
ables the gate driver of the step-up regulator and pre-
vents the internal MOSFET from switching. The SUP
undervoltage and overvoltage conditions do not set the
fault latch.
______________________________________________________________________________________ 13
Internal-Switch Boost Regulator with Integrated
High-Voltage Level Shifter and Op Amp
The high-voltage, level-shifting scan drivers are
designed to drive the TFT panels with row-drivers inte-
grated on the panel glass. Its eight outputs swing from
+30V (max) to -6.3V (min) and can swiftly drive capaci-
tive loads. The typical propagation delays are ꢁ0ns,
with fast 16ns rise-and-fall times. The buffers can oper-
ate at frequencies up to ꢀ0kHz.
and ratio of inductor resistance to other power-path
resistances, the best LIR can shift up or down. If the
inductor resistance is relatively high, more ripple can
be accepted to reduce the number of turns required
and increase the wire diameter. If the inductor resis-
tance is relatively low, increasing inductance to lower
the peak current can decrease losses throughout the
power path. If extremely thin high-resistance inductors
are used, as is common for LCD panel applications, the
best LIR can increase to between 0.ꢀ and 1.0.
Thermal-Overload Protection
The thermal-overload protection prevents excessive
power dissipation from overheating the device. When
MAX710
Once a physical inductor is chosen, higher and lower
values of the inductor should be evaluated for efficiency
improvements in typical operating regions.
the junction temperature exceeds T = +160°C, a ther-
J
mal sensor immediately activates the fault protection,
which shuts down all outputs except VL, allowing the
device to cool down. Once the device cools down by
approximately 1ꢀ°C, cycle the input voltage (below the
UVLO-falling threshold) to clear the fault latch and
reactivate the device.
Calculate the approximate inductor value using the typi-
cal input voltage (V ), the maximum output current
IN
(I
), the expected efficiency (η
) taken from
MAIN(MAX)
TYP
an appropriate curve in the Typical Operating
Characteristics, and an estimate of LIR based on the
The thermal-overload protection protects the controller in
the event of fault conditions. For continuous operation,
do not exceed the absolute maximum junction tempera-
above discussion:
2
⎛
⎜
⎞
⎟
⎛ V
⎞
V
MAIN
− V
× f
η
TYP
LIR
⎛
⎞
IN
IN
L =
ture rating of T = +1ꢀ0°C.
⎜
⎟
⎠
⎜
⎝
⎟
⎠
J
⎝
V
I
MAIN ⎝ MAIN(MAX) OSC ⎠
Design Procedure
Main Step-Up Regulator
Choose an available inductor value from an appropriate
inductor family. Calculate the maximum DC input cur-
rent at the minimum input voltage V
using con-
IN(MIN)
Inductor Selection
servation of energy and the expected efficiency at that
operating point (η ) taken from an appropriate curve
The minimum inductance value, peak current rating, and
series resistance are factors to consider when selecting
the inductor. These factors influence the converter’s effi-
ciency, maximum output-load capability, transient
response time, and output-voltage ripple. Physical size
and cost are also important factors to be considered.
MIN
in the Typical Operating Characteristics:
I
× V
MAIN(MAX)
MAIN
I
=
IN(DC,MAX)
V
× η
MIN
IN(MIN)
Calculate the ripple current at that operating point and
the peak current required for the inductor:
The maximum output current, input voltage, output volt-
age, and switching frequency determine the inductor
value. Very high inductance values minimize the current
ripple and therefore reduce the peak current, which
decreases core losses in the inductor and I2R losses in
the entire power path. However, large inductor values
also require more energy storage and more turns of wire,
which increase physical size and can increase I2R losses
in the inductor. Low inductance values decrease the
physical size but increase the current ripple and peak
current. Finding the best inductor involves choosing the
best compromise between circuit efficiency, inductor
size, and cost.
V
× V
− V
(
)
IN(MIN)
MAIN
IN(MIN)
I
=
RIPPLE
L × V
× f
MAIN OSC
I
RIPPLE
I
=I
+
PEAK IN(DC,MAX)
2
The inductor’s saturation current rating and the
MAX17010’s LX current limit (I ) should exceed I
LIM
PEAK
and the inductor’s DC current rating should exceed
I
. For good efficiency, choose an inductor
IN(DC,MAX)
with less than 0.1Ω series resistance.
Considering the Typical Operating Circuit, the maximum
The equations used here include a constant (LIR),
which is the ratio of the inductor peak-to-peak ripple
current to the average DC inductor current at the full-
load current. The best trade-off between inductor size
and circuit efficiency for step-up regulators generally
has an LIR between 0.3 and 0.ꢀ. However, depending
on the AC characteristics of the inductor core material
load current (I
) is 300mA, with an 8.ꢀV output
MAIN(MAX)
and a typical input voltage of 3V. Choosing an LIR of 0.ꢁꢀ
and estimating efficiency of 8ꢀ% at this operating point:
2
3V
8.ꢀV
8.ꢀV − 3V
0.3A ×1.2MHz 0.ꢀ
0.8ꢀ
⎛
⎞ ⎛
⎞⎛
⎟⎜
⎠⎝
⎞
L =
≈ 3.6μH
⎜
⎝
⎟ ⎜
⎠ ⎝
⎟
⎠
14 ______________________________________________________________________________________
Internal-Switch Boost Regulator with Integrated
High-Voltage Level Shifter and Op Amp
MAX710
Using the circuit’s minimum input voltage (2.2V) and
estimating efficiency of 80% at that operating point:
Rectifier Diode
The MAX17010’s high switching frequency demands a
high-speed rectifier. Schottky diodes are recommended
for most applications because of their fast recovery time
and low forward voltage. In general, a 2A Schottky
diode complements the internal MOSFET well.
0.3A × 8.ꢀV
2.2V × 0.8
I
=
≈1.ꢁꢀA
IN(DC,MAX)
The ripple current and the peak current are:
Output Voltage Selection
The output voltage of the main step-up regulator is
adjusted by connecting a resistive voltage-divider from
2.2V × 8.ꢀV −2.2V
(
)
≈ 0.38A
I
=
RIPPLE
3.6μH× 8.ꢀV ×1.2MHz
the output (V
) to AGND with the center tap con-
MAIN
nected to FB (see Figure 1). Select R2 in the 10kΩ to
ꢀ0kΩ range. Calculate R1 with the following equation:
0.38A
2
I
=1.ꢁꢀA +
≈1.6ꢁA
PEAK
⎛ V
⎞
MAIN
R1=R2×
−1
⎟
⎜
Output Capacitor Selection
⎝
⎠
V
REF
The total output-voltage ripple has two components: the
capacitive ripple caused by the charging and dis-
charging of the output capacitance, and the ohmic rip-
ple due to the capacitor’s equivalent series resistance
(ESR):
where V
, the step-up regulator’s feedback set point,
REF
is 1.23ꢀV. Place R1 and R2 close to the IC.
Loop Compensation
Choose R
to set the high-frequency integrator
COMP
V
= V
+ V
RIPPLE
RIPPLE(C) RIPPLE(ESR)
gain for fast transient response. Choose C
the integrator zero to maintain loop stability.
to set
COMP
I
C
⎛ V
− V
IN
⎞
MAIN
MAIN
V
≈
RIPPLE(C)
⎜
⎟
⎠
For low-ESR output capacitors, use the following equa-
tions to obtain stable performance and good transient
response:
⎝
V
f
OUT
MAIN OSC
and:
1000× V × V
×C
OUT
V
≈I
R
IN
OUT
RIPPLE(ESR) PEAK ESR(COUT)
R
≈
COMP
L ×I
MAIN(MAX)
where I
is the peak inductor current (see the
PEAK
Inductor Selection section). For ceramic capacitors, the
output-voltage ripple is typically dominated by
RIPPLE(C)
V
×C
OUT
OUT
C
≈
COMP
10×I
×R
COMP
MAIN(MAX)
V
. The voltage rating and temperature charac-
teristics of the output capacitor must also be considered.
To further optimize transient response, vary R
in
COMP
20% steps and C
in ꢀ0% steps, while observing
COMP
Input Capacitor Selection
The input capacitor (C ) reduces the current peaks
IN
transient response waveforms.
drawn from the input supply and reduces noise injec-
tion into the IC. A 10/F ceramic capacitor is used in the
Typical Applications Circuit (Figure 1) because of the
high source impedance seen in typical lab setups.
Actual applications usually have much lower source
impedance since the step-up regulator often runs
directly from the output of another regulated supply.
Applications Information
Power Dissipation
An IC’s maximum power dissipation depends on the
thermal resistance from the die to the ambient environ-
ment, and the ambient temperature. The thermal resis-
tance depends on the IC package, PCB copper area,
other thermal mass, and airflow.
Typically, C can be reduced below the values used in
IN
the Typical Applications Circuit. Ensure a low-noise
The MAX17010, with its exposed backside paddle sol-
dered to an internal ground layer in a typical multilayer
PCB, can dissipate about 2.8W into +70°C still air.
More PCB copper, cooler ambient air, and more airflow
increase the possible dissipation, while less copper or
warmer air decreases the IC’s dissipation capability.
The major components of power dissipation are the
power dissipated in the step-up regulator and the
power dissipated by the op amps.
supply at IN by using adequate C . Alternatively,
IN
greater voltage variation can be tolerated on C if IN is
IN
decoupled from C using an RC lowpass filter, as
IN
shown in Figure 1.
______________________________________________________________________________________ 15
Internal-Switch Boost Regulator with Integrated
High-Voltage Level Shifter and Op Amp
Step-Up Regulator
The largest portions of power dissipation in the step-up
regulator are the internal MOSFET, inductor, and the out-
put diode. If the step-up regulator has 90% efficiency,
about 3% to ꢀ% of the power is lost in the internal
MOSFET, about 3% to ꢁ% in the inductor, and about 1%
in the output diode. The remaining 1% to 3% is distri-
buted among the input and output capacitors and the
PCB traces. If the input power is about ꢀW, the power
lost in the internal MOSFET is about 1ꢀ0mW to 2ꢀ0mW.
2) Create a power ground island (PGND) consisting of
the input- and output-capacitor grounds, PGND pin,
and any charge-pump components. Connect all
these together with short, wide traces or a small
ground plane. Maximizing the width of the power-
ground traces improves efficiency and reduces out-
put-voltage ripple and noise spikes. Create an
analog ground plane (AGND) consisting of the
AGND pin, all the feedback-divider ground connec-
tions, the op-amp-divider ground connections, the
COMP capacitor ground connection, the SUP and
VL bypass-capacitor ground connections, and the
device’s exposed backside pad. Connect the AGND
and PGND islands by connecting the PGND pin
directly to the exposed backside pad. Make no other
connections between these separate ground planes.
MAX710
Op Amp
The power dissipated in the op amp depends on its out-
put current, the output voltage, and the supply voltage:
PD
=I
× V
− V
(
)
SOURCE VCOM(SOURCE)
SUP VOUT
PD
=I
× V
SINK VCOM(SINK) VOUT
3) Place the feedback-voltage-divider resistors as close
to the feedback pin as possible. The divider’s center
trace should be kept short. Placing the resistors far
away causes the FB trace to become an antenna
that can pick up switching noise. Care should be
taken to avoid running the feedback trace near LX or
the switching nodes in the charge pumps.
where I
the op amp, and I
the op amp sinks.
is the output current sourced by
VCOM(SINK)
VCOM(SOURCE)
is the output current that
In a typical case where the supply voltage is 8.ꢀV, and
the output voltage is ꢁV with an output source current
of 30mA, the power dissipated is 13ꢀmV.
ꢁ) Place the IN pin and VL pin bypass capacitors as
close to the device as possible. The ground connec-
tions of the IN and VL bypass capacitors should be
connected directly to the AGND pin or the IC’s back-
side pad with a wide trace.
PCB Layout and Grounding
Careful PCB layout is important for proper operation.
Use the following guidelines for good PCB layout:
1) Minimize the area of high-current loops by placing
the inductor, output diode, and output capacitors
near the input capacitors and near the LX and
PGND pins. The high-current input loop goes from
the positive terminal of the input capacitor to the
inductor, to the IC’s LX pins, out of PGND, and to
the input capacitor’s negative terminal. The high-
current output loop is from the positive terminal of
the input capacitor to the inductor, to the output
diode (D1), to the positive terminal of the output
capacitors, reconnecting between the output-
capacitor and input-capacitor ground terminals.
Connect these loop components with short, wide
connections. Avoid using vias in the high-current
paths. If vias are unavoidable, use many vias in
parallel to reduce resistance and inductance.
ꢀ) Minimize the length and maximize the width of the
traces between the output capacitors and the load
for best transient responses.
6) Minimize the size of the LX node while keeping it
wide and short. Keep the LX node away from the
feedback node and analog ground. Use DC traces
as shield if necessary.
7) Refer to the MAX17010 evaluation kit for an example
of proper board layout.
16 ______________________________________________________________________________________
Internal-Switch Boost Regulator with Integrated
High-Voltage Level Shifter and Op Amp
MAX710
Pin Configuration
Chip Information
TRANSISTOR COUNT: 9202
PROCESS: BiCMOS
TOP VIEW
30 29 28 27 26 25 24 23 22 21
20
31
32
33
A5
N.C.
SUP
POS
19 Y8
18 Y7
Package Information
For the latest package outline information, go to
www.maxim-ic.com/packages.
17
16
Y6
Y5
NEG 34
35
36
37
38
39
40
VCOM
SHDN
IN
MAX17010
15 Y4
14
Y3
13 Y2
12
LX
Y1
11 A4
LX
N.C.
1
2
3
4
5
6
7
8
9
10
THIN QFN
(5mm x 5mm)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 17
© 2007 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
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