MAX17014ETM+ [MAXIM]
Low-Cost Multiple-Output Power Supply for LCD TVs; 低成本，多输出电源，用于LCD电视
| 型号： | MAX17014ETM+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Low-Cost Multiple-Output Power Supply for LCD TVs |
| 文件： | 总34页 (文件大小：626K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-1045; Rev 0; 10ꢀ07
Low-Cost Multiple-Output
Power Supply for LCD TVs
MAX7014
General Description
Features
The MAX17014 multiple-output power-supply controller
generates all the supply rails for thin-film transistor
(TFT) liquid-crystal display (LCD) panels in TVs and
monitors operating from a regulated 12V input. It
includes a step-down and a step-up regulator, a posi-
tive and a negative charge pump, two operational
amplifiers, and a Dual Mode™ logic-controlled high-
voltage switch control block. The MAX17014 can oper-
ate from 8V to 16.5V input voltages and is optimized for
LCD TV panel and LCD monitor applications running
directly from 12V supplies.
o Optimized for 10.8V to 13.2V Input Supply
o 8V to 16.5V Input Supply Range
o Selectable Frequency (600kHz/1.2MHz)
o Current-Mode Step-Up Regulator
Built-In 20V, 3.3A, 110mΩ n-Channel MOSFET
High-Accuracy Output Voltage (1%)
True Shutdown
Fast Load-Transient Response
High Efficiency
3ms Internal Soft-Start
The step-up and step-down regulators feature internal
power MOSFETs and high-frequency operation allow-
ing the use of small inductors and capacitors, resulting
in a compact solution. Both switching regulators use
fixed-frequency current-mode control architectures,
providing fast load-transient response and easy com-
pensation. A current-limit function for internal switches
and output-fault shutdown protect the step-up and
step-down power supplies against fault conditions. The
MAX17014 provides soft-start functions to limit inrush
current during startup. The MAX17014 provides
adjustable power-up timing.
o Current-Mode Step-Down Regulator
Built-In 20V, 2.5A, 120mΩ n-Channel MOSFET
Fast Load-Transient Response
Adjustable Output Voltage Down to 1.25V
Skip Mode at Light Load
High Efficiency
3ms Internal Soft-Start
o Adjustable Positive and Negative Charge-Pump
Regulators
o Soft-Start and Timer-Delay Fault Latch for All
Outputs
o Logic-Controlled High-Voltage Integrated
The positive and negative charge-pump regulators pro-
vide TFT gate driver supply voltages. Both output volt-
ages can be adjusted with external resistive
voltage-dividers. The switch control block allows the
manipulation of the positive TFT gate driver voltage.
Switches with Adjustable Delay
o Two High-Speed Operational Amplifiers
150mA Short-Circuit Current
100V/µs Slew Rate
20MHz, -3dB Bandwidth
The MAX17014 includes two high-current operational
amplifiers designed to drive the LCD backplane
(VCOM). The amplifier features high output current
( 150mA), fast slew rate (100Vꢀ/s), wide bandwidth
(20MHz), and rail-to-rail inputs and outputs. A series
p-channel MOSFET is integrated to sequence power to
o 120mΩ p-Channel FET for AV
Sequencing
DD
o Input Undervoltage Lockout and Thermal-
Overload Protection
o 48-Pin, 7mm x 7mm Thin QFN Package
AV
after the MAX17014 has proceeded through
DD
normal startup, and provides True Shutdown™.
The MAX17014 is available in a small (7mm x 7mm),
low-profile (0.8mm), 48-pin thin QFN package and
operates over a -40°C to +85°C temperature range.
Ordering Information
PIN-
PKG
PART
TEMP RANGE
PACKAGE
CODE
Applications
48 Thin QFN
7mm x 7mm
MAX17014ETM+ -40°C to +85°C
+Denotes a lead-free package.
T4877+3
LCD TV Panels
LCD Monitor Panels
Dual Mode is a trademark of Maxim Integrated Products, Inc.
True Shutdown is a trademark of Maxim Integrated Products, Inc.
Simplified Operating Circuit and Pin Configuration appear
at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Low-Cost Multiple-Output
Power Supply for LCD TVs
ABSOLUTE MAXIMUM RATINGS
IN
GND1, OGND, CPGND to GND ......................................... 0.3V
MODE, DLP, CTL, THR, DEL1, DEL2, VL to GND ...-0.3V to +7.5V
REF, FBP, FBN, FB1, FB2, COMP,
V
, IN2, OVIN, SUP, EN1, EN2, FSEL to GND......-0.3V to +22V
REF Short Circuit to GND...........................................Continuous
RMS LX1 Current (total for both pins)...................................3.2A
RMS GND1 Current (total for both pins) ...............................3.2A
RMS IN2 Current (total for both pins)....................................3.2A
RMS LX2 Current (total for both pins)...................................3.2A
RMS CPGND Current............................................................0.8A
RMS SWI Current ..................................................................2.4A
RMS SWO Current ................................................................2.4A
RMS DRVN, DRVP Current ...................................................0.8A
RMS VL Current ..................................................................50mA
OUT to GND ...........................................-0.3V to (V + 0.3V)
VL
SWI, SWO to GND..................................................-0.3V to +22V
LX1 to GND1 ..........................................................-0.3V to +22V
SWI to SWO............................................................-0.3V to +22V
SWI to SUI .............................................................-0.3V to +7.5V
POS1, NEG1, OUT1, POS2, NEG2,
MAX7014
OUT2 to OGND...................................-0.3V to (V
DRVN, DRVP to CPGND ...........................-0.3V to (V
LX2 to CPGND ...........................................-0.3V to (V
BST to VL................................................................-0.3V to +22V
SRC to GND ...........................................................-0.3V to +48V
GON, DRN to GND ...................................-0.3V to (V
GON to DRN...........................................................-0.3V to +48V
+ 0.3V)
+ 0.3V)
+ 0.3V)
Continuous Power Dissipation (T = +70°C)
OVIN
SUP
IN2
A
48-Pin Thin QFN
(derate 38.5mWꢀ°C above +70°C) .........................3076.9mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+160°C
Storage Temperature Range.............................-65°C to +165°C
Lead Temperature (soldering, 10s) .................................+300°C
+ 0.3V)
SRC
POS_ to NEG_ RMS Current ...................................5mA (Note 1)
Note 1: See Figure 6 for the op amp clamp structures.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, V = IN2 = 12V, AV
= OVIN = SUP = 15V, T = 0°C to +85°C. Typical values are at T = +25°C, unless other-
IN
DD
A
A
wise noted.)
PARAMETER
GENERAL
CONDITIONS
MIN
TYP
MAX
UNITS
V
, IN2 Input Voltage Range
IN
8.0
16.5
V
Only LX2 switching (V
= V
= 0
= 1.5V, V
= 0);
FB1
FBP
FBN
V
+ IN2 Quiescent Current
8
2
mA
IN
EN1 = EN2 = VL, V
FSEL
LX2 not switching (V
= V
= V
= 1.5V,
FB1
FB2
FBP
V
V
+ IN2 Standby Current
+ IN2 Shutdown Current
mA
IN
IN
V
FBN
= 0); EN1 = EN2 = VL, V
= 0
FSEL
EN1 = EN2 = GND (shutdown)
EN1 = EN2 = GND (shutdown)
300
10
μA
μA
SUP + OVIN Shutdown Current
FSEL = V
1020
510
1200
600
1380
690
IN
SMPS Operating Frequency
kHz
FSEL = GND
Phase Difference Between Step-
Down/Positive and Step-Up/Negative
Regulators
180
Degrees
V
V
Undervoltage Lockout Threshold
V
rising edge, 100mV typical hysteresis
5.75
6.50
7.25
IN
IN
VL REGULATOR
I
= 25mA, V
= V
= V
= 1.1V, V
=
VL
FB1
FB2
FBP
FBN
VL Output Voltage
4.9
3.5
5.0
3.9
5.1
4.3
V
V
0.4V (all regulators switching)
VL Undervoltage Lockout Threshold VL rising edge, 100mV typical hysteresis
2
_______________________________________________________________________________________
Low-Cost Multiple-Output
Power Supply for LCD TVs
MAX7014
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V = IN2 = 12V, AV = OVIN = SUP = 15V, T = 0°C to +85°C. Typical values are at T = +25°C, unless otherwise
IN
DD
A
A
noted.)
PARAMETER
CONDITIONS
MIN
1.235
10
TYP
MAX
UNITS
REFERENCE
REF Output Voltage
REF Load Regulation
REF Sink Current
No external load
0 < I < 50μA
1.250
1.265
10
V
mV
μA
V
LOAD
In regulation
REF Undervoltage Lockout Threshold Rising edge; 20mV typical hysteresis
1.0
1.2
STEP-DOWN REGULATOR
0°C < T < +85°C
3.25
3.267
1.23
3.30
1.25
3.35
3.333
1.27
FB2 = GND, no load
(Note 2)
A
OUT Voltage in Fixed Mode
V
V
V
T
A
= +25°C
0°C < T < +85°C
V
= 2.5V, no load
A
OUT
FB2 Voltage in Adjustable Mode
(Note 2)
T
A
= +25°C
1.2375
1.2625
FB2 Adjustable-Mode Threshold
Voltage
Dual-mode comparator
0.10
0.15
0.20
Output Voltage Adjust Range
FB2 Fault Trip Level
Step-down output
Falling edge
1.5
0.96
50
5.0
1.04
200
V
V
1.00
125
0.5
FB2 Input Leakage Current
DC Load Regulation
V
FB2
= 1.5V
nA
%
0A < I
< 2A
LOAD
DC Line Regulation
No load, 10.8V < V
< 13.2V
0.1
%/V
IN2
LX2-to-IN2 nMOS Switch
On-Resistance
120
10
240
23
mꢀ
ꢀ
LX2-to-CPGND nMOS Switch
On-Resistance
6
7
BST-to-VL PMOS Switch
On-Resistance
12
20
ꢀ
Low-Frequency Operation
OUT Threshold
Step-down only
FSEL = V
0.8
V
217
108
3
Low-Frequency Operation
Switching Frequency
IN
kHz
FSEL = GND
LX2 Positive Current Limit
Soft-Start Period
2.50
70
3.50
90
A
3
ms
V
/
REF
128
Soft-Start Step Size
V
Maximum Duty Factor
80
%
STEP-UP REGULATOR
Output Voltage Range
V
20
81
V
VIN
Oscillator Maximum Duty Cycle
69
75
70
%
ns
Minimum t
ON
0°C < T < +85°C
1.235
1.2375
0.96
1.25
1.265
1.2625
1.04
FB1 = COMP,
= 1nF
A
FB1 Regulation Voltage
FB1 Fault Trip Level
V
V
C
COMP
T
A
= +25°C
Falling edge
1.00
_______________________________________________________________________________________
3
Low-Cost Multiple-Output
Power Supply for LCD TVs
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V = IN2 = 12V, AV
= OVIN = SUP = 15V, T = 0°C to +85°C. Typical values are at T = +25°C, unless other-
IN
DD
A
A
wise noted.)
PARAMETER
FB1 Load Regulation
FB1 Line Regulation
FB1 Input Bias Current
FB1 Transconductance
FB1 Voltage Gain
CONDITIONS
MIN
TYP
-1
MAX
UNITS
%
0 < I
< full, transient only
LOAD
10.8V < V
< 13.2V
0.08
125
320
1400
4
0.15
200
560
%/V
nA
VIN
V
FB1
= 1.25V
25
ꢀI = 2.5μA at COMP, FB1 = COMP
150
μS
MAX7014
FB1 to COMP
V/V
μA
LX1 Leakage Current
LX1 Current Limit
V
= 1.5V, V
= 20V
40
4.2
FB1
FB1
LX1
V
= 1.1V, duty cycle = 25%
3.2
3.7
0.23
110
3
A
Current-Sense Transresistance
LX1 On-Resistance
0.16
0.30
220
V/A
mꢀ
ms
Soft-Start Period
I
/
LIM
Soft-Start Step Size
A
128
POSITIVE AND NEGATIVE CHARGE-PUMP REGULATORS
SUP Input Supply Range
8.0
18.0
0.4
V
mA
V
SUP Input Supply Current
SUP Overvoltage Threshold
V
= 1.5V, V
= 0.15V (not switching)
0.2
19
FBP
FBN
SUP rising edge, 250mV typical hysteresis (Note 3)
18
20
0°C < T < +85°C
A
1.23
1.25
1.27
1.2625
0.2
FBP Regulation Voltage
V
T
A
= +25°C
1.2375
FBP Line-Regulation Error
FBP Input Bias Current
11V < V
< 16V, not in dropout
%/V
nA
SUP
V
FBP
= 1.5V
-50
+50
DRVP p-Channel MOSFET
On-Resistance
1.0
0.5
3.0
ꢀ
DRVP n-Channel MOSFET
On-Resistance
1.0
ꢀ
FBP Fault Trip Level
Falling edge
0.96
1.00
3
1.04
V
Positive Charge-Pump Soft-Start Period
ms
Positive Charge-Pump Soft-Start
Step Size
V
/
REF
128
V
V
0°C < T < +85°C
0.988
0.99
-50
1.000
1.00
1.012
1.01
+50
0.2
A
FBN Regulation Voltage
V
V
- V
FBN
REF
T
A
= +25°C
FBN Input Bias Current
= 0mV
nA
%/V
ꢀ
FBN
FBN Line Regulation Error
DRVN p-Channel On-Resistance
DRVN n-Channel On-Resistance
FBN Fault Trip Level
11V < V
< 16V, not in dropout
SUP
1.0
0.5
500
3
3.0
1.0
ꢀ
Rising edge
450
550
mV
ms
Negative Charge-Pump Soft-Start
(V
-
) /
REF
Negative Charge-Pump Soft-Start
Step Size
V
V
FBN
128
4
_______________________________________________________________________________________
Low-Cost Multiple-Output
Power Supply for LCD TVs
MAX7014
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V = IN2 = 12V, AV
= OVIN = SUP = 15V, T = 0°C to +85°C. Typical values are at T = +25°C, unless other-
IN
DD
A
A
wise noted.)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
AV
SWITCH
DD
SWI Supply Range
8.0
18.5
20.00
240
V
V
SWI Overvoltage Fault Threshold
SWI-SWO Switch Resistance
SUI-SWI Pullup Resistance
SUI Output Sink Current
SWI rising edge, 250mV typical hysteresis (Note 3)
18.50
19.25
120
30
mꢀ
ꢀ
EN2 = GND
EN2 = DEL2 = VL
EN2 = DEL2 = VL
24
30
36
μA
V
SWI-SUI Done Threshold
OPERATIONAL AMPLIFIERS
OVIN Supply Range
4.4
5.0
5.6
8
18
20
6
V
V
OVIN Overvoltage Fault Threshold
OVIN Supply Current
OVIN rising edge, 250mV typical hysteresis (Note 3)
18
19
Buffer configuration, V
= V
/ 2, no load
OVIN
4.2
mA
POSx
Input Offset Voltage
2V < (V
2V < (V
, V
) < (V
- 2V), T = +25°C
A
-10
+10
+1
mV
NEGx POSx
OVIN
OVIN
Input Bias Current
, V
) < (V
) < (V
- 2V)
- 2V)
-1
0
μA
V
NEGx POSx
Input Common-Mode Voltage Range
Input Common-Mode Rejection
V
OVIN
2V < (V
, V
100
dB
NEGx POSx
OVIN
V
-
V
-
OVIN
300
OVIN
150
Output Voltage Swing High
I
I
= 25mA
mV
OUTx
Output Voltage Swing Low
Large-Signal Voltage Gain
Slew Rate
= -25mA
150
80
300
mV
dB
OUTx
2V < (V
, V
) < (V
) < (V
) < (V
- 2V)
- 2V)
- 2V)
NEGx POSx
OVIN
OVIN
OVIN
2V < (V
, V
100
20
V/μs
MHz
NEGx POSx
-3dB Bandwidth
2V < (V
, V
NEGx POSx
Short to V
Short to V
/ 2, sourcing
/ 2, sinking
150
250
OVIN
OVIN
Short-Circuit Current
mA
HIGH-VOLTAGE SWITCH ARRAY
SRC Supply Range
44
500
20
V
μA
ꢀ
SRC Supply Current
200
10
GON-to-SRC Switch On-Resistance
V
DLP
= 2V, CTL = VL
GON-to-SRC Switch Saturation Current (V
- V
) > 5V
GON
150
390
20
mA
ꢀ
SRC
GON-to-DRN Switch On-Resistance
V
= 2V, CTL = GND
50
DLP
GON
GON-to-DRN Switch Saturation Current (V
- V
) > 5V
DRN
75
180
6.0
mA
kꢀ
V
GON-to-GND Switch On-Resistance
CTL Input Low Voltage
CTL Input High Voltage
CTL Input Current
DLP = GND, V
= 5V
2.5
12.5
0.6
GON
1.6
-1
V
CTL = GND or VL
1kꢀ from DRN to GND, CTL = GND to VL step, no load
on GON, measured from V
+1
μA
CTL-to-GON Rising Propagation Delay
100
ns
= 2V to GON = 20%
CTL
1kꢀ from DRN to GND, CTL = VL to GND step, no load
on GON, measured from V = 0.6V to GON = 80%
CTL-to-GON Falling Propagation Delay
MODE Switch On-Resistance
100
ns
CTL
1250
ꢀ
_______________________________________________________________________________________
5
Low-Cost Multiple-Output
Power Supply for LCD TVs
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V = IN2 = 12V, AV = OVIN = SUP = 15V, T = 0°C to +85°C. Typical values are at T = +25°C, unless otherwise
IN
DD
A
A
noted.)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Mode 1 Voltage Threshold
V
V
rising edge
4.5
V
MODE
MODE Capacitor Charge Current
(Mode 2)
< MODE current-source stop voltage threshold
40
50
60
μA
MODE
MODE Voltage Threshold for
Enabling DRN Switch Control
in Mode 2
GON connects to DRN
MODE rising edge
1.20
1.25
1.30
V
MAX7014
MODE Current-Source Stop
Voltage Threshold
2
3
V
THR-to-GON Voltage Gain
9.4
10.0
10.6
V/V
SEQUENCE CONTROL
EN1, EN2, Input Low Voltage
EN1, EN2 Input High Voltage
EN1, EN2 Pulldown Resistance
DEL1, DEL2, DLP Charge Current
DEL1, DEL2, DLP Turn-On Threshold
0.6
V
V
1.6
1
8
Mꢀ
μA
kV
V
DEL1
= V
= V = 1V
DLP
6
10
DEL2
1.19
1.25
1.31
DEL1, DEL2, DLP Discharge
Switch On-Resistance
EN1 = GND or fault tripped
10
3
ꢀ
FBN Discharge Switch On-Resistance EN2 = GND or fault tripped
FAULT DETECTION
kꢀ
Duration to Trigger Fault
50
ms
ms
Duration to Restart After Fault
160
Number of Restart Attempts
Before Shutdown
3
Times
°C
Thermal-Shutdown Threshold
15°C typical hysteresis
+160
SWITCHING FREQUENCY SELECTION
FSEL Input Low Voltage
FSEL Input High Voltage
FSEL Pulldown Resistance
600kHz
1.2MHz
0.6
V
V
1.6
1
Mꢀ
6
_______________________________________________________________________________________
Low-Cost Multiple-Output
Power Supply for LCD TVs
MAX7014
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, V = IN2 = 12V, AV
= OVIN = SUP = 15V, T = -40°C to +85°C. Typical values are at T = +25°C, unless oth-
IN
DD
A
A
erwise noted.) (Note 4)
PARAMETER
GENERAL
CONDITIONS
MIN
TYP
MAX
UNITS
V
, IN2 Input Voltage Range
8.0
1020
510
16.5
1380
690
V
kHz
V
IN
FSEL = V
IN
SMPS Operating Frequency
Undervoltage Lockout Threshold
FSEL = GND
V
V
rising edge, 100mV typical hysteresis
5.75
7.25
IN
IN
VL REGULATOR
I
V
= 25mA, V
= V
= V
= 1.1V,
FBP
VL
FB1
FB2
VL Output Voltage
4.9
3.5
5.1
4.3
V
V
= 0.4V (all regulators switching)
FBN
VL Undervoltage Lockout Threshold VL rising edge, 100mV typical hysteresis
REFERENCE
REF Output Voltage
REF Load Regulation
No external load
0 < I < 50μA
1.235
1.265
10
V
mV
V
LOAD
REF Undervoltage Lockout Threshold Rising edge; 20mV typical hysteresis
1.2
STEP-DOWN REGULATOR
OUT Voltage in Fixed Mode
FB2 = GND, no load (Note 2)
= 2.5V, no load (Note 2)
3.25
1.23
3.35
1.27
V
V
FB2 Voltage in Adjustable Mode
V
OUT
FB2 Adjustable-Mode
Threshold Voltage
Dual-mode comparator
Step-down output
0.10
1.5
0.20
5.0
V
V
Output Voltage Adjust Range
LX2-to-IN2 nMOS Switch
On-Resistance
240
mꢀ
LX2-to-CPGND nMOS Switch
On-Resistance
6
7
23
20
ꢀ
ꢀ
BST-to-VL pMOS Switch
On-Resistance
LX2 Positive Current Limit
Maximum Duty Factor
STEP-UP REGULATOR
Output Voltage Range
2.50
70
3.50
90
A
%
V
20
81
V
%
VIN
Oscillator Maximum Duty Cycle
FB1 Regulation Voltage
LX1 Current Limit
69
FB1 = COMP, C
= 1nF
1.23
3.2
1.27
4.2
V
COMP
V
FB1
= 1.1V, duty cycle = 25%
A
Current-Sense Transresistance
LX1 On-Resistance
0.16
0.30
220
V/A
mꢀ
_______________________________________________________________________________________
7
Low-Cost Multiple-Output
Power Supply for LCD TVs
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V = IN2 = 12V, AV
= OVIN = SUP = 15V, T = -40°C to +85°C. Typical values are at T = +25°C, unless oth-
IN
DD
A
A
erwise noted.) (Note 4)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
POSITIVE AND NEGATIVE CHARGE-PUMP REGULATORS
V
V
Input Supply Range
8
18
20
V
V
V
SUP
SUP
Overvoltage Threshold
SUP rising edge, 250mV typical hysteresis (Note 3)
18
FBP Regulation Voltage
1.23
1.27
MAX7014
DRVP p-Channel MOSFET
On-Resistance
3
1
ꢀ
DRVP n-Channel MOSFET
On-Resistance
ꢀ
FBN Regulation Voltage
V
V
- V
0.985
1.015
V
ꢀ
ꢀ
REF
FBN
DRVN p-Channel On-Resistance
DRVN n-Channel On-Resistance
3
1
AV
SWITCH
DD
SWI Supply Range
8.0
18.5
20.0
240
36
V
V
SWI Overvoltage Fault Threshold
SWI-SWO Switch Resistance
SUI Output Sink Current
= rising, 250mV typical hysteresis (Note 3)
18.5
OVIN
mꢀ
μA
V
EN2 = DEL2 = VL
EN2 = DEL2 = VL
24
SWI-SUI Done Threshold
4.4
5.6
OPERATIONAL AMPLIFIERS
OVIN Supply Range
8
18
0
18
20
V
V
V
OVIN Overvoltage Fault Threshold
Input Common-Mode Voltage Range
SWI rising edge, 250mV typical hysteresis (Note 2)
V
OVIN
V
-
OVIN
300
Output Voltage Swing High
I
I
25mA
mV
mV
OUTx =
OUTx =
Output Voltage Swing Low
-25mA
300
HIGH-VOLTAGE SWITCH ARRAY
SRC Supply Range
44
20
V
ꢀ
ꢀ
kꢀ
V
GON-to-SRC Switch On-Resistance
GON-to-DRN Switch On-Resistance
GON-to-GND Switch On-Resistance
CTL Input Low Voltage
V
= 2V, CTL = VL
DLP
V
DLP
= 2V, CTL = GND
50
DLP = GND, V
= 5V
2.5
1.6
12.5
0.6
GON
CTL Input High Voltage
V
Mode 1 Voltage Threshold
V
rising edge
4.5
V
MODE
8
_______________________________________________________________________________________
Low-Cost Multiple-Output
Power Supply for LCD TVs
MAX7014
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, V = IN2 = 12V, AV
= OVIN = SUP = 15V, T = -40°C to +85°C. Typical values are at T = +25°C, unless oth-
IN
DD
A
A
erwise noted.) (Note 4)
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
MODE Voltage Threshold for Enabling
DRN Switch Control in Mode 2
GON connects to DRN
MODE rising edge
1.2
1.3
V
MODE Current-Source Stop Voltage
Threshold
2
3
V
THR-to-GON Voltage Gain
SEQUENCE CONTROL
9.4
10.6
V/V
EN1, EN2 Input Low Voltage
EN1, EN2 Input High Voltage
0.6
0.6
V
V
1.6
1.6
SWITCHING FREQUENCY SELECTION
FSEL Input Low Voltage
FSEL Input High Voltage
600kHz
1.2MHz
V
V
Note 2: When the inductor is in continuous conduction (EN2 = VL or heavy load), the output voltage has a DC regulation level lower than
the error comparator threshold by 50% of the output voltage ripple. In discontinuous conduction (EN2 = GND with light load), the
output voltage has a DC regulation level higher than the error comparator threshold by 50% of the output voltage ripple.
Note 3: Disables boost switching if either SUP, SWI, or OVIN exceeds the threshold. Switching resumes when no threshold is exceeded.
Note 4: Specifications to -40°C are guaranteed by design, not production tested.
Typical Operating Characteristics
(Circuit of Figure 1. V = V
IN
= V
= 12V, AV
= 16V, V
= 34.5V, V
= -6V, V = 3.3V, T = +25°C, unless other-
OUT1 A
DD
INL
SUPP
GON
GOFF
wise noted.)
STEP-DOWN REGULATOR EFFICIENCY
vs. LOAD CURRENT
STEP-DOWN REGULATOR
OUTPUT VOLTAGE vs. LOAD CURRENT
STEP-DOWN REGULATOR
LOAD TRANSIENT RESPONSE
MAX17014 toc03
85
80
75
70
65
60
55
50
3.350
3.325
3.300
3.275
3.250
3.225
3.200
EN1 = VL, EN2 = GND
A
EN1 = VL, EN2 = GND
3.3V
2A
B
0.1A
EN1 = VL, EN2 = VL
EN1 = VL, EN2 = VL
C
0A
0.01
0.1
1
10
0
0.40 0.80 1.20 1.60 2.00 2.40
LOAD CURRENT (A)
10µs/div
A: V , 100mV/div
OUT
LOAD CURRENT (A)
B: LOAD CURRENT, 2A/div
C: INDUCTOR CURRENT, 1A/div
_______________________________________________________________________________________
9
Low-Cost Multiple-Output
Power Supply for LCD TVs
Typical Operating Characteristics (continued)
(Circuit of Figure 1. V = V
IN
= V
= 12V, AV
= 16V, V
= 34.5V, V
= -6V, V = 3.3V, T = +25°C, unless other-
OUT1 A
DD
INL
SUPP
GON
GOFF
wise noted.)
STEP-DOWN REGULATOR
STEP-UP REGULATOR EFFICIENCY
vs. LOAD CURRENT
STEP-UP REGULATOR
OUTPUT VOLTAGE vs. LOAD CURRENT
SOFT-START (HEAVY LOAD)
MAX17014 toc04
100
95
16.10
A
B
90
16.08
16.06
16.04
85
80
0V
MAX7014
75
70
0V
C
65
60
0A
55
50
16.02
16.00
D
0V
45
40
4.00ms/div
0.001
0.01
0.1
1
10
0
0.5
1.0
1.5
2.0
2.5
A: V , 5V/div
B: V , 1V/div
OUT
C: INDUCTOR CURRENT,
500mA/div
IN
LOAD CURRENT (A)
LOAD CURRENT (A)
D: V , 10V/div
LX2
STEP-UP REGULATOR
SOFT-START (HEAVY LOAD)
STEP-UP REGULATOR
LOAD-TRANSIENT RESPONSE
STEP-UP REGULATOR PULSED
LOAD-TRANSIENT RESPONSE
MAX17014 toc09
MAX17014 toc07
MAX17014 toc08
A
B
A
A
50mA
0.2A
C
D
16V
B
16V
B
E
C
C
0A
0A
10.00ms/div
20.0µs/div
10.0µs/div
A: EN2, 5V/div
B: DEL2, 5V/div
D: V , 5V/div
E: INDUCTOR CURRENT,
1.00A/div
A: LOAD CURRENT,
1A/div
B: AV , 200mV/div
C: INDUCTOR CURRENT,
2A/div
A: LOAD CURRENT,
1A/div
B: AV , 200mV/div
C: INDUCTOR CURRENT,
2A/div
SUI
C: AV , 5V/div
DD
DD
DD
10 ______________________________________________________________________________________
Low-Cost Multiple-Output
Power Supply for LCD TVs
MAX7014
Typical Operating Characteristics (continued)
(Circuit of Figure 1. V = V
IN
= V
= 12V, AV
= 16V, V
= 34.5V, V
= -6V, V = 3.3V, T = +25°C, unless other-
OUT1 A
DD
INL
SUPP
GON
GOFF
wise noted.)
STEP-UP REGULATOR CURRENT LIMIT
vs. INPUT VOLTAGE
TIME-DELAY LATCH
RESPONSE TO OVERLOAD
SWITCHING FREQUENCY
vs. INPUT VOLTAGE
MAX17014 toc11
6.0
5.5
5.0
4.5
1.200
1.198
1.196
1.194
1.192
1.190
L1 = 4.7µH
(CDEP134NP-4R8M, I = 9.3A)
SAT
A
0V
AV = 16V
DD
B
0V
C
0V
4.0
3.5
D
3.0
2.5
E
0V
AV = 18V
DD
8
9
10 11 12 13 14 15 16
INPUT VOLTAGE (V)
200ms/div
D: V
8
9
10
11
(V)
12
13
14
A: V , 5V/div
, 5V/div
GOFF
OUT
V
IN
B: V , 10V/div
AVDD
E: L1 INDUCTOR CURRENT,
5A/div
C: V , 50V/div
GON
REFERENCE VOLTAGE
LOAD REGULATION
POSITIVE CHARGE-PUMP REGULATOR
NORMALIZED LINE REGULATION
VL LOAD REGULATION
5.05
1.251
0.05
0.02
EN1 = EN2 = VL
5.04
5.03
5.02
1.250
1.249
EN1 = EN2 = VL
I
= 0A
SRC
5.01
5.00
-0.01
-0.04
-0.07
-0.10
1.248
1.247
1.246
1.245
4.99
4.98
4.97
I
= 25mA
SRC
EN1 = EN2 = GND
EN1 = EN2 = GND
4.96
4.95
0
20
40
60
80
100
0
50
100
150
200
10 11 12 13 14 15 16 17 18
(V)
LOAD CURRENT (mA)
LOAD CURRENT (µA)
V
IN
______________________________________________________________________________________ 11
Low-Cost Multiple-Output
Power Supply for LCD TVs
Typical Operating Characteristics (continued)
(Circuit of Figure 1. V = V
IN
= V
= 12V, AV
= 16V, V
= 34.5V, V
= -6V, V
= 3.3V, T = +25°C, unless other-
OUT1 A
DD
INL
SUPP
GON
GOFF
wise noted.)
POSITIVE CHARGE-PUMP REGULATOR
NORMALIZED LOAD REGULATION
POSITIVE CHARGE-PUMP REGULATOR
NEGATIVE CHARGE-PUMP REGULATOR
NORMALIZED LINE REGULATION
LOAD-TRANSIENT RESPONSE
MAX17014 toc17
0.4
0.25
0
0.05
-0.15
-0.35
-0.55
-0.75
A
34.8V
-0.4
MAX7014
-0.8
-1.2
-1.6
70mA
B
10mA
-2.0
0
25
50
75
100
125
150
40.0µs/div
9
10
11
12
V
13
(V)
14
15
16
A: V , 100mV/div
SRC
LOAD CURRENT (mA)
IN
B: LOAD CURRENT, 20mA/div
NEGATIVE CHARGE-PUMP REGULATOR
NORMALIZED LOAD REGULATION
NEGATIVE CHARGE-PUMP REGULATOR
LOAD-TRANSIENT RESPONSE
POWER-UP SEQUENCE
MAX17014 toc21
MAX17014 toc20
0.2
0
A
A
-6V
0V
B
-0.2
-0.4
-0.6
-0.8
-1.0
-1.2
C
0V
0V
D
E
110mA
B
F
G
0V
0V
10mA
V
= VL
EN2
0V
0
50
100
150
200
250
20.0µs/div
20.0ms/div
A: V , 5V/div
EN1
B: V , 5V/div
OUT
E: V
, 10V/div
AVDD
A: V
, 100mV/div
GOFF
LOAD CURRENT (mA)
F: V
DEL2
, 5V/div
B: LOAD CURRENT, 65mA/div
C: V
D: V
, 5V/div
, 5V/div
G: V , 20V/div
DEL1
GOFF
SRC
12 ______________________________________________________________________________________
Low-Cost Multiple-Output
Power Supply for LCD TVs
MAX7014
Typical Operating Characteristics (continued)
(Circuit of Figure 1. V = V
IN
= V
= 12V, AV
= 16V, V
= 34.5V, V
= -6V, V = 3.3V, T = +25°C, unless other-
OUT1 A
DD
INL
SUPP
GON
GOFF
wise noted.)
OPERATIONAL AMPLIFIER RAIL-TO-RAIL
OPERATIONAL AMPLIFIER
OPERATIONAL AMPLIFIER
INPUT/OUTPUT
LOAD-TRANSIENT RESPONSE
LARGE-SIGNAL RESPONSE
MAX17014 toc22
MAX17014 toc23
MAX17014 toc24
50mA
A
0mA
A
A
-50mA
0V
0V
B
8V
B
B
0V
0V
4.0µs/div
A: INPUT SIGNAL, 5V/div
B: OUTPUT SIGNAL, 5V/div
200ns/div
A: OUTPUT CURRENT, 50mA/div
B: OUTPUT VOLTAGE, 500mV/div
400ns/div
A: INPUT SIGNAL, 5V/div
B: OUTPUT SIGNAL, 5V/div
OPERATIONAL AMPLIFIER
SMALL-SIGNAL RESPONSE
V
SUPPLY CURRENT vs. V VOLTAGE
IN
INL SUPPLY CURRENT vs. TEMPERATURE
IN
MAX17014 toc25
6
5
4
3
2
3.5
EN1 = EN2 = VL
3.0
2.5
A
2.0
1.5
EN1 = VL, EN2 = GND
EN1 = EN2 = GND
0V
1.0
0.5
B
EN1 = EN2 = GND
1
0
0V
0
100ns/div
A: INPUT SIGNAL, 200mV/div
B: OUTPUT SIGNAL, 200mV/div
8
9
10 11 12 13 14 15 16
VOLTAGE (V)
-40
-15
10
35
60
85
V
TEMPERATURE (°C)
IN
HIGH-VOLTAGE SWITCH
CONTROL FUNCTION (MODE 1)
HIGH-VOLTAGE SWITCH
CONTROL FUNCTION (MODE 2)
MAX17014 toc28
MAX17014 toc29
A
A
0V
0V
B
B
0V
0V
C
C
C
= 2.2nF
GON
C
= 2.2nF
GON
0V
0V
4.00µs/div
4.00µs/div
A: V , 5V/div
C: V , 10V/div
GON
CTL
A: V , 5V/div
C: V , 10V/div
GON
CTL
B: V , 5V/div
MODE
B: V , 2V/div
MODE
______________________________________________________________________________________ 13
Low-Cost Multiple-Output
Power Supply for LCD TVs
Pin Description
PIN
1
NAME
POS1
OUT1
FUNCTION
Operational Amplifier 1 Noninverting Input
Operational Amplifier 1 Output
2
GON Low-Level Regulation Set-Point Input. Connect THR to the center of a resistive voltage-divider
between AV and GND to set the V falling regulation level. The regulation level is 10 x V
3
THR
.
THR
DD
GON
See the High-Voltage Switch Control section for details.
High-Voltage Switch-Control Block Mode Selection Input and Timing-Adjustment Input. See the
High-Voltage Switch Control section for details. MODE is high impedance when it is connected to
VL. MODE is internally pulled to GND by a 10ꢀ resistor for 0.1μs typical when the high-voltage
switch-control block is enabled.
MAX7014
4
5
MODE
CTL
High-Voltage Switch-Control Block Timing Control Input. See the High-Voltage Switch Control
section for details.
6
7
DLP
GON Output Enable. See the High-Voltage Switch Control section for details.
DRN
Switch Input. Drain of the internal high-voltage p-channel MOSFET between DRN and GON.
Internal High-Voltage MOSFET Switch Common Terminal. GON is the output of the high-voltage
switch-control block.
8
9
GON
SRC
Switch Input. Source of the internal high-voltage p-channel MOSFET between SRC and GON.
Positive Charge-Pump Regulator Feedback Input. Connect FBP to the center of a resistive voltage-
divider between the positive charge-pump regulator output and GND to set the positive charge-
pump regulator output voltage. Place the resistive voltage-divider within 5mm to FBP.
10
FBP
11
12
CPGND
DRVP
Charge Pump and Step-Down Regulator Power Ground
Positive Charge-Pump Driver Output. Connect DRVP to the positive charge-pump flying capacitor(s).
Supply Input for the Charge-Pump Drivers. Connect this pin to the output of the boost regulator SWI
and bypass to CPGND with a 0.1μF capacitor.
13
SUP
14
DRVN
GND
Negative Charge-Pump Driver Output. Connect DRVN to the negative charge-pump flying capacitor(s).
Analog Ground
15, 34
Negative Charge-Pump Regulator Feedback Input. Connect FBN to the center of a resistive
voltage-divider between the negative output and REF to set the negative charge-pump regulator
output voltage. Place the resistive voltage-divider within 5mm of FBN.
16
17
18
FBN
REF
Reference Output. Connect a 0.22μF capacitor from REF to GND. All power outputs are disabled
until REF exceeds its UVLO threshold. REF is active whenever V is above V UVLO threshold.
IN
IN
Negative Charge-Pump Delay Input. Connect a capacitor from DEL1 and GND to set the delay time
between the step-down output and the negative output. An 8μA current source charges C
DEL1
.
DEL1
DEL1 is internally pulled to GND through 10ꢀ resistance when EN1 is low or VL is below its UVLO.
19
20
N.C.
OUT
No Connection. Not internally connected.
Step-Down Regulator Output-Voltage Sense. Connect OUT to the step-down regulator output.
Step-Down Regulator Feedback Input. Connect FB2 to GND to select the step-down converter’s
3.3V fixed mode. For adjustable mode, connect FB2 to the center of a resistive voltage-divider
between the step-down regulator output and GND to set the step-down regulator output voltage.
Place the resistive voltage-divider within 5mm of FB2.
21
22
FB2
BST
Step-Down Regulator Bootstrap Capacitor Connection for High-Side Gate Driver. Connect a 0.1μF
ceramic capacitor from BST to LX2.
14 ______________________________________________________________________________________
Low-Cost Multiple-Output
Power Supply for LCD TVs
MAX7014
Pin Description (continued)
PIN
NAME
FUNCTION
Step-Down Regulator Switching Node. LX2 is the source of the internal n-channel MOSFET
connected between IN2 and LX2. Connect the inductor and Schottky catch diode close to both LX2
pins to minimize the trace area for low EMI.
23, 24
LX2
Step-Down Regulator Power Input. Drain of the internal n-channel MOSFET connected between IN2
and LX2.
25, 26
27
IN2
Input of the Internal 5V Linear Regulator and the Startup Circuitry. Bypass V to GND with 0.22μF
IN
close to the IC.
V
IN
Frequency-Select Pin. Connect FSEL to GND for 600kHz operation. Connect to VL or V for 1.2MHz
IN
operation.
28
FSEL
DEL2
Step-Up Regulator and Positive Charge-Pump Delay Input. Connect a capacitor from DEL2 and
GND to set the delay time between EN2 and the startup of these regulators, or between the step-
down startup and the startup of these regulators if EN1 is high before the step-down starts. An 8μA
29
30
current source charges C
. DEL2 is internally pulled to GND through 10ꢀ resistance when EN1
DEL2
or EN2 is low or when VL is below its UVLO threshold.
5V Internal Linear Regulator Output. Bypass VL to GND with 1μF minimum. Provides power for the
internal MOSFET driving circuit, the PWM controllers, charge-pump regulators, logic, and reference
and other analog circuitry. Provides 25mA load current when all switching regulators are enabled.
VL
VL is active whenever V is above V UVLO threshold.
IN
IN
Compensation Pin for the Step-Up Error Amplifier. Connect a series resistor and capacitor from
COMP to ground.
31
32
COMP
EN2
Step-Up and Positive Charge-Pump Regulator Enable Input. Input HIGH also enables DEL2 pullup
current. EN2 is inactive when EN1 is low. See the Power-Up Sequence section for details.
Step-Down and Negative Charge-Pump Regulator Enable Input. Input HIGH also enables DEL1
pullup current.
33
EN1
GND1
LX1
35, 36
37, 38
Step-Up Regulator Power Ground. Source of the internal power n-channel MOSFET.
Step-Up Regulator Power MOSFET n-Channel Drain and Switching Node. Connect the inductor and
Schottky catch diode to both LX1 pins and minimize the trace area for lowest EMI.
Step-Up Regulator Internal p-Channel MOSFET Pass Switch Source Input. Connect to the cathode of
the step-up regulator Schottky catch diode.
39
40
SWI
SUI
Step-Up Regulator Internal p-Channel MOSFET Pass Switch Gate Input. Connect a capacitor from
SUI to SWI to set the delay time. A 30μA current source pulls down on C
when DEL2 is high.
SUI
Boost Regulator Feedback Input. Connect FB1 to the center of a resistive voltage-divider between
the boost regulator output and GND to set the boost regulator output voltage. Place the resistive
voltage-divider within 5mm of FB1.
41
FB1
42
43
44
45
46
47
48
EP
SWO
OVIN
NEG2
POS2
OUT2
OGND
NEG1
GND
Step-Up Regulator Internal p-Channel MOSFET Pass Switch Drain Output
Operational Amplifier Power Input
Operational Amplifier 2 Inverting Input
Operational Amplifier 2 Noninverting Input
Operational Amplifier Output 2
Operational Amplifier Power Ground
Operational Amplifier 1 Inverting Input
Exposed Paddle = GND
______________________________________________________________________________________ 15
Low-Cost Multiple-Output
Power Supply for LCD TVs
L1
4.7μH
V
IN
12V
C1
10μF
C2
10μF
0.1μF
D1
25 26
IN2 IN2
BST
35
36
37
LX1
38
LX1
C3
10μF
GND1 GND1
39
SWI
SWI
SUI
22
C14
0.1μF
C24
10μF
C4
0.1μF
40
42
AV
16V
1.5A
DD
OUT
3.3V
2A
23
24
SWO
LX2
LX2
MAX7014
L2
2.6μH
C15
10μF
C16
10μF
C5
22μF
R3
158kΩ
D2
41
31
FB1
COMP
20
21
R4
13.3kΩ
OUT
FB2
R5
82kΩ
C17
330pF
43
AV
OVIN
DD
27
V
V
C18
IN
IN
0.1μF
C6
0.1μF
47
1
R6
20kΩ
OGND
POS1
POS2
30
28
VL
VL
C7
1μF
FSEL
MODE
R7
13.3kΩ
45
3
4
17
REF
REF
THR
MAX17014
C8
0.22μF
48
2
NEG1
15
29
R8
2.2kΩ
GND
OUT1
NEG2
OUT2
VCOM1
44
46
DEL2
C9
0.1μF
VCOM2
5
7
CTL
GON CONTROL
18
DEL1
DRN
C10
0.15μF
R9
1kΩ
GON
35V
50mA
8
GON
SUP
STEP-DOWN,
NEGATIVE CHARGE
PUMP ON/OFF
33
13
EN1
SWI
C23
C19
0.1μF
1μF
32
6
STEP-UP, POSITIVE
CHARGE PUMP ON/OFF
EN2
DLP
9
SRC
D4
C20
0.1μF
C11
0.15μF
SRC
12
19
DRVP
N.C.
D3
C13
0.1μF
GOFF
-6V
100mA
C21
14
0.1μF
C22
0.1μF
C12
DRVN
1μF
R1
R16
367kΩ
150kΩ
FBN
16
CPGND
11
FBP
10
AV
DD
EP
49
D5
R2
23kΩ
R17
13.3kΩ
REF
Figure 1. Typical Operating Circuit
16 ______________________________________________________________________________________
Low-Cost Multiple-Output
Power Supply for LCD TVs
MAX7014
Typical Operating Circuit
Detailed Description
The typical operating circuit (Figure 1) of the
MAX17014 is a complete power-supply system for TFT
LCD panels in monitors and TVs. The circuit generates
a +3.3V logic supply, a +16V source driver supply, a
+34.5V positive gate driver supply, and a -6V negative
gate driver supply from a 12V 10% input supply.
Table 1 lists some selected components and Table 2
lists the contact information for component suppliers.
The MAX17014 is a multiple-output power supply
designed primarily for TFT LCD panels used in moni-
tors and TVs. It contains a step-down switching regula-
tor to generate the logic supply rail, a step-up switching
regulator to generate the source driver supply, and two
charge-pump regulators to generate the gate driver
supplies. Each regulator features adjustable output
voltage, digital soft-start, and timer-delayed fault pro-
tection. Both the step-down and step-up regulators use
a fixed-frequency current-mode control architecture.
The two switching regulators are 180° out-of-phase to
minimize the input ripple. The internal oscillator offers
two pin-selectable frequency options (600kHzꢀ1.2MHz),
allowing users to optimize their designs based on the
specific application requirements. The MAX17014
includes two high-performance operational amplifiers
designed to drive the LCD backplane (VCOM). The
amplifiers feature high output current ( 150mA), fast
slew rate (100Vꢀ/s), wide bandwidth (20MHz), and rail-
to-rail inputs and outputs. In addition, the MAX17014
features a high-voltage switch-control block, an internal
5V linear regulator, a 1.25V reference output, well-
defined power-up and power-down sequences, and
thermal-overload protection. Figure 2 shows the
MAX17014 functional diagram.
Table 1. Component List
DESIGNATION
DESCRIPTION
10μF 20%, 16V X5R ceramic capacitors
(1206)
Taiyo Yuden EMK325BJ106MD
TDK C3225X7R1C106M
C1, C2, C3
22μF 10%, 6.3V X5R ceramic capacitor
(1206)
Taiyo Yuden JMK316BJ226KL
Murata GRM31CR60J226M
C5
10μF 20%, 25V X5R ceramic capacitors
(1210)
TDK C3225X5R1E106M
C15, C16, C24
D1, D2
3A, 30V Schottky diodes (M-Flat)
Toshiba CMS02 (TE12L,Q)
Central Semiconductor
Step-Down Regulator
The step-down regulator consists of an internal n-chan-
nel MOSFET with gate driver, a lossless current-sense
network, a current-limit comparator, and a PWM con-
troller block. The external power stage consists of a
Schottky diode rectifier, an inductor, and output capac-
itors. The output voltage is regulated by changing the
duty cycle of the n-channel MOSFET. A bootstrap cir-
cuit that uses a 0.1/F flying capacitor between LX2 and
BST provides the supply voltage for the high-side gate
driver. Although the MAX17014 also includes a 10Ω
(typ) low-side MOSFET, this switch is used to charge
the bootstrap capacitor during startup and maintains
fixed-frequency operation at light load and cannot be
used as a synchronous rectifier. An external Schottky
diode (D2 in Figure 1) is always required.
200mA, 100V dual ultra-fast diodes
(SOT23)
Fairchild MMBD4148SE (top mark D4)
Central Semiconductor CMPD1001S lead
free (top mark L21)
D3, D4, D5
Low-profile 4.7μH, 3.5A inductor
(2mm height)
TOKO FDV0620-4R7M
L1
L2
Low-profile 2.4μH, 2.6A inductor
(1.8mm height)
TOKO 1124BS-2R4M (2.4μH)
Wurth 744052002 (2.5μH)
Table 2. Component Suppliers
SUPPLIER
PHONE
FAX
WEBSITE
www.fairchildsemi.com
www.sumida.com
Fairchild Semiconductor
408-822-2000
847-545-6700
847-803-6100
949-455-2000
408-822-2102
847-545-6720
847-390-4405
949-859-3963
Sumida
TDK
www.component.tdk.com
www.toshiba.comꢀtaec
Toshiba
______________________________________________________________________________________ 17
Low-Cost Multiple-Output
Power Supply for LCD TVs
V
(12V)
IN
BST
VL
IN2
LX1
3.3V
2A
STEP-UP
STEP-DOWN
OSC
LX2
GND1
MAX7014
FB1
COMP
CPGND
OUT
FSEL
SWI
VL
P
AV
16V
1.5A
DD
SWO
SUI
150mV
FB2
OVIN
POS1
V
IN
V
IN
NEG1
OUT1
VL
VL
VL
OP AMPs
POS2
REF
NEG2
OUT2
REF
REF
GND
OGND
DRN
DEL1
DEL2
THR
MODE
STEP-DOWN,
NEGATIVE CHARGE
PUMP ON/OFF
POWER-UP
SEQUENCE
HV
SWITCH
BLOCK
EN1
CTL
GON
CONTROL
STEP-UP,
POSITIVE CHARGE
PUMP ON/OFF
EN2
DLP
VGON
35V
50mA
GON
SRC
50% OSC
SWI
SUP
SUP
VGOFF
-6V
100mA
DRVN
DRVP
NEGATIVE
REG
POSITIVE
REG
CPGND
FBN
FBP
CPGND
AV
DD
REF
Figure 2. Functional Diagram
18 ______________________________________________________________________________________
Low-Cost Multiple-Output
Power Supply for LCD TVs
MAX7014
PWM Controller Block
GND with the center tap connected to FB2 to adjust the
output voltage. Choose RB (resistance from FB2 to
GND) to be between 5kΩ and 50kΩ, and solve for RA
(resistance from OUT1 to FB1) using the equation:
The heart of the PWM control block is a multi-input,
open-loop comparator that sums three signals: the out-
put voltage signal with respect to the reference voltage,
the current-sense signal, and the slope compensation.
The PWM controller is a direct-summing type, lacking a
traditional error amplifier and the phase shift associated
with it. This direct-summing configuration approaches
ideal cycle-by-cycle control over the output voltage.
⎛
⎞
V
V
OUT
RA =RB×
−1
⎟
⎜
⎝
⎠
FB2
where V
= 1.25V, and V
can vary from 1.25V to 5V.
FB2
OUT
Because of FB2’s (pin 21) close proximity to the noisy
BST (pin 22), a noise filter is required for FB2
adjustable-mode operation. Place a 100pF capacitor
from FB2 to GND to prevent unstable operation. No fil-
ter is required for 3.3V fixed-mode operation.
When EN1 and EN2 are high, the controller always
operates in fixed-frequency PWM mode. Each pulse
from the oscillator sets the main PWM latch that turns
on the high-side switch until the PWM comparator
changes state.
When EN1 is high and EN2 is low, the controller oper-
ates in skip mode. The skip mode dramatically
improves light-load efficiency by reducing the effective
frequency, which reduces switching losses. It keeps
the peak inductor current at about 0.9A (typ) in an
active cycle, allowing subsequent cycles to be
skipped. Skip mode transitions seamlessly to fixed-
frequency PWM operation as load current increases.
Soft-Start
The step-down regulator includes a 7-bit soft-start DAC
that steps its internal reference voltage from 0 to 1.25V in
128 steps. The soft-start period is 3ms (typ) and FB1 fault
detection is disabled during this period. The soft-start fea-
ture effectively limits the inrush current during startup (see
the Step-Down Regulator Soft-Start (Heavy Load) wave-
forms in the Typical Operating Characteristics).
Current Limiting and Lossless Current Sensing
The current-limit circuit turns off the high-side MOSFET
switch whenever the voltage across the high-side
MOSFET exceeds an internal threshold. The actual
current limit is 3A (typ).
Step-Up Regulator
The step-up regulator employs a current-mode, fixed-
frequency PWM architecture to maximize loop band-
width and provide fast-transient response to pulsed
loads typical of TFT LCD panel source drivers. The inte-
grated MOSFET and the built-in digital soft-start func-
tion reduce the number of external components
required while controlling inrush currents. The output
For current-mode control, an internal lossless sense
network derives a current-sense signal from the induc-
tor DCR. The time constant of the current-sense net-
work is not required to match the time constant of the
inductor and has been chosen to provide sufficient cur-
rent ramp signal for stable operation at both operating
frequencies. The current-sense signal is AC-coupled
into the PWM comparator, eliminating most DC output-
voltage variation with load current.
voltage can be set from V
to 20V with an external
VIN
resistive voltage-divider. The regulator controls the out-
put voltage and the power delivered to the output by
modulating the duty cycle (D) of the internal power
MOSFET in each switching cycle. The duty cycle of the
MOSFET is approximated by:
V
− V
VIN
AVDD
V
Low-Frequency Operation
The step-down regulator of the MAX17014 enters into
low-frequency operating mode if the voltage on OUT is
below 0.8V. In the low-frequency mode, the switching
frequency of the step-down regulator is 1ꢀ6 the oscilla-
tor frequency. This feature prevents potentially uncon-
trolled inductor current if OUT is overloaded or shorted
to ground.
D ≈
AVDD
where V
is the output voltage of the step-up regulator.
AVDD
PWM Controller Block
An error amplifier compares the signal at FB1 to 1.25V
and changes the COMP output. The voltage at COMP
sets the peak inductor current. As the load varies, the
error amplifier sources or sinks current to the COMP
output accordingly to produce the inductor peak cur-
rent necessary to service the load. To maintain stability
at high duty cycles, a slope compensation signal is
summed with the current-sense signal.
Dual-Mode Feedback
The step-down regulator of the MAX17014 supports
both fixed and adjustable output voltages. Connect
FB2 to GND to enable the 3.3V fixed output voltage.
Connect a resistive voltage-divider between OUT and
______________________________________________________________________________________ 19
Low-Cost Multiple-Output
Power Supply for LCD TVs
On the rising edge of the internal clock, the controller
sets a flip-flop, turning on the n-channel MOSFET and
applying the input voltage across the inductor. The cur-
rent through the inductor ramps up linearly, storing
energy in its magnetic field. Once the sum of the current-
feedback signal and the slope compensation exceed the
COMP voltage, the controller resets the flip-flop and turns
off the MOSFET. Since the inductor current is continuous,
a transverse potential develops across the inductor that
turns on the diode (D1). The voltage across the inductor
then becomes the difference between the output voltage
and the input voltage. This discharge condition forces
the current through the inductor to ramp back down,
transferring the energy stored in the magnetic field to the
output capacitor and the load. The MOSFET remains off
for the rest of the clock cycle.
starts pulling down SUI with a 30/A internal current
source. The internal p-channel MOSFET turns on and
connects the cathode of the step-up regulator Schottky
catch diode to the step-up regulator load capacitors,
when V
falls below the turn-on threshold of the
SUI
MOSFET. When V
reaches (V
- 5V), the step-up
SUI
SWI
regulator and the positive charge pump are enabled
and initiate a soft-start routine.
Soft-Start
The step-up regulator achieves soft-start by linearly
ramping up its internal current limit. The soft-start termi-
nates when the output reaches regulation or the full
current limit has been reached. The current limit rises
from zero to the full current limit in approximately 3ms.
The soft-start feature effectively limits the inrush current
during startup (see the Step-Up Regulator Soft-Start
(Heavy Load) waveforms in the Typical Operating
Characteristics).
MAX7014
Step-Up Regulator Internal
p-Channel MOSFET Pass Switch
The MAX17014 includes an integrated 120mΩ high-
Positive Charge-Pump Regulator
The positive charge-pump regulator is typically used to
generate the positive supply rail for the TFT LCD gate
driver ICs. The output voltage is set with an external
resistive voltage-divider from its output to GND with the
midpoint connected to FBP. The number of charge-
pump stages and the setting of the feedback divider
determine the output voltage of the positive charge-
pump regulator. The charge pump includes a high-side
p-channel MOSFET (P1) and a low-side n-channel
MOSFET (N1) to control the power transfer as shown in
Figure 3.
voltage p-channel MOSFET to allow true shutdown of
the step-up converter output (AV ). This switch is typi-
DD
cally connected in series between the step-up regula-
tor’s Schottky catch diode and its output capacitors. In
addition to allowing step-up output to discharge com-
pletely when disabled, this switch also controls the
startup inrush current into the step-up regulator’s out-
put capacitors.
When EN2 is low, SUI is internally pulled up to SWI
through an internal 1kΩ resistor. Once EN2 is high and
the step-down regulator is in regulation, the MAX17014
INPUT
SUPPLY
SUP
MAX17014
C19
OSC
P1
C21
C22
ERROR
AMPLIFIER
REF
DRVP
1.25V
C20
D5
N1
OUTPUT
C23
GNDP
FBP
POSITIVE CHARGE-PUMP REGULATOR
Figure 3. Positive Charge-Pump Regulator Block Diagram
20 ______________________________________________________________________________________
Low-Cost Multiple-Output
Power Supply for LCD TVs
MAX7014
During the first half-cycle, N1 turns on and charges fly-
ing capacitors C20 and C21 (Figure 3). During the sec-
ond half cycle, N1 turns off and P1 turns on, level
resistive voltage-divider from its output to REF with the
midpoint connected to FBN. The number of charge-
pump stages and the setting of the feedback divider
determine the output of the negative charge-pump reg-
ulator. The charge-pump controller includes a high-side
p-channel MOSFET (P2) and a low-side n-channel
MOSFET (N2) to control the power transfer as shown in
Figure 4.
shifting C20 and C21 by V
volts. If the voltage
SUP
across C23 plus a diode drop (V
+ V ) is smaller
D
OUT
than the level-shifted flying capacitor voltage (V
+
C20
V
), charge flows from C20 to C23 until the diode
SUP
(D5) turns off. The amount of charge transferred to the
output is determined by the error amplifier that controls
N1’s on-resistance.
During the first half cycle, P2 turns on, and flying
capacitor C13 charges to V
minus a diode drop
SUP
The positive charge-pump regulator’s startup can be
delayed by connecting an external capacitor from
DEL2 to GND. An internal constant-current source
begins charging the DEL2 capacitor when EN2 is logic-
high, and the step-down regulator reaches regulation.
(Figure 4). During the second half cycle, P2 turns off,
and N2 turns on, level shifting C13. This connects C13
in parallel with reservoir capacitor C12. If the voltage
across C12 minus a diode drop is greater than the volt-
age across C13, charge flows from C12 to C13 until the
diode (D3) turns off. The amount of charge transferred
from the output is determined by the error amplifier,
which controls N2’s on-resistance.
When the DEL2 voltage exceeds V
, the positive
REF
charge-pump regulator is enabled. Each time it is
enabled, the positive charge-pump regulator goes
through a soft-start routine by ramping up its internal
reference voltage from 0 to 1.25V in 128 steps. The
soft-start period is 3ms (typ) and FBP fault detection is
disabled during this period. The soft-start feature effec-
tively limits the inrush current during startup.
The negative charge-pump regulator is enabled when
EN1 is logic-high and the step-down regulator reaches
regulation. Each time it is enabled, the negative
charge-pump regulator goes through a soft-start rou-
tine by ramping down its internal reference voltage
from 1.25V to 250mV in 102 steps. The soft-start period
is 3ms (typ) and FBN fault detection is disabled during
this period. The soft-start feature effectively limits the
inrush current during startup.
Negative Charge-Pump Regulator
The negative charge-pump regulator is typically used to
generate the negative supply rail for the TFT LCD gate
driver ICs. The output voltage is set with an external
INPUT
SUPPLY
IN
MAX17014
OSC
P2
ERROR
AMPLIFIER
C13
DRVN
REF
0.25V
D3
OUTPUT
REF
N2
C12
GND1
FBN
R1
NEGATIVE CHARGE-PUMP REGULATOR
R2
Figure 4. Negative Charge-Pump Regulator Block Diagram
______________________________________________________________________________________ 21
Low-Cost Multiple-Output
Power Supply for LCD TVs
GON and DRN. The switch control block is enabled when
exceeds V . Q1 and Q2 are controlled by CTL
and MODE. There are two different modes of operation
(see the Typical Operating Characteristics).
High-Voltage Switch Control
The MAX17014’s high-voltage switch control block
(Figure 5) consists of two high-voltage p-channel
MOSFETs: Q1, between SRC and GON and Q2, between
V
DLP
REF
REF
SWITCH CONTROL
8μA
MAX7014
DLP
FAULT
MAX17014
SHDN
Q4
SUI DONE
SRC
V
REF
Q1
GON
VL/2
6kΩ
9R
R
50μA
VL
Q2
Q5
R
DRN
THR
2R
MODE
R
1.25kΩ
Q3
CTL
Figure 5. Switch Control
22 ______________________________________________________________________________________
Low-Cost Multiple-Output
Power Supply for LCD TVs
MAX7014
Select the first mode by connecting MODE to VL. When
Operational Amplifiers
The MAX17014 has two operational amplifiers. The
operational amplifiers are typically used to drive the
LCD backplane (VCOM) or the gamma-correction
divider string. They feature 150mA output short-circuit
current, 100Vꢀ/s slew rate, and 20MHz, -3dB band-
width. While the op amp is a rail-to-rail input and output
design, its accuracy is significantly degraded for input
voltages within 2V of its supply rails (OVIN, OGND).
CTL is logic-high, Q1 turns on and Q2 turns off, con-
necting GON to SRC. When CTL is logic-low, Q1 turns
off and Q2 turns on, connecting GON to DRN. GON
can then be discharged through a resistor connected
between DRN and GND or AV . Q2 turns off and
DD
stops discharging GON when V
the voltage on THR.
reaches 10 times
GON
When V
is less than 0.8 x V , the switch control
VL
MODE
block works in the second mode. The rising edge of
Short-Circuit Current Limit and Input Clamp
The operational amplifiers limit short-circuit current to
approximately 150mA (-250mA) if the output is direct-
ly shorted to OVIN (OGND). If the short-circuit condition
persists, the junction temperature of the IC rises until it
reaches the thermal-shutdown threshold (+160°C typ).
Once the junction temperature reaches the thermal-
shutdown threshold, an internal thermal sensor immedi-
ately sets the thermal-fault latch, shutting off all the IC’s
outputs. The device remains inactive until the input volt-
age is cycled. The operational amplifiers have 4V input
clamp structures in series with a 500Ω resistance
(Figure 6).
V
CTL
turns on Q1 and turns off Q2, connecting GON to
SRC. An internal n-channel MOSFET, Q3, between
MODE and GND is also turned on to discharge an
external capacitor between MODE and GND. The
falling edge of V
turns off Q3, and an internal 50/A
CTL
current source starts charging the MODE capacitor.
Once V exceeds V , the switch control block
MODE
VLꢀ4
turns off Q1 and turns on Q2, connecting GON to DRN.
GON can then be discharged through a resisor con-
nected between DRN and GND or AV . Q2 turns off
DD
GON
and stops discharging GON when V
times the voltage on THR.
reaches 10
The switch control block is disabled and DLP is held
low when EN1 or EN2 is low or the IC is in a fault state.
MAX17014
OVIN
POS1
POS2
4V
4V
500Ω
500Ω
NEG1
OUT1
NEG2
OUT2
OGND
OP AMP INPUT CLAMP STRUCTURE
Figure 6. Op Amp Input Clamp Structure
______________________________________________________________________________________ 23
Low-Cost Multiple-Output
Power Supply for LCD TVs
Driving Pure Capacitive Load
Power-Up Sequence
The step-down regulator starts up when the MAX17014’s
internal reference voltage (REF) is above its undervolt-
age lockout (UVLO) threshold and EN1 is logic-high.
Once the step-down regulator reaches regulation, the
FB2 fault-detection circuit and the negative charge-
pump delay block are enabled. An 8/A current source
The operational amplifiers are typically used to drive
the LCD backplane (VCOM) or the gamma-correction
divider string. The LCD backplane consists of a distrib-
uted series capacitance and resistance, a load that can
be easily driven by the operational amplifier. However,
if the operational amplifier is used in an application with
a pure capacitive load, steps must be taken to ensure
stable operation. As the operational amplifier’s capaci-
tive load increases, the amplifier’s bandwidth decreas-
es and gain peaking increases. A 5Ω to 50Ω small
resistor placed between OUT_ and the capacitive load
reduces peaking, but also reduces the gain. An alter-
native method of reducing peaking is to place a series
RC network (snubber) in parallel with the capacitive
load. The RC network does not continuously load the
output or reduce the gain. Typical values of the resistor
are between 100Ω and 200Ω, and the typical value of
the capacitor is 10nF.
at DEL1 charges C
linearly. The negative charge-
DEL1
pump regulator soft-starts when V
reaches V
.
REF
DEL1
FBN fault detection is enabled once the negative
charge-pump soft-start is done.
MAX7014
The step-up regulator, p-channel MOSFET pass switch,
and positive charge-pump startup sequence begin
when the step-down regulator reaches regulation and
EN2 is logic-high. An 8/A current source at DEL2
charges C
linearly and the p-channel MOSFET
DEL2
pass switch is enabled when V
reaches V
. A
REF
DEL2
30/A current source pulls down on SUI, slowly turning
on the p-channel MOSFET switch between SWI and
SWO. The step-up regulator, positive charge pump,
and the delay block for the high-voltage switch starts
Linear Regulator (VL)
The MAX17014 includes an internal linear regulator. V
IN
when the SWI to SUI voltage difference (V
- V
)
SUI
SWI
is the input of the linear regulator. The input voltage
range is between 8V and 16.5V. The output voltage is set
to 5V. The regulator powers the internal MOSFET drivers,
PWM controllers, charge-pump regulators, and logic cir-
cuitry. The total external load capability is 25mA. Bypass
VL to GND with a minimum 1/F ceramic capacitor.
reaches the SUI-done threshold (5V, typ). An 8/A cur-
rent source charges C linearly and when V
DLP
DLP
reaches V
the high-voltage switch is enabled and
GON can be controlled by CTL.
REF,
The FB1 fault-detection circuit is enabled after the step-
up regulator reaches regulation, and similarly the FBP
fault-detection circuit is enabled after the positive charge
pump reaches regulation. For nondelayed startups,
capacitors can be omitted from DEL1, DEL2, and DLP.
When their current sources pull the floating pins above
their thresholds, the associated outputs start.
Reference Voltage (REF)
The reference output is nominally 1.25V, and can
source at least 50/A (see the Typical Operating
Characteristics). VL is the input of the internal reference
block. Bypass REF with a 0.22/F ceramic capacitor
connected between REF and GND.
Power-Down Control
The MAX17014 disables the step-up regulator, positive-
charge-pump regulator input switch control block,
delay block, and high-voltage switch control block
when EN2 is logic-low, or when the fault latch is set.
The step-down regulator and negative charge-pump
regulator are disabled only when EN1 is logic-low or
when the fault latch is set.
Frequency Selection (FSEL)
The step-down regulator and step-up regulator use the
same internal oscillator. The FSEL input selects the
switching frequency. Table 3 shows the switching fre-
quency based on the FSEL connection. High-frequency
(1.2MHz) operation optimizes the application for the
smallest component size, trading off efficiency due to
higher switching losses. Low-frequency (600kHz) oper-
ation offers the best overall efficiency at the expense of
component size and board space.
Table 3. Frequency Selection
FSEL
SWITCHING FREQUENCY (kHz)
V
1200
600
IN
GND
24 ______________________________________________________________________________________
Low-Cost Multiple-Output
Power Supply for LCD TVs
MAX7014
V
IN
EN1
VL/REF
DEL1
V
IN
UVLO
BUCK OUTPUT
REF
t
SS
TIME
NEGATIVE
CHARGE-PUMP
REGULATOR
OUTPUT
t
SS
EN2
DEL2
REF
POSITIVE
TIME
DEL2 STARTS CHARGING WHEN
EN2 IS HIGH AND THE BUCK
SOFT-START IS FINISHED.
CHARGE-PUMP
REGULATOR
OUTPUT
AVDD
SUI
SUI_DONE
TIME
t
SS
DLP
REF
TIME
TIME
V
GON
DEPENDS ON CTL
V
GON
FLOATING
V
GON
Figure 7. Power-Up Sequence
______________________________________________________________________________________ 25
Low-Cost Multiple-Output
Power Supply for LCD TVs
connected to VL or 0.6MHz when FSEL is connected to
Fault Protection
During steady-state operation, if any output of the four
regulators (step-down regulator, step-up regulator,
positive charge-pump regulator, and negative charge-
pump regulator) does not exceed its respective fault-
detection threshold, the MAX17014 activates an inter-
nal fault timer. If any condition or the combination of
conditions indicates a continuous fault for the fault timer
duration (50ms, typ), the MAX17014 triggers a non-
latching output undervoltage fault. After triggering, the
MAX17014 turns off for 160ms (typ) and then restarts
according to the EN1 and EN2 logic states. If, after
restarting, another 50ms fault timeout occurs, the
MAX17014 shuts down for 160ms again, and then
restarts. The restart sequence is repeated 3 times and
after the 50ms fault timeout, the MAX17014 shuts down
and latches off. Once the fault condition is removed,
toggle either EN1 or EN2, or cycle the input voltage to
clear the fault latch and restart the supplies.
GND. The exact inductor value is not critical and can
be adjusted to make trade-offs among size, cost, and
efficiency. Lower inductor values minimize size and
cost, but they also increase the output ripple and
reduce the efficiency due to higher peak currents. On
the other hand, higher inductor values increase effi-
ciency, but at some point resistive losses due to extra
turns of wire exceed the benefit gained from lower AC
current levels.
MAX7014
The inductor’s saturation current must exceed the peak
inductor current. The peak current can be calculated by:
V
× V
− V
× V
VIN
(
)
OUT
VIN OUT
I
=
OUT_RIPPLE
f
×L
SW
OUT
I
OUT_RIPPLE
2
I
=I
+
OUT_PEAK OUT(MAX)
The inductor’s DC resistance should be low for good
efficiency. Find a low-loss inductor having the lowest
possible DC resistance that fits in the allotted dimen-
sions. Ferrite cores are often the best choice. Shielded-
core geometries help keep noise, EMI, and switching
waveform jitter low.
Thermal-Overload Protection
The thermal-overload protection prevents excessive
power dissipation from overheating the MAX17014.
When the junction temperature exceeds T = +160°C, a
J
thermal sensor immediately activates the fault protec-
tion, which shuts down all the outputs except the refer-
ence and latches off, allowing the device to cool down.
Once the device cools down by at least approximately
15°C, cycle the input voltage to clear the fault latch and
restart the MAX17014.
Considering the typical operating circuit in Figure 1, the
maximum load current (I
) is 2A with a 3.3V
OUT(MAX)
output and a typical 12V input voltage. Choosing an
LIR of 0.4 at this operating point:
The thermal-overload protection protects the controller
in the event of fault conditions. For continuous opera-
tion, do not exceed the absolute maximum junction
3.3V × 12V − 3.3V
12V ×1.2MHz ×2A × 0.4
(
)
L
=
≈ 2.6μH
OUT
temperature rating of T = +150°C.
J
At that operating point, the ripple current and the peak
current are:
Design Procedure
Step-Down Regulator
Inductor Selection
Three key inductor parameters must be specified:
3.3V × 12V − 3.3V
1.2MHz ×2.6μH×12
(
)
≈ 0.77A
I
=
OUT_RIPPLE
0.77A
2
I
= 2A +
= 2.39A
OUT_PEAK
inductance value (L), peak current (I
), and DC
PEAK
resistance (R ). The following equation includes a
DC
Input Capacitors
constant, LIR, which is the ratio of peak-to-peak induc-
tor ripple current to DC load current. A higher LIR value
allows smaller inductance, but results in higher losses
and higher ripple. A good compromise between size
and losses is typically found at about 20% to 50% rip-
ple-current to load-current ratio (LIR):
The input filter capacitors reduce peak currents drawn
from the power source and reduce noise and voltage
ripple on the input caused by the regulator’s switching.
They are usually selected according to input ripple cur-
rent requirements and voltage rating, rather than
capacitance value. The input voltage and load current
V
× V − V
(
)
OUT
IN
OUT
determine the RMS input ripple current (I
):
RMS
L
=
OUT
V
× f ×I
×LIR
IN SW OUT(MAX)
V
× V
− V
(
)
OUT
VIN OUT
I
=I
×
where I
is the maximum DC load current, and
OUT(MAX)
the switching frequency f
RMS OUT
V
VIN
is 1.2MHz when FSEL is
SW
26 ______________________________________________________________________________________
Low-Cost Multiple-Output
Power Supply for LCD TVs
MAX7014
The worst case is I
= 0.5 x I
, which occurs at
response. Calculating the ideal transient response of
the inductor and capacitor, which assumes an ideal
response from the regulator, can ensure that these
components do not degrade the IC’s natural response.
RMS
OUT
V
= 2 x V
.
VIN
OUT
For most applications, ceramic capacitors are used
because of their high ripple current and surge current
capabilities. For optimal circuit long-term reliability,
choose an input capacitor that exhibits less than +10°C
temperature rise at the RMS input current corresponding
to the maximum load current.
The ideal undershoot and overshoot have two compo-
nents: the voltage steps caused by ESR, and the voltage
sag and soar due to the finite capacitance and the induc-
tor current slew rate. Use the following formulas to check
if the ESR is low enough and the output capacitance is
large enough to prevent excessive soar and sag.
Output Capacitor Selection
Since the MAX17014’s step-down regulator is internally
compensated, it is stable with any reasonable amount
of output capacitance. However, the actual capacitance
and equivalent series resistance (ESR) affect the regu-
lator’s output ripple voltage and transient response. The
rest of this section deals with how to determine the out-
put capacitance and ESR needs according to the
ripple-voltage and load-transient requirements.
The amplitude of the ESR step is a function of the load
step and the ESR of the output capacitor:
V
= ΔI
×R
OUT_ESR_STEP
OUT ESR_OUT
The amplitude of the capacitive sag is a function of the
load step, the output capacitor value, the inductor
value, the input-to-output voltage differential, and the
maximum duty cycle:
The output voltage ripple has two components: varia-
tions in the charge stored in the output capacitor, and
the voltage drop across the capacitor’s ESR caused by
the current into and out of the capacitor:
2
L
×(ΔI
)
OUT
OUT
V
=
OUT_SAG
2×C
× V
(
×D
− V
)
OUT
VIN(MIN)
MAX OUT
V
= V
+ V
The amplitude of the capacitive soar is a function of the
load step, the output capacitor value, the inductor
value, and the output voltage:
OUT_RIPPLE
OUT_RIPPLE(ESR) OUT_RIPPLE(C)
V
=I
×R
ESR_OUT
OUT_RIPPLE(ESR) OUT_RIPPLE
2
I
L
2×C
×(ΔI
)
OUT_RIPPLE
OUT
OUT
V
=
V
=
OUT_RIPPLE(C)
OUT_SOAR
8×C
× f
× V
OUT SW
OUT
OUT
where I
_
is defined in the Inductor Selection
OUT RIPPLE
of the Step-Down Regulator section, C
Keeping the full-load overshoot and undershoot less
than 3% ensures that the step-down regulator’s natural
integrator response dominates. Given the component
values in the circuit of Figure 1 and assuming a full 2A
step load transient, the voltage step due to capacitor
ESR is negligible. The voltage sag and soar are 44.3mV
and 71.6mV, or a little over 1% and 2%, respectively.
is the output
OUT
capacitance, and R
capacitor C
_
is the ESR of the output
ESR OUT
. In Figure 1’s circuit, the inductor ripple
OUT
current is 0.77A. If the voltage-ripple requirement of
Figure 1’s circuit is 1% of the 3.3V output, then the
total peak-to-peak ripple voltage should be less than
66mV. Assuming that the ESR ripple and the capacitive
ripple each should be less than 50% of the total peak-
to-peak ripple, then the ESR should be less than 43mΩ
and the output capacitance should be more than 2.43/F
to meet the total ripple requirement. A 22/F capacitor
with ESR (including PCB trace resistance) of 10mΩ is
selected for the standard application circuit in Figure 1,
which easily meets the voltage-ripple requirement.
Rectifier Diode
The MAX17014’s high switching frequency demands a
high-speed rectifier. Schottky diodes are recommended
for most applications because of their fast recovery time
and low forward voltage. In general, a 2A Schottky diode
works well in the MAX17014’s step-down regulator.
Step-Up Regulator
The step-down regulator’s output capacitor and ESR can
also affect the voltage undershoot and overshoot when
the load steps up and down abruptly. The step-down
regulator’s transient response is typically dominated by
its loop response and the time constant of its internal
integrator. However, excessive inductance or insufficient
output capacitance can degrade the natural transient
Inductor Selection
The inductance value, peak current rating, and series
resistance are factors to consider when selecting the
inductor. These factors influence the converter’s effi-
ciency, maximum output load capability, transient
response time, and output voltage ripple. Physical size
and cost are also important factors to be considered.
______________________________________________________________________________________ 27
Low-Cost Multiple-Output
Power Supply for LCD TVs
The maximum output current, input voltage, output volt-
age, and switching frequency determine the inductor
value. Very high inductance values minimize the cur-
rent ripple and therefore reduce the peak current,
which decreases core losses in the inductor and I2R
losses in the entire power path. However, large induc-
tor values also require more energy storage and more
turns of wire, which increase physical size and can
increase I2R losses in the inductor. Low inductance val-
ues decrease the physical size but increase the current
ripple and peak current. Finding the best inductor
involves choosing the best compromise among circuit
efficiency, inductor size, and cost.
Calculate the ripple current at that operating point and
the peak current required for the inductor:
V
× V
− V
(
)
VIN(MIN)
AVDD VIN(MIN)
I
=
AVDD_RIPPLE
L
× V
× f
AVDD
AVDD SW
I
AVDD_RIPPLE
2
I
=I
+
AVDD_PEAK VIN(DC,MAX)
MAX7014
The inductor’s saturation current rating and the
MAX17014’s LX1 current limit should exceed I
_
AVDD PEAK
and the inductor’s DC current rating should exceed
The equations used here include a constant, LIR, which
is the ratio of the inductor peak-to-peak ripple current to
the average DC inductor current at the full-load current.
The best trade-off between inductor size and circuit effi-
ciency for step-up regulators generally has an LIR
between 0.2 and 0.5. However, depending on the AC
characteristics of the inductor core material and ratio of
inductor resistance to other power path resistances, the
best LIR can shift up or down. If the inductor resistance
is relatively high, more ripple can be accepted to
reduce the number of turns required and increase the
wire diameter. If the inductor resistance is relatively low,
increasing inductance to lower the peak current can
decrease losses throughout the power path. If extremely
thin high-resistance inductors are used, as is common
for smaller LCD panel applications, the best LIR can
increase to between 0.5 and 1.0.
I
. For good efficiency, choose an inductor
VIN(DC,MAX)
with less than 0.05Ω series resistance.
Considering the typical operating circuit in Figure 1, the
maximum load current (I ) is 1.5A with a 16V
AVDD(MAX)
output and a typical 12V input voltage. Choosing an
LIR of 0.25 and estimating efficiency of 90% at this
operating point:
2
12V
16V
16V −12V
1.5A ×1.2MHz 0.25
0.90
⎛
⎞ ⎛
⎞⎛
⎟⎜
⎞
L
=
≈ 4.7μH
⎜
⎝
⎟ ⎜
⎠ ⎝
⎟
⎠
AVDD
⎠⎝
Using the circuit’s minimum input voltage (10.8V) and
estimating efficiency of 90% at that operating point:
1.5A ×16V
10.8V × 0.9
I
=
≈ 2.47A
VIN(DC,MAX)
Once a physical inductor is chosen, higher and lower
values of the inductor should be evaluated for efficiency
improvements in typical operating regions.
The ripple current and the peak current are:
10.8V × 16V −10.8V
4.7μH×16V ×1.2MHz
(
)
≈ 0.62A
I
=
RIPPLE
Calculate the approximate inductor value using the
typical input voltage (V ), the maximum output cur-
VIN
0.62A
2
I
= 2.47A +
≈ 2.78A
η
rent (I
), the expected efficiency (
) taken
TYP
PEAK
AVDD(MAX)
from an appropriate curve in the Typical Operating
Characteristics, and an estimate of LIR based on the
Output Capacitor Selection
above discussion:
2
The total output voltage ripple has two components: the
capacitive ripple caused by the charging and dis-
charging of the output capacitance, and the ohmic rip-
ple due to the capacitor’s ESR:
⎛
⎜
⎞
⎟
⎛
⎞
⎟
V
V
− V
η
TYP
LIR
⎛
⎞
VIN
AVDD
VIN
L
=
⎜
⎝
⎟
⎠
AVDD
⎜
V
I
× f
⎝
⎠
AVDD ⎝ AVDD(MAX) SW ⎠
Choose an available inductor value from an appropriate
inductor family. Calculate the maximum DC input cur-
V
= V
+ V
AVDD_RIPPLE
AVDD_RIPPLE(C) AVDD_RIPPLE(ESR)
rent at the minimum input voltage V
using con-
VIN(MIN)
⎛
⎞
I
V
− V
servation of energy and the expected efficiency at that
AVDD
AVDD VIN
V
≈
AVDD_RIPPLE(C)
⎜
⎟
η
operating point (
) taken from an appropriate curve
MIN
C
V
f
⎝
⎠
AVDD
AVDD SW
in the Typical Operating Characteristics:
and:
I
× V
AVDD(MAX)
AVDD
I
=
VIN(DC,MAX)
V
× η
VIN(MIN)
MIN
V
≈I
R
AVDD_RIPPLE(ESR) AVDD_PEAK ESR_AVDD
28 ______________________________________________________________________________________
Low-Cost Multiple-Output
Power Supply for LCD TVs
MAX7014
where I
_
is the peak inductor current (see the
AVDD PEAK
125 × V
× V
×I
× C
VIN
AVDD
AVDD
Inductor Selection section). For ceramic capacitors, the
output voltage ripple is typically dominated by
R
≈
COMP
L
AVDD AVDD(MAX)
V
_
. The voltage rating and temperature
AVDD RIPPLE(C)
V
× C
AVDD
AVDD
× R
COMP
characteristics of the output capacitor must also be
considered. Note that all ceramic capacitors typically
have large temperature coefficient and bias voltage
coefficients. The actual capacitor value in circuit is typi-
cally significantly less than the stated value.
C
≈
COMP
1250 ×I
AVDD(MAX)
To further optimize transient response, vary R
in
COMP
20% steps and C
in 50% steps while observing
COMP
transient response waveforms.
Input Capacitor Selection
The input capacitor reduces the current peaks drawn
from the input supply and reduces noise injection into
the IC. A 22/F ceramic capacitor is used in the typical
operating circuit (Figure 1) because of the high source
impedance seen in typical lab setups. Actual applica-
tions usually have much lower source impedance since
the step-up regulator often runs directly from the output
of another regulated supply. Typically, the input capaci-
tance can be reduced below the values used in the typi-
cal operating circuit.
Charge-Pump Regulators
Selecting the Number of Charge-Pump Stages
For highest efficiency, always choose the lowest number
of charge-pump stages that meet the output requirement.
The number of positive charge-pump stages is given by:
V
+ V
− V
GON
DROPOUT AVDD
n
=
POS
V
−2× V
D
SUP
where n
is the number of positive charge-pump
is the output of the positive charge-pump
is the supply voltage of the charge-
pump regulators, V is the forward voltage drop of the
POS
GON
regulator, V
stages, V
Rectifier Diode
The MAX17014’s high switching frequency demands a
high-speed rectifier. Schottky diodes are recommend-
ed for most applications because of their fast recovery
time and low forward voltage. In general, a 2A Schottky
diode complements the internal MOSFET well.
SUP
D
charge-pump diode, and V
is the dropout
= 300mV.
DROPOUT
margin for the regulator. Use V
DROPOUT
The number of negative charge-pump stages is given by:
−V + V
GOFF
DROPOUT
Output-Voltage Selection
The output voltage of the step-up regulator can be
adjusted by connecting a resistive voltage-divider from
n
=
NEG
V
−2× V
SUP
D
where n
is the number of negative charge-pump
NEG
stages and V
the output (V
) to GND with the center tap connect-
AVDD
is the output of the negative charge-
GOFF
pump regulator.
ed to FB1 (see Figure 1). Select R4 in the 10kΩ to 50kΩ
range. Calculate R3 with the following equation:
The above equations are derived based on the
assumption that the first stage of the positive charge
⎛
⎞
V
V
AVDD
R3 =R4×
−1
⎟
⎜
pump is connected to V
and the first stage of the
⎝
⎠
AVDD
FB1
negative charge pump is connected to ground.
Sometimes fractional stages are more desirable for bet-
ter efficiency. This can be done by connecting the first
where V
, the step-up regulator’s feedback set point,
FB1
is 1.25V. Place R4 and R3 close to the IC.
stage to V
or another available supply. If the first
charge-pump stage is powered from V
above equations become:
OUT
Loop Compensation
, then the
OUT
Choose R
(R5 in Figure 1) to set the high-frequen-
COMP
cy integrator gain for fast transient response. Choose
V
+ V
− V
C
(C17 in Figure 1) to set the integrator zero to
GON
DROPOUT OUT
COMP
n
=
POS
maintain loop stability.
V
−2× V
D
SUP
For low-ESR output capacitors, use the following equa-
tions to obtain stable performance and good transient
response:
−V
+ V
+ V
GOFF
DROPOUT OUT
−2× V
D
n
=
NEG
V
SUP
______________________________________________________________________________________ 29
Low-Cost Multiple-Output
Power Supply for LCD TVs
Flying Capacitors
PCB Layout and Grounding
Careful PCB layout is important for proper operation.
Use the following guidelines for good PCB layout:
Increasing the flying capacitors (connected to DRVN
and DRVP) value lowers the effective source impedance
and increases the output-current capability. Increasing
the capacitance indefinitely has a negligible effect on
output-current capability because the internal switch
resistance and the diode impedance place a lower limit
on the source impedance. A 0.1/F ceramic capacitor
works well in most low-current applications. The flying
capacitor’s voltage rating must exceed the following:
•
Minimize the area of respective high-current loops
by placing each DC-DC converter’s inductor,
diode, and output capacitors near its input capaci-
tors and its LX_ and GND_ pins. For the step-down
regulator, the high-current input loop goes from the
positive terminal of the input capacitor to the IC’s IN
pin, out of LX2, to the inductor, to the positive termi-
nals of the output capacitors, reconnecting the out-
put capacitor and input capacitor ground terminals.
The high-current output loop is from the inductor to
the positive terminals of the output capacitors, to
the negative terminals of the output capacitors, and
to the Schottky diode (D2). For the step-up regula-
tor, the high-current input loop goes from the posi-
tive terminal of the input capacitor to the inductor,
to the IC’s LX1 pin, out of GND1, and to the input
capacitor’s negative terminal. The high-current out-
put loop is from the positive terminal of the input
capacitor to the inductor, to the output diode (D1),
to the positive terminal of the output capacitors,
reconnecting between the output capacitor and
input capacitor ground terminals. Connect these
loop components with short, wide connections.
Avoid using vias in the high-current paths. If vias
are unavoidable, use many vias in parallel to
reduce resistance and inductance.
MAX7014
V
> n× V
CX
SUP
where n is the stage number in which the flying capaci-
tor appears.
Charge-Pump Output Capacitor
Increasing the output capacitance or decreasing the
ESR reduces the output ripple voltage and the peak-to-
peak transient voltage. With ceramic capacitors, the
output voltage ripple is dominated by the capacitance
value. Use the following equation to approximate the
required capacitor value:
I
LOAD_CP
C
≥
OUT_CP
2f
V
OSC RIPPLE_CP
where C
pump, I
_
is the output capacitor of the charge
OUT CP
_
is the load current of the charge
LOAD CP
pump, and V
output ripple.
is the peak-to-peak value of the
RIPPLE_CP
Create a power ground island for the step-down reg-
ulator, consisting of the input and output capacitor
grounds and the diode ground. Connect all these
together with short, wide traces or a small ground
plane. Similarly, create a power ground island
(GND1) for the step-up regulator, consisting of the
input and output capacitor grounds and the GND1
pin. Create a power ground island (CPGND) for the
positive and negative charge pumps, consisting of
Output Voltage Selection
Adjust the positive charge-pump regulator’s output volt-
age by connecting a resistive voltage-divider from the
SRC output to GND with the center tap connected to
FBP (Figure 1). Select the lower resistor of divider R17
in the 10kΩ to 30kΩ range. Calculate the upper resis-
tor, R16, with the following equation:
⎛
⎞
V
V
GON
R17 =R16×
−1
⎟
⎜
SUP and output (SRC, V
) capacitor grounds,
⎝
⎠
GOFF
FBP
and negative charge-pump diode ground. Connect
CPGND ground plane to GND1 ground plane
together with wide traces. Maximizing the width of
the power ground traces improves efficiency and
reduces output voltage ripple and noise spikes.
where V
= 1.25V (typ).
FBP
Adjust the negative charge-pump regulator’s output
voltage by connecting a resistive voltage-divider from
V
to REF with the center tap connected to FBN
GOFF
(Figure 1). Select R2 in the 20kΩ to 50kΩ range.
•
Create an analog ground plane (GND) consisting of
the GND pin, all the feedback divider ground con-
nections, the COMP and DEL capacitor ground
connections, and the device’s exposed backside
pad. Connect GND1 and GND islands by connect-
ing the two ground pins directly to the exposed
backside pad. Make no other connections between
the GND1 and GND ground planes.
Calculate R1 with the following equation:
V
V
− V
GOFF
FBN
R1=R2×
− V
REF
FBN
where V
= 250mV, V
= 1.25V. Note that REF can
FBN
REF
only source up to 50/A, using a resistor less than 20kΩ
for R1 results in higher bias current than REF can supply.
30 ______________________________________________________________________________________
Low-Cost Multiple-Output
Power Supply for LCD TVs
MAX7014
•
•
Place all feedback voltage-divider resistors as
close to their respective feedback pins as possible.
The divider’s center trace should be kept short.
Placing the resistors far away causes their FB
traces to become antennas that can pick up switch-
ing noise. Care should be taken to avoid running
any feedback trace near LX1, LX2, DRVP, or DRVN.
•
Minimize the length and maximize the width of the
traces between the output capacitors and the load
for best transient responses.
•
Minimize the size of the LX1 and LX2 nodes while
keeping them wide and short. Keep the LX1 and
LX2 nodes away from feedback nodes (FB1, FB2,
FBP, and FBN) and analog ground. Use DC traces
as a shield, if necessary.
Place V pin, VL pin, and REF pin bypass capaci-
IN
tors as close to the device as possible. The ground
connection of the VL bypass capacitor should be
connected directly to the GND pin with a wide trace.
Refer to the MAX17014 evaluation kit for an example of
proper board layout.
Simplified Operating Circuit
V
IN
IN2 IN2
BST
GND1 GND1
LX1 LX1
SWI
SWI
SUI
AV
DD
OUT
SWO
LX2
LX2
FB1
COMP
OUT
FB2
AV
DD
OVIN
V
IN
V
IN
OGND
POS1
POS2
VL
VL
FSEL
MODE
REF
REF
THR
MAX17014
NEG1
GND
OUT1
NEG2
OUT2
VCOM1
VCOM2
DEL1
CTL
GON CONTROL
DRN
DEL2
EN1
GON
SWI
GON
SUP
ON/OFF
ON/OFF
EN2
DLP
SRC
SRC
DRVP
GOFF
DRVN
FBN
AV
DD
CPGND
FBP
EP
REF
______________________________________________________________________________________ 31
Low-Cost Multiple-Output
Power Supply for LCD TVs
Pin Configuration
TOP VIEW
35 34 33 32 31 30 29 28 27
36
26
25
LX2
LX2
BST
LX1
LX1
SWI
24
23
22
37
38
39
MAX7014
21 FB2
20 OUT
19 N.C.
SUI 40
FB1 41
SWO
OVIN
42
43
MAX17014
18
DEL1
17 REF
16 FBN
NEG2 44
POS2 45
GND
14 DRVN
13
OUT2
OGND
NEG1
15
46
47
48
SUP
2
3
4
5
6
7
8
9
10
1
11
12
THIN QFN
(7mm x 7mm)
Chip Information
TRANSISTOR COUNT: 15,362
PROCESS: BiCMOS
32 ______________________________________________________________________________________
Low-Cost Multiple-Output
Power Supply for LCD TVs
MAX7014
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
E
DETAIL A
(NE-1) X
e
E/2
k
e
e
D/2
C
(ND-1) X
D
D2
L
D2/2
b
L
E2/2
C
L
k
E2
C
C
L
L
L
L
e
e
A
A1
A2
PACKAGE OUTLINE
32, 44, 48, 56L THIN QFN, 7x7x0.8mm
1
F
21-0144
2
______________________________________________________________________________________ 33
Low-Cost Multiple-Output
Power Supply for LCD TVs
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
MAX7014
PACKAGE OUTLINE
32, 44, 48, 56L THIN QFN, 7x7x0.8mm
2
F
21-0144
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 34
© 2007 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
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