MAX17575ATCT [MAXIM]
4.5Vâ60V, 1.5A, High-Efficiency Synchronous Step-Down DC-DC Converter with Internal Compensation;
| 型号： | MAX17575ATCT |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 4.5Vâ60V, 1.5A, High-Efficiency Synchronous Step-Down DC-DC Converter with Internal Compensation |
| 文件： | 总16页 (文件大小：1028K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensation
General Description
Benefits and Features
● Reduces External Components and Total Cost
The MAX17575 high-efficiency, high-voltage, synchronous
step-down DC-DC converter with integrated MOSFETs
operates over a 4.5V to 60V input. The converter can
deliver up to 1.5A and generates output voltages from
• No Schottky-Synchronous Operation
• Internal Compensation for Any Output Voltage
• All-Ceramic Capacitors, Compact Layout
0.9V up to 0.9 x V . The feedback (FB) voltage is accu-
IN
● Reduces Number of DC-DC Regulators to Stock
rate to within ±1.2% over -40°C to +125°C. Built-in com-
pensation across the output-voltage range eliminates the
need for external components. The MAX17575 features
peak-current-mode control architecture and operates
in fixed frequency forced PWM mode. The MAX17575
offers a low minimum on-time that allows high switching
frequencies and a smaller solution size.
• Wide 4.5V to 60V Input
• Adjustable 0.9V to 0.9 × V Output
• Continuous 1.5A Current Over Temperature
• 400kHz to 2.2MHz Adjustable Switching Frequency
with External Synchronization
IN
● Reduces Power Dissipation
• Peak Efficiency of 94%
The device is available in a 12-pin (3mm × 3mm) TDFN
package. Simulation models are available.
• Auxiliary Bootstrap LDO for Improved Efficiency
• 4.65µA Shutdown Current
● Operates Reliably in Adverse Industrial Environments
• Hiccup Mode Overload Protection
• Adjustable Soft-Start
Applications
● Industrial Control Power Supplies
● General-Purpose Point-of-Load
● Distributed Supply Regulation
● Base Station Power Supplies
● Wall Transformer Regulation
● High-Voltage, Single-Board Systems
• Built-In Output-Voltage Monitoring with RESET
• Programmable EN/UVLO Threshold
• Monotonic Startup into Prebiased Load
• Overtemperature Protection
• High Industrial -40°C to +125°C Ambient Operating
Temperature Range/-40°C to +150°C Junction
Temperature Range
Ordering Information appears at end of data sheet.
5V Output: Typical Application Circuit and Efficiency vs. Load Current
V
IN
V
EN/UVLO
BST
IN
C1
f
= 500kHz
V
SW
2.2µF
PGND
SGND
C4
0.1µF
L1
15µH
MAX17575
OUT
5V, 1.5A
LX
FB
R1
RT/SYNC
SS
FB
75kΩ
C5
22µF
FB
RESET
EXTVCC
R3
4.7Ω
C3
5.6nF
R2
16.2kΩ
V
CC
EP
C2
2.2µF
C6
0.1µF
19-8785; Rev 3; 12/19
MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Absolute Maximum Ratings (Note 1)
V
to PGND .........................................................-0.3V to +65V
V
to GND .........................................................-0.3V to +6.5V
IN
CC
EN/UVLO to GND.........................................-0.3V to V + 0.3V
LX Total RMS Current ........................................................±1.6A
IN
EXTV
to GND ...................................................-0.3V to +26V
Continuous Power Dissipation (T = +70°C)
CC
A
BST to PGND........................................................-0.3V to +70V
(Derate 24.4mW/°C above +70°C) (Multilayer board)..1951mW
Output Short-Circuit Duration....................................Continuous
Junction Temperature......................................................+150°C
Storage Temperature Range............................ -65°C to +160°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow).......................................+260°C
LX to PGND................................................-0.3V to (V + 0.3V)
IN
BST to LX.............................................................-0.3V to +6.5V
BST to V
...........................................................-0.3V to +65V
CC
RESET, SS, RT/SYNC to GND............................-0.3V to +6.5V
PGND to GND......................................................-0.3V to +0.3V
FB to GND............................................................-0.3V to +1.5V
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Note 1: Junction temperature greater than +125°C degrades operating lifetimes.
Package Information
PACKAGE TYPE: 12 TDFN
Package Code
TD1233+1C
21-0664
Outline Number
Land Pattern Number
90-0397
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θ
)
41°C/W
8.5°C/W
JA
Junction to Case (θ
)
JC
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
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MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Electrical Characteristics
(V = V
= 24V, R
= 40.2k, C
= 2.2µF, V
= V
= EXTVCC = 0, LX = SS = RESET = OPEN, V
to V
IN
EN/UVLO
RT/SYNC
VCC
PGND
GND
BST LX
= 5V, V = 1V, T = -40°C to 125°C, unless otherwise noted. Typical values are at T = +25°C. All voltages are referenced to GND,
FB
A
A
unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
INPUT SUPPLY (V
)
IN
Input Voltage Range
V
4.5
60
V
IN
Input Shutdown Current
Input Quiescent Current
ENABLE/UVLO (EN)
I
V
= 0V (shutdown mode)
4.65
5.2
7.25
µA
IN-SH
EN/UVLO
Normal switching mode, f
V
= 500kHz,
SW
I
mA
Q_PWM
= 0.8V, EXTVCC = GND
FB
V
V
V
rising
falling
1.19
1.215
1.09
1.26
ENR
EN/UVLO
EN/UVLO
EN/UVLO Threshold
V
V
1.068
1.131
ENF
EN/UVLO Input Leakage
Current
I
V
= 1.25V, T = 25°C
-50
+50
nA
ENLKG
EN/UVLO
A
V
LDO
CC
1mA ≤ I
≤ 15mA
4.75
4.75
25
5
5
5.25
5.25
100
VCC
V
Output-Voltage Range
V
V
CC
CC
6V ≤ V ≤ 60V; I
= 1mA
IN
VCC
V
V
Current Limit
Dropout
I
V
V
= 4.3V, V = 6.5V
54
mA
V
CC
CC
VCC-MAX
CC
IN
V
= 4.5V , I = 15mA
VCC
4.15
4.05
3.65
CC-DO
IN
V
Rising
Falling
4.2
3.8
4.3
3.9
CC-UVR
V
UVLO
V
CC
V
CC-UVF
EXT LDO
EXTVCC rising
EXTVCC falling
4.56
4.3
4.7
4.84
4.6
EXTVCC Switchover Voltage
V
4.45
EXTVCC Dropout
EXTVCC
EXTVCC = 4.75V , I
= 15mA
0.3
V
DO
EXTVCC
EXTVCC Current Limit
EXTVCC
V
= 4.5V, EXTVCC = 7V
CC
26.5
60
100
mA
ILIM
HIGH-SIDE MOSFET AND LOW-SIDE MOSFET DRIVER
High-Side nMOS On-Resistance
Low-Side nMOS On-Resistance
R
I
I
= 0.3A
= 0.3A
330
170
620
320
mΩ
mΩ
DS-ONH
LX
LX
R
DS-ONL
LX Leakage Current
(LX to PGND_)
V
25°C
= V -1V; V = V
+1V; T =
LX
IN
LX
PGND A
ILX
-2
+2
µA
LKG
SOFT-START
Soft-Start Current
FEEDBACK (FB)
FB Regulation Voltage
FB Input Bias Current
I
V
= 0.5 V
SS
4.7
5
5.3
µA
SS
V
0.889
-50
0.9
0.911
+50
V
FB_REG
I
0 ≤ V
≤ 1V, T = 25°C
nA
FB
FB
A
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MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Electrical Characteristics (continued)
(V = V
= 24V, R
= 40.2k, C
= 2.2µF, V
= V
= EXTVCC = 0, LX = SS = RESET = OPEN, V
to V
IN
EN/UVLO
RT/SYNC
VCC
PGND
GND
BST LX
= 5V, V = 1V, T = -40°C to 125°C, unless otherwise noted. Typical values are at T = +25°C. All voltages are referenced to GND,
FB
A
A
unless otherwise noted.) (Note 2)
PARAMETER
CURRENT LIMIT
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Peak Current-Limit Threshold
I
2.1
2.3
2.45
2.75
1
2.8
3.1
A
A
A
PEAK-LIMIT
Runaway Current-Limit
Threshold
I
RUNAWAY-
LIMIT
Negative Current-Limit Threshold
RT/SYNC AND TIMINGS
R
R
R
R
= OPEN
430
370
490
400
550
430
RT/SYNC
RT/SYNC
RT/SYNC
RT/SYNC
= 51.1kΩ
= 40.2kΩ
= 8.06kΩ
Switching Frequency
f
kHz
V
SW
475
500
525
1950
2200
2450
V
Undervoltage Trip Level to
FB
V
0.56
0.58
0.65
FB-HICF
Cause HICCUP
HICCUP Timeout
Minimum On-Time
Minimum Off-Time
LX Dead Time
32768
60
Cycles
ns
t
80
ON_MIN
t
140
150
5
160
ns
OFF_MIN
ns
SYNC Frequency Capture
Range
1.1 x
1.4 x
f
SW
f
I
set by R
RT/SYNC
SW
f
SW
50
SYNC Pulse Width
ns
V
V
2.1
IH
SYNC Threshold
V
0.8
IL
RESET
RESET Output Level Low
= 10mA
400
mV
nA
RESET
RESET Output Leakage Current
T
= T = 25°C, V
= 5.5V
-100
90.5
+100
A
J
RESET
V
Threshold for RESET
OUT
V
V
V
falling
92
95
94.6
97.8
%
%
OUT-OKF
FB
FB
Assertion
V
Threshold for RESET
OUT
V
rising
93.8
OUT-OKR
Deassertion
RESET Delay After FB Reaches
95% Regulation
1024
Cycles
THERMAL SHUTDOWN
Thermal-Shutdown Threshold
Thermal-Shutdown Hysteresis
T
Temp rising
165
10
°C
°C
SHDNR
T
SHDNHY
Note 2: All limits are 100% tested at T = +25°C. Limits over the operating temperature range and relevant supply voltage range
A
are guaranteed by design and characterization
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MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Typical Operating Characteristics
(V = V
= 24V, V
= V
= 0V, C
= 2.2μF, unless otherwise noted. Typical values are at T = +25°C. All voltages
IN
EN/UVLO
GND
PGND
VCC
A
are referenced to GND.)
5V OUTPUT
3.3V OUTPUT
EFFICIENCY vs. LOAD CURRENT
FIGURE 4 CIRCUIT
EFFICIENCY vs. LOAD CURRENT
FIGURE 5 CIRCUIT
toc01
toc02
100
90
80
70
60
50
40
30
100
90
80
VIN = 48V
70
VIN = 36V
VIN = 36V
VIN = 24V
VIN = 48V
60
50
40
30
20
VIN = 24V
VIN = 12V
VIN = 12V
0
500
1000
1500
0
500
1000
1500
LOAD CURRENT (mA)
LOAD CURRENT (mA)
3.3V OUTPUT
LOAD AND LINE REGULATION
5V OUTPUT
LOAD AND LINE REGULATION
FIGURE 4 CIRCUIT
FIGURE 5 CIRCUIT
toc04
toc03
3.40
3.36
3.32
3.28
3.24
3.20
5.10
5.08
5.07
5.05
5.03
5.02
5.00
VIN = 24V
VIN = 48V
VIN = 48V
VIN = 24V
VIN = 12V
VIN = 36V
VIN = 36V
VIN = 12V
0
500
1000
1500
0
500
1000
1500
LOAD CURRENT (mA)
LOAD CURRENT (mA)
SOFT-START/SHUTDOWN THROUGH EN/UVLO,
5V OUTPUT, 3.3Ω RESISTIVE LOAD,
SOFT-START/SHUTDOWN THROUGH EN/UVLO,
3.3V OUTPUT, 2.2Ω RESISTIVE LOAD,
FIGURE 4 CIRCUIT
FIGURE 5 CIRCUIT
toc06
toc05
VEN/UVLO
VEN/UVLO
5V/div
5V/div
2V/div
VOUT
VOUT
IOUT
2V/div
0.5A/div
5V/div
IOUT
0.5A/div
5V/div
VRESET
VRESET
1ms/div
CONDITION: RESET IS PULLED UP TO VCC WITH A 10kΩ RESISTOR
1ms/div
CONDITION: RESET IS PULLED UP TO VCC WITH A 10kΩ RESISTOR
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MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Typical Operating Characteristics (continued)
(V = V
= 24V, V
= V
= 0V, C
= 2.2μF, unless otherwise noted. Typical values are at T = +25°C. All voltages
IN
EN/UVLO
GND
PGND
VCC
A
are referenced to GND.)
SOFT-START WITH 2.5V PREBIAS,
5V OUTPUT
SOFT-START WITH 1.5V PREBIAS,
3.3V OUTPUT
FIGURE 4 CIRCUIT
FIGURE 5 CIRCUIT
toc07
toc08
5V/div
1V/div
5V/div
VEN/UVLO
VEN/UVLO
1V/div
VOUT
5V/div
VOUT
5V/div
VRESET
VRESET
1ms/div
1ms/div
CONDITION: RESET IS PULLED UP TO VCC WITH A 10kΩ RESISTOR
CONDITION: RESET IS PULLED UP TO VCC WITH A 10kΩ RESISTOR
STEADY-STATE SWITCHING WAVEFORMS,
5V OUTPUT, 1.5A LOAD CURRENT,
STEADY-STATE SWITCHING WAVEFORMS,
5V OUTPUT, NO LOAD CURRENT,
FIGURE 4 CIRCUIT
toc09
FIGURE 4 CIRCUIT
toc10
VOUT
(AC)
50mV/div
VOUT
(AC)
50mV/div
10V/div
2A/div
VLX
10V/div
VLX
ILX
500mA/div
ILX
2µs/div
2µs/div
3.3V OUTPUT
(LOAD CURRENT STEPPED FROM 0.75A TO 1.5A)
5V OUTPUT
(LOAD CURRENT STEPPED FROM 0.75A TO 1.5A)
FIGURE 5 CIRCUIT
FIGURE 4 CIRCUIT
toc11
toc12
VOUT
AC
VOUT
AC
100mV/div
50mV/div
1A/div
1A/div
ILOAD
ILOAD
100μs/div
100μs/div
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MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Typical Operating Characteristics (continued)
(V = V
= 24V, V
= V
= 0V, C
= 2.2μF, unless otherwise noted. Typical values are at T = +25°C. All voltages
IN
EN/UVLO
GND
PGND
VCC
A
are referenced to GND.)
3.3V OUTPUT
5V OUTPUT
OVERLOAD PROTECTION
(LOAD CURRENT STEPPED FROM NO LOAD TO 0.75A)
(LOAD CURRENT STEPPED FROM NO LOAD TO 0.75A)
toc13
5V OUTPUT
,
FIGURE 4 CIRCUIT toc15
FIGURE 5 CIRCUIT
FIGURE 4 CIRCUIT
toc14
VOUT
AC
VOUT
AC
VOUT
100mV/div
200mV/div
50mV/div
ILX
ILOAD
1A/div
500mA/div
ILOAD
500mA/div
20ms/div
100μs/div
100μs/div
BODE PLOT, 3.3V OUTPUT,
2.2Ω RESISTIVE LOAD, FIGURE 5 CIRCUIT
BODE PLOT, 5V OUTPUT,
3.3Ω RESISTIVE LOAD, FIGURE 4 CIRCUIT
EXTERNAL CLOCK SYNCHRONIZATION
FIGURE 4 CIRCUIT
toc18140
toc17 120
100
toc16
40
30
20
50
120
100
40
30
20
10
0
VRT/SYNC
VOUT(AC)
5V/div
PHASE
80
60
80
60
PHASE
50mV/div
10
0
GAIN
GAIN
40
20
0
40
20
VLX
20V/div
1A/div
-10
GAIN CROSSOVER
FREQUENCY = 52.6kHz,
PHASE MARGIN = 61.73°
GAIN CROSSOVER
-20
-30
FREQUENCY = 50kHz,
IOUT
-10
-20
PHASE MARGIN = 64.46°
0
-20
-20
103
105
10µs/div
104
103
104
105
CONDITIONS: 5V OUTPUT, 1.5A LOAD CURRENT,
fSW = 500kHz, EXTERNAL CLOCK FREQUENCY = 700kHz
FREQUENCY (Hz)
FREQUENCY (Hz)
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MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Pin Configuration
TOP VIEW
1
2
3
4
5
6
12
11
10
9
PGND
LX
V
IN
EN/UVLO
RESET
SS
BST
MAX17575
EXTVCC
GND
FB
8
V
CC
EP
7
RT/SYNC
TDFN-EP
3mm x 3mm
Pin Description
PIN
NAME
FUNCTION
1
V
Power Supply Input. The input supply range is from 4.5V to 60V.
IN
Enable/Undervoltage Lockout Input. Drive EN/UVLO high to enable the output voltage. Connect to the
2
3
EN/UVLO
centre of the resistive divider between V and GND to set the input voltage (undervoltage threshold)
at which the device turns on. Pull up to V for always-on.
IN
IN
Open-Drain RESET Output. The RESET output is driven low if FB drops below 92% of its set value.
RESET goes high 1024 clock cycles after FB rises above 95% of its set value. RESET is valid when
RESET
the device is enabled and V is above 4.5V.
IN
4
5
SS
Soft-Start Input. Connect a capacitor from SS to GND to set the soft-start time.
5V LDO Output. Bypass V
with 2.2μF/10V/X7R/0603(MURATA GRM188R71A225KE15) or
CC
V
CC
4.7μF/10V/X7R/0805(TDK C2012X7R1A475K085AC) ceramic capacitor to GND.
Oscillator Timing Resistor Input. Connect a resistor from RT/SYNC to GND to program the switching
frequency from 400kHz to 2.2MHz. An external pulse can be applied to RT/SYNC through a coupling
capacitor to synchronize the internal clock to the external pulse frequency. See the Switching
Frequency Selection and External Frequency Synchronization section for details.
6
RT/SYNC
7
8
FB
Feedback Input. Connect FB to the center of the resistive divider between output voltage and GND.
Analog Ground.
GND
External Power-Supply Input for the Internal LDO. Applying a voltage between 4.84V and 24V at the
EXTVCC pin bypasses the internal LDO and improve efficiency.
9
EXTVCC
BST
10
11
Boost Strap Capacitor Node. Connect a 0.1μF ceramic capacitor between BST and LX.
Switching Node. Connect LX to the switching side of the inductor. LX is high impedance when the
device is in shutdown mode.
LX
Power Ground. Connect PGND externally to the power ground plane. Connect GND and PGND pins
12
PGND
EP
together at the ground return path of the V
bypass capacitor.
CC
Exposed Pad. Always connect EP to the GND pin of the IC. Also, connect EP to a large GND plane
with several thermal vias for best thermal performance. Refer to the MAX17575 EV kit data sheet for
an example of the correct method for EP connection and thermal vias.
—
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MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Functional (or Block) Diagram
V
V
IN
MAX17575
EXTVCC
INTERNAL LDO
REGULATOR
CC
POK
BST
V
CC_INT
EN/UVLO
PEAK-LIMIT
CHIPEN
CURRENT
SENSE
AMPLIFIER
CS
CURRENT
SENSE LOGIC
1.215V
HIGH-SIDE
DRIVER
THERMAL
DH
DL
SHUTDOWN
LX
PFM/PWM
CONTROL LOGIC
LOW-SIDE
DRIVER
CLK
RT/SYNC
OSCILLATOR
PGND
SLOPE
CS
FB
SS
SINK LIMIT
ZX/ILIMIN
COMP
PWM
ERROR
AMPLIFIER
NEGATIVE
CURRENT
REF
RESET
EXTERNAL
SOFT START
CONTROL
V
OUT-OKR
RESET
LOGIC
FB
CLK
GND
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MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Switching Frequency Selection and External
Frequency Synchronization
The switching frequency of the MAX17575 can be
programmed from 400kHz to 2.2MHz by using a resistor con-
nected from the RT/SYNC pin to GND. When no resistor is
used, the frequency is programmed to 490kHz. The switching
Detailed Description
The MAX17575 high-efficiency, high-voltage, synchronous
step-down DC-DC converter with integrated MOSFETs
operates over a 4.5V to 60V input. The converter can
deliver up to 1.5A and generates output voltages from
0.9V up to 0.9 x V . The feedback (FB) voltage is accurate
IN
frequency (f ) is related to the resistor connected at the RT/
SW
to within ±1.2% over -40°C to +125°C.
SYNC pin (R ) by the following equation:
RT/SYNC
The device features a peak-current-mode control architec-
ture and operates in fixed frequency forced PWM mode.
An internal transconductance error amplifier produces an
integrated error voltage at an internal node that sets the duty
cycle using a PWM comparator, a high-side current-sense
amplifier, and a slope-compensation generator. At each ris-
ing edge of the clock, the high-side MOSFET turns on and
remains on until either the appropriate or maximum duty
cycle is reached, or the peak current limit is detected. During
the high-side MOSFET’s on-time, the inductor current ramps
up. During the second-half of the switching cycle, the high-
side MOSFET turns off and the low-side MOSFET turns on.
The inductor releases the stored energy as its current ramps
down and provides current to the output.
3
21×10
R
=
−1.7
RT/SYNC
f
SW
where R
is in kΩ and f
is in kHz. See Table 1
RT/SYNC
SW
for RT/SYNC resistor values for a few common switching
frequencies.
The RT/SYNC pin can be used to synchronize the device’s
internal oscillator to an external system clock. A resistor must
be connected from the RT/SYNC pin to GND to be able to
synchronize the MAX17575 to an external clock. The exter-
nal clock should be coupled to the RT/SYNC pin through a
network, as shown in Figure 1. When an external clock is
applied to RT/SYNC pin, the internal oscillator frequency
changes to external clock frequency (from original frequency
based on RT/SYNC setting) after detecting 16 external clock
edges. The external clock logic-high level should be higher
than 2.1V, logic-low level lower than 0.8V and the pulse
width of the external clock should be more than 50ns. The
RT/SYNC resistor should be selected to set the switching
frequency at 10% lower than the external clock frequency.
The device features a RT/SYNC pin to program the
switching frequency and to synchronize to an external
clock. The device also features adjustable-input, under-
voltage-lockout, adjustable soft-start, open-drain RESET,
and auxiliary bootstrap LDO.
Linear Regulator (V
)
CC
The device has two internal (low-dropout) regulators
(LDOs) which powers V . One LDO is powered from
CC
Table 1. Switching Frequency vs.
RT/SYNC Resistor
V
and the other LDO is powered from EXTVCC
IN
(EXTVCC LDO). Only one of the two LDOs is in operation
at a time, depending on the voltage levels present at
EXTVCC. If EXTVCC voltage is greater than 4.7V (typ),
RT/SYNC RESISTOR
SWITCHING FREQUENCY (kHz)
(kΩ)
400
500
51.1
OPEN
19.1
V
CC
is powered from EXTVCC. If EXTVCC is lower than
4.7V (typ), V
is powered from V . Powering V
from
CC
IN
CC
1000
2200
EXTVCC increases efficiency at higher input voltages.
EXTVCC voltage should not exceed 24V.
8.06
Typical V
output voltage is 5V. Bypass V
to
CC
CC
GND
GRM188R71A225KE15) or 4.7μF/10V/X7R/0805(TDK
C2012X7R1A475K085AC) ceramic capacitor. V powers
with
either
2.2μF/10V/X7R/0603(MURATA
MAX17575
CC
C1
C8
the internal blocks and the low-side MOSFET driver and
recharges the external bootstrap capacitor. Both LDO can
source up to 60mA (typ). The MAX17575 employs an under-
voltage-lockout circuit that forces the converter off when
RT/SYNC
47pF
100pF
R7
R8
1K
40.2K
CLOCK
SOURCE
V
CC
falls below 3.8V (typ). The converter is enabled again
when V is higher than 4.2V. The 400mV UVLO hysteresis
CC
VLOGIC -HIGH
prevents chattering on power-up/power-down.
VLOGIC -LOW
In applications where the buck converter output is connected
to the EXTVCC pin, if the output is shorted to ground, then
transfer from EXTVCC LDO to the internal LDO happens
seamlessly without any impact on the normal functionality.
DUTY
Figure 1. External Clock Synchronization
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MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Operating Input-Voltage Range
The minimum and maximum operating input voltages for
a given output voltage should be calculated as follows:
RESET Output
The device includes a RESET comparator to monitor the
status of the output voltage. The open-drain RESET out-
put requires an external pullup resistor. RESET goes high
(high impedance) 1024 switching cycles after the regula-
V
+ I
× R
+R
DCR(MAX) DS_ONL(MAX)
(
)
)
(
OUT OUT(MAX)
V
=
tor output increases above 95% of the designed nominal
regulated voltage. RESET goes low when the regulator
output voltage drops to below 92% of the set nominal
output voltage. RESET also goes low during thermal
IN(MIN)
1− f
× t
(
)
SW(MAX)
OFF_MIN(MAX)
+ I
(
× R
− R
(
)
)
OUT(MAX)
V
DS_ONH(MAX)
DS_ONL(MAX)
V
OUT
shutdown or when the EN/UVLO pin goes below V
.
=
ENF
IN(MAX)
f
× t
ON_MIN(MAX)
SW(MAX)
Prebiased Output
where:
When the device starts into a prebiased output, both the
high-side and low-side switches are turned off so that the
converter does not sink current from the output. High-
side and low-side switches do not start switching until the
PWM comparator commands the first PWM pulse. The
output voltage is then smoothly ramped up to the target
value in alignment with the internal reference.
V
OUT
= Steady-state output voltage
I
= Maximum load current
OUT(MAX)
R
= Worst-case DC resistance of the inductor
DCR(MAX)
f
t
= Maximum switching frequency
SW(MAX)
= Worst-case minimum switch off-time (160ns)
= Worst-case minimum switch on-time (80ns)
OFF_MIN(MAX)
t
ON_MIN(MAX)
Thermal Shutdown Protection
R
= Worst-case on-state resistances and
DS_ONH(MAX)
Thermal shutdown protection limits total power dissipation in
the device. When the junction temperature of the device
exceeds +165°C, an on-chip thermal sensor shuts down
the device, allowing the device to cool. The device turns
on with soft-start after the junction temperature reduces
by 10°C. Carefully evaluate the total power dissipation
(see the Power Dissipation section) to avoid unwanted
triggering of the thermal shutdown protection in normal
operation.
high-side internal MOSFET,
R
= Worst-case on-state resistances and
DS_ONL(MAX)
low-side external MOSFET
Overcurrent Protection
The device is provided with a robust overcurrent protec-
tion scheme that protects the device under overload and
output short-circuit conditions. A cycle-by-cycle peak cur-
rent limit turns off the high-side MOSFET whenever the
high-side switch current exceeds an internal limit of 2.45A
(typ). A runaway current limit on the high-side switch cur-
rent at 2.75A (typ) protects the device under high input
voltage, short-circuit conditions when there is insufficient
output voltage available to restore the inductor current that
was built up during the on period of the step-down con-
verter. One occurrence of runaway current limit triggers
a hiccup mode. In addition, due to any fault, if the feed-
back voltage drops below 0.58V any time after soft-start
is completed, then hiccup mode is activated. In hiccup
mode, the converter is protected by suspending switching
for a hiccup timeout period of 32,768 clock cycles of half
the switching frequency. Once the hiccup timeout period
expires, soft-start is attempted again. Note that when soft-
start is attempted under overload conditions, if feedback
voltage does not exceed 0.58V, the device continues to
switch at half the programmed switching frequency for
the time duration of the programmed soft-start time and
1024 clock cycles. Hiccup mode of operation ensures low
power dissipation under output short-circuit conditions.
Applications Information
Input Capacitor Selection
The input filter capacitor reduces peak currents drawn
from the power source and reduces noise and voltage
ripple on the input caused by the circuit’s switching. The
input capacitor RMS current (I
following equation:
) is defined by the
RMS
V
×(V − V
)
OUT
OUT
IN
I
= I
×
OUT(MAX)
RMS
V
IN
where, I
is the maximum load current.
OUT(MAX)
I
has a maximum value when the input voltage
RMS
equals twice the output voltage (V = 2 x V
), so
IN
OUT
I
= I /2.
OUT(MAX)
RMS(MAX)
Choose an input capacitor that exhibits less than +10°C
temperature rise at the RMS input current for optimal
long-term reliability. Use low-ESR ceramic capacitors with
high-ripple-current capability at the input. X7R capacitors
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MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
are recommended in industrial applications for their tem-
perature stability. Calculate the input capacitance using
the following equation:
pin to GND programs the soft-start time. The selected output
capacitance (C ) and the output voltage (V ) deter-
SEL OUT
mine the minimum required soft-start capacitor as follows:
I
×D ×(1− D)
−6
OUT(MAX)
C
≥ 56×10 × C
× V
SEL OUT
SS
C
=
IN
η× f
× ∆V
IN
SW
where:
D = V
The soft-start time (t ) is related to the capacitor connected
SS
/V and is the duty ratio of the converter,
at SS (C ) by the following equation:
OUT IN
SS
C
f
= Switching frequency,
SW
SS
t
=
SS
−6
∆V =Allowable input voltage ripple, and η is the efficiency.
5.55×10
IN
For example, to program a 2ms soft-start time, a 12nF
capacitor should be connected from the SS pin to GND.
Note that during start-up, the device operates at half the
programmed switching frequency until the output voltage
reaches 66.7% of the set output nominal voltage.
In applications where the source is located distant from
the device input, an electrolytic capacitor should be added
in parallel to the ceramic capacitor to provide necessary
damping for potential oscillations caused by the inductance
of the longer input power path and input ceramic capacitor.
Inductor Selection
Three key inductor parameters must be specified for
operation with the device: inductance value (L), inductor
Adjusting Output Voltage
Set the output voltage with a resistive voltage-divider con-
nected from the positive terminal of the output capacitor
saturation current (I
) and DC resistance (R
). The
DCR
SAT
(V
) to GND (see Figure 2). Connect the center node
OUT
switching frequency and output voltage determine the
inductor value as follows:
of the divider to the FB pin. Use the following procedure
to choose the resistive voltage-divider values:
2× V
OUT
Calculate resistor R4 from the output to the FB pin as follows:
L =
f
SW
1850
R4 =
Where V
and f
are nominal values and f
Hz. Select an inductor whose value is nearest to the value
is in
SW
OUT
SW
C
OUT_SEL
calculated by the previous formula.
Where C
(in µF) is the actual derated value of
OUT_SEL
the output capacitance used and R4 is in kΩ. The minimum
allowable value of R4 is (5.6 x V ), where R4 is in kΩ.
Select a low-loss inductor closest to the calculated value
with acceptable dimensions and having the lowest possible
OUT
If the value of R4 calculated using the above equation
DC resistance. The saturation current rating (I
) of the
SAT
is less than (5.6 x V
), increase the value of R4 to at
OUT
inductor must be high enough to ensure that saturation
can occur only above the peak current-limit value.
least (5.6 x V ).
OUT
R4× 0.9
Output Capacitor Selection
R5 =
(V
− 0.9)
X7R ceramic output capacitors are preferred due to their
stability over temperature in industrial applications. The
output capacitors are usually sized to support a step load
of 50% of the maximum output current in the application,
so the output voltage deviation is contained to 3% of the
output voltage change. The minimum required output
capacitance can be calculated as follows:
OUT
R5 is in kΩ.
V
OUT
R4
R5
60
C
=
OUT
V
OUT
FB
Where C
is in µF. Derating of ceramic capacitors with
OUT
DC-voltage must be considered while selecting the output
capacitor. Derating curves are available from all major
ceramic capacitor vendors.
GND
Figure 2. Adjusting Output Voltage
Soft-Start Capacitor Selection
The device implements adjustable soft-start operation to
reduce inrush current. A capacitor connected from the SS
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MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Setting the Undervoltage Lockout Level
The device offers an adjustable input undervoltage-lockout
level. Set the voltage at which the device turns on with a resis-
V
IN
tive voltage-divider connected from V to GND (Figure 3).
IN
Connect the center node of the divider to EN/UVLO. Choose
R1 to be 3.3MΩ and then calculate R2 as follows:
R1
EN/UVLO
1.215×R1
R2 =
(V
−1.215)
INU
R2
where V
is the voltage at which the device is required
INU
to turn on. Ensure that V
avoid hiccup during slow power-up (slower than soft-start)
or power-down.
is higher than 0.8 x V
. To
INU
OUT
GND
If the EN/UVLO pin is driven from an external signal source,
a series resistance of minimum 1kΩ is recommended to be
placed between the signal source output and the EN/UVLO
pin, to reduce voltage ringing on the line.
Figure 3. Setting the Input Undervoltage Lockout
PCB Layout Guidelines
Power Dissipation
At a particular operating condition, the power losses that
lead to temperature rise of the part are estimated as follows:
All connections carrying pulsed currents must be very
short and as wide as possible. The inductance of these
connections must be kept to an absolute minimum due
to the high di/dt of the currents. Since inductance of a current
carrying loop is proportional to the area enclosed by the
loop, if the loop area is made very small, inductance is
reduced. Additionally, small-current loop areas reduce
radiated EMI.
1
2
P
= (P
×( −1)) − I
×R
OUT DCR
)
LOSS
(
OUT
η
P
= V
×I
OUT
OUT OUT
where:
= Output power,
P
OUT
A ceramic input filter capacitor should be placed close
to the V pins of the IC. This eliminates as much trace
η = Efficiency of the converter,
IN
inductance effects as possible and gives the IC a cleaner
R
= DC resistance of the inductor (see the Typical
DCR
voltage supply. A bypass capacitor for the V
pin also
CC
Operating Characteristics for more information on efficiency
at typical operating conditions).
should be placed close to the pin to reduce effects of trace
impedance.
For a typical multilayer board, the thermal performance
metrics for the package are given below:
When routing the circuitry around the IC, the analog small-
signal ground and the power ground for switching currents
must be kept separate. They should be connected together
at a point where switching activity is at a minimum, typically
θ
θ
= 41°C / W
= 8.5°C / W
JA
JC
the return terminal of the V
bypass capacitor. This helps
CC
The junction temperature of the device can be estimated
keep the analog ground quiet. The ground plane should
be kept continuous/unbroken as far as possible. No trace
carrying high switching current should be placed directly
over any ground plane discontinuity.
at any given maximum ambient temperature (T
from the following equation:
)
A(MAX)
T
= T
+ θ ×P
A(MAX) JA LOSS
(
)
J(MAX)
PCB layout also affects the thermal performance of the
design. A number of thermal vias that connect to a large
ground plane should be provided under the exposed pad
of the part, for efficient heat dissipation.
If the application has a thermal-management system that
ensures that the exposed pad of the device is maintained
at a given temperature (T ) by using proper heat
EP(MAX)
sinks, the junction temperature of the device can be
estimated at any given maximum ambient temperature as:
For a sample layout that ensures first pass success,
refer to the MAX17575 evaluation kit layout available at
T
= T
+ θ ×P
(
)
J(MAX)
EP(MAX) JC LOSS
www.maximintegrated.com
.
Junction temperatures greater than +125°C degrades
operating lifetimes.
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MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Typical Application Circuit
BST
V
IN
V
IN
C5
0.1µF
C1
2.2µF
L1
15µH
V
OUT
PGND
LX
EN/UVLO
PGND
5V/1.5A
C2
22µF
R3
4.7Ω
MAX17575
R1
75kΩ
EXTVCC
C6
0.1µF
V
CC
C3
FB
RT/SYNC
R2
GND
16.2kΩ
R4
40.2KΩ
RESET
f
= 500kHz
SW
SS
L1 = 15µH COILCRAFT XAL6060-153 (6mm × 6mm)
C2 = 22µF/10V/X7R/1210 MURATA GRM32ER71A226K
C3 = 4.7µF/10V/X7R/0805 TDK 2012X7R1A475K085AC (or)
2.2µF/10V/X7R/0603 MURATA GRM188R71A225KE15
EP
C4
5600pF
Figure 4. Typical Application Circuit for 5V Output
BST
LX
V
IN
V
IN
C5
0.1µF
C1
2.2µF
L1
15µH
V
OUT
PGND
EN/UVLO
PGND
3.3V/1.5A
C2
22µF
MAX17575
R1
69.5kΩ
EXTVCC
V
CC
C3
FB
RT/SYNC
R2
GND
26kΩ
R4
40.2KΩ
RESET
f
= 500kHz
SW
SS
L1 = 15µH COILCRAFT XAL6060-153 (6mm × 6mm)
C2 = 22µF/10V/X7R/1210 MURATA GRM32ER71A226K
C3 = 4.7µF/10V/X7R/0805 TDK 2012X7R1A475K085AC (or)
2.2µF/10V/X7R/0603 MURATA GRM188R71A225KE15
EP
C4
5600pF
Figure 5. Typical Application Circuit for 3.3V Output
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MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Ordering Information
PACKAGE-
SIZE
PART
PIN-PACKAGE
MAX17575ATC+
MAX17575ATC+T
12-TDFN EP*
12-TDFN EP*
3mm x 3mm
3mm x 3mm
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
*EP = Exposed pad.
Chip Information
PROCESS: BiCMOS
Maxim Integrated
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MAX17575
4.5V–60V, 1.5A, High-Efficiency,
Synchronous Step-Down DC-DC Converter
with Internal Compensaton
Revision History
REVISION REVISION
PAGES
DESCRIPTION
CHANGED
NUMBER
DATE
0
2/17
Initial release
—
Updated global conditions for the Electrical Characteristics table, Typical Operating
Characteristics, Pin Description table 5V LDO Output (V pin) Function, and the
CC
1–8,
10–11, 14
1
2
6/17
5/18
Linear Regulator (V ) section. Updated Equation in the Operating Input-Voltage
CC
Range section, limits in the Overcurrent Protection section, and Typical Application
Circuits.
Updated the Absolute Maximum Ratings, Detailed Description, Linear Regulator,
Operating Input-Voltage Range, RESET Output, Thermal Shutdown Protection,
Applications Information, and Power Dissipation sections. Updated the Electrical
Characteristics and Typical Operating Characteristics global characteristics,
TOC05–TOC08, and the Pin Description table.
2–11,
13–14
2.1
2.2
Corrected the Pin Description table.
8
Corrected typos in the Absolute Maximum Ratings, Linear Regulator (V ),
CC
Input Capacitor Selection, and Setting the Undervoltage Lockout Level sections;
Updated the Electrical Characteristics table, Typical Operating Characteristics, Pin
Configuration, Pin Description table, and Functional Diagram.
2–12,
13, 16
Updated the General Description, Benefits and Features, Electrical Characteristics,
Typical Operating Characteristics (Conditions and TOC01–TOC08, TOC11–
TOC14, TOC16–TOC18), Pin Configuration, Pin Description, Functional Diagram,
Detailed Description, Switching Frequency Selection and External Frequency
Synchronization, Overcurrent Protection, RESET Output, Thermal Shutdown
Protection, Soft-Start Capacitor Selection, and Setting the Undervoltage Lockout
Level sections, and Table 1 and Figure 3; added Circuit on page 1, and TOC19 and
TOC20; added MAX17575ATC+T to the Ordering Information table
3
12/19
1, 3–13, 15
8, 12–13
3.1
Corrected typos
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2019 Maxim Integrated Products, Inc.
│ 16
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