MAX17605 [MAXIM]
4A Sink/Source Current, 12ns, Dual MOSFET Drivers;
| 型号： | MAX17605 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 4A Sink/Source Current, 12ns, Dual MOSFET Drivers |
| 文件： | 总13页 (文件大小：1237K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EVALUATION KIT AVAILABLE
MAX17600–MAX17605
4A Sink/Source Current,
12ns, Dual MOSFET Drivers
General Description
Features
The MAX17600–MAX17605 devices are high-speed
MOSFET drivers capable of sinking /sourcing 4A peak
currents. The devices have various inverting and non-
inverting part options that provide greater flexibility in
controlling the MOSFET. The devices have internal
logic circuitry that prevents shoot-through during output-
state changes. The logic inputs are protected against
● Dual Drivers with Enable Inputs
● +4V to +14V Single Power-Supply Range
● 4A Peak Sink /Source Current
● Inputs Rated to +14V, Regardless of V
Voltage
DD
● Low 12ns Propagation Delay
● 6ns Typical Rise and 5ns Typical Fall Times with
voltage spikes up to +14V, regardless of V
volt-
DD
1nF Load
age. Propagation delay time is minimized and matched
between the dual channels. The devices have very fast
switching time, combined with short propagation delays
(12ns typ), making them ideal for high-frequency circuits.
The devices operate from a +4V to +14V single power
supply and typically consume 1mA of supply current. The
MAX17600/MAX17601 have standard TTL input logic
levels, while the MAX17603 /MAX17604/MAX17605 have
CMOS-like high-noise margin (HNM) input logic levels.
The MAX17600/MAX17603 are dual inverting input driv-
ers, the MAX17601/MAX17604 are dual noninverting
input drivers, and the MAX17602/MAX17605 devices
have one noninverting and one inverting input. These
devices are provided with enable pins (ENA, ENB) for
better control of driver operation.
● Matched Delays Between Channels
● Parallel Operation of Dual Outputs for Larger
Driver Output Current
● TTL or HNM Logic-Level Inputs with Hysteresis for
Noise Immunity
● Low Input Capacitance: 10pF (typ)
● Thermal Shutdown Protection
● TDFN, μMAX, and SO Package Options
● -40°C to +125°C Operating Temperature Range
Typical Operating Circuit
These devices are available in 8-pin (3mm x 3mm) TDFN,
8-pin (3mm x 5mm) µMAX , and 8-pin SO packages and
operate over the -40°C to +125°C temperature range.
ENA
®
V
DD
(UP TO +14V)
V
DD
OUTA
ENB
MAX17600
MAX17601
MAX17602
MAX1760ꢀ
MAX17604
MAX17605
Applications
● Power MOSFET Switching
● Switch-Mode Power Supplies
● DC-DC Converters
● Motor Control
● Power-Supply Modules
INA
INB
OUTB
GND
Ordering Information appears at end of data sheet.
μMAX is a registered trademark of Maxim Integrated
Products, Inc.
19-6177; Rev 2; 6/17
MAX17600–MAX17605
4A Sink/Source Current,
12ns, Dual MOSFET Drivers
Absolute Maximum Ratings
V
, INA, INB, ENA, ENB to GND .......................-0.3V to +16V
Operating Temperature Range......................... -40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range............................ -65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow).......................................+240°C
DD
OUTA, OUTB to GND............................................-0.3V to +16V
Junction Operating Temperature Range .......... -40°C to +125°C
Continuous Power Dissipation (T = +70°C)
A
8-Pin TDFN (derate 23.8mW/°C above +70°C) ........1904mW
8-Pin SO (derate 74mW/°C above +70°C)............. 588.2mW*
8-Pin µMAX (derate 12.9mW/°C above +70°C).....1030.9mW
*As per JEDEC 51 standard.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Information
PACKAGE TYPE: 8 TDFN
Package Code
T833+2
21-0137
90-0059
Outline Number
Land Pattern Number
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θ
)
42°C/W
8°C/W
JA
Junction to Case (θ
)
JC
PACKAGE TYPE: 8 SO
Package Code
S8+2
Outline Number
21-0041
90-0096
Land Pattern Number
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θ
)
136°C/W
38°C/W
JA
Junction to Case (θ
)
JC
PACKAGE TYPE: 8 µMAX
Package Code
U8E+2
Outline Number
21-0107
90-0145
Land Pattern Number
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θ
)
77.6°C/W
5°C/W
JA
Junction to Case (θ
)
JC
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
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MAX17600–MAX17605
4A Sink/Source Current,
12ns, Dual MOSFET Drivers
Electrical Characteristics
(V
= 12V, C = 0F, at T = -40°C to +125°C, unless otherwise noted. Typical values are specified at T = +25°C. Parameters
DD
L
A
A
specified at V
= 4V apply to the TTL versions only.) (Note 1)
DD
PARAMETER
POWER SUPPLY (V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
)
DD
TTL versions
HNM versions
4
6
3
14
14
V
Operating Range
V
V
DD
DD
V
V
V
Undervoltage Lockout
UVLO Hysteresis
UVLO
V
rising
3.5
200
120
1
3.85
V
DD
DD
DD
DD
mV
µs
UVLO to OUT_ Delay
V
DD
rising
IDD_Q
Not switching, V
= 14V (Note 2)
2
DD
V
Supply Current
mA
DD
V
= 4.5V, C = 1nF, both channels
DD L
IDD_SW
12
18
switching at 1MHz
DRIVER OUTPUT (SOURCE) (OUTA, OUTB)
Peak Output Current (Sourcing)
I
V
V
V
= 14V, C = 10nF (Note 2)
4
A
PK-P
DD
DD
DD
L
= 14V, I
= 100mA
0.88
0.91
1.85
1.95
OUT_
Driver Output Resistance Pulling Up
(Note 3)
R
Ω
ON-P
= 4V, I
= 100mA
OUT_
DRIVER OUTPUT (SINK) (OUTA, OUTB)
Peak Output Current (Sinking)
I
V
V
V
= 14V, C = 10nF (Note 2)
4
A
PK-N
DD
DD
DD
L
= 14V, I
= -100mA
0.5
0.95
1
OUT_
Driver Output Resistance Pulling
Down (Note 3)
R
Ω
ON-N
= 4V, I
= -100mA
0.52
OUT_
LOGIC INPUT (INA, INB)
MAX17600/1/2
MAX17603/4/5
MAX17600/1/2
MAX17603/4/5
MAX17600/1/2
MAX17603/4/5
2.1
V
Logic-High Input Voltage
Logic-Low Input Voltage
V
V
V
V
IN_
IN_
IH
4.25
0.8
2.0
V
V
IL
0.34
0.9
Logic Input Hysteresis
V
HYS
Logic Input Leakage Current
Logic Input Bias Current
Logic Input Capacitance
I
V
V
= V
= 0V or V (MAX17600/1/2)
DD
-1
+0.02
10
+1
µA
µA
pF
LKG
INA
INB
I
= V
= 0V or V
(MAX17603/4/5)
BIAS
INA
INB
DD
C
(Note 2)
10
IN
Maxim Integrated
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MAX17600–MAX17605
4A Sink/Source Current,
12ns, Dual MOSFET Drivers
Electrical Characteristics (continued)
(V
= 12V, C = 0F, at T = -40°C to +125°C, unless otherwise noted. Typical values are specified at T = +25°C. Parameters
DD
L
A
A
specified at V
= 4V apply to the TTL versions only.) (Note 1)
DD
PARAMETER
ENABLE (ENA, ENB)
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX17600/1/2
MAX17603/4/5
MAX17600/1/2
MAX17603/4/5
MAX17600/1/2
MAX17603/4/5
MAX17600/1/2
MAX17603/4/5
EN_ rising
2.1
V
V
High Level Voltage
Low Level Voltage
V
V
EN_H
4.25
0.8
2.0
EN_L
0.34
0.9
100
200
7
Enable Hysteresis
EN_
V
HYS
50
200
400
Enable Pullup Resistor to V
R
kΩ
ns
DD
pu
100
Propagation Delay from EN_ to OUT_
(Note 2)
t
pd
EN_ falling
7
SWITCHING CHARACTERISTICS (V
= 14V) (Note 2)
DD
C = 1nF
6
L
OUT_ Rise Time
t
C = 4.7nF
20
40
6
ns
ns
R
L
C = 10nF
L
C = 1nF
L
OUT_ Fall Time
t
C = 4.7nF
16
25
12
12
F
L
C = 10nF
L
Turn-On Delay Time
t
C = 1nF
ns
ns
D-ON
L
Turn-Off Delay Time
t
C = 1nF
L
D-OFF
SWITCHING CHARACTERISTICS (V
= 4.5V) (Note 2)
DD
C = 1nF
5
L
OUT_ Rise Time
OUT_ Fall Time
t
C = 4.7nF
15
28
5
ns
ns
R
L
C = 10nF
L
C = 1nF
L
t
C = 4.7nF
10
18
12
12
F
L
C = 10nF
L
Turn-On Delay Time
Turn-Off Delay Time
t
C = 1nF
ns
ns
D-ON
L
t
C = 1nF
L
D-OFF
MATCHING CHARACTERISTICS (Note 2)
Matching Propagation Delays
Between Channel A and Channel B
V
= 14V, C = 10nF
8
ns
DD
L
Note 1: All devices are production tested at T = +25°C. Limits over temperature are guaranteed by design.
A
Note 2: Design guaranteed by bench characterization. Limits are not production tested.
Note 3: For SOIC, μMAX package options, these are only Typ parameters.
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MAX17600–MAX17605
4A Sink/Source Current,
12ns, Dual MOSFET Drivers
Typical Operating Characteristics
(C = 1nF, T = +25°C, unless otherwise noted.)
L
A
RISE TIME vs. SUPPLY VOLTAGE
(C = 1nF)
FALL TIME vs. SUPPLY VOLTAGE
(C
OUT_
= 1nF)
OUT_
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
T
A
= +85°C
T
= +85°C
A
T = +125°C
A
T
A
= +125°C
T
= +25°C
T = +25°C
A
A
T
A
= -40°C
12
T
A
= 0°C
T
= -40°C
12
A
T
A
= 0°C
4
6
8
10
14
4
6
8
10
14
SUPPLY VOLTAGE, V (V)
SUPPLY VOLTAGE, V (V)
DD
DD
PROPAGATION DELAY TIME (LOW TO HIGH)
PROPAGATION DELAY TIME (HIGH TO LOW)
vs. SUPPLY VOLTAGE (C
= 1nF)
vs. SUPPLY VOLTAGE (C
= 1nF)
OUT_
OUT_
18
16
14
12
10
8
18
16
14
12
10
8
T
A
= +125°C
T
A
= +125°C
T
= +85°C
A
T
= +85°C
A
T
A
= +25°C
T
= +25°C
A
T
6
= 0°C
A
T
A
= -40°C
T
= 0°C
A
T
= -40°C
A
4
6
8
10
12
14
4
8
10
12
14
SUPPLY VOLTAGE, V (V)
SUPPLY VOLTAGE, V (V)
DD
DD
SUPPLY CURRENT vs. SUPPLY VOLTAGE
(C = 0nF)
SUPPLY CURRRENT vs. LOAD CAPACITANCE
(V = 12V, C
= 0nF)
OUT_
DD
OUTB
3.0
2.5
2.0
1.5
1.0
0.5
140
130
120
110
100
90
80
70
60
50
1MHz
500kHz
500kHz
1MHz
100kHz
40
30
20
10
NO
SWITCHING
100kHz
NO SWITCHING
0
4
6
8
10
12
14
0
1
2
3
4
5
6
7
8
9
10
SUPPLY VOLTAGE, V (V)
LOAD CAPACITANCE (nF)
DD
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MAX17600–MAX17605
4A Sink/Source Current,
12ns, Dual MOSFET Drivers
Typical Operating Characteristics (continued)
(C = 1nF, T = +25°C, unless otherwise noted.)
L
A
INPUT THRESHOLD VOLTAGE
SUPPLY CURRENT vs. TEMPERATURE
SUPPLY CURRENT vs. LOGIC INPUT
vs. SUPPLY VOLTAGE (C
= 0nF)
(V = 12V, C
DD
= 0nF)
VOLTAGE (V = 12V, C
= 0nF)
OUT_
OUT_
DD
OUT_
3.0
2.5
2.0
1.5
1.0
0.5
0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
1MHz
RISING
500kHz
RISING
FALLING
FALLING
100kHz
NO SWITCHING
4
6
8
10
12
14
-40 -20
0
20 40 60 80 100 120
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
SUPPLY VOLTAGE, V (V)
DD
AMBIENT TEMPERATURE (°C)
LOGIC INPUT VOLTAGE (V)
LOGIC INPUT VOLTAGE
LOGIC INPUT VOLTAGE
LOGIC INPUT VOLTAGE
vs. OUTPUT VOLTAGE (MAX17601)
(V = +4V, C = 4.7nF)
vs. OUTPUT VOLTAGE (MAX17601)
vs. OUTPUT VOLTAGE (MAX17601)
(V = +4V, C = 4.7nF)
MAX17600 toc12
(V = +4V, C
= 10nF)
DD
OUTA
DD
OUTA
DD
OUTA
MAX17600 toc10
MAX17600 toc11
INA
INA
2V/div
2V/div
INA
2V/div
OUTA
2V/div
OUTA
2V/div
OUTA
2V/div
20ns/div
20ns/div
20ns/div
LOGIC INPUT VOLTAGE
LOGIC INPUT VOLTAGE
LOGIC INPUT VOLTAGE
vs. OUTPUT VOLTAGE (MAX17601)
vs. OUTPUT VOLTAGE (MAX17601)
vs. OUTPUT VOLTAGE (MAX17601)
(V = +4V, C
DD
= 10nF)
(V = +14V, C
DD
= 4.7nF)
(V = +14V, C
DD
= 10nF)
OUTA
MAX17600 toc15
OUTA
OUTA
MAX17600 toc13
MAX17600 toc14
INA
INA
5V/div
5V/div
INA
2V/div
OUTA
5V/div
OUTA
5V/div
OUTA
2V/div
20ns/div
20ns/div
20ns/div
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MAX17600–MAX17605
4A Sink/Source Current,
12ns, Dual MOSFET Drivers
Typical Operating Characteristics (continued)
(C = 1nF, T = +25°C, unless otherwise noted.)
L
A
LOGIC INPUT VOLTAGE
LOGIC INPUT VOLTAGE
LOGIC INPUT VOLTAGE
vs. OUTPUT VOLTAGE (MAX17601)
vs. OUTPUT VOLTAGE (MAX17601)
vs. OUTPUT VOLTAGE (MAX17604)
(V = +14V, C
DD
= 4.7nF)
(V = +14V, C
DD
= 10nF)
(V = +14V, C
DD
= 4.7nF)
OUTA
MAX17600 toc18
OUTA
OUTA
MAX17600 toc16
MAX17600 toc17
INA
5V/div
INA
INA
5V/div
5V/div
OUTA
5V/div
OUTA
5V/div
OUTA
5V/div
20ns/div
20ns/div
20ns/div
LOGIC INPUT VOLTAGE
vs. OUTPUT VOLTAGE (MAX17604)
(V = +14V, C = 10nF)
LOGIC INPUT VOLTAGE
vs. OUTPUT VOLTAGE (MAX17604)
(V = +14V, C = 4.7nF)
DD
OUTA
DD
OUTA
MAX17600 toc19
MAX17600 toc20
INA
5V/div
INA
5V/div
OUTA
5V/div
OUTA
5V/div
20ns/div
20ns/div
LOGIC INPUT VOLTAGE
vs. OUTPUT VOLTAGE (MAX17604)
LOGIC OUTPUT vs. ENABLE
(V = +14V, C = 0nF)
(V = +14V, C
= 10nF)
DD
OUTA
DD
OUTA
MAX17600 toc21
MAX17600 toc22
V
DD
5V/div
ENA
5V/div
INA
5V/div
INA
5V/div
OUTA
5V/div
OUTA
10V/div
20ns/div
4µs/div
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MAX17600–MAX17605
4A Sink/Source Current,
12ns, Dual MOSFET Drivers
Pin Configurations
TOP VIEW
ENB OUTA
8
V
OUTB
5
DD
TOP VIEW
7
6
TOP VIEW
ꢀ
ENA
INA
1
2
3
4
8
7
6
5
ENB
MAX17600
MAX17601
MAX17602
MAX1760ꢁ
MAX17604
MAX17605
+
MAX17600
MAX17600
MAX17601
MAX17602
MAX1760ꢁ
MAX17604
MAX17605
ENA
INA
1
2
3
4
8
7
6
5
ENB
MAX17601
MAX17602
MAX1760ꢁ
MAX17604
MAX17605
OUTA
OUTA
GND
INB
V
DD
OUTB
GND
INB
V
DD
ꢀ
ꢃMAX
OUTB
1
2
3
4
SO
ENA INA GND INB
TDFꢂ
Pin Description
PIN
NAME
FUNCTION
Enable Input for Driver A. Internally pulled to V
always-on operation. Connect to GND for disabling the corresponding channel.
through a 100kΩ resistor. Leave unconnected for
DD
1
ENA
2
3
4
INA
GND
INB
Logic Input for Channel A
Ground
Logic Input for Channel B
Channel B Driver Output. Sources and sinks current for channel B to turn the external MOSFET at OUTB
on or off.
5
6
7
OUTB
V
Power-Supply Input. Bypass to GND with one or more low-ESR 0.1µF ceramic capacitors.
DD
Channel A Driver Output. Sources and sinks current for channel A to turn the external MOSFET at OUTA
on or off.
OUTA
Enable Input for Driver B. Internally pulled to V
always-on operation. Connect to GND for disabling the corresponding channel.
through a 100kΩ resistor. Leave unconnected for
DD
8
ENB
EP
—
Exposed Pad (TDFN Only). Internally connected to GND. Do not use the EP as the only ground connection.
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MAX17600–MAX17605
4A Sink/Source Current,
12ns, Dual MOSFET Drivers
Functional Diagram
INA
V
IH
V
IL
CHANNEL B
GND
OUTA
90%
10%
t
t
IN LOGIC
LEVEL SHIFT DOWN
D-ON
D-OFF
PREDRIVER
t
t
R
F
INB
V
L
= 5V
OUTB
INB
BBM
V
IH
ENB
V
IL
OUTB
90%
IN LOGIC
LEVEL SHIFT UP
PREDRIVER
10%
t
t
D-ON
D-OFF
V
- 5V
DD
BG + UVLO +
TSHDN
t
t
R
F
V
DD
Figure 1. Timing Diagram for the MAX17601/MAX17604
BG + UVLO +
TSHDN
V
DD
- 5V
INA
IN LOGIC
LEVEL SHIFT UP
V
IH
PREDRIVER
V
IL
ENA
INA
OUTA
90%
OUTA
BBM
10%
D-ON
t
t
D-OFF
V
L
= 5V
t
t
F
R
IN LOGIC
LEVEL SHIFT DOWN
PREDRIVER
INA
V
IH
V
IL
GND
CHANNEL A
OUTB
90%
10%
t
t
D-ON
D-OFF
t
t
R
F
Figure 2. Timing Diagram for the MAX17602/MAX17605
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MAX17600–MAX17605
4A Sink/Source Current,
12ns, Dual MOSFET Drivers
Detailed Description
INA
The MAX17600–MAX17605 are high-speed MOSFET
drivers capable of sinking/sourcing 4A peak currents.
The devices have various inverting and noninverting part
options that provide greater flexibility in controlling the
MOSFET. The devices have internal logic circuitry that
prevents shoot-through during output-state changes.
The logic inputs are protected against voltage spikes
V
IH
V
IL
OUTA
90%
10%
t
t
D-OFF
D-ON
t
t
F
R
up to +16V, regardless of V
voltage. Propagation
DD
delay time is minimized and matched between the dual
channels. The devices have very fast switching time,
combined with short propagation delays (12ns typ),
making them ideal for high-frequency circuits. The
devices operate from a +4V to +14V single power
supply and typically consume 1mA of supply current.
The MAX17600/MAX17601/MAX17602 have standard
TTL input logic levels, while the MAX17603/MAX17604/
MAX17605 have CMOS-like high-noise margin (HNM)
input logic levels. The MAX17600/MAX17603 are dual
inverting input drivers, the MAX17601/MAX17604 are
dual noninverting input drivers, and the MAX17602/
MAX17605 have one noninverting and one inverting
input. These devices are provided with enable pins
(ENA and ENB) for better control of driver operation.
INB
V
IH
V
IL
OUTB
90%
10%
t
t
D-OFF
D-ON
t
t
F
R
Figure 3. Timing Diagram for the MAX17600/MAX17603
ENA
INA
ENB
MAX17600
MAX17601
MAX17602
MAX1760ꢀ
MAX17604
MAX17605
Logic Inputs
OUTA
The MAX17600/MAX17601/MAX17602 have standard
TTL input logic levels, while the MAX17603/MAX17604/
MAX17605 have CMOS-like HNM input logic levels (see
the Electrical Characteristics table). Table 1 gives the truth
table for various part options.
C
OUTA
V
DD
GND
INB
V
DD
OUTB
C
OUTB
Figure 4. Test Circuit for the Timing Diagrams
Table 1. Truth Table
ENABLE
INPUTS
LOGIC
INPUTS
DUAL NONINVERTING
DRIVER
DUAL INVERTING
DRIVER
ONE INVERTING AND ONE
NONINVERTING DRIVER
ENA
ENB
H
INA
INB
H
OUTA
OUTB
OUTA
OUTB
OUTA
OUTB
H
H
H
H
L
H
H
L
H
H
L
H
L
L
L
L
H
L
L
L
H
L
H
L
H
H
H
L
H
H
L
H
H
L
H
L
H
L
L
L
H
L
L
X
X
L
L
L
L = Logic-low, H = Logic-high.
Maxim Integrated
│ 10
www.maximintegrated.com
MAX17600–MAX17605
4A Sink/Source Current,
12ns, Dual MOSFET Drivers
The quiescent current is 1mA typical. The current required
to charge and discharge the internal nodes is frequency
dependent (see the Typical Operating Characteristics).
The devices’ power dissipation when driving a ground
referenced resistive load is:
Undervoltage Lockout (UVLO)
When V
is below the UVLO threshold, the output
DD
stage n-channel device is on and the p-channel is off,
independent of the state of the inputs. This holds the
outputs low. The UVLO is typically 3.6V with 200mV
typical hysteresis to avoid chattering. A typical falling
delay of 2µs makes the UVLO immune to narrow negative
transients in noisy environments.
P = D x R
(MAX) x I 2 per channel
LOAD
ON
where D is the fraction of the period the devices’ output
pulls high, R (MAX) is the maximum pullup on-resis-
ON
tance of the device with the output high, and I
output load current of the devices.
is the
LOAD
Driver Outputs
The devices feature 4A peak sourcing/sinking capabilities
to provide fast rise and fall times of the MOSFET gate.
Add a resistor in series with OUT_ to slow the corre-
sponding rise/fall time of the MOSFET gate.
For capacitive loads, the power dissipation is:
P = C
x (V )2 x FREQ per channel
DD
LOAD
where C
is the capacitive load, V
is the supply
DD
LOAD
voltage, and FREQ is the switching frequency.
Applications Information
Layout Information
Supply Bypassing, Device
Grounding, and Placement
Ample supply bypassing and device grounding are
The devices’ MOSFET drivers source and sink large
currents to create very fast rise and fall edges at the
gate of the switching MOSFET. The high di/dt can cause
unacceptable ringing if the trace lengths and
impedances are not well controlled. The following PCB
layout guidelines are recommended when designing with
the devices:
e
xtremely important because when large external
capacitive loads are driven, the peak current at the V
pin can approach 4A, while at the GND pin, the peak
DD
current can approach 4A. V drops and ground shifts
DD
are forms of negative feedback for inverters and, if
excessive, can cause multiple switching when the
inverting input is used and the input slew rate is low. The
device driving the input should be referenced to the devic-
es’ GND pin, especially when the inverting input is used.
Ground shifts due to insufficient device grounding can
disturb other circuits sharing the same AC ground return
● Place at least one 2.2µF decoupling ceramic capaci-
tor from V
to GND as close as possible to the IC.
DD
At least one storage capacitor of 10µF (min) should
be located on the PCB with a low-resistance path
to the V
pin of the devices. There are two AC
DD
current loops formed between the IC and the gate of
the MOSFET being driven. The MOSFET looks like
a large capacitance from gate to source when the
gate is being pulled low. The active current loop is
from OUT_ of the devices to the MOSFET gate to the
MOSFET source and to GND of the devices. When
the gate of the MOSFET is being pulled high, the
active current loop is from OUT_ of the devices to the
MOSFET gate to the MOSFET source to the GND ter-
minal of the decoupling capacitor to the V
of the decoupling capacitor and to the V
the devices. While the charging current loop is impor-
tant, the discharging current loop is also critical. It is
important to minimize the physical distance and the
impedance in these AC current paths.
path. Any series inductance in the V , OUT_, and/or
DD
GND paths can cause oscillations due to the very high
di/dt that results when the devices are switched with any
capacitive load. A 2.2µF or larger value ceramic
capacitor is recommended, bypassing V
to GND and
DD
placed as close as possible to the pins. When driving very
large loads (e.g., 10nF) at minimum rise time, 10µF or
more of parallel storage capacitance is recommended. A
ground plane is highly recommended to minimize ground
return resistance and series inductance. Care should be
taken to place the devices as close as possible to the
external MOSFET being driven to further minimize board
inductance and AC path resistance.
terminal
terminal of
DD
DD
Power Dissipation
● In a multilayer PCB, the component surface layer
surrounding the devices should consist of a ground
plane containing the discharging and charging current
loops.
P
ower dissipation of the devices consists of three
components, caused by the quiescent current, capacitive
charge and discharge of internal nodes, and the output
current (either capacitive or resistive load). The sum of
these components must be kept below the maximum
power-dissipation limit.
Maxim Integrated
│ 11
www.maximintegrated.com
MAX17600–MAX17605
4A Sink/Source Current,
12ns, Dual MOSFET Drivers
Ordering Information/Selector Guide
PART
PIN-PACKAGE
8 TDFN-EP* (3mm x 3mm)
8 SO
CONFIGURATION
Dual/Inverting
LOGIC LEVELS
TTL
TOP MARK
+BOJ
+
MAX17600ATA+
MAX17600ASA+
MAX17600AUA+
MAX17601ATA+
MAX17601ASA+
MAX17601AUA+
MAX17602ATA+
MAX17602ASA+
MAX17602AUA+
MAX17603ATA+
MAX17603ASA+
MAX17603AUA+
MAX17604ATA+
MAX17604ASA+
MAX17604AUA+
MAX17605ATA+
MAX17605ASA+
MAX17605AUA+
Dual/Inverting
TTL
8 µMAX-EP*
Dual/Inverting
TTL
+AACI
+BOK
+
8 TDFN-EP* (3mm x 3mm)
8 SO
Dual/Noninverting
Dual/Noninverting
Dual/Noninverting
Inverting/Noninverting
Inverting/Noninverting
Inverting/Noninverting
Dual/Inverting
TTL
TTL
8 µMAX-EP*
TTL
+AACJ
+BOL
+
8 TDFN-EP* (3mm x 3mm)
8 SO
TTL
TTL
8 µMAX-EP*
TTL
+AACK
+BOM
+
8 TDFN-EP* (3mm x 3mm)
8 SO
HNM
HNM
HNM
HNM
HNM
HNM
HNM
HNM
HNM
Dual/Inverting
8 µMAX-EP*
Dual/Inverting
+AACL
+BON
+
8 TDFN-EP* (3mm x 3mm)
8 SO
Dual/Noninverting
Dual/Noninverting
Dual/Noninverting
Inverting/Noninverting
Inverting/Noninverting
Inverting/Noninverting
8 µMAX-EP*
+AACM
+BOO
+
8 TDFN-EP* (3mm x 3mm)
8 SO
8 µMAX-EP*
+AACN
Note: All devices are specified over the -40°C to +125°C temperature range. Optional 8-pin 2mm x 3mm TDFN package is available.
Contact your Maxim sales representative for more information.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Chip Information
PROCESS: BiCMOS
Maxim Integrated
│ 12
www.maximintegrated.com
MAX17600–MAX17605
4A Sink/Source Current,
12ns, Dual MOSFET Drivers
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
1
1/12
Initial release
—
5/12
Added the MAX17600
1–12
Updated Electrical Characteristics table OUT_ Rise Time for Switching Characteristics
(V = 14V and V = 4.5V) units from pF to nF.
2
6/17
3–4
DD
DD
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2017 Maxim Integrated Products, Inc.
│ 13
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