MAX19712EVCMODU+ [MAXIM]
Low-Voltage and Low-Power Operation;
| 型号： | MAX19712EVCMODU+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Low-Voltage and Low-Power Operation |
| 文件： | 总21页 (文件大小：685K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-0691; Rev 1; 6/07
MAX19710–MAX19713 Evaluation
Kits/Evaluation Systems
Evluate:0–MAX9713
General Description
Features
♦ ADC/DAC Sampling Rates from 7.5Msps to
The MAX19710–MAX19713 evaluation systems (EV
systems) consist of MAX19710–MAX19713 evaluation
kits (EV kits), a companion Maxim command module
(CMODUSB) interface board, and software. Order the
complete EV system (see the Ordering Information) for
comprehensive evaluation of the MAX19710–MAX19713
using a personal computer. Order the EV kit if the
command module has already been purchased with a
previous Maxim EV system, or for custom use in other
microcontroller-based (µC) systems.
45Msps
♦ Low-Voltage and Low-Power Operation
♦ Adjustable-Gain, Low-Speed DAC Buffers
♦ On-Board Clock-Shaping Circuitry
♦ On-Board Level-Translating I/O Drivers
♦ Assembled and Tested
♦ Downloadable Windows 98SE/2000/XP-Compatible
Software
The MAX19710–MAX19713 EV kits are fully assembled
and tested PCBs that contain all the components
necessary to evaluate the performance of the
MAX19710–MAX19713 analog front-ends (AFEs).
These AFEs integrate a dual-receive analog-to-digital
converter (Rx ADC), a dual-transmit digital-to-analog
converter (Tx DAC), a 1.024V internal voltage refer-
ence, three low-speed serial DACs, and one low-speed
serial ADC. The EV kit boards accept AC- or DC-
coupled, differential or single-ended analog inputs for
the Rx ADC and include circuitry that converts the Tx
DAC differential output signals to single-
ended analog outputs. The EV kits include circuitry that
generates a clock signal from an AC sine-wave input
signal. The EV kits operate from a +3.0V analog power
supply, a +1.8V digital power supply, a +3.0V clock
power supply, and ±±V bipolar power supplies.
Ordering Information
SPI
INTERFACE
TYPE
TEMP
RANGE* PACKAGE
IC
PART
0°C to
+70°C
0°C to
+70°C
0°C to
+70°C
0°C to
+70°C
0°C to
+70°C
0°C to
+70°C
0°C to
+70°C
0°C to
+70°C
±6 TQFN-
EP**
±6 TQFN-
EP**
±6 TQFN-
EP**
±6 TQFN-
EP**
±6 TQFN-
EP**
±6 TQFN-
EP**
±6 TQFN-
EP**
±6 TQFN-
EP**
Not
included
MAX19710EVKIT+
MAX19710EVCMODU+
MAX19711EVKIT+
MAX19711EVCMODU+
MAX19712EVKIT+
MAX19712EVCMODU+
MAX19713EVKIT+
MAX19713EVCMODU+
CMODUSB
Not
included
CMODUSB
Not
included
CMODUSB
Not
included
The Maxim command module interface board
(CMODUSB) allows a PC to use its USB port to emulate
an SPI™ 3-wire interface. Windows® 98SE/2000/XP-
compatible software, which can be downloaded from
www.maxim-ic.com/evkitsoftware, provides a user-
friendly interface to exercise the features of the
MAX19710–MAX19713. The program is menu driven
and offers a graphical user interface (GUI) with control
buttons and a status display.
CMODUSB
+Denotes a lead-free and RoHS-compliant EV Kit.
*This limited temperature range applies to the EV kit PCB only. The
MAX19710–MAX19713 IC temperature range is -40°C to +8±°C.
**EP = Exposed paddle.
Note: The MAX19710–MAX19713 EV kit software is available
online; however, the CMODUSB board is required to interface
the EV kit to the computer when using the software.
SPI is a trademark of Motorola, Inc.
Windows is a registered trademark of Microsoft Corp.
MAX19710–MAX19713 EV Kit
Software Files
PROGRAM
DESCRIPTION
Part Selection Table
INSTALL.EXE
Installs the EV kit software
PART
SPEED (Msps)
Tx CDMA FILTERS
MAX19710.EXE, MAX19711.EXE,
MAX19712.EXE, MAX19713.EXE
MAX19710EVKIT+
MAX19711EVKIT+
MAX19712EVKIT+
MAX19713EVKIT+
7.±
11
22
4±
No
Yes
No
Application program*
UNINST.INI
Uninstalls the EV kit software
USB driver installation
help file
TROUBLESHOOTING_USB.PDF
*EV Kit software dependant.
No
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
MAX19710–MAX19713 Evaluation
Kits/Evaluation Systems
Common Component List
DESIGNATION QTY
DESCRIPTION
DESIGNATION QTY
DESCRIPTION
Dual-row, 40-pin header
Dual-row, 20-pin header
2-pin headers
J2
J3
1
1
3
1
1
C1–C6, C17, C21,
C23, C24, C2±, C28,
0.1µF ±20ꢀ, 10V X±R ceramic
capacitors (0402)
TDK C100±X±R1A104M
C29, C37–C40,
C4±–C48, C73–C76,
C78, C80, C81
28
J4, J±, JU2
JU1
Jumper, dual-row, 8-pin header
Jumper, 3-pin header
JU3
22pF ±±ꢀ, ±0V C0G ceramic
capacitors (0402)
TDK C100±C0G1H220J
R1–R4, R±±,
R±6, R61
C7–C10
4
7
49.9Ω ±1ꢀ resistors (0603)
C11, C31–C36
C12
0
0
Not installed, capacitors (0402)
Not installed, capacitor (0603)
R±–R16, R37–R42
R17–R20
0
4
0
Not installed, resistors (0402)
24.9Ω ±1ꢀ resistors (0402)
Not installed, resistors (0603)
1000pF ±±ꢀ, ±0V C0G ceramic
capacitors (0603)
TDK C1608C0G1H102J
C13, C14, C82
C1±, C16
3
2
9
3
7
R21–R36,
R43–R46, R62, R66
0.33µF ±10ꢀ, 10V X7R ceramic
capacitors (0603)
Murata GRM188R71C334K
R47–R±4
R±7, R±8
R±9
8
2
1
1
1
10kΩ ±1ꢀ resistors (0603)
4.02kΩ ±1ꢀ resistors (0603)
6.04kΩ ±1ꢀ resistor (0603)
2.0kΩ ±1ꢀ resistor (0603)
±kΩ potentiometer, 19-turn, 3/8in
1.0µF ±20ꢀ, 6.3V X±R ceramic
capacitors (0402)
TDK C100±X±R0J10±M
0.1µF ±20ꢀ, 6.3V X±R ceramic
capacitors (0201)
C18, C19, C20,
C67–C72
R60
R63
C22,
C26, C27
100Ω ±±ꢀ resistor arrays (1206-16L)
Panasonic EXB-2HV-101J
RA1–RA2
RA3–RA6
T1, T2
2
4
2
TDK C0603X±R0J104M
±1Ω ±±ꢀ resistor arrays (1206-16L)
Panasonic EXB-2HV-±10J
2.2µF ±20ꢀ, 6.3V X±R ceramic
capacitors (0603)
TDK C1608X±R0J22±M
C30, C41–C44,
C77, C84
1:1 RF transformers
Coilcraft TTWB3010-1L
220µF ±20ꢀ, 6.3V tantalum
C49–C60
C61–C66
C79
12 capacitors (C-case)
AVX TPSC227M006R02±0
10µF ±20ꢀ, 10V X±R ceramic
X
TP1–TP4
TP±
4
1
Test points (red)
Test point (black)
Note: See the EV Kit-Specific
Component List
6
1
1
capacitors (1210)
TDK C322±X±R1A106M
U1
1
0.01µF ±±ꢀ, 2±V C0G ceramic
capacitor (0603)
TDK C1608C0G1E103J
16-bit buffer/driver
(48-pin TSSOP)
Texas Instruments
SN74ALVCH16244DGGR
U2
1
0.33µF ±10ꢀ, 10V X±R ceramic
capacitor (0402)
C83
Dual LVDS line receiver
Maxim MAX9113ESA+ (8-pin SO)
Murata GRM1±±R61A334K
U3
1
2
CLOCK, IA, IAN,
IAP, ID, QA, QAN,
QAP, QD
400MHz ultra-low-distortion op amps
Maxim MAX4108ESA+ (8-pin SO)
9
SMA PC mount connectors
U4, U±
Low-noise, low-distorion, wide-
band, rail-to-rail op amp
Maxim MAX4478AUD+ (14-pin
TSSOP)
Dual Schottky diode (SOT23)
Central Semiconductor CMPD6263S
Vishay BAS70-04
U6
1
D1
J1
1
1
Diodes Inc BAS70-04
2 x 20 right-angle female connector
2
_______________________________________________________________________________________
MAX19710–MAX19713 Evaluation
Kits/Evaluation Systems
Evluate:0–MAX9713
Common Component List
(continued)
Component Suppliers
SUPPLIER
AVX Corp.
PHONE
WEBSITE
843-946-0238 www.avxcorp.com
DESIGNATION QTY
DESCRIPTION
Central
Semiconductor
Quad-level translator
Maxim MAX3023EUD+ (14-pin TSSOP)
Shunts
631-43±-1110 www.centralsemi.com
U7
—
—
1
6
1
Coilcraft
Diodes Inc.
Murata
847-639-6400 www.coilcraft.com
80±-446-4800 www.diodes.com
770-436-1300 www.murata.com
714-373-7366 www.panasonic.com
847-803-6100 www.component.tdk.com
203-268-6261 www.vishay.com
PCB: MAX19710/1/2/3
Evaluation Kit+
Panasonic
TDK Corp.
Vishay
MAX19713EVCMODU
(MAX19713 EV System)
Component List
Note: Indicate that you are using the MAX19710, MAX19711,
MAX19712, or MAX19713 when contacting these component
suppliers.
PART
QTY
DESCRIPTION
SPI interface board
MAX19713 EV kit
CMODUSB
1
1
MAX19713EVKIT+
• Analog bandpass filters (e.g., Allen Avionics, K&L
Microwave) for input and clock signal
• Two spectrum analyzers (e.g., HP/Agilent 8±60E)
EV Kit-Specific Component List
• One digital pattern generator with one 10-bit data
pod (e.g., Tektronix DG2020A)
EV KIT PART
NUMBER
DESIGNATION
DESCRIPTION
Maxim MAX19713ETN+ (±6-
pin, 7mm x 7mm Thin QFN-EP)
Procedure
The MAX19710–MAX19713 EV kits are fully assembled
and tested surface-mount boards. Follow the steps below
to verify board operation. Caution: Do not turn on
power supplies or enable signal/data generators until
all connections are completed.
Note: In the following sections, software-related items
are identified by bolding. Text in bold refers to items
directly from the EV kit software. Text in bold and
underlined refers to items from the Windows
98SE/2000/XP operating system.
MAX19713EVKIT+
MAX19712EVKIT+
MAX19711EVKIT+
MAX19710EVKIT+
Maxim MAX19712ETN+ (±6-
pin, 7mm x 7mm Thin QFN-EP)
U1
Maxim MAX19711ETN+ (±6-
pin, 7mm x 7mm Thin QFN-EP)
Maxim MAX19710ETN+ (±6-
pin, 7mm x 7mm Thin QFN-EP)
Quick Start
Recommended Equipment
Command Module Setup (CMODUSB)
• DC power supplies:
Analog (VDD)
1) Visit the Maxim website (www.maxim-ic.com/evkit-
software) to download the latest version of the EV
kit software. Save the EV kit software to a temporary
folder and uncompress the ZIP file.
+3.0V, 100mA
+3.0V, 100mA
+1.8V, 100mA
Clock (CVDD)
Digital (OVDD)
2) Install the EV kit software on your computer by run-
ning the INSTALL.EXE program inside the temporary
folder. The program files are copied and icons are
created in the Windows Start | Programs menu.
3) Place a shunt across pins 2-3 of the VDD select
jumper (command module working voltage set
to 3.3V).
Op-amp positive (VOP)
Op-amp negative (VON)
±.0V, 2±0mA
-±.0V, 2±0mA
• Signal generator with low phase noise and low jitter
for clock input signal (e.g., HP/Agilent 8662A,
HP/Agilent 8644B)
• Two signal generators with low phase noise for ana-
log signal inputs (e.g., HP/Agilent 8662A, HP/Agilent
8644B)
4) Connect a USB cable from the computer’s USB
port to the command module (CMODUSB) interface
board. Use a standard USB A-B cable. A Building
• Logic analyzer or data-acquisition system with one
data pod (e.g., HP/Agilent 16±00C, TLA621)
_______________________________________________________________________________________
3
MAX19710–MAX19713 Evaluation
Kits/Evaluation Systems
Driver Database window appears in addition to a
New Hardware Found message if this is the first
time the EV kit board is connected to the PC. If you
do not see a window that is similar to the one
described above after 30 seconds, remove the USB
cable from the CMODUSB and reconnect it.
Administrator privileges are required to install the
USB device driver on Windows 2000/XP. Refer to
the document TROUBLESHOOTING_USB.PDF
included with the software if you have any problems.
1±) Connect the output of the clock bandpass filter to
the EV kit SMA connector labeled CLOCK.
16) Connect the first analog signal generator to the
input of the desired bandpass filter.
17) Connect the output of the bandpass filter to the EV
kit SMA connector labeled IA (I channel).
18) Connect the second analog signal generator to the
input of the desired bandpass filter.
19) Connect the output of the bandpass filter to the EV
kit SMA connector labeled QA (Q channel).
±) Follow the directions of the Add New Hardware
Wizard to install the USB device driver. Choose the
Search for the best driver for your device option.
Specify the location of the device driver to be
C:\Program Files\MAX19713, \MAX19712,
\MAX19711, or \MAX19710 (default installation
directory) using the Browse button.
20) Ensure that all signal generators are phase-locked to a
common reference frequency for coherent sampling.
21) Connect the logic analyzer to J2. Use the bit labels
(AD_) located next to header J2 for proper bit align-
ment or see the Digital Data Bit Locations section
for header connections.
22) Set the logic analyzer to capture 10-bit CMOS data
on the falling edge for the I channel or the rising
edge for the Q channel.
23) Turn on the -±V power supply.
24) Turn on all remaining power supplies.
2±) Enable the signal generators.
26) Set the clock signal generator to output a 4±MHz
signal. The amplitude of the generator should
be sufficient to produce a +16dBm signal at the SMA
input of the EV kit. Insertion losses due to the
series-connected filter (step 14) and the inter-
connecting cables decrease the amount of power
seen at the EV kit input. Account for these losses
when setting the signal generator amplitude.
27) Set the analog input signal generators to output the
desired frequency. The amplitude of the generator
should produce a signal that is no larger than
+±dBm, as measured at the SMA input of the EV kit.
Insertion losses, due to the series-connected filters
(steps 17 and 19) and the interconnecting cables,
decrease the amount of power seen at the EV kit
input. Account for these losses when setting the
signal generator amplitude.
EV Kit Setup
6) Verify that shunts are installed in the following locations:
JU1 (1-2) → CS connected
JU1 (3-4) → SCLK connected
JU1 (±-6) → DIN connected
JU1 (7-8) → DOUT connected
JU2 (Installed) → Internal reference enabled
JU3 (1-2) → Power U2 with OVDD
7) Connect a +3.0V, 100mA power supply to VDD.
Connect the ground terminal of this supply to GND.
8) Connect a +3.0V, 100mA power supply to CVDD.
Connect the ground terminal of this supply to GND.
9) Connect a +1.8V, 100mA power supply to OVDD.
Connect the ground terminal of this supply to OGND.
10) Connect a +±V, 2±0mA power supply to VOP.
Connect the ground terminal of this supply to GND.
11) Connect a -±V, 2±0mA power supply to VON.
Connect the ground terminal of this supply to GND.
12) Carefully align the 40-pin connector of the EV kit
(J1) with the 40-pin header of the CMODUSB inter-
face board (P4). Gently press them together.
Evluate:0–MAX9713
28) Start the MAX19710–MAX19713 program by open-
ing its icon in the Start menu.
29) Normal device operation can be verified by the Status:
Interface Board Operational text in the Interface box
of the program.
13) The MAX19710–MAX19713 support two modes of
operation:
a. To connect a logic analyzer to the EV kit and
test the Rx ADCs, skip to step 14.
b. To connect a spectrum analyzer to the EV kit
and test the Tx DACs, skip to step 34.
30) Select the Maxim device that you are using from the
Device combo box.
31) Click the POR Reset button on the EV kit software
GUI.
32) Enable the logic analyzer.
33) Capture data using the logic analyzer.
Rx ADC Setup
14) Connect the clock signal generator to the input of
the clock bandpass filter.
4
_______________________________________________________________________________________
MAX19710–MAX19713 Evaluation
Kits/Evaluation Systems
Evluate:0–MAX9713
Tx DAC Setup
Detailed Description of Software
34) Connect the clock signal generator to the input of
User-Interface Panel
The user interface (Figure 1) is easy to operate; use the
mouse, or a combination of the Tab and arrow keys to
manipulate the software. Each of the buttons corre-
spond to bits in the command and configuration bytes
of the Maxim IC. By selecting them, the correct SPI
write operation is generated to update the internal reg-
isters of the MAX19710–MAX19713.
the clock bandpass filter.
3±) Connect the output of the clock bandpass filter to
the EV kit SMA connector labeled CLOCK.
36) Connect the output of the clock signal generator to
the data generator synchronization input.
37) Connect the first spectrum analyzer to the EV kit
SMA connector labeled QD (Q channel).
38) Connect the second spectrum analyzer to the EV kit
SMA connector labeled ID (I channel).
39) Connect the data generator to J3. Use the bit labels
(DA_) located next to header J3 for proper bit align-
ment, or see the Digital Data Bit Locations section
for header connections.
40) Turn on the -±V power supply.
41) Turn on all remaining power supplies.
42) Enable the signal generator.
43) Set the clock signal generator to output a 4±MHz
signal. The amplitude of the generator should be
sufficient to produce a +16dBm signal at the SMA
input of the EV kit. Insertion losses, due to the
series-connected filter (step 34) and the intercon-
necting cables, decrease the amount of power
seen at the EV kit input. Account for these losses
when setting the signal generator amplitude.
The software divides EV kit functions into logical
blocks. The Interface box indicates the Device, the
Register Address Sent, the Data Sent/Received for
the last write operation, and the SPI Clock Frequency.
This data is used to confirm proper device operation.
Adjust the SPI Clock Frequency through the combo
box. Use the Device combo box to select the proper
AFE and features.
The controls for the Tx DAC, Auxiliary DACs, and
Auxiliary ADC are accessed through tab sheets.
Device Control is accessed at the right-hand side of
the main window. Return the EV kit to its power-on-reset
state by selecting the POR Reset button.
The MAX19710–MAX19713 EV kit software features
additional functions to simplify operation. Automatic
Diagnostics probes the command module board to
make sure a connection exists between the PC and the
command module.
44) Load the desired test pattern into the data generator.
Data clocked on the rising edge of the clock is trans-
mitted to the Q channel. Data clocked on the falling
edge of the clock is transmitted to the I channel.
4±) Start the MAX19710–MAX19713 program by open-
ing its icon in the Start menu.
46) Normal device operation can be verified by the
Status: Interface Board Operational text in the
Interface box.
47) Select the Maxim device that you are using in the
Device combo box.
48) Click the POR Reset button on the EV kit software
GUI.
49) Enable the data generator.
±0) Enable the spectrum analyzers.
±1) Analyze the data on the EV kit outputs (QD and ID)
with the spectrum analyzers.
Figure 1. MAX19713 EV Kit Software Main Window
_______________________________________________________________________________________
5
MAX19710–MAX19713 Evaluation
Kits/Evaluation Systems
The DAC I-Offset and Q-Offset voltages can be adjust-
Device Control
Configure the operating mode of the device through the
intuitive controls in the Device Control box. Select a
mode, as outlined in the MAX19710, MAX19711,
MAX19712, MAX19713 data sheets, using the
Operating Mode control. For a detailed description of
the MAX19710–MAX19713 operating modes and their
specific names, refer to Table 4 in the MAX19710,
MAX19711, MAX19712, and MAX19713 data sheets.
ed in 800µV increments by adjusting the appropriate
slider in the Tx DAC Offset Control box. The
MAX19711 allows for two adjustable full-scale ranges
of 820mV
(yields 800µV increments), and a full-scale
P-P
range of 1.0V
(yields 980µV increments). The
P-P
MAX19710/MAX19712/MAX19713 only allow one full-
scale range of 800mV , which yields 780µV incre-
P-P
ments. Alternatively, a value (specified in millivolts) can
be directly entered in the boxes below each slider. If no
value has been entered, 0.800/0.980 is used. The soft-
ware automatically rounds the number to the nearest
800µV/980µV increment and sends the proper data to
the MAX19710–MAX19713.
The MAX19710–MAX19713 feature an 8-bit SPI signaling
mode to increase communications speed. Check the Use
Enable-8 Signaling checkbox to use this mode. Refer to
the MAX19710, MAX19711, MAX19712, and MAX19713
data sheets for more details on Enable-8 signaling.
Auxiliary DAC Control
Access the MAX19710–MAX19713 auxiliary DACs
through the Auxiliary DACs tab of the EV kit software
(Figure 2). Set the output voltage of the desired auxiliary
DAC by adjusting the Aux-DAC 1, Aux-DAC 2, or Aux-
DAC 3 sliders. Enter a number in the edit box below the
slider for precise adjustments. Enable each DAC by
setting the checkbox below the slider.
Tx DAC Control
Adjust the Common Mode Voltage and the DAC Full
Scale voltage by selecting the desired option from the
pulldown box. Note that the DAC Full Scale control is
only available when using the MAX19711. The DAC full-
scale output of the MAX19710, MAX19712, and
MAX19713 is fixed. Refer to the respective data sheet for
more details.
Evluate:0–MAX9713
Figure 2. MAX19713 EV Kit Software Auxiliary DAC Control
6
_______________________________________________________________________________________
MAX19710–MAX19713 Evaluation
Kits/Evaluation Systems
Evluate:0–MAX9713
Data bytes to be written: edit box is sent to the
device. Eight-bit hexadecimal numbers should be
comma delimited. Data appearing in the Data bytes
received: box is data read from the device.
Selecting the Send Now button in Figure 4 transmits
the hexadecimal numbers 0x±± and 0xAA. 0x00 and
0x00 are the received values from the device. For a
detailed description of SPI communications, refer to the
MAX19710, MAX19711, MAX19712, and MAX19713
data sheets.
Auxiliary ADC Controls
Access the MAX19710–MAX19713 auxiliary ADC through
the Auxiliary ADC tab (Figure 3) of the EV kit software.
Although these AFEs feature only one 10-bit, low-speed
ADC, they can multiplex four voltages onto their input.
Select the desired ADC Input Source in the ADC
Conversion box. Read the CODE and VOLTAGE of the
ADC by selecting the Start Conversion and Read ADC
Value button.
Other ADC features, such as ADC Averaging and
Conversion Clock Divide Ratio, are accessed
through the ADC Control box. Disable the auxiliary
ADC by checking the Shutdown Auxiliary ADC
checkbox. These AFEs can use either the Internal
2.048V reference or VDD (Internal VDD) for the auxil-
iary ADC reference. If VDD is used for the reference
voltage, enter the value of VDD in the box beside the
Internal VDD checkbox.
Detailed Description of Hardware
The MAX19710–MAX19713 EV kits are fully assembled
and tested PCBs that contain all the components nec-
essary to evaluate the performance of the MAX19710,
MAX19711, MAX19712, or MAX19713 AFEs.
The AFE’s receive ADCs (Rx ADCs) accept differential
input signals; however, on-board transformers (T1, T2)
convert a user’s single-ended source output to the
required differential signal. The input signals of the
MAX19710–MAX19713 are measured using a differential
oscilloscope probe at headers J4 and J±. A buffer/driver
(U2) buffers the parallel ADC digital output signals. The
digital ADC data is accessible at header J2.
Simple SPI Commands
There are two methods for communicating with the
AFEs: through the normal GUI panel, or through the SPI
commands available by selecting the 3-Wire Interface
Diagnostic item from the Options pulldown menu. A
window is displayed that executes an SPI read/write
operation.
The AFE’s transmit DACs (Tx DACs) are buffered with
on-board ultra-low-distortion, split-supply op amps.
The SPI (3-Wire Interface) dialog box accepts numeric
data in hexadecimal format. Hexadecimal numbers
should be prefixed by a $ or 0x. Data entered in the
The EV kits are designed as four-layer PCBs to optimize
the performance of the MAX19710–MAX19713.
Figure 4. MAX19713 EV Kit Software 3-Wire Interface
Diagnostics
Figure 3. MAX19713 EV Kit Software Auxiliary ADC Control
_______________________________________________________________________________________
7
MAX19710–MAX19713 Evaluation
Kits/Evaluation Systems
Separate analog, digital, clock, and buffer power planes
minimize noise coupling between analog and digital sig-
nals. Analog ADC inputs and DAC outputs use 100Ω
differential microstrip transmission lines, while ±0Ω
microstrip transmission lines are used for all digital out-
puts and the clock input. The trace lengths of the ADC
input and DAC output paths are well matched to mini-
mize layout-dependent input-signal skew.
clock voltage supply (CVDD) is set to +3.0V. The clock
signal is available at J2-3 (CLKOUT), which can be used
to synchronize the output signal to the logic analyzer.
Measure the clock signal with an oscilloscope at TP3.
Rx ADC Inputs
Although the MAX19710–MAX19713 AFEs accept differ-
ential analog input signals, the EV kits only require a
single-ended analog input signal provided by the user.
Connect the single-ended sources to the IA SMA con-
nector (I channel) and QA SMA connector (Q channel).
Insertion losses due to series-connected bandpass
filters and the interconnecting cables decrease the
amount of power seen at the EV kit input. Account for
these losses when setting the signal generator
amplitude. On-board transformers (T1, T2) convert the
single-ended analog input signals and generate differ-
ential analog signals at the ADC’s differential input pins.
The AFEs also accept single-ended input signals. See
the Configuring for Single-Ended ADC Operation sec-
tion for details on how to modify the EV kits to support
this mode of operation.
Power Supplies
For optimal performance, the MAX19710–MAX19713
EV kits require separate analog, digital, clock, and
buffer power supplies; however, two separate +3.0V
and +1.8V power supplies are recommended to power
the analog (VDD) and digital (OVDD) portions of the
AFEs, respectively. The clock circuitry (CVDD) is pow-
ered by a +3.0V power supply. The DAC outputs are
buffered by split-supply op amps. Power the positive
rail (VOP) with a +±V supply and the negative rail
(VON) with a -±V supply. A separate +1.8V power sup-
ply (BVCC) can be used to isolate the power source to
the buffer driver (U2). See Table 1 for the proper
jumper configurations for JU3.
Configuring for Single-Ended ADC Operation
The MAX19710–MAX19713 can be configured to
accept AC-coupled, single-ended signals presented at
the input. Configure the EV kit to support this mode of
operation by completing the following steps:
Table 1. U2 Power Source (JU3)
SHUNT
POSITION
DESCRIPTION
1-2*
2-3
U2 is powered through OVDD.
1) Cut open the traces at locations R11–R14.
2) Install 0Ω resistors at locations R7–R10, R1±,
and R16.
U2 is powered through BVCC.
(Note: BVCC must equal OVDD.)
*Default configuration.
3) Install 2kΩ ±1ꢀ resistors at locations R21–R24.
Evluate:0–MAX9713
4) Connect the single-ended sources to the IAP
connector (I channel) and/or to the QAP SMA
connector (Q channel).
If the OVDD current is measured at the OVDD and
OGND pads on the EV kit, a measurement error occurs
due to the extra current flowing into U2. Power U2
through BVCC for a more accurate measurement of the
OVDD current into the AFEs.
Configure the EV kit for DC-coupled, single-ended sig-
nals by removing capacitors C1 and C2, removing resis-
tors R9 and R10, and installing 0Ω resistors at locations
R± and R6.
Clock
An on-board clock-shaping circuit generates a clock
signal from an AC sine-wave signal applied to the
CLOCK SMA connector. The frequency of the signal
should not exceed 4±MHz for the MAX19713 (see the
Part Selection Table for the maximum sampling rate of
other devices). The frequency of the sinusoidal input
Tx DAC Outputs
By default, on-board ultra-low-distortion op amps (U4 and
U±) buffer the DAC outputs on the MAX19710–
MAX19713 EV kits. The op amps convert the differential
signal from the AFEs to a single-ended ±0Ω signal.
Measure the buffered output signals at the QD SMA con-
nector (Q channel) and the ID SMA connector
(I channel).
signal determines the sampling frequency (f
) of the
CLK
AFEs. A differential line receiver (U3) processes the
input signal to generate the CMOS clock signal. The
signal’s duty cycle can be adjusted with potentiometer
R63. A clock signal with a ±0ꢀ duty cycle (recom-
mended) is achieved by adjusting R63 until 1.32V is
produced across test points TP4 and TP± when the
Measure the differential output of the AFEs at the
IDN/IDP and QDN/QDP pads. Full-scale output, offset
voltage, and common-mode voltage functions are con-
trolled through the EV kit software.
8
_______________________________________________________________________________________
MAX19710–MAX19713 Evaluation
Kits/Evaluation Systems
Evluate:0–MAX9713
Reference
The MAX19710–MAX19713 feature two reference oper-
ation modes. The EV kits can be configured to use
either the internal (1.024V) reference or an external
user-supplied reference applied at the REFIN pad. The
AFEs generate the REFP and REFN voltages from the
selected reference voltage (refer to the MAX19710,
MAX19711, MAX19712, and MAX19713 data sheets for
more details). Measure the REFP and REFN voltages at
TP1 and TP2, respectively. Jumper JU2 controls the ref-
erence mode. See Table 2 for jumper configurations.
Digital Data Headers
The MAX19710–MAX19713 EV kits feature two 10-bit
parallel data buses used for full-duplex operation. The two
data buses are accessed on the EV kit through header
connectors J2 (Rx ADC bus) and J3 (Tx DAC bus).
Digital Data Bit Locations
Driver U2 buffers the digital outputs of the Rx ADC. This
driver is able to drive large capacitive loads, which may
be present at the logic analyzer connection. The out-
puts of the buffer are connected to a 40-pin header
(J2). The 20-pin header (J3) is used to connect to the
digital input of the Tx DAC. See Table 3 for bit locations
on headers J2 and J3.
Table 2. Reference Shunt Settings (JU2)
SHUNT POSITION
DESCRIPTION
Configuring the Low-Speed DAC Buffers
The MAX19710–MAX19713 EV kits feature on-board
configurable buffers. By default, these buffers are config-
ured for unity gain. Measure the buffered voltage at the
BDAC1, BDAC2, and BDAC3 pads. Measure the
unbuffered voltage at the DAC1, DAC2, and DAC3 pads.
Installed*
Internal reference mode.
External reference mode.
Apply an external reference voltage to
the REFIN pad.
Not installed
*Default configuration.
Table 3. Digital Data Bit Locations
SIGNAL
AD0
LOCATION
TYPE
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
DESCRIPTION
Data Bit 0 (LSB)
Data Bit 1
J2-37
J2-3±
J2-33
J2-31
J2-29
J2-27
J2-2±
J2-23
J2-21
J2-19
J2-3
AD1
AD2
Data Bit 2
AD3
Data Bit 3
AD4
Data Bit 4
AD±
Data Bit ±
AD6
Data Bit 6
AD7
Data Bit 7
AD8
Data Bit 8
AD9
Data Bit 9 (MSB)
Incoming Clock Signal
CLKOUT
Aux-ADC Digital Output
(requires R38 short)
BDOUT
J2-9
Output
DA0
DA1
DA2
DA3
DA4
DA±
DA6
DA7
DA8
DA9
J3-19
J3-17
J3-1±
J3-13
J3-11
J3-9
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Data Bit 0 (LSB)
Data Bit 1
Data Bit 2
Data Bit 3
Data Bit 4
Data Bit ±
J3-7
Data Bit 6
J3-±
Data Bit 7
J3-3
Data Bit 8
J3-1
Data Bit 9 (MSB)
Note: Pins 1, ±, 7, 11, 13, 1±, 17, and 39 of J2 are open. All other pins are connected to OGND.
_______________________________________________________________________________________
9
MAX19710–MAX19713 Evaluation
Kits/Evaluation Systems
Configure the on-board buffers for a positive (noninverting)
gain by performing the following steps:
Disconnect the buffers from the AFEs by cutting the
trace at locations R28, R29, and R30. Connect the low-
speed DAC loads to the DAC1, DAC2, and DAC3 pads
on the EV kit. If the load capacitance is between ±pF
and 1±pF, cut the trace and install 10kΩ resistors at
locations R2±, R26, and R27. Resistors are not required
if the load is less than ±pF.
1) Cut open the trace at locations R31, R33, and R3±.
2) Select a value of 10kΩ for resistors R32, R34, and
R36.
3) Calculate resistors R31, R33, and R3± using the
equations below.
Using an Alternative SPI Interface
The EV kits provide pads and jumpers that allow an
alternative SPI interface to be used. Connect the inter-
face to the CS, SCLK, DIN, DOUT, and OGND pads.
Ensure that the SPI voltages are compatible with all of
the AFE’s working voltages. Refer to the individual
MAX19710, MAX19711, MAX19712, and MAX19713
data sheets for suitable SPI interface voltages. Remove
the shunts from jumper JU1. See Table 4 for jumper
configurations.
4) Install R31, R33, and R3± in their respective locations:
BDAC1
DAC1
⎡
⎤
R
R
R
= R
x
−1
⎥
31
33
3±
32
⎢
⎣
⎦
BDAC2
DAC2
⎡
⎤
= R
= R
x
−1
34
⎢
⎥
⎣
⎦
Table 4. Alternative SPI Interface (JU1)
BDAC3
DAC3
⎡
⎤
x
−1
SHUNT POSITION
DESCRIPTION
36
⎢
⎥
⎣
⎦
1-2*
3-4*
±-6*
7-8*
Normal Operation.
Four shunts are installed across
pins 1-2, 3-4, ±-6, and 7-8.
where:
BDAC_
= Desired noninverting gain of buffer
DAC_
Alternative SPI Interface.
No shunts are installed on JU1, connect
the SPI signals to the CS, SCLK, DIN,
DOUT, and OGND pads.
R
32
= R = R = 10kΩ
Not installed
34
36
Driving Unbuffered Loads
The low-speed buffers (U6) on the EV kits are optional and,
if desired, can be disconnected from the DAC outputs of
the AFEs.
Evluate:0–MAX9713
*Default configuration.
10 ______________________________________________________________________________________
MAX19710–MAX19713 Evaluation
Kits/Evaluation Systems
Evluate:0–MAX9713
A D 9
A D 8
A D 9
A D 8
A D 7
A D 6
A D 5
A D 4
A D 3
A D 2
A D 1
A D 0
D D
O V
A D 7
A D 6
A D 5
A D 4
A D 3
A D 2
A D 1
A D 0
D D
V
D D
V
D D
V
D D
V
D D
V
D D
V
D D
V
Figure ±a. MAX19710 EV Kit Schematic (Sheet 1 of 2)
______________________________________________________________________________________ 11
MAX19710–MAX19713 Evaluation
Kits/Evaluation Systems
A D 9
A D 8
A D 9
A D 8
A D 7
A D 6
A D 5
A D 4
A D 3
A D 2
A D 1
A D 0
D D
O V
A D 7
A D 6
A D 5
A D 4
A D 3
A D 2
A D 1
A D 0
D D
V
D D
V
Evluate:0–MAX9713
D D
V
D D
V
D D
V
D D
V
D D
V
Figure ±b. MAX19711 EV Kit Schematic (Sheet 1 of 2)
12 ______________________________________________________________________________________
MAX19710–MAX19713 Evaluation
Kits/Evaluation Systems
Evluate:0–MAX9713
A D 9
A D 8
A D 9
A D 8
A D 7
A D 6
A D 5
A D 4
A D 3
A D 2
A D 1
A D 0
D D
O V
A D 7
A D 6
A D 5
A D 4
A D 3
A D 2
A D 1
A D 0
D D
V
D D
V
D D
V
D D
V
D D
V
D D
V
D D
V
Figure ±c. MAX19712 EV Kit Schematic (Sheet 1 of 2)
______________________________________________________________________________________ 13
MAX19710–MAX19713 Evaluation
Kits/Evaluation Systems
A D 9
A D 8
A D 9
A D 8
A D 7
A D 6
A D 5
A D 4
A D 3
A D 2
A D 1
A D 0
D D
O V
A D 7
A D 6
A D 5
A D 4
A D 3
A D 2
A D 1
A D 0
D D
V
D D
V
Evluate:0–MAX9713
D D
V
D D
V
D D
V
D D
V
D D
V
Figure ±d. MAX19713 EV Kit Schematic (Sheet 1 of 2)
14 ______________________________________________________________________________________
MAX19710–MAX19713 Evaluation
Kits/Evaluation Systems
Evluate:0–MAX9713
C C
V
G N D
AM9X13
Figure 6. MAX19710–MAX19713 EV Kit Schematic (Sheet 2 of 2)
______________________________________________________________________________________ 15
MAX19710–MAX19713 Evaluation
Kits/Evaluation Systems
Evluate:0–MAX9713
Figure 7. MAX19710–MAX19713 EV Kit Component Placement Guide—Component Side
16 ______________________________________________________________________________________
MAX19710–MAX19713 Evaluation
Kits/Evaluation Systems
Evluate:0–MAX9713
Figure 8. MAX19710–MAX19713 EV Kit PCB Layout—Component Side
______________________________________________________________________________________ 17
MAX19710–MAX19713 Evaluation
Kits/Evaluation Systems
Evluate:0–MAX9713
Figure 9. MAX19710–MAX19713 EV Kit PCB Layout (Inner Layer 2)—Ground Planes
18 ______________________________________________________________________________________
MAX19710–MAX19713 Evaluation
Kits/Evaluation Systems
Evluate:0–MAX9713
Figure 10. MAX19710–MAX19713 EV Kit PCB Layout (Inner Layer 3)—Power Planes
______________________________________________________________________________________ 19
MAX19710–MAX19713 Evaluation
Kits/Evaluation Systems
Evluate:0–MAX9713
Figure 11. MAX19710–MAX19713 EV Kit PCB Layout—Solder Side
20 ______________________________________________________________________________________
MAX19710–MAX19713 Evaluation
Kits/Evaluation Systems
Evluate:0–MAX9713
Figure 12. MAX19710–MAX19713 EV Kit Component Placement Guide—Solder Side
___________________Revision History
Pages changed at Rev 1: 1–6, 8, 9, 11–18
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 21
© 2007 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
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