MAX20010E [MAXIM]
Automotive Single 6A Step-Down Converters;
| 型号： | MAX20010E |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Automotive Single 6A Step-Down Converters |
| 文件： | 总23页 (文件大小：803K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
General Description
Benefits and Features
The MAX20010C/MAX20010D/MAX20010E ICs are high-
efficiency, synchronous step-down converters that oper-
ate with a 3.0V to 5.5V input voltage range and provide
a 0.5V to 1.5875V output voltage range. The wide input/
output voltage range and the ability to provide up to 6A
load current make these ICs ideal for on-board point-of-
load and post-regulation applications. The ICs achieve
±2% output error over load, line, and temperature ranges.
The MAX20010D/MAX20010E offers improved transient
response.
● Fully Integrated, Synchronous 6A DC-DC Converter
Enables Small Solution Size
• 3.0V to 5.5V Operating Supply Voltage
● High-Precision Voltage Regulator for Applications
Processors
• ±2% Output-Voltage Accuracy
• Differential Remote Voltage Sensing
2
• I C-Controlled Output Voltage of 0.5V to 1.27V in
10mV Steps, or 0.625V to 1.5875V in 12.5mV
Steps
The ICs feature a 2.2MHz fixed-frequency PWM mode for
better noise immunity and load-transient response, and a
pulse-frequency modulation mode (skip) for increased ef-
ficiency during light-load operation. The 2.2MHz frequen-
cy operation allows the use of all-ceramic capacitors and
minimizes the solution footprint. The programmable
spread-spectrum frequency modulation minimizes radiat-
• Excellent Load-Transient Performance
● Low-Noise Feature Reduces EMI
• 2.2MHz Operation
• Spread-Spectrum Option
• Frequency-Synchronization Input/Output
• Current-Mode, Forced-PWM, and Skip Operation
● Robust for the Automotive Environment
• PGOOD Output
ed electromagnetic emissions. Integrated low
RDS(ON)
switches improve efficiency at heavy loads and make the
layout a much simpler task with respect to discrete solu-
tions.
• Overtemperature and Short-Circuit Protection
• 20-Pin (4mm x 4mm) TQFN with an Exposed Pad
• -40°C to +125°C Operating Temperature Range
• AECQ-100 Qualified
The ICs are offered with factory-preset output voltages
2
(see the Ordering Information for options). The I C inter-
face supports dynamic voltage adjustment with program-
mable slew rates. Other features include programmable
soft-start, overcurrent, and overtemperature protections.
Ordering Information appears at end of data sheet.
Typical Application Circuits
PV
Applications
PV
RS+
● Automotive
PGND
AV
MAX20010C
MAX20010D
MAX20010E
PV
LX
VOUT
PGND
RS-
GND
SYNC
EN
ADDR
SCL
SDA
PG
EP
19-100153; Rev 6; 2/20
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
Absolute Maximum Ratings
PV, AV to GND......................................................... -0.3V to +6V
Continuous Power Dissipation (T = +70°C)
A
ADDR, EN, PG, RS+, RS-, SYNC to GND....-0.3V to V + 0.3V
SDA, SCL to GND .................................................... -0.3V to +6V
GND to PGND ....................................................... -0.3V to +0.3V
TQFN (derate 30.3mW/°C above +70°C).................2424.2mW
Operating Temperature Range...........................-40°C to +125°C
Junction Temperature.......................................................+150°C
Storage Temperature Range ..............................-65ºC to +150ºC
Lead Temperature (soldering, 10s)...................................+300ºC
Soldering Temperature (reflow) ........................................+260ºC
AV
LX to PGND (Note 1).....................................-0.3V to V + 0.3V
PV
Output Short-Circuit Duration ..................................... Continuous
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the
device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Package Information
20 TQFN-EP
Package Code
T2044+4C
21-100172
90-0409
Outline Number
Land Pattern Number
20 SW TQFN-EP
Package Code
T2044Y+4C
21-100068
90-0409
Outline Number
Land Pattern Number
THERMAL RESISTANCE, SINGLE-LAYER BOARD
Junction-to-Ambient (θ
)
33°C/W
2°C/W
JA
Junction-to-Case Thermal Resistance (θ
)
JC
Note 1: Self-protected against transient voltages exceeding these limits for ≤ 50ns under normal operation and loads up
to the maximum rating output current.
Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7,
using a four-layer board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages.
Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different
suffix character, but the drawing pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a
four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/
thermal-tutorial.
Electrical Characteristics
(V
= V
= 5.0V. T = T = -40°C to +125°C, unless otherwise noted. Typical values are at T = +25°C under normal conditions,
AV A J A
PV
unless otherwise noted.) (Note 3 )
PARAMETER
SYMBOL
CONDITIONS
Fully operational
MIN
TYP
MAX
5.5
3
UNITS
Supply Voltage Range
V
IN
3.0
V
Rising
Falling
2.85
2.55
Undervoltage Lockout
UVLO
V
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Maxim Integrated | 2
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
Electrical Characteristics (continued)
(V
= V
= 5.0V. T = T = -40°C to +125°C, unless otherwise noted. Typical values are at T = +25°C under normal conditions,
AV A J A
PV
unless otherwise noted.) (Note 3 )
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
2.5
MAX
UNITS
T
T
= +25°C
5
Shutdown Supply
Current
A
I
I
EN = low
µA
IN
= +125°C
4.5
A
EN = high, I
skip mode
= 0mA,
OUT
Supply Current
300
µA
IN
PWM Switching
Frequency
f
Internally generated
CONFIG.SS = 1
2.0
2.2
+3
2.4
MHz
%
SW
Spread Spectrum
I
= 0A to 6A,
0.80V to
1.5875V
LOAD
-2
+2
%
3.0V ≤ V ≤ 5.5V
PV
Voltage Accuracy
V
OUT
I
= 0A to 6A,
0.50V to
0.79V
LOAD
-16
+21
mV
3.0V ≤ V ≤ 5.5V
PV
pMOS On-Resistance
nMOS On-Resistance
V
= V = 5V, I = 1A
31
18
55
31
mΩ
mΩ
PV
PV
AV
LX
V
= V = 5V, I = 1A
AV
LX
pMOS Current-Limit
Threshold
7.76
9.70
60
11.64
A
nMOS Zero Crossing
Threshold
mA
V
= V
T
T
= +25°C
0.5
4
5
PV
AV
A
LX Leakage Current
= 6V, LX =
PGND or PV
µA
= +125°C
A
Duty-Cycle Range
PWM mode
100
75
%
Minimum On-Time
36
ns
THERMAL OVERLOAD
Thermal-Shutdown
Temperature
T rising
J
165
15
°C
°C
Hysteresis
POWER-GOOD OUTPUT (PG)
Percentage of
nominal output,
output voltage
rising, blanked
during slewing
0.5V < V
< 0.79V
OUT
OUT
104
105
88
108
108
92
112
111
96
PG Overvoltage (OV)
Threshold, Rising
%
%
0.8V < V
< 1.5875V
Percentage of
nominal output,
output
voltage falling,
blanked during
slewing
0.5V < V
< 0.79V
OUT
PG Undervoltage (UV)
Threshold, Falling
0.8V < V
< 1.5875V
OUT
89
92
95
Active Timeout Period
256
5
Clocks
µs
UV/OV Propagation
Delay
PG Output High-
Leakage Current
1
µA
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Maxim Integrated | 3
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
Electrical Characteristics (continued)
(V
= V
= 5.0V. T = T = -40°C to +125°C, unless otherwise noted. Typical values are at T = +25°C under normal conditions,
AV A J A
PV
unless otherwise noted.) (Note 3 )
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
3.0V ≤ V ≤ 5.5V, 3.0V ≤ V
PV
≤ 5.5V, sinking -2mA
AV
PG Output Low Level
0.2
V
DIGITAL INPUTS (SYNC, EN, ADDR)
Input High Level
Input Low Level
Input Hysteresis
V
1.5
V
V
V
IH
V
0.5
IL
0.1
0.1
EN Input Leakage
Current
0V ≤ V ≤ 5.5V,
PV
µA
0V ≤ V ≤ 5.5V
AV
Enable Time
Rising EN to beginning of soft-start
140
100
µs
SYNC Input Pulldown
150
2.6
kΩ
SYNC Input Frequency
Range
1.8
MHz
SYNC OUTPUT
Output Low
V
I
= 3mA
SINK
0.4
0.5
V
V
OL
Output High
V
OH
V
= V = 5.0V, I = 3mA
SOURCE
4.2
1.3
PV
AV
DIGITAL INPUTS (SDA, SCL)
Input High Level
Input Low Level
Input Hysteresis
V
V
V
V
IH_I2C
V
IL_I2C
0.1
0.1
0V ≤ V ≤ 5.5V,
0V ≤ V ≤ 5.5V
PV
Input Leakage Current
µA
AV
2
I C INTERFACE
Clock Frequency
f
3.4
MHz
ns
SCL
Setup Time (Repeated)
START
t
(Note 4)
(Note 4)
160
160
SU:STA
Hold Time (Repeated)
START
t
ns
HD:STA
SCL Low Time
SCL High Time
Data Setup Time
Data Hold Time
t
(Note 4)
(Note 4)
(Note 4)
(Note 4)
160
60
50
0
ns
ns
ns
ns
LOW
t
HIGH
t
SU:DAT
HD:DAT
t
t
70
Setup Time for STOP
Condition
(Note 4)
(Note 4)
160
ns
SU:STO
Spike Suppression
SDA Output Low
20
ns
V
V
I
= 13mA
SINK
0.4
OL_SDA
Note 1: All units are 100% production tested at T = +25°C. All temperature limits are guaranteed by design.
A
Note 2: Guaranteed by design. Not production tested.
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Maxim Integrated | 4
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
Typical Operating Characteristics
(T = +25°C, unless otherwise noted.)
A
LOAD-TRANSIENT RESPONSE (PWM)
toc06
SUPPLY CURRENT vs. INPUT VOLTAGE (SKIP)
SUPPLY CURRENT vs. TEMPERATURE (PWM)
toc04
toc05
400
33
32
31
30
29
28
27
CONFIG BIT3 = 0
380
ILOAD = 0A
360
340
320
300
280
260
240
220
200
VOUT = 0.95V
50mV/div
(AC-
COUPLED)
VOUT
4.2A
0A
ILOAD
CONFIG BIT3 = 1
VIN = 5V
ILOAD = 0A
VOUT = 0.95V
20μs/div
3
3.5
4
4.5
5
5.5
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
INPUT VOLTAGE (V)
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Maxim Integrated | 5
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
Typical Operating Characteristics (continued)
(T = +25°C, unless otherwise noted.)
A
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Maxim Integrated | 6
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
Pin Configuration
TOP VIEW
15
14
13
12
11
16
10
9
AV
RS-
SCL
SDA
ADDR 17
MAX20010C
MAX20010D
MAX20010E
PV
18
19
20
8
7
PV
PV
PGND
PGND
6
+
1
2
3
4
5
TQFN
(4mm x 4mm)
Pin Description
PIN
NAME
FUNCTION
Inductor Connection. Connect LX to the switched side of the inductor. Connect all LX pins
together.
1–4
LX
5–7
8
PGND
SDA
SCL
RS-
Power Ground. Connect all PGND pins together.
2
I C Data I/O
2
9
I C Clock Input
10
11
Buck Regulator Remote Voltage-Sense Negative Input
Buck Regulator Remote Voltage-Sense Positive Input
RS+
Open-Drain Power-Good Output. This output remains low for 120μs after the output has reached
its regulation level (see the Electrical Characteristics table). To obtain a logic signal, pull up PG
with an external resistor.
12
13
PG
EN
Active-High Enable Input. When EN is high, the device enters soft-start. When EN is low, the
device enters soft-shutdown.
SYNC I/O. When configured as an input, connect SYNC to GND or leave unconnected to enable
skipmode operation under light loads. Connect SYNC to AV or an external clock to enable fixed-
frequency, forced-PWM (FPWM) mode operation. When configured as an output, connect SYNC
to other devices’ SYNC inputs.
14
SYNC
15
16
GND
AV
Analog Ground
Analog Input Supply. Filter AV using a 100Ω resistor from PV and a 1μF ceramic capacitor from
AV to GND.
2
2
17
ADDR
PV
I C Address Select. See the Ordering Information table for default I C settings.
Power Input Supply. Connect a 4.7μF or larger ceramic capacitor from PV to PGND. Connect all
PV pins together.
18–20
Exposed Pad. Connect EP to ground. Connecting the exposed pad to ground does not remove the
requirement for proper ground connections to PGND. The exposed pad is attached with epoxy to
the substrate of the die, making it an excellent path to remove heat from the IC.
-
EP
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Maxim Integrated | 7
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
Detailed Description
The MAX20010C/MAX20010D/MAX20010E ICs are high-efficiency, synchronous step-down converters that operate with
a 3.0V to 5.5V input voltage range and provide a 0.5V to 1.5875V output voltage range. The ICs deliver up to 6A of
load current and achieve ±2% output error over load, line, and temperature ranges. The MAX20010D/MAX20010E offers
improved transient performance.
Optional spread-spectrum frequency modulation minimizes radiated electromagnetic emissions due to the switching
2
frequency. The I C-programmable I/O (SYNC) enables system synchronization.
Integrated low R
switches help improve efficiency at heavy loads and make the layout a much simpler task with
DS(ON)
respect to discrete solutions. The ICs are offered with a factory-preset output voltage that is dynamically adjustable
2
through the I C interface. The output voltage can be set to any desired value between 0.5V and 1.27V in 10mV steps,
and between 0.625V and 1.5875V in 12.5mV steps.
Additional features include adjustable soft-start, power-good delay, DVS rate, overcurrent, and overtemperature
protections (see Figure 1).
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Maxim Integrated | 8
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
MAX20010C
MAX20010D
MAX20010E
CURRENT-SENSE
AMP
PV
SKIP CURRENT
COMP
CLK
PV
PEAK CURRENT
COMP
RAMP
GENERATOR
∑
LX
PGND
PV
CONTROL
LOGIC
PWM COMP
COMP
PGND
CURRENT-LIMIT
COMP
VID[6:0]
VREF
FPWM CLK
EAMP
PGND
7-BIT DAC
PGOOD
COMP
RS+
RS-
POK
VREF
VSTEP
VPVA
UVLO
AV
CLK
SYNC
SS
OSC
CLK180
FPWM
GND
VOLTAGE
REFERENCE
VREF
P-OK
AGND
PG
EN
SDA
I2C AND
CONTROL
LOGIC
SCL
ADDR
VID[6:0]
Figure 1. Internal Block Diagram
2
I C Interface
2
The ICs feature an I C, 2-wire serial interface consisting of a serial-data line (SDA) and serial-clock line (SCL). SDA
and SCL facilitate communication between the ICs and the master at clock rates up to 3.4MHz. The master, typically a
microcontroller, generates SCL and initiates data transfer on the bus. Figure 2 shows the 2-wire interface timing diagram.
A master device communicates with the ICs by transmitting the proper address followed by the data word. Each transmit
sequence is framed by a START (S) or Repeated START (Sr) condition and a STOP (P) condition. Each word transmitted
over the bus is 8 bits long and is always followed by an acknowledge clock pulse.
The SDA line operates as both an input and an open-drain output. A pullup resistor greater than 500Ω is required on the
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Maxim Integrated | 9
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
SDA bus. The SCL line operates as an input only. A pullup resistor greater than 500Ω is required on SCL if there are
multiple masters on the bus, or if the master in a single-master system has an open-drain SCL output. Series resistors in
line with SDA and SCL are optional. The SCL and SDA inputs suppress noise spikes to assure proper device operation
even on a noisy bus.
SDA
tBUF
tSU, DAT
tLOW
tSU,STA
tSP
tSU,STO
tHD,DAT
tHD,DAT
SCL
tHIGH
tHD,STA
tR
tF
START CONDITION
REPEATED START
CONDITION
STOP
CONDITION
START
CONDITION
2
Figure 2. I C Timing Diagram
Bit Transfer
One data bit is transferred during each SCL cycle. The data on SDA must remain stable during the high period of the
SCL pulse. Changes in SDA while SCL is high are control signals (see the START and STOP Conditions section). SDA
and SCL idle high when the I2C bus is not busy.
START and STOP Conditions
A master device initiates communication by issuing a START condition. A START condition is a high-to-low transition on
SDA with SCL high. A STOP condition is a low-to-high transition on SDA while SCL is high (Figure 3).
A START (S) condition from the master signals the beginning of a transmission to the IC. The master terminates
transmission, and frees the bus, by issuing a STOP (P) condition. The bus remains active if a Repeated START (Sr)
condition is generated instead of a STOP condition.
S
Sr
P
SCL
SDA
Figure 3. START, STOP, and Repeated START Conditions
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Maxim Integrated | 10
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
Early STOP Condition
The ICs recognize a STOP condition at any point during data transmission, except if the STOP condition occurs in the
same high pulse as a START condition.
Clock Stretching
2
2
In general, the clock-signal generation for the I C bus is the responsibility of the master device. The I C specification
allows slow slave devices to alter the clock signal by holding down the clock line. The process in which a slave device
holds down the clock line is typically called clock stretching. The ICs do not use any form of clock stretching to hold down
the clock line.
2
I C General Call Address
The ICs do not implement the I C specification’s “general call address.” If the IC sees the general call address
2
(0b0000_0000), it does not issue an acknowledge.
Slave Address
2
Once the device is enabled, the I C slave address is defined as the 7 most significant bits (MSBs) followed by the R/W
bit which completes the 8-bit I C transaction. Set the R/W bit to 0 to configure the IC to write mode. Set the R/W bit to 1
2
to configure the IC to read mode. The address is the first byte of information sent to the device after the START condition.
2
2
The ADDR pin (A0) can be used to change the default I C slave address. See Table 1 for the 7-bit I C slave addresses
and the 8-bit Write/Read addresses.
Acknowledge
The acknowledge bit (ACK) is a clocked 9th bit that the ICs use to handshake receipt each byte of data (Figure 4). The
device pulls down SDA during the master-generated 9th clock pulse. The SDA line must remain stable and low during
the high period of the acknowledge clock pulse. Monitoring ACK allows for detection of unsuccessful data transfers.
An unsuccessful data transfer occurs if a receiving device is busy or if a system fault has occurred. In the event of an
unsuccessful data transfer, the bus master can reattempt communication.
CLOCK PULSE FOR
ACKNOWLEDGMENT
START
CONDITION
SCL
1
2
8
9
NOT ACKNOWLEDGE
SDA
ACKNOWLEDGE
Figure 4. Acknowledge Condition
2
Table 1. I C Slave Addresses
2
A6
A5
A4
A3
A2*
A1*
A0
0
I C ADDR
WRITE
0x70
0x72
0x74
0x76
0x78
0x7A
READ
0x71
0x73
0x75
0x77
0x79
0x7B
0
1
1
1
0
0
0
1
1
0
0
0x38
0x39
0x3A
0x3B
0x3C
0x3D
0
1
1
1
0
1
0
1
1
1
0
0
0
1
1
1
0
1
0
1
1
1
1
0
0
1
1
1
1
1
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Maxim Integrated | 11
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
2
Table 1. I C Slave Addresses (continued)
2
A6
A5
A4
A3
A2*
A1*
A0
0
I C ADDR
WRITE
0x7C
READ
0x7D
0x7F
0
1
1
1
1
1
0x3E
0x3F
0
1
1
1
1
1
1
0x7E
*See the Ordering Information for the 7-bit default settings for ADDR=0.
Write Data Format
A write to the device includes:
● Transmission of a START condition
● Slave address with the write bit set to 0
● 1 byte of data to the register address
● 1 byte of data to the command register
● STOP condition. .
(Figure 5 illustrates the proper format for one frame)
Read Data Format
A read from the device includes:
● Transmission of a START condition
● Slave address with the write bit set to 0
● 1 byte of data to the register address
● Restart condition
● Slave address with the read bit set to 1
● 1 byte of data to the command register
● STOP condition
(Figure 5 illustrates the proper format for one frame)
Writing to a Single Register
Figure 6 shows the protocol for the I C master device to write 1 byte of data to the ICs. This protocol is the same as the
SMBus specification’s “write byte” protocol.
2
The “write byte” protocol is as follows:
1. Master sends a START command (S).
2. Master sends the 7-bit slave address followed by awrite bit (R/W = 0).
3. Addressed slave asserts an acknowledge (A) by pulling SDA low.
4. Master sends an 8-bit register pointer.
5. Slave acknowledges the register pointer.
6. Master sends a data byte.
7. Slave updates with the new data.
8. Slave acknowledges or not acknowledges the databyte. The next rising edge on SDA loads the data byteinto its target
register and the data becomes active.
9. Master sends a STOP condition (P) or a RepeatedSTART condition (Sr).
Writing Multiple Bytes Using Register-Data Pairs
2
Figure 7 shows the protocol for the I C master device to write multiple bytes to the ICs using register-data pairs. This
2
protocol allows the I C master device to address the slave only once and then send data to multiple registers in a random
order. Registers can be written continuously until the master issues a STOP condition.
The “multiple byte register-data pair” protocol is as follows:
1. Master sends a START command.
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Maxim Integrated | 12
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
2. Master sends the 7-bit slave address followed by a write bit.
3. Addressed slave asserts an acknowledge by pulling SDA low.
4. Master sends an 8-bit register pointer.
5. Save acknowledges the register pointer.
6. Master sends a data byte.
7. Slave acknowledges the data byte. The next rising edge on SDA loads the data byte into its target register and the
data becomes active.
8. Steps 4–7 are repeated as many times as the master requires.
9. Master sends a STOP condition. During the rising edge of the stop-related SDA edge, the data byte that was
previously written is loaded into the target register and becomes active.
WRITE BYTE
SLAVE WRITE
ADDRESS
REGISTER
ADDRESS
S
A
A
A
A
DATA
NA
A
P
WRITE MULTIPLE BYTES
SLAVE WRITE
ADDRESS
REGISTER
ADDRESS
REGISTER
ADDRESS
REGISTER
ADDRESS
. . .
S
DATA 1
A
DATA 2
A
DATA 2
A
P
READ BYTE
SLAVE WRITE
ADDRESS
REGISTER
ADDRESS
SLAVE READ
ADDRESS
S
A
A
Sr
Sr
A
A
DATA
NA P
READ SEQUENTIAL BYTES
SLAVE WRITE
REGISTER
ADDRESS
SLAVE READ
ADDRESS
. . .
DATA N
NA P
S
A
A
DATA 1
ADDRESS
2
Figure 5. Data Format of I C Interface
LEGEND
MASTER TO SLAVE
SLAVE TO MASTER
NUMBER
OF BITS
1
7
1
0
1
8
1
8
1
1
A OR
nA
P OR
Sr
S
A
SLAVE ADDRESS
A
REGISTER POINTER
DATA
R/W
THE DATA IS LOADED INTO
THE TARGET REGISTER
SDA
B1
7
B2
8
A
9
SCL
Figure 6. Write Byte Format
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Maxim Integrated | 13
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
PG Output
The ICs feature an open-drain PGOOD output that asserts low when the output voltage exceeds the PG_OV and PG_UV
thresholds. PG remains low for a fixed timeout period after the output is within the regulation window. Connect PG to a
logic supply using a pullup resistor.
Soft-Start
The ICs include a programmable startup fixed soft-start rate. Soft-start time limits startup inrush current by forcing the
output voltage to ramp up towards its regulation point.
Shutdown
During shutdown, the output voltage is ramped down at the 5.5mV/μs slew rate. Once the controlled ramp is stopped,
the output voltage is typically around 0.15V at no load.
Spread-Spectrum Option
The ICs, featuring spread-spectrum (SS) operation, vary the internal operating frequency down by 3% relative to the
internally generated operating frequency of 2.2MHz (typ). This function does not apply to externally applied oscillation
frequency.
Synchronization (SYNC)
SYNC is factory-programmable I/O (see Ordering Information for the available options). When SYNC is configured as
an input, a logic-high on the FPWM bit enables SYNC to accept signal frequencies in the range of 1.8MHz < f
2.6MHz. When SYNC is configured as an output, it outputs the internal PWM switching frequency.
<
SYNC
Current-Limit/Short-Circuit Protection
The current-limit feature protects the ICs against short-circuit and overload conditions at the output. After soft-start is
completed, if V is less than 50% of the set value and the IC is in current limit, the IC shuts off for 4ms (at 2.2MHz
OUT
switching frequency) and repeats soft-start. This cycle repeats until the short or overload condition is removed. See the
short-circuit (PWM) waveform for an example.
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Maxim Integrated | 14
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
LEGEND
MASTER TO SLAVE
SLAVE TO MASTER
1
7
1
0
1
8
1
8
1
NUMBER
OF BITS
• • •
S
SLAVE ADDRESS
A
REGISTER POINTER X
A
DATA X
A
a
R/W
8
1
8
1
NUMBER
OF BITS
REGISTER POINTER n
A
DATA n
A
• • •
a
1
1
8
1
8
NUMBER
OF BITS
REGISTER POINTER Z
A
DATA Z
A
P
ß
THE DATA IS LOADED INTO
THE TARGET REGISTER
B1
7
B0
A
9
B7
SDA
SCL
8
1
DETAIL : a
THE DATA IS LOADED INTO
THE TARGET REGISTER
B1
7
B0
A
SDA
SCL
8
9
DETAIL : ß
Figure 7. Write Register (Data-Pair Format)
Table 2. Register Map
POWER-
ON
RESET
REGISTER R/
REG
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
ADDRESS
W
ID
—
DEV3
—
DEV2
—
DEV1
—
DEV0
—
R3
—
R2
—
R1
—
R0
—
0x00
R
0x00
0x00
R/
W
0x01
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Maxim Integrated | 15
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
Table 2. Register Map (continued)
POWER-
ON
RESET
REGISTER R/
REG
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
ADDRESS
W
R/
W
VIDMAX
—
VMAX6
—
VMAX5
VMAX4
VMAX3
VMAX2
VMAX1
VMAX0
0x02
OTP
R/
W
Reserved* Reserved*
—
VRHOT
—
—
UV
—
—
OV
—
OC
SS
Reserved* Reserved*
0x03
0x04
0x05
0x02
0x00
OTP
STATUS
CONFIG
INTERR TRKERR
VMERR
SO1
0
R
R/
W
VSTEP
—
—
—
FPWM
SO0
R/
W
SLEW
VID
—
—
SR3
SR2
SR1
SR0
0x06
0x07
0x2B
OTP
OTP
0x00
R/
W
—
VID6
—
VID5
VID4
VID3
VID2
VID1
VID0
R/
W
Reserved*
—
Reserved* Reserved* Reserved* Reserved* Reserved* Reserved*
*Note: Reserved registers and bits are not used for readback; they are reserved for internal use.
Table 3. Identification Registers (ID)
ID
BIT NO.
NAME
POR
BIT 7
DEV3
0
BIT 6
DEV2
0
BIT 5
DEV1
0
BIT 4
DEV0
0
BIT 3
R3
BIT 2
R2
BIT 1
R1
BIT 0
R0
0
0
0
0
BIT
BIT DESCRIPTION
DEV[7:4]
R[3:0]
Device ID: MAX20010C/MAX20010D/MAX20010E = 0x0
0x3
Table 4. Maximum Voltage-Setting Registers (VIDMAX)
VIDMAX
BIT NO.
NAME
POR
7
6
5
4
3
2
1
0
—
VMAX6
OTP
VMAX5
OTP
VMAX4
OTP
VMAX3
OTP
VMAX2
OTP
VMAX1
OTP
VMAX0
OTP
OTP
BIT
BIT DESCRIPTION
Maximum Voltage Setting:
VMAX[6:0] If VID[] > VMAX[], a fault is set and the actual voltage will be capped by VMAX[]. See Table 9 for voltage selections.
Table 5. Configuration Registers (CONFIG)
CONFIG
BIT NO.
NAME
POR
BIT 7
VSTEP
OTP
BIT 6
—
BIT 5
—
BIT 4
—
BIT 3
FPWM
OTP
BIT 2
SS
BIT 1
SO1
OTP
BIT 0
SO0
OTP
OTP
OTP
OTP
OTP
BIT
BIT DESCRIPTION
Voltage Step Size—Sets the voltage step size for the LSB of SETVOUT: 0 = 10mV
1 = 12.5mV
VSTEP
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Maxim Integrated | 16
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
BIT
BIT DESCRIPTION
Forced-PWM Mode:
0 = Mode controlled by SYNC pin. When SYNC is output device is always FPWM mode.
1 = Forced-PWM Mode. Overrides SYNC skip mode setting when SYNC is an input.
FPWM
SS
Spread-Spectrum Clock Setting:
0 = Disabled
1 = +3% spread
SYNC I/O Select:
00 = Master: Input, rising edge starts cycle
01 = Master: Input, falling edge starts cycle
10 = Master: Output, falling edge starts cycle
11 = Unused
SO[1:0]
Table 6. Status Registers (STATUS)
STATUS
BIT 5
BIT NO.
NAME
POR
BIT 7
INTERR
0
BIT 6
Reserved*
0
BIT 4
UV
0
BIT 3
OV
0
BIT 2
OC
0
BIT 1
VMERR
0
BIT 0
VRHOT
0
0
0
BIT
BIT DESCRIPTION
Internal Hardware Error:
This bit is set to 1 when ATE trimming and testing is not complete.
INTERR
Reserved Reserved registers and bits are not used for readback; they are reserved for internal use.
Thermal-Shutdown Indication:
VRHOT
This bit indicates if thermal shutdown has occurred since the last time the STATUS register was read.
VOUT Undervoltage:
This bit indicates if the output is currently under the target voltage.
UV
OV
VOUT Overvoltage:
This bit indicates if the output is currently over the target voltage.
VOUT Overcurrent:
OC
This bit indicates if an overcurrent event has occurred since the last time the STATUS register was read.
VMERR
VOUT MAX Error: Set to 1 if VID[] > VOUTMAX[] is in normal mode.
Table 7. Slew-Rate Registers (SLEW)
SLEW
BIT 4
BIT NO.
NAME
POR
BIT 7
—
BIT 6
—
BIT 5
—
BIT 3
SR3
BIT 2
SR2
BIT 1
SR1
BIT 0
SR0
—
OTP
OTP
OTP
OTP
OTP
OTP
OTP
OTP
SR[3:0]
SOFT-START SLEW RATE (mV/μs)*
DVS SLEW RATE (mV/μs)*
XXXX0000
XXXX0001
XXXX0010
XXXX0011
XXXX0100
XXXX0101
XXXX0110
XXXX0111
22
11
5.5
11
5.5
44
22
11
22
22
22
11
11
44
44
44
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Maxim Integrated | 17
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
SR[3:0]
XXXX1000
SOFT-START SLEW RATE (mV/μs)*
DVS SLEW RATE (mV/μs)*
5.5
5.5
44
5.5
XXXX1001
XXXX1010―XXXX1111
Reserved
Reserved
*Note: VSTEP = ‘0’; when VSTEP = ‘1’, increase by a factor of 1.25.
Table 8. Output-Voltage Registers, VID
VID
BIT NO.
NAME
POR
BIT 7
—
BIT 6
VID6
OTP
BIT 5
VID5
OTP
BIT 4
VID4
OTP
BIT 3
VID3
OTP
BIT 2
BIT 1
VID1
OTP
BIT 0
VID2
OTP
VID0
OTP
OTP
BIT
BIT DESCRIPTION
Target Voltage Setting:
VID[6:0] VOUT ramps at the programmed DVS ramp until it reaches VSET. See Table 9 for voltage selections.
Table 9. VID Output-Voltage Selections
VOUT (V)
(VSTEP = 0)
VOUT (V)
(VSTEP = 1)
VOUT (V)
(VSTEP = 0)
VOUT (V)
(VSTEP = 1)
VOUT (V)
(VSTEP = 0)
VOUT (V)
(VSTEP = 1)
VID[6:0]
VID[6:0]
VID[6:0]
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
OFF
OFF
0x20
0x21
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
0x2A
0x2B
0x2C
0x2D
0x2E
0x2F
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
0.810
0.820
0.830
0.840
0.850
0.860
0.870
0.880
0.890
0.900
0.910
0.920
0.930
0.940
0.950
0.960
0.970
0.980
0.990
1.000
1.010
1.020
1.030
1.040
1.050
1.0125
1.0250
1.0375
1.0500
1.0625
1.0750
1.0875
1.1000
1.1125
1.1250
1.1375
1.1500
1.1625
1.1750
1.1875
1.2000
1.2125
1.2250
1.2375
1.2500
1.2625
1.2750
1.2875
1.3000
1.3125
0x40
0x41
0x42
0x43
0x44
0x45
0x46
0x47
0x48
0x49
0x4A
0x4B
0x4C
0x4D
0x4E
1.130
1.140
1.150
1.160
1.170
1.180
1.190
1.200
1.210
1.220
1.230
1.240
1.250
1.260
1.270
1.4125
1.4250
1.4375
1.4500
1.4625
1.4750
1.4875
1.5000
1.5125
1.5250
1.5375
1.5500
1.5625
1.5750
1.5875
0.500
0.510
0.520
0.530
0.540
0.550
0.560
0.570
0.580
0.590
0.600
0.610
0.620
0.630
0.640
0.650
0.660
0.670
0.680
0.690
0.700
0.710
0.720
0.730
0.6250
0.6375
0.6500
0.6625
0.6750
0.6875
0.7000
0.7125
0.7250
0.7375
0.7500
0.7625
0.7750
0.7875
0.8000
0.8125
0.8250
0.8375
0.8500
0.8625
0.8750
0.8875
0.9000
0.9125
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Maxim Integrated | 18
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
Table 9. VID Output-Voltage Selections (continued)
VOUT (V)
(VSTEP = 0)
VOUT (V)
(VSTEP = 1)
VOUT (V)
(VSTEP = 0)
VOUT (V)
(VSTEP = 1)
VOUT (V)
(VSTEP = 0)
VOUT (V)
(VSTEP = 1)
VID[6:0]
VID[6:0]
VID[6:0]
0x19
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
0.740
0.750
0.760
0.770
0.780
0.790
0.800
0.9250
0.9375
0.9500
0.9625
0.9750
0.9875
1.0000
0x39
0x3A
0x3B
0x3C
0x3D
0x3E
0x3F
1.060
1.070
1.080
1.090
1.100
1.110
1.120
1.3250
1.3375
1.3500
1.3625
1.3750
1.3875
1.4000
PWM/Skip Modes
The ICs feature a SYNC input that puts the converter either in skip mode or forced-PWM mode of operation. See the Pin
Description table for mode details. In PWM mode, the converter switches at a constant frequency with variable on-time.
In skip mode, the converter’s switching frequency is load-dependent until the output load reaches a certain threshold. At
higher load current, the switching frequency does not change and the operating mode is similar to the PWM mode. Skip
mode helps improve efficiency in light-load applications by transferring more energy to the output during each on cycle,
so the converter does not switch MOSFETs on and off as often as is the case in PWM mode. Consequently, the gate
charge and switching losses are much lower in skip mode.
Overtemperature Protection
Thermal-overload protection limits the total power dissipation in the ICs. When the junction temperature exceeds 165°C
(typ), an internal thermal sensor shuts down the internal bias regulator and the step-down controller, allowing the ICs to
cool. The thermal sensor turns on the ICs again after the junction temperature cools by 15°C.
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Maxim Integrated | 19
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
Applications Information
Input Capacitor
The input filter capacitor reduces peak currents drawn from the power source and reduces noise and voltage ripple on
the input caused by the circuit’s switching.
The input capacitor RMS current requirement (I
) is defined by the following equation:
RMS
V
(V
− V
)
OUT PV_
OUT
√
I
= I
LOAD(MAX)
RMS
V
PV_
I
I
has a maximum value when the input voltage equals twice the output voltage (V
= 2V
), so I
=
RMS(MAX)
RMS
PV_
OUT
/2.
LOAD(MAX)
Choose an input capacitor that exhibits less than +10°C self-heating temperature rise at the RMS input current for optimal
long-term reliability:
∆ V
ESR
ESP
=
IN
∆ I
L
I
+
OUT
2
where:
(V
− V
) × V
PV_
V
OUT
× f
OUT
× L
∆ I =
L
PV_ SW
and:
I
× D(1 − D)
OUT
C
=
IN
∆ V × f
Q
SW
and:
V
OUT
D =
V
PV_
I
is the maximum output current, D is the duty cycle.
OUT
Inductor Selection
The ICs are optimized to use a nominal 0.22μH inductor value. 0.15μH to 0.33μH inductors can also be used.
Inductors are rated for maximum saturation current. The maximum inductor current equals the maximum load current in
addition to half the peak-to-peak ripple current:
∆ I
INDUCTOR
I
= I
+
PEAK
LOAD(MAX)
2
The actual peak-to-peak inductor ripple current is calculated in the previous ΔI equation.
L
The saturation current should be > I
, or at least in a range where the inductance does not degrade significantly.
PEAK
Output Capacitor
The MAX20010C is stable with 2x47μF (typ) or more of X7R ceramic capacitance on the output, while the MAX20010D/
MAX20010E is stable with 3x47μF (typ). Phase and gain margin must be measured with the worst-case-derated output
capacitance to ensure stability. Larger capacitance values can be used to minimize V
transients.
and V
during load
SOAR
SAG
Setting the Output Voltage Externally
An external resistive divider can be used to set the output voltage higher than the programmed VID voltage. This should
only be done with MAX20010EATPA/V+. To set the output voltage, connect a resistive divider from the output (OUT) to
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Maxim Integrated | 20
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
RS+ to GND, as shown in Figure 8 V
should not exceed 5V. Select RFB2 (RS+ to GND resistor) ≤ 50kΩ. Calculate
OUT
R
(OUT to RS+ resistor) with the following equation:
FB
V
V
OUT
R
= R [(
) − 1]
FB1
FB2
RS+
where V
= programmed VID voltage. Capacitor C
can help improve the phase margin when using a resistive
FB1
RS+
divider. Determine C
from the following equation:
FB1
C
= 1 (2 × π × R
× 80k)
/
FB1
FB1
When setting the output voltage externally, scale the inductance according to the V
/V
ratio. MAX20010EATPA/
OUT RS+
V+ parts are programmed with double internal slope compensation to allow for smaller inductance values. Set the
inductance using the following equation:
L = V
V
RS
+
× 220nH 2
/
OUT
/
V
OUT
R
R
FB1
C
FB1
RS+
FB2
Figure 8. Adjustable Output-Voltage Setting
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Maxim Integrated | 21
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
Ordering Information
PIN-
V
OUT
(V)
2
I C ADDR = 0
PART
PACKAGE
20 TQFN-EP*
20 TQFN-EP*
20 TQFN-EP*
20 TQFN-EP*
20 TQFN-EP*
20 TQFN-EP*
20 TQFN-EP*
20 TQFN-EP*
20 TQFN-EP*
20 SW TQFN-EP*
20 TQFN-EP*
20 TQFN-EP*
20 TQFN-EP*
20 TQFN-EP*
VMAX[6:0]
0x3C (1.09V)
0x29 (0.90V)
0x4C (1.25V)
0x42 (1.15V)
0x3D (1.10V)
0x1F (0.80V)
0x3B (1.08V)
0x42 (1.15V)
0x42 (1.15V)
0x42 (1.15V)
0x42 (1.15V)
0x42 (1.15V)
0x42 (1.15V)
0X4C (1.25)
CONFIG
0x0E
0x08
0x08
0x06
0x08
0x08
0x0C
0x08
0x08
0x08
0x08
0x08
0x08
0x08
VID[6:0]
SLEW
0x09
0x09
0x03
0x03
0x03
0x03
0x00
0x03
0x03
0x03
0x03
0x00
0x03
0x03
MAX20010CATPD/V+
MAX20010CATPE/V+
MAX20010CATPJ/V+
MAX20010CATPL/V+
MAX20010CATPM/V+
MAX20010CATPQ/V+
MAX20010CATPU/V+
MAX20010DATPN/V+
MAX20010DATPO/V+
MAX20010DATPO/VY+
MAX20010DATPP/V+
MAX20010DATPR/V+
MAX20010DATPT/V+
MAX20010EATPA/V+
0.82
0.80
1.20
1.00
1.00
0.60
1.03
1.00
0.91
0.91
0.87
0.90
0.75
1.2
0x21 (0.82V)
0x1F (0.80V)
0x47 (1.20V)
0x33 (1.00V)
0x33 (1.00V)
0x0B (0.60V)
0x36 (1.03V)
0x33 (1.00V)
0x2A (0.91V)
0x2A (0.91V)
0x26 (0.87V)
0x29 (0.90V)
0x1A (0.75V)
0x47 (1.2V)
0x38
0x3A
0x38
0x38
0x38
0x38
0x38
0x38
0x38
0x38
0x38
0x38
0x38
0x38
/V denotes an automotive qualified part.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
**Future product—contact factory for availability.
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Maxim Integrated | 22
MAX20010C/MAX20010D/
MAX20010E
Automotive Single 6A Step-Down Converters
Revision History
REVISION REVISION
PAGES
DESCRIPTION
CHANGED
NUMBER
DATE
0
1
9/17
Initial release
—
3/18
Updated Table 7, Output Capacitor section, and Ordering Information
16, 18–19
2, 16, 19
Updated Package Information table and Table 7. Added MAX20010DATPR/V+ as a future
product to the Ordering Information table.
2
3
4/18
8/18
Updated equation in the Setting the Output Voltage Externally section. Added MAX-
20010CATPE/V+** as a future product and removed future product designation from
MAX20010DATPR/V+ in the Ordering Information table.
19
Updated Package Information table. Added MAX20010DATPT/V+ and MAX20010DAT-
PO/VY+ to the Ordering Information table. Added MAX20010CATPU/V+as a future product
to the Ordering Information table.
4
5
11/18
3/19
2, 19
19
Removed future-product notation from MAX20010CATPE/V+ and MAX20010CATPU/V+ in
the Ordering Information table
Added MAX20010E product variant to the following sections: General description, Typical
Application Circuit, Pin configuration, Detailed Description, Figure 1: Internal Block
Diagram, Table3: Identification Registers (ID) - Dev[7.4], Output Capacitor. Updated and
added equations to: Setting the Output Voltage Externally section. Added MAX20010E-
ATPA/V+ to the Ordering Information table. Updated ordering table to use 7-bit addresses.
1, 7, 8, 14,
18, 19
6
2/20
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max
limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2020 Maxim Integrated Products, Inc.
相关型号：
SI9130DB
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